wl.cmake 2.3 KB

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  1. set(STM32_WL_TYPES
  2. WL54xx WL55xx WLE4xx WLE5xx WLE4xx WLE5xx WLE4xx WLE5xx
  3. )
  4. set(STM32_WL_TYPE_MATCH
  5. "WL54.." "WL55.." "WLE4.8" "WLE5.8" "WLE4.B" "WLE5.B" "WLE4.C" "WLE5.C"
  6. )
  7. # this is RAM size allocated to M4 core
  8. # Note devices with 20 and 48K RAM can use only half of available RAM because
  9. # there are 2 split sections of RAM and our default linker script only manages
  10. # one section.
  11. set(STM32_WL_RAM_SIZES
  12. 32K 32K 10K 10K 24K 24K 64K 64K
  13. )
  14. # this is RAM size allocated to M0PLUS core
  15. set(STM32_WL_M0PLUS_RAM_SIZES
  16. 32K 32K 0K 0K 0K 0K 0K 0K
  17. )
  18. set(STM32_WL_CCRAM_SIZES
  19. 0K 0K 0K 0K 0K 0K 0K 0K
  20. )
  21. set(STM32_WL_DUAL_CORE
  22. WL54xx WL55xx
  23. )
  24. stm32_util_create_family_targets(WL M4)
  25. target_compile_options(STM32::WL::M4 INTERFACE
  26. -mcpu=cortex-m4 -mfloat-abi=soft
  27. )
  28. target_link_options(STM32::WL::M4 INTERFACE
  29. -mcpu=cortex-m4 -mfloat-abi=soft
  30. )
  31. stm32_util_create_family_targets(WL M0PLUS)
  32. target_compile_options(STM32::WL::M0PLUS INTERFACE
  33. -mcpu=cortex-m0plus -mfloat-abi=soft
  34. )
  35. target_link_options(STM32::WL::M0PLUS INTERFACE
  36. -mcpu=cortex-m0plus -mfloat-abi=soft
  37. )
  38. function(stm32wl_get_memory_info DEVICE TYPE CORE RAM FLASH_ORIGIN RAM_ORIGIN TWO_FLASH_BANKS)
  39. if(${TYPE} IN_LIST STM32_WL_DUAL_CORE)
  40. set(${TWO_FLASH_BANKS} TRUE PARENT_SCOPE)
  41. else()
  42. set(${TWO_FLASH_BANKS} FALSE PARENT_SCOPE)
  43. endif()
  44. list(FIND STM32_WL_TYPES ${TYPE} TYPE_INDEX)
  45. if(CORE STREQUAL "M4")
  46. list(GET STM32_WL_RAM_SIZES ${TYPE_INDEX} RAM_VALUE)
  47. set(${RAM} ${RAM_VALUE} PARENT_SCOPE)
  48. set(${FLASH_ORIGIN} 0x8000000 PARENT_SCOPE)
  49. set(${RAM_ORIGIN} 0x20000000 PARENT_SCOPE)
  50. elseif((${TYPE} IN_LIST STM32_WL_DUAL_CORE) AND (CORE STREQUAL "M0PLUS"))
  51. list(GET STM32_WL_M0PLUS_RAM_SIZES ${TYPE_INDEX} RAM_VALUE)
  52. set(${RAM} ${RAM_VALUE} PARENT_SCOPE)
  53. set(${FLASH_ORIGIN} 0x8020000 PARENT_SCOPE)
  54. set(${RAM_ORIGIN} 0x20008000 PARENT_SCOPE)
  55. else()
  56. message(FATAL_ERROR "Unknown core ${CORE}")
  57. endif()
  58. endfunction()
  59. function(stm32wl_get_device_cores DEVICE TYPE CORES)
  60. if(${TYPE} IN_LIST STM32_WL_DUAL_CORE)
  61. set(${CORES} M4 M0PLUS PARENT_SCOPE)
  62. else()
  63. set(${CORES} M4 PARENT_SCOPE)
  64. endif()
  65. endfunction()