custom_presets.h 3.8 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192
  1. #include <cc1101.h>
  2. /* 20 KBaud, 2FSK, 28.56 kHz deviation, 325 Khz bandwidth filter. */
  3. static uint8_t protoview_subghz_tpms1_async_regs[][2] = {
  4. /* GPIO GD0 */
  5. {CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
  6. /* Frequency Synthesizer Control */
  7. {CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
  8. /* Packet engine */
  9. {CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
  10. {CC1101_PKTCTRL1, 0x04},
  11. // // Modem Configuration
  12. {CC1101_MDMCFG0, 0x00},
  13. {CC1101_MDMCFG1, 0x02},
  14. {CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized). Other code reading TPMS uses GFSK, but should be the same when in RX mode.
  15. {CC1101_MDMCFG3, 0x93}, // Data rate is 20kBaud
  16. {CC1101_MDMCFG4, 0x59}, // Rx bandwidth filter is 325 kHz
  17. {CC1101_DEVIATN, 0x41}, // Deviation 28.56 kHz
  18. /* Main Radio Control State Machine */
  19. {CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
  20. /* Frequency Offset Compensation Configuration */
  21. {CC1101_FOCCFG,
  22. 0x16}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
  23. /* Automatic Gain Control */
  24. {CC1101_AGCCTRL0,
  25. 0x91}, //10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
  26. {CC1101_AGCCTRL1,
  27. 0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
  28. {CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
  29. /* Wake on radio and timeouts control */
  30. {CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
  31. /* Frontend configuration */
  32. {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
  33. {CC1101_FREND1, 0x56},
  34. /* End */
  35. {0, 0},
  36. };
  37. /* 20 KBaud, 2FSK, 44.60 kHz deviation, 270 Khz bandwidth filter. */
  38. static uint8_t protoview_subghz_tpms2_async_regs[][2] = {
  39. /* GPIO GD0 */
  40. {CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
  41. /* Frequency Synthesizer Control */
  42. {CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
  43. /* Packet engine */
  44. {CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
  45. {CC1101_PKTCTRL1, 0x04},
  46. // // Modem Configuration
  47. {CC1101_MDMCFG0, 0x00},
  48. {CC1101_MDMCFG1, 0x02},
  49. {CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized). Other code reading TPMS uses GFSK, but should be the same when in RX mode.
  50. {CC1101_MDMCFG3, 0x93}, // Data rate is 20kBaud
  51. {CC1101_MDMCFG4, 0x67}, // Rx BW filter is 270.833333 kHz
  52. {CC1101_DEVIATN, 0x47}, // Deviation 47.60742 kHz
  53. /* Main Radio Control State Machine */
  54. {CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
  55. /* Frequency Offset Compensation Configuration */
  56. {CC1101_FOCCFG,
  57. 0x16}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
  58. /* Automatic Gain Control */
  59. {CC1101_AGCCTRL0,
  60. 0x91}, //10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
  61. {CC1101_AGCCTRL1,
  62. 0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
  63. {CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
  64. /* Wake on radio and timeouts control */
  65. {CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
  66. /* Frontend configuration */
  67. {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
  68. {CC1101_FREND1, 0x56},
  69. /* End */
  70. {0, 0},
  71. };