l1.cmake 2.2 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273
  1. set(STM32_L1_TYPES
  2. L100xB L100xBA L100xC L151xB L151xBA L151xC L151xCA L151xD
  3. L151xDX L151xE L152xB L152xBA L152xC L152xCA L152xD L152xDX
  4. L152xE L162xC L162xCA L162xD L162xDX L162xE
  5. )
  6. set(STM32_L1_TYPE_MATCH
  7. "L100.[68B]" "L100.[68B]A" "L100.C" "L151.[68B]" "L151.[68B]A" "L151.C" "L151.CA" "L151.D"
  8. "L151.DX" "L151.E" "L152.[68B]" "L152.[68B]A" "L152.C" "L152.CA" "L152.D" "L152.DX"
  9. "L152.E" "L162.C" "L162.CA" "L162.D" "L162.DX" "L162.E"
  10. )
  11. set(STM32_L1_RAM_SIZES
  12. 0K 0K 16K 0K 0K 32K 32K 48K
  13. 80K 80K 0K 0K 32K 32K 48K 80K
  14. 80K 32K 32K 48K 80K 80K
  15. )
  16. set(STM32_L1_CCRAM_SIZES
  17. 0K 0K 0K 0K 0K 0K 0K 0K
  18. 0K 0K 0K 0K 0K 0K 0K 0K
  19. 0K 0K 0K 0K 0K 0K
  20. )
  21. stm32_util_create_family_targets(L1)
  22. target_compile_options(STM32::L1 INTERFACE
  23. -mcpu=cortex-m3
  24. )
  25. target_link_options(STM32::L1 INTERFACE
  26. -mcpu=cortex-m3
  27. )
  28. function(stm32l1_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
  29. string(REGEX REPLACE "L1[0-9][0-9].([68BCDE])" "\\1" SIZE_CODE ${DEVICE})
  30. unset(RAM)
  31. if((TYPE STREQUAL "L100xB"))
  32. if(SIZE_CODE STREQUAL "6")
  33. set(RAM "4K")
  34. elseif(SIZE_CODE STREQUAL "8")
  35. set(RAM "8K")
  36. elseif(SIZE_CODE STREQUAL "B")
  37. set(RAM "10K")
  38. endif()
  39. elseif((TYPE STREQUAL "L100xBA"))
  40. if(SIZE_CODE STREQUAL "6")
  41. set(RAM "4K")
  42. elseif(SIZE_CODE STREQUAL "8")
  43. set(RAM "8K")
  44. elseif(SIZE_CODE STREQUAL "B")
  45. set(RAM "16K")
  46. endif()
  47. elseif((TYPE STREQUAL "L151xB") OR (TYPE STREQUAL "L152xB"))
  48. if(SIZE_CODE STREQUAL "6")
  49. set(RAM "10K")
  50. elseif(SIZE_CODE STREQUAL "8")
  51. set(RAM "10K")
  52. elseif(SIZE_CODE STREQUAL "B")
  53. set(RAM "16K")
  54. endif()
  55. elseif((TYPE STREQUAL "L151xBA") OR (TYPE STREQUAL "L152xBA"))
  56. if(SIZE_CODE STREQUAL "6")
  57. set(RAM "16K")
  58. elseif(SIZE_CODE STREQUAL "8")
  59. set(RAM "32K")
  60. elseif(SIZE_CODE STREQUAL "B")
  61. set(RAM "32K")
  62. endif()
  63. endif()
  64. if(RAM)
  65. set(${RAM_SIZE} ${RAM} PARENT_SCOPE)
  66. endif()
  67. endfunction()