emitinlinethumb.c 34 KB

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  1. /*
  2. * This file is part of the MicroPython project, http://micropython.org/
  3. *
  4. * The MIT License (MIT)
  5. *
  6. * Copyright (c) 2013, 2014 Damien P. George
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include <stdint.h>
  27. #include <stdio.h>
  28. #include <string.h>
  29. #include <stdarg.h>
  30. #include <assert.h>
  31. #include "py/emit.h"
  32. #include "py/asmthumb.h"
  33. #if MICROPY_EMIT_INLINE_THUMB
  34. typedef enum {
  35. // define rules with a compile function
  36. #define DEF_RULE(rule, comp, kind, ...) PN_##rule,
  37. #define DEF_RULE_NC(rule, kind, ...)
  38. #include "py/grammar.h"
  39. #undef DEF_RULE
  40. #undef DEF_RULE_NC
  41. PN_const_object, // special node for a constant, generic Python object
  42. // define rules without a compile function
  43. #define DEF_RULE(rule, comp, kind, ...)
  44. #define DEF_RULE_NC(rule, kind, ...) PN_##rule,
  45. #include "py/grammar.h"
  46. #undef DEF_RULE
  47. #undef DEF_RULE_NC
  48. } pn_kind_t;
  49. struct _emit_inline_asm_t {
  50. asm_thumb_t as;
  51. uint16_t pass;
  52. mp_obj_t *error_slot;
  53. mp_uint_t max_num_labels;
  54. qstr *label_lookup;
  55. };
  56. #if MICROPY_DYNAMIC_COMPILER
  57. static inline bool emit_inline_thumb_allow_float(emit_inline_asm_t *emit) {
  58. return MP_NATIVE_ARCH_ARMV7EMSP <= mp_dynamic_compiler.native_arch
  59. && mp_dynamic_compiler.native_arch <= MP_NATIVE_ARCH_ARMV7EMDP;
  60. }
  61. #else
  62. static inline bool emit_inline_thumb_allow_float(emit_inline_asm_t *emit) {
  63. return MICROPY_EMIT_INLINE_THUMB_FLOAT;
  64. }
  65. #endif
  66. static void emit_inline_thumb_error_msg(emit_inline_asm_t *emit, mp_rom_error_text_t msg) {
  67. *emit->error_slot = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg);
  68. }
  69. static void emit_inline_thumb_error_exc(emit_inline_asm_t *emit, mp_obj_t exc) {
  70. *emit->error_slot = exc;
  71. }
  72. emit_inline_asm_t *emit_inline_thumb_new(mp_uint_t max_num_labels) {
  73. emit_inline_asm_t *emit = m_new_obj(emit_inline_asm_t);
  74. memset(&emit->as, 0, sizeof(emit->as));
  75. mp_asm_base_init(&emit->as.base, max_num_labels);
  76. emit->max_num_labels = max_num_labels;
  77. emit->label_lookup = m_new(qstr, max_num_labels);
  78. return emit;
  79. }
  80. void emit_inline_thumb_free(emit_inline_asm_t *emit) {
  81. m_del(qstr, emit->label_lookup, emit->max_num_labels);
  82. mp_asm_base_deinit(&emit->as.base, false);
  83. m_del_obj(emit_inline_asm_t, emit);
  84. }
  85. static void emit_inline_thumb_start_pass(emit_inline_asm_t *emit, pass_kind_t pass, mp_obj_t *error_slot) {
  86. emit->pass = pass;
  87. emit->error_slot = error_slot;
  88. if (emit->pass == MP_PASS_CODE_SIZE) {
  89. memset(emit->label_lookup, 0, emit->max_num_labels * sizeof(qstr));
  90. }
  91. mp_asm_base_start_pass(&emit->as.base, pass == MP_PASS_EMIT ? MP_ASM_PASS_EMIT : MP_ASM_PASS_COMPUTE);
  92. asm_thumb_entry(&emit->as, 0);
  93. }
  94. static void emit_inline_thumb_end_pass(emit_inline_asm_t *emit, mp_uint_t type_sig) {
  95. asm_thumb_exit(&emit->as);
  96. asm_thumb_end_pass(&emit->as);
  97. }
  98. static mp_uint_t emit_inline_thumb_count_params(emit_inline_asm_t *emit, mp_uint_t n_params, mp_parse_node_t *pn_params) {
  99. if (n_params > 4) {
  100. emit_inline_thumb_error_msg(emit, MP_ERROR_TEXT("can only have up to 4 parameters to Thumb assembly"));
  101. return 0;
  102. }
  103. for (mp_uint_t i = 0; i < n_params; i++) {
  104. if (!MP_PARSE_NODE_IS_ID(pn_params[i])) {
  105. emit_inline_thumb_error_msg(emit, MP_ERROR_TEXT("parameters must be registers in sequence r0 to r3"));
  106. return 0;
  107. }
  108. const char *p = qstr_str(MP_PARSE_NODE_LEAF_ARG(pn_params[i]));
  109. if (!(strlen(p) == 2 && p[0] == 'r' && (mp_uint_t)p[1] == '0' + i)) {
  110. emit_inline_thumb_error_msg(emit, MP_ERROR_TEXT("parameters must be registers in sequence r0 to r3"));
  111. return 0;
  112. }
  113. }
  114. return n_params;
  115. }
  116. static bool emit_inline_thumb_label(emit_inline_asm_t *emit, mp_uint_t label_num, qstr label_id) {
  117. assert(label_num < emit->max_num_labels);
  118. if (emit->pass == MP_PASS_CODE_SIZE) {
  119. // check for duplicate label on first pass
  120. for (uint i = 0; i < emit->max_num_labels; i++) {
  121. if (emit->label_lookup[i] == label_id) {
  122. return false;
  123. }
  124. }
  125. }
  126. emit->label_lookup[label_num] = label_id;
  127. mp_asm_base_label_assign(&emit->as.base, label_num);
  128. return true;
  129. }
  130. typedef struct _reg_name_t { byte reg;
  131. byte name[3];
  132. } reg_name_t;
  133. static const reg_name_t reg_name_table[] = {
  134. {0, "r0\0"},
  135. {1, "r1\0"},
  136. {2, "r2\0"},
  137. {3, "r3\0"},
  138. {4, "r4\0"},
  139. {5, "r5\0"},
  140. {6, "r6\0"},
  141. {7, "r7\0"},
  142. {8, "r8\0"},
  143. {9, "r9\0"},
  144. {10, "r10"},
  145. {11, "r11"},
  146. {12, "r12"},
  147. {13, "r13"},
  148. {14, "r14"},
  149. {15, "r15"},
  150. {10, "sl\0"},
  151. {11, "fp\0"},
  152. {13, "sp\0"},
  153. {14, "lr\0"},
  154. {15, "pc\0"},
  155. };
  156. #define MAX_SPECIAL_REGISTER_NAME_LENGTH 7
  157. typedef struct _special_reg_name_t { byte reg;
  158. char name[MAX_SPECIAL_REGISTER_NAME_LENGTH + 1];
  159. } special_reg_name_t;
  160. static const special_reg_name_t special_reg_name_table[] = {
  161. {5, "IPSR"},
  162. {17, "BASEPRI"},
  163. };
  164. // return empty string in case of error, so we can attempt to parse the string
  165. // without a special check if it was in fact a string
  166. static const char *get_arg_str(mp_parse_node_t pn) {
  167. if (MP_PARSE_NODE_IS_ID(pn)) {
  168. qstr qst = MP_PARSE_NODE_LEAF_ARG(pn);
  169. return qstr_str(qst);
  170. } else {
  171. return "";
  172. }
  173. }
  174. static mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, mp_uint_t max_reg) {
  175. const char *reg_str = get_arg_str(pn);
  176. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(reg_name_table); i++) {
  177. const reg_name_t *r = &reg_name_table[i];
  178. if (reg_str[0] == r->name[0]
  179. && reg_str[1] == r->name[1]
  180. && reg_str[2] == r->name[2]
  181. && (reg_str[2] == '\0' || reg_str[3] == '\0')) {
  182. if (r->reg > max_reg) {
  183. emit_inline_thumb_error_exc(emit,
  184. mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
  185. MP_ERROR_TEXT("'%s' expects at most r%d"), op, max_reg));
  186. return 0;
  187. } else {
  188. return r->reg;
  189. }
  190. }
  191. }
  192. emit_inline_thumb_error_exc(emit,
  193. mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
  194. MP_ERROR_TEXT("'%s' expects a register"), op));
  195. return 0;
  196. }
  197. static mp_uint_t get_arg_special_reg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
  198. const char *reg_str = get_arg_str(pn);
  199. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(special_reg_name_table); i++) {
  200. const special_reg_name_t *r = &special_reg_name_table[i];
  201. if (strcmp(r->name, reg_str) == 0) {
  202. return r->reg;
  203. }
  204. }
  205. emit_inline_thumb_error_exc(emit,
  206. mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
  207. MP_ERROR_TEXT("'%s' expects a special register"), op));
  208. return 0;
  209. }
  210. static mp_uint_t get_arg_vfpreg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
  211. const char *reg_str = get_arg_str(pn);
  212. if (reg_str[0] == 's' && reg_str[1] != '\0') {
  213. mp_uint_t regno = 0;
  214. for (++reg_str; *reg_str; ++reg_str) {
  215. mp_uint_t v = *reg_str;
  216. if (!('0' <= v && v <= '9')) {
  217. goto malformed;
  218. }
  219. regno = 10 * regno + v - '0';
  220. }
  221. if (regno > 31) {
  222. emit_inline_thumb_error_exc(emit,
  223. mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
  224. MP_ERROR_TEXT("'%s' expects at most r%d"), op, 31));
  225. return 0;
  226. } else {
  227. return regno;
  228. }
  229. }
  230. malformed:
  231. emit_inline_thumb_error_exc(emit,
  232. mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
  233. MP_ERROR_TEXT("'%s' expects an FPU register"), op));
  234. return 0;
  235. }
  236. static mp_uint_t get_arg_reglist(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
  237. // a register list looks like {r0, r1, r2} and is parsed as a Python set
  238. if (!MP_PARSE_NODE_IS_STRUCT_KIND(pn, PN_atom_brace)) {
  239. goto bad_arg;
  240. }
  241. mp_parse_node_struct_t *pns = (mp_parse_node_struct_t *)pn;
  242. assert(MP_PARSE_NODE_STRUCT_NUM_NODES(pns) == 1); // should always be
  243. pn = pns->nodes[0];
  244. mp_uint_t reglist = 0;
  245. if (MP_PARSE_NODE_IS_ID(pn)) {
  246. // set with one element
  247. reglist |= 1 << get_arg_reg(emit, op, pn, 15);
  248. } else if (MP_PARSE_NODE_IS_STRUCT(pn)) {
  249. pns = (mp_parse_node_struct_t *)pn;
  250. if (MP_PARSE_NODE_STRUCT_KIND(pns) == PN_dictorsetmaker) {
  251. assert(MP_PARSE_NODE_IS_STRUCT(pns->nodes[1])); // should succeed
  252. mp_parse_node_struct_t *pns1 = (mp_parse_node_struct_t *)pns->nodes[1];
  253. if (MP_PARSE_NODE_STRUCT_KIND(pns1) == PN_dictorsetmaker_list) {
  254. // set with multiple elements
  255. // get first element of set (we rely on get_arg_reg to catch syntax errors)
  256. reglist |= 1 << get_arg_reg(emit, op, pns->nodes[0], 15);
  257. // get tail elements (2nd, 3rd, ...)
  258. mp_parse_node_t *nodes;
  259. int n = mp_parse_node_extract_list(&pns1->nodes[0], PN_dictorsetmaker_list2, &nodes);
  260. // process rest of elements
  261. for (int i = 0; i < n; i++) {
  262. reglist |= 1 << get_arg_reg(emit, op, nodes[i], 15);
  263. }
  264. } else {
  265. goto bad_arg;
  266. }
  267. } else {
  268. goto bad_arg;
  269. }
  270. } else {
  271. goto bad_arg;
  272. }
  273. return reglist;
  274. bad_arg:
  275. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects {r0, r1, ...}"), op));
  276. return 0;
  277. }
  278. static uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, uint32_t fit_mask) {
  279. mp_obj_t o;
  280. if (!mp_parse_node_get_int_maybe(pn, &o)) {
  281. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects an integer"), op));
  282. return 0;
  283. }
  284. uint32_t i = mp_obj_get_int_truncated(o);
  285. if ((i & (~fit_mask)) != 0) {
  286. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' integer 0x%x doesn't fit in mask 0x%x"), op, i, fit_mask));
  287. return 0;
  288. }
  289. return i;
  290. }
  291. static bool get_arg_addr(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, mp_parse_node_t *pn_base, mp_parse_node_t *pn_offset) {
  292. if (!MP_PARSE_NODE_IS_STRUCT_KIND(pn, PN_atom_bracket)) {
  293. goto bad_arg;
  294. }
  295. mp_parse_node_struct_t *pns = (mp_parse_node_struct_t *)pn;
  296. if (!MP_PARSE_NODE_IS_STRUCT_KIND(pns->nodes[0], PN_testlist_comp)) {
  297. goto bad_arg;
  298. }
  299. pns = (mp_parse_node_struct_t *)pns->nodes[0];
  300. if (MP_PARSE_NODE_STRUCT_NUM_NODES(pns) != 2) {
  301. goto bad_arg;
  302. }
  303. *pn_base = pns->nodes[0];
  304. *pn_offset = pns->nodes[1];
  305. return true;
  306. bad_arg:
  307. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects an address of the form [a, b]"), op));
  308. return false;
  309. }
  310. static int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
  311. if (!MP_PARSE_NODE_IS_ID(pn)) {
  312. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects a label"), op));
  313. return 0;
  314. }
  315. qstr label_qstr = MP_PARSE_NODE_LEAF_ARG(pn);
  316. for (uint i = 0; i < emit->max_num_labels; i++) {
  317. if (emit->label_lookup[i] == label_qstr) {
  318. return i;
  319. }
  320. }
  321. // only need to have the labels on the last pass
  322. if (emit->pass == MP_PASS_EMIT) {
  323. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("label '%q' not defined"), label_qstr));
  324. }
  325. return 0;
  326. }
  327. typedef struct _cc_name_t { byte cc;
  328. byte name[2];
  329. } cc_name_t;
  330. static const cc_name_t cc_name_table[] = {
  331. { ASM_THUMB_CC_EQ, "eq" },
  332. { ASM_THUMB_CC_NE, "ne" },
  333. { ASM_THUMB_CC_CS, "cs" },
  334. { ASM_THUMB_CC_CC, "cc" },
  335. { ASM_THUMB_CC_MI, "mi" },
  336. { ASM_THUMB_CC_PL, "pl" },
  337. { ASM_THUMB_CC_VS, "vs" },
  338. { ASM_THUMB_CC_VC, "vc" },
  339. { ASM_THUMB_CC_HI, "hi" },
  340. { ASM_THUMB_CC_LS, "ls" },
  341. { ASM_THUMB_CC_GE, "ge" },
  342. { ASM_THUMB_CC_LT, "lt" },
  343. { ASM_THUMB_CC_GT, "gt" },
  344. { ASM_THUMB_CC_LE, "le" },
  345. };
  346. typedef struct _format_4_op_t { byte op;
  347. char name[3];
  348. } format_4_op_t;
  349. #define X(x) (((x) >> 4) & 0xff) // only need 1 byte to distinguish these ops
  350. static const format_4_op_t format_4_op_table[] = {
  351. { X(ASM_THUMB_FORMAT_4_EOR), "eor" },
  352. { X(ASM_THUMB_FORMAT_4_LSL), "lsl" },
  353. { X(ASM_THUMB_FORMAT_4_LSR), "lsr" },
  354. { X(ASM_THUMB_FORMAT_4_ASR), "asr" },
  355. { X(ASM_THUMB_FORMAT_4_ADC), "adc" },
  356. { X(ASM_THUMB_FORMAT_4_SBC), "sbc" },
  357. { X(ASM_THUMB_FORMAT_4_ROR), "ror" },
  358. { X(ASM_THUMB_FORMAT_4_TST), "tst" },
  359. { X(ASM_THUMB_FORMAT_4_NEG), "neg" },
  360. { X(ASM_THUMB_FORMAT_4_CMP), "cmp" },
  361. { X(ASM_THUMB_FORMAT_4_CMN), "cmn" },
  362. { X(ASM_THUMB_FORMAT_4_ORR), "orr" },
  363. { X(ASM_THUMB_FORMAT_4_MUL), "mul" },
  364. { X(ASM_THUMB_FORMAT_4_BIC), "bic" },
  365. { X(ASM_THUMB_FORMAT_4_MVN), "mvn" },
  366. };
  367. #undef X
  368. // name is actually a qstr, which should fit in 16 bits
  369. typedef struct _format_9_10_op_t { uint16_t op;
  370. uint16_t name;
  371. } format_9_10_op_t;
  372. #define X(x) (x)
  373. static const format_9_10_op_t format_9_10_op_table[] = {
  374. { X(ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_WORD_TRANSFER), MP_QSTR_ldr },
  375. { X(ASM_THUMB_FORMAT_9_LDR | ASM_THUMB_FORMAT_9_BYTE_TRANSFER), MP_QSTR_ldrb },
  376. { X(ASM_THUMB_FORMAT_10_LDRH), MP_QSTR_ldrh },
  377. { X(ASM_THUMB_FORMAT_9_STR | ASM_THUMB_FORMAT_9_WORD_TRANSFER), MP_QSTR_str },
  378. { X(ASM_THUMB_FORMAT_9_STR | ASM_THUMB_FORMAT_9_BYTE_TRANSFER), MP_QSTR_strb },
  379. { X(ASM_THUMB_FORMAT_10_STRH), MP_QSTR_strh },
  380. };
  381. #undef X
  382. // actual opcodes are: 0xee00 | op.hi_nibble, 0x0a00 | op.lo_nibble
  383. typedef struct _format_vfp_op_t {
  384. byte op;
  385. char name[3];
  386. } format_vfp_op_t;
  387. static const format_vfp_op_t format_vfp_op_table[] = {
  388. { 0x30, "add" },
  389. { 0x34, "sub" },
  390. { 0x20, "mul" },
  391. { 0x80, "div" },
  392. };
  393. // shorthand alias for whether we allow ARMv7-M instructions
  394. #define ARMV7M asm_thumb_allow_armv7m(&emit->as)
  395. static void emit_inline_thumb_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_args, mp_parse_node_t *pn_args) {
  396. // TODO perhaps make two tables:
  397. // one_args =
  398. // "b", LAB, asm_thumb_b_n,
  399. // "bgt", LAB, asm_thumb_bgt_n,
  400. // two_args =
  401. // "movs", RLO, I8, asm_thumb_movs_reg_i8
  402. // "movw", REG, REG, asm_thumb_movw_reg_i16
  403. // three_args =
  404. // "subs", RLO, RLO, I3, asm_thumb_subs_reg_reg_i3
  405. size_t op_len;
  406. const char *op_str = (const char *)qstr_data(op, &op_len);
  407. if (emit_inline_thumb_allow_float(emit) && op_str[0] == 'v') {
  408. // floating point operations
  409. if (n_args == 2) {
  410. mp_uint_t op_code = 0x0ac0, op_code_hi;
  411. if (op == MP_QSTR_vcmp) {
  412. op_code_hi = 0xeeb4;
  413. op_vfp_twoargs:;
  414. mp_uint_t vd = get_arg_vfpreg(emit, op_str, pn_args[0]);
  415. mp_uint_t vm = get_arg_vfpreg(emit, op_str, pn_args[1]);
  416. asm_thumb_op32(&emit->as,
  417. op_code_hi | ((vd & 1) << 6),
  418. op_code | ((vd & 0x1e) << 11) | ((vm & 1) << 5) | (vm & 0x1e) >> 1);
  419. } else if (op == MP_QSTR_vsqrt) {
  420. op_code_hi = 0xeeb1;
  421. goto op_vfp_twoargs;
  422. } else if (op == MP_QSTR_vneg) {
  423. op_code_hi = 0xeeb1;
  424. op_code = 0x0a40;
  425. goto op_vfp_twoargs;
  426. } else if (op == MP_QSTR_vcvt_f32_s32) {
  427. op_code_hi = 0xeeb8; // int to float
  428. goto op_vfp_twoargs;
  429. } else if (op == MP_QSTR_vcvt_s32_f32) {
  430. op_code_hi = 0xeebd; // float to int
  431. goto op_vfp_twoargs;
  432. } else if (op == MP_QSTR_vmrs) {
  433. mp_uint_t reg_dest;
  434. const char *reg_str0 = get_arg_str(pn_args[0]);
  435. if (strcmp(reg_str0, "APSR_nzcv") == 0) {
  436. reg_dest = 15;
  437. } else {
  438. reg_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
  439. }
  440. const char *reg_str1 = get_arg_str(pn_args[1]);
  441. if (strcmp(reg_str1, "FPSCR") == 0) {
  442. // FP status to ARM reg
  443. asm_thumb_op32(&emit->as, 0xeef1, 0x0a10 | (reg_dest << 12));
  444. } else {
  445. goto unknown_op;
  446. }
  447. } else if (op == MP_QSTR_vmov) {
  448. op_code_hi = 0xee00;
  449. mp_uint_t r_arm, vm;
  450. const char *reg_str = get_arg_str(pn_args[0]);
  451. if (reg_str[0] == 'r') {
  452. r_arm = get_arg_reg(emit, op_str, pn_args[0], 15);
  453. vm = get_arg_vfpreg(emit, op_str, pn_args[1]);
  454. op_code_hi |= 0x10;
  455. } else {
  456. vm = get_arg_vfpreg(emit, op_str, pn_args[0]);
  457. r_arm = get_arg_reg(emit, op_str, pn_args[1], 15);
  458. }
  459. asm_thumb_op32(&emit->as,
  460. op_code_hi | ((vm & 0x1e) >> 1),
  461. 0x0a10 | (r_arm << 12) | ((vm & 1) << 7));
  462. } else if (op == MP_QSTR_vldr) {
  463. op_code_hi = 0xed90;
  464. op_vldr_vstr:;
  465. mp_uint_t vd = get_arg_vfpreg(emit, op_str, pn_args[0]);
  466. mp_parse_node_t pn_base, pn_offset;
  467. if (get_arg_addr(emit, op_str, pn_args[1], &pn_base, &pn_offset)) {
  468. mp_uint_t rlo_base = get_arg_reg(emit, op_str, pn_base, 7);
  469. mp_uint_t i8;
  470. i8 = get_arg_i(emit, op_str, pn_offset, 0x3fc) >> 2;
  471. asm_thumb_op32(&emit->as,
  472. op_code_hi | rlo_base | ((vd & 1) << 6),
  473. 0x0a00 | ((vd & 0x1e) << 11) | i8);
  474. }
  475. } else if (op == MP_QSTR_vstr) {
  476. op_code_hi = 0xed80;
  477. goto op_vldr_vstr;
  478. } else {
  479. goto unknown_op;
  480. }
  481. } else if (n_args == 3) {
  482. // search table for arith ops
  483. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(format_vfp_op_table); i++) {
  484. if (strncmp(op_str + 1, format_vfp_op_table[i].name, 3) == 0 && op_str[4] == '\0') {
  485. mp_uint_t op_code_hi = 0xee00 | (format_vfp_op_table[i].op & 0xf0);
  486. mp_uint_t op_code = 0x0a00 | ((format_vfp_op_table[i].op & 0x0f) << 4);
  487. mp_uint_t vd = get_arg_vfpreg(emit, op_str, pn_args[0]);
  488. mp_uint_t vn = get_arg_vfpreg(emit, op_str, pn_args[1]);
  489. mp_uint_t vm = get_arg_vfpreg(emit, op_str, pn_args[2]);
  490. asm_thumb_op32(&emit->as,
  491. op_code_hi | ((vd & 1) << 6) | (vn >> 1),
  492. op_code | (vm >> 1) | ((vm & 1) << 5) | ((vd & 0x1e) << 11) | ((vn & 1) << 7));
  493. return;
  494. }
  495. }
  496. goto unknown_op;
  497. } else {
  498. goto unknown_op;
  499. }
  500. return;
  501. }
  502. if (n_args == 0) {
  503. if (op == MP_QSTR_nop) {
  504. asm_thumb_op16(&emit->as, ASM_THUMB_OP_NOP);
  505. } else if (op == MP_QSTR_wfi) {
  506. asm_thumb_op16(&emit->as, ASM_THUMB_OP_WFI);
  507. } else {
  508. goto unknown_op;
  509. }
  510. } else if (n_args == 1) {
  511. if (op == MP_QSTR_b) {
  512. int label_num = get_arg_label(emit, op_str, pn_args[0]);
  513. if (!asm_thumb_b_n_label(&emit->as, label_num)) {
  514. goto branch_not_in_range;
  515. }
  516. } else if (op == MP_QSTR_bl) {
  517. int label_num = get_arg_label(emit, op_str, pn_args[0]);
  518. if (!asm_thumb_bl_label(&emit->as, label_num)) {
  519. goto branch_not_in_range;
  520. }
  521. } else if (op == MP_QSTR_bx) {
  522. mp_uint_t r = get_arg_reg(emit, op_str, pn_args[0], 15);
  523. asm_thumb_op16(&emit->as, 0x4700 | (r << 3));
  524. } else if (op_str[0] == 'b' && (op_len == 3
  525. || (op_len == 5 && op_str[3] == '_'
  526. && (op_str[4] == 'n' || (ARMV7M && op_str[4] == 'w'))))) {
  527. mp_uint_t cc = -1;
  528. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(cc_name_table); i++) {
  529. if (op_str[1] == cc_name_table[i].name[0] && op_str[2] == cc_name_table[i].name[1]) {
  530. cc = cc_name_table[i].cc;
  531. }
  532. }
  533. if (cc == (mp_uint_t)-1) {
  534. goto unknown_op;
  535. }
  536. int label_num = get_arg_label(emit, op_str, pn_args[0]);
  537. bool wide = op_len == 5 && op_str[4] == 'w';
  538. if (wide && !ARMV7M) {
  539. goto unknown_op;
  540. }
  541. if (!asm_thumb_bcc_nw_label(&emit->as, cc, label_num, wide)) {
  542. goto branch_not_in_range;
  543. }
  544. } else if (ARMV7M && op_str[0] == 'i' && op_str[1] == 't') {
  545. const char *arg_str = get_arg_str(pn_args[0]);
  546. mp_uint_t cc = -1;
  547. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(cc_name_table); i++) {
  548. if (arg_str[0] == cc_name_table[i].name[0]
  549. && arg_str[1] == cc_name_table[i].name[1]
  550. && arg_str[2] == '\0') {
  551. cc = cc_name_table[i].cc;
  552. break;
  553. }
  554. }
  555. if (cc == (mp_uint_t)-1) {
  556. goto unknown_op;
  557. }
  558. const char *os = op_str + 2;
  559. while (*os != '\0') {
  560. os++;
  561. }
  562. if (os > op_str + 5) {
  563. goto unknown_op;
  564. }
  565. mp_uint_t it_mask = 8;
  566. while (--os >= op_str + 2) {
  567. it_mask >>= 1;
  568. if (*os == 't') {
  569. it_mask |= (cc & 1) << 3;
  570. } else if (*os == 'e') {
  571. it_mask |= ((~cc) & 1) << 3;
  572. } else {
  573. goto unknown_op;
  574. }
  575. }
  576. asm_thumb_it_cc(&emit->as, cc, it_mask);
  577. } else if (op == MP_QSTR_cpsid) {
  578. // TODO check pn_args[0] == i
  579. asm_thumb_op16(&emit->as, ASM_THUMB_OP_CPSID_I);
  580. } else if (op == MP_QSTR_cpsie) {
  581. // TODO check pn_args[0] == i
  582. asm_thumb_op16(&emit->as, ASM_THUMB_OP_CPSIE_I);
  583. } else if (op == MP_QSTR_push) {
  584. mp_uint_t reglist = get_arg_reglist(emit, op_str, pn_args[0]);
  585. if ((reglist & 0xbf00) == 0) {
  586. if ((reglist & (1 << 14)) == 0) {
  587. asm_thumb_op16(&emit->as, 0xb400 | reglist);
  588. } else {
  589. // 16-bit encoding for pushing low registers and LR
  590. asm_thumb_op16(&emit->as, 0xb500 | (reglist & 0xff));
  591. }
  592. } else {
  593. if (!ARMV7M) {
  594. goto unknown_op;
  595. }
  596. asm_thumb_op32(&emit->as, 0xe92d, reglist);
  597. }
  598. } else if (op == MP_QSTR_pop) {
  599. mp_uint_t reglist = get_arg_reglist(emit, op_str, pn_args[0]);
  600. if ((reglist & 0x7f00) == 0) {
  601. if ((reglist & (1 << 15)) == 0) {
  602. asm_thumb_op16(&emit->as, 0xbc00 | reglist);
  603. } else {
  604. // 16-bit encoding for popping low registers and PC, i.e., returning
  605. asm_thumb_op16(&emit->as, 0xbd00 | (reglist & 0xff));
  606. }
  607. } else {
  608. if (!ARMV7M) {
  609. goto unknown_op;
  610. }
  611. asm_thumb_op32(&emit->as, 0xe8bd, reglist);
  612. }
  613. } else {
  614. goto unknown_op;
  615. }
  616. } else if (n_args == 2) {
  617. if (MP_PARSE_NODE_IS_ID(pn_args[1])) {
  618. // second arg is a register (or should be)
  619. mp_uint_t op_code, op_code_hi;
  620. if (op == MP_QSTR_mov) {
  621. mp_uint_t reg_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
  622. mp_uint_t reg_src = get_arg_reg(emit, op_str, pn_args[1], 15);
  623. asm_thumb_mov_reg_reg(&emit->as, reg_dest, reg_src);
  624. } else if (ARMV7M && op == MP_QSTR_clz) {
  625. op_code_hi = 0xfab0;
  626. op_code = 0xf080;
  627. mp_uint_t rd, rm;
  628. op_clz_rbit:
  629. rd = get_arg_reg(emit, op_str, pn_args[0], 15);
  630. rm = get_arg_reg(emit, op_str, pn_args[1], 15);
  631. asm_thumb_op32(&emit->as, op_code_hi | rm, op_code | (rd << 8) | rm);
  632. } else if (ARMV7M && op == MP_QSTR_rbit) {
  633. op_code_hi = 0xfa90;
  634. op_code = 0xf0a0;
  635. goto op_clz_rbit;
  636. } else if (ARMV7M && op == MP_QSTR_mrs) {
  637. mp_uint_t reg_dest = get_arg_reg(emit, op_str, pn_args[0], 12);
  638. mp_uint_t reg_src = get_arg_special_reg(emit, op_str, pn_args[1]);
  639. asm_thumb_op32(&emit->as, 0xf3ef, 0x8000 | (reg_dest << 8) | reg_src);
  640. } else {
  641. if (op == MP_QSTR_and_) {
  642. op_code = ASM_THUMB_FORMAT_4_AND;
  643. mp_uint_t reg_dest, reg_src;
  644. op_format_4:
  645. reg_dest = get_arg_reg(emit, op_str, pn_args[0], 7);
  646. reg_src = get_arg_reg(emit, op_str, pn_args[1], 7);
  647. asm_thumb_format_4(&emit->as, op_code, reg_dest, reg_src);
  648. return;
  649. }
  650. // search table for ALU ops
  651. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(format_4_op_table); i++) {
  652. if (strncmp(op_str, format_4_op_table[i].name, 3) == 0 && op_str[3] == '\0') {
  653. op_code = 0x4000 | (format_4_op_table[i].op << 4);
  654. goto op_format_4;
  655. }
  656. }
  657. goto unknown_op;
  658. }
  659. } else {
  660. // second arg is not a register
  661. mp_uint_t op_code;
  662. if (op == MP_QSTR_mov) {
  663. op_code = ASM_THUMB_FORMAT_3_MOV;
  664. mp_uint_t rlo_dest, i8_src;
  665. op_format_3:
  666. rlo_dest = get_arg_reg(emit, op_str, pn_args[0], 7);
  667. i8_src = get_arg_i(emit, op_str, pn_args[1], 0xff);
  668. asm_thumb_format_3(&emit->as, op_code, rlo_dest, i8_src);
  669. } else if (op == MP_QSTR_cmp) {
  670. op_code = ASM_THUMB_FORMAT_3_CMP;
  671. goto op_format_3;
  672. } else if (op == MP_QSTR_add) {
  673. op_code = ASM_THUMB_FORMAT_3_ADD;
  674. goto op_format_3;
  675. } else if (op == MP_QSTR_sub) {
  676. op_code = ASM_THUMB_FORMAT_3_SUB;
  677. goto op_format_3;
  678. } else if (ARMV7M && op == MP_QSTR_movw) {
  679. op_code = ASM_THUMB_OP_MOVW;
  680. mp_uint_t reg_dest;
  681. op_movw_movt:
  682. reg_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
  683. int i_src = get_arg_i(emit, op_str, pn_args[1], 0xffff);
  684. asm_thumb_mov_reg_i16(&emit->as, op_code, reg_dest, i_src);
  685. } else if (ARMV7M && op == MP_QSTR_movt) {
  686. op_code = ASM_THUMB_OP_MOVT;
  687. goto op_movw_movt;
  688. } else if (ARMV7M && op == MP_QSTR_movwt) {
  689. // this is a convenience instruction
  690. mp_uint_t reg_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
  691. uint32_t i_src = get_arg_i(emit, op_str, pn_args[1], 0xffffffff);
  692. asm_thumb_mov_reg_i16(&emit->as, ASM_THUMB_OP_MOVW, reg_dest, i_src & 0xffff);
  693. asm_thumb_mov_reg_i16(&emit->as, ASM_THUMB_OP_MOVT, reg_dest, (i_src >> 16) & 0xffff);
  694. } else if (ARMV7M && op == MP_QSTR_ldrex) {
  695. mp_uint_t r_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
  696. mp_parse_node_t pn_base, pn_offset;
  697. if (get_arg_addr(emit, op_str, pn_args[1], &pn_base, &pn_offset)) {
  698. mp_uint_t r_base = get_arg_reg(emit, op_str, pn_base, 15);
  699. mp_uint_t i8 = get_arg_i(emit, op_str, pn_offset, 0xff) >> 2;
  700. asm_thumb_op32(&emit->as, 0xe850 | r_base, 0x0f00 | (r_dest << 12) | i8);
  701. }
  702. } else {
  703. // search table for ldr/str instructions
  704. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(format_9_10_op_table); i++) {
  705. if (op == format_9_10_op_table[i].name) {
  706. op_code = format_9_10_op_table[i].op;
  707. mp_parse_node_t pn_base, pn_offset;
  708. mp_uint_t rlo_dest = get_arg_reg(emit, op_str, pn_args[0], 7);
  709. if (get_arg_addr(emit, op_str, pn_args[1], &pn_base, &pn_offset)) {
  710. mp_uint_t rlo_base = get_arg_reg(emit, op_str, pn_base, 7);
  711. mp_uint_t i5;
  712. if (op_code & ASM_THUMB_FORMAT_9_BYTE_TRANSFER) {
  713. i5 = get_arg_i(emit, op_str, pn_offset, 0x1f);
  714. } else if (op_code & ASM_THUMB_FORMAT_10_STRH) { // also catches LDRH
  715. i5 = get_arg_i(emit, op_str, pn_offset, 0x3e) >> 1;
  716. } else {
  717. i5 = get_arg_i(emit, op_str, pn_offset, 0x7c) >> 2;
  718. }
  719. asm_thumb_format_9_10(&emit->as, op_code, rlo_dest, rlo_base, i5);
  720. return;
  721. }
  722. break;
  723. }
  724. }
  725. goto unknown_op;
  726. }
  727. }
  728. } else if (n_args == 3) {
  729. mp_uint_t op_code;
  730. if (op == MP_QSTR_lsl) {
  731. op_code = ASM_THUMB_FORMAT_1_LSL;
  732. mp_uint_t rlo_dest, rlo_src, i5;
  733. op_format_1:
  734. rlo_dest = get_arg_reg(emit, op_str, pn_args[0], 7);
  735. rlo_src = get_arg_reg(emit, op_str, pn_args[1], 7);
  736. i5 = get_arg_i(emit, op_str, pn_args[2], 0x1f);
  737. asm_thumb_format_1(&emit->as, op_code, rlo_dest, rlo_src, i5);
  738. } else if (op == MP_QSTR_lsr) {
  739. op_code = ASM_THUMB_FORMAT_1_LSR;
  740. goto op_format_1;
  741. } else if (op == MP_QSTR_asr) {
  742. op_code = ASM_THUMB_FORMAT_1_ASR;
  743. goto op_format_1;
  744. } else if (op == MP_QSTR_add) {
  745. op_code = ASM_THUMB_FORMAT_2_ADD;
  746. mp_uint_t rlo_dest, rlo_src;
  747. op_format_2:
  748. rlo_dest = get_arg_reg(emit, op_str, pn_args[0], 7);
  749. rlo_src = get_arg_reg(emit, op_str, pn_args[1], 7);
  750. int src_b;
  751. if (MP_PARSE_NODE_IS_ID(pn_args[2])) {
  752. op_code |= ASM_THUMB_FORMAT_2_REG_OPERAND;
  753. src_b = get_arg_reg(emit, op_str, pn_args[2], 7);
  754. } else {
  755. op_code |= ASM_THUMB_FORMAT_2_IMM_OPERAND;
  756. src_b = get_arg_i(emit, op_str, pn_args[2], 0x7);
  757. }
  758. asm_thumb_format_2(&emit->as, op_code, rlo_dest, rlo_src, src_b);
  759. } else if (ARMV7M && op == MP_QSTR_sdiv) {
  760. op_code = 0xfb90; // sdiv high part
  761. mp_uint_t rd, rn, rm;
  762. op_sdiv_udiv:
  763. rd = get_arg_reg(emit, op_str, pn_args[0], 15);
  764. rn = get_arg_reg(emit, op_str, pn_args[1], 15);
  765. rm = get_arg_reg(emit, op_str, pn_args[2], 15);
  766. asm_thumb_op32(&emit->as, op_code | rn, 0xf0f0 | (rd << 8) | rm);
  767. } else if (ARMV7M && op == MP_QSTR_udiv) {
  768. op_code = 0xfbb0; // udiv high part
  769. goto op_sdiv_udiv;
  770. } else if (op == MP_QSTR_sub) {
  771. op_code = ASM_THUMB_FORMAT_2_SUB;
  772. goto op_format_2;
  773. } else if (ARMV7M && op == MP_QSTR_strex) {
  774. mp_uint_t r_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
  775. mp_uint_t r_src = get_arg_reg(emit, op_str, pn_args[1], 15);
  776. mp_parse_node_t pn_base, pn_offset;
  777. if (get_arg_addr(emit, op_str, pn_args[2], &pn_base, &pn_offset)) {
  778. mp_uint_t r_base = get_arg_reg(emit, op_str, pn_base, 15);
  779. mp_uint_t i8 = get_arg_i(emit, op_str, pn_offset, 0xff) >> 2;
  780. asm_thumb_op32(&emit->as, 0xe840 | r_base, (r_src << 12) | (r_dest << 8) | i8);
  781. }
  782. } else {
  783. goto unknown_op;
  784. }
  785. } else {
  786. goto unknown_op;
  787. }
  788. return;
  789. unknown_op:
  790. emit_inline_thumb_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("unsupported Thumb instruction '%s' with %d arguments"), op_str, n_args));
  791. return;
  792. branch_not_in_range:
  793. emit_inline_thumb_error_msg(emit, MP_ERROR_TEXT("branch not in range"));
  794. return;
  795. }
  796. const emit_inline_asm_method_table_t emit_inline_thumb_method_table = {
  797. #if MICROPY_DYNAMIC_COMPILER
  798. emit_inline_thumb_new,
  799. emit_inline_thumb_free,
  800. #endif
  801. emit_inline_thumb_start_pass,
  802. emit_inline_thumb_end_pass,
  803. emit_inline_thumb_count_params,
  804. emit_inline_thumb_label,
  805. emit_inline_thumb_op,
  806. };
  807. #endif // MICROPY_EMIT_INLINE_THUMB