wizchip_conf.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842
  1. //****************************************************************************/
  2. //!
  3. //! \file wizchip_conf.c
  4. //! \brief WIZCHIP Config Header File.
  5. //! \version 1.0.1
  6. //! \date 2013/10/21
  7. //! \par Revision history
  8. //! <2015/02/05> Notice
  9. //! The version history is not updated after this point.
  10. //! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
  11. //! >> https://github.com/Wiznet/ioLibrary_Driver
  12. //! <2014/05/01> V1.0.1 Refer to M20140501
  13. //! 1. Explicit type casting in wizchip_bus_readdata() & wizchip_bus_writedata()
  14. // Issued by Mathias ClauBen.
  15. //! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
  16. //! For remove the warning when pointer type size is not 32bit.
  17. //! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
  18. //! <2013/10/21> 1st Release
  19. //! \author MidnightCow
  20. //! \copyright
  21. //!
  22. //! Copyright (c) 2013, WIZnet Co., LTD.
  23. //! All rights reserved.
  24. //!
  25. //! Redistribution and use in source and binary forms, with or without
  26. //! modification, are permitted provided that the following conditions
  27. //! are met:
  28. //!
  29. //! * Redistributions of source code must retain the above copyright
  30. //! notice, this list of conditions and the following disclaimer.
  31. //! * Redistributions in binary form must reproduce the above copyright
  32. //! notice, this list of conditions and the following disclaimer in the
  33. //! documentation and/or other materials provided with the distribution.
  34. //! * Neither the name of the <ORGANIZATION> nor the names of its
  35. //! contributors may be used to endorse or promote products derived
  36. //! from this software without specific prior written permission.
  37. //!
  38. //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  39. //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  40. //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  41. //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  42. //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  43. //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  44. //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  45. //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  46. //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  47. //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  48. //! THE POSSIBILITY OF SUCH DAMAGE.
  49. //
  50. //*****************************************************************************/
  51. //A20140501 : for use the type - ptrdiff_t
  52. #include <stddef.h>
  53. //
  54. #include "wizchip_conf.h"
  55. /////////////
  56. //M20150401 : Remove ; in the default callback function such as wizchip_cris_enter(), wizchip_cs_select() and etc.
  57. /////////////
  58. /**
  59. * @brief Default function to enable interrupt.
  60. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  61. * null function is called.
  62. */
  63. //void wizchip_cris_enter(void) {};
  64. void wizchip_cris_enter(void) {
  65. }
  66. /**
  67. * @brief Default function to disable interrupt.
  68. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  69. * null function is called.
  70. */
  71. //void wizchip_cris_exit(void) {};
  72. void wizchip_cris_exit(void) {
  73. }
  74. /**
  75. * @brief Default function to select chip.
  76. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  77. * null function is called.
  78. */
  79. //void wizchip_cs_select(void) {};
  80. void wizchip_cs_select(void) {
  81. }
  82. /**
  83. * @brief Default function to deselect chip.
  84. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  85. * null function is called.
  86. */
  87. //void wizchip_cs_deselect(void) {};
  88. void wizchip_cs_deselect(void) {
  89. }
  90. /**
  91. * @brief Default function to read in direct or indirect interface.
  92. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  93. * null function is called.
  94. */
  95. //M20150601 : Rename the function for integrating with W5300
  96. //uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }
  97. iodata_t wizchip_bus_readdata(uint32_t AddrSel) {
  98. return *((volatile iodata_t*)((ptrdiff_t)AddrSel));
  99. }
  100. /**
  101. * @brief Default function to write in direct or indirect interface.
  102. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  103. * null function is called.
  104. */
  105. //M20150601 : Rename the function for integrating with W5300
  106. //void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }
  107. void wizchip_bus_writedata(uint32_t AddrSel, iodata_t wb) {
  108. *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb;
  109. }
  110. /**
  111. * @brief Default function to read in SPI interface.
  112. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  113. * null function is called.
  114. */
  115. //uint8_t wizchip_spi_readbyte(void) {return 0;};
  116. // uint8_t wizchip_spi_readbyte(void) {
  117. // return 0;
  118. // }
  119. /**
  120. * @brief Default function to write in SPI interface.
  121. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  122. * null function is called.
  123. */
  124. //void wizchip_spi_writebyte(uint8_t wb) {};
  125. //void wizchip_spi_writebyte(uint8_t wb) {}
  126. /**
  127. * @brief Default function to burst read in SPI interface.
  128. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  129. * null function is called.
  130. */
  131. //void wizchip_spi_readburst(uint8_t* pBuf, uint16_t len) {};
  132. // void wizchip_spi_readburst(uint8_t* pBuf, uint16_t len) {
  133. // }
  134. /**
  135. * @brief Default function to burst write in SPI interface.
  136. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  137. * null function is called.
  138. */
  139. //void wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {};
  140. // void wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {
  141. // }
  142. /**
  143. * @\ref _WIZCHIP instance
  144. */
  145. //
  146. //M20150401 : For a compiler didnot support a member of structure
  147. // Replace the assignment of struct members with the assingment of array
  148. //
  149. /*
  150. _WIZCHIP WIZCHIP =
  151. {
  152. .id = _WIZCHIP_ID_,
  153. .if_mode = _WIZCHIP_IO_MODE_,
  154. .CRIS._enter = wizchip_cris_enter,
  155. .CRIS._exit = wizchip_cris_exit,
  156. .CS._select = wizchip_cs_select,
  157. .CS._deselect = wizchip_cs_deselect,
  158. .IF.BUS._read_byte = wizchip_bus_readbyte,
  159. .IF.BUS._write_byte = wizchip_bus_writebyte
  160. // .IF.SPI._read_byte = wizchip_spi_readbyte,
  161. // .IF.SPI._write_byte = wizchip_spi_writebyte
  162. };
  163. */
  164. _WIZCHIP WIZCHIP = {
  165. _WIZCHIP_IO_MODE_,
  166. _WIZCHIP_ID_,
  167. {wizchip_cris_enter, wizchip_cris_exit},
  168. {wizchip_cs_select, wizchip_cs_deselect},
  169. {
  170. {//M20150601 : Rename the function
  171. //wizchip_bus_readbyte,
  172. //wizchip_bus_writebyte
  173. wizchip_bus_readdata,
  174. wizchip_bus_writedata},
  175. }};
  176. static uint8_t _DNS_[4]; // DNS server ip address
  177. static dhcp_mode _DHCP_; // DHCP mode
  178. void reg_wizchip_cris_cbfunc(void (*cris_en)(void), void (*cris_ex)(void)) {
  179. if(!cris_en || !cris_ex) {
  180. WIZCHIP.CRIS._enter = wizchip_cris_enter;
  181. WIZCHIP.CRIS._exit = wizchip_cris_exit;
  182. } else {
  183. WIZCHIP.CRIS._enter = cris_en;
  184. WIZCHIP.CRIS._exit = cris_ex;
  185. }
  186. }
  187. void reg_wizchip_cs_cbfunc(void (*cs_sel)(void), void (*cs_desel)(void)) {
  188. if(!cs_sel || !cs_desel) {
  189. WIZCHIP.CS._select = wizchip_cs_select;
  190. WIZCHIP.CS._deselect = wizchip_cs_deselect;
  191. } else {
  192. WIZCHIP.CS._select = cs_sel;
  193. WIZCHIP.CS._deselect = cs_desel;
  194. }
  195. }
  196. //M20150515 : For integrating with W5300
  197. //void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
  198. void reg_wizchip_bus_cbfunc(
  199. iodata_t (*bus_rb)(uint32_t addr),
  200. void (*bus_wb)(uint32_t addr, iodata_t wb)) {
  201. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_))
  202. ;
  203. //M20150601 : Rename call back function for integrating with W5300
  204. /*
  205. if(!bus_rb || !bus_wb)
  206. {
  207. WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
  208. WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte;
  209. }
  210. else
  211. {
  212. WIZCHIP.IF.BUS._read_byte = bus_rb;
  213. WIZCHIP.IF.BUS._write_byte = bus_wb;
  214. }
  215. */
  216. if(!bus_rb || !bus_wb) {
  217. WIZCHIP.IF.BUS._read_data = wizchip_bus_readdata;
  218. WIZCHIP.IF.BUS._write_data = wizchip_bus_writedata;
  219. } else {
  220. WIZCHIP.IF.BUS._read_data = bus_rb;
  221. WIZCHIP.IF.BUS._write_data = bus_wb;
  222. }
  223. }
  224. void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb)) {
  225. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_))
  226. ;
  227. if(!spi_rb || !spi_wb) {
  228. // WIZCHIP.IF.SPI._read_byte = wizchip_spi_readbyte;
  229. // WIZCHIP.IF.SPI._write_byte = wizchip_spi_writebyte;
  230. } else {
  231. WIZCHIP.IF.SPI._read_byte = spi_rb;
  232. WIZCHIP.IF.SPI._write_byte = spi_wb;
  233. }
  234. }
  235. // 20140626 Eric Added for SPI burst operations
  236. void reg_wizchip_spiburst_cbfunc(
  237. void (*spi_rb)(uint8_t* pBuf, uint16_t len),
  238. void (*spi_wb)(uint8_t* pBuf, uint16_t len)) {
  239. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_))
  240. ;
  241. if(!spi_rb || !spi_wb) {
  242. // WIZCHIP.IF.SPI._read_burst = wizchip_spi_readburst;
  243. // WIZCHIP.IF.SPI._write_burst = wizchip_spi_writeburst;
  244. } else {
  245. WIZCHIP.IF.SPI._read_burst = spi_rb;
  246. WIZCHIP.IF.SPI._write_burst = spi_wb;
  247. }
  248. }
  249. int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg) {
  250. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
  251. uint8_t tmp = 0;
  252. #endif
  253. uint8_t* ptmp[2] = {0, 0};
  254. switch(cwtype) {
  255. case CW_RESET_WIZCHIP:
  256. wizchip_sw_reset();
  257. break;
  258. case CW_INIT_WIZCHIP:
  259. if(arg != 0) {
  260. ptmp[0] = (uint8_t*)arg;
  261. ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
  262. }
  263. return wizchip_init(ptmp[0], ptmp[1]);
  264. case CW_CLR_INTERRUPT:
  265. wizchip_clrinterrupt(*((intr_kind*)arg));
  266. break;
  267. case CW_GET_INTERRUPT:
  268. *((intr_kind*)arg) = wizchip_getinterrupt();
  269. break;
  270. case CW_SET_INTRMASK:
  271. wizchip_setinterruptmask(*((intr_kind*)arg));
  272. break;
  273. case CW_GET_INTRMASK:
  274. *((intr_kind*)arg) = wizchip_getinterruptmask();
  275. break;
  276. //M20150601 : This can be supported by W5200, W5500
  277. //#if _WIZCHIP_ > W5100
  278. #if(_WIZCHIP_ == W5200 || _WIZCHIP_ == W5500)
  279. case CW_SET_INTRTIME:
  280. setINTLEVEL(*(uint16_t*)arg);
  281. break;
  282. case CW_GET_INTRTIME:
  283. *(uint16_t*)arg = getINTLEVEL();
  284. break;
  285. #endif
  286. case CW_GET_ID:
  287. ((uint8_t*)arg)[0] = WIZCHIP.id[0];
  288. ((uint8_t*)arg)[1] = WIZCHIP.id[1];
  289. ((uint8_t*)arg)[2] = WIZCHIP.id[2];
  290. ((uint8_t*)arg)[3] = WIZCHIP.id[3];
  291. ((uint8_t*)arg)[4] = WIZCHIP.id[4];
  292. ((uint8_t*)arg)[5] = WIZCHIP.id[5];
  293. ((uint8_t*)arg)[6] = 0;
  294. break;
  295. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5500
  296. case CW_RESET_PHY:
  297. wizphy_reset();
  298. break;
  299. case CW_SET_PHYCONF:
  300. wizphy_setphyconf((wiz_PhyConf*)arg);
  301. break;
  302. case CW_GET_PHYCONF:
  303. wizphy_getphyconf((wiz_PhyConf*)arg);
  304. break;
  305. case CW_GET_PHYSTATUS:
  306. break;
  307. case CW_SET_PHYPOWMODE:
  308. return wizphy_setphypmode(*(uint8_t*)arg);
  309. #endif
  310. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
  311. case CW_GET_PHYPOWMODE:
  312. tmp = wizphy_getphypmode();
  313. if((int8_t)tmp == -1) return -1;
  314. *(uint8_t*)arg = tmp;
  315. break;
  316. case CW_GET_PHYLINK:
  317. tmp = wizphy_getphylink();
  318. if((int8_t)tmp == -1) return -1;
  319. *(uint8_t*)arg = tmp;
  320. break;
  321. #endif
  322. default:
  323. return -1;
  324. }
  325. return 0;
  326. }
  327. int8_t ctlnetwork(ctlnetwork_type cntype, void* arg) {
  328. switch(cntype) {
  329. case CN_SET_NETINFO:
  330. wizchip_setnetinfo((wiz_NetInfo*)arg);
  331. break;
  332. case CN_GET_NETINFO:
  333. wizchip_getnetinfo((wiz_NetInfo*)arg);
  334. break;
  335. case CN_SET_NETMODE:
  336. return wizchip_setnetmode(*(netmode_type*)arg);
  337. case CN_GET_NETMODE:
  338. *(netmode_type*)arg = wizchip_getnetmode();
  339. break;
  340. case CN_SET_TIMEOUT:
  341. wizchip_settimeout((wiz_NetTimeout*)arg);
  342. break;
  343. case CN_GET_TIMEOUT:
  344. wizchip_gettimeout((wiz_NetTimeout*)arg);
  345. break;
  346. default:
  347. return -1;
  348. }
  349. return 0;
  350. }
  351. void wizchip_sw_reset(void) {
  352. uint8_t gw[4], sn[4], sip[4];
  353. uint8_t mac[6];
  354. //A20150601
  355. #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
  356. uint16_t mr = (uint16_t)getMR();
  357. setMR(mr | MR_IND);
  358. #endif
  359. //
  360. getSHAR(mac);
  361. getGAR(gw);
  362. getSUBR(sn);
  363. getSIPR(sip);
  364. setMR(MR_RST);
  365. getMR(); // for delay
  366. //A2015051 : For indirect bus mode
  367. #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
  368. setMR(mr | MR_IND);
  369. #endif
  370. //
  371. setSHAR(mac);
  372. setGAR(gw);
  373. setSUBR(sn);
  374. setSIPR(sip);
  375. }
  376. int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize) {
  377. int8_t i;
  378. #if _WIZCHIP_ < W5200
  379. int8_t j;
  380. #endif
  381. int8_t tmp = 0;
  382. wizchip_sw_reset();
  383. if(txsize) {
  384. tmp = 0;
  385. //M20150601 : For integrating with W5300
  386. #if _WIZCHIP_ == W5300
  387. for(i = 0; i < _WIZCHIP_SOCK_NUM_; i++) {
  388. if(txsize[i] >= 64)
  389. return -1; //No use 64KB even if W5300 support max 64KB memory allocation
  390. tmp += txsize[i];
  391. if(tmp > 128) return -1;
  392. }
  393. if(tmp % 8) return -1;
  394. #else
  395. for(i = 0; i < _WIZCHIP_SOCK_NUM_; i++) {
  396. tmp += txsize[i];
  397. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100 and w5100s
  398. if(tmp > 8) return -1;
  399. #else
  400. if(tmp > 16) return -1;
  401. #endif
  402. }
  403. for(i = 0; i < _WIZCHIP_SOCK_NUM_; i++) {
  404. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100
  405. j = 0;
  406. while((txsize[i] >> j != 1) && (txsize[i] != 0)) {
  407. j++;
  408. }
  409. setSn_TXBUF_SIZE(i, j);
  410. #else
  411. setSn_TXBUF_SIZE(i, txsize[i]);
  412. #endif
  413. }
  414. #endif
  415. }
  416. if(rxsize) {
  417. tmp = 0;
  418. #if _WIZCHIP_ == W5300
  419. for(i = 0; i < _WIZCHIP_SOCK_NUM_; i++) {
  420. if(rxsize[i] >= 64)
  421. return -1; //No use 64KB even if W5300 support max 64KB memory allocation
  422. tmp += rxsize[i];
  423. if(tmp > 128) return -1;
  424. }
  425. if(tmp % 8) return -1;
  426. #else
  427. for(i = 0; i < _WIZCHIP_SOCK_NUM_; i++) {
  428. tmp += rxsize[i];
  429. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100 and w5100s
  430. if(tmp > 8) return -1;
  431. #else
  432. if(tmp > 16) return -1;
  433. #endif
  434. }
  435. for(i = 0; i < _WIZCHIP_SOCK_NUM_; i++) {
  436. #if _WIZCHIP_ < W5200 // add condition for w5100
  437. j = 0;
  438. while((rxsize[i] >> j != 1) && (txsize[i] != 0)) {
  439. j++;
  440. }
  441. setSn_RXBUF_SIZE(i, j);
  442. #else
  443. setSn_RXBUF_SIZE(i, rxsize[i]);
  444. #endif
  445. }
  446. #endif
  447. }
  448. return 0;
  449. }
  450. void wizchip_clrinterrupt(intr_kind intr) {
  451. uint8_t ir = (uint8_t)intr;
  452. uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
  453. #if _WIZCHIP_ < W5500
  454. ir |= (1 << 4); // IK_WOL
  455. #endif
  456. #if _WIZCHIP_ == W5200
  457. ir |= (1 << 6);
  458. #endif
  459. #if _WIZCHIP_ < W5200
  460. sir &= 0x0F;
  461. #endif
  462. #if _WIZCHIP_ <= W5100S
  463. ir |= sir;
  464. setIR(ir);
  465. //A20150601 : For integrating with W5300
  466. #elif _WIZCHIP_ == W5300
  467. setIR(((((uint16_t)ir) << 8) | (((uint16_t)sir) & 0x00FF)));
  468. #else
  469. setIR(ir);
  470. //M20200227 : For clear
  471. //setSIR(sir);
  472. for(ir = 0; ir < 8; ir++) {
  473. if(sir & (0x01 << ir)) setSn_IR(ir, 0xff);
  474. }
  475. #endif
  476. }
  477. intr_kind wizchip_getinterrupt(void) {
  478. uint8_t ir = 0;
  479. uint8_t sir = 0;
  480. uint16_t ret = 0;
  481. #if _WIZCHIP_ <= W5100S
  482. ir = getIR();
  483. sir = ir & 0x0F;
  484. //A20150601 : For integrating with W5300
  485. #elif _WIZCHIP_ == W5300
  486. ret = getIR();
  487. ir = (uint8_t)(ret >> 8);
  488. sir = (uint8_t)ret;
  489. #else
  490. ir = getIR();
  491. sir = getSIR();
  492. #endif
  493. //M20150601 : For Integrating with W5300
  494. //#if _WIZCHIP_ < W5500
  495. #if _WIZCHIP_ < W5200
  496. ir &= ~(1 << 4); // IK_WOL
  497. #endif
  498. #if _WIZCHIP_ == W5200
  499. ir &= ~(1 << 6);
  500. #endif
  501. ret = sir;
  502. ret = (ret << 8) + ir;
  503. return (intr_kind)ret;
  504. }
  505. void wizchip_setinterruptmask(intr_kind intr) {
  506. uint8_t imr = (uint8_t)intr;
  507. uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
  508. #if _WIZCHIP_ < W5500
  509. imr &= ~(1 << 4); // IK_WOL
  510. #endif
  511. #if _WIZCHIP_ == W5200
  512. imr &= ~(1 << 6);
  513. #endif
  514. #if _WIZCHIP_ < W5200
  515. simr &= 0x0F;
  516. imr |= simr;
  517. setIMR(imr);
  518. //A20150601 : For integrating with W5300
  519. #elif _WIZCHIP_ == W5300
  520. setIMR(((((uint16_t)imr) << 8) | (((uint16_t)simr) & 0x00FF)));
  521. #else
  522. setIMR(imr);
  523. setSIMR(simr);
  524. #endif
  525. }
  526. intr_kind wizchip_getinterruptmask(void) {
  527. uint8_t imr = 0;
  528. uint8_t simr = 0;
  529. uint16_t ret = 0;
  530. #if _WIZCHIP_ < W5200
  531. imr = getIMR();
  532. simr = imr & 0x0F;
  533. //A20150601 : For integrating with W5300
  534. #elif _WIZCHIP_ == W5300
  535. ret = getIMR();
  536. imr = (uint8_t)(ret >> 8);
  537. simr = (uint8_t)ret;
  538. #else
  539. imr = getIMR();
  540. simr = getSIMR();
  541. #endif
  542. #if _WIZCHIP_ < W5500
  543. imr &= ~(1 << 4); // IK_WOL
  544. #endif
  545. #if _WIZCHIP_ == W5200
  546. imr &= ~(1 << 6); // IK_DEST_UNREACH
  547. #endif
  548. ret = simr;
  549. ret = (ret << 8) + imr;
  550. return (intr_kind)ret;
  551. }
  552. int8_t wizphy_getphylink(void) {
  553. int8_t tmp = PHY_LINK_OFF;
  554. #if _WIZCHIP_ == W5100S
  555. if(getPHYSR() & PHYSR_LNK) tmp = PHY_LINK_ON;
  556. #elif _WIZCHIP_ == W5200
  557. if(getPHYSTATUS() & PHYSTATUS_LINK) tmp = PHY_LINK_ON;
  558. #elif _WIZCHIP_ == W5500
  559. if(getPHYCFGR() & PHYCFGR_LNK_ON) tmp = PHY_LINK_ON;
  560. #else
  561. tmp = -1;
  562. #endif
  563. return tmp;
  564. }
  565. #if _WIZCHIP_ > W5100
  566. int8_t wizphy_getphypmode(void) {
  567. int8_t tmp = 0;
  568. #if _WIZCHIP_ == W5200
  569. if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
  570. tmp = PHY_POWER_DOWN;
  571. else
  572. tmp = PHY_POWER_NORM;
  573. #elif _WIZCHIP_ == 5500
  574. if((getPHYCFGR() & PHYCFGR_OPMDC_ALLA) == PHYCFGR_OPMDC_PDOWN)
  575. tmp = PHY_POWER_DOWN;
  576. else
  577. tmp = PHY_POWER_NORM;
  578. #else
  579. tmp = -1;
  580. #endif
  581. return tmp;
  582. }
  583. #endif
  584. #if _WIZCHIP_ == W5100S
  585. void wizphy_reset(void) {
  586. uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
  587. tmp |= BMCR_RESET;
  588. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  589. while(wiz_mdio_read(PHYMDIO_BMCR) & BMCR_RESET) {
  590. }
  591. }
  592. void wizphy_setphyconf(wiz_PhyConf* phyconf) {
  593. uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
  594. if(phyconf->mode == PHY_MODE_AUTONEGO)
  595. tmp |= BMCR_AUTONEGO;
  596. else {
  597. tmp &= ~BMCR_AUTONEGO;
  598. if(phyconf->duplex == PHY_DUPLEX_FULL) {
  599. tmp |= BMCR_DUP;
  600. } else {
  601. tmp &= ~BMCR_DUP;
  602. }
  603. if(phyconf->speed == PHY_SPEED_100) {
  604. tmp |= BMCR_SPEED;
  605. } else {
  606. tmp &= ~BMCR_SPEED;
  607. }
  608. }
  609. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  610. }
  611. void wizphy_getphyconf(wiz_PhyConf* phyconf) {
  612. uint16_t tmp = 0;
  613. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  614. phyconf->by = PHY_CONFBY_SW;
  615. if(tmp & BMCR_AUTONEGO) {
  616. phyconf->mode = PHY_MODE_AUTONEGO;
  617. } else {
  618. phyconf->mode = PHY_MODE_MANUAL;
  619. if(tmp & BMCR_DUP)
  620. phyconf->duplex = PHY_DUPLEX_FULL;
  621. else
  622. phyconf->duplex = PHY_DUPLEX_HALF;
  623. if(tmp & BMCR_SPEED)
  624. phyconf->speed = PHY_SPEED_100;
  625. else
  626. phyconf->speed = PHY_SPEED_10;
  627. }
  628. }
  629. int8_t wizphy_setphypmode(uint8_t pmode) {
  630. uint16_t tmp = 0;
  631. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  632. if(pmode == PHY_POWER_DOWN) {
  633. tmp |= BMCR_PWDN;
  634. } else {
  635. tmp &= ~BMCR_PWDN;
  636. }
  637. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  638. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  639. if(pmode == PHY_POWER_DOWN) {
  640. if(tmp & BMCR_PWDN) return 0;
  641. } else {
  642. if((tmp & BMCR_PWDN) != BMCR_PWDN) return 0;
  643. }
  644. return -1;
  645. }
  646. #endif
  647. #if _WIZCHIP_ == W5500
  648. void wizphy_reset(void) {
  649. uint8_t tmp = getPHYCFGR();
  650. tmp &= PHYCFGR_RST;
  651. setPHYCFGR(tmp);
  652. tmp = getPHYCFGR();
  653. tmp |= ~PHYCFGR_RST;
  654. setPHYCFGR(tmp);
  655. }
  656. void wizphy_setphyconf(wiz_PhyConf* phyconf) {
  657. uint8_t tmp = 0;
  658. if(phyconf->by == PHY_CONFBY_SW)
  659. tmp |= PHYCFGR_OPMD;
  660. else
  661. tmp &= ~PHYCFGR_OPMD;
  662. if(phyconf->mode == PHY_MODE_AUTONEGO)
  663. tmp |= PHYCFGR_OPMDC_ALLA;
  664. else {
  665. if(phyconf->duplex == PHY_DUPLEX_FULL) {
  666. if(phyconf->speed == PHY_SPEED_100)
  667. tmp |= PHYCFGR_OPMDC_100F;
  668. else
  669. tmp |= PHYCFGR_OPMDC_10F;
  670. } else {
  671. if(phyconf->speed == PHY_SPEED_100)
  672. tmp |= PHYCFGR_OPMDC_100H;
  673. else
  674. tmp |= PHYCFGR_OPMDC_10H;
  675. }
  676. }
  677. setPHYCFGR(tmp);
  678. wizphy_reset();
  679. }
  680. void wizphy_getphyconf(wiz_PhyConf* phyconf) {
  681. uint8_t tmp = 0;
  682. tmp = getPHYCFGR();
  683. phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
  684. switch(tmp & PHYCFGR_OPMDC_ALLA) {
  685. case PHYCFGR_OPMDC_ALLA:
  686. case PHYCFGR_OPMDC_100FA:
  687. phyconf->mode = PHY_MODE_AUTONEGO;
  688. break;
  689. default:
  690. phyconf->mode = PHY_MODE_MANUAL;
  691. break;
  692. }
  693. switch(tmp & PHYCFGR_OPMDC_ALLA) {
  694. case PHYCFGR_OPMDC_100FA:
  695. case PHYCFGR_OPMDC_100F:
  696. case PHYCFGR_OPMDC_100H:
  697. phyconf->speed = PHY_SPEED_100;
  698. break;
  699. default:
  700. phyconf->speed = PHY_SPEED_10;
  701. break;
  702. }
  703. switch(tmp & PHYCFGR_OPMDC_ALLA) {
  704. case PHYCFGR_OPMDC_100FA:
  705. case PHYCFGR_OPMDC_100F:
  706. case PHYCFGR_OPMDC_10F:
  707. phyconf->duplex = PHY_DUPLEX_FULL;
  708. break;
  709. default:
  710. phyconf->duplex = PHY_DUPLEX_HALF;
  711. break;
  712. }
  713. }
  714. void wizphy_getphystat(wiz_PhyConf* phyconf) {
  715. uint8_t tmp = getPHYCFGR();
  716. phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
  717. phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
  718. }
  719. int8_t wizphy_setphypmode(uint8_t pmode) {
  720. uint8_t tmp = 0;
  721. tmp = getPHYCFGR();
  722. if((tmp & PHYCFGR_OPMD) == 0) return -1;
  723. tmp &= ~PHYCFGR_OPMDC_ALLA;
  724. if(pmode == PHY_POWER_DOWN)
  725. tmp |= PHYCFGR_OPMDC_PDOWN;
  726. else
  727. tmp |= PHYCFGR_OPMDC_ALLA;
  728. setPHYCFGR(tmp);
  729. wizphy_reset();
  730. tmp = getPHYCFGR();
  731. if(pmode == PHY_POWER_DOWN) {
  732. if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
  733. } else {
  734. if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
  735. }
  736. return -1;
  737. }
  738. #endif
  739. void wizchip_setnetinfo(wiz_NetInfo* pnetinfo) {
  740. setSHAR(pnetinfo->mac);
  741. setGAR(pnetinfo->gw);
  742. setSUBR(pnetinfo->sn);
  743. setSIPR(pnetinfo->ip);
  744. _DNS_[0] = pnetinfo->dns[0];
  745. _DNS_[1] = pnetinfo->dns[1];
  746. _DNS_[2] = pnetinfo->dns[2];
  747. _DNS_[3] = pnetinfo->dns[3];
  748. _DHCP_ = pnetinfo->dhcp;
  749. }
  750. void wizchip_getnetinfo(wiz_NetInfo* pnetinfo) {
  751. getSHAR(pnetinfo->mac);
  752. getGAR(pnetinfo->gw);
  753. getSUBR(pnetinfo->sn);
  754. getSIPR(pnetinfo->ip);
  755. pnetinfo->dns[0] = _DNS_[0];
  756. pnetinfo->dns[1] = _DNS_[1];
  757. pnetinfo->dns[2] = _DNS_[2];
  758. pnetinfo->dns[3] = _DNS_[3];
  759. pnetinfo->dhcp = _DHCP_;
  760. }
  761. int8_t wizchip_setnetmode(netmode_type netmode) {
  762. uint8_t tmp = 0;
  763. #if _WIZCHIP_ != W5500
  764. if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
  765. #else
  766. if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
  767. #endif
  768. tmp = getMR();
  769. tmp |= (uint8_t)netmode;
  770. setMR(tmp);
  771. return 0;
  772. }
  773. netmode_type wizchip_getnetmode(void) {
  774. return (netmode_type)getMR();
  775. }
  776. void wizchip_settimeout(wiz_NetTimeout* nettime) {
  777. setRCR(nettime->retry_cnt);
  778. setRTR(nettime->time_100us);
  779. }
  780. void wizchip_gettimeout(wiz_NetTimeout* nettime) {
  781. nettime->retry_cnt = getRCR();
  782. nettime->time_100us = getRTR();
  783. }