furi_hal_nfc.c 27 KB

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  1. #include <limits.h>
  2. #include "./furi_hal_nfc.h"
  3. #include "ST25RFAL002/source/st25r3916/st25r3916.h"
  4. #include "ST25RFAL002/source/st25r3916/st25r3916_irq.h"
  5. #include "ST25RFAL002/include/rfal_rf.h"
  6. #include <furi.h>
  7. #include "digital_signal/digital_signal.h"
  8. #include <furi_hal_spi.h>
  9. #include <furi_hal_gpio.h>
  10. #include <furi_hal_cortex.h>
  11. #include <furi_hal_resources.h>
  12. #define TAG "FurryHalNfc"
  13. static const uint32_t clocks_in_ms = 64 * 1000;
  14. FuriEventFlag* event = NULL;
  15. #define EVENT_FLAG_INTERRUPT (1UL << 0)
  16. #define EVENT_FLAG_STATE_CHANGED (1UL << 1)
  17. #define EVENT_FLAG_STOP (1UL << 2)
  18. #define EVENT_FLAG_ALL (EVENT_FLAG_INTERRUPT | EVENT_FLAG_STATE_CHANGED | EVENT_FLAG_STOP)
  19. #define FURRY_HAL_NFC_UID_INCOMPLETE (0x04)
  20. void furry_hal_nfc_init() {
  21. furi_assert(!event);
  22. event = furi_event_flag_alloc();
  23. ReturnCode ret = rfalNfcInitialize();
  24. if(ret == ERR_NONE) {
  25. furry_hal_nfc_start_sleep();
  26. FURI_LOG_I(TAG, "Init OK");
  27. } else {
  28. FURI_LOG_W(TAG, "Init Failed, RFAL returned: %d", ret);
  29. }
  30. }
  31. void furry_hal_nfc_deinit() {
  32. ReturnCode ret = rfalDeinitialize();
  33. if(ret == ERR_NONE) {
  34. FURI_LOG_I(TAG, "Deinit OK");
  35. } else {
  36. FURI_LOG_W(TAG, "Deinit Failed, RFAL returned: %d", ret);
  37. }
  38. if(event) {
  39. furi_event_flag_free(event);
  40. event = NULL;
  41. }
  42. }
  43. bool furry_hal_nfc_is_busy() {
  44. return rfalNfcGetState() != RFAL_NFC_STATE_IDLE;
  45. }
  46. bool furry_hal_nfc_is_init() {
  47. return rfalNfcGetState() != RFAL_NFC_STATE_NOTINIT;
  48. }
  49. void furry_hal_nfc_field_on() {
  50. furry_hal_nfc_exit_sleep();
  51. st25r3916TxRxOn();
  52. }
  53. void furry_hal_nfc_field_off() {
  54. st25r3916TxRxOff();
  55. furry_hal_nfc_start_sleep();
  56. }
  57. void furry_hal_nfc_start_sleep() {
  58. rfalLowPowerModeStart();
  59. }
  60. void furry_hal_nfc_exit_sleep() {
  61. rfalLowPowerModeStop();
  62. }
  63. bool furry_hal_nfc_detect(FurryHalNfcDevData* nfc_data, uint32_t timeout) {
  64. furi_assert(nfc_data);
  65. rfalNfcDevice* dev_list = NULL;
  66. uint8_t dev_cnt = 0;
  67. bool detected = false;
  68. rfalLowPowerModeStop();
  69. rfalNfcState state = rfalNfcGetState();
  70. rfalNfcState state_old = 0;
  71. if(state == RFAL_NFC_STATE_NOTINIT) {
  72. rfalNfcInitialize();
  73. }
  74. rfalNfcDiscoverParam params;
  75. params.compMode = RFAL_COMPLIANCE_MODE_EMV;
  76. params.techs2Find = RFAL_NFC_POLL_TECH_A | RFAL_NFC_POLL_TECH_B | RFAL_NFC_POLL_TECH_F |
  77. RFAL_NFC_POLL_TECH_V | RFAL_NFC_POLL_TECH_AP2P | RFAL_NFC_POLL_TECH_ST25TB;
  78. params.totalDuration = 1000;
  79. params.devLimit = 3;
  80. params.wakeupEnabled = false;
  81. params.wakeupConfigDefault = true;
  82. params.nfcfBR = RFAL_BR_212;
  83. params.ap2pBR = RFAL_BR_424;
  84. params.maxBR = RFAL_BR_KEEP;
  85. params.GBLen = RFAL_NFCDEP_GB_MAX_LEN;
  86. params.notifyCb = NULL;
  87. uint32_t start = DWT->CYCCNT;
  88. rfalNfcDiscover(&params);
  89. while(true) {
  90. rfalNfcWorker();
  91. state = rfalNfcGetState();
  92. if(state != state_old) {
  93. FURI_LOG_T(TAG, "State change %d -> %d", state_old, state);
  94. }
  95. state_old = state;
  96. if(state == RFAL_NFC_STATE_ACTIVATED) {
  97. detected = true;
  98. break;
  99. }
  100. if(state == RFAL_NFC_STATE_POLL_ACTIVATION) {
  101. start = DWT->CYCCNT;
  102. continue;
  103. }
  104. if(state == RFAL_NFC_STATE_POLL_SELECT) {
  105. rfalNfcSelect(0);
  106. }
  107. if(DWT->CYCCNT - start > timeout * clocks_in_ms) {
  108. rfalNfcDeactivate(true);
  109. FURI_LOG_T(TAG, "Timeout");
  110. break;
  111. }
  112. furi_delay_tick(1);
  113. }
  114. rfalNfcGetDevicesFound(&dev_list, &dev_cnt);
  115. if(detected) {
  116. if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCA) {
  117. nfc_data->type = FurryHalNfcTypeA;
  118. nfc_data->atqa[0] = dev_list[0].dev.nfca.sensRes.anticollisionInfo;
  119. nfc_data->atqa[1] = dev_list[0].dev.nfca.sensRes.platformInfo;
  120. nfc_data->sak = dev_list[0].dev.nfca.selRes.sak;
  121. uint8_t* cuid_start = dev_list[0].nfcid;
  122. if(dev_list[0].nfcidLen == 7) {
  123. cuid_start = &dev_list[0].nfcid[3];
  124. }
  125. nfc_data->cuid = (cuid_start[0] << 24) | (cuid_start[1] << 16) | (cuid_start[2] << 8) |
  126. (cuid_start[3]);
  127. } else if(
  128. dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCB ||
  129. dev_list[0].type == RFAL_NFC_LISTEN_TYPE_ST25TB) {
  130. nfc_data->type = FurryHalNfcTypeB;
  131. } else if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCF) {
  132. nfc_data->type = FurryHalNfcTypeF;
  133. } else if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCV) {
  134. nfc_data->type = FurryHalNfcTypeV;
  135. }
  136. if(dev_list[0].rfInterface == RFAL_NFC_INTERFACE_RF) {
  137. nfc_data->interface = FurryHalNfcInterfaceRf;
  138. } else if(dev_list[0].rfInterface == RFAL_NFC_INTERFACE_ISODEP) {
  139. nfc_data->interface = FurryHalNfcInterfaceIsoDep;
  140. } else if(dev_list[0].rfInterface == RFAL_NFC_INTERFACE_NFCDEP) {
  141. nfc_data->interface = FurryHalNfcInterfaceNfcDep;
  142. }
  143. nfc_data->uid_len = dev_list[0].nfcidLen;
  144. memcpy(nfc_data->uid, dev_list[0].nfcid, nfc_data->uid_len);
  145. }
  146. return detected;
  147. }
  148. bool furry_hal_nfc_activate_nfca(uint32_t timeout, uint32_t* cuid) {
  149. rfalNfcDevice* dev_list;
  150. uint8_t dev_cnt = 0;
  151. rfalLowPowerModeStop();
  152. rfalNfcState state = rfalNfcGetState();
  153. if(state == RFAL_NFC_STATE_NOTINIT) {
  154. rfalNfcInitialize();
  155. }
  156. rfalNfcDiscoverParam params = {
  157. .compMode = RFAL_COMPLIANCE_MODE_NFC,
  158. .techs2Find = RFAL_NFC_POLL_TECH_A,
  159. .totalDuration = 1000,
  160. .devLimit = 3,
  161. .wakeupEnabled = false,
  162. .wakeupConfigDefault = true,
  163. .nfcfBR = RFAL_BR_212,
  164. .ap2pBR = RFAL_BR_424,
  165. .maxBR = RFAL_BR_KEEP,
  166. .GBLen = RFAL_NFCDEP_GB_MAX_LEN,
  167. .notifyCb = NULL,
  168. };
  169. uint32_t start = DWT->CYCCNT;
  170. rfalNfcDiscover(&params);
  171. while(state != RFAL_NFC_STATE_ACTIVATED) {
  172. rfalNfcWorker();
  173. state = rfalNfcGetState();
  174. FURI_LOG_T(TAG, "Current state %d", state);
  175. if(state == RFAL_NFC_STATE_POLL_ACTIVATION) {
  176. start = DWT->CYCCNT;
  177. continue;
  178. }
  179. if(state == RFAL_NFC_STATE_POLL_SELECT) {
  180. rfalNfcSelect(0);
  181. }
  182. if(DWT->CYCCNT - start > timeout * clocks_in_ms) {
  183. rfalNfcDeactivate(true);
  184. FURI_LOG_T(TAG, "Timeout");
  185. return false;
  186. }
  187. furi_thread_yield();
  188. }
  189. rfalNfcGetDevicesFound(&dev_list, &dev_cnt);
  190. // Take first device and set cuid
  191. if(cuid) {
  192. uint8_t* cuid_start = dev_list[0].nfcid;
  193. if(dev_list[0].nfcidLen == 7) {
  194. cuid_start = &dev_list[0].nfcid[3];
  195. }
  196. *cuid = (cuid_start[0] << 24) | (cuid_start[1] << 16) | (cuid_start[2] << 8) |
  197. (cuid_start[3]);
  198. FURI_LOG_T(TAG, "Activated tag with cuid: %lX", *cuid);
  199. }
  200. return true;
  201. }
  202. bool furry_hal_nfc_listen(
  203. uint8_t* uid,
  204. uint8_t uid_len,
  205. uint8_t* atqa,
  206. uint8_t sak,
  207. bool activate_after_sak,
  208. uint32_t timeout) {
  209. rfalNfcState state = rfalNfcGetState();
  210. if(state == RFAL_NFC_STATE_NOTINIT) {
  211. rfalNfcInitialize();
  212. } else if(state >= RFAL_NFC_STATE_ACTIVATED) {
  213. rfalNfcDeactivate(false);
  214. }
  215. rfalLowPowerModeStop();
  216. rfalNfcDiscoverParam params = {
  217. .techs2Find = RFAL_NFC_LISTEN_TECH_A,
  218. .totalDuration = 1000,
  219. .devLimit = 1,
  220. .wakeupEnabled = false,
  221. .wakeupConfigDefault = true,
  222. .nfcfBR = RFAL_BR_212,
  223. .ap2pBR = RFAL_BR_424,
  224. .maxBR = RFAL_BR_KEEP,
  225. .GBLen = RFAL_NFCDEP_GB_MAX_LEN,
  226. .notifyCb = NULL,
  227. .activate_after_sak = activate_after_sak,
  228. };
  229. if(FURI_BIT(sak, 5)) {
  230. params.compMode = RFAL_COMPLIANCE_MODE_EMV;
  231. } else {
  232. params.compMode = RFAL_COMPLIANCE_MODE_NFC;
  233. }
  234. params.lmConfigPA.nfcidLen = uid_len;
  235. memcpy(params.lmConfigPA.nfcid, uid, uid_len);
  236. params.lmConfigPA.SENS_RES[0] = atqa[0];
  237. params.lmConfigPA.SENS_RES[1] = atqa[1];
  238. params.lmConfigPA.SEL_RES = sak;
  239. rfalNfcDiscover(&params);
  240. // Disable EMD suppression.
  241. st25r3916ModifyRegister(ST25R3916_REG_EMD_SUP_CONF, ST25R3916_REG_EMD_SUP_CONF_emd_emv, 0);
  242. uint32_t start = DWT->CYCCNT;
  243. while(state != RFAL_NFC_STATE_ACTIVATED) {
  244. rfalNfcWorker();
  245. state = rfalNfcGetState();
  246. if(DWT->CYCCNT - start > timeout * clocks_in_ms) {
  247. rfalNfcDeactivate(true);
  248. return false;
  249. }
  250. furi_delay_tick(1);
  251. }
  252. return true;
  253. }
  254. static void furry_hal_nfc_read_fifo(uint8_t* data, uint16_t* bits) {
  255. uint8_t fifo_status[2];
  256. uint8_t rx_buff[64];
  257. st25r3916ReadMultipleRegisters(
  258. ST25R3916_REG_FIFO_STATUS1, fifo_status, ST25R3916_FIFO_STATUS_LEN);
  259. uint16_t rx_bytes =
  260. ((((uint16_t)fifo_status[1] & ST25R3916_REG_FIFO_STATUS2_fifo_b_mask) >>
  261. ST25R3916_REG_FIFO_STATUS2_fifo_b_shift)
  262. << 8);
  263. rx_bytes |= (((uint16_t)fifo_status[0]) & 0x00FFU);
  264. st25r3916ReadFifo(rx_buff, rx_bytes);
  265. memcpy(data, rx_buff, rx_bytes);
  266. *bits = rx_bytes * 8;
  267. }
  268. void furry_hal_nfc_listen_sleep() {
  269. st25r3916ExecuteCommand(ST25R3916_CMD_GOTO_SLEEP);
  270. }
  271. void furry_hal_nfc_stop_cmd() {
  272. st25r3916ExecuteCommand(ST25R3916_CMD_STOP);
  273. }
  274. bool furry_hal_nfc_listen_rx(FurryHalNfcTxRxContext* tx_rx, uint32_t timeout_ms) {
  275. furi_assert(tx_rx);
  276. // Wait for interrupts
  277. uint32_t start = furi_get_tick();
  278. bool data_received = false;
  279. while(true) {
  280. if(furi_hal_gpio_read(&gpio_nfc_irq_rfid_pull) == true) {
  281. st25r3916CheckForReceivedInterrupts();
  282. if(st25r3916GetInterrupt(ST25R3916_IRQ_MASK_RXE)) {
  283. furry_hal_nfc_read_fifo(tx_rx->rx_data, &tx_rx->rx_bits);
  284. data_received = true;
  285. if(tx_rx->sniff_rx) {
  286. tx_rx->sniff_rx(tx_rx->rx_data, tx_rx->rx_bits, false, tx_rx->sniff_context);
  287. }
  288. break;
  289. }
  290. continue;
  291. }
  292. if(furi_get_tick() - start > timeout_ms) {
  293. FURI_LOG_T(TAG, "Interrupt waiting timeout");
  294. furi_delay_tick(1);
  295. break;
  296. }
  297. }
  298. return data_received;
  299. }
  300. void furry_hal_nfc_listen_start(FurryHalNfcDevData* nfc_data) {
  301. furi_assert(nfc_data);
  302. furi_hal_gpio_init(&gpio_nfc_irq_rfid_pull, GpioModeInput, GpioPullDown, GpioSpeedVeryHigh);
  303. // Clear interrupts
  304. st25r3916ClearInterrupts();
  305. // Mask all interrupts
  306. st25r3916DisableInterrupts(ST25R3916_IRQ_MASK_ALL);
  307. // RESET
  308. st25r3916ExecuteCommand(ST25R3916_CMD_STOP);
  309. // Setup registers
  310. st25r3916WriteRegister(
  311. ST25R3916_REG_OP_CONTROL,
  312. ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_rx_en |
  313. ST25R3916_REG_OP_CONTROL_en_fd_auto_efd);
  314. st25r3916WriteRegister(
  315. ST25R3916_REG_MODE,
  316. ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om0);
  317. st25r3916WriteRegister(
  318. ST25R3916_REG_PASSIVE_TARGET,
  319. ST25R3916_REG_PASSIVE_TARGET_fdel_2 | ST25R3916_REG_PASSIVE_TARGET_fdel_0 |
  320. ST25R3916_REG_PASSIVE_TARGET_d_ac_ap2p | ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r);
  321. st25r3916WriteRegister(ST25R3916_REG_MASK_RX_TIMER, 0x02);
  322. // Mask interrupts
  323. uint32_t clear_irq_mask =
  324. (ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_RXE_PTA | ST25R3916_IRQ_MASK_WU_A_X |
  325. ST25R3916_IRQ_MASK_WU_A);
  326. st25r3916EnableInterrupts(clear_irq_mask);
  327. // Set 4 or 7 bytes UID
  328. if(nfc_data->uid_len == 4) {
  329. st25r3916ChangeRegisterBits(
  330. ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_id_mask, ST25R3916_REG_AUX_nfc_id_4bytes);
  331. } else {
  332. st25r3916ChangeRegisterBits(
  333. ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_id_mask, ST25R3916_REG_AUX_nfc_id_7bytes);
  334. }
  335. // Write PT Memory
  336. uint8_t pt_memory[15] = {};
  337. memcpy(pt_memory, nfc_data->uid, nfc_data->uid_len);
  338. pt_memory[10] = nfc_data->atqa[0];
  339. pt_memory[11] = nfc_data->atqa[1];
  340. if(nfc_data->uid_len == 4) {
  341. pt_memory[12] = nfc_data->sak & ~FURRY_HAL_NFC_UID_INCOMPLETE;
  342. } else {
  343. pt_memory[12] = FURRY_HAL_NFC_UID_INCOMPLETE;
  344. }
  345. pt_memory[13] = nfc_data->sak & ~FURRY_HAL_NFC_UID_INCOMPLETE;
  346. pt_memory[14] = nfc_data->sak & ~FURRY_HAL_NFC_UID_INCOMPLETE;
  347. st25r3916WritePTMem(pt_memory, sizeof(pt_memory));
  348. // Go to sense
  349. st25r3916ExecuteCommand(ST25R3916_CMD_GOTO_SENSE);
  350. }
  351. void rfal_interrupt_callback_handler() {
  352. furi_event_flag_set(event, EVENT_FLAG_INTERRUPT);
  353. }
  354. void rfal_state_changed_callback(void* context) {
  355. UNUSED(context);
  356. furi_event_flag_set(event, EVENT_FLAG_STATE_CHANGED);
  357. }
  358. void furry_hal_nfc_stop() {
  359. if(event) {
  360. furi_event_flag_set(event, EVENT_FLAG_STOP);
  361. }
  362. }
  363. bool furry_hal_nfc_emulate_nfca(
  364. uint8_t* uid,
  365. uint8_t uid_len,
  366. uint8_t* atqa,
  367. uint8_t sak,
  368. FurryHalNfcEmulateCallback callback,
  369. void* context,
  370. uint32_t timeout) {
  371. rfalSetUpperLayerCallback(rfal_interrupt_callback_handler);
  372. rfal_set_state_changed_callback(rfal_state_changed_callback);
  373. rfalLmConfPA config;
  374. config.nfcidLen = uid_len;
  375. memcpy(config.nfcid, uid, uid_len);
  376. memcpy(config.SENS_RES, atqa, RFAL_LM_SENS_RES_LEN);
  377. config.SEL_RES = sak;
  378. uint8_t buff_rx[256];
  379. uint16_t buff_rx_size = 256;
  380. uint16_t buff_rx_len = 0;
  381. uint8_t buff_tx[1040];
  382. uint16_t buff_tx_len = 0;
  383. uint32_t data_type = FURRY_HAL_NFC_TXRX_DEFAULT;
  384. rfalLowPowerModeStop();
  385. if(rfalListenStart(
  386. RFAL_LM_MASK_NFCA,
  387. &config,
  388. NULL,
  389. NULL,
  390. buff_rx,
  391. rfalConvBytesToBits(buff_rx_size),
  392. &buff_rx_len)) {
  393. rfalListenStop();
  394. FURI_LOG_E(TAG, "Failed to start listen mode");
  395. return false;
  396. }
  397. while(true) {
  398. buff_rx_len = 0;
  399. buff_tx_len = 0;
  400. uint32_t flag = furi_event_flag_wait(event, EVENT_FLAG_ALL, FuriFlagWaitAny, timeout);
  401. if(flag == (unsigned)FuriFlagErrorTimeout || flag == EVENT_FLAG_STOP) {
  402. break;
  403. }
  404. bool data_received = false;
  405. buff_rx_len = 0;
  406. rfalWorker();
  407. rfalLmState state = rfalListenGetState(&data_received, NULL);
  408. if(data_received) {
  409. rfalTransceiveBlockingRx();
  410. if(nfca_emulation_handler(buff_rx, buff_rx_len, buff_tx, &buff_tx_len)) {
  411. if(rfalListenSleepStart(
  412. RFAL_LM_STATE_SLEEP_A,
  413. buff_rx,
  414. rfalConvBytesToBits(buff_rx_size),
  415. &buff_rx_len)) {
  416. FURI_LOG_E(TAG, "Failed to enter sleep mode");
  417. break;
  418. } else {
  419. continue;
  420. }
  421. }
  422. if(buff_tx_len) {
  423. ReturnCode ret = rfalTransceiveBitsBlockingTx(
  424. buff_tx,
  425. buff_tx_len,
  426. buff_rx,
  427. rfalConvBytesToBits(buff_rx_size),
  428. &buff_rx_len,
  429. data_type,
  430. RFAL_FWT_NONE);
  431. if(ret) {
  432. FURI_LOG_E(TAG, "Tranceive failed with status %d", ret);
  433. break;
  434. }
  435. continue;
  436. }
  437. if((state == RFAL_LM_STATE_ACTIVE_A || state == RFAL_LM_STATE_ACTIVE_Ax)) {
  438. if(callback) {
  439. callback(buff_rx, buff_rx_len, buff_tx, &buff_tx_len, &data_type, context);
  440. }
  441. if(!rfalIsExtFieldOn()) {
  442. break;
  443. }
  444. if(buff_tx_len) {
  445. if(buff_tx_len == UINT16_MAX) buff_tx_len = 0;
  446. ReturnCode ret = rfalTransceiveBitsBlockingTx(
  447. buff_tx,
  448. buff_tx_len,
  449. buff_rx,
  450. rfalConvBytesToBits(buff_rx_size),
  451. &buff_rx_len,
  452. data_type,
  453. RFAL_FWT_NONE);
  454. if(ret) {
  455. FURI_LOG_E(TAG, "Tranceive failed with status %d", ret);
  456. continue;
  457. }
  458. } else {
  459. break;
  460. }
  461. }
  462. }
  463. }
  464. rfalListenStop();
  465. return true;
  466. }
  467. static bool furry_hal_nfc_transparent_tx_rx(FurryHalNfcTxRxContext* tx_rx, uint16_t timeout_ms) {
  468. furi_assert(tx_rx->nfca_signal);
  469. bool ret = false;
  470. // Start transparent mode
  471. st25r3916ExecuteCommand(ST25R3916_CMD_TRANSPARENT_MODE);
  472. // Reconfigure gpio for Transparent mode
  473. furi_hal_spi_bus_handle_deinit(&furi_hal_spi_bus_handle_nfc);
  474. // Send signal
  475. FURI_CRITICAL_ENTER();
  476. nfca_signal_encode(tx_rx->nfca_signal, tx_rx->tx_data, tx_rx->tx_bits, tx_rx->tx_parity);
  477. digital_signal_send(tx_rx->nfca_signal->tx_signal, &gpio_spi_r_mosi);
  478. FURI_CRITICAL_EXIT();
  479. furi_hal_gpio_write(&gpio_spi_r_mosi, false);
  480. // Configure gpio back to SPI and exit transparent
  481. furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_nfc);
  482. st25r3916ExecuteCommand(ST25R3916_CMD_UNMASK_RECEIVE_DATA);
  483. // Manually wait for interrupt
  484. furi_hal_gpio_init(&gpio_nfc_irq_rfid_pull, GpioModeInput, GpioPullDown, GpioSpeedVeryHigh);
  485. st25r3916ClearAndEnableInterrupts(ST25R3916_IRQ_MASK_RXE);
  486. if(tx_rx->sniff_tx) {
  487. tx_rx->sniff_tx(tx_rx->tx_data, tx_rx->tx_bits, false, tx_rx->sniff_context);
  488. }
  489. uint32_t irq = 0;
  490. uint8_t rxe = 0;
  491. uint32_t start = DWT->CYCCNT;
  492. while(true) {
  493. if(!rfalIsExtFieldOn()) {
  494. return false;
  495. }
  496. if(furi_hal_gpio_read(&gpio_nfc_irq_rfid_pull) == true) {
  497. st25r3916ReadRegister(ST25R3916_REG_IRQ_MAIN, &rxe);
  498. if(rxe & (1 << 4)) {
  499. irq = 1;
  500. break;
  501. }
  502. }
  503. uint32_t timeout = DWT->CYCCNT - start;
  504. if(timeout / furi_hal_cortex_instructions_per_microsecond() > timeout_ms * 1000) {
  505. FURI_LOG_D(TAG, "Interrupt waiting timeout");
  506. break;
  507. }
  508. }
  509. if(irq) {
  510. uint8_t fifo_stat[2];
  511. st25r3916ReadMultipleRegisters(
  512. ST25R3916_REG_FIFO_STATUS1, fifo_stat, ST25R3916_FIFO_STATUS_LEN);
  513. uint16_t len =
  514. ((((uint16_t)fifo_stat[1] & ST25R3916_REG_FIFO_STATUS2_fifo_b_mask) >>
  515. ST25R3916_REG_FIFO_STATUS2_fifo_b_shift)
  516. << RFAL_BITS_IN_BYTE);
  517. len |= (((uint16_t)fifo_stat[0]) & 0x00FFU);
  518. uint8_t rx[100];
  519. st25r3916ReadFifo(rx, len);
  520. tx_rx->rx_bits = len * 8;
  521. memcpy(tx_rx->rx_data, rx, len);
  522. if(tx_rx->sniff_rx) {
  523. tx_rx->sniff_rx(tx_rx->rx_data, tx_rx->rx_bits, false, tx_rx->sniff_context);
  524. }
  525. ret = true;
  526. } else {
  527. FURI_LOG_E(TAG, "Timeout error");
  528. ret = false;
  529. }
  530. st25r3916ClearInterrupts();
  531. return ret;
  532. }
  533. static uint32_t furry_hal_nfc_tx_rx_get_flag(FurryHalNfcTxRxType type) {
  534. uint32_t flags = 0;
  535. if(type == FurryHalNfcTxRxTypeRxNoCrc) {
  536. flags = RFAL_TXRX_FLAGS_CRC_RX_KEEP;
  537. } else if(type == FurryHalNfcTxRxTypeRxKeepPar) {
  538. flags = RFAL_TXRX_FLAGS_CRC_TX_MANUAL | RFAL_TXRX_FLAGS_CRC_RX_KEEP |
  539. RFAL_TXRX_FLAGS_PAR_RX_KEEP;
  540. } else if(type == FurryHalNfcTxRxTypeRaw) {
  541. flags = RFAL_TXRX_FLAGS_CRC_TX_MANUAL | RFAL_TXRX_FLAGS_CRC_RX_KEEP |
  542. RFAL_TXRX_FLAGS_PAR_RX_KEEP | RFAL_TXRX_FLAGS_PAR_TX_NONE;
  543. } else if(type == FurryHalNfcTxRxTypeRxRaw) {
  544. flags = RFAL_TXRX_FLAGS_CRC_TX_MANUAL | RFAL_TXRX_FLAGS_CRC_RX_KEEP |
  545. RFAL_TXRX_FLAGS_PAR_RX_KEEP | RFAL_TXRX_FLAGS_PAR_TX_NONE;
  546. }
  547. return flags;
  548. }
  549. static uint16_t furry_hal_nfc_data_and_parity_to_bitstream(
  550. uint8_t* data,
  551. uint16_t len,
  552. uint8_t* parity,
  553. uint8_t* out) {
  554. furi_assert(data);
  555. furi_assert(out);
  556. uint8_t next_par_bit = 0;
  557. uint16_t curr_bit_pos = 0;
  558. for(uint16_t i = 0; i < len; i++) {
  559. next_par_bit = FURI_BIT(parity[i / 8], 7 - (i % 8));
  560. if(curr_bit_pos % 8 == 0) {
  561. out[curr_bit_pos / 8] = data[i];
  562. curr_bit_pos += 8;
  563. out[curr_bit_pos / 8] = next_par_bit;
  564. curr_bit_pos++;
  565. } else {
  566. out[curr_bit_pos / 8] |= data[i] << (curr_bit_pos % 8);
  567. out[curr_bit_pos / 8 + 1] = data[i] >> (8 - curr_bit_pos % 8);
  568. out[curr_bit_pos / 8 + 1] |= next_par_bit << (curr_bit_pos % 8);
  569. curr_bit_pos += 9;
  570. }
  571. }
  572. return curr_bit_pos;
  573. }
  574. uint16_t furry_hal_nfc_bitstream_to_data_and_parity(
  575. uint8_t* in_buff,
  576. uint16_t in_buff_bits,
  577. uint8_t* out_data,
  578. uint8_t* out_parity) {
  579. if(in_buff_bits < 8) {
  580. out_data[0] = in_buff[0];
  581. return in_buff_bits;
  582. }
  583. if(in_buff_bits % 9 != 0) {
  584. return 0;
  585. }
  586. uint8_t curr_byte = 0;
  587. uint16_t bit_processed = 0;
  588. memset(out_parity, 0, in_buff_bits / 9);
  589. while(bit_processed < in_buff_bits) {
  590. out_data[curr_byte] = in_buff[bit_processed / 8] >> (bit_processed % 8);
  591. out_data[curr_byte] |= in_buff[bit_processed / 8 + 1] << (8 - bit_processed % 8);
  592. out_parity[curr_byte / 8] |= FURI_BIT(in_buff[bit_processed / 8 + 1], bit_processed % 8)
  593. << (7 - curr_byte % 8);
  594. bit_processed += 9;
  595. curr_byte++;
  596. }
  597. return curr_byte * 8;
  598. }
  599. bool furry_hal_nfc_tx_rx(FurryHalNfcTxRxContext* tx_rx, uint16_t timeout_ms) {
  600. furi_assert(tx_rx);
  601. ReturnCode ret;
  602. rfalNfcState state = RFAL_NFC_STATE_ACTIVATED;
  603. uint8_t temp_tx_buff[FURRY_HAL_NFC_DATA_BUFF_SIZE] = {};
  604. uint16_t temp_tx_bits = 0;
  605. uint8_t* temp_rx_buff = NULL;
  606. uint16_t* temp_rx_bits = NULL;
  607. if(tx_rx->tx_rx_type == FurryHalNfcTxRxTransparent) {
  608. return furry_hal_nfc_transparent_tx_rx(tx_rx, timeout_ms);
  609. }
  610. // Prepare data for FIFO if necessary
  611. uint32_t flags = furry_hal_nfc_tx_rx_get_flag(tx_rx->tx_rx_type);
  612. if(tx_rx->tx_rx_type == FurryHalNfcTxRxTypeRaw) {
  613. temp_tx_bits = furry_hal_nfc_data_and_parity_to_bitstream(
  614. tx_rx->tx_data, tx_rx->tx_bits / 8, tx_rx->tx_parity, temp_tx_buff);
  615. ret = rfalNfcDataExchangeCustomStart(
  616. temp_tx_buff, temp_tx_bits, &temp_rx_buff, &temp_rx_bits, RFAL_FWT_NONE, flags);
  617. } else {
  618. ret = rfalNfcDataExchangeCustomStart(
  619. tx_rx->tx_data, tx_rx->tx_bits, &temp_rx_buff, &temp_rx_bits, RFAL_FWT_NONE, flags);
  620. }
  621. if(ret != ERR_NONE) {
  622. FURI_LOG_E(TAG, "Failed to start data exchange");
  623. return false;
  624. }
  625. if(tx_rx->sniff_tx) {
  626. bool crc_dropped = !(flags & RFAL_TXRX_FLAGS_CRC_TX_MANUAL);
  627. tx_rx->sniff_tx(tx_rx->tx_data, tx_rx->tx_bits, crc_dropped, tx_rx->sniff_context);
  628. }
  629. uint32_t start = DWT->CYCCNT;
  630. while(state != RFAL_NFC_STATE_DATAEXCHANGE_DONE) {
  631. rfalNfcWorker();
  632. state = rfalNfcGetState();
  633. ret = rfalNfcDataExchangeGetStatus();
  634. if(ret == ERR_WRONG_STATE) {
  635. return false;
  636. } else if(ret == ERR_BUSY) {
  637. if(DWT->CYCCNT - start > timeout_ms * clocks_in_ms) {
  638. FURI_LOG_D(TAG, "Timeout during data exchange");
  639. return false;
  640. }
  641. continue;
  642. } else {
  643. start = DWT->CYCCNT;
  644. }
  645. furi_delay_tick(1);
  646. }
  647. if(tx_rx->tx_rx_type == FurryHalNfcTxRxTypeRaw ||
  648. tx_rx->tx_rx_type == FurryHalNfcTxRxTypeRxRaw) {
  649. tx_rx->rx_bits = furry_hal_nfc_bitstream_to_data_and_parity(
  650. temp_rx_buff, *temp_rx_bits, tx_rx->rx_data, tx_rx->rx_parity);
  651. } else {
  652. memcpy(tx_rx->rx_data, temp_rx_buff, MIN(*temp_rx_bits / 8, FURRY_HAL_NFC_DATA_BUFF_SIZE));
  653. tx_rx->rx_bits = *temp_rx_bits;
  654. }
  655. if(tx_rx->sniff_rx) {
  656. bool crc_dropped = !(flags & RFAL_TXRX_FLAGS_CRC_RX_KEEP);
  657. tx_rx->sniff_rx(tx_rx->rx_data, tx_rx->rx_bits, crc_dropped, tx_rx->sniff_context);
  658. }
  659. return true;
  660. }
  661. bool furry_hal_nfc_tx_rx_full(FurryHalNfcTxRxContext* tx_rx) {
  662. uint16_t part_len_bytes;
  663. if(!furry_hal_nfc_tx_rx(tx_rx, 1000)) {
  664. return false;
  665. }
  666. while(tx_rx->rx_bits && tx_rx->rx_data[0] == 0xAF) {
  667. FurryHalNfcTxRxContext tmp = *tx_rx;
  668. tmp.tx_data[0] = 0xAF;
  669. tmp.tx_bits = 8;
  670. if(!furry_hal_nfc_tx_rx(&tmp, 1000)) {
  671. return false;
  672. }
  673. part_len_bytes = tmp.rx_bits / 8;
  674. if(part_len_bytes > FURRY_HAL_NFC_DATA_BUFF_SIZE - tx_rx->rx_bits / 8) {
  675. FURI_LOG_W(TAG, "Overrun rx buf");
  676. return false;
  677. }
  678. if(part_len_bytes == 0) {
  679. FURI_LOG_W(TAG, "Empty 0xAF response");
  680. return false;
  681. }
  682. memcpy(tx_rx->rx_data + tx_rx->rx_bits / 8, tmp.rx_data + 1, part_len_bytes - 1);
  683. tx_rx->rx_data[0] = tmp.rx_data[0];
  684. tx_rx->rx_bits += 8 * (part_len_bytes - 1);
  685. }
  686. return true;
  687. }
  688. void furry_hal_nfc_sleep() {
  689. rfalNfcDeactivate(false);
  690. rfalLowPowerModeStart();
  691. }
  692. FurryHalNfcReturn furry_hal_nfc_ll_set_mode(
  693. FurryHalNfcMode mode,
  694. FurryHalNfcBitrate txBR,
  695. FurryHalNfcBitrate rxBR) {
  696. return rfalSetMode((rfalMode)mode, (rfalBitRate)txBR, (rfalBitRate)rxBR);
  697. }
  698. void furry_hal_nfc_ll_set_error_handling(FurryHalNfcErrorHandling eHandling) {
  699. rfalSetErrorHandling((rfalEHandling)eHandling);
  700. }
  701. void furry_hal_nfc_ll_set_guard_time(uint32_t cycles) {
  702. rfalSetGT(cycles);
  703. }
  704. void furry_hal_nfc_ll_set_fdt_listen(uint32_t cycles) {
  705. rfalSetFDTListen(cycles);
  706. }
  707. void furry_hal_nfc_ll_set_fdt_poll(uint32_t FDTPoll) {
  708. rfalSetFDTPoll(FDTPoll);
  709. }
  710. void furry_hal_nfc_ll_txrx_on() {
  711. st25r3916TxRxOn();
  712. }
  713. void furry_hal_nfc_ll_txrx_off() {
  714. st25r3916TxRxOff();
  715. }
  716. FurryHalNfcReturn furry_hal_nfc_ll_txrx(
  717. uint8_t* txBuf,
  718. uint16_t txBufLen,
  719. uint8_t* rxBuf,
  720. uint16_t rxBufLen,
  721. uint16_t* actLen,
  722. uint32_t flags,
  723. uint32_t fwt) {
  724. return rfalTransceiveBlockingTxRx(txBuf, txBufLen, rxBuf, rxBufLen, actLen, flags, fwt);
  725. }
  726. FurryHalNfcReturn furry_hal_nfc_ll_txrx_bits(
  727. uint8_t* txBuf,
  728. uint16_t txBufLen,
  729. uint8_t* rxBuf,
  730. uint16_t rxBufLen,
  731. uint16_t* actLen,
  732. uint32_t flags,
  733. uint32_t fwt) {
  734. return rfalTransceiveBitsBlockingTxRx(txBuf, txBufLen, rxBuf, rxBufLen, actLen, flags, fwt);
  735. }
  736. void furry_hal_nfc_ll_poll() {
  737. rfalWorker();
  738. }
  739. void furry_hal_nfc_field_detect_start() {
  740. st25r3916WriteRegister(
  741. ST25R3916_REG_OP_CONTROL,
  742. ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_en_fd_mask);
  743. st25r3916WriteRegister(ST25R3916_REG_MODE, ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om0);
  744. }
  745. bool furry_hal_nfc_field_is_present() {
  746. return st25r3916CheckReg(
  747. ST25R3916_REG_AUX_DISPLAY,
  748. ST25R3916_REG_AUX_DISPLAY_efd_o,
  749. ST25R3916_REG_AUX_DISPLAY_efd_o);
  750. }