rfal_isoDep.c 123 KB

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  1. /******************************************************************************
  2. * \attention
  3. *
  4. * <h2><center>&copy; COPYRIGHT 2020 STMicroelectronics</center></h2>
  5. *
  6. * Licensed under ST MYLIBERTY SOFTWARE LICENSE AGREEMENT (the "License");
  7. * You may not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at:
  9. *
  10. * www.st.com/myliberty
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an "AS IS" BASIS,
  14. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
  15. * AND SPECIFICALLY DISCLAIMING THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT.
  17. * See the License for the specific language governing permissions and
  18. * limitations under the License.
  19. *
  20. ******************************************************************************/
  21. /*
  22. * PROJECT: NFCC firmware
  23. * LANGUAGE: ISO C99
  24. */
  25. /*! \file rfal_isoDep.c
  26. *
  27. * \author Gustavo Patricio
  28. *
  29. * \brief Implementation of ISO-DEP protocol
  30. *
  31. * This implementation was based on the following specs:
  32. * - ISO/IEC 14443-4 2nd Edition 2008-07-15
  33. * - NFC Forum Digital Protocol 1.1 2014-01-14
  34. *
  35. */
  36. /*
  37. ******************************************************************************
  38. * INCLUDES
  39. ******************************************************************************
  40. */
  41. #include "../include/rfal_isoDep.h"
  42. #include "../include/rfal_rf.h"
  43. #include "../utils.h"
  44. /*
  45. ******************************************************************************
  46. * ENABLE SWITCH
  47. ******************************************************************************
  48. */
  49. #if RFAL_FEATURE_ISO_DEP
  50. #if(!RFAL_FEATURE_ISO_DEP_POLL && !RFAL_FEATURE_ISO_DEP_LISTEN)
  51. #error \
  52. " RFAL: Invalid ISO-DEP Configuration. Please select at least one mode: Poller and/or Listener. "
  53. #endif
  54. /* Check for valid I-Block length [RFAL_ISODEP_FSX_16 ; RFAL_ISODEP_FSX_4096]*/
  55. #if((RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN > 4096) || (RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN < 16))
  56. #error \
  57. " RFAL: Invalid ISO-DEP IBlock Max length. Please change RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN. "
  58. #endif
  59. /* Check for valid APDU length. */
  60. #if((RFAL_FEATURE_ISO_DEP_APDU_MAX_LEN < RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN))
  61. #error " RFAL: Invalid ISO-DEP APDU Max length. Please change RFAL_FEATURE_ISO_DEP_APDU_MAX_LEN. "
  62. #endif
  63. /*
  64. ******************************************************************************
  65. * DEFINES
  66. ******************************************************************************
  67. */
  68. #define ISODEP_CRC_LEN RFAL_CRC_LEN /*!< ISO1443 CRC Length */
  69. #define ISODEP_PCB_POS (0U) /*!< PCB position on message header*/
  70. #define ISODEP_SWTX_INF_POS (1U) /*!< INF position in a S-WTX */
  71. #define ISODEP_DID_POS (1U) /*!< DID position on message header*/
  72. #define ISODEP_SWTX_PARAM_LEN (1U) /*!< SWTX parameter length */
  73. #define ISODEP_DSL_MAX_LEN \
  74. (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN) /*!< Deselect Req/Res length */
  75. #define ISODEP_PCB_xBLOCK_MASK (0xC0U) /*!< Bit mask for Block type */
  76. #define ISODEP_PCB_IBLOCK (0x00U) /*!< Bit mask indicating a I-Block */
  77. #define ISODEP_PCB_RBLOCK (0x80U) /*!< Bit mask indicating a R-Block */
  78. #define ISODEP_PCB_SBLOCK (0xC0U) /*!< Bit mask indicating a S-Block */
  79. #define ISODEP_PCB_INVALID (0x40U) /*!< Bit mask of an Invalid PCB */
  80. #define ISODEP_HDR_MAX_LEN \
  81. (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN + \
  82. RFAL_ISODEP_NAD_LEN) /*!< Max header length (PCB + DID + NAD) */
  83. #define ISODEP_PCB_IB_VALID_MASK \
  84. (ISODEP_PCB_B6_BIT | ISODEP_PCB_B2_BIT) /*!< Bit mask for the MUST bits on I-Block */
  85. #define ISODEP_PCB_IB_VALID_VAL \
  86. (ISODEP_PCB_B2_BIT) /*!< Value for the MUST bits on I-Block */
  87. #define ISODEP_PCB_RB_VALID_MASK \
  88. (ISODEP_PCB_B6_BIT | ISODEP_PCB_B3_BIT | \
  89. ISODEP_PCB_B2_BIT) /*!< Bit mask for the MUST bits on R-Block */
  90. #define ISODEP_PCB_RB_VALID_VAL \
  91. (ISODEP_PCB_B6_BIT | ISODEP_PCB_B2_BIT) /*!< Value for the MUST bits on R-Block */
  92. #define ISODEP_PCB_SB_VALID_MASK \
  93. (ISODEP_PCB_B3_BIT | ISODEP_PCB_B2_BIT | \
  94. ISODEP_PCB_B1_BIT) /*!< Bit mask for the MUST bits on I-Block */
  95. #define ISODEP_PCB_SB_VALID_VAL \
  96. (ISODEP_PCB_B2_BIT) /*!< Value for the MUST bits on I-Block */
  97. #define ISODEP_PCB_B1_BIT \
  98. (0x01U) /*!< Bit mask for the RFU S Blocks */
  99. #define ISODEP_PCB_B2_BIT \
  100. (0x02U) /*!< Bit mask for the RFU bit2 in I,S,R Blocks */
  101. #define ISODEP_PCB_B3_BIT \
  102. (0x04U) /*!< Bit mask for the RFU bit3 in R Blocks */
  103. #define ISODEP_PCB_B6_BIT \
  104. (0x20U) /*!< Bit mask for the RFU bit2 in R Blocks */
  105. #define ISODEP_PCB_CHAINING_BIT \
  106. (0x10U) /*!< Bit mask for the chaining bit of an ISO DEP I-Block in PCB. */
  107. #define ISODEP_PCB_DID_BIT \
  108. (0x08U) /*!< Bit mask for the DID presence bit of an ISO DEP I,S,R Blocks PCB. */
  109. #define ISODEP_PCB_NAD_BIT \
  110. (0x04U) /*!< Bit mask for the NAD presence bit of an ISO DEP I,S,R Blocks in PCB */
  111. #define ISODEP_PCB_BN_MASK \
  112. (0x01U) /*!< Bit mask for the block number of an ISO DEP I,R Block in PCB */
  113. #define ISODEP_SWTX_PL_MASK \
  114. (0xC0U) /*!< Bit mask for the Power Level bits of the inf byte of an WTX request or response */
  115. #define ISODEP_SWTX_WTXM_MASK \
  116. (0x3FU) /*!< Bit mask for the WTXM bits of the inf byte of an WTX request or response */
  117. #define ISODEP_RBLOCK_INF_LEN (0U) /*!< INF length of R-Block Digital 1.1 15.1.3 */
  118. #define ISODEP_SDSL_INF_LEN (0U) /*!< INF length of S(DSL) Digital 1.1 15.1.3 */
  119. #define ISODEP_SWTX_INF_LEN (1U) /*!< INF length of S(WTX) Digital 1.1 15.2.2 */
  120. #define ISODEP_WTXM_MIN (1U) /*!< Minimum allowed value for the WTXM, Digital 1.0 13.2.2 */
  121. #define ISODEP_WTXM_MAX (59U) /*!< Maximum allowed value for the WTXM, Digital 1.0 13.2.2 */
  122. #define ISODEP_PCB_Sxx_MASK (0x30U) /*!< Bit mask for the S-Block type */
  123. #define ISODEP_PCB_DESELECT (0x00U) /*!< Bit mask for S-Block indicating Deselect */
  124. #define ISODEP_PCB_WTX (0x30U) /*!< Bit mask for S-Block indicating Waiting Time eXtension */
  125. #define ISODEP_PCB_Rx_MASK (0x10U) /*!< Bit mask for the R-Block type */
  126. #define ISODEP_PCB_ACK (0x00U) /*!< Bit mask for R-Block indicating ACK */
  127. #define ISODEP_PCB_NAK (0x10U) /*!< Bit mask for R-Block indicating NAK */
  128. /*! Maximum length of control message (no INF) */
  129. #define ISODEP_CONTROLMSG_BUF_LEN \
  130. (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN + RFAL_ISODEP_NAD_LEN + ISODEP_SWTX_PARAM_LEN)
  131. #define ISODEP_FWT_DEACTIVATION \
  132. (71680U) /*!< FWT used for DESELECT Digital 2.2 B10 ISO1444-4 7.2 & 8.1 */
  133. #define ISODEP_MAX_RERUNS (0x0FFFFFFFU) /*!< Maximum rerun retrys for a blocking protocol run*/
  134. #define ISODEP_PCBSBLOCK \
  135. (0x00U | ISODEP_PCB_SBLOCK | ISODEP_PCB_B2_BIT) /*!< PCB Value of a S-Block */
  136. #define ISODEP_PCB_SDSL \
  137. (ISODEP_PCBSBLOCK | ISODEP_PCB_DESELECT) /*!< PCB Value of a S-Block with DESELECT */
  138. #define ISODEP_PCB_SWTX \
  139. (ISODEP_PCBSBLOCK | ISODEP_PCB_WTX) /*!< PCB Value of a S-Block with WTX */
  140. #define ISODEP_PCB_SPARAMETERS \
  141. (ISODEP_PCB_SBLOCK | ISODEP_PCB_WTX) /*!< PCB Value of a S-Block with PARAMETERS */
  142. #define ISODEP_FWI_LIS_MAX_NFC \
  143. 8U /*!< FWT Listener Max FWIT4ATmax FWIBmax Digital 1.1 A6 & A3 */
  144. #define ISODEP_FWI_LIS_MAX_EMVCO \
  145. 7U /*!< FWT Listener Max FWIMAX EMVCo 2.6 A.5 */
  146. #define ISODEP_FWI_LIS_MAX \
  147. (uint8_t)( \
  148. (gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ? \
  149. ISODEP_FWI_LIS_MAX_EMVCO : \
  150. ISODEP_FWI_LIS_MAX_NFC) /*!< FWI Listener Max as NFC / EMVCo */
  151. #define ISODEP_FWT_LIS_MAX \
  152. rfalIsoDepFWI2FWT(ISODEP_FWI_LIS_MAX) /*!< FWT Listener Max */
  153. #define ISODEP_FWI_MIN_10 (1U) /*!< Minimum value for FWI Digital 1.0 11.6.2.17 */
  154. #define ISODEP_FWI_MIN_11 (0U) /*!< Default value for FWI Digital 1.1 13.6.2 */
  155. #define ISODEP_FWI_MAX (14U) /*!< Maximum value for FWI Digital 1.0 11.6.2.17 */
  156. #define ISODEP_SFGI_MIN (0U) /*!< Default value for FWI Digital 1.1 13.6.2.22 */
  157. #define ISODEP_SFGI_MAX (14U) /*!< Maximum value for FWI Digital 1.1 13.6.2.22 */
  158. #define RFAL_ISODEP_SPARAM_TVL_HDR_LEN (2U) /*!< S(PARAMETERS) TVL header length: Tag + Len */
  159. #define RFAL_ISODEP_SPARAM_HDR_LEN \
  160. (RFAL_ISODEP_PCB_LEN + \
  161. RFAL_ISODEP_SPARAM_TVL_HDR_LEN) /*!< S(PARAMETERS) header length: PCB + Tag + Len */
  162. /**********************************************************************************************************************/
  163. /**********************************************************************************************************************/
  164. #define RFAL_ISODEP_NO_PARAM (0U) /*!< No parameter flag for isoDepHandleControlMsg() */
  165. #define RFAL_ISODEP_CMD_RATS (0xE0U) /*!< RATS command Digital 1.1 13.6.1 */
  166. #define RFAL_ISODEP_ATS_MIN_LEN (1U) /*!< Minimum ATS length Digital 1.1 13.6.2 */
  167. #define RFAL_ISODEP_ATS_HDR_LEN (5U) /*!< ATS headerlength Digital 1.1 13.6.2 */
  168. #define RFAL_ISODEP_ATS_MAX_LEN \
  169. (RFAL_ISODEP_ATS_HDR_LEN + \
  170. RFAL_ISODEP_ATS_HB_MAX_LEN) /*!< Maximum ATS length Digital 1.1 13.6.2 */
  171. #define RFAL_ISODEP_ATS_T0_FSCI_MASK (0x0FU) /*!< ATS T0's FSCI mask Digital 1.1 13.6.2 */
  172. #define RFAL_ISODEP_ATS_TB_FWI_SHIFT (4U) /*!< ATS TB's FWI shift Digital 1.1 13.6.2 */
  173. #define RFAL_ISODEP_ATS_FWI_MASK (0x0FU) /*!< ATS TB's FWI shift Digital 1.1 13.6.2 */
  174. #define RFAL_ISODEP_ATS_TL_POS (0x00U) /*!< ATS TL's position Digital 1.1 13.6.2 */
  175. #define RFAL_ISODEP_PPS_SB (0xD0U) /*!< PPS REQ PPSS's SB value (no CID) ISO14443-4 5.3 */
  176. #define RFAL_ISODEP_PPS_MASK (0xF0U) /*!< PPS REQ PPSS's SB mask ISO14443-4 5.3 */
  177. #define RFAL_ISODEP_PPS_SB_DID_MASK \
  178. (0x0FU) /*!< PPS REQ PPSS's DID|CID mask ISO14443-4 5.3 */
  179. #define RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT \
  180. (0x11U) /*!< PPS REQ PPS0 indicating that PPS1 is present */
  181. #define RFAL_ISODEP_PPS_PPS1 (0x00U) /*!< PPS REQ PPS1 fixed value ISO14443-4 5.3 */
  182. #define RFAL_ISODEP_PPS_PPS1_DSI_SHIFT \
  183. (2U) /*!< PPS REQ PPS1 fixed value ISO14443-4 5.3 */
  184. #define RFAL_ISODEP_PPS_PPS1_DXI_MASK \
  185. (0x0FU) /*!< PPS REQ PPS1 fixed value ISO14443-4 5.3 */
  186. #define RFAL_ISODEP_PPS_RES_LEN (1U) /*!< PPS Response length ISO14443-4 5.4 */
  187. #define RFAL_ISODEP_PPS_STARTBYTE_POS \
  188. (0U) /*!< PPS REQ PPSS's byte position ISO14443-4 5.4 */
  189. #define RFAL_ISODEP_PPS_PPS0_POS (1U) /*!< PPS REQ PPS0's byte position ISO14443-4 5.4 */
  190. #define RFAL_ISODEP_PPS_PPS1_POS (2U) /*!< PPS REQ PPS1's byte position ISO14443-4 5.4 */
  191. #define RFAL_ISODEP_PPS0_VALID_MASK \
  192. (0xEFU) /*!< PPS REQ PPS0 valid coding mask ISO14443-4 5.4 */
  193. #define RFAL_ISODEP_CMD_ATTRIB (0x1DU) /*!< ATTRIB command Digital 1.1 14.6.1 */
  194. #define RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT \
  195. (6U) /*!< ATTRIB PARAM2 DSI shift Digital 1.1 14.6.1 */
  196. #define RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT \
  197. (4U) /*!< ATTRIB PARAM2 DRI shift Digital 1.1 14.6.1 */
  198. #define RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK \
  199. (0xF0U) /*!< ATTRIB PARAM2 DxI mask Digital 1.1 14.6.1 */
  200. #define RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK \
  201. (0x0FU) /*!< ATTRIB PARAM2 FSDI mask Digital 1.1 14.6.1 */
  202. #define RFAL_ISODEP_ATTRIB_PARAM4_DID_MASK \
  203. (0x0FU) /*!< ATTRIB PARAM4 DID mask Digital 1.1 14.6.1 */
  204. #define RFAL_ISODEP_ATTRIB_HDR_LEN (9U) /*!< ATTRIB REQ header length Digital 1.1 14.6.1 */
  205. #define RFAL_ISODEP_ATTRIB_RES_HDR_LEN \
  206. (1U) /*!< ATTRIB RES header length Digital 1.1 14.6.2 */
  207. #define RFAL_ISODEP_ATTRIB_RES_MBLIDID_POS \
  208. (0U) /*!< ATTRIB RES MBLI|DID position Digital 1.1 14.6.2 */
  209. #define RFAL_ISODEP_ATTRIB_RES_DID_MASK \
  210. (0x0FU) /*!< ATTRIB RES DID mask Digital 1.1 14.6.2 */
  211. #define RFAL_ISODEP_ATTRIB_RES_MBLI_MASK \
  212. (0x0FU) /*!< ATTRIB RES MBLI mask Digital 1.1 14.6.2 */
  213. #define RFAL_ISODEP_ATTRIB_RES_MBLI_SHIFT \
  214. (4U) /*!< ATTRIB RES MBLI shift Digital 1.1 14.6.2 */
  215. #define RFAL_ISODEP_DID_MASK (0x0FU) /*!< ISODEP's DID mask */
  216. #define RFAL_ISODEP_DID_00 (0U) /*!< ISODEP's DID value 0 */
  217. #define RFAL_ISODEP_FSDI_MAX_NFC (8U) /*!< Max FSDI value Digital 2.0 14.6.1.9 & B7 & B8 */
  218. #define RFAL_ISODEP_FSDI_MAX_NFC_21 \
  219. (0x0CU) /*!< Max FSDI value Digital 2.1 14.6.1.9 & Table 72 */
  220. #define RFAL_ISODEP_FSDI_MAX_EMV (0x0CU) /*!< Max FSDI value EMVCo 3.0 5.7.2.5 */
  221. #define RFAL_ISODEP_RATS_PARAM_FSDI_MASK \
  222. (0xF0U) /*!< Mask bits for FSDI in RATS */
  223. #define RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT \
  224. (4U) /*!< Shift for FSDI in RATS */
  225. #define RFAL_ISODEP_RATS_PARAM_DID_MASK \
  226. (0x0FU) /*!< Mask bits for DID in RATS */
  227. #define RFAL_ISODEP_ATS_TL_OFFSET \
  228. (0x00U) /*!< Offset of TL on ATS */
  229. #define RFAL_ISODEP_ATS_TA_OFFSET \
  230. (0x02U) /*!< Offset of TA if it is present on ATS */
  231. #define RFAL_ISODEP_ATS_TB_OFFSET \
  232. (0x03U) /*!< Offset of TB if both TA and TB is present on ATS */
  233. #define RFAL_ISODEP_ATS_TC_OFFSET \
  234. (0x04U) /*!< Offset of TC if both TA,TB & TC are present on ATS */
  235. #define RFAL_ISODEP_ATS_HIST_OFFSET \
  236. (0x05U) /*!< Offset of Historical Bytes if TA, TB & TC are present on ATS */
  237. #define RFAL_ISODEP_ATS_TC_ADV_FEAT \
  238. (0x10U) /*!< Bit mask indicating support for Advanced protocol features: DID & NAD */
  239. #define RFAL_ISODEP_ATS_TC_DID (0x02U) /*!< Bit mask indicating support for DID */
  240. #define RFAL_ISODEP_ATS_TC_NAD (0x01U) /*!< Bit mask indicating support for NAD */
  241. #define RFAL_ISODEP_PPS0_PPS1_PRESENT \
  242. (0x11U) /*!< PPS0 byte indicating that PPS1 is present */
  243. #define RFAL_ISODEP_PPS0_PPS1_NOT_PRESENT \
  244. (0x01U) /*!< PPS0 byte indicating that PPS1 is NOT present */
  245. #define RFAL_ISODEP_PPS1_DRI_MASK \
  246. (0x03U) /*!< PPS1 byte DRI mask bits */
  247. #define RFAL_ISODEP_PPS1_DSI_MASK \
  248. (0x0CU) /*!< PPS1 byte DSI mask bits */
  249. #define RFAL_ISODEP_PPS1_DSI_SHIFT \
  250. (2U) /*!< PPS1 byte DSI shift */
  251. #define RFAL_ISODEP_PPS1_DxI_MASK \
  252. (0x03U) /*!< PPS1 byte DSI/DRS mask bits */
  253. /*! Delta Time for polling during Activation (ATS) : 20ms Digital 1.0 11.7.1.1 & A.7 */
  254. #define RFAL_ISODEP_T4T_DTIME_POLL_10 rfalConvMsTo1fc(20)
  255. /*! Delta Time for polling during Activation (ATS) : 16.4ms Digital 1.1 13.8.1.1 & A.6
  256. * Use 16 ms as testcase T4AT_BI_10_03 sends a frame exactly at the border */
  257. #define RFAL_ISODEP_T4T_DTIME_POLL_11 216960U
  258. /*! Activation frame waiting time FWT(act) = 71680/fc (~5286us) Digital 1.1 13.8.1.1 & A.6 */
  259. #define RFAL_ISODEP_T4T_FWT_ACTIVATION (71680U + RFAL_ISODEP_T4T_DTIME_POLL_11)
  260. /*! Delta frame waiting time = 16/fc Digital 1.0 11.7.1.3 & A.7*/
  261. #define RFAL_ISODEP_DFWT_10 16U
  262. /*! Delta frame waiting time = 16/fc Digital 2.0 14.8.1.3 & B.7*/
  263. #define RFAL_ISODEP_DFWT_20 49152U
  264. /*
  265. ******************************************************************************
  266. * MACROS
  267. ******************************************************************************
  268. */
  269. #define isoDep_PCBisIBlock(pcb) \
  270. (((pcb) & (ISODEP_PCB_xBLOCK_MASK | ISODEP_PCB_IB_VALID_MASK)) == \
  271. (ISODEP_PCB_IBLOCK | ISODEP_PCB_IB_VALID_VAL)) /*!< Checks if pcb is a I-Block */
  272. #define isoDep_PCBisRBlock(pcb) \
  273. (((pcb) & (ISODEP_PCB_xBLOCK_MASK | ISODEP_PCB_RB_VALID_MASK)) == \
  274. (ISODEP_PCB_RBLOCK | ISODEP_PCB_RB_VALID_VAL)) /*!< Checks if pcb is a R-Block */
  275. #define isoDep_PCBisSBlock(pcb) \
  276. (((pcb) & (ISODEP_PCB_xBLOCK_MASK | ISODEP_PCB_SB_VALID_MASK)) == \
  277. (ISODEP_PCB_SBLOCK | ISODEP_PCB_SB_VALID_VAL)) /*!< Checks if pcb is a S-Block */
  278. #define isoDep_PCBisChaining(pcb) \
  279. (((pcb) & ISODEP_PCB_CHAINING_BIT) == \
  280. ISODEP_PCB_CHAINING_BIT) /*!< Checks if pcb is indicating chaining */
  281. #define isoDep_PCBisDeselect(pcb) \
  282. (((pcb) & ISODEP_PCB_Sxx_MASK) == \
  283. ISODEP_PCB_DESELECT) /*!< Checks if pcb is indicating DESELECT */
  284. #define isoDep_PCBisWTX(pcb) \
  285. (((pcb) & ISODEP_PCB_Sxx_MASK) == ISODEP_PCB_WTX) /*!< Checks if pcb is indicating WTX */
  286. #define isoDep_PCBisACK(pcb) \
  287. (((pcb) & ISODEP_PCB_Rx_MASK) == ISODEP_PCB_ACK) /*!< Checks if pcb is indicating ACK */
  288. #define isoDep_PCBisNAK(pcb) \
  289. (((pcb) & ISODEP_PCB_Rx_MASK) == ISODEP_PCB_NAK) /*!< Checks if pcb is indicating ACK */
  290. #define isoDep_PCBhasDID(pcb) \
  291. (((pcb) & ISODEP_PCB_DID_BIT) == \
  292. ISODEP_PCB_DID_BIT) /*!< Checks if pcb is indicating DID */
  293. #define isoDep_PCBhasNAD(pcb) \
  294. (((pcb) & ISODEP_PCB_NAD_BIT) == \
  295. ISODEP_PCB_NAD_BIT) /*!< Checks if pcb is indicating NAD */
  296. #define isoDep_PCBisIChaining(pcb) \
  297. (isoDep_PCBisIBlock(pcb) && \
  298. isoDep_PCBisChaining(pcb)) /*!< Checks if pcb is I-Block indicating chaining*/
  299. #define isoDep_PCBisSDeselect(pcb) \
  300. (isoDep_PCBisSBlock(pcb) && \
  301. isoDep_PCBisDeselect(pcb)) /*!< Checks if pcb is S-Block indicating DESELECT*/
  302. #define isoDep_PCBisSWTX(pcb) \
  303. (isoDep_PCBisSBlock(pcb) && \
  304. isoDep_PCBisWTX(pcb)) /*!< Checks if pcb is S-Block indicating WTX */
  305. #define isoDep_PCBisRACK(pcb) \
  306. (isoDep_PCBisRBlock(pcb) && \
  307. isoDep_PCBisACK(pcb)) /*!< Checks if pcb is R-Block indicating ACK */
  308. #define isoDep_PCBisRNAK(pcb) \
  309. (isoDep_PCBisRBlock(pcb) && \
  310. isoDep_PCBisNAK(pcb)) /*!< Checks if pcb is R-Block indicating NAK */
  311. #define isoDep_PCBIBlock(bn) \
  312. ((uint8_t)(0x00U | ISODEP_PCB_IBLOCK | ISODEP_PCB_B2_BIT | \
  313. ((bn) & \
  314. ISODEP_PCB_BN_MASK))) /*!< Returns an I-Block with the given block number (bn) */
  315. #define isoDep_PCBIBlockChaining(bn) \
  316. ((uint8_t)(isoDep_PCBIBlock(bn) | \
  317. ISODEP_PCB_CHAINING_BIT)) /*!< Returns an I-Block with the given block number (bn) indicating chaining */
  318. #define isoDep_PCBRBlock(bn) \
  319. ((uint8_t)(0x00U | ISODEP_PCB_RBLOCK | ISODEP_PCB_B6_BIT | ISODEP_PCB_B2_BIT | \
  320. ((bn) & \
  321. ISODEP_PCB_BN_MASK))) /*!< Returns an R-Block with the given block number (bn) */
  322. #define isoDep_PCBRACK(bn) \
  323. ((uint8_t)(isoDep_PCBRBlock(bn) | \
  324. ISODEP_PCB_ACK)) /*!< Returns an R-Block with the given block number (bn) indicating ACK */
  325. #define isoDep_PCBRNAK(bn) \
  326. ((uint8_t)(isoDep_PCBRBlock(bn) | \
  327. ISODEP_PCB_NAK)) /*!< Returns an R-Block with the given block number (bn) indicating NAK */
  328. #define isoDep_GetBN(pcb) \
  329. ((uint8_t)((pcb) & \
  330. ISODEP_PCB_BN_MASK)) /*!< Returns the block number (bn) from the given pcb */
  331. #define isoDep_GetWTXM(inf) \
  332. ((uint8_t)((inf) & \
  333. ISODEP_SWTX_WTXM_MASK)) /*!< Returns the WTX value from the given inf byte */
  334. #define isoDep_isWTXMValid(wtxm) \
  335. (((wtxm) >= ISODEP_WTXM_MIN) && \
  336. ((wtxm) <= ISODEP_WTXM_MAX)) /*!< Checks if the given wtxm is valid */
  337. #define isoDep_WTXMListenerMax(fwt) \
  338. (MIN( \
  339. (uint8_t)(ISODEP_FWT_LIS_MAX / (fwt)), \
  340. ISODEP_WTXM_MAX)) /*!< Calculates the Max WTXM value for the given fwt as a Listener */
  341. #define isoDepCalcdSGFT(s) \
  342. (384U * ((uint32_t)1U \
  343. << (s))) /*!< Calculates the dSFGT with given SFGI Digital 1.1 13.8.2.1 & A.6*/
  344. #define isoDepCalcSGFT(s) \
  345. (4096U * ((uint32_t)1U \
  346. << (s))) /*!< Calculates the SFGT with given SFGI Digital 1.1 13.8.2 */
  347. #define isoDep_PCBNextBN(bn) \
  348. (((uint8_t)(bn) ^ 0x01U) & \
  349. ISODEP_PCB_BN_MASK) /*!< Returns the value of the next block number based on bn */
  350. #define isoDep_PCBPrevBN(bn) \
  351. isoDep_PCBNextBN(bn) /*!< Returns the value of the previous block number based on bn */
  352. #define isoDep_ToggleBN(bn) \
  353. ((bn) = \
  354. (((bn) ^ 0x01U) & \
  355. ISODEP_PCB_BN_MASK)) /*!< Toggles the block number value of the given bn */
  356. #define isoDep_WTXAdjust(v) \
  357. ((v) - ((v) >> 3)) /*!< Adjust WTX timer value to a percentage of the total, current 88% */
  358. /*! ISO 14443-4 7.5.6.2 & Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  359. #define isoDepReEnableRx(rxB, rxBL, rxL) \
  360. rfalTransceiveBlockingTx(NULL, 0, rxB, rxBL, rxL, RFAL_TXRX_FLAGS_DEFAULT, RFAL_FWT_NONE)
  361. /*! Macro used for the blocking methods */
  362. #define rfalIsoDepRunBlocking(e, fn) \
  363. do { \
  364. (e) = (fn); \
  365. rfalWorker(); \
  366. } while((e) == ERR_BUSY)
  367. #define isoDepTimerStart(timer, time_ms) \
  368. do { \
  369. platformTimerDestroy(timer); \
  370. (timer) = platformTimerCreate((uint16_t)(time_ms)); \
  371. } while(0) /*!< Configures and starts the WTX timer */
  372. #define isoDepTimerisExpired(timer) \
  373. platformTimerIsExpired(timer) /*!< Checks WTX timer has expired */
  374. #define isoDepTimerDestroy(timer) \
  375. platformTimerDestroy(timer) /*!< Destroys WTX timer */
  376. /*
  377. ******************************************************************************
  378. * LOCAL DATA TYPES
  379. ******************************************************************************
  380. */
  381. /*! Internal structure to be used in handling of S(PARAMETERS) only */
  382. typedef struct {
  383. uint8_t pcb; /*!< PCB byte */
  384. rfalIsoDepSParameter sParam; /*!< S(PARAMETERS) */
  385. } rfalIsoDepControlMsgSParam;
  386. /*! Enumeration of the possible control message types */
  387. typedef enum {
  388. ISODEP_R_ACK, /*!< R-ACK Acknowledge */
  389. ISODEP_R_NAK, /*!< R-NACK Negative acknowledge */
  390. ISODEP_S_WTX, /*!< S-WTX Waiting Time Extension */
  391. ISODEP_S_DSL /*!< S-DSL Deselect */
  392. } rfalIsoDepControlMsg;
  393. /*! Enumeration of the IsoDep roles */
  394. typedef enum {
  395. ISODEP_ROLE_PCD, /*!< Perform as Reader/PCD */
  396. ISODEP_ROLE_PICC /*!< Perform as Card/PICC */
  397. } rfalIsoDepRole;
  398. /*! ISO-DEP layer states */
  399. typedef enum {
  400. ISODEP_ST_IDLE, /*!< Idle State */
  401. ISODEP_ST_PCD_TX, /*!< PCD Transmission State */
  402. ISODEP_ST_PCD_RX, /*!< PCD Reception State */
  403. ISODEP_ST_PCD_WAIT_DSL, /*!< PCD Wait for DSL response */
  404. ISODEP_ST_PICC_ACT_ATS, /*!< PICC has replied to RATS (ATS) */
  405. ISODEP_ST_PICC_ACT_ATTRIB, /*!< PICC has replied to ATTRIB */
  406. ISODEP_ST_PICC_RX, /*!< PICC Reception State */
  407. ISODEP_ST_PICC_SWTX, /*!< PICC Waiting Time eXtension */
  408. ISODEP_ST_PICC_SDSL, /*!< PICC S(DSL) response ongoing */
  409. ISODEP_ST_PICC_TX, /*!< PICC Transmission State */
  410. ISODEP_ST_PCD_ACT_RATS, /*!< PCD activation (RATS) */
  411. ISODEP_ST_PCD_ACT_PPS, /*!< PCD activation (PPS) */
  412. } rfalIsoDepState;
  413. /*! Holds all ISO-DEP data(counters, buffers, ID, timeouts, frame size) */
  414. typedef struct {
  415. rfalIsoDepState state; /*!< ISO-DEP module state */
  416. rfalIsoDepRole role; /*!< Current ISO-DEP role */
  417. uint8_t blockNumber; /*!< Current block number */
  418. uint8_t did; /*!< Current DID */
  419. uint8_t nad; /*!< Current DID */
  420. uint8_t cntIRetrys; /*!< I-Block retry counter */
  421. uint8_t cntRRetrys; /*!< R-Block retry counter */
  422. uint8_t cntSDslRetrys; /*!< S(DESELECT) retry counter */
  423. uint8_t cntSWtxRetrys; /*!< Overall S(WTX) retry counter */
  424. uint8_t cntSWtxNack; /*!< R(NACK) answered with S(WTX) counter */
  425. uint32_t fwt; /*!< Current FWT (Frame Waiting Time) */
  426. uint32_t dFwt; /*!< Current delta FWT */
  427. uint16_t fsx; /*!< Current FSx FSC or FSD (max Frame size) */
  428. bool isTxChaining; /*!< Flag for chaining on Tx */
  429. bool isRxChaining; /*!< Flag for chaining on Rx */
  430. uint8_t* txBuf; /*!< Tx buffer pointer */
  431. uint8_t* rxBuf; /*!< Rx buffer pointer */
  432. uint16_t txBufLen; /*!< Tx buffer length */
  433. uint16_t rxBufLen; /*!< Rx buffer length */
  434. uint8_t txBufInfPos; /*!< Start of payload in txBuf */
  435. uint8_t rxBufInfPos; /*!< Start of payload in rxBuf */
  436. uint16_t ourFsx; /*!< Our current FSx FSC or FSD (Frame size) */
  437. uint8_t lastPCB; /*!< Last PCB sent */
  438. uint8_t lastWTXM; /*!< Last WTXM sent */
  439. uint8_t atsTA; /*!< TA on ATS */
  440. uint8_t hdrLen; /*!< Current ISO-DEP length */
  441. rfalBitRate txBR; /*!< Current Tx Bit Rate */
  442. rfalBitRate rxBR; /*!< Current Rx Bit Rate */
  443. uint16_t* rxLen; /*!< Output parameter ptr to Rx length */
  444. bool* rxChaining; /*!< Output parameter ptr to Rx chaining flag */
  445. uint32_t WTXTimer; /*!< Timer used for WTX */
  446. bool lastDID00; /*!< Last PCD block had DID flag (for DID = 0) */
  447. bool isTxPending; /*!< Flag pending Block while waiting WTX Ack */
  448. bool isWait4WTX; /*!< Flag for waiting WTX Ack */
  449. uint8_t maxRetriesI; /*!< Number of retries for a I-Block */
  450. uint8_t maxRetriesR; /*!< Number of retries for a R-Block */
  451. uint8_t maxRetriesSDSL; /*!< Number of retries for S(DESELECT) errors */
  452. uint8_t maxRetriesSWTX; /*!< Number of retries for S(WTX) errors */
  453. uint8_t maxRetriesSnWTX; /*!< Number of retries S(WTX) replied w NACK */
  454. uint8_t maxRetriesRATS; /*!< Number of retries for RATS */
  455. rfalComplianceMode compMode; /*!< Compliance mode */
  456. uint8_t ctrlBuf[ISODEP_CONTROLMSG_BUF_LEN]; /*!< Control msg buf */
  457. uint16_t ctrlRxLen; /*!< Control msg rcvd len */
  458. union { /* PRQA S 0750 # MISRA 19.2 - Members of the union will not be used concurrently, only one frame at a time */
  459. #if RFAL_FEATURE_NFCA
  460. rfalIsoDepRats ratsReq;
  461. rfalIsoDepPpsReq ppsReq;
  462. #endif /* RFAL_FEATURE_NFCA */
  463. #if RFAL_FEATURE_NFCB
  464. rfalIsoDepAttribCmd attribReq;
  465. #endif /* RFAL_FEATURE_NFCB */
  466. } actv; /*!< Activation buffer */
  467. uint8_t* rxLen8; /*!< Receive length (8-bit) */
  468. rfalIsoDepDevice* actvDev; /*!< Activation Device Info */
  469. rfalIsoDepListenActvParam actvParam; /*!< Listen Activation context */
  470. rfalIsoDepApduTxRxParam APDUParam; /*!< APDU TxRx params */
  471. uint16_t APDUTxPos; /*!< APDU Tx position */
  472. uint16_t APDURxPos; /*!< APDU Rx position */
  473. bool isAPDURxChaining; /*!< APDU Transceive chaining flag */
  474. } rfalIsoDep;
  475. /*
  476. ******************************************************************************
  477. * LOCAL VARIABLES
  478. ******************************************************************************
  479. */
  480. static rfalIsoDep gIsoDep; /*!< ISO-DEP Module instance */
  481. /*
  482. ******************************************************************************
  483. * LOCAL FUNCTION PROTOTYPES
  484. ******************************************************************************
  485. */
  486. static void isoDepClearCounters(void);
  487. static ReturnCode
  488. isoDepTx(uint8_t pcb, const uint8_t* txBuf, uint8_t* infBuf, uint16_t infLen, uint32_t fwt);
  489. static ReturnCode isoDepHandleControlMsg(rfalIsoDepControlMsg controlMsg, uint8_t param);
  490. static void rfalIsoDepApdu2IBLockParam(
  491. rfalIsoDepApduTxRxParam apduParam,
  492. rfalIsoDepTxRxParam* iBlockParam,
  493. uint16_t txPos,
  494. uint16_t rxPos);
  495. #if RFAL_FEATURE_ISO_DEP_POLL
  496. static ReturnCode isoDepDataExchangePCD(uint16_t* outActRxLen, bool* outIsChaining);
  497. static void rfalIsoDepCalcBitRate(
  498. rfalBitRate maxAllowedBR,
  499. uint8_t piccBRCapability,
  500. rfalBitRate* dsi,
  501. rfalBitRate* dri);
  502. static uint32_t rfalIsoDepSFGI2SFGT(uint8_t sfgi);
  503. #if RFAL_FEATURE_NFCA
  504. static ReturnCode
  505. rfalIsoDepStartRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts* ats, uint8_t* atsLen);
  506. static ReturnCode rfalIsoDepGetRATSStatus(void);
  507. static ReturnCode
  508. rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes* ppsRes);
  509. static ReturnCode rfalIsoDepGetPPSSTatus(void);
  510. #endif /* RFAL_FEATURE_NFCA */
  511. #if RFAL_FEATURE_NFCB
  512. static ReturnCode rfalIsoDepStartATTRIB(
  513. const uint8_t* nfcid0,
  514. uint8_t PARAM1,
  515. rfalBitRate DSI,
  516. rfalBitRate DRI,
  517. rfalIsoDepFSxI FSDI,
  518. uint8_t PARAM3,
  519. uint8_t DID,
  520. const uint8_t* HLInfo,
  521. uint8_t HLInfoLen,
  522. uint32_t fwt,
  523. rfalIsoDepAttribRes* attribRes,
  524. uint8_t* attribResLen);
  525. static ReturnCode rfalIsoDepGetATTRIBStatus(void);
  526. #endif /* RFAL_FEATURE_NFCB */
  527. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  528. #if RFAL_FEATURE_ISO_DEP_LISTEN
  529. static ReturnCode isoDepDataExchangePICC(void);
  530. static ReturnCode isoDepReSendControlMsg(void);
  531. #endif
  532. /*
  533. ******************************************************************************
  534. * LOCAL FUNCTIONS
  535. ******************************************************************************
  536. */
  537. /*******************************************************************************/
  538. static void isoDepClearCounters(void) {
  539. gIsoDep.cntIRetrys = 0;
  540. gIsoDep.cntRRetrys = 0;
  541. gIsoDep.cntSDslRetrys = 0;
  542. gIsoDep.cntSWtxRetrys = 0;
  543. gIsoDep.cntSWtxNack = 0;
  544. }
  545. /*******************************************************************************/
  546. static ReturnCode
  547. isoDepTx(uint8_t pcb, const uint8_t* txBuf, uint8_t* infBuf, uint16_t infLen, uint32_t fwt) {
  548. uint8_t* txBlock;
  549. uint16_t txBufLen;
  550. uint8_t computedPcb;
  551. rfalTransceiveContext ctx;
  552. txBlock = infBuf; /* Point to beginning of the INF, and go backwards */
  553. gIsoDep.lastPCB = pcb; /* Store the last PCB sent */
  554. if(infLen > 0U) {
  555. if(((uint32_t)infBuf - (uint32_t)txBuf) <
  556. gIsoDep.hdrLen) /* Check that we can fit the header in the given space */
  557. {
  558. return ERR_NOMEM;
  559. }
  560. }
  561. /*******************************************************************************/
  562. /* Compute optional PCB bits */
  563. computedPcb = pcb;
  564. if((gIsoDep.did != RFAL_ISODEP_NO_DID) ||
  565. ((gIsoDep.did == RFAL_ISODEP_DID_00) && gIsoDep.lastDID00)) {
  566. computedPcb |= ISODEP_PCB_DID_BIT;
  567. }
  568. if(gIsoDep.nad != RFAL_ISODEP_NO_NAD) {
  569. computedPcb |= ISODEP_PCB_NAD_BIT;
  570. }
  571. if((gIsoDep.isTxChaining) && (isoDep_PCBisIBlock(computedPcb))) {
  572. computedPcb |= ISODEP_PCB_CHAINING_BIT;
  573. }
  574. /*******************************************************************************/
  575. /* Compute Payload on the given txBuf, start by the PCB | DID | NAD | before INF */
  576. if(gIsoDep.nad != RFAL_ISODEP_NO_NAD) {
  577. *(--txBlock) = gIsoDep.nad; /* NAD is optional */
  578. }
  579. if((gIsoDep.did != RFAL_ISODEP_NO_DID) ||
  580. ((gIsoDep.did == RFAL_ISODEP_DID_00) && gIsoDep.lastDID00)) {
  581. *(--txBlock) = gIsoDep.did; /* DID is optional */
  582. }
  583. *(--txBlock) = computedPcb; /* PCB always present */
  584. txBufLen =
  585. (infLen +
  586. (uint16_t)((uint32_t)infBuf - (uint32_t)txBlock)); /* Calculate overall buffer size */
  587. if(txBufLen > (gIsoDep.fsx -
  588. ISODEP_CRC_LEN)) /* Check if msg length violates the maximum frame size FSC */
  589. {
  590. return ERR_NOTSUPP;
  591. }
  592. rfalCreateByteFlagsTxRxContext(
  593. ctx,
  594. txBlock,
  595. txBufLen,
  596. gIsoDep.rxBuf,
  597. gIsoDep.rxBufLen,
  598. gIsoDep.rxLen,
  599. RFAL_TXRX_FLAGS_DEFAULT,
  600. ((gIsoDep.role == ISODEP_ROLE_PICC) ? RFAL_FWT_NONE : fwt));
  601. return rfalStartTransceive(&ctx);
  602. }
  603. /*******************************************************************************/
  604. static ReturnCode isoDepHandleControlMsg(rfalIsoDepControlMsg controlMsg, uint8_t param) {
  605. uint8_t pcb;
  606. uint8_t infLen;
  607. uint32_t fwtTemp;
  608. infLen = 0;
  609. fwtTemp = (gIsoDep.fwt + gIsoDep.dFwt);
  610. ST_MEMSET(gIsoDep.ctrlBuf, 0x00, ISODEP_CONTROLMSG_BUF_LEN);
  611. switch(controlMsg) {
  612. /*******************************************************************************/
  613. case ISODEP_R_ACK:
  614. if(gIsoDep.cntRRetrys++ > gIsoDep.maxRetriesR) {
  615. return ERR_TIMEOUT; /* NFC Forum mandates timeout or transmission error depending on previous errors */
  616. }
  617. pcb = isoDep_PCBRACK(gIsoDep.blockNumber);
  618. break;
  619. /*******************************************************************************/
  620. case ISODEP_R_NAK:
  621. if((gIsoDep.cntRRetrys++ > gIsoDep.maxRetriesR) || /* Max R Block retries reached */
  622. (gIsoDep.cntSWtxNack >=
  623. gIsoDep
  624. .maxRetriesSnWTX)) /* Max number PICC is allowed to respond with S(WTX) to R(NAK) */
  625. {
  626. return ERR_TIMEOUT;
  627. }
  628. pcb = isoDep_PCBRNAK(gIsoDep.blockNumber);
  629. break;
  630. /*******************************************************************************/
  631. case ISODEP_S_WTX:
  632. if((gIsoDep.cntSWtxRetrys++ > gIsoDep.maxRetriesSWTX) &&
  633. (gIsoDep.maxRetriesSWTX != RFAL_ISODEP_MAX_WTX_RETRYS_ULTD)) {
  634. return ERR_PROTO;
  635. }
  636. /* Check if WTXM is valid */
  637. if(!isoDep_isWTXMValid(param)) {
  638. return ERR_PROTO;
  639. }
  640. if(gIsoDep.role == ISODEP_ROLE_PCD) {
  641. /* Calculate temp Wait Time eXtension */
  642. fwtTemp = (gIsoDep.fwt * param);
  643. fwtTemp = MIN(RFAL_ISODEP_MAX_FWT, fwtTemp);
  644. fwtTemp += gIsoDep.dFwt;
  645. }
  646. pcb = ISODEP_PCB_SWTX;
  647. gIsoDep.ctrlBuf[RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN + infLen++] = param;
  648. break;
  649. /*******************************************************************************/
  650. case ISODEP_S_DSL:
  651. if(gIsoDep.cntSDslRetrys++ > gIsoDep.maxRetriesSDSL) {
  652. return ERR_TIMEOUT; /* NFC Forum mandates timeout or transmission error depending on previous errors */
  653. }
  654. if(gIsoDep.role == ISODEP_ROLE_PCD) {
  655. /* Digital 1.0 - 13.2.7.3 Poller must wait fwtDEACTIVATION */
  656. fwtTemp = ISODEP_FWT_DEACTIVATION;
  657. gIsoDep.state = ISODEP_ST_PCD_WAIT_DSL;
  658. }
  659. pcb = ISODEP_PCB_SDSL;
  660. break;
  661. /*******************************************************************************/
  662. default:
  663. return ERR_INTERNAL;
  664. }
  665. return isoDepTx(
  666. pcb,
  667. gIsoDep.ctrlBuf,
  668. &gIsoDep.ctrlBuf[RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN],
  669. infLen,
  670. fwtTemp);
  671. }
  672. #if RFAL_FEATURE_ISO_DEP_LISTEN
  673. /*******************************************************************************/
  674. static ReturnCode isoDepReSendControlMsg(void) {
  675. if(isoDep_PCBisRACK(gIsoDep.lastPCB)) {
  676. return isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM);
  677. }
  678. if(isoDep_PCBisRNAK(gIsoDep.lastPCB)) {
  679. return isoDepHandleControlMsg(ISODEP_R_NAK, RFAL_ISODEP_NO_PARAM);
  680. }
  681. if(isoDep_PCBisSDeselect(gIsoDep.lastPCB)) {
  682. return isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM);
  683. }
  684. if(isoDep_PCBisSWTX(gIsoDep.lastPCB)) {
  685. return isoDepHandleControlMsg(ISODEP_S_WTX, gIsoDep.lastWTXM);
  686. }
  687. return ERR_WRONG_STATE;
  688. }
  689. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  690. /*
  691. ******************************************************************************
  692. * GLOBAL FUNCTIONS
  693. ******************************************************************************
  694. */
  695. /*******************************************************************************/
  696. void rfalIsoDepInitialize(void) {
  697. gIsoDep.state = ISODEP_ST_IDLE;
  698. gIsoDep.role = ISODEP_ROLE_PCD;
  699. gIsoDep.did = RFAL_ISODEP_NO_DID;
  700. gIsoDep.nad = RFAL_ISODEP_NO_NAD;
  701. gIsoDep.blockNumber = 0;
  702. gIsoDep.isTxChaining = false;
  703. gIsoDep.isRxChaining = false;
  704. gIsoDep.lastDID00 = false;
  705. gIsoDep.lastPCB = ISODEP_PCB_INVALID;
  706. gIsoDep.fsx = (uint16_t)RFAL_ISODEP_FSX_16;
  707. gIsoDep.ourFsx = (uint16_t)RFAL_ISODEP_FSX_16;
  708. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  709. gIsoDep.rxLen = NULL;
  710. gIsoDep.rxBuf = NULL;
  711. gIsoDep.rxBufInfPos = 0U;
  712. gIsoDep.txBufInfPos = 0U;
  713. gIsoDep.isTxPending = false;
  714. gIsoDep.isWait4WTX = false;
  715. gIsoDep.compMode = RFAL_COMPLIANCE_MODE_NFC;
  716. gIsoDep.maxRetriesR = RFAL_ISODEP_MAX_R_RETRYS;
  717. gIsoDep.maxRetriesI = RFAL_ISODEP_MAX_I_RETRYS;
  718. gIsoDep.maxRetriesSDSL = RFAL_ISODEP_MAX_DSL_RETRYS;
  719. gIsoDep.maxRetriesSWTX = RFAL_ISODEP_MAX_WTX_RETRYS;
  720. gIsoDep.maxRetriesSnWTX = RFAL_ISODEP_MAX_WTX_NACK_RETRYS;
  721. gIsoDep.maxRetriesRATS = RFAL_ISODEP_RATS_RETRIES;
  722. gIsoDep.APDURxPos = 0;
  723. gIsoDep.APDUTxPos = 0;
  724. gIsoDep.APDUParam.rxLen = NULL;
  725. gIsoDep.APDUParam.rxBuf = NULL;
  726. gIsoDep.APDUParam.txBuf = NULL;
  727. isoDepClearCounters();
  728. /* Destroy any ongoing WTX timer */
  729. isoDepTimerDestroy(gIsoDep.WTXTimer);
  730. gIsoDep.WTXTimer = 0U;
  731. }
  732. /*******************************************************************************/
  733. void rfalIsoDepInitializeWithParams(
  734. rfalComplianceMode compMode,
  735. uint8_t maxRetriesR,
  736. uint8_t maxRetriesSnWTX,
  737. uint8_t maxRetriesSWTX,
  738. uint8_t maxRetriesSDSL,
  739. uint8_t maxRetriesI,
  740. uint8_t maxRetriesRATS) {
  741. rfalIsoDepInitialize();
  742. gIsoDep.compMode = compMode;
  743. gIsoDep.maxRetriesR = maxRetriesR;
  744. gIsoDep.maxRetriesSnWTX = maxRetriesSnWTX;
  745. gIsoDep.maxRetriesSWTX = maxRetriesSWTX;
  746. gIsoDep.maxRetriesSDSL = maxRetriesSDSL;
  747. gIsoDep.maxRetriesI = maxRetriesI;
  748. gIsoDep.maxRetriesRATS = maxRetriesRATS;
  749. }
  750. #if RFAL_FEATURE_ISO_DEP_POLL
  751. /*******************************************************************************/
  752. static ReturnCode isoDepDataExchangePCD(uint16_t* outActRxLen, bool* outIsChaining) {
  753. ReturnCode ret;
  754. uint8_t rxPCB;
  755. /* Check out parameters */
  756. if((outActRxLen == NULL) || (outIsChaining == NULL)) {
  757. return ERR_PARAM;
  758. }
  759. *outIsChaining = false;
  760. /* Calculate header required and check if the buffers InfPositions are suitable */
  761. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  762. if(gIsoDep.did != RFAL_ISODEP_NO_DID) {
  763. gIsoDep.hdrLen += RFAL_ISODEP_DID_LEN;
  764. }
  765. if(gIsoDep.nad != RFAL_ISODEP_NO_NAD) {
  766. gIsoDep.hdrLen += RFAL_ISODEP_NAD_LEN;
  767. }
  768. /* Check if there is enough space before the infPos to append ISO-DEP headers on rx and tx */
  769. if((gIsoDep.rxBufInfPos < gIsoDep.hdrLen) || (gIsoDep.txBufInfPos < gIsoDep.hdrLen)) {
  770. return ERR_PARAM;
  771. }
  772. /*******************************************************************************/
  773. switch(gIsoDep.state) {
  774. /*******************************************************************************/
  775. case ISODEP_ST_IDLE:
  776. return ERR_NONE;
  777. /*******************************************************************************/
  778. case ISODEP_ST_PCD_TX:
  779. ret = isoDepTx(
  780. isoDep_PCBIBlock(gIsoDep.blockNumber),
  781. gIsoDep.txBuf,
  782. &gIsoDep.txBuf[gIsoDep.txBufInfPos],
  783. gIsoDep.txBufLen,
  784. (gIsoDep.fwt + gIsoDep.dFwt));
  785. switch(ret) {
  786. case ERR_NONE:
  787. gIsoDep.state = ISODEP_ST_PCD_RX;
  788. break;
  789. default:
  790. return ret;
  791. }
  792. /* fall through */
  793. /*******************************************************************************/
  794. case ISODEP_ST_PCD_WAIT_DSL: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  795. case ISODEP_ST_PCD_RX:
  796. ret = rfalGetTransceiveStatus();
  797. switch(ret) {
  798. /* Data rcvd with error or timeout -> Send R-NAK */
  799. case ERR_TIMEOUT:
  800. case ERR_CRC:
  801. case ERR_PAR:
  802. case ERR_FRAMING: /* added to handle test cases scenario TC_POL_NFCB_T4AT_BI_82_x_y & TC_POL_NFCB_T4BT_BI_82_x_y */
  803. case ERR_INCOMPLETE_BYTE: /* added to handle test cases scenario TC_POL_NFCB_T4AT_BI_82_x_y & TC_POL_NFCB_T4BT_BI_82_x_y */
  804. if(gIsoDep
  805. .isRxChaining) { /* Rule 5 - In PICC chaining when a invalid/timeout occurs -> R-ACK */
  806. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  807. } else if(
  808. gIsoDep.state ==
  809. ISODEP_ST_PCD_WAIT_DSL) { /* Rule 8 - If s-Deselect response fails MAY retransmit */
  810. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM));
  811. } else { /* Rule 4 - When a invalid block or timeout occurs -> R-NACK */
  812. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_NAK, RFAL_ISODEP_NO_PARAM));
  813. }
  814. return ERR_BUSY;
  815. case ERR_NONE:
  816. break;
  817. case ERR_BUSY:
  818. return ERR_BUSY; /* Debug purposes */
  819. default:
  820. return ret;
  821. }
  822. /*******************************************************************************/
  823. /* No error, process incoming msg */
  824. /*******************************************************************************/
  825. (*outActRxLen) = rfalConvBitsToBytes(*outActRxLen);
  826. /* Check rcvd msg length, cannot be less then the expected header */
  827. if(((*outActRxLen) < gIsoDep.hdrLen) || ((*outActRxLen) >= gIsoDep.ourFsx)) {
  828. return ERR_PROTO;
  829. }
  830. /* Grab rcvd PCB */
  831. rxPCB = gIsoDep.rxBuf[ISODEP_PCB_POS];
  832. /* EMVCo doesn't allow usage of for CID or NAD EMVCo 2.6 TAble 10.2 */
  833. if((gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) &&
  834. (isoDep_PCBhasDID(rxPCB) || isoDep_PCBhasNAD(rxPCB))) {
  835. return ERR_PROTO;
  836. }
  837. /* If we are expecting DID, check if PCB signals its presence and if device ID match*/
  838. if((gIsoDep.did != RFAL_ISODEP_NO_DID) &&
  839. (!isoDep_PCBhasDID(rxPCB) || (gIsoDep.did != gIsoDep.rxBuf[ISODEP_DID_POS]))) {
  840. return ERR_PROTO;
  841. }
  842. /*******************************************************************************/
  843. /* Process S-Block */
  844. /*******************************************************************************/
  845. if(isoDep_PCBisSBlock(rxPCB)) {
  846. /* Check if is a Wait Time eXtension */
  847. if(isoDep_PCBisSWTX(rxPCB)) {
  848. /* Check if PICC has requested S(WTX) as response to R(NAK) EMVCo 3.0 10.3.5.5 / Digital 2.0 16.2.6.5 */
  849. if(isoDep_PCBisRNAK(gIsoDep.lastPCB)) {
  850. gIsoDep.cntSWtxNack++; /* Count S(WTX) upon R(NAK) */
  851. gIsoDep.cntRRetrys = 0; /* Reset R-Block counter has PICC has responded */
  852. } else {
  853. gIsoDep.cntSWtxNack = 0; /* Reset R(NACK)->S(WTX) counter */
  854. }
  855. /* Rule 3 - respond to S-block: get 1st INF byte S(STW): Power + WTXM */
  856. EXIT_ON_ERR(
  857. ret,
  858. isoDepHandleControlMsg(
  859. ISODEP_S_WTX, isoDep_GetWTXM(gIsoDep.rxBuf[gIsoDep.hdrLen])));
  860. return ERR_BUSY;
  861. }
  862. /* Check if is a deselect response */
  863. if(isoDep_PCBisSDeselect(rxPCB)) {
  864. if(gIsoDep.state == ISODEP_ST_PCD_WAIT_DSL) {
  865. rfalIsoDepInitialize(); /* Session finished reInit vars */
  866. return ERR_NONE;
  867. }
  868. /* Deselect response not expected */
  869. /* fall through to PROTO error */
  870. }
  871. /* Unexpected S-Block */
  872. return ERR_PROTO;
  873. }
  874. /*******************************************************************************/
  875. /* Process R-Block */
  876. /*******************************************************************************/
  877. else if(isoDep_PCBisRBlock(rxPCB)) {
  878. if(isoDep_PCBisRACK(rxPCB)) /* Check if is a R-ACK */
  879. {
  880. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) /* Expected block number */
  881. {
  882. /* Rule B - ACK with expected bn -> Increment block number */
  883. gIsoDep.blockNumber = isoDep_PCBNextBN(gIsoDep.blockNumber);
  884. /* R-ACK only allowed when PCD chaining */
  885. if(!gIsoDep.isTxChaining) {
  886. return ERR_PROTO;
  887. }
  888. /* Rule 7 - Chaining transaction done, continue chaining */
  889. isoDepClearCounters();
  890. return ERR_NONE; /* This block has been transmitted */
  891. } else {
  892. /* Rule 6 - R-ACK with wrong block number retransmit */
  893. /* Digital 2.0 16.2.5.4 - Retransmit maximum two times */
  894. /* EMVCo 3.0 10.3.4.3 - PCD may re-transmit the last I-Block or report error */
  895. if(gIsoDep.cntIRetrys++ < gIsoDep.maxRetriesI) {
  896. gIsoDep.cntRRetrys = 0; /* Clear R counter only */
  897. gIsoDep.state = ISODEP_ST_PCD_TX;
  898. return ERR_BUSY;
  899. }
  900. return ERR_TIMEOUT; /* NFC Forum mandates timeout or transmission error depending on previous errors */
  901. }
  902. } else /* Unexpected R-Block */
  903. {
  904. return ERR_PROTO;
  905. }
  906. }
  907. /*******************************************************************************/
  908. /* Process I-Block */
  909. /*******************************************************************************/
  910. else if(isoDep_PCBisIBlock(rxPCB)) {
  911. /*******************************************************************************/
  912. /* is PICC performing chaining */
  913. if(isoDep_PCBisChaining(rxPCB)) {
  914. gIsoDep.isRxChaining = true;
  915. *outIsChaining = true;
  916. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) {
  917. /* Rule B - ACK with correct block number -> Increase Block number */
  918. isoDep_ToggleBN(gIsoDep.blockNumber);
  919. isoDepClearCounters(); /* Clear counters in case R counter is already at max */
  920. /* Rule 2 - Send ACK */
  921. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  922. /* Received I-Block with chaining, send current data to DH */
  923. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  924. *outActRxLen -= gIsoDep.hdrLen;
  925. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*outActRxLen > 0U)) {
  926. ST_MEMMOVE(
  927. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  928. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  929. *outActRxLen);
  930. }
  931. isoDepClearCounters();
  932. return ERR_AGAIN; /* Send Again signalling to run again, but some chaining data has arrived */
  933. } else {
  934. /* Rule 5 - PICC chaining invalid I-Block -> R-ACK */
  935. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  936. }
  937. return ERR_BUSY;
  938. }
  939. gIsoDep.isRxChaining = false; /* clear PICC chaining flag */
  940. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) {
  941. /* Rule B - I-Block with correct block number -> Increase Block number */
  942. isoDep_ToggleBN(gIsoDep.blockNumber);
  943. /* I-Block transaction done successfully */
  944. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  945. *outActRxLen -= gIsoDep.hdrLen;
  946. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*outActRxLen > 0U)) {
  947. ST_MEMMOVE(
  948. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  949. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  950. *outActRxLen);
  951. }
  952. gIsoDep.state = ISODEP_ST_IDLE;
  953. isoDepClearCounters();
  954. return ERR_NONE;
  955. } else {
  956. if((gIsoDep.compMode != RFAL_COMPLIANCE_MODE_ISO)) {
  957. /* Invalid Block (not chaining) -> Raise error Digital 1.1 15.2.6.4 EMVCo 2.6 10.3.5.4 */
  958. return ERR_PROTO;
  959. }
  960. /* Rule 4 - Invalid Block -> R-NAK */
  961. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_NAK, RFAL_ISODEP_NO_PARAM));
  962. return ERR_BUSY;
  963. }
  964. } else /* not S/R/I - Block */
  965. {
  966. return ERR_PROTO;
  967. }
  968. /* fall through */
  969. /*******************************************************************************/
  970. default: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  971. /* MISRA 16.4: no empty default (comment will suffice) */
  972. break;
  973. }
  974. return ERR_INTERNAL;
  975. }
  976. /*******************************************************************************/
  977. ReturnCode rfalIsoDepDeselect(void) {
  978. ReturnCode ret;
  979. uint32_t cntRerun;
  980. bool dummyB;
  981. /*******************************************************************************/
  982. /* Using local static vars and static config to cope with a Deselect after *
  983. * RATS\ATTRIB without any I-Block exchanged */
  984. gIsoDep.rxLen = &gIsoDep.ctrlRxLen;
  985. gIsoDep.rxBuf = gIsoDep.ctrlBuf;
  986. gIsoDep.rxBufLen = ISODEP_CONTROLMSG_BUF_LEN - (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN);
  987. gIsoDep.rxBufInfPos = (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN);
  988. gIsoDep.txBufInfPos = (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN);
  989. /*******************************************************************************/
  990. /* The Deselect process is being done blocking, Digital 1.0 - 13.2.7.1 MUST wait response and retry*/
  991. /* Set the maximum reruns while we will wait for a response */
  992. cntRerun = ISODEP_MAX_RERUNS;
  993. /* Send DSL request and run protocol until get a response, error or "timeout" */
  994. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM));
  995. do {
  996. ret = isoDepDataExchangePCD(gIsoDep.rxLen, &dummyB);
  997. rfalWorker();
  998. } while(((cntRerun--) != 0U) && (ret == ERR_BUSY));
  999. rfalIsoDepInitialize();
  1000. return ((cntRerun == 0U) ? ERR_TIMEOUT : ret);
  1001. }
  1002. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  1003. /*******************************************************************************/
  1004. uint32_t rfalIsoDepFWI2FWT(uint8_t fwi) {
  1005. uint32_t result;
  1006. uint8_t tmpFWI;
  1007. tmpFWI = fwi;
  1008. /* RFU values -> take the default value
  1009. * Digital 1.0 11.6.2.17 FWI[1,14]
  1010. * Digital 1.1 7.6.2.22 FWI[0,14]
  1011. * EMVCo 2.6 Table A.5 FWI[0,14] */
  1012. if(tmpFWI > ISODEP_FWI_MAX) {
  1013. tmpFWI = RFAL_ISODEP_FWI_DEFAULT;
  1014. }
  1015. /* FWT = (256 x 16/fC) x 2^FWI => 2^(FWI+12) Digital 1.1 13.8.1 & 7.9.1 */
  1016. result = ((uint32_t)1U << (tmpFWI + 12U));
  1017. result = MIN(RFAL_ISODEP_MAX_FWT, result); /* Maximum Frame Waiting Time must be fulfilled */
  1018. return result;
  1019. }
  1020. /*******************************************************************************/
  1021. uint16_t rfalIsoDepFSxI2FSx(uint8_t FSxI) {
  1022. uint16_t fsx;
  1023. uint8_t fsi;
  1024. /* Enforce maximum FSxI/FSx allowed - NFC Forum and EMVCo differ */
  1025. fsi =
  1026. ((gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ? MIN(FSxI, RFAL_ISODEP_FSDI_MAX_EMV) :
  1027. MIN(FSxI, RFAL_ISODEP_FSDI_MAX_NFC));
  1028. switch(fsi) {
  1029. case(uint8_t)RFAL_ISODEP_FSXI_16:
  1030. fsx = (uint16_t)RFAL_ISODEP_FSX_16;
  1031. break;
  1032. case(uint8_t)RFAL_ISODEP_FSXI_24:
  1033. fsx = (uint16_t)RFAL_ISODEP_FSX_24;
  1034. break;
  1035. case(uint8_t)RFAL_ISODEP_FSXI_32:
  1036. fsx = (uint16_t)RFAL_ISODEP_FSX_32;
  1037. break;
  1038. case(uint8_t)RFAL_ISODEP_FSXI_40:
  1039. fsx = (uint16_t)RFAL_ISODEP_FSX_40;
  1040. break;
  1041. case(uint8_t)RFAL_ISODEP_FSXI_48:
  1042. fsx = (uint16_t)RFAL_ISODEP_FSX_48;
  1043. break;
  1044. case(uint8_t)RFAL_ISODEP_FSXI_64:
  1045. fsx = (uint16_t)RFAL_ISODEP_FSX_64;
  1046. break;
  1047. case(uint8_t)RFAL_ISODEP_FSXI_96:
  1048. fsx = (uint16_t)RFAL_ISODEP_FSX_96;
  1049. break;
  1050. case(uint8_t)RFAL_ISODEP_FSXI_128:
  1051. fsx = (uint16_t)RFAL_ISODEP_FSX_128;
  1052. break;
  1053. case(uint8_t)RFAL_ISODEP_FSXI_256:
  1054. fsx = (uint16_t)RFAL_ISODEP_FSX_256;
  1055. break;
  1056. case(uint8_t)RFAL_ISODEP_FSXI_512:
  1057. fsx = (uint16_t)RFAL_ISODEP_FSX_512;
  1058. break;
  1059. case(uint8_t)RFAL_ISODEP_FSXI_1024:
  1060. fsx = (uint16_t)RFAL_ISODEP_FSX_1024;
  1061. break;
  1062. case(uint8_t)RFAL_ISODEP_FSXI_2048:
  1063. fsx = (uint16_t)RFAL_ISODEP_FSX_2048;
  1064. break;
  1065. case(uint8_t)RFAL_ISODEP_FSXI_4096:
  1066. fsx = (uint16_t)RFAL_ISODEP_FSX_4096;
  1067. break;
  1068. default:
  1069. fsx = (uint16_t)RFAL_ISODEP_FSX_256;
  1070. break;
  1071. }
  1072. return fsx;
  1073. }
  1074. #if RFAL_FEATURE_ISO_DEP_LISTEN
  1075. /*******************************************************************************/
  1076. bool rfalIsoDepIsRats(const uint8_t* buf, uint8_t bufLen) {
  1077. if(buf != NULL) {
  1078. if((RFAL_ISODEP_CMD_RATS == (uint8_t)*buf) && (sizeof(rfalIsoDepRats) == bufLen)) {
  1079. return true;
  1080. }
  1081. }
  1082. return false;
  1083. }
  1084. /*******************************************************************************/
  1085. bool rfalIsoDepIsAttrib(const uint8_t* buf, uint8_t bufLen) {
  1086. if(buf != NULL) {
  1087. if((RFAL_ISODEP_CMD_ATTRIB == (uint8_t)*buf) &&
  1088. (RFAL_ISODEP_ATTRIB_REQ_MIN_LEN <= bufLen) &&
  1089. ((RFAL_ISODEP_ATTRIB_REQ_MIN_LEN + RFAL_ISODEP_ATTRIB_HLINFO_LEN) >= bufLen)) {
  1090. return true;
  1091. }
  1092. }
  1093. return false;
  1094. }
  1095. /*******************************************************************************/
  1096. ReturnCode rfalIsoDepListenStartActivation(
  1097. rfalIsoDepAtsParam* atsParam,
  1098. const rfalIsoDepAttribResParam* attribResParam,
  1099. const uint8_t* buf,
  1100. uint16_t bufLen,
  1101. rfalIsoDepListenActvParam actParam) {
  1102. uint8_t* txBuf;
  1103. uint8_t bufIt;
  1104. const uint8_t* buffer = buf;
  1105. /*******************************************************************************/
  1106. bufIt = 0;
  1107. txBuf =
  1108. (uint8_t*)actParam
  1109. .rxBuf; /* Use the rxBuf as TxBuf as well, the struct enforces a size enough MAX( NFCA_ATS_MAX_LEN, NFCB_ATTRIB_RES_MAX_LEN ) */
  1110. gIsoDep.txBR = RFAL_BR_106;
  1111. gIsoDep.rxBR = RFAL_BR_106;
  1112. /* Check for a valid buffer pointer */
  1113. if(buffer == NULL) {
  1114. return ERR_PARAM;
  1115. }
  1116. /*******************************************************************************/
  1117. if(*buffer == RFAL_ISODEP_CMD_RATS) {
  1118. /* Check ATS parameters */
  1119. if(atsParam == NULL) {
  1120. return ERR_PARAM;
  1121. }
  1122. /* If requested copy RATS to device info */
  1123. if(actParam.isoDepDev != NULL) {
  1124. ST_MEMCPY(
  1125. (uint8_t*)&actParam.isoDepDev->activation.A.Poller.RATS,
  1126. buffer,
  1127. sizeof(rfalIsoDepRats)); /* Copy RATS' CMD + PARAM */
  1128. }
  1129. /*******************************************************************************/
  1130. /* Process RATS */
  1131. buffer++;
  1132. gIsoDep.fsx = rfalIsoDepFSxI2FSx(
  1133. (((*buffer) & RFAL_ISODEP_RATS_PARAM_FSDI_MASK) >> RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT));
  1134. gIsoDep.did = (*buffer & RFAL_ISODEP_DID_MASK);
  1135. /*******************************************************************************/
  1136. /* Digital 1.1 13.6.1.8 - DID as to between 0 and 14 */
  1137. if(gIsoDep.did > RFAL_ISODEP_DID_MAX) {
  1138. return ERR_PROTO;
  1139. }
  1140. /* Check if we are configured to support DID */
  1141. if((gIsoDep.did != RFAL_ISODEP_DID_00) && (!atsParam->didSupport)) {
  1142. return ERR_NOTSUPP;
  1143. }
  1144. /*******************************************************************************/
  1145. /* Check RFAL supported bit rates */
  1146. if((!(RFAL_SUPPORT_BR_CE_A_212) &&
  1147. (((atsParam->ta & RFAL_ISODEP_ATS_TA_DPL_212) != 0U) ||
  1148. ((atsParam->ta & RFAL_ISODEP_ATS_TA_DLP_212) != 0U))) ||
  1149. (!(RFAL_SUPPORT_BR_CE_A_424) &&
  1150. (((atsParam->ta & RFAL_ISODEP_ATS_TA_DPL_424) != 0U) ||
  1151. ((atsParam->ta & RFAL_ISODEP_ATS_TA_DLP_424) != 0U))) ||
  1152. (!(RFAL_SUPPORT_BR_CE_A_848) &&
  1153. (((atsParam->ta & RFAL_ISODEP_ATS_TA_DPL_848) != 0U) ||
  1154. ((atsParam->ta & RFAL_ISODEP_ATS_TA_DLP_848) != 0U)))) {
  1155. return ERR_NOTSUPP;
  1156. }
  1157. /* Enforce proper FWI configuration */
  1158. if(atsParam->fwi > ISODEP_FWI_LIS_MAX) {
  1159. atsParam->fwi = ISODEP_FWI_LIS_MAX;
  1160. }
  1161. gIsoDep.atsTA = atsParam->ta;
  1162. gIsoDep.fwt = rfalIsoDepFWI2FWT(atsParam->fwi);
  1163. gIsoDep.ourFsx = rfalIsoDepFSxI2FSx(atsParam->fsci);
  1164. /* Ensure proper/maximum Historical Bytes length */
  1165. atsParam->hbLen = MIN(RFAL_ISODEP_ATS_HB_MAX_LEN, atsParam->hbLen);
  1166. /*******************************************************************************/
  1167. /* Compute ATS */
  1168. txBuf[bufIt++] = (RFAL_ISODEP_ATS_HIST_OFFSET + atsParam->hbLen); /* TL */
  1169. txBuf[bufIt++] =
  1170. ((RFAL_ISODEP_ATS_T0_TA_PRESENCE_MASK | RFAL_ISODEP_ATS_T0_TB_PRESENCE_MASK |
  1171. RFAL_ISODEP_ATS_T0_TC_PRESENCE_MASK) |
  1172. atsParam->fsci); /* T0 */
  1173. txBuf[bufIt++] = atsParam->ta; /* TA */
  1174. txBuf[bufIt++] =
  1175. ((atsParam->fwi << RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT) |
  1176. (atsParam->sfgi & RFAL_ISODEP_RATS_PARAM_FSDI_MASK)); /* TB */
  1177. txBuf[bufIt++] = (uint8_t)((atsParam->didSupport) ? RFAL_ISODEP_ATS_TC_DID : 0U); /* TC */
  1178. if(atsParam->hbLen > 0U) /* MISRA 21.18 */
  1179. {
  1180. ST_MEMCPY(&txBuf[bufIt], atsParam->hb, atsParam->hbLen); /* T1-Tk */
  1181. bufIt += atsParam->hbLen;
  1182. }
  1183. gIsoDep.state = ISODEP_ST_PICC_ACT_ATS;
  1184. }
  1185. /*******************************************************************************/
  1186. else if(*buffer == RFAL_ISODEP_CMD_ATTRIB) {
  1187. /* Check ATTRIB parameters */
  1188. if(attribResParam == NULL) {
  1189. return ERR_PARAM;
  1190. }
  1191. /* REMARK: ATTRIB handling */
  1192. NO_WARNING(attribResParam);
  1193. NO_WARNING(bufLen);
  1194. return ERR_NOT_IMPLEMENTED;
  1195. } else {
  1196. return ERR_PARAM;
  1197. }
  1198. gIsoDep.actvParam = actParam;
  1199. /*******************************************************************************/
  1200. /* If requested copy to ISO-DEP device info */
  1201. if(actParam.isoDepDev != NULL) {
  1202. actParam.isoDepDev->info.DID = gIsoDep.did;
  1203. actParam.isoDepDev->info.FSx = gIsoDep.fsx;
  1204. actParam.isoDepDev->info.FWT = gIsoDep.fwt;
  1205. actParam.isoDepDev->info.dFWT = 0;
  1206. actParam.isoDepDev->info.DSI = gIsoDep.txBR;
  1207. actParam.isoDepDev->info.DRI = gIsoDep.rxBR;
  1208. }
  1209. return rfalTransceiveBlockingTx(
  1210. txBuf,
  1211. bufIt,
  1212. (uint8_t*)actParam.rxBuf,
  1213. sizeof(rfalIsoDepBufFormat),
  1214. actParam.rxLen,
  1215. RFAL_TXRX_FLAGS_DEFAULT,
  1216. RFAL_FWT_NONE);
  1217. }
  1218. /*******************************************************************************/
  1219. ReturnCode rfalIsoDepListenGetActivationStatus(void) {
  1220. ReturnCode err;
  1221. uint8_t* txBuf;
  1222. uint8_t bufIt;
  1223. rfalBitRate dsi;
  1224. rfalBitRate dri;
  1225. /* Check if Activation is running */
  1226. if(gIsoDep.state < ISODEP_ST_PICC_ACT_ATS) {
  1227. return ERR_WRONG_STATE;
  1228. }
  1229. /* Check if Activation has finished already */
  1230. if(gIsoDep.state >= ISODEP_ST_PICC_RX) {
  1231. return ERR_NONE;
  1232. }
  1233. /*******************************************************************************/
  1234. /* Check for incoming msg */
  1235. err = rfalGetTransceiveStatus();
  1236. switch(err) {
  1237. /*******************************************************************************/
  1238. case ERR_NONE:
  1239. break;
  1240. /*******************************************************************************/
  1241. case ERR_LINK_LOSS:
  1242. case ERR_BUSY:
  1243. return err;
  1244. /*******************************************************************************/
  1245. case ERR_CRC:
  1246. case ERR_PAR:
  1247. case ERR_FRAMING:
  1248. /* ISO14443 4 5.6.2.2 2 If ATS has been replied upon a invalid block, PICC disables the PPS responses */
  1249. if(gIsoDep.state == ISODEP_ST_PICC_ACT_ATS) {
  1250. gIsoDep.state = ISODEP_ST_PICC_RX;
  1251. break;
  1252. }
  1253. /* fall through */
  1254. /*******************************************************************************/
  1255. default: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1256. /* ReEnable the receiver and wait for another frame */
  1257. isoDepReEnableRx(
  1258. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1259. sizeof(rfalIsoDepBufFormat),
  1260. gIsoDep.actvParam.rxLen);
  1261. return ERR_BUSY;
  1262. }
  1263. txBuf =
  1264. (uint8_t*)gIsoDep.actvParam
  1265. .rxBuf; /* Use the rxBuf as TxBuf as well, the struct enforces a size enough MAX(NFCA_PPS_RES_LEN, ISODEP_DSL_MAX_LEN) */
  1266. dri = RFAL_BR_KEEP; /* The RFAL_BR_KEEP is used to check if PPS with BR change was requested */
  1267. dsi = RFAL_BR_KEEP; /* MISRA 9.1 */
  1268. bufIt = 0;
  1269. /*******************************************************************************/
  1270. gIsoDep.role = ISODEP_ROLE_PICC;
  1271. /*******************************************************************************/
  1272. if(gIsoDep.state == ISODEP_ST_PICC_ACT_ATS) {
  1273. /* Check for a PPS ISO 14443-4 5.3 */
  1274. if((((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_STARTBYTE_POS] &
  1275. RFAL_ISODEP_PPS_MASK) == RFAL_ISODEP_PPS_SB) {
  1276. /* ISO 14443-4 5.3.1 Check if the we are the addressed DID/CID */
  1277. /* ISO 14443-4 5.3.2 Check for a valid PPS0 */
  1278. if(((((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_STARTBYTE_POS] &
  1279. RFAL_ISODEP_DID_MASK) != gIsoDep.did) ||
  1280. ((((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS0_POS] &
  1281. RFAL_ISODEP_PPS0_VALID_MASK) != RFAL_ISODEP_PPS0_PPS1_NOT_PRESENT)) {
  1282. /* Invalid DID on PPS request or Invalid PPS0, reEnable the receiver and wait another frame */
  1283. isoDepReEnableRx(
  1284. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1285. sizeof(rfalIsoDepBufFormat),
  1286. gIsoDep.actvParam.rxLen);
  1287. return ERR_BUSY;
  1288. }
  1289. /*******************************************************************************/
  1290. /* Check PPS1 presence */
  1291. if(((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS0_POS] ==
  1292. RFAL_ISODEP_PPS0_PPS1_PRESENT) {
  1293. uint8_t newdri = ((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS1_POS] &
  1294. RFAL_ISODEP_PPS1_DxI_MASK; /* MISRA 10.8 */
  1295. uint8_t newdsi = (((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS1_POS] >>
  1296. RFAL_ISODEP_PPS1_DSI_SHIFT) &
  1297. RFAL_ISODEP_PPS1_DxI_MASK; /* MISRA 10.8 */
  1298. /* PRQA S 4342 2 # MISRA 10.5 - Layout of enum rfalBitRate and above masks guarantee no invalid enum values to be created */
  1299. dri = (rfalBitRate)(newdri);
  1300. dsi = (rfalBitRate)(newdsi);
  1301. if((!(RFAL_SUPPORT_BR_CE_A_106) &&
  1302. ((dsi == RFAL_BR_106) || (dri == RFAL_BR_106))) ||
  1303. (!(RFAL_SUPPORT_BR_CE_A_212) &&
  1304. ((dsi == RFAL_BR_212) || (dri == RFAL_BR_212))) ||
  1305. (!(RFAL_SUPPORT_BR_CE_A_424) &&
  1306. ((dsi == RFAL_BR_424) || (dri == RFAL_BR_424))) ||
  1307. (!(RFAL_SUPPORT_BR_CE_A_848) &&
  1308. ((dsi == RFAL_BR_848) || (dri == RFAL_BR_848)))) {
  1309. return ERR_PROTO;
  1310. }
  1311. }
  1312. /*******************************************************************************/
  1313. /* Compute and send PPS RES / Ack */
  1314. txBuf[bufIt++] = ((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_STARTBYTE_POS];
  1315. rfalTransceiveBlockingTx(
  1316. txBuf,
  1317. bufIt,
  1318. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1319. sizeof(rfalIsoDepBufFormat),
  1320. gIsoDep.actvParam.rxLen,
  1321. RFAL_TXRX_FLAGS_DEFAULT,
  1322. RFAL_FWT_NONE);
  1323. /*******************************************************************************/
  1324. /* Exchange the bit rates if requested */
  1325. if(dri != RFAL_BR_KEEP) {
  1326. rfalSetBitRate(
  1327. dsi,
  1328. dri); /* PRQA S 2880 # MISRA 2.1 - Unreachable code due to configuration option being set/unset above (RFAL_SUPPORT_BR_CE_A_xxx) */
  1329. gIsoDep.txBR = dsi; /* DSI codes the divisor from PICC to PCD */
  1330. gIsoDep.rxBR = dri; /* DRI codes the divisor from PCD to PICC */
  1331. if(gIsoDep.actvParam.isoDepDev != NULL) {
  1332. gIsoDep.actvParam.isoDepDev->info.DSI = dsi;
  1333. gIsoDep.actvParam.isoDepDev->info.DRI = dri;
  1334. }
  1335. }
  1336. }
  1337. /* Check for a S-Deselect is done on Data Exchange Activity */
  1338. }
  1339. /*******************************************************************************/
  1340. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  1341. gIsoDep.hdrLen +=
  1342. RFAL_ISODEP_DID_LEN; /* Always assume DID to be aligned with Digital 1.1 15.1.2 and ISO14443 4 5.6.3 #454 */
  1343. gIsoDep.hdrLen += (uint8_t)((gIsoDep.nad != RFAL_ISODEP_NO_NAD) ? RFAL_ISODEP_NAD_LEN : 0U);
  1344. /*******************************************************************************/
  1345. /* Rule C - The PICC block number shall be initialized to 1 at activation */
  1346. gIsoDep.blockNumber = 1;
  1347. /* Activation done, keep the rcvd data in, reMap the activation buffer to the global to be retrieved by the DEP method */
  1348. gIsoDep.rxBuf = (uint8_t*)gIsoDep.actvParam.rxBuf;
  1349. gIsoDep.rxBufLen = sizeof(rfalIsoDepBufFormat);
  1350. gIsoDep.rxBufInfPos = (uint8_t)((uint32_t)gIsoDep.actvParam.rxBuf->inf -
  1351. (uint32_t)gIsoDep.actvParam.rxBuf->prologue);
  1352. gIsoDep.rxLen = gIsoDep.actvParam.rxLen;
  1353. gIsoDep.rxChaining = gIsoDep.actvParam.isRxChaining;
  1354. gIsoDep.state = ISODEP_ST_PICC_RX;
  1355. return ERR_NONE;
  1356. }
  1357. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  1358. /*******************************************************************************/
  1359. uint16_t rfalIsoDepGetMaxInfLen(void) {
  1360. /* Check whether all parameters are valid, otherwise return minimum default value */
  1361. if((gIsoDep.fsx < (uint16_t)RFAL_ISODEP_FSX_16) ||
  1362. (gIsoDep.fsx > (uint16_t)RFAL_ISODEP_FSX_4096) || (gIsoDep.hdrLen > ISODEP_HDR_MAX_LEN)) {
  1363. uint16_t isodepFsx16 = (uint16_t)RFAL_ISODEP_FSX_16; /* MISRA 10.1 */
  1364. return (isodepFsx16 - RFAL_ISODEP_PCB_LEN - ISODEP_CRC_LEN);
  1365. }
  1366. return (gIsoDep.fsx - gIsoDep.hdrLen - ISODEP_CRC_LEN);
  1367. }
  1368. /*******************************************************************************/
  1369. ReturnCode rfalIsoDepStartTransceive(rfalIsoDepTxRxParam param) {
  1370. gIsoDep.txBuf = param.txBuf->prologue;
  1371. gIsoDep.txBufInfPos = (uint8_t)((uint32_t)param.txBuf->inf - (uint32_t)param.txBuf->prologue);
  1372. gIsoDep.txBufLen = param.txBufLen;
  1373. gIsoDep.isTxChaining = param.isTxChaining;
  1374. gIsoDep.rxBuf = param.rxBuf->prologue;
  1375. gIsoDep.rxBufInfPos = (uint8_t)((uint32_t)param.rxBuf->inf - (uint32_t)param.rxBuf->prologue);
  1376. gIsoDep.rxBufLen = sizeof(rfalIsoDepBufFormat);
  1377. gIsoDep.rxLen = param.rxLen;
  1378. gIsoDep.rxChaining = param.isRxChaining;
  1379. gIsoDep.fwt = param.FWT;
  1380. gIsoDep.dFwt = param.dFWT;
  1381. gIsoDep.fsx = param.FSx;
  1382. gIsoDep.did = param.DID;
  1383. /* Only change the FSx from activation if no to Keep */
  1384. gIsoDep.ourFsx = ((param.ourFSx != RFAL_ISODEP_FSX_KEEP) ? param.ourFSx : gIsoDep.ourFsx);
  1385. /* Clear inner control params for next dataExchange */
  1386. gIsoDep.isRxChaining = false;
  1387. isoDepClearCounters();
  1388. if(gIsoDep.role == ISODEP_ROLE_PICC) {
  1389. if(gIsoDep.txBufLen > 0U) {
  1390. /* Ensure that an RTOX Ack is not being expected at moment */
  1391. if(!gIsoDep.isWait4WTX) {
  1392. gIsoDep.state = ISODEP_ST_PICC_TX;
  1393. return ERR_NONE;
  1394. } else {
  1395. /* If RTOX Ack is expected, signal a pending Tx to be transmitted right after */
  1396. gIsoDep.isTxPending = true;
  1397. }
  1398. }
  1399. /* Digital 1.1 15.2.5.1 The first block SHALL be sent by the Reader/Writer */
  1400. gIsoDep.state = ISODEP_ST_PICC_RX;
  1401. return ERR_NONE;
  1402. }
  1403. gIsoDep.state = ISODEP_ST_PCD_TX;
  1404. return ERR_NONE;
  1405. }
  1406. /*******************************************************************************/
  1407. ReturnCode rfalIsoDepGetTransceiveStatus(void) {
  1408. if(gIsoDep.role == ISODEP_ROLE_PICC) {
  1409. #if RFAL_FEATURE_ISO_DEP_LISTEN
  1410. return isoDepDataExchangePICC();
  1411. #else
  1412. return ERR_NOTSUPP;
  1413. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  1414. } else {
  1415. #if RFAL_FEATURE_ISO_DEP_POLL
  1416. return isoDepDataExchangePCD(gIsoDep.rxLen, gIsoDep.rxChaining);
  1417. #else
  1418. return ERR_NOTSUPP;
  1419. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  1420. }
  1421. }
  1422. #if RFAL_FEATURE_ISO_DEP_LISTEN
  1423. /*******************************************************************************/
  1424. static ReturnCode isoDepDataExchangePICC(void) {
  1425. uint8_t rxPCB;
  1426. ReturnCode ret;
  1427. switch(gIsoDep.state) {
  1428. /*******************************************************************************/
  1429. case ISODEP_ST_IDLE:
  1430. return ERR_NONE;
  1431. /*******************************************************************************/
  1432. case ISODEP_ST_PICC_TX:
  1433. ret = isoDepTx(
  1434. isoDep_PCBIBlock(gIsoDep.blockNumber),
  1435. gIsoDep.txBuf,
  1436. &gIsoDep.txBuf[gIsoDep.txBufInfPos],
  1437. gIsoDep.txBufLen,
  1438. RFAL_FWT_NONE);
  1439. /* Clear pending Tx flag */
  1440. gIsoDep.isTxPending = false;
  1441. switch(ret) {
  1442. case ERR_NONE:
  1443. gIsoDep.state = ISODEP_ST_PICC_RX;
  1444. return ERR_BUSY;
  1445. default:
  1446. /* MISRA 16.4: no empty default statement (a comment being enough) */
  1447. break;
  1448. }
  1449. return ret;
  1450. /*******************************************************************************/
  1451. case ISODEP_ST_PICC_RX:
  1452. ret = rfalGetTransceiveStatus();
  1453. switch(ret) {
  1454. /*******************************************************************************/
  1455. /* Data rcvd with error or timeout -> mute */
  1456. case ERR_TIMEOUT:
  1457. case ERR_CRC:
  1458. case ERR_PAR:
  1459. case ERR_FRAMING:
  1460. /* Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  1461. isoDepReEnableRx((uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1462. return ERR_BUSY;
  1463. /*******************************************************************************/
  1464. case ERR_LINK_LOSS:
  1465. return ret; /* Debug purposes */
  1466. case ERR_BUSY:
  1467. return ret; /* Debug purposes */
  1468. /*******************************************************************************/
  1469. case ERR_NONE:
  1470. *gIsoDep.rxLen = rfalConvBitsToBytes(*gIsoDep.rxLen);
  1471. break;
  1472. /*******************************************************************************/
  1473. default:
  1474. return ret;
  1475. }
  1476. break;
  1477. /*******************************************************************************/
  1478. case ISODEP_ST_PICC_SWTX:
  1479. if(!isoDepTimerisExpired(gIsoDep.WTXTimer)) /* Do nothing until WTX timer has expired */
  1480. {
  1481. return ERR_BUSY;
  1482. }
  1483. /* Set waiting for WTX Ack Flag */
  1484. gIsoDep.isWait4WTX = true;
  1485. /* Digital 1.1 15.2.2.9 - Calculate the WTXM such that FWTtemp <= FWTmax */
  1486. gIsoDep.lastWTXM = (uint8_t)isoDep_WTXMListenerMax(gIsoDep.fwt);
  1487. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_WTX, gIsoDep.lastWTXM));
  1488. gIsoDep.state = ISODEP_ST_PICC_RX; /* Go back to Rx to process WTX ack */
  1489. return ERR_BUSY;
  1490. /*******************************************************************************/
  1491. case ISODEP_ST_PICC_SDSL:
  1492. if(rfalIsTransceiveInRx()) /* Wait until DSL response has been sent */
  1493. {
  1494. rfalIsoDepInitialize(); /* Session finished reInit vars */
  1495. return ERR_SLEEP_REQ; /* Notify Deselect request */
  1496. }
  1497. return ERR_BUSY;
  1498. /*******************************************************************************/
  1499. default:
  1500. return ERR_INTERNAL;
  1501. }
  1502. /* ISO 14443-4 7.5.6.2 CE SHALL NOT attempt error recovery -> clear counters */
  1503. isoDepClearCounters();
  1504. /*******************************************************************************/
  1505. /* No error, process incoming msg */
  1506. /*******************************************************************************/
  1507. /* Grab rcvd PCB */
  1508. rxPCB = gIsoDep.rxBuf[ISODEP_PCB_POS];
  1509. /*******************************************************************************/
  1510. /* When DID=0 PCD may or may not use DID, therefore check whether current PCD request
  1511. * has DID present to be reflected on max INF length #454 */
  1512. /* ReCalculate Header Length */
  1513. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  1514. gIsoDep.hdrLen += (uint8_t)((isoDep_PCBhasDID(rxPCB)) ? RFAL_ISODEP_DID_LEN : 0U);
  1515. gIsoDep.hdrLen += (uint8_t)((isoDep_PCBhasNAD(rxPCB)) ? RFAL_ISODEP_NAD_LEN : 0U);
  1516. /* Store whether last PCD block had DID. for PICC special handling of DID = 0 */
  1517. if(gIsoDep.did == RFAL_ISODEP_DID_00) {
  1518. gIsoDep.lastDID00 = ((isoDep_PCBhasDID(rxPCB)) ? true : false);
  1519. }
  1520. /*******************************************************************************/
  1521. /* Check rcvd msg length, cannot be less then the expected header OR *
  1522. * if the rcvd msg exceeds our announced frame size (FSD) */
  1523. if(((*gIsoDep.rxLen) < gIsoDep.hdrLen) ||
  1524. ((*gIsoDep.rxLen) > (gIsoDep.ourFsx - ISODEP_CRC_LEN))) {
  1525. isoDepReEnableRx(
  1526. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1527. sizeof(rfalIsoDepBufFormat),
  1528. gIsoDep.actvParam.rxLen);
  1529. return ERR_BUSY; /* ERR_PROTO Ignore this protocol request */
  1530. }
  1531. /* If we are expecting DID, check if PCB signals its presence and if device ID match OR
  1532. * If our DID=0 and DID is sent but with an incorrect value */
  1533. if(((gIsoDep.did != RFAL_ISODEP_DID_00) &&
  1534. (!isoDep_PCBhasDID(rxPCB) || (gIsoDep.did != gIsoDep.rxBuf[ISODEP_DID_POS]))) ||
  1535. ((gIsoDep.did == RFAL_ISODEP_DID_00) && isoDep_PCBhasDID(rxPCB) &&
  1536. (RFAL_ISODEP_DID_00 != gIsoDep.rxBuf[ISODEP_DID_POS]))) {
  1537. isoDepReEnableRx(
  1538. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1539. sizeof(rfalIsoDepBufFormat),
  1540. gIsoDep.actvParam.rxLen);
  1541. return ERR_BUSY; /* Ignore a wrong DID request */
  1542. }
  1543. /* If we aren't expecting NAD and it's received */
  1544. if((gIsoDep.nad == RFAL_ISODEP_NO_NAD) && isoDep_PCBhasNAD(rxPCB)) {
  1545. isoDepReEnableRx(
  1546. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1547. sizeof(rfalIsoDepBufFormat),
  1548. gIsoDep.actvParam.rxLen);
  1549. return ERR_BUSY; /* Ignore a unexpected NAD request */
  1550. }
  1551. /*******************************************************************************/
  1552. /* Process S-Block */
  1553. /*******************************************************************************/
  1554. if(isoDep_PCBisSBlock(rxPCB)) {
  1555. /* Check if is a Wait Time eXtension */
  1556. if(isoDep_PCBisSWTX(rxPCB)) {
  1557. /* Check if we're expecting a S-WTX */
  1558. if(isoDep_PCBisWTX(gIsoDep.lastPCB)) {
  1559. /* Digital 1.1 15.2.2.11 S(WTX) Ack with different WTXM -> Protocol Error *
  1560. * Power level indication also should be set to 0 */
  1561. if((gIsoDep.rxBuf[gIsoDep.hdrLen] == gIsoDep.lastWTXM) &&
  1562. ((*gIsoDep.rxLen - gIsoDep.hdrLen) == ISODEP_SWTX_INF_LEN)) {
  1563. /* Clear waiting for RTOX Ack Flag */
  1564. gIsoDep.isWait4WTX = false;
  1565. /* Check if a Tx is already pending */
  1566. if(gIsoDep.isTxPending) {
  1567. /* Has a pending Tx, go immediately to TX */
  1568. gIsoDep.state = ISODEP_ST_PICC_TX;
  1569. return ERR_BUSY;
  1570. }
  1571. /* Set WTX timer */
  1572. isoDepTimerStart(
  1573. gIsoDep.WTXTimer,
  1574. isoDep_WTXAdjust((gIsoDep.lastWTXM * rfalConv1fcToMs(gIsoDep.fwt))));
  1575. gIsoDep.state = ISODEP_ST_PICC_SWTX;
  1576. return ERR_BUSY;
  1577. }
  1578. }
  1579. /* Unexpected/Incorrect S-WTX, fall into reRenable */
  1580. }
  1581. /* Check if is a Deselect request */
  1582. if(isoDep_PCBisSDeselect(rxPCB) &&
  1583. ((*gIsoDep.rxLen - gIsoDep.hdrLen) == ISODEP_SDSL_INF_LEN)) {
  1584. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM));
  1585. /* S-DSL transmission ongoing, wait until complete */
  1586. gIsoDep.state = ISODEP_ST_PICC_SDSL;
  1587. return ERR_BUSY;
  1588. }
  1589. /* Unexpected S-Block, fall into reRenable */
  1590. }
  1591. /*******************************************************************************/
  1592. /* Process R-Block */
  1593. /*******************************************************************************/
  1594. else if(isoDep_PCBisRBlock(rxPCB) && ((*gIsoDep.rxLen - gIsoDep.hdrLen) == ISODEP_RBLOCK_INF_LEN)) {
  1595. if(isoDep_PCBisRACK(rxPCB)) /* Check if is a R-ACK */
  1596. {
  1597. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) /* Check block number */
  1598. {
  1599. /* Rule 11 - R(ACK) with current bn -> re-transmit */
  1600. if(!isoDep_PCBisIBlock(gIsoDep.lastPCB)) {
  1601. isoDepReSendControlMsg();
  1602. } else {
  1603. gIsoDep.state = ISODEP_ST_PICC_TX;
  1604. }
  1605. return ERR_BUSY;
  1606. } else {
  1607. if(!gIsoDep.isTxChaining) {
  1608. /* Rule 13 violation R(ACK) without performing chaining */
  1609. isoDepReEnableRx(
  1610. (uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1611. return ERR_BUSY;
  1612. }
  1613. /* Rule E - R(ACK) with not current bn -> toggle bn */
  1614. isoDep_ToggleBN(gIsoDep.blockNumber);
  1615. /* This block has been transmitted and acknowledged, perform WTX until next data is provided */
  1616. /* Rule 9 - PICC is allowed to send an S(WTX) instead of an I-block or an R(ACK) */
  1617. isoDepTimerStart(gIsoDep.WTXTimer, isoDep_WTXAdjust(rfalConv1fcToMs(gIsoDep.fwt)));
  1618. gIsoDep.state = ISODEP_ST_PICC_SWTX;
  1619. /* Rule 13 - R(ACK) with not current bn -> continue chaining */
  1620. return ERR_NONE; /* This block has been transmitted */
  1621. }
  1622. } else if(isoDep_PCBisRNAK(rxPCB)) /* Check if is a R-NACK */
  1623. {
  1624. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) /* Check block number */
  1625. {
  1626. /* Rule 11 - R(NAK) with current bn -> re-transmit last x-Block */
  1627. if(!isoDep_PCBisIBlock(gIsoDep.lastPCB)) {
  1628. isoDepReSendControlMsg();
  1629. } else {
  1630. gIsoDep.state = ISODEP_ST_PICC_TX;
  1631. }
  1632. return ERR_BUSY;
  1633. } else {
  1634. /* Rule 12 - R(NAK) with not current bn -> R(ACK) */
  1635. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  1636. return ERR_BUSY;
  1637. }
  1638. } else {
  1639. /* MISRA 15.7 - Empty else */
  1640. }
  1641. /* Unexpected R-Block, fall into reRenable */
  1642. }
  1643. /*******************************************************************************/
  1644. /* Process I-Block */
  1645. /*******************************************************************************/
  1646. else if(isoDep_PCBisIBlock(rxPCB)) {
  1647. /* Rule D - When an I-block is received, the PICC shall toggle its block number before sending a block */
  1648. isoDep_ToggleBN(gIsoDep.blockNumber);
  1649. /*******************************************************************************/
  1650. /* Check if the block number is the one expected */
  1651. /* Check if PCD sent an I-Block instead ACK/NACK when we are chaining */
  1652. if((isoDep_GetBN(rxPCB) != gIsoDep.blockNumber) || (gIsoDep.isTxChaining)) {
  1653. /* Remain in the same Block Number */
  1654. isoDep_ToggleBN(gIsoDep.blockNumber);
  1655. /* ISO 14443-4 7.5.6.2 & Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  1656. isoDepReEnableRx((uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1657. return ERR_BUSY;
  1658. }
  1659. /*******************************************************************************/
  1660. /* is PCD performing chaining ? */
  1661. if(isoDep_PCBisChaining(rxPCB)) {
  1662. gIsoDep.isRxChaining = true;
  1663. *gIsoDep.rxChaining = true; /* Output Parameter*/
  1664. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  1665. /* Received I-Block with chaining, send current data to DH */
  1666. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  1667. *gIsoDep.rxLen -= gIsoDep.hdrLen;
  1668. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*gIsoDep.rxLen > 0U)) {
  1669. ST_MEMMOVE(
  1670. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  1671. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  1672. *gIsoDep.rxLen);
  1673. }
  1674. return ERR_AGAIN; /* Send Again signalling to run again, but some chaining data has arrived*/
  1675. }
  1676. /*******************************************************************************/
  1677. /* PCD is not performing chaining */
  1678. gIsoDep.isRxChaining = false; /* clear PCD chaining flag */
  1679. *gIsoDep.rxChaining = false; /* Output Parameter */
  1680. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  1681. *gIsoDep.rxLen -= gIsoDep.hdrLen;
  1682. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*gIsoDep.rxLen > 0U)) {
  1683. ST_MEMMOVE(
  1684. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  1685. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  1686. *gIsoDep.rxLen);
  1687. }
  1688. /*******************************************************************************/
  1689. /* Reception done, send data back and start WTX timer */
  1690. isoDepTimerStart(gIsoDep.WTXTimer, isoDep_WTXAdjust(rfalConv1fcToMs(gIsoDep.fwt)));
  1691. gIsoDep.state = ISODEP_ST_PICC_SWTX;
  1692. return ERR_NONE;
  1693. } else {
  1694. /* MISRA 15.7 - Empty else */
  1695. }
  1696. /* Unexpected/Unknown Block */
  1697. /* ISO 14443-4 7.5.6.2 & Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  1698. isoDepReEnableRx((uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1699. return ERR_BUSY;
  1700. }
  1701. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  1702. #if RFAL_FEATURE_ISO_DEP_POLL
  1703. #if RFAL_FEATURE_NFCA
  1704. /*******************************************************************************/
  1705. static ReturnCode
  1706. rfalIsoDepStartRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts* ats, uint8_t* atsLen) {
  1707. rfalTransceiveContext ctx;
  1708. if(ats == NULL) {
  1709. return ERR_PARAM;
  1710. }
  1711. gIsoDep.rxBuf = (uint8_t*)ats;
  1712. gIsoDep.rxLen8 = atsLen;
  1713. gIsoDep.did = DID;
  1714. /*******************************************************************************/
  1715. /* Compose RATS */
  1716. gIsoDep.actv.ratsReq.CMD = RFAL_ISODEP_CMD_RATS;
  1717. gIsoDep.actv.ratsReq.PARAM =
  1718. (((uint8_t)FSDI << RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT) & RFAL_ISODEP_RATS_PARAM_FSDI_MASK) |
  1719. (DID & RFAL_ISODEP_RATS_PARAM_DID_MASK);
  1720. rfalCreateByteFlagsTxRxContext(
  1721. ctx,
  1722. (uint8_t*)&gIsoDep.actv.ratsReq,
  1723. sizeof(rfalIsoDepRats),
  1724. (uint8_t*)ats,
  1725. sizeof(rfalIsoDepAts),
  1726. &gIsoDep.rxBufLen,
  1727. RFAL_TXRX_FLAGS_DEFAULT,
  1728. RFAL_ISODEP_T4T_FWT_ACTIVATION);
  1729. return rfalStartTransceive(&ctx);
  1730. }
  1731. /*******************************************************************************/
  1732. static ReturnCode rfalIsoDepGetRATSStatus(void) {
  1733. ReturnCode ret;
  1734. ret = rfalGetTransceiveStatus();
  1735. if(ret == ERR_NONE) {
  1736. gIsoDep.rxBufLen = rfalConvBitsToBytes(gIsoDep.rxBufLen);
  1737. /* Check for valid ATS length Digital 1.1 13.6.2.1 & 13.6.2.3 */
  1738. if((gIsoDep.rxBufLen < RFAL_ISODEP_ATS_MIN_LEN) ||
  1739. (gIsoDep.rxBufLen > RFAL_ISODEP_ATS_MAX_LEN) ||
  1740. (gIsoDep.rxBuf[RFAL_ISODEP_ATS_TL_POS] != gIsoDep.rxBufLen)) {
  1741. return ERR_PROTO;
  1742. }
  1743. /* Assign our FSx, in case the a Deselect is send without Transceive */
  1744. gIsoDep.ourFsx = rfalIsoDepFSxI2FSx(
  1745. (uint8_t)(gIsoDep.actv.ratsReq.PARAM >> RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT));
  1746. /* Check and assign if ATS length was requested (length also available on TL) */
  1747. if(gIsoDep.rxLen8 != NULL) {
  1748. *gIsoDep.rxLen8 = (uint8_t)gIsoDep.rxBufLen;
  1749. }
  1750. }
  1751. return ret;
  1752. }
  1753. /*******************************************************************************/
  1754. ReturnCode rfalIsoDepRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts* ats, uint8_t* atsLen) {
  1755. ReturnCode ret;
  1756. EXIT_ON_ERR(ret, rfalIsoDepStartRATS(FSDI, DID, ats, atsLen));
  1757. rfalIsoDepRunBlocking(ret, rfalIsoDepGetRATSStatus());
  1758. return ret;
  1759. }
  1760. /*******************************************************************************/
  1761. static ReturnCode
  1762. rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes* ppsRes) {
  1763. rfalTransceiveContext ctx;
  1764. if((ppsRes == NULL) || (DSI > RFAL_BR_848) || (DRI > RFAL_BR_848) ||
  1765. (DID > RFAL_ISODEP_DID_MAX)) {
  1766. return ERR_PARAM;
  1767. }
  1768. gIsoDep.rxBuf = (uint8_t*)ppsRes;
  1769. /*******************************************************************************/
  1770. /* Compose PPS Request */
  1771. gIsoDep.actv.ppsReq.PPSS = (RFAL_ISODEP_PPS_SB | (DID & RFAL_ISODEP_PPS_SB_DID_MASK));
  1772. gIsoDep.actv.ppsReq.PPS0 = RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT;
  1773. gIsoDep.actv.ppsReq.PPS1 =
  1774. (RFAL_ISODEP_PPS_PPS1 |
  1775. ((((uint8_t)DSI << RFAL_ISODEP_PPS_PPS1_DSI_SHIFT) | (uint8_t)DRI) &
  1776. RFAL_ISODEP_PPS_PPS1_DXI_MASK));
  1777. rfalCreateByteFlagsTxRxContext(
  1778. ctx,
  1779. (uint8_t*)&gIsoDep.actv.ppsReq,
  1780. sizeof(rfalIsoDepPpsReq),
  1781. (uint8_t*)ppsRes,
  1782. sizeof(rfalIsoDepPpsRes),
  1783. &gIsoDep.rxBufLen,
  1784. RFAL_TXRX_FLAGS_DEFAULT,
  1785. RFAL_ISODEP_T4T_FWT_ACTIVATION);
  1786. return rfalStartTransceive(&ctx);
  1787. }
  1788. /*******************************************************************************/
  1789. static ReturnCode rfalIsoDepGetPPSSTatus(void) {
  1790. ReturnCode ret;
  1791. ret = rfalGetTransceiveStatus();
  1792. if(ret == ERR_NONE) {
  1793. gIsoDep.rxBufLen = rfalConvBitsToBytes(gIsoDep.rxBufLen);
  1794. /* Check for valid PPS Response */
  1795. if((gIsoDep.rxBufLen != RFAL_ISODEP_PPS_RES_LEN) ||
  1796. (*gIsoDep.rxBuf != gIsoDep.actv.ppsReq.PPSS)) {
  1797. return ERR_PROTO;
  1798. }
  1799. }
  1800. return ret;
  1801. }
  1802. /*******************************************************************************/
  1803. ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes* ppsRes) {
  1804. ReturnCode ret;
  1805. EXIT_ON_ERR(ret, rfalIsoDepStartPPS(DID, DSI, DRI, ppsRes));
  1806. rfalIsoDepRunBlocking(ret, rfalIsoDepGetPPSSTatus());
  1807. return ret;
  1808. }
  1809. #endif /* RFAL_FEATURE_NFCA */
  1810. #if RFAL_FEATURE_NFCB
  1811. static ReturnCode rfalIsoDepStartATTRIB(
  1812. const uint8_t* nfcid0,
  1813. uint8_t PARAM1,
  1814. rfalBitRate DSI,
  1815. rfalBitRate DRI,
  1816. rfalIsoDepFSxI FSDI,
  1817. uint8_t PARAM3,
  1818. uint8_t DID,
  1819. const uint8_t* HLInfo,
  1820. uint8_t HLInfoLen,
  1821. uint32_t fwt,
  1822. rfalIsoDepAttribRes* attribRes,
  1823. uint8_t* attribResLen) {
  1824. rfalTransceiveContext ctx;
  1825. if((attribRes == NULL) || (attribResLen == NULL) || (DSI > RFAL_BR_848) ||
  1826. (DRI > RFAL_BR_848) || (DID > RFAL_ISODEP_DID_MAX)) {
  1827. return ERR_NONE;
  1828. }
  1829. gIsoDep.rxBuf = (uint8_t*)attribRes;
  1830. gIsoDep.rxLen8 = attribResLen;
  1831. gIsoDep.did = DID;
  1832. /*******************************************************************************/
  1833. /* Compose ATTRIB command */
  1834. gIsoDep.actv.attribReq.cmd = RFAL_ISODEP_CMD_ATTRIB;
  1835. gIsoDep.actv.attribReq.Param.PARAM1 = PARAM1;
  1836. gIsoDep.actv.attribReq.Param.PARAM2 =
  1837. (((((uint8_t)DSI << RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT) |
  1838. ((uint8_t)DRI << RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT)) &
  1839. RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK) |
  1840. ((uint8_t)FSDI & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK));
  1841. gIsoDep.actv.attribReq.Param.PARAM3 = PARAM3;
  1842. gIsoDep.actv.attribReq.Param.PARAM4 = (DID & RFAL_ISODEP_ATTRIB_PARAM4_DID_MASK);
  1843. ST_MEMCPY(gIsoDep.actv.attribReq.nfcid0, nfcid0, RFAL_NFCB_NFCID0_LEN);
  1844. /* Append the Higher layer Info if provided */
  1845. if((HLInfo != NULL) && (HLInfoLen > 0U)) {
  1846. ST_MEMCPY(
  1847. gIsoDep.actv.attribReq.HLInfo, HLInfo, MIN(HLInfoLen, RFAL_ISODEP_ATTRIB_HLINFO_LEN));
  1848. }
  1849. rfalCreateByteFlagsTxRxContext(
  1850. ctx,
  1851. (uint8_t*)&gIsoDep.actv.attribReq,
  1852. (uint16_t)(RFAL_ISODEP_ATTRIB_HDR_LEN +
  1853. MIN((uint16_t)HLInfoLen, RFAL_ISODEP_ATTRIB_HLINFO_LEN)),
  1854. (uint8_t*)gIsoDep.rxBuf,
  1855. sizeof(rfalIsoDepAttribRes),
  1856. &gIsoDep.rxBufLen,
  1857. RFAL_TXRX_FLAGS_DEFAULT,
  1858. fwt);
  1859. return rfalStartTransceive(&ctx);
  1860. }
  1861. /*******************************************************************************/
  1862. static ReturnCode rfalIsoDepGetATTRIBStatus(void) {
  1863. ReturnCode ret;
  1864. ret = rfalGetTransceiveStatus();
  1865. if(ret == ERR_NONE) {
  1866. gIsoDep.rxBufLen = rfalConvBitsToBytes(gIsoDep.rxBufLen);
  1867. /* Check a for valid ATTRIB Response Digital 1.1 15.6.2.1 */
  1868. if((gIsoDep.rxBufLen < RFAL_ISODEP_ATTRIB_RES_HDR_LEN) ||
  1869. ((gIsoDep.rxBuf[RFAL_ISODEP_ATTRIB_RES_MBLIDID_POS] &
  1870. RFAL_ISODEP_ATTRIB_RES_DID_MASK) != gIsoDep.did)) {
  1871. return ERR_PROTO;
  1872. }
  1873. if(gIsoDep.rxLen8 != NULL) {
  1874. *gIsoDep.rxLen8 = (uint8_t)gIsoDep.rxBufLen;
  1875. }
  1876. gIsoDep.ourFsx = rfalIsoDepFSxI2FSx(
  1877. (uint8_t)(gIsoDep.actv.attribReq.Param.PARAM2 & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK));
  1878. }
  1879. return ret;
  1880. }
  1881. /*******************************************************************************/
  1882. ReturnCode rfalIsoDepATTRIB(
  1883. const uint8_t* nfcid0,
  1884. uint8_t PARAM1,
  1885. rfalBitRate DSI,
  1886. rfalBitRate DRI,
  1887. rfalIsoDepFSxI FSDI,
  1888. uint8_t PARAM3,
  1889. uint8_t DID,
  1890. const uint8_t* HLInfo,
  1891. uint8_t HLInfoLen,
  1892. uint32_t fwt,
  1893. rfalIsoDepAttribRes* attribRes,
  1894. uint8_t* attribResLen) {
  1895. ReturnCode ret;
  1896. EXIT_ON_ERR(
  1897. ret,
  1898. rfalIsoDepStartATTRIB(
  1899. nfcid0,
  1900. PARAM1,
  1901. DSI,
  1902. DRI,
  1903. FSDI,
  1904. PARAM3,
  1905. DID,
  1906. HLInfo,
  1907. HLInfoLen,
  1908. fwt,
  1909. attribRes,
  1910. attribResLen));
  1911. rfalIsoDepRunBlocking(ret, rfalIsoDepGetATTRIBStatus());
  1912. return ret;
  1913. }
  1914. #endif /* RFAL_FEATURE_NFCB */
  1915. #if RFAL_FEATURE_NFCA
  1916. /*******************************************************************************/
  1917. ReturnCode rfalIsoDepPollAHandleActivation(
  1918. rfalIsoDepFSxI FSDI,
  1919. uint8_t DID,
  1920. rfalBitRate maxBR,
  1921. rfalIsoDepDevice* isoDepDev) {
  1922. ReturnCode ret;
  1923. EXIT_ON_ERR(ret, rfalIsoDepPollAStartActivation(FSDI, DID, maxBR, isoDepDev));
  1924. rfalIsoDepRunBlocking(ret, rfalIsoDepPollAGetActivationStatus());
  1925. return ret;
  1926. }
  1927. /*******************************************************************************/
  1928. ReturnCode rfalIsoDepPollAStartActivation(
  1929. rfalIsoDepFSxI FSDI,
  1930. uint8_t DID,
  1931. rfalBitRate maxBR,
  1932. rfalIsoDepDevice* isoDepDev) {
  1933. ReturnCode ret;
  1934. if(isoDepDev == NULL) {
  1935. return ERR_PARAM;
  1936. }
  1937. /* Enable EMD handling according Digital 1.1 4.1.1.1 ; EMVCo 2.6 4.9.2 */
  1938. rfalSetErrorHandling(RFAL_ERRORHANDLING_EMVCO);
  1939. /* Start RATS Transceive */
  1940. EXIT_ON_ERR(
  1941. ret,
  1942. rfalIsoDepStartRATS(
  1943. FSDI,
  1944. DID,
  1945. &isoDepDev->activation.A.Listener.ATS,
  1946. &isoDepDev->activation.A.Listener.ATSLen));
  1947. isoDepDev->info.DSI = maxBR;
  1948. gIsoDep.actvDev = isoDepDev;
  1949. gIsoDep.cntRRetrys = gIsoDep.maxRetriesRATS;
  1950. gIsoDep.state = ISODEP_ST_PCD_ACT_RATS;
  1951. return ret;
  1952. }
  1953. /*******************************************************************************/
  1954. ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
  1955. ReturnCode ret;
  1956. uint8_t msgIt;
  1957. rfalBitRate maxBR;
  1958. switch(gIsoDep.state) {
  1959. /*******************************************************************************/
  1960. case ISODEP_ST_PCD_ACT_RATS:
  1961. ret = rfalIsoDepGetRATSStatus();
  1962. if(ret != ERR_BUSY) {
  1963. if(ret != ERR_NONE) {
  1964. /* EMVCo 2.6 9.6.1.1 & 9.6.1.2 If a timeout error is detected retransmit, on transmission error abort */
  1965. if((gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) && (ret != ERR_TIMEOUT)) {
  1966. break;
  1967. }
  1968. if(gIsoDep.cntRRetrys != 0U) {
  1969. /* Ensure FDT before retransmission (reuse RFAL GT timer) */
  1970. rfalSetGT(rfalGetFDTPoll());
  1971. rfalFieldOnAndStartGT();
  1972. /* Send RATS retransmission */ /* PRQA S 4342 1 # MISRA 10.5 - Layout of enum rfalIsoDepFSxI is guaranteed within 4bit range */
  1973. EXIT_ON_ERR(
  1974. ret,
  1975. rfalIsoDepStartRATS(
  1976. (rfalIsoDepFSxI)(uint8_t)(gIsoDep.actv.ratsReq.PARAM >>
  1977. RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT),
  1978. gIsoDep.did,
  1979. &gIsoDep.actvDev->activation.A.Listener.ATS,
  1980. &gIsoDep.actvDev->activation.A.Listener.ATSLen));
  1981. gIsoDep.cntRRetrys--;
  1982. ret = ERR_BUSY;
  1983. }
  1984. /* Switch between NFC Forum and ISO14443-4 behaviour #595
  1985. * ISO14443-4 5.6.1 If RATS fails, a Deactivation sequence should be performed as defined on clause 8
  1986. * Activity 1.1 9.6 Device Deactivation Activity is to be only performed when there's an active device */
  1987. else if(gIsoDep.compMode == RFAL_COMPLIANCE_MODE_ISO) {
  1988. rfalIsoDepDeselect();
  1989. } else {
  1990. /* MISRA 15.7 - Empty else */
  1991. }
  1992. } else /* ATS received */
  1993. {
  1994. maxBR = gIsoDep.actvDev->info.DSI; /* Retrieve requested max bitrate */
  1995. /*******************************************************************************/
  1996. /* Process ATS Response */
  1997. gIsoDep.actvDev->info.FWI =
  1998. RFAL_ISODEP_FWI_DEFAULT; /* Default value EMVCo 2.6 5.7.2.6 */
  1999. gIsoDep.actvDev->info.SFGI = 0U;
  2000. gIsoDep.actvDev->info.MBL = 0U;
  2001. gIsoDep.actvDev->info.DSI = RFAL_BR_106;
  2002. gIsoDep.actvDev->info.DRI = RFAL_BR_106;
  2003. gIsoDep.actvDev->info.FSxI = (uint8_t)
  2004. RFAL_ISODEP_FSXI_32; /* FSC default value is 32 bytes ISO14443-A 5.2.3 */
  2005. /*******************************************************************************/
  2006. /* Check for ATS optional fields */
  2007. if(gIsoDep.actvDev->activation.A.Listener.ATS.TL > RFAL_ISODEP_ATS_MIN_LEN) {
  2008. msgIt = RFAL_ISODEP_ATS_MIN_LEN;
  2009. /* Format byte T0 is optional, if present assign FSDI */
  2010. gIsoDep.actvDev->info.FSxI =
  2011. (gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2012. RFAL_ISODEP_ATS_T0_FSCI_MASK);
  2013. /* T0 has already been processed, always the same position */
  2014. msgIt++;
  2015. /* Check if TA is present */
  2016. if((gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2017. RFAL_ISODEP_ATS_T0_TA_PRESENCE_MASK) != 0U) {
  2018. rfalIsoDepCalcBitRate(
  2019. maxBR,
  2020. ((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++],
  2021. &gIsoDep.actvDev->info.DSI,
  2022. &gIsoDep.actvDev->info.DRI);
  2023. }
  2024. /* Check if TB is present */
  2025. if((gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2026. RFAL_ISODEP_ATS_T0_TB_PRESENCE_MASK) != 0U) {
  2027. gIsoDep.actvDev->info.SFGI =
  2028. ((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++];
  2029. gIsoDep.actvDev->info.FWI = (uint8_t)((gIsoDep.actvDev->info.SFGI >>
  2030. RFAL_ISODEP_ATS_TB_FWI_SHIFT) &
  2031. RFAL_ISODEP_ATS_FWI_MASK);
  2032. gIsoDep.actvDev->info.SFGI &= RFAL_ISODEP_ATS_TB_SFGI_MASK;
  2033. }
  2034. /* Check if TC is present */
  2035. if((gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2036. RFAL_ISODEP_ATS_T0_TC_PRESENCE_MASK) != 0U) {
  2037. /* Check for Protocol features support */
  2038. /* Advanced protocol features defined on Digital 1.0 Table 69, removed after */
  2039. gIsoDep.actvDev->info.supAdFt =
  2040. (((((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt] &
  2041. RFAL_ISODEP_ATS_TC_ADV_FEAT) != 0U) ?
  2042. true :
  2043. false);
  2044. gIsoDep.actvDev->info.supDID =
  2045. (((((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt] &
  2046. RFAL_ISODEP_ATS_TC_DID) != 0U) ?
  2047. true :
  2048. false);
  2049. gIsoDep.actvDev->info.supNAD =
  2050. (((((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++] &
  2051. RFAL_ISODEP_ATS_TC_NAD) != 0U) ?
  2052. true :
  2053. false);
  2054. }
  2055. }
  2056. gIsoDep.actvDev->info.FSx = rfalIsoDepFSxI2FSx(gIsoDep.actvDev->info.FSxI);
  2057. gIsoDep.fsx = gIsoDep.actvDev->info.FSx;
  2058. gIsoDep.actvDev->info.SFGT =
  2059. rfalIsoDepSFGI2SFGT((uint8_t)gIsoDep.actvDev->info.SFGI);
  2060. /* Ensure SFGT before following frame (reuse RFAL GT timer) */
  2061. rfalSetGT(rfalConvMsTo1fc(gIsoDep.actvDev->info.SFGT));
  2062. rfalFieldOnAndStartGT();
  2063. gIsoDep.actvDev->info.FWT = rfalIsoDepFWI2FWT(gIsoDep.actvDev->info.FWI);
  2064. gIsoDep.actvDev->info.dFWT = RFAL_ISODEP_DFWT_20;
  2065. gIsoDep.actvDev->info.DID =
  2066. ((gIsoDep.actvDev->info.supDID) ? gIsoDep.did : RFAL_ISODEP_NO_DID);
  2067. gIsoDep.actvDev->info.NAD = RFAL_ISODEP_NO_NAD;
  2068. /*******************************************************************************/
  2069. /* If higher bit rates are supported by both devices, send PPS */
  2070. if((gIsoDep.actvDev->info.DSI != RFAL_BR_106) ||
  2071. (gIsoDep.actvDev->info.DRI != RFAL_BR_106)) {
  2072. /* Send PPS */ /* PRQA S 0310 1 # MISRA 11.3 - Intentional safe cast to avoiding buffer duplication */
  2073. EXIT_ON_ERR(
  2074. ret,
  2075. rfalIsoDepStartPPS(
  2076. gIsoDep.actvDev->info.DID,
  2077. gIsoDep.actvDev->info.DSI,
  2078. gIsoDep.actvDev->info.DRI,
  2079. (rfalIsoDepPpsRes*)&gIsoDep.ctrlBuf));
  2080. gIsoDep.state = ISODEP_ST_PCD_ACT_PPS;
  2081. return ERR_BUSY;
  2082. }
  2083. return ERR_NONE;
  2084. }
  2085. }
  2086. break;
  2087. /*******************************************************************************/
  2088. case ISODEP_ST_PCD_ACT_PPS:
  2089. ret = rfalIsoDepGetPPSSTatus();
  2090. if(ret != ERR_BUSY) {
  2091. /* Check whether PPS has been acknowledge */
  2092. if(ret == ERR_NONE) {
  2093. /* DSI code the divisor from PICC to PCD */
  2094. /* DRI code the divisor from PCD to PICC */
  2095. rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI);
  2096. } else {
  2097. /* If PPS has faled keep activation bit rate */
  2098. gIsoDep.actvDev->info.DSI = RFAL_BR_106;
  2099. gIsoDep.actvDev->info.DRI = RFAL_BR_106;
  2100. }
  2101. }
  2102. break;
  2103. /*******************************************************************************/
  2104. default:
  2105. ret = ERR_WRONG_STATE;
  2106. break;
  2107. }
  2108. return ret;
  2109. }
  2110. #endif /* RFAL_FEATURE_NFCA */
  2111. #if RFAL_FEATURE_NFCB
  2112. /*******************************************************************************/
  2113. ReturnCode rfalIsoDepPollBHandleActivation(
  2114. rfalIsoDepFSxI FSDI,
  2115. uint8_t DID,
  2116. rfalBitRate maxBR,
  2117. uint8_t PARAM1,
  2118. const rfalNfcbListenDevice* nfcbDev,
  2119. const uint8_t* HLInfo,
  2120. uint8_t HLInfoLen,
  2121. rfalIsoDepDevice* isoDepDev) {
  2122. ReturnCode ret;
  2123. EXIT_ON_ERR(
  2124. ret,
  2125. rfalIsoDepPollBStartActivation(
  2126. FSDI, DID, maxBR, PARAM1, nfcbDev, HLInfo, HLInfoLen, isoDepDev));
  2127. rfalIsoDepRunBlocking(ret, rfalIsoDepPollBGetActivationStatus());
  2128. return ret;
  2129. }
  2130. /*******************************************************************************/
  2131. ReturnCode rfalIsoDepPollBStartActivation(
  2132. rfalIsoDepFSxI FSDI,
  2133. uint8_t DID,
  2134. rfalBitRate maxBR,
  2135. uint8_t PARAM1,
  2136. const rfalNfcbListenDevice* nfcbDev,
  2137. const uint8_t* HLInfo,
  2138. uint8_t HLInfoLen,
  2139. rfalIsoDepDevice* isoDepDev) {
  2140. ReturnCode ret;
  2141. /***************************************************************************/
  2142. /* Initialize ISO-DEP Device with info from SENSB_RES */
  2143. isoDepDev->info.FWI =
  2144. ((nfcbDev->sensbRes.protInfo.FwiAdcFo >> RFAL_NFCB_SENSB_RES_FWI_SHIFT) &
  2145. RFAL_NFCB_SENSB_RES_FWI_MASK);
  2146. isoDepDev->info.FWT = rfalIsoDepFWI2FWT(isoDepDev->info.FWI);
  2147. isoDepDev->info.dFWT = RFAL_NFCB_DFWT;
  2148. isoDepDev->info.SFGI =
  2149. (((uint32_t)nfcbDev->sensbRes.protInfo.SFGI >> RFAL_NFCB_SENSB_RES_SFGI_SHIFT) &
  2150. RFAL_NFCB_SENSB_RES_SFGI_MASK);
  2151. isoDepDev->info.SFGT = rfalIsoDepSFGI2SFGT((uint8_t)isoDepDev->info.SFGI);
  2152. isoDepDev->info.FSxI =
  2153. ((nfcbDev->sensbRes.protInfo.FsciProType >> RFAL_NFCB_SENSB_RES_FSCI_SHIFT) &
  2154. RFAL_NFCB_SENSB_RES_FSCI_MASK);
  2155. isoDepDev->info.FSx = rfalIsoDepFSxI2FSx(isoDepDev->info.FSxI);
  2156. isoDepDev->info.DID = DID;
  2157. isoDepDev->info.supDID =
  2158. (((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_FO_DID_MASK) != 0U) ? true :
  2159. false);
  2160. isoDepDev->info.supNAD =
  2161. (((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_FO_NAD_MASK) != 0U) ? true :
  2162. false);
  2163. /* Check if DID requested is supported by PICC */
  2164. if((DID != RFAL_ISODEP_NO_DID) && (!isoDepDev->info.supDID)) {
  2165. return ERR_PARAM;
  2166. }
  2167. /* Enable EMD handling according Digital 2.1 4.1.1.1 ; EMVCo 3.0 4.9.2 */
  2168. rfalSetErrorHandling(RFAL_ERRORHANDLING_EMVCO);
  2169. /***************************************************************************/
  2170. /* Set FDT Poll to be used on upcoming communications */
  2171. if(gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) {
  2172. /* Disregard Minimum TR2 returned by PICC, always use FDTb MIN EMVCo 3.0 6.3.2.10 */
  2173. rfalSetFDTPoll(RFAL_FDT_POLL_NFCB_POLLER);
  2174. } else {
  2175. /* Apply minimum TR2 from SENSB_RES Digital 2.1 7.6.2.23 */
  2176. rfalSetFDTPoll(rfalNfcbTR2ToFDT(
  2177. ((nfcbDev->sensbRes.protInfo.FsciProType >> RFAL_NFCB_SENSB_RES_PROTO_TR2_SHIFT) &
  2178. RFAL_NFCB_SENSB_RES_PROTO_TR2_MASK)));
  2179. }
  2180. /* Calculate max Bit Rate */
  2181. rfalIsoDepCalcBitRate(
  2182. maxBR, nfcbDev->sensbRes.protInfo.BRC, &isoDepDev->info.DSI, &isoDepDev->info.DRI);
  2183. /***************************************************************************/
  2184. /* Send ATTRIB Command */
  2185. EXIT_ON_ERR(
  2186. ret,
  2187. rfalIsoDepStartATTRIB(
  2188. (const uint8_t*)&nfcbDev->sensbRes.nfcid0,
  2189. (((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_ADC_ADV_FEATURE_MASK) !=
  2190. 0U) ?
  2191. PARAM1 :
  2192. RFAL_ISODEP_ATTRIB_REQ_PARAM1_DEFAULT),
  2193. isoDepDev->info.DSI,
  2194. isoDepDev->info.DRI,
  2195. FSDI,
  2196. (gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ?
  2197. RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK :
  2198. (nfcbDev->sensbRes.protInfo.FsciProType &
  2199. ((RFAL_NFCB_SENSB_RES_PROTO_TR2_MASK << RFAL_NFCB_SENSB_RES_PROTO_TR2_SHIFT) |
  2200. RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK)), /* EMVCo 2.6 6.4.1.9 */
  2201. DID,
  2202. HLInfo,
  2203. HLInfoLen,
  2204. (isoDepDev->info.FWT + isoDepDev->info.dFWT),
  2205. &isoDepDev->activation.B.Listener.ATTRIB_RES,
  2206. &isoDepDev->activation.B.Listener.ATTRIB_RESLen));
  2207. gIsoDep.actvDev = isoDepDev;
  2208. return ret;
  2209. }
  2210. /*******************************************************************************/
  2211. ReturnCode rfalIsoDepPollBGetActivationStatus(void) {
  2212. ReturnCode ret;
  2213. uint8_t mbli;
  2214. /***************************************************************************/
  2215. /* Process ATTRIB Response */
  2216. ret = rfalIsoDepGetATTRIBStatus();
  2217. if(ret != ERR_BUSY) {
  2218. if(ret == ERR_NONE) {
  2219. /* Digital 1.1 14.6.2.3 - Check if received DID match */
  2220. if((gIsoDep.actvDev->activation.B.Listener.ATTRIB_RES.mbliDid &
  2221. RFAL_ISODEP_ATTRIB_RES_DID_MASK) != gIsoDep.did) {
  2222. return ERR_PROTO;
  2223. }
  2224. /* Retrieve MBLI and calculate new FDS/MBL (Maximum Buffer Length) */
  2225. mbli =
  2226. ((gIsoDep.actvDev->activation.B.Listener.ATTRIB_RES.mbliDid >>
  2227. RFAL_ISODEP_ATTRIB_RES_MBLI_SHIFT) &
  2228. RFAL_ISODEP_ATTRIB_RES_MBLI_MASK);
  2229. if(mbli > 0U) {
  2230. /* Digital 1.1 14.6.2 Calculate Maximum Buffer Length MBL = FSC x 2^(MBLI-1) */
  2231. gIsoDep.actvDev->info.MBL =
  2232. (gIsoDep.actvDev->info.FSx * ((uint32_t)1U << (mbli - 1U)));
  2233. }
  2234. /* DSI code the divisor from PICC to PCD */
  2235. /* DRI code the divisor from PCD to PICC */
  2236. rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI);
  2237. /* REMARK: SoF EoF TR0 and TR1 are not passed on to RF layer */
  2238. /* Start the SFGT timer (reuse RFAL GT timer) */
  2239. rfalSetGT(rfalConvMsTo1fc(gIsoDep.actvDev->info.SFGT));
  2240. rfalFieldOnAndStartGT();
  2241. } else {
  2242. gIsoDep.actvDev->info.DSI = RFAL_BR_106;
  2243. gIsoDep.actvDev->info.DRI = RFAL_BR_106;
  2244. }
  2245. /*******************************************************************************/
  2246. /* Store already FS info, rfalIsoDepGetMaxInfLen() may be called before setting TxRx params */
  2247. gIsoDep.fsx = gIsoDep.actvDev->info.FSx;
  2248. }
  2249. return ret;
  2250. }
  2251. #endif /* RFAL_FEATURE_NFCB */
  2252. /*******************************************************************************/
  2253. ReturnCode rfalIsoDepPollHandleSParameters(
  2254. rfalIsoDepDevice* isoDepDev,
  2255. rfalBitRate maxTxBR,
  2256. rfalBitRate maxRxBR) {
  2257. uint8_t it;
  2258. uint8_t supPCD2PICC;
  2259. uint8_t supPICC2PCD;
  2260. uint8_t currenttxBR;
  2261. uint8_t currentrxBR;
  2262. rfalBitRate txBR;
  2263. rfalBitRate rxBR;
  2264. uint16_t rcvLen;
  2265. ReturnCode ret;
  2266. rfalIsoDepControlMsgSParam sParam;
  2267. if((isoDepDev == NULL) || (maxTxBR > RFAL_BR_13560) || (maxRxBR > RFAL_BR_13560)) {
  2268. return ERR_PARAM;
  2269. }
  2270. it = 0;
  2271. supPICC2PCD = 0x00;
  2272. supPCD2PICC = 0x00;
  2273. txBR = RFAL_BR_106;
  2274. rxBR = RFAL_BR_106;
  2275. sParam.pcb = ISODEP_PCB_SPARAMETERS;
  2276. /*******************************************************************************/
  2277. /* Send S(PARAMETERS) - Block Info */
  2278. sParam.sParam.tag = RFAL_ISODEP_SPARAM_TAG_BLOCKINFO;
  2279. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_BRREQ;
  2280. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_BRREQ_LEN;
  2281. sParam.sParam.length = it;
  2282. /* Send S(PARAMETERS). Use a fixed FWI of 4 ISO14443-4 2016 7.2 */
  2283. EXIT_ON_ERR(
  2284. ret,
  2285. rfalTransceiveBlockingTxRx(
  2286. (uint8_t*)&sParam,
  2287. (RFAL_ISODEP_SPARAM_HDR_LEN + (uint16_t)it),
  2288. (uint8_t*)&sParam,
  2289. sizeof(rfalIsoDepControlMsgSParam),
  2290. &rcvLen,
  2291. RFAL_TXRX_FLAGS_DEFAULT,
  2292. ISODEP_FWT_DEACTIVATION));
  2293. it = 0;
  2294. /*******************************************************************************/
  2295. /* Check S(PARAMETERS) response */
  2296. if((sParam.pcb != ISODEP_PCB_SPARAMETERS) ||
  2297. (sParam.sParam.tag != RFAL_ISODEP_SPARAM_TAG_BLOCKINFO) ||
  2298. (sParam.sParam.value[it] != RFAL_ISODEP_SPARAM_TAG_BRIND) ||
  2299. (rcvLen < RFAL_ISODEP_SPARAM_HDR_LEN) ||
  2300. (rcvLen != ((uint16_t)sParam.sParam.length + RFAL_ISODEP_SPARAM_HDR_LEN))) {
  2301. return ERR_PROTO;
  2302. }
  2303. /* Retrieve PICC's bit rate PICC capabilities */
  2304. for(it = 0; it < (rcvLen - (uint16_t)RFAL_ISODEP_SPARAM_TAG_LEN); it++) {
  2305. if((sParam.sParam.value[it] == RFAL_ISODEP_SPARAM_TAG_SUP_PCD2PICC) &&
  2306. (sParam.sParam.value[it + (uint16_t)RFAL_ISODEP_SPARAM_TAG_LEN] ==
  2307. RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN)) {
  2308. supPCD2PICC = sParam.sParam.value[it + RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN];
  2309. }
  2310. if((sParam.sParam.value[it] == RFAL_ISODEP_SPARAM_TAG_SUP_PICC2PCD) &&
  2311. (sParam.sParam.value[it + (uint16_t)RFAL_ISODEP_SPARAM_TAG_LEN] ==
  2312. RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN)) {
  2313. supPICC2PCD = sParam.sParam.value[it + RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN];
  2314. }
  2315. }
  2316. /*******************************************************************************/
  2317. /* Check if requested bit rates are supported by PICC */
  2318. if((supPICC2PCD == 0x00U) || (supPCD2PICC == 0x00U)) {
  2319. return ERR_PROTO;
  2320. }
  2321. for(it = 0; it <= (uint8_t)maxTxBR; it++) {
  2322. if((supPCD2PICC & (0x01U << it)) != 0U) {
  2323. txBR = (rfalBitRate)
  2324. it; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and above clamping of maxTxBR guarantee no invalid enum values to be created */
  2325. }
  2326. }
  2327. for(it = 0; it <= (uint8_t)maxRxBR; it++) {
  2328. if((supPICC2PCD & (0x01U << it)) != 0U) {
  2329. rxBR = (rfalBitRate)
  2330. it; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and above clamping of maxTxBR guarantee no invalid enum values to be created */
  2331. }
  2332. }
  2333. it = 0;
  2334. currenttxBR = (uint8_t)txBR;
  2335. currentrxBR = (uint8_t)rxBR;
  2336. /*******************************************************************************/
  2337. /* Send S(PARAMETERS) - Bit rates Activation */
  2338. sParam.sParam.tag = RFAL_ISODEP_SPARAM_TAG_BLOCKINFO;
  2339. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_BRACT;
  2340. sParam.sParam.value[it++] =
  2341. (RFAL_ISODEP_SPARAM_TVL_HDR_LEN + RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN +
  2342. RFAL_ISODEP_SPARAM_TVL_HDR_LEN + RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN);
  2343. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_SEL_PCD2PICC;
  2344. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN;
  2345. sParam.sParam.value[it++] = ((uint8_t)0x01U << currenttxBR);
  2346. sParam.sParam.value[it++] = 0x00U;
  2347. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_SEL_PICC2PCD;
  2348. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN;
  2349. sParam.sParam.value[it++] = ((uint8_t)0x01U << currentrxBR);
  2350. sParam.sParam.value[it++] = 0x00U;
  2351. sParam.sParam.length = it;
  2352. EXIT_ON_ERR(
  2353. ret,
  2354. rfalTransceiveBlockingTxRx(
  2355. (uint8_t*)&sParam,
  2356. (RFAL_ISODEP_SPARAM_HDR_LEN + (uint16_t)it),
  2357. (uint8_t*)&sParam,
  2358. sizeof(rfalIsoDepControlMsgSParam),
  2359. &rcvLen,
  2360. RFAL_TXRX_FLAGS_DEFAULT,
  2361. (isoDepDev->info.FWT + isoDepDev->info.dFWT)));
  2362. it = 0;
  2363. /*******************************************************************************/
  2364. /* Check S(PARAMETERS) Acknowledge */
  2365. if((sParam.pcb != ISODEP_PCB_SPARAMETERS) ||
  2366. (sParam.sParam.tag != RFAL_ISODEP_SPARAM_TAG_BLOCKINFO) ||
  2367. (sParam.sParam.value[it] != RFAL_ISODEP_SPARAM_TAG_BRACK) ||
  2368. (rcvLen < RFAL_ISODEP_SPARAM_HDR_LEN)) {
  2369. return ERR_PROTO;
  2370. }
  2371. EXIT_ON_ERR(ret, rfalSetBitRate(txBR, rxBR));
  2372. isoDepDev->info.DRI = txBR;
  2373. isoDepDev->info.DSI = rxBR;
  2374. return ERR_NONE;
  2375. }
  2376. /*******************************************************************************/
  2377. static void rfalIsoDepCalcBitRate(
  2378. rfalBitRate maxAllowedBR,
  2379. uint8_t piccBRCapability,
  2380. rfalBitRate* dsi,
  2381. rfalBitRate* dri) {
  2382. uint8_t driMask;
  2383. uint8_t dsiMask;
  2384. int8_t i;
  2385. bool bitrateFound;
  2386. rfalBitRate curMaxBR;
  2387. curMaxBR = maxAllowedBR;
  2388. do {
  2389. bitrateFound = true;
  2390. (*dsi) = RFAL_BR_106;
  2391. (*dri) = RFAL_BR_106;
  2392. /* Digital 1.0 5.6.2.5 & 11.6.2.14: A received RFU value of b4 = 1b MUST be interpreted as if b7 to b1 ? 0000000b (only 106 kbits/s in both direction) */
  2393. if(((RFAL_ISODEP_BITRATE_RFU_MASK & piccBRCapability) != 0U) || (curMaxBR > RFAL_BR_848) ||
  2394. (curMaxBR == RFAL_BR_KEEP)) {
  2395. return;
  2396. }
  2397. /***************************************************************************/
  2398. /* Determine Listen->Poll bit rate */
  2399. dsiMask = (piccBRCapability & RFAL_ISODEP_BSI_MASK);
  2400. for(i = 2; i >= 0; i--) // Check supported bit rate from the highest
  2401. {
  2402. if(((dsiMask & (0x10U << (uint8_t)i)) != 0U) &&
  2403. (((uint8_t)i + 1U) <= (uint8_t)curMaxBR)) {
  2404. uint8_t newdsi = ((uint8_t)i) + 1U;
  2405. (*dsi) = (rfalBitRate)
  2406. newdsi; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and range of loop variable guarantee no invalid enum values to be created */
  2407. break;
  2408. }
  2409. }
  2410. /***************************************************************************/
  2411. /* Determine Poll->Listen bit rate */
  2412. driMask = (piccBRCapability & RFAL_ISODEP_BRI_MASK);
  2413. for(i = 2; i >= 0; i--) /* Check supported bit rate from the highest */
  2414. {
  2415. if(((driMask & (0x01U << (uint8_t)i)) != 0U) &&
  2416. (((uint8_t)i + 1U) <= (uint8_t)curMaxBR)) {
  2417. uint8_t newdri = ((uint8_t)i) + 1U;
  2418. (*dri) = (rfalBitRate)
  2419. newdri; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and range of loop variable guarantee no invalid enum values to be created */
  2420. break;
  2421. }
  2422. }
  2423. /***************************************************************************/
  2424. /* Check if different bit rate is supported */
  2425. /* Digital 1.0 Table 67: if b8=1b, then only the same bit rate divisor for both directions is supported */
  2426. if((piccBRCapability & RFAL_ISODEP_SAME_BITRATE_MASK) != 0U) {
  2427. (*dsi) = MIN((*dsi), (*dri));
  2428. (*dri) = (*dsi);
  2429. /* Check that the baudrate is supported */
  2430. if((RFAL_BR_106 != (*dsi)) &&
  2431. (!(((dsiMask & (0x10U << ((uint8_t)(*dsi) - 1U))) != 0U) &&
  2432. ((driMask & (0x01U << ((uint8_t)(*dri) - 1U))) != 0U)))) {
  2433. bitrateFound = false;
  2434. curMaxBR =
  2435. (*dsi); /* set allowed bitrate to be lowest and determine bit rate again */
  2436. }
  2437. }
  2438. } while(!(bitrateFound));
  2439. }
  2440. /*******************************************************************************/
  2441. static uint32_t rfalIsoDepSFGI2SFGT(uint8_t sfgi) {
  2442. uint32_t sfgt;
  2443. uint8_t tmpSFGI;
  2444. tmpSFGI = sfgi;
  2445. if(tmpSFGI > ISODEP_SFGI_MAX) {
  2446. tmpSFGI = ISODEP_SFGI_MIN;
  2447. }
  2448. if(tmpSFGI != ISODEP_SFGI_MIN) {
  2449. /* If sfgi != 0 wait SFGT + dSFGT Digital 1.1 13.8.2.1 */
  2450. sfgt = isoDepCalcSGFT(sfgi) + isoDepCalcdSGFT(sfgi);
  2451. }
  2452. /* Otherwise use FDTPoll min Digital 1.1 13.8.2.3*/
  2453. else {
  2454. sfgt = RFAL_FDT_POLL_NFCA_POLLER;
  2455. }
  2456. /* Convert carrier cycles to milli seconds */
  2457. return (rfalConv1fcToMs(sfgt) + 1U);
  2458. }
  2459. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  2460. /*******************************************************************************/
  2461. static void rfalIsoDepApdu2IBLockParam(
  2462. rfalIsoDepApduTxRxParam apduParam,
  2463. rfalIsoDepTxRxParam* iBlockParam,
  2464. uint16_t txPos,
  2465. uint16_t rxPos) {
  2466. NO_WARNING(rxPos); /* Keep this param for future use */
  2467. iBlockParam->DID = apduParam.DID;
  2468. iBlockParam->FSx = apduParam.FSx;
  2469. iBlockParam->ourFSx = apduParam.ourFSx;
  2470. iBlockParam->FWT = apduParam.FWT;
  2471. iBlockParam->dFWT = apduParam.dFWT;
  2472. if((apduParam.txBufLen - txPos) > rfalIsoDepGetMaxInfLen()) {
  2473. iBlockParam->isTxChaining = true;
  2474. iBlockParam->txBufLen = rfalIsoDepGetMaxInfLen();
  2475. } else {
  2476. iBlockParam->isTxChaining = false;
  2477. iBlockParam->txBufLen = (apduParam.txBufLen - txPos);
  2478. }
  2479. /* TxBuf is moved to the beginning for every I-Block */
  2480. iBlockParam->txBuf =
  2481. (rfalIsoDepBufFormat*)apduParam
  2482. .txBuf; /* PRQA S 0310 # MISRA 11.3 - Intentional safe cast to avoiding large buffer duplication */
  2483. iBlockParam->rxBuf =
  2484. apduParam
  2485. .tmpBuf; /* Simply using the apdu buffer is not possible because of current ACK handling */
  2486. iBlockParam->isRxChaining = &gIsoDep.isAPDURxChaining;
  2487. iBlockParam->rxLen = apduParam.rxLen;
  2488. }
  2489. /*******************************************************************************/
  2490. ReturnCode rfalIsoDepStartApduTransceive(rfalIsoDepApduTxRxParam param) {
  2491. rfalIsoDepTxRxParam txRxParam;
  2492. /* Initialize and store APDU context */
  2493. gIsoDep.APDUParam = param;
  2494. gIsoDep.APDUTxPos = 0;
  2495. gIsoDep.APDURxPos = 0;
  2496. /* Assign current FSx to calculate INF length (only change the FSx from activation if no to Keep) */
  2497. gIsoDep.ourFsx = ((param.ourFSx != RFAL_ISODEP_FSX_KEEP) ? param.ourFSx : gIsoDep.ourFsx);
  2498. gIsoDep.fsx = param.FSx;
  2499. /* Convert APDU TxRxParams to I-Block TxRxParams */
  2500. rfalIsoDepApdu2IBLockParam(
  2501. gIsoDep.APDUParam, &txRxParam, gIsoDep.APDUTxPos, gIsoDep.APDURxPos);
  2502. return rfalIsoDepStartTransceive(txRxParam);
  2503. }
  2504. /*******************************************************************************/
  2505. ReturnCode rfalIsoDepGetApduTransceiveStatus(void) {
  2506. ReturnCode ret;
  2507. rfalIsoDepTxRxParam txRxParam;
  2508. ret = rfalIsoDepGetTransceiveStatus();
  2509. switch(ret) {
  2510. /*******************************************************************************/
  2511. case ERR_NONE:
  2512. /* Check if we are still doing chaining on Tx */
  2513. if(gIsoDep.isTxChaining) {
  2514. /* Add already Tx bytes */
  2515. gIsoDep.APDUTxPos += gIsoDep.txBufLen;
  2516. /* Convert APDU TxRxParams to I-Block TxRxParams */
  2517. rfalIsoDepApdu2IBLockParam(
  2518. gIsoDep.APDUParam, &txRxParam, gIsoDep.APDUTxPos, gIsoDep.APDURxPos);
  2519. if(txRxParam.txBufLen > 0U) /* MISRA 21.18 */
  2520. {
  2521. /* Move next I-Block to beginning of APDU Tx buffer */
  2522. ST_MEMCPY(
  2523. gIsoDep.APDUParam.txBuf->apdu,
  2524. &gIsoDep.APDUParam.txBuf->apdu[gIsoDep.APDUTxPos],
  2525. txRxParam.txBufLen);
  2526. }
  2527. EXIT_ON_ERR(ret, rfalIsoDepStartTransceive(txRxParam));
  2528. return ERR_BUSY;
  2529. }
  2530. /* APDU TxRx is done */
  2531. /* fall through */
  2532. /*******************************************************************************/
  2533. case ERR_AGAIN: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  2534. /* Check if no APDU transceive has been started before (data from rfalIsoDepListenStartActivation) */
  2535. if(gIsoDep.APDUParam.rxLen == NULL) {
  2536. if(ret == ERR_AGAIN) {
  2537. /* In Listen mode first chained packet cannot be retrieved via APDU interface */
  2538. return ERR_NOTSUPP;
  2539. }
  2540. /* TxRx is complete and full data is already available */
  2541. return ERR_NONE;
  2542. }
  2543. if(*gIsoDep.APDUParam.rxLen > 0U) /* MISRA 21.18 */
  2544. {
  2545. /* Ensure that data in tmpBuf still fits into APDU buffer */
  2546. if((gIsoDep.APDURxPos + (*gIsoDep.APDUParam.rxLen)) >
  2547. (uint16_t)RFAL_FEATURE_ISO_DEP_APDU_MAX_LEN) {
  2548. return ERR_NOMEM;
  2549. }
  2550. /* Copy chained packet from tmp buffer to APDU buffer */
  2551. ST_MEMCPY(
  2552. &gIsoDep.APDUParam.rxBuf->apdu[gIsoDep.APDURxPos],
  2553. gIsoDep.APDUParam.tmpBuf->inf,
  2554. *gIsoDep.APDUParam.rxLen);
  2555. gIsoDep.APDURxPos += *gIsoDep.APDUParam.rxLen;
  2556. }
  2557. /* Update output param rxLen */
  2558. *gIsoDep.APDUParam.rxLen = gIsoDep.APDURxPos * 8;
  2559. /* Wait for following I-Block or APDU TxRx has finished */
  2560. return ((ret == ERR_AGAIN) ? ERR_BUSY : ERR_NONE);
  2561. /*******************************************************************************/
  2562. default:
  2563. /* MISRA 16.4: no empty default statement (a comment being enough) */
  2564. break;
  2565. }
  2566. return ret;
  2567. }
  2568. #endif /* RFAL_FEATURE_ISO_DEP */