check.c 7.0 KB

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  1. #include "check.h"
  2. #include "common_defines.h"
  3. #include <stm32wbxx.h>
  4. #include <furi_hal_console.h>
  5. #include <furi_hal_power.h>
  6. #include <furi_hal_rtc.h>
  7. #include <furi_hal_debug.h>
  8. #include <furi_hal_bt.h>
  9. #include <stdio.h>
  10. #include <FreeRTOS.h>
  11. #include <task.h>
  12. #include <stdio.h>
  13. #include <stdlib.h>
  14. PLACE_IN_SECTION("MB_MEM2") const char* __furi_check_message = NULL;
  15. PLACE_IN_SECTION("MB_MEM2") uint32_t __furi_check_registers[13] = {0};
  16. /** Load r12 value to __furi_check_message and store registers to __furi_check_registers */
  17. #define GET_MESSAGE_AND_STORE_REGISTERS() \
  18. asm volatile("ldr r11, =__furi_check_message \n" \
  19. "str r12, [r11] \n" \
  20. "ldr r12, =__furi_check_registers \n" \
  21. "stm r12, {r0-r11} \n" \
  22. "str lr, [r12, #48] \n" \
  23. : \
  24. : \
  25. : "memory");
  26. /** Restore registers and halt MCU
  27. *
  28. * - Always use it with GET_MESSAGE_AND_STORE_REGISTERS
  29. * - If debugger is(was) connected this routine will raise bkpt
  30. * - If debugger is not connected then endless loop
  31. *
  32. */
  33. #define RESTORE_REGISTERS_AND_HALT_MCU(debug) \
  34. register const bool r0 asm("r0") = debug; \
  35. asm volatile("cbnz r0, with_debugger%= \n" \
  36. "ldr r12, =__furi_check_registers\n" \
  37. "ldm r12, {r0-r11} \n" \
  38. "loop%=: \n" \
  39. "wfi \n" \
  40. "b loop%= \n" \
  41. "with_debugger%=: \n" \
  42. "ldr r12, =__furi_check_registers\n" \
  43. "ldm r12, {r0-r11} \n" \
  44. "debug_loop%=: \n" \
  45. "bkpt 0x00 \n" \
  46. "wfi \n" \
  47. "b debug_loop%= \n" \
  48. : \
  49. : "r"(r0) \
  50. : "memory");
  51. extern size_t xPortGetTotalHeapSize(void);
  52. extern size_t xPortGetFreeHeapSize(void);
  53. extern size_t xPortGetMinimumEverFreeHeapSize(void);
  54. static void __furi_put_uint32_as_text(uint32_t data) {
  55. char tmp_str[] = "-2147483648";
  56. itoa(data, tmp_str, 10);
  57. furi_hal_console_puts(tmp_str);
  58. }
  59. static void __furi_put_uint32_as_hex(uint32_t data) {
  60. char tmp_str[] = "0xFFFFFFFF";
  61. itoa(data, tmp_str, 16);
  62. furi_hal_console_puts(tmp_str);
  63. }
  64. static void __furi_print_register_info() {
  65. // Print registers
  66. for(uint8_t i = 0; i < 12; i++) {
  67. furi_hal_console_puts("\r\n\tr");
  68. __furi_put_uint32_as_text(i);
  69. furi_hal_console_puts(" : ");
  70. __furi_put_uint32_as_hex(__furi_check_registers[i]);
  71. }
  72. furi_hal_console_puts("\r\n\tlr : ");
  73. __furi_put_uint32_as_hex(__furi_check_registers[12]);
  74. }
  75. static void __furi_print_stack_info() {
  76. furi_hal_console_puts("\r\n\tstack watermark: ");
  77. __furi_put_uint32_as_text(uxTaskGetStackHighWaterMark(NULL) * 4);
  78. }
  79. static void __furi_print_bt_stack_info() {
  80. const FuriHalBtHardfaultInfo* fault_info = furi_hal_bt_get_hardfault_info();
  81. if(fault_info == NULL) {
  82. furi_hal_console_puts("\r\n\tcore2: not faulted");
  83. } else {
  84. furi_hal_console_puts("\r\n\tcore2: hardfaulted.\r\n\tPC: ");
  85. __furi_put_uint32_as_hex(fault_info->source_pc);
  86. furi_hal_console_puts("\r\n\tLR: ");
  87. __furi_put_uint32_as_hex(fault_info->source_lr);
  88. furi_hal_console_puts("\r\n\tSP: ");
  89. __furi_put_uint32_as_hex(fault_info->source_sp);
  90. }
  91. }
  92. static void __furi_print_heap_info() {
  93. furi_hal_console_puts("\r\n\t heap total: ");
  94. __furi_put_uint32_as_text(xPortGetTotalHeapSize());
  95. furi_hal_console_puts("\r\n\t heap free: ");
  96. __furi_put_uint32_as_text(xPortGetFreeHeapSize());
  97. furi_hal_console_puts("\r\n\t heap watermark: ");
  98. __furi_put_uint32_as_text(xPortGetMinimumEverFreeHeapSize());
  99. }
  100. static void __furi_print_name(bool isr) {
  101. if(isr) {
  102. furi_hal_console_puts("[ISR ");
  103. __furi_put_uint32_as_text(__get_IPSR());
  104. furi_hal_console_puts("] ");
  105. } else {
  106. const char* name = pcTaskGetName(NULL);
  107. if(name == NULL) {
  108. furi_hal_console_puts("[main] ");
  109. } else {
  110. furi_hal_console_puts("[");
  111. furi_hal_console_puts(name);
  112. furi_hal_console_puts("] ");
  113. }
  114. }
  115. }
  116. FURI_NORETURN void __furi_crash() {
  117. __disable_irq();
  118. GET_MESSAGE_AND_STORE_REGISTERS();
  119. bool isr = FURI_IS_IRQ_MODE();
  120. if(__furi_check_message == NULL) {
  121. __furi_check_message = "Fatal Error";
  122. } else if(__furi_check_message == (void*)__FURI_ASSERT_MESSAGE_FLAG) {
  123. __furi_check_message = "furi_assert failed";
  124. } else if(__furi_check_message == (void*)__FURI_CHECK_MESSAGE_FLAG) {
  125. __furi_check_message = "furi_check failed";
  126. }
  127. furi_hal_console_puts("\r\n\033[0;31m[CRASH]");
  128. __furi_print_name(isr);
  129. furi_hal_console_puts(__furi_check_message);
  130. __furi_print_register_info();
  131. if(!isr) {
  132. __furi_print_stack_info();
  133. }
  134. __furi_print_heap_info();
  135. __furi_print_bt_stack_info();
  136. #ifndef FURI_DEBUG
  137. // Check if debug enabled by DAP
  138. // https://developer.arm.com/documentation/ddi0403/d/Debug-Architecture/ARMv7-M-Debug/Debug-register-support-in-the-SCS/Debug-Halting-Control-and-Status-Register--DHCSR?lang=en
  139. bool debug = CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk;
  140. if(debug) {
  141. #endif
  142. furi_hal_console_puts("\r\nSystem halted. Connect debugger for more info\r\n");
  143. furi_hal_console_puts("\033[0m\r\n");
  144. furi_hal_debug_enable();
  145. RESTORE_REGISTERS_AND_HALT_MCU(true);
  146. #ifndef FURI_DEBUG
  147. } else {
  148. furi_hal_rtc_set_fault_data((uint32_t)__furi_check_message);
  149. furi_hal_console_puts("\r\nRebooting system.\r\n");
  150. furi_hal_console_puts("\033[0m\r\n");
  151. furi_hal_power_reset();
  152. }
  153. #endif
  154. __builtin_unreachable();
  155. }
  156. FURI_NORETURN void __furi_halt() {
  157. __disable_irq();
  158. GET_MESSAGE_AND_STORE_REGISTERS();
  159. bool isr = FURI_IS_IRQ_MODE();
  160. if(__furi_check_message == NULL) {
  161. __furi_check_message = "System halt requested.";
  162. }
  163. furi_hal_console_puts("\r\n\033[0;31m[HALT]");
  164. __furi_print_name(isr);
  165. furi_hal_console_puts(__furi_check_message);
  166. furi_hal_console_puts("\r\nSystem halted. Bye-bye!\r\n");
  167. furi_hal_console_puts("\033[0m\r\n");
  168. // Check if debug enabled by DAP
  169. // https://developer.arm.com/documentation/ddi0403/d/Debug-Architecture/ARMv7-M-Debug/Debug-register-support-in-the-SCS/Debug-Halting-Control-and-Status-Register--DHCSR?lang=en
  170. bool debug = CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk;
  171. RESTORE_REGISTERS_AND_HALT_MCU(debug);
  172. __builtin_unreachable();
  173. }