cc1101-workaround.cpp 16 KB

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  1. #include "flipper.h"
  2. #include "cc1101-workaround/cc1101.h"
  3. extern "C" void cli_print(const char* str);
  4. #define RSSI_DELAY 5000 //rssi delay in micro second
  5. #define CHAN_SPA 0.05 // channel spacing
  6. int16_t rssi_to_dbm(uint8_t rssi_dec, uint8_t rssiOffset) {
  7. int16_t rssi;
  8. if(rssi_dec >= 128) {
  9. rssi = (int16_t)((int16_t)(rssi_dec - 256) / 2) - rssiOffset;
  10. } else {
  11. rssi = (rssi_dec / 2) - rssiOffset;
  12. }
  13. return rssi;
  14. }
  15. typedef struct {
  16. float base_freq;
  17. uint8_t reg[3]; // FREQ2, FREQ1, FREQ0
  18. uint8_t first_channel;
  19. uint8_t last_channel;
  20. uint8_t rssi_offset;
  21. } Band;
  22. typedef struct {
  23. const Band* band;
  24. uint16_t channel;
  25. } FreqConfig;
  26. void setup_freq(CC1101* cc1101, const FreqConfig* config) {
  27. // cc1101->SpiWriteReg(CC1101_MCSM0, 0x08); // disalbe FS_AUTOCAL
  28. // cc1101->SpiWriteReg(CC1101_AGCCTRL2, 0x43 | 0x0C); // MAX_DVGA_GAIN to 11 for fast rssi
  29. // cc1101->SpiWriteReg(CC1101_AGCCTRL0, 0xB0); // max AGC WAIT_TIME; 0 filter_length
  30. // cc1101->SetMod(GFSK); // set to GFSK for fast rssi measurement | +8 is dcfilter off
  31. uint32_t freq_reg = config->band->base_freq * 1e6 / (F_OSC / 65536);
  32. cc1101->SetFreq((freq_reg >> 16) & 0xFF, (freq_reg >> 8) & 0xFF, (freq_reg)&0xFF);
  33. cc1101->SetChannel(config->channel);
  34. /*
  35. //set test0 to 0x09
  36. cc1101->SpiWriteReg(CC1101_TEST0, 0x09);
  37. //set FSCAL2 to 0x2A to force VCO HIGH
  38. cc1101->SpiWriteReg(CC1101_FSCAL2, 0x2A);
  39. // perform a manual calibration by issuing SCAL command
  40. cc1101->SpiStrobe(CC1101_SCAL);
  41. */
  42. }
  43. static GpioPin debug_0 = {GPIOB, GPIO_PIN_2};
  44. int16_t rx_rssi(CC1101* cc1101, const FreqConfig* config) {
  45. // cc1101->SpiStrobe(CC1101_SFRX);
  46. // cc1101->SetReceive();
  47. // uint8_t begin_size = cc1101->SpiReadStatus(CC1101_RXBYTES);
  48. // uint8_t rx_status = cc1101->SpiReadStatus(CC1101_MARCSTATE);
  49. // delay_us(RSSI_DELAY);
  50. // osDelay(15);
  51. // uint8_t end_size = cc1101->SpiReadStatus(CC1101_RXBYTES);
  52. // 1.4.8) read PKTSTATUS register while the radio is in RX state
  53. /*uint8_t _pkt_status = */ // cc1101->SpiReadStatus(CC1101_PKTSTATUS);
  54. // 1.4.9) enter IDLE state by issuing a SIDLE command
  55. // cc1101->SpiStrobe(CC1101_SIDLE);
  56. // //read rssi value and converto to dBm form
  57. uint8_t rssi_dec = (uint8_t)cc1101->SpiReadStatus(CC1101_RSSI);
  58. int16_t rssi_dBm = rssi_to_dbm(rssi_dec, config->band->rssi_offset);
  59. /*
  60. char buf[256];
  61. sprintf(buf, "status: %d -> %d, rssi: %d\n", rx_status, cc1101->SpiReadStatus(CC1101_MARCSTATE), rssi_dBm);
  62. cli_print(buf);
  63. sprintf(buf, "begin: %d, end: %d\n", begin_size, end_size);
  64. cli_print(buf);
  65. */
  66. // uint8_t rx_data[64];
  67. // uint8_t fifo_length = end_size - begin_size;
  68. /*
  69. if(fifo_length < 64) {
  70. // cc1101->SpiReadBurstReg(CC1101_RXFIFO, rx_data, fifo_length);
  71. *
  72. printf("FIFO:");
  73. for(uint8_t i = 0; i < fifo_length; i++) {
  74. for(uint8_t bit = 0; bit < 8; bit++) {
  75. printf("%s", (rx_data[i] & (1 << bit)) > 0 ? "1" : "0");
  76. }
  77. printf(" ");
  78. }
  79. printf("\n");
  80. *
  81. for(uint8_t i = 0; i < fifo_length; i++) {
  82. for(uint8_t bit = 0; bit < 8; bit++) {
  83. gpio_write((GpioPin*)&debug_0, (rx_data[i] & (1 << bit)) > 0);
  84. delay_us(5);
  85. }
  86. }
  87. } else {
  88. cli_print("fifo size over\n");
  89. }
  90. */
  91. return rssi_dBm;
  92. }
  93. void tx(CC1101* cc1101, const FreqConfig* config) {
  94. uint32_t freq_reg = config->band->base_freq * 1e6 / (F_OSC / 65536);
  95. cc1101->SetFreq((freq_reg >> 16) & 0xFF, (freq_reg >> 8) & 0xFF, (freq_reg)&0xFF);
  96. cc1101->SetChannel(config->channel);
  97. cc1101->SetTransmit();
  98. }
  99. void idle(CC1101* cc1101) {
  100. cc1101->SpiStrobe(CC1101_SIDLE);
  101. }
  102. void flp_config(CC1101* cc1101) {
  103. // cc1101->SpiWriteReg(CC1101_FSCTRL1, 0x06); //IF frequency
  104. // cc1101->SpiWriteReg(CC1101_FSCTRL0, 0x00); //frequency offset before synthesizer
  105. // cc1101->SpiWriteReg(CC1101_MDMCFG4, 0xCC); // RX filter bandwidth 100k(0xcc)
  106. // cc1101->SpiWriteReg(CC1101_MDMCFG3, 0x43); //datarate config 512kBaud for the purpose of fast rssi measurement
  107. // cc1101->SpiWriteReg(CC1101_MDMCFG1, 0x21); //FEC preamble etc. last 2 bits for channel spacing
  108. // cc1101->SpiWriteReg(CC1101_MDMCFG0, 0xF8); //100khz channel spacing
  109. // CC1101_CHANNR moved to SetChannel func
  110. cc1101->SpiWriteReg(
  111. CC1101_MCSM0, 0x18); // calibrate when going from IDLE to RX or TX ; 149 - 155 μs timeout
  112. // MCSM0.FS_AUTOCAL[1:0] = 1
  113. // cc1101->SpiSetRegValue(CC1101_MCSM0, 1, 5, 4); // this not work
  114. // cc1101->SpiWriteReg(CC1101_FOCCFG, 0x16); //frequency compensation
  115. cc1101->SpiWriteReg(CC1101_AGCCTRL2, 0x43);
  116. cc1101->SpiWriteReg(CC1101_AGCCTRL1, 0x49);
  117. cc1101->SpiWriteReg(CC1101_AGCCTRL0, 0x91);
  118. //freq synthesizer calibration
  119. cc1101->SpiWriteReg(CC1101_FSCAL3, 0xEA);
  120. cc1101->SpiWriteReg(CC1101_FSCAL2, 0x2A);
  121. cc1101->SpiWriteReg(CC1101_FSCAL1, 0x00);
  122. cc1101->SpiWriteReg(CC1101_FSCAL0, 0x1F);
  123. // cc1101->SpiWriteReg(CC1101_TEST2, 0x81);
  124. // cc1101->SpiWriteReg(CC1101_TEST1, 0x35);
  125. // cc1101->SpiWriteReg(CC1101_TEST0, 0x0B); //should be 0x0B for lower than 430.6MHz and 0x09 for higher
  126. // cc1101->SpiWriteReg(CC1101_IOCFG2, 0x0D); //data output pin for asynchronous mode
  127. // cc1101->SpiWriteReg(CC1101_IOCFG0, 0x2E); //High impedance (3-state), GDO0 configed as data input for asynchronous mode
  128. // cc1101->SpiWriteReg(CC1101_PKTCTRL0, 0x33); //whitening off; asynchronous serial mode; CRC diable;reserved
  129. // cc1101->SpiWriteReg(CC1101_FIFOTHR, 0x47); //Adc_retention enabled for RX filter bandwidth less than 325KHz; defalut fifo threthold.
  130. // === Transparent mode ===
  131. // async data out
  132. cc1101->SpiSetRegValue(CC1101_IOCFG0, 13, 5, 0);
  133. // FIFOTHR.ADC_RETENTION = 1
  134. cc1101->SpiSetRegValue(CC1101_FIFOTHR, 1, 6, 6);
  135. // PKTCTRL1.APPEND_STATUS = 0
  136. cc1101->SpiSetRegValue(CC1101_PKTCTRL1, 0, 2, 2);
  137. // PKTCTRL0.WHITE_DATA = 0
  138. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 0, 6, 6);
  139. // PKTCTRL0.LENGTH_CONFIG = 2 // Infinite packet length mode
  140. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 2, 1, 0);
  141. // PKTCTRL0.CRC_EN = 0
  142. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 0, 2, 2);
  143. // PKTCTRL0.PKT_FORMAT = 3
  144. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 3, 5, 4);
  145. // bandwidth 50-100 kHz
  146. if(!cc1101->setRxBandwidth(75.0)) {
  147. printf("wrong rx bw\n");
  148. }
  149. // datarate ~30 kbps
  150. if(!cc1101->setBitRate(100.)) {
  151. printf("wrong bitrate\n");
  152. }
  153. cc1101->SetReceive();
  154. // mod
  155. // MDMCFG2.MOD_FORMAT = 3 (3: OOK, 0: 2-FSK)
  156. cc1101->SpiSetRegValue(CC1101_MDMCFG2, 3, 6, 4);
  157. // MDMCFG2.SYNC_MODE = 0
  158. cc1101->SpiSetRegValue(CC1101_MDMCFG2, 0, 2, 0);
  159. }
  160. void async_config(CC1101* cc1101) {
  161. cc1101->SpiSetRegValue(CC1101_IOCFG0, 13, 5, 0); // GDO0 Output Pin Configuration
  162. // FIFOTHR.ADC_RETENTION = 1
  163. cc1101->SpiSetRegValue(CC1101_FIFOTHR, 1, 6, 6);
  164. // PKTCTRL1.APPEND_STATUS = 0
  165. cc1101->SpiSetRegValue(CC1101_PKTCTRL1, 0, 2, 2);
  166. cc1101->SpiWriteReg(CC1101_PKTCTRL0, 0x32); // Packet Automation Control
  167. /*
  168. FIXME: this sequence not work
  169. // PKTCTRL0.PKT_FORMAT = 3
  170. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 3, 5, 4);
  171. // PKTCTRL0.LENGTH_CONFIG = 2 // Infinite packet length mode
  172. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 2, 1, 0);
  173. // PKTCTRL0.CRC_EN = 0
  174. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 0, 2, 2);
  175. // PKTCTRL0.WHITE_DATA = 0
  176. cc1101->SpiSetRegValue(CC1101_PKTCTRL0, 0, 6, 6);
  177. */
  178. cc1101->SpiWriteReg(CC1101_MDMCFG4, 0xD6); //Modem Configuration
  179. cc1101->SpiWriteReg(CC1101_MDMCFG3, 0xE4); //Modem Configuration
  180. /*
  181. FIXME: not work
  182. // bandwidth 50-100 kHz
  183. if(!cc1101->setRxBandwidth(75.0)) {
  184. printf("wrong rx bw\n");
  185. }
  186. // datarate ~30 kbps
  187. if(!cc1101->setBitRate(100.)) {
  188. printf("wrong bitrate\n");
  189. }
  190. */
  191. cc1101->SpiWriteReg(CC1101_MDMCFG2, 0x30); //Modem Configuration
  192. /*
  193. FIXME: not work
  194. // MDMCFG2.MOD_FORMAT = 3 (3: OOK, 0: 2-FSK)
  195. cc1101->SpiSetRegValue(CC1101_MDMCFG2, 3, 6, 4);
  196. // MDMCFG2.SYNC_MODE = 0
  197. cc1101->SpiSetRegValue(CC1101_MDMCFG2, 0, 2, 0);
  198. */
  199. cc1101->SpiWriteReg(CC1101_MCSM0, 0x18); //Main Radio Control State Machine Configuration
  200. cc1101->SpiWriteReg(CC1101_FSCAL3, 0xE9); //Frequency Synthesizer Calibration
  201. cc1101->SpiWriteReg(CC1101_FSCAL2, 0x2A); //Frequency Synthesizer Calibration
  202. cc1101->SpiWriteReg(CC1101_FSCAL1, 0x00); //Frequency Synthesizer Calibration
  203. cc1101->SpiWriteReg(CC1101_FSCAL0, 0x1F); //Frequency Synthesizer Calibration
  204. }
  205. // f = (f_osc/65536) * (FREQ + CHAN * (256 + CH_SP_M) * 2^(CH_SP_E - 2))
  206. // FREQ = f / (f_osc/65536)
  207. // CHAN = 0
  208. // TODO: CHAN number not implemented!
  209. // TODO: reg values not affetcts
  210. const Band bands[] = {
  211. {300., {0x00, 0x00, 0x00}, 0, 255, 74},
  212. {315., {0x00, 0x00, 0x00}, 0, 255, 74},
  213. {348., {0x00, 0x00, 0x00}, 0, 255, 74},
  214. {387., {0x00, 0x00, 0x00}, 0, 255, 74},
  215. {433.92, {0x00, 0x00, 0x00}, 0, 255, 74},
  216. {464., {0x00, 0x00, 0x00}, 0, 255, 74},
  217. {779., {0x00, 0x00, 0x00}, 0, 255, 74},
  218. {868., {0x00, 0x00, 0x00}, 0, 255, 74},
  219. {915., {0x00, 0x00, 0x00}, 0, 255, 74},
  220. {928., {0x00, 0x00, 0x00}, 0, 255, 74},
  221. };
  222. const FreqConfig FREQ_LIST[] = {
  223. {&bands[0], 0},
  224. {&bands[1], 0},
  225. {&bands[2], 0},
  226. {&bands[3], 0},
  227. {&bands[4], 0},
  228. {&bands[5], 0},
  229. {&bands[6], 0},
  230. {&bands[7], 0},
  231. {&bands[8], 0},
  232. {&bands[9], 0},
  233. };
  234. extern "C" void cc1101_isr() {
  235. gpio_write((GpioPin*)&debug_0, gpio_read(&cc1101_g0_gpio));
  236. }
  237. typedef enum {
  238. EventTypeTick,
  239. EventTypeKey,
  240. } EventType;
  241. typedef struct {
  242. union {
  243. InputEvent input;
  244. } value;
  245. EventType type;
  246. } AppEvent;
  247. typedef enum { ModeRx, ModeTx } Mode;
  248. typedef struct {
  249. int16_t dbm;
  250. uint8_t reg;
  251. } TxLevel;
  252. const TxLevel TX_LEVELS[] = {
  253. {-10, 0},
  254. {-5, 0},
  255. {0, 0},
  256. {5, 0},
  257. };
  258. typedef struct {
  259. Mode mode;
  260. size_t active_freq;
  261. int16_t last_rssi;
  262. size_t tx_level;
  263. bool need_cc1101_conf;
  264. } State;
  265. static void render_callback(Canvas* canvas, void* ctx) {
  266. State* state = (State*)acquire_mutex((ValueMutex*)ctx, 25);
  267. if(!state) return;
  268. canvas_clear(canvas);
  269. canvas_set_color(canvas, ColorBlack);
  270. canvas_set_font(canvas, FontPrimary);
  271. canvas_draw_str(canvas, 2, 12, "cc1101 workaround");
  272. {
  273. char buf[24];
  274. FreqConfig conf = FREQ_LIST[state->active_freq];
  275. float freq = conf.band->base_freq + CHAN_SPA * conf.channel;
  276. sprintf(buf, "freq: %ld.%02ld MHz", (uint32_t)freq, (uint32_t)(freq * 100.) % 100);
  277. canvas_set_font(canvas, FontSecondary);
  278. canvas_draw_str(canvas, 2, 25, buf);
  279. }
  280. {
  281. canvas_set_font(canvas, FontSecondary);
  282. if(state->need_cc1101_conf) {
  283. canvas_draw_str(canvas, 2, 36, "mode: configuring...");
  284. } else if(state->mode == ModeRx) {
  285. canvas_draw_str(canvas, 2, 36, "mode: RX");
  286. } else if(state->mode == ModeTx) {
  287. canvas_draw_str(canvas, 2, 36, "mode: TX");
  288. } else {
  289. canvas_draw_str(canvas, 2, 36, "mode: unknown");
  290. }
  291. }
  292. {
  293. if(!state->need_cc1101_conf && state->mode == ModeRx) {
  294. char buf[24];
  295. sprintf(buf, "RSSI: %d dBm", state->last_rssi);
  296. canvas_set_font(canvas, FontSecondary);
  297. canvas_draw_str(canvas, 2, 48, buf);
  298. }
  299. }
  300. {
  301. char buf[24];
  302. sprintf(buf, "tx level: %d dBm", TX_LEVELS[state->tx_level].dbm);
  303. canvas_set_font(canvas, FontSecondary);
  304. canvas_draw_str(canvas, 2, 63, buf);
  305. }
  306. release_mutex((ValueMutex*)ctx, state);
  307. }
  308. static void input_callback(InputEvent* input_event, void* ctx) {
  309. osMessageQueueId_t event_queue = (QueueHandle_t)ctx;
  310. AppEvent event;
  311. event.type = EventTypeKey;
  312. event.value.input = *input_event;
  313. osMessageQueuePut(event_queue, &event, 0, 0);
  314. }
  315. extern "C" void cc1101_workaround(void* p) {
  316. osMessageQueueId_t event_queue = osMessageQueueNew(1, sizeof(AppEvent), NULL);
  317. furi_check(event_queue);
  318. State _state;
  319. _state.mode = ModeRx;
  320. _state.active_freq = 4;
  321. _state.need_cc1101_conf = true;
  322. _state.last_rssi = 0;
  323. _state.tx_level = 0;
  324. ValueMutex state_mutex;
  325. if(!init_mutex(&state_mutex, &_state, sizeof(State))) {
  326. printf("[cc1101] cannot create mutex\n");
  327. furiac_exit(NULL);
  328. }
  329. Widget* widget = widget_alloc();
  330. widget_draw_callback_set(widget, render_callback, &state_mutex);
  331. widget_input_callback_set(widget, input_callback, event_queue);
  332. // Open GUI and register widget
  333. Gui* gui = (Gui*)furi_open("gui");
  334. if(gui == NULL) {
  335. printf("[cc1101] gui is not available\n");
  336. furiac_exit(NULL);
  337. }
  338. gui_add_widget(gui, widget, GuiLayerFullscreen);
  339. gpio_init(&debug_0, GpioModeOutputPushPull);
  340. gpio_write((GpioPin*)&debug_0, false);
  341. printf("[cc1101] creating device\n");
  342. GpioPin cs_pin = {CC1101_CS_GPIO_Port, CC1101_CS_Pin};
  343. // TODO open record
  344. GpioPin* cs_pin_record = &cs_pin;
  345. CC1101 cc1101(cs_pin_record);
  346. printf("[cc1101] init device\n");
  347. uint8_t address = cc1101.Init();
  348. if(address > 0) {
  349. printf("[cc1101] init done: %d\n", address);
  350. } else {
  351. printf("[cc1101] init fail\n");
  352. furiac_exit(NULL);
  353. }
  354. cc1101.SpiStrobe(CC1101_SIDLE);
  355. // flp_config(&cc1101);
  356. async_config(&cc1101);
  357. setup_freq(&cc1101, &FREQ_LIST[4]);
  358. enable_cc1101_irq();
  359. printf("init ok\n");
  360. // === Transparent mode ===
  361. // TODO open record
  362. GpioPin* led_record = (GpioPin*)&led_gpio[1];
  363. // configure pin
  364. gpio_init(led_record, GpioModeOutputOpenDrain);
  365. const int16_t RSSI_THRESHOLD = -89;
  366. // setup_freq(&cc1101, &FREQ_LIST[1]);
  367. cc1101.SetReceive();
  368. AppEvent event;
  369. while(1) {
  370. osStatus_t event_status = osMessageQueueGet(event_queue, &event, NULL, 20);
  371. State* state = (State*)acquire_mutex_block(&state_mutex);
  372. if(event_status == osOK) {
  373. if(event.type == EventTypeKey) {
  374. if(event.value.input.state && event.value.input.input == InputBack) {
  375. printf("[cc1101] bye!\n");
  376. // TODO remove all widgets create by app
  377. widget_enabled_set(widget, false);
  378. furiac_exit(NULL);
  379. }
  380. if(event.value.input.state && event.value.input.input == InputUp) {
  381. if(state->active_freq > 0) {
  382. state->active_freq--;
  383. state->need_cc1101_conf = true;
  384. }
  385. }
  386. if(event.value.input.state && event.value.input.input == InputDown) {
  387. if(state->active_freq < (sizeof(FREQ_LIST) / sizeof(FREQ_LIST[0]) - 1)) {
  388. state->active_freq++;
  389. state->need_cc1101_conf = true;
  390. }
  391. }
  392. if(event.value.input.state && event.value.input.input == InputLeft) {
  393. if(state->tx_level < (sizeof(TX_LEVELS) / sizeof(TX_LEVELS[0]) - 1)) {
  394. state->tx_level++;
  395. } else {
  396. state->tx_level = 0;
  397. }
  398. state->need_cc1101_conf = true;
  399. }
  400. if(event.value.input.input == InputOk) {
  401. state->mode = event.value.input.state ? ModeTx : ModeRx;
  402. state->need_cc1101_conf = true;
  403. }
  404. }
  405. } else {
  406. if(!state->need_cc1101_conf && state->mode == ModeRx) {
  407. state->last_rssi = rx_rssi(&cc1101, &FREQ_LIST[state->active_freq]);
  408. }
  409. }
  410. if(state->need_cc1101_conf) {
  411. if(state->mode == ModeRx) {
  412. setup_freq(&cc1101, &FREQ_LIST[state->active_freq]);
  413. state->last_rssi = rx_rssi(&cc1101, &FREQ_LIST[state->active_freq]);
  414. // idle(&cc1101);
  415. } else if(state->mode == ModeTx) {
  416. tx(&cc1101, &FREQ_LIST[state->active_freq]);
  417. }
  418. state->need_cc1101_conf = false;
  419. }
  420. gpio_write(
  421. led_record,
  422. (state->last_rssi > RSSI_THRESHOLD && !state->need_cc1101_conf) ? false : true);
  423. release_mutex(&state_mutex, state);
  424. widget_update(widget);
  425. }
  426. }