lsm6dso-api 223 B

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590759175927593759475957596759775987599760076017602760376047605760676077608760976107611761276137614761576167617761876197620762176227623762476257626762776287629763076317632763376347635763676377638763976407641764276437644764576467647764876497650765176527653765476557656765776587659766076617662766376647665766676677668766976707671767276737674767576767677767876797680768176827683768476857686768776887689769076917692769376947695769676977698769977007701770277037704770577067707770877097710771177127713771477157716771777187719772077217722772377247725772677277728772977307731773277337734773577367737773877397740774177427743774477457746774777487749775077517752775377547755775677577758775977607761776277637764776577667767776877697770777177727773777477757776777777787779778077817782778377847785778677877788778977907791779277937794779577967797779877997800780178027803780478057806780778087809781078117812781378147815781678177818781978207821782278237824782578267827782878297830783178327833783478357836783778387839784078417842784378447845784678477848784978507851785278537854785578567857785878597860786178627863786478657866786778687869787078717872787378747875787678777878787978807881788278837884788578867887788878897890789178927893789478957896789778987899790079017902790379047905790679077908790979107911791279137914791579167917791879197920792179227923792479257926792779287929793079317932793379347935793679377938793979407941794279437944794579467947794879497950795179527953795479557956795779587959796079617962796379647965796679677968796979707971797279737974797579767977797879797980798179827983798479857986798779887989799079917992799379947995799679977998799980008001800280038004800580068007800880098010801180128013801480158016801780188019802080218022802380248025802680278028802980308031803280338034803580368037803880398040804180428043804480458046804780488049805080518052805380548055805680578058805980608061806280638064806580668067806880698070807180728073807480758076807780788079808080818082808380848085808680878088808980908091809280938094809580968097809880998100810181028103810481058106810781088109811081118112811381148115811681178118811981208121812281238124812581268127812881298130813181328133813481358136813781388139814081418142814381448145814681478148814981508151815281538154815581568157815881598160816181628163816481658166816781688169817081718172817381748175817681778178817981808181818281838184818581868187818881898190819181928193819481958196819781988199820082018202820382048205820682078208820982108211821282138214821582168217821882198220822182228223822482258226822782288229823082318232823382348235823682378238823982408241824282438244824582468247824882498250825182528253825482558256825782588259826082618262826382648265826682678268826982708271827282738274827582768277827882798280828182828283828482858286828782888289829082918292829382948295829682978298829983008301830283038304830583068307830883098310831183128313831483158316831783188319832083218322832383248325832683278328832983308331833283338334833583368337833883398340834183428343834483458346834783488349835083518352835383548355835683578358835983608361836283638364836583668367836883698370837183728373837483758376837783788379838083818382838383848385838683878388838983908391839283938394839583968397839883998400840184028403840484058406840784088409841084118412841384148415841684178418841984208421842284238424842584268427842884298430843184328433843484358436843784388439844084418442844384448445844684478448844984508451845284538454845584568457845884598460846184628463846484658466846784688469847084718472847384748475847684778478847984808481848284838484848584868487848884898490849184928493849484958496849784988499850085018502850385048505850685078508850985108511851285138514851585168517851885198520852185228523852485258526852785288529853085318532853385348535853685378538853985408541854285438544854585468547854885498550855185528553855485558556855785588559856085618562856385648565856685678568856985708571857285738574857585768577857885798580858185828583858485858586858785888589859085918592859385948595859685978598859986008601860286038604860586068607860886098610861186128613861486158616861786188619862086218622862386248625862686278628862986308631863286338634863586368637863886398640864186428643864486458646864786488649865086518652865386548655865686578658865986608661866286638664866586668667866886698670867186728673867486758676867786788679868086818682868386848685868686878688868986908691869286938694869586968697869886998700870187028703870487058706870787088709871087118712871387148715871687178718871987208721872287238724872587268727872887298730873187328733873487358736873787388739874087418742874387448745874687478748874987508751875287538754875587568757875887598760876187628763876487658766876787688769877087718772877387748775877687778778877987808781878287838784878587868787878887898790879187928793879487958796879787988799880088018802880388048805880688078808880988108811881288138814881588168817881888198820882188228823882488258826882788288829883088318832883388348835883688378838883988408841884288438844884588468847884888498850885188528853885488558856885788588859886088618862886388648865886688678868886988708871887288738874887588768877887888798880888188828883888488858886888788888889889088918892889388948895889688978898889989008901890289038904890589068907890889098910891189128913891489158916891789188919892089218922892389248925892689278928892989308931893289338934893589368937893889398940894189428943894489458946894789488949895089518952895389548955895689578958895989608961896289638964896589668967896889698970897189728973897489758976897789788979898089818982898389848985898689878988898989908991899289938994899589968997899889999000900190029003900490059006900790089009901090119012901390149015901690179018901990209021902290239024902590269027902890299030903190329033903490359036903790389039904090419042904390449045904690479048904990509051905290539054905590569057905890599060906190629063906490659066906790689069907090719072907390749075907690779078907990809081908290839084908590869087908890899090909190929093909490959096909790989099910091019102910391049105910691079108910991109111911291139114911591169117911891199120912191229123912491259126912791289129913091319132913391349135913691379138913991409141914291439144914591469147914891499150915191529153915491559156915791589159916091619162916391649165916691679168916991709171917291739174917591769177917891799180918191829183918491859186918791889189919091919192919391949195919691979198919992009201920292039204920592069207920892099210921192129213921492159216921792189219922092219222922392249225922692279228922992309231923292339234923592369237923892399240924192429243924492459246924792489249925092519252925392549255925692579258925992609261926292639264926592669267926892699270927192729273927492759276927792789279928092819282928392849285928692879288928992909291929292939294929592969297929892999300930193029303930493059306930793089309931093119312931393149315931693179318931993209321932293239324932593269327932893299330933193329333933493359336933793389339934093419342934393449345934693479348934993509351935293539354935593569357935893599360936193629363936493659366936793689369937093719372937393749375937693779378937993809381938293839384938593869387938893899390939193929393939493959396939793989399940094019402940394049405940694079408940994109411941294139414941594169417941894199420942194229423942494259426942794289429943094319432943394349435943694379438943994409441944294439444944594469447944894499450945194529453945494559456945794589459946094619462946394649465946694679468946994709471947294739474947594769477947894799480948194829483948494859486948794889489949094919492949394949495949694979498949995009501950295039504950595069507950895099510951195129513951495159516951795189519952095219522952395249525952695279528952995309531953295339534953595369537953895399540954195429543954495459546954795489549955095519552955395549555955695579558955995609561956295639564956595669567956895699570957195729573957495759576957795789579958095819582958395849585958695879588958995909591959295939594959595969597959895999600960196029603960496059606960796089609961096119612961396149615961696179618961996209621962296239624962596269627962896299630963196329633963496359636963796389639964096419642964396449645964696479648964996509651965296539654965596569657965896599660966196629663966496659666966796689669967096719672967396749675967696779678967996809681968296839684968596869687968896899690969196929693969496959696969796989699970097019702970397049705970697079708970997109711971297139714971597169717971897199720972197229723972497259726972797289729973097319732973397349735973697379738973997409741974297439744974597469747974897499750975197529753975497559756975797589759976097619762976397649765976697679768976997709771977297739774977597769777977897799780978197829783978497859786978797889789979097919792979397949795979697979798979998009801980298039804980598069807980898099810981198129813981498159816981798189819982098219822982398249825982698279828982998309831983298339834983598369837983898399840984198429843984498459846984798489849985098519852985398549855985698579858985998609861986298639864986598669867986898699870987198729873987498759876987798789879988098819882988398849885988698879888988998909891989298939894989598969897989898999900990199029903990499059906990799089909991099119912991399149915991699179918991999209921992299239924992599269927992899299930993199329933993499359936993799389939994099419942994399449945994699479948994999509951995299539954995599569957995899599960996199629963996499659966996799689969997099719972997399749975997699779978997999809981998299839984998599869987998899899990999199929993999499959996999799989999100001000110002100031000410005100061000710008100091001010011100121001310014100151001610017100181001910020100211002210023100241002510026100271002810029100301003110032100331003410035100361003710038100391004010041100421004310044100451004610047100481004910050100511005210053100541005510056100571005810059100601006110062100631006410065100661006710068100691007010071100721007310074100751007610077100781007910080100811008210083100841008510086100871008810089100901009110092100931009410095100961009710098100991010010101101021010310104101051010610107101081010910110101111011210113101141011510116101171011810119101201012110122101231012410125101261012710128101291013010131101321013310134101351013610137101381013910140101411014210143101441014510146101471014810149101501015110152101531015410155101561015710158101591016010161101621016310164101651016610167101681016910170101711017210173101741017510176101771017810179101801018110182101831018410185101861018710188101891019010191101921019310194101951019610197101981019910200102011020210203102041020510206102071020810209102101021110212102131021410215102161021710218102191022010221102221022310224102251022610227102281022910230102311023210233102341023510236102371023810239102401024110242102431024410245102461024710248102491025010251102521025310254102551025610257102581025910260102611026210263102641026510266102671026810269102701027110272102731027410275102761027710278102791028010281102821028310284102851028610287102881028910290102911029210293102941029510296102971029810299103001030110302103031030410305103061030710308103091031010311103121031310314103151031610317103181031910320103211032210323103241032510326103271032810329103301033110332103331033410335103361033710338103391034010341103421034310344103451034610347103481034910350103511035210353103541035510356103571035810359103601036110362103631036410365103661036710368103691037010371103721037310374103751037610377103781037910380103811038210383103841038510386103871038810389103901039110392103931039410395103961039710398103991040010401104021040310404104051040610407104081040910410104111041210413104141041510416104171041810419104201042110422104231042410425104261042710428104291043010431104321043310434104351043610437104381043910440104411044210443104441044510446104471044810449104501045110452104531045410455104561045710458104591046010461104621046310464104651046610467104681046910470104711047210473104741047510476104771047810479104801048110482104831048410485104861048710488104891049010491104921049310494104951049610497104981049910500105011050210503105041050510506105071050810509105101051110512105131051410515105161051710518105191052010521105221052310524105251052610527105281052910530105311053210533105341053510536105371053810539105401054110542105431054410545105461054710548105491055010551105521055310554105551055610557105581055910560105611056210563105641056510566105671056810569105701057110572105731057410575105761057710578105791058010581105821058310584105851058610587105881058910590105911059210593105941059510596105971059810599106001060110602106031060410605106061060710608106091061010611106121061310614106151061610617106181061910620106211062210623106241062510626106271062810629106301063110632106331063410635106361063710638106391064010641106421064310644106451064610647106481064910650106511065210653106541065510656106571065810659106601066110662106631066410665106661066710668106691067010671106721067310674106751067610677106781067910680106811068210683106841068510686106871068810689106901069110692106931069410695106961069710698106991070010701107021070310704107051070610707107081070910710107111071210713107141071510716107171071810719107201072110722107231072410725107261072710728107291073010731107321073310734107351073610737107381073910740107411074210743107441074510746107471074810749107501075110752107531075410755107561075710758107591076010761107621076310764107651076610767107681076910770107711077210773107741077510776107771077810779107801078110782107831078410785107861078710788107891079010791107921079310794107951079610797107981079910800108011080210803108041080510806108071080810809108101081110812108131081410815108161081710818108191082010821108221082310824108251082610827108281082910830108311083210833108341083510836108371083810839108401084110842108431084410845108461084710848108491085010851108521085310854108551085610857108581085910860108611086210863108641086510866108671086810869108701087110872108731087410875108761087710878108791088010881108821088310884108851088610887108881088910890108911089210893108941089510896108971089810899109001090110902109031090410905109061090710908109091091010911109121091310914109151091610917109181091910920109211092210923109241092510926109271092810929109301093110932109331093410935109361093710938109391094010941109421094310944109451094610947109481094910950109511095210953109541095510956109571095810959109601096110962109631096410965109661096710968109691097010971109721097310974109751097610977109781097910980109811098210983109841098510986109871098810989109901099110992109931099410995109961099710998109991100011001110021100311004110051100611007110081100911010110111101211013110141101511016110171101811019110201102111022110231102411025110261102711028110291103011031110321103311034110351103611037110381103911040110411104211043110441104511046110471104811049110501105111052110531105411055110561105711058110591106011061110621106311064110651106611067110681106911070110711107211073110741107511076110771107811079110801108111082110831108411085110861108711088110891109011091110921109311094110951109611097110981109911100111011110211103111041110511106111071110811109111101111111112111131111411115111161111711118111191112011121111221112311124111251112611127111281112911130111311113211133111341113511136111371113811139111401114111142111431114411145111461114711148111491115011151111521115311154111551115611157111581115911160111611116211163111641116511166111671116811169111701117111172111731117411175111761117711178111791118011181111821118311184111851118611187111881118911190111911119211193111941119511196111971119811199112001120111202112031120411205112061120711208112091121011211112121121311214112151121611217112181121911220112211122211223112241122511226112271122811229112301123111232112331123411235112361123711238112391124011241112421124311244112451124611247112481124911250112511125211253112541125511256112571125811259112601126111262112631126411265112661126711268112691127011271112721127311274112751127611277112781127911280112811128211283112841128511286112871128811289112901129111292112931129411295112961129711298112991130011301113021130311304113051130611307113081130911310113111131211313113141131511316113171131811319113201132111322113231132411325113261132711328113291133011331113321133311334113351133611337113381133911340113411134211343113441134511346113471134811349113501135111352113531135411355113561135711358113591136011361113621136311364113651136611367113681136911370113711137211373113741137511376113771137811379113801138111382113831138411385113861138711388113891139011391113921139311394113951139611397113981139911400114011140211403114041140511406114071140811409114101141111412114131141411415114161141711418114191142011421114221142311424114251142611427114281142911430114311143211433114341143511436114371143811439114401144111442114431144411445114461144711448114491145011451114521145311454114551145611457114581145911460114611146211463114641146511466114671146811469114701147111472114731147411475114761147711478114791148011481114821148311484114851148611487114881148911490114911149211493114941149511496114971149811499115001150111502115031150411505115061150711508115091151011511115121151311514115151151611517115181151911520115211152211523115241152511526115271152811529115301153111532115331153411535115361153711538115391154011541115421154311544115451154611547115481154911550115511155211553115541155511556115571155811559115601156111562115631156411565115661156711568115691157011571115721157311574115751157611577115781157911580115811158211583115841158511586115871158811589115901159111592115931159411595115961159711598115991160011601116021160311604116051160611607116081160911610116111161211613116141161511616116171161811619116201162111622116231162411625116261162711628116291163011631116321163311634116351163611637116381163911640116411164211643116441164511646116471164811649116501165111652116531165411655116561165711658116591166011661116621166311664116651166611667116681166911670116711167211673116741167511676116771167811679116801168111682116831168411685116861168711688116891169011691116921169311694116951169611697116981169911700117011170211703117041170511706117071170811709117101171111712117131171411715117161171711718117191172011721117221172311724117251172611727117281172911730117311173211733117341173511736117371173811739117401174111742117431174411745117461174711748117491175011751117521175311754117551175611757117581175911760117611176211763117641176511766117671176811769117701177111772117731177411775117761177711778117791178011781117821178311784117851178611787117881178911790117911179211793117941179511796117971179811799118001180111802118031180411805118061180711808118091181011811118121181311814118151181611817118181181911820118211182211823118241182511826118271182811829118301183111832118331183411835118361183711838118391184011841118421184311844118451184611847118481184911850118511185211853118541185511856118571185811859118601186111862118631186411865118661186711868118691187011871118721187311874118751187611877118781187911880118811188211883118841188511886118871188811889118901189111892118931189411895118961189711898118991190011901119021190311904119051190611907119081190911910119111191211913119141191511916119171191811919119201192111922119231192411925119261192711928119291193011931119321193311934119351193611937119381193911940119411194211943119441194511946119471194811949119501195111952119531195411955119561195711958119591196011961119621196311964119651196611967119681196911970119711197211973119741197511976119771197811979119801198111982119831198411985119861198711988119891199011991119921199311994119951199611997119981199912000120011200212003120041200512006120071200812009120101201112012120131201412015120161201712018120191202012021120221202312024120251202612027120281202912030120311203212033120341203512036120371203812039120401204112042120431204412045120461204712048120491205012051120521205312054120551205612057120581205912060120611206212063120641206512066120671206812069120701207112072120731207412075120761207712078120791208012081120821208312084120851208612087120881208912090120911209212093120941209512096120971209812099121001210112102121031210412105121061210712108121091211012111121121211312114121151211612117121181211912120121211212212123121241212512126121271212812129121301213112132121331213412135121361213712138121391214012141121421214312144121451214612147121481214912150121511215212153121541215512156121571215812159121601216112162121631216412165121661216712168121691217012171121721217312174121751217612177121781217912180121811218212183121841218512186121871218812189121901219112192121931219412195121961219712198121991220012201122021220312204122051220612207122081220912210122111221212213122141221512216122171221812219122201222112222122231222412225122261222712228122291223012231122321223312234122351223612237122381223912240122411224212243122441224512246122471224812249122501225112252122531225412255122561225712258122591226012261122621226312264122651226612267122681226912270122711227212273122741227512276122771227812279122801228112282122831228412285122861228712288122891229012291122921229312294122951229612297122981229912300123011230212303123041230512306123071230812309123101231112312123131231412315123161231712318123191232012321123221232312324123251232612327123281232912330123311233212333123341233512336123371233812339123401234112342123431234412345123461234712348123491235012351123521235312354123551235612357123581235912360123611236212363123641236512366123671236812369123701237112372123731237412375123761237712378123791238012381123821238312384123851238612387123881238912390123911239212393123941239512396123971239812399124001240112402124031240412405124061240712408124091241012411124121241312414124151241612417124181241912420124211242212423124241242512426124271242812429124301243112432124331243412435124361243712438124391244012441124421244312444124451244612447124481244912450124511245212453124541245512456124571245812459124601246112462124631246412465124661246712468124691247012471124721247312474124751247612477124781247912480124811248212483124841248512486124871248812489124901249112492124931249412495124961249712498124991250012501125021250312504125051250612507125081250912510125111251212513125141251512516125171251812519125201252112522125231252412525125261252712528125291253012531125321253312534125351253612537125381253912540125411254212543125441254512546125471254812549125501255112552125531255412555125561255712558125591256012561125621256312564125651256612567125681256912570125711257212573125741257512576125771257812579125801258112582125831258412585125861258712588125891259012591125921259312594125951259612597125981259912600126011260212603126041260512606126071260812609126101261112612126131261412615126161261712618126191262012621126221262312624126251262612627126281262912630126311263212633126341263512636126371263812639126401264112642126431264412645126461264712648126491265012651126521265312654126551265612657126581265912660126611266212663126641266512666126671266812669126701267112672126731267412675126761267712678126791268012681126821268312684126851268612687126881268912690126911269212693126941269512696126971269812699127001270112702127031270412705127061270712708127091271012711127121271312714127151271612717127181271912720127211272212723127241272512726127271272812729127301273112732127331273412735127361273712738127391274012741127421274312744127451274612747127481274912750127511275212753127541275512756127571275812759127601276112762127631276412765127661276712768127691277012771127721277312774127751277612777127781277912780127811278212783127841278512786127871278812789127901279112792127931279412795127961279712798127991280012801128021280312804128051280612807128081280912810128111281212813128141281512816128171281812819128201282112822128231282412825128261282712828128291283012831128321283312834128351283612837128381283912840128411284212843128441284512846128471284812849128501285112852128531285412855128561285712858128591286012861128621286312864128651286612867128681286912870128711287212873128741287512876128771287812879128801288112882128831288412885128861288712888128891289012891128921289312894128951289612897128981289912900129011290212903129041290512906129071290812909129101291112912129131291412915129161291712918129191292012921129221292312924129251292612927129281292912930129311293212933129341293512936129371293812939129401294112942129431294412945129461294712948129491295012951129521295312954129551295612957129581295912960129611296212963129641296512966129671296812969129701297112972129731297412975129761297712978129791298012981129821298312984129851298612987129881298912990129911299212993129941299512996129971299812999130001300113002130031300413005130061300713008130091301013011130121301313014130151301613017130181301913020130211302213023130241302513026130271302813029130301303113032130331303413035130361303713038130391304013041130421304313044130451304613047130481304913050130511305213053130541305513056130571305813059130601306113062130631306413065130661306713068130691307013071130721307313074130751307613077130781307913080130811308213083130841308513086130871308813089130901309113092130931309413095130961309713098130991310013101131021310313104131051310613107131081310913110131111311213113131141311513116131171311813119131201312113122131231312413125131261312713128131291313013131131321313313134131351313613137131381313913140131411314213143131441314513146131471314813149131501315113152131531315413155131561315713158131591316013161131621316313164131651316613167131681316913170131711317213173131741317513176131771317813179131801318113182131831318413185131861318713188131891319013191131921319313194131951319613197131981319913200132011320213203132041320513206132071320813209132101321113212132131321413215132161321713218132191322013221132221322313224132251322613227132281322913230132311323213233132341323513236132371323813239132401324113242132431324413245132461324713248132491325013251132521325313254132551325613257132581325913260132611326213263132641326513266132671326813269132701327113272132731327413275132761327713278132791328013281132821328313284132851328613287132881328913290132911329213293132941329513296132971329813299133001330113302133031330413305133061330713308133091331013311133121331313314133151331613317133181331913320133211332213323133241332513326133271332813329133301333113332133331333413335133361333713338133391334013341133421334313344133451334613347133481334913350133511335213353133541335513356133571335813359133601336113362133631336413365133661336713368133691337013371133721337313374133751337613377133781337913380133811338213383133841338513386133871338813389133901339113392133931339413395133961339713398133991340013401134021340313404134051340613407134081340913410134111341213413134141341513416134171341813419134201342113422134231342413425134261342713428134291343013431134321343313434134351343613437134381343913440134411344213443134441344513446134471344813449134501345113452134531345413455134561345713458134591346013461134621346313464134651346613467134681346913470134711347213473134741347513476134771347813479134801348113482134831348413485134861348713488134891349013491134921349313494134951349613497134981349913500135011350213503135041350513506135071350813509135101351113512135131351413515135161351713518135191352013521135221352313524135251352613527135281352913530135311353213533135341353513536135371353813539135401354113542135431354413545135461354713548135491355013551135521355313554135551355613557135581355913560135611356213563135641356513566135671356813569135701357113572135731357413575135761357713578135791358013581135821358313584135851358613587135881358913590135911359213593135941359513596135971359813599136001360113602136031360413605136061360713608136091361013611136121361313614136151361613617136181361913620136211362213623136241362513626136271362813629136301363113632136331363413635136361363713638136391364013641136421364313644136451364613647136481364913650136511365213653136541365513656136571365813659136601366113662136631366413665136661366713668136691367013671136721367313674136751367613677136781367913680136811368213683136841368513686136871368813689136901369113692136931369413695136961369713698136991370013701137021370313704137051370613707137081370913710137111371213713137141371513716137171371813719137201372113722137231372413725137261372713728137291373013731137321373313734137351373613737137381373913740137411374213743137441374513746137471374813749137501375113752137531375413755137561375713758137591376013761137621376313764137651376613767137681376913770137711377213773137741377513776137771377813779137801378113782137831378413785137861378713788137891379013791137921379313794137951379613797137981379913800138011380213803138041380513806138071380813809138101381113812138131381413815138161381713818138191382013821138221382313824138251382613827138281382913830138311383213833138341383513836138371383813839138401384113842138431384413845138461384713848138491385013851138521385313854138551385613857138581385913860138611386213863138641386513866138671386813869138701387113872138731387413875138761387713878138791388013881138821388313884138851388613887138881388913890138911389213893138941389513896138971389813899139001390113902139031390413905139061390713908139091391013911139121391313914139151391613917139181391913920139211392213923139241392513926139271392813929139301393113932139331393413935139361393713938139391394013941139421394313944139451394613947139481394913950139511395213953139541395513956139571395813959139601396113962139631396413965139661396713968139691397013971139721397313974139751397613977139781397913980139811398213983139841398513986139871398813989139901399113992139931399413995139961399713998139991400014001140021400314004140051400614007140081400914010140111401214013140141401514016140171401814019140201402114022140231402414025140261402714028140291403014031140321403314034140351403614037140381403914040140411404214043140441404514046140471404814049140501405114052140531405414055140561405714058140591406014061140621406314064140651406614067140681406914070140711407214073140741407514076140771407814079140801408114082140831408414085140861408714088140891409014091140921409314094140951409614097140981409914100141011410214103141041410514106141071410814109141101411114112141131411414115141161411714118141191412014121141221412314124141251412614127141281412914130141311413214133141341413514136141371413814139141401414114142141431414414145141461414714148141491415014151141521415314154141551415614157141581415914160141611416214163141641416514166141671416814169141701417114172141731417414175141761417714178141791418014181141821418314184141851418614187141881418914190141911419214193141941419514196141971419814199142001420114202142031420414205142061420714208142091421014211142121421314214142151421614217142181421914220142211422214223142241422514226142271422814229142301423114232142331423414235142361423714238142391424014241142421424314244142451424614247142481424914250142511425214253142541425514256142571425814259142601426114262142631426414265142661426714268142691427014271142721427314274142751427614277142781427914280142811428214283142841428514286142871428814289142901429114292142931429414295142961429714298142991430014301143021430314304143051430614307143081430914310143111431214313143141431514316143171431814319143201432114322143231432414325143261432714328143291433014331143321433314334143351433614337143381433914340143411434214343143441434514346143471434814349143501435114352143531435414355143561435714358143591436014361143621436314364143651436614367143681436914370143711437214373143741437514376143771437814379143801438114382143831438414385143861438714388143891439014391143921439314394143951439614397143981439914400144011440214403144041440514406144071440814409144101441114412144131441414415144161441714418144191442014421144221442314424144251442614427144281442914430144311443214433144341443514436144371443814439144401444114442144431444414445144461444714448144491445014451144521445314454144551445614457144581445914460144611446214463144641446514466144671446814469144701447114472144731447414475144761447714478144791448014481144821448314484144851448614487144881448914490144911449214493144941449514496144971449814499145001450114502145031450414505145061450714508145091451014511145121451314514145151451614517145181451914520145211452214523145241452514526145271452814529145301453114532145331453414535145361453714538145391454014541145421454314544145451454614547145481454914550145511455214553145541455514556145571455814559145601456114562145631456414565145661456714568145691457014571145721457314574145751457614577145781457914580145811458214583145841458514586145871458814589145901459114592145931459414595145961459714598145991460014601146021460314604146051460614607146081460914610146111461214613146141461514616146171461814619146201462114622146231462414625146261462714628146291463014631146321463314634146351463614637146381463914640146411464214643146441464514646146471464814649146501465114652146531465414655146561465714658146591466014661146621466314664146651466614667146681466914670146711467214673146741467514676146771467814679146801468114682146831468414685146861468714688146891469014691146921469314694146951469614697146981469914700147011470214703147041470514706147071470814709147101471114712147131471414715147161471714718147191472014721147221472314724147251472614727147281472914730147311473214733147341473514736147371473814739147401474114742147431474414745147461474714748147491475014751147521475314754147551475614757147581475914760147611476214763147641476514766147671476814769147701477114772147731477414775147761477714778147791478014781147821478314784147851478614787147881478914790147911479214793147941479514796147971479814799148001480114802148031480414805148061480714808148091481014811148121481314814148151481614817148181481914820148211482214823148241482514826148271482814829148301483114832148331483414835148361483714838148391484014841148421484314844148451484614847148481484914850148511485214853148541485514856148571485814859148601486114862148631486414865148661486714868148691487014871148721487314874148751487614877148781487914880148811488214883148841488514886148871488814889148901489114892148931489414895148961489714898148991490014901149021490314904149051490614907149081490914910149111491214913149141491514916149171491814919149201492114922149231492414925149261492714928149291493014931149321493314934149351493614937149381493914940149411494214943149441494514946149471494814949149501495114952149531495414955149561495714958149591496014961149621496314964149651496614967149681496914970149711497214973149741497514976149771497814979149801498114982149831498414985149861498714988149891499014991149921499314994149951499614997149981499915000150011500215003150041500515006150071500815009150101501115012150131501415015150161501715018150191502015021150221502315024150251502615027150281502915030150311503215033150341503515036150371503815039150401504115042150431504415045150461504715048150491505015051150521505315054150551505615057150581505915060150611506215063150641506515066150671506815069150701507115072150731507415075150761507715078150791508015081150821508315084150851508615087150881508915090150911509215093150941509515096150971509815099151001510115102151031510415105151061510715108151091511015111151121511315114151151511615117151181511915120151211512215123151241512515126151271512815129151301513115132151331513415135151361513715138151391514015141151421514315144151451514615147151481514915150151511515215153151541515515156151571515815159151601516115162151631516415165151661516715168151691517015171151721517315174151751517615177151781517915180151811518215183151841518515186151871518815189151901519115192151931519415195151961519715198151991520015201152021520315204152051520615207152081520915210152111521215213152141521515216152171521815219152201522115222152231522415225152261522715228152291523015231152321523315234152351523615237152381523915240152411524215243152441524515246152471524815249152501525115252152531525415255152561525715258152591526015261152621526315264152651526615267152681526915270152711527215273152741527515276152771527815279152801528115282152831528415285152861528715288152891529015291152921529315294152951529615297152981529915300153011530215303153041530515306153071530815309153101531115312153131531415315153161531715318153191532015321153221532315324153251532615327153281532915330153311533215333153341533515336153371533815339153401534115342153431534415345153461534715348153491535015351153521535315354153551535615357153581535915360153611536215363153641536515366153671536815369153701537115372153731537415375153761537715378153791538015381153821538315384153851538615387153881538915390153911539215393153941539515396153971539815399154001540115402154031540415405154061540715408154091541015411154121541315414154151541615417154181541915420154211542215423154241542515426154271542815429154301543115432154331543415435154361543715438154391544015441154421544315444154451544615447154481544915450154511545215453154541545515456154571545815459154601546115462154631546415465154661546715468154691547015471154721547315474154751547615477154781547915480154811548215483154841548515486154871548815489154901549115492154931549415495154961549715498154991550015501155021550315504155051550615507155081550915510155111551215513155141551515516155171551815519155201552115522155231552415525155261552715528155291553015531155321553315534155351553615537155381553915540155411554215543155441554515546155471554815549155501555115552155531555415555155561555715558155591556015561155621556315564155651556615567155681556915570155711557215573155741557515576155771557815579155801558115582155831558415585155861558715588155891559015591155921559315594155951559615597155981559915600156011560215603156041560515606156071560815609156101561115612156131561415615156161561715618156191562015621156221562315624156251562615627156281562915630156311563215633156341563515636156371563815639156401564115642156431564415645156461564715648156491565015651156521565315654156551565615657156581565915660156611566215663156641566515666156671566815669156701567115672156731567415675156761567715678156791568015681156821568315684156851568615687156881568915690156911569215693156941569515696156971569815699157001570115702157031570415705157061570715708157091571015711157121571315714157151571615717157181571915720157211572215723157241572515726157271572815729157301573115732157331573415735157361573715738157391574015741157421574315744157451574615747157481574915750157511575215753157541575515756157571575815759157601576115762157631576415765157661576715768157691577015771157721577315774157751577615777157781577915780157811578215783157841578515786157871578815789157901579115792157931579415795157961579715798157991580015801158021580315804158051580615807158081580915810158111581215813158141581515816158171581815819158201582115822158231582415825158261582715828158291583015831158321583315834158351583615837158381583915840158411584215843158441584515846158471584815849158501585115852158531585415855158561585715858158591586015861158621586315864158651586615867158681586915870158711587215873158741587515876158771587815879158801588115882158831588415885158861588715888158891589015891158921589315894158951589615897158981589915900159011590215903159041590515906159071590815909159101591115912159131591415915159161591715918159191592015921159221592315924159251592615927159281592915930159311593215933159341593515936159371593815939159401594115942159431594415945159461594715948159491595015951159521595315954159551595615957159581595915960159611596215963159641596515966159671596815969159701597115972159731597415975159761597715978159791598015981159821598315984159851598615987159881598915990159911599215993159941599515996159971599815999160001600116002160031600416005160061600716008160091601016011160121601316014160151601616017160181601916020160211602216023160241602516026160271602816029160301603116032160331603416035160361603716038160391604016041160421604316044160451604616047160481604916050160511605216053160541605516056160571605816059160601606116062160631606416065160661606716068160691607016071160721607316074160751607616077160781607916080160811608216083160841608516086160871608816089160901609116092160931609416095160961609716098160991610016101161021610316104161051610616107161081610916110161111611216113161141611516116161171611816119161201612116122161231612416125161261612716128161291613016131161321613316134161351613616137161381613916140161411614216143161441614516146161471614816149161501615116152161531615416155161561615716158161591616016161161621616316164161651616616167161681616916170161711617216173161741617516176161771617816179161801618116182161831618416185161861618716188161891619016191161921619316194161951619616197161981619916200162011620216203162041620516206162071620816209162101621116212162131621416215162161621716218162191622016221162221622316224162251622616227162281622916230162311623216233162341623516236162371623816239162401624116242162431624416245162461624716248162491625016251162521625316254162551625616257162581625916260162611626216263162641626516266162671626816269162701627116272162731627416275162761627716278162791628016281162821628316284162851628616287162881628916290162911629216293162941629516296162971629816299163001630116302163031630416305163061630716308163091631016311163121631316314163151631616317163181631916320163211632216323163241632516326163271632816329163301633116332163331633416335163361633716338163391634016341163421634316344163451634616347163481634916350163511635216353163541635516356163571635816359163601636116362163631636416365163661636716368163691637016371163721637316374163751637616377163781637916380163811638216383163841638516386163871638816389163901639116392163931639416395163961639716398163991640016401164021640316404164051640616407164081640916410164111641216413164141641516416164171641816419164201642116422164231642416425164261642716428164291643016431164321643316434164351643616437164381643916440164411644216443164441644516446164471644816449164501645116452164531645416455164561645716458164591646016461164621646316464164651646616467164681646916470164711647216473164741647516476164771647816479164801648116482164831648416485164861648716488164891649016491164921649316494164951649616497164981649916500165011650216503165041650516506165071650816509165101651116512165131651416515165161651716518165191652016521165221652316524165251652616527165281652916530165311653216533165341653516536165371653816539165401654116542165431654416545165461654716548165491655016551165521655316554165551655616557165581655916560165611656216563165641656516566165671656816569165701657116572165731657416575165761657716578165791658016581165821658316584165851658616587165881658916590165911659216593165941659516596165971659816599166001660116602166031660416605166061660716608166091661016611166121661316614166151661616617166181661916620166211662216623166241662516626166271662816629166301663116632166331663416635166361663716638166391664016641166421664316644166451664616647166481664916650166511665216653166541665516656166571665816659166601666116662166631666416665166661666716668166691667016671166721667316674166751667616677166781667916680166811668216683166841668516686166871668816689166901669116692166931669416695166961669716698166991670016701167021670316704167051670616707167081670916710167111671216713167141671516716167171671816719167201672116722167231672416725167261672716728167291673016731167321673316734167351673616737167381673916740167411674216743167441674516746167471674816749167501675116752167531675416755167561675716758167591676016761167621676316764167651676616767167681676916770167711677216773167741677516776167771677816779167801678116782167831678416785167861678716788167891679016791167921679316794167951679616797167981679916800168011680216803168041680516806168071680816809168101681116812168131681416815168161681716818168191682016821168221682316824168251682616827168281682916830168311683216833168341683516836168371683816839168401684116842168431684416845168461684716848168491685016851168521685316854168551685616857168581685916860168611686216863168641686516866168671686816869168701687116872168731687416875168761687716878168791688016881168821688316884168851688616887168881688916890168911689216893168941689516896168971689816899169001690116902169031690416905169061690716908169091691016911169121691316914169151691616917169181691916920169211692216923169241692516926169271692816929169301693116932169331693416935169361693716938169391694016941169421694316944169451694616947169481694916950169511695216953169541695516956169571695816959169601696116962169631696416965169661696716968169691697016971169721697316974169751697616977169781697916980169811698216983169841698516986169871698816989169901699116992169931699416995169961699716998169991700017001170021700317004170051700617007170081700917010170111701217013170141701517016170171701817019170201702117022170231702417025170261702717028170291703017031170321703317034170351703617037170381703917040170411704217043170441704517046170471704817049170501705117052170531705417055170561705717058170591706017061170621706317064170651706617067170681706917070170711707217073170741707517076170771707817079170801708117082170831708417085170861708717088170891709017091170921709317094170951709617097170981709917100171011710217103171041710517106171071710817109171101711117112
  1. commit 24788033c89e3148989e8d99d7e417edde0ae477
  2. Author: karim <karim.rabhi-ext@st.com>
  3. Date: Mon Apr 8 11:29:52 2024 +0100
  4. Release v1.7.0
  5. diff --git a/LICENSE.md b/LICENSE.md
  6. index 9226612ae..e349e2328 100644
  7. --- a/LICENSE.md
  8. +++ b/LICENSE.md
  9. @@ -1,4 +1,4 @@
  10. -Copyright 2021 STMicroelectronics.
  11. +Copyright 2019 STMicroelectronics.
  12. All rights reserved.
  13. Redistribution and use in source and binary forms, with or without modification,
  14. diff --git a/Release_Notes.html b/Release_Notes.html
  15. index c52b7d0dd..4da65558c 100644
  16. --- a/Release_Notes.html
  17. +++ b/Release_Notes.html
  18. @@ -1,236 +1,257 @@
  19. -<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
  20. -<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
  21. -
  22. -<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
  23. -<link rel="File-List" href="Library_files/filelist.xml">
  24. -<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for LSM6DSO component</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
  25. -
  26. -
  27. -<style>
  28. -<!--
  29. -/* Style Definitions */
  30. -p.MsoNormal, li.MsoNormal, div.MsoNormal
  31. -{mso-style-parent:"";
  32. -margin:0in;
  33. -margin-bottom:.0001pt;
  34. -mso-pagination:widow-orphan;
  35. -font-size:12.0pt;
  36. -font-family:"Times New Roman";
  37. -mso-fareast-font-family:"Times New Roman";}
  38. -h2
  39. -{mso-style-next:Normal;
  40. -margin-top:12.0pt;
  41. -margin-right:0in;
  42. -margin-bottom:3.0pt;
  43. -margin-left:0in;
  44. -mso-pagination:widow-orphan;
  45. -page-break-after:avoid;
  46. -mso-outline-level:2;
  47. -font-size:14.0pt;
  48. -font-family:Arial;
  49. -font-weight:bold;
  50. -font-style:italic;}
  51. -a:link, span.MsoHyperlink
  52. -{color:blue;
  53. -text-decoration:underline;
  54. -text-underline:single;}
  55. -a:visited, span.MsoHyperlinkFollowed
  56. -{color:blue;
  57. -text-decoration:underline;
  58. -text-underline:single;}
  59. -p
  60. -{mso-margin-top-alt:auto;
  61. -margin-right:0in;
  62. -mso-margin-bottom-alt:auto;
  63. -margin-left:0in;
  64. -mso-pagination:widow-orphan;
  65. -font-size:12.0pt;
  66. -font-family:"Times New Roman";
  67. -mso-fareast-font-family:"Times New Roman";}
  68. -@page Section1
  69. -{size:8.5in 11.0in;
  70. -margin:1.0in 1.25in 1.0in 1.25in;
  71. -mso-header-margin:.5in;
  72. -mso-footer-margin:.5in;
  73. -mso-paper-source:0;}
  74. -div.Section1
  75. -{page:Section1;}
  76. --->
  77. -</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]-->
  78. -<meta content="MCD Application Team" name="author"></head><body link="blue" vlink="blue">
  79. -<div class="Section1">
  80. -<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
  81. -</o:p></span></p>
  82. -<div align="center">
  83. -<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
  84. -<tbody>
  85. -<tr>
  86. -<td style="padding: 0cm;" valign="top">
  87. -<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
  88. -<tbody>
  89. -<tr>
  90. -<td style="vertical-align: top;">
  91. -<p class="MsoNormal"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../Release_Notes.html">Back to Release page</a><o:p></o:p></span></p>
  92. -</td>
  93. -</tr>
  94. -<tr style="">
  95. -<td style="padding: 1.5pt;">
  96. -<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release Notes for LSM6DSO component</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
  97. -<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
  98. -2021 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
  99. -<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../_htmresc/st_logo.png" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
  100. -</td>
  101. -</tr>
  102. -</tbody>
  103. -</table>
  104. -<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p>&nbsp;</o:p></span></p>
  105. -<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
  106. -<tbody>
  107. -<tr style="">
  108. -<td style="padding: 0cm;" valign="top">
  109. -<span style="font-family: &quot;Times New Roman&quot;;">
  110. -</span>
  111. -<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update History</span></h2>
  112. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  113. -
  114. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.5.0
  115. -/ 03-March-2021</span></h3>
  116. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  117. -Changes<o:p></o:p></span></u></b></p>
  118. -<ul style="list-style-type: square;">
  119. -<li><span style="font-size: 10pt; font-family: Verdana;">Synchronize PID with latest version on ST GitHub</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  120. +<!DOCTYPE html>
  121. +<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
  122. +<head>
  123. + <meta charset="utf-8" />
  124. + <meta name="generator" content="pandoc" />
  125. + <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
  126. + <title>Release Notes for LSM6DSO Component</title>
  127. + <style>
  128. + code{white-space: pre-wrap;}
  129. + span.smallcaps{font-variant: small-caps;}
  130. + div.columns{display: flex; gap: min(4vw, 1.5em);}
  131. + div.column{flex: auto; overflow-x: auto;}
  132. + div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
  133. + ul.task-list{list-style: none;}
  134. + ul.task-list li input[type="checkbox"] {
  135. + width: 0.8em;
  136. + margin: 0 0.8em 0.2em -1.6em;
  137. + vertical-align: middle;
  138. + }
  139. + .display.math{display: block; text-align: center; margin: 0.5rem auto;}
  140. + </style>
  141. + <link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
  142. + <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
  143. + <!--[if lt IE 9]>
  144. + <script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
  145. + <![endif]-->
  146. +</head>
  147. +<body>
  148. +<div class="row">
  149. +<div class="col-sm-12 col-lg-4">
  150. +<center>
  151. +<h1 id="release-notes-for-lsm6dso-component-driver">Release Notes for
  152. +LSM6DSO Component Driver</h1>
  153. +<p>Copyright © 2022 STMicroelectronics<br />
  154. +</p>
  155. +<a href="https://www.st.com" class="logo"><img
  156. +src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
  157. +</center>
  158. +<h1 id="purpose">Purpose</h1>
  159. +<p>This directory contains the LSM6DSO component drivers.</p>
  160. +</div>
  161. +<section id="update-history" class="col-sm-12 col-lg-8">
  162. +<h1>Update history</h1>
  163. +<div class="collapse">
  164. +<input type="checkbox" id="collapse-section15" checked aria-hidden="true">
  165. +<label for="collapse-section15" aria-hidden="true">V1.7.0 /
  166. +31-October-2022</label>
  167. +<div>
  168. +<h2 id="main-changes">Main changes</h2>
  169. +<h3 id="maintenance-release">Maintenance release</h3>
  170. +<ul>
  171. +<li>Synchronized PID with currently latest version on ST GitHub</li>
  172. +<li>Added Delay function</li>
  173. +</ul>
  174. +<h2 id="section"></h2>
  175. +</div>
  176. +</div>
  177. +<div class="collapse">
  178. +<input type="checkbox" id="collapse-section14" aria-hidden="true">
  179. +<label for="collapse-section14" aria-hidden="true">V1.6.0 /
  180. +23-March-2022</label>
  181. +<div>
  182. +<h2 id="main-changes-1">Main changes</h2>
  183. +<h3 id="maintenance-release-1">Maintenance release</h3>
  184. +<ul>
  185. +<li>Synchronized PID with currently latest version on ST GitHub</li>
  186. +</ul>
  187. +<h2 id="section-1"></h2>
  188. +</div>
  189. +</div>
  190. +<div class="collapse">
  191. +<input type="checkbox" id="collapse-section13" aria-hidden="true">
  192. +<label for="collapse-section13" aria-hidden="true">V1.5.4 /
  193. +09-February-2022</label>
  194. +<div>
  195. +<h2 id="main-changes-2">Main changes</h2>
  196. +<h3 id="patch-release">Patch release</h3>
  197. +<ul>
  198. +<li>Update License to new format</li>
  199. +</ul>
  200. +<h2 id="section-2"></h2>
  201. +</div>
  202. +</div>
  203. +<div class="collapse">
  204. +<input type="checkbox" id="collapse-section12" aria-hidden="true">
  205. +<label for="collapse-section12" aria-hidden="true">V1.5.3 /
  206. +17-November-2021</label>
  207. +<div>
  208. +<h2 id="main-changes-3">Main changes</h2>
  209. +<h3 id="patch-release-1">Patch release</h3>
  210. +<ul>
  211. +<li>Fix C++ compiler errors</li>
  212. </ul>
  213. -
  214. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.4.0
  215. -/ 28-October-2020</span></h3>
  216. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  217. -Changes<o:p></o:p></span></u></b></p>
  218. -<ul style="list-style-type: square;">
  219. -<li><span style="font-size: 10pt; font-family: Verdana;">Update PID</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  220. +<h2 id="section-3"></h2>
  221. +</div>
  222. +</div>
  223. +<div class="collapse">
  224. +<input type="checkbox" id="collapse-section11" aria-hidden="true">
  225. +<label for="collapse-section11" aria-hidden="true">V1.5.2 /
  226. +21-April-2021</label>
  227. +<div>
  228. +<h2 id="main-changes-4">Main changes</h2>
  229. +<h3 id="patch-release-2">Patch release</h3>
  230. +<ul>
  231. +<li>Update Release Notes to new format</li>
  232. +</ul>
  233. +<h2 id="section-4"></h2>
  234. +</div>
  235. +</div>
  236. +<div class="collapse">
  237. +<input type="checkbox" id="collapse-section10" aria-hidden="true">
  238. +<label for="collapse-section10" aria-hidden="true">V1.5.1 /
  239. +15-April-2021</label>
  240. +<div>
  241. +<h2 id="main-changes-5">Main changes</h2>
  242. +<h3 id="patch-release-3">Patch release</h3>
  243. +<ul>
  244. +<li>Fix issues on INT2 events</li>
  245. +</ul>
  246. +<h2 id="section-5"></h2>
  247. +</div>
  248. +</div>
  249. +<div class="collapse">
  250. +<input type="checkbox" id="collapse-section9" aria-hidden="true">
  251. +<label for="collapse-section9" aria-hidden="true">V1.5.0 /
  252. +03-March-2021</label>
  253. +<div>
  254. +<h2 id="main-changes-6">Main changes</h2>
  255. +<h3 id="maintenance-release-2">Maintenance release</h3>
  256. +<ul>
  257. +<li>Synchronize PID with latest version on ST GitHub</li>
  258. +</ul>
  259. +<h2 id="section-6"></h2>
  260. +</div>
  261. +</div>
  262. +<div class="collapse">
  263. +<input type="checkbox" id="collapse-section8" aria-hidden="true">
  264. +<label for="collapse-section8" aria-hidden="true">V1.4.0 /
  265. +28-October-2020</label>
  266. +<div>
  267. +<h2 id="main-changes-7">Main changes</h2>
  268. +<h3 id="maintenance-release-3">Maintenance release</h3>
  269. +<ul>
  270. +<li>Update PID</li>
  271. </ul>
  272. -
  273. -
  274. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.0
  275. -/ 3-March-2020</span></h3>
  276. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  277. -Changes<o:p></o:p></span></u></b></p>
  278. -<ul style="list-style-type: square;">
  279. -<li><span style="font-size: 10pt; font-family: Verdana;">Update PID</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  280. -<li><span style="font-size: 10pt; font-family: Verdana;">Add MISRA 2012 compliancy</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  281. +<h2 id="section-7"></h2>
  282. +</div>
  283. +</div>
  284. +<div class="collapse">
  285. +<input type="checkbox" id="collapse-section7" aria-hidden="true">
  286. +<label for="collapse-section7" aria-hidden="true">V1.3.0 /
  287. +03-March-2020</label>
  288. +<div>
  289. +<h2 id="main-changes-8">Main changes</h2>
  290. +<h3 id="maintenance-release-4">Maintenance release</h3>
  291. +<ul>
  292. +<li>Update PID</li>
  293. +<li>Add MISRA 2012 compliancy</li>
  294. </ul>
  295. -
  296. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.3
  297. -/ 10-February-2020</span></h3>
  298. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  299. -Changes<o:p></o:p></span></u></b></p>
  300. -<ul style="list-style-type: square;">
  301. -<li><span style="font-size: 10pt; font-family: Verdana;">Align ODR values like PID</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  302. +<h2 id="section-8"></h2>
  303. +</div>
  304. +</div>
  305. +<div class="collapse">
  306. +<input type="checkbox" id="collapse-section6" aria-hidden="true">
  307. +<label for="collapse-section6" aria-hidden="true">V1.2.3 /
  308. +10-February-2020</label>
  309. +<div>
  310. +<h2 id="main-changes-9">Main changes</h2>
  311. +<h3 id="patch-release-4">Patch release</h3>
  312. +<ul>
  313. +<li>Align ODR values like PID</li>
  314. </ul>
  315. -
  316. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.2
  317. -/ 11-October-2019</span></h3>
  318. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  319. -Changes<o:p></o:p></span></u></b></p>
  320. -<ul style="list-style-type: square;">
  321. -<li><span style="font-size: 10pt; font-family: Verdana;">Rename context type to universal stmdev_ctx_t</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  322. -<li><span style="font-size: 10pt; font-family: Verdana;">Move unions from PID to HLD</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  323. +<h2 id="section-9"></h2>
  324. +</div>
  325. +</div>
  326. +<div class="collapse">
  327. +<input type="checkbox" id="collapse-section5" aria-hidden="true">
  328. +<label for="collapse-section5" aria-hidden="true">V1.2.2 /
  329. +11-October-2019</label>
  330. +<div>
  331. +<h2 id="main-changes-10">Main changes</h2>
  332. +<h3 id="patch-release-5">Patch release</h3>
  333. +<ul>
  334. +<li>Rename context type to universal stmdev_ctx_t</li>
  335. +<li>Move unions from PID to HLD</li>
  336. </ul>
  337. -
  338. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.1
  339. -/ 23-July-2019</span></h3>
  340. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  341. -Changes<o:p></o:p></span></u></b></p>
  342. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  343. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  344. -<span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span>
  345. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  346. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  347. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  348. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  349. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  350. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  351. -<ul style="list-style-type: square;">
  352. -<li><span style="font-size: 10pt; font-family: Verdana;">Update license</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  353. +<h2 id="section-10"></h2>
  354. +</div>
  355. +</div>
  356. +<div class="collapse">
  357. +<input type="checkbox" id="collapse-section4" aria-hidden="true">
  358. +<label for="collapse-section4" aria-hidden="true">V1.2.1 /
  359. +23-July-2019</label>
  360. +<div>
  361. +<h2 id="main-changes-11">Main changes</h2>
  362. +<h3 id="patch-release-6">Patch release</h3>
  363. +<ul>
  364. +<li>Update license</li>
  365. </ul>
  366. -
  367. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0
  368. -/ 28-May-2019</span></h3>
  369. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  370. -Changes<o:p></o:p></span></u></b></p>
  371. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  372. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  373. -<span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span>
  374. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  375. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  376. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  377. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  378. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  379. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  380. -<ul style="list-style-type: square;">
  381. -<li><span style="font-size: 10pt; font-family: Verdana;">PID update from ST GitHub</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  382. -<li><span style="font-size: 10pt; font-family: Verdana;">Add new APIs for VibrationMonitoring to HLD</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  383. -<li><span style="font-size: 10pt; font-family: Verdana;">HLD coding style update</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  384. +<h2 id="section-11"></h2>
  385. +</div>
  386. +</div>
  387. +<div class="collapse">
  388. +<input type="checkbox" id="collapse-section3" aria-hidden="true">
  389. +<label for="collapse-section3" aria-hidden="true">V1.2.0 /
  390. +28-May-2019</label>
  391. +<div>
  392. +<h2 id="main-changes-12">Main changes</h2>
  393. +<h3 id="maintenance-release-5">Maintenance release</h3>
  394. +<ul>
  395. +<li>PID update from ST GitHub</li>
  396. +<li>Add new APIs for VibrationMonitoring to HLD</li>
  397. +<li>HLD coding style update</li>
  398. </ul>
  399. -
  400. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0
  401. -/ 4-April-2019</span></h3>
  402. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  403. -Changes<o:p></o:p></span></u></b></p>
  404. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  405. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  406. -<span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span>
  407. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  408. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  409. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  410. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  411. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  412. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  413. -<ul style="list-style-type: square;">
  414. -<li><span style="font-size: 10pt; font-family: Verdana;">Add new APIs</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  415. +<h2 id="section-12"></h2>
  416. +</div>
  417. +</div>
  418. +<div class="collapse">
  419. +<input type="checkbox" id="collapse-section2" aria-hidden="true">
  420. +<label for="collapse-section2" aria-hidden="true">V1.1.0 /
  421. +04-April-2019</label>
  422. +<div>
  423. +<h2 id="main-changes-13">Main changes</h2>
  424. +<h3 id="maintenance-release-6">Maintenance release</h3>
  425. +<ul>
  426. +<li>Add new APIs</li>
  427. </ul>
  428. -
  429. -<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0
  430. -/ 31-January-2019</span></h3>
  431. -<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
  432. -Changes<o:p></o:p></span></u></b></p>
  433. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  434. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  435. -<span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span>
  436. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  437. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  438. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  439. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  440. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  441. -<span style="font-size: 10pt; font-family: Verdana;"></span>
  442. -<ul style="list-style-type: square;">
  443. -<li><span style="font-size: 10pt; font-family: Verdana;">First
  444. -official release</span><span style="color: rgb(0, 0, 0); font-family: Verdana; font-size: 13px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; display: inline ! important; float: none;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
  445. +<h2 id="section-13"></h2>
  446. +</div>
  447. +</div>
  448. +<div class="collapse">
  449. +<input type="checkbox" id="collapse-section1" aria-hidden="true">
  450. +<label for="collapse-section1" aria-hidden="true">V1.0.0 /
  451. +31-January-2019</label>
  452. +<div>
  453. +<h2 id="main-changes-14">Main changes</h2>
  454. +<h3 id="first-release">First release</h3>
  455. +<ul>
  456. +<li>First official release</li>
  457. </ul>
  458. -
  459. -<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span>
  460. -<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span><br>
  461. -</h2>
  462. -
  463. -
  464. -<div style="text-align: justify;">
  465. -<div style="text-align: justify;"><font size="-1"><span style="font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;;">
  466. -<p>Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:</p>
  467. -<p><a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a></p>
  468. -</div>
  469. -<span style="font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;;"></span></div>
  470. -
  471. -
  472. -
  473. -</td>
  474. -</tr>
  475. -</tbody>
  476. -</table>
  477. -<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
  478. -</td>
  479. -</tr>
  480. -</tbody>
  481. -</table>
  482. -</div>
  483. -<p class="MsoNormal"><o:p>&nbsp;</o:p></p>
  484. -</div>
  485. -</body></html>
  486. \ No newline at end of file
  487. +<h2 id="section-14"></h2>
  488. +</div>
  489. +</div>
  490. +</section>
  491. +</div>
  492. +<footer class="sticky">
  493. +<div class="columns">
  494. +<div class="column" style="width:95%;">
  495. +<p>For complete documentation on LSM6DSO, visit: <a
  496. +href="https://www.st.com/content/st_com/en/products/mems-and-sensors/inemo-inertial-modules/lsm6dso.html">LSM6DSO</a></p>
  497. +</div><div class="column" style="width:5%;">
  498. +<p><abbr title="Based on template cx566953 version 2.0">Info</abbr></p>
  499. +</div>
  500. +</div>
  501. +</footer>
  502. +</body>
  503. +</html>
  504. diff --git a/_htmresc/favicon.png b/_htmresc/favicon.png
  505. new file mode 100644
  506. index 000000000..06713eec4
  507. Binary files /dev/null and b/_htmresc/favicon.png differ
  508. diff --git a/_htmresc/mini-st_2020.css b/_htmresc/mini-st_2020.css
  509. new file mode 100644
  510. index 000000000..986f4d420
  511. --- /dev/null
  512. +++ b/_htmresc/mini-st_2020.css
  513. @@ -0,0 +1,1711 @@
  514. +@charset "UTF-8";
  515. +/*
  516. + Flavor name: Custom (mini-custom)
  517. + Generated online - https://minicss.org/flavors
  518. + mini.css version: v3.0.1
  519. +*/
  520. +/*
  521. + Browsers resets and base typography.
  522. +*/
  523. +/* Core module CSS variable definitions */
  524. +:root {
  525. + --fore-color: #03234b;
  526. + --secondary-fore-color: #03234b;
  527. + --back-color: #ffffff;
  528. + --secondary-back-color: #ffffff;
  529. + --blockquote-color: #e6007e;
  530. + --pre-color: #e6007e;
  531. + --border-color: #3cb4e6;
  532. + --secondary-border-color: #3cb4e6;
  533. + --heading-ratio: 1.2;
  534. + --universal-margin: 0.5rem;
  535. + --universal-padding: 0.25rem;
  536. + --universal-border-radius: 0.075rem;
  537. + --background-margin: 1.5%;
  538. + --a-link-color: #3cb4e6;
  539. + --a-visited-color: #8c0078; }
  540. +
  541. +html {
  542. + font-size: 13.5px; }
  543. +
  544. +a, b, del, em, i, ins, q, span, strong, u {
  545. + font-size: 1em; }
  546. +
  547. +html, * {
  548. + font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;
  549. + line-height: 1.25;
  550. + -webkit-text-size-adjust: 100%; }
  551. +
  552. +* {
  553. + font-size: 1rem; }
  554. +
  555. +body {
  556. + margin: 0;
  557. + color: var(--fore-color);
  558. + @background: var(--back-color);
  559. + background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;
  560. + background-size: var(--background-margin);
  561. + }
  562. +
  563. +details {
  564. + display: block; }
  565. +
  566. +summary {
  567. + display: list-item; }
  568. +
  569. +abbr[title] {
  570. + border-bottom: none;
  571. + text-decoration: underline dotted; }
  572. +
  573. +input {
  574. + overflow: visible; }
  575. +
  576. +img {
  577. + max-width: 100%;
  578. + height: auto; }
  579. +
  580. +h1, h2, h3, h4, h5, h6 {
  581. + line-height: 1.25;
  582. + margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
  583. + font-weight: 400; }
  584. + h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
  585. + color: var(--secondary-fore-color);
  586. + display: block;
  587. + margin-top: -0.25rem; }
  588. +
  589. +h1 {
  590. + font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
  591. +
  592. +h2 {
  593. + font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );
  594. + border-style: none none solid none ;
  595. + border-width: thin;
  596. + border-color: var(--border-color); }
  597. +h3 {
  598. + font-size: calc(1rem * var(--heading-ratio) ); }
  599. +
  600. +h4 {
  601. + font-size: calc(1rem * var(--heading-ratio)); }
  602. +
  603. +h5 {
  604. + font-size: 1rem; }
  605. +
  606. +h6 {
  607. + font-size: calc(1rem / var(--heading-ratio)); }
  608. +
  609. +p {
  610. + margin: var(--universal-margin); }
  611. +
  612. +ol, ul {
  613. + margin: var(--universal-margin);
  614. + padding-left: calc(3 * var(--universal-margin)); }
  615. +
  616. +b, strong {
  617. + font-weight: 700; }
  618. +
  619. +hr {
  620. + box-sizing: content-box;
  621. + border: 0;
  622. + line-height: 1.25em;
  623. + margin: var(--universal-margin);
  624. + height: 0.0714285714rem;
  625. + background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
  626. +
  627. +blockquote {
  628. + display: block;
  629. + position: relative;
  630. + font-style: italic;
  631. + color: var(--secondary-fore-color);
  632. + margin: var(--universal-margin);
  633. + padding: calc(3 * var(--universal-padding));
  634. + border: 0.0714285714rem solid var(--secondary-border-color);
  635. + border-left: 0.3rem solid var(--blockquote-color);
  636. + border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
  637. + blockquote:before {
  638. + position: absolute;
  639. + top: calc(0rem - var(--universal-padding));
  640. + left: 0;
  641. + font-family: sans-serif;
  642. + font-size: 2rem;
  643. + font-weight: 800;
  644. + content: "\201c";
  645. + color: var(--blockquote-color); }
  646. + blockquote[cite]:after {
  647. + font-style: normal;
  648. + font-size: 0.75em;
  649. + font-weight: 700;
  650. + content: "\a— " attr(cite);
  651. + white-space: pre; }
  652. +
  653. +code, kbd, pre, samp {
  654. + font-family: Menlo, Consolas, monospace;
  655. + font-size: 0.85em; }
  656. +
  657. +code {
  658. + background: var(--secondary-back-color);
  659. + border-radius: var(--universal-border-radius);
  660. + padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
  661. +
  662. +kbd {
  663. + background: var(--fore-color);
  664. + color: var(--back-color);
  665. + border-radius: var(--universal-border-radius);
  666. + padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
  667. +
  668. +pre {
  669. + overflow: auto;
  670. + background: var(--secondary-back-color);
  671. + padding: calc(1.5 * var(--universal-padding));
  672. + margin: var(--universal-margin);
  673. + border: 0.0714285714rem solid var(--secondary-border-color);
  674. + border-left: 0.2857142857rem solid var(--pre-color);
  675. + border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
  676. +
  677. +sup, sub, code, kbd {
  678. + line-height: 0;
  679. + position: relative;
  680. + vertical-align: baseline; }
  681. +
  682. +small, sup, sub, figcaption {
  683. + font-size: 0.75em; }
  684. +
  685. +sup {
  686. + top: -0.5em; }
  687. +
  688. +sub {
  689. + bottom: -0.25em; }
  690. +
  691. +figure {
  692. + margin: var(--universal-margin); }
  693. +
  694. +figcaption {
  695. + color: var(--secondary-fore-color); }
  696. +
  697. +a {
  698. + text-decoration: none; }
  699. + a:link {
  700. + color: var(--a-link-color); }
  701. + a:visited {
  702. + color: var(--a-visited-color); }
  703. + a:hover, a:focus {
  704. + text-decoration: underline; }
  705. +
  706. +/*
  707. + Definitions for the grid system, cards and containers.
  708. +*/
  709. +.container {
  710. + margin: 0 auto;
  711. + padding: 0 calc(1.5 * var(--universal-padding)); }
  712. +
  713. +.row {
  714. + box-sizing: border-box;
  715. + display: flex;
  716. + flex: 0 1 auto;
  717. + flex-flow: row wrap;
  718. + margin: 0 0 0 var(--background-margin); }
  719. +
  720. +.col-sm,
  721. +[class^='col-sm-'],
  722. +[class^='col-sm-offset-'],
  723. +.row[class*='cols-sm-'] > * {
  724. + box-sizing: border-box;
  725. + flex: 0 0 auto;
  726. + padding: 0 calc(var(--universal-padding) / 2); }
  727. +
  728. +.col-sm,
  729. +.row.cols-sm > * {
  730. + max-width: 100%;
  731. + flex-grow: 1;
  732. + flex-basis: 0; }
  733. +
  734. +.col-sm-1,
  735. +.row.cols-sm-1 > * {
  736. + max-width: 8.3333333333%;
  737. + flex-basis: 8.3333333333%; }
  738. +
  739. +.col-sm-offset-0 {
  740. + margin-left: 0; }
  741. +
  742. +.col-sm-2,
  743. +.row.cols-sm-2 > * {
  744. + max-width: 16.6666666667%;
  745. + flex-basis: 16.6666666667%; }
  746. +
  747. +.col-sm-offset-1 {
  748. + margin-left: 8.3333333333%; }
  749. +
  750. +.col-sm-3,
  751. +.row.cols-sm-3 > * {
  752. + max-width: 25%;
  753. + flex-basis: 25%; }
  754. +
  755. +.col-sm-offset-2 {
  756. + margin-left: 16.6666666667%; }
  757. +
  758. +.col-sm-4,
  759. +.row.cols-sm-4 > * {
  760. + max-width: 33.3333333333%;
  761. + flex-basis: 33.3333333333%; }
  762. +
  763. +.col-sm-offset-3 {
  764. + margin-left: 25%; }
  765. +
  766. +.col-sm-5,
  767. +.row.cols-sm-5 > * {
  768. + max-width: 41.6666666667%;
  769. + flex-basis: 41.6666666667%; }
  770. +
  771. +.col-sm-offset-4 {
  772. + margin-left: 33.3333333333%; }
  773. +
  774. +.col-sm-6,
  775. +.row.cols-sm-6 > * {
  776. + max-width: 50%;
  777. + flex-basis: 50%; }
  778. +
  779. +.col-sm-offset-5 {
  780. + margin-left: 41.6666666667%; }
  781. +
  782. +.col-sm-7,
  783. +.row.cols-sm-7 > * {
  784. + max-width: 58.3333333333%;
  785. + flex-basis: 58.3333333333%; }
  786. +
  787. +.col-sm-offset-6 {
  788. + margin-left: 50%; }
  789. +
  790. +.col-sm-8,
  791. +.row.cols-sm-8 > * {
  792. + max-width: 66.6666666667%;
  793. + flex-basis: 66.6666666667%; }
  794. +
  795. +.col-sm-offset-7 {
  796. + margin-left: 58.3333333333%; }
  797. +
  798. +.col-sm-9,
  799. +.row.cols-sm-9 > * {
  800. + max-width: 75%;
  801. + flex-basis: 75%; }
  802. +
  803. +.col-sm-offset-8 {
  804. + margin-left: 66.6666666667%; }
  805. +
  806. +.col-sm-10,
  807. +.row.cols-sm-10 > * {
  808. + max-width: 83.3333333333%;
  809. + flex-basis: 83.3333333333%; }
  810. +
  811. +.col-sm-offset-9 {
  812. + margin-left: 75%; }
  813. +
  814. +.col-sm-11,
  815. +.row.cols-sm-11 > * {
  816. + max-width: 91.6666666667%;
  817. + flex-basis: 91.6666666667%; }
  818. +
  819. +.col-sm-offset-10 {
  820. + margin-left: 83.3333333333%; }
  821. +
  822. +.col-sm-12,
  823. +.row.cols-sm-12 > * {
  824. + max-width: 100%;
  825. + flex-basis: 100%; }
  826. +
  827. +.col-sm-offset-11 {
  828. + margin-left: 91.6666666667%; }
  829. +
  830. +.col-sm-normal {
  831. + order: initial; }
  832. +
  833. +.col-sm-first {
  834. + order: -999; }
  835. +
  836. +.col-sm-last {
  837. + order: 999; }
  838. +
  839. +@media screen and (min-width: 500px) {
  840. + .col-md,
  841. + [class^='col-md-'],
  842. + [class^='col-md-offset-'],
  843. + .row[class*='cols-md-'] > * {
  844. + box-sizing: border-box;
  845. + flex: 0 0 auto;
  846. + padding: 0 calc(var(--universal-padding) / 2); }
  847. +
  848. + .col-md,
  849. + .row.cols-md > * {
  850. + max-width: 100%;
  851. + flex-grow: 1;
  852. + flex-basis: 0; }
  853. +
  854. + .col-md-1,
  855. + .row.cols-md-1 > * {
  856. + max-width: 8.3333333333%;
  857. + flex-basis: 8.3333333333%; }
  858. +
  859. + .col-md-offset-0 {
  860. + margin-left: 0; }
  861. +
  862. + .col-md-2,
  863. + .row.cols-md-2 > * {
  864. + max-width: 16.6666666667%;
  865. + flex-basis: 16.6666666667%; }
  866. +
  867. + .col-md-offset-1 {
  868. + margin-left: 8.3333333333%; }
  869. +
  870. + .col-md-3,
  871. + .row.cols-md-3 > * {
  872. + max-width: 25%;
  873. + flex-basis: 25%; }
  874. +
  875. + .col-md-offset-2 {
  876. + margin-left: 16.6666666667%; }
  877. +
  878. + .col-md-4,
  879. + .row.cols-md-4 > * {
  880. + max-width: 33.3333333333%;
  881. + flex-basis: 33.3333333333%; }
  882. +
  883. + .col-md-offset-3 {
  884. + margin-left: 25%; }
  885. +
  886. + .col-md-5,
  887. + .row.cols-md-5 > * {
  888. + max-width: 41.6666666667%;
  889. + flex-basis: 41.6666666667%; }
  890. +
  891. + .col-md-offset-4 {
  892. + margin-left: 33.3333333333%; }
  893. +
  894. + .col-md-6,
  895. + .row.cols-md-6 > * {
  896. + max-width: 50%;
  897. + flex-basis: 50%; }
  898. +
  899. + .col-md-offset-5 {
  900. + margin-left: 41.6666666667%; }
  901. +
  902. + .col-md-7,
  903. + .row.cols-md-7 > * {
  904. + max-width: 58.3333333333%;
  905. + flex-basis: 58.3333333333%; }
  906. +
  907. + .col-md-offset-6 {
  908. + margin-left: 50%; }
  909. +
  910. + .col-md-8,
  911. + .row.cols-md-8 > * {
  912. + max-width: 66.6666666667%;
  913. + flex-basis: 66.6666666667%; }
  914. +
  915. + .col-md-offset-7 {
  916. + margin-left: 58.3333333333%; }
  917. +
  918. + .col-md-9,
  919. + .row.cols-md-9 > * {
  920. + max-width: 75%;
  921. + flex-basis: 75%; }
  922. +
  923. + .col-md-offset-8 {
  924. + margin-left: 66.6666666667%; }
  925. +
  926. + .col-md-10,
  927. + .row.cols-md-10 > * {
  928. + max-width: 83.3333333333%;
  929. + flex-basis: 83.3333333333%; }
  930. +
  931. + .col-md-offset-9 {
  932. + margin-left: 75%; }
  933. +
  934. + .col-md-11,
  935. + .row.cols-md-11 > * {
  936. + max-width: 91.6666666667%;
  937. + flex-basis: 91.6666666667%; }
  938. +
  939. + .col-md-offset-10 {
  940. + margin-left: 83.3333333333%; }
  941. +
  942. + .col-md-12,
  943. + .row.cols-md-12 > * {
  944. + max-width: 100%;
  945. + flex-basis: 100%; }
  946. +
  947. + .col-md-offset-11 {
  948. + margin-left: 91.6666666667%; }
  949. +
  950. + .col-md-normal {
  951. + order: initial; }
  952. +
  953. + .col-md-first {
  954. + order: -999; }
  955. +
  956. + .col-md-last {
  957. + order: 999; } }
  958. +@media screen and (min-width: 1280px) {
  959. + .col-lg,
  960. + [class^='col-lg-'],
  961. + [class^='col-lg-offset-'],
  962. + .row[class*='cols-lg-'] > * {
  963. + box-sizing: border-box;
  964. + flex: 0 0 auto;
  965. + padding: 0 calc(var(--universal-padding) / 2); }
  966. +
  967. + .col-lg,
  968. + .row.cols-lg > * {
  969. + max-width: 100%;
  970. + flex-grow: 1;
  971. + flex-basis: 0; }
  972. +
  973. + .col-lg-1,
  974. + .row.cols-lg-1 > * {
  975. + max-width: 8.3333333333%;
  976. + flex-basis: 8.3333333333%; }
  977. +
  978. + .col-lg-offset-0 {
  979. + margin-left: 0; }
  980. +
  981. + .col-lg-2,
  982. + .row.cols-lg-2 > * {
  983. + max-width: 16.6666666667%;
  984. + flex-basis: 16.6666666667%; }
  985. +
  986. + .col-lg-offset-1 {
  987. + margin-left: 8.3333333333%; }
  988. +
  989. + .col-lg-3,
  990. + .row.cols-lg-3 > * {
  991. + max-width: 25%;
  992. + flex-basis: 25%; }
  993. +
  994. + .col-lg-offset-2 {
  995. + margin-left: 16.6666666667%; }
  996. +
  997. + .col-lg-4,
  998. + .row.cols-lg-4 > * {
  999. + max-width: 33.3333333333%;
  1000. + flex-basis: 33.3333333333%; }
  1001. +
  1002. + .col-lg-offset-3 {
  1003. + margin-left: 25%; }
  1004. +
  1005. + .col-lg-5,
  1006. + .row.cols-lg-5 > * {
  1007. + max-width: 41.6666666667%;
  1008. + flex-basis: 41.6666666667%; }
  1009. +
  1010. + .col-lg-offset-4 {
  1011. + margin-left: 33.3333333333%; }
  1012. +
  1013. + .col-lg-6,
  1014. + .row.cols-lg-6 > * {
  1015. + max-width: 50%;
  1016. + flex-basis: 50%; }
  1017. +
  1018. + .col-lg-offset-5 {
  1019. + margin-left: 41.6666666667%; }
  1020. +
  1021. + .col-lg-7,
  1022. + .row.cols-lg-7 > * {
  1023. + max-width: 58.3333333333%;
  1024. + flex-basis: 58.3333333333%; }
  1025. +
  1026. + .col-lg-offset-6 {
  1027. + margin-left: 50%; }
  1028. +
  1029. + .col-lg-8,
  1030. + .row.cols-lg-8 > * {
  1031. + max-width: 66.6666666667%;
  1032. + flex-basis: 66.6666666667%; }
  1033. +
  1034. + .col-lg-offset-7 {
  1035. + margin-left: 58.3333333333%; }
  1036. +
  1037. + .col-lg-9,
  1038. + .row.cols-lg-9 > * {
  1039. + max-width: 75%;
  1040. + flex-basis: 75%; }
  1041. +
  1042. + .col-lg-offset-8 {
  1043. + margin-left: 66.6666666667%; }
  1044. +
  1045. + .col-lg-10,
  1046. + .row.cols-lg-10 > * {
  1047. + max-width: 83.3333333333%;
  1048. + flex-basis: 83.3333333333%; }
  1049. +
  1050. + .col-lg-offset-9 {
  1051. + margin-left: 75%; }
  1052. +
  1053. + .col-lg-11,
  1054. + .row.cols-lg-11 > * {
  1055. + max-width: 91.6666666667%;
  1056. + flex-basis: 91.6666666667%; }
  1057. +
  1058. + .col-lg-offset-10 {
  1059. + margin-left: 83.3333333333%; }
  1060. +
  1061. + .col-lg-12,
  1062. + .row.cols-lg-12 > * {
  1063. + max-width: 100%;
  1064. + flex-basis: 100%; }
  1065. +
  1066. + .col-lg-offset-11 {
  1067. + margin-left: 91.6666666667%; }
  1068. +
  1069. + .col-lg-normal {
  1070. + order: initial; }
  1071. +
  1072. + .col-lg-first {
  1073. + order: -999; }
  1074. +
  1075. + .col-lg-last {
  1076. + order: 999; } }
  1077. +/* Card component CSS variable definitions */
  1078. +:root {
  1079. + --card-back-color: #3cb4e6;
  1080. + --card-fore-color: #03234b;
  1081. + --card-border-color: #03234b; }
  1082. +
  1083. +.card {
  1084. + display: flex;
  1085. + flex-direction: column;
  1086. + justify-content: space-between;
  1087. + align-self: center;
  1088. + position: relative;
  1089. + width: 100%;
  1090. + background: var(--card-back-color);
  1091. + color: var(--card-fore-color);
  1092. + border: 0.0714285714rem solid var(--card-border-color);
  1093. + border-radius: var(--universal-border-radius);
  1094. + margin: var(--universal-margin);
  1095. + overflow: hidden; }
  1096. + @media screen and (min-width: 320px) {
  1097. + .card {
  1098. + max-width: 320px; } }
  1099. + .card > .sectione {
  1100. + background: var(--card-back-color);
  1101. + color: var(--card-fore-color);
  1102. + box-sizing: border-box;
  1103. + margin: 0;
  1104. + border: 0;
  1105. + border-radius: 0;
  1106. + border-bottom: 0.0714285714rem solid var(--card-border-color);
  1107. + padding: var(--universal-padding);
  1108. + width: 100%; }
  1109. + .card > .sectione.media {
  1110. + height: 200px;
  1111. + padding: 0;
  1112. + -o-object-fit: cover;
  1113. + object-fit: cover; }
  1114. + .card > .sectione:last-child {
  1115. + border-bottom: 0; }
  1116. +
  1117. +/*
  1118. + Custom elements for card elements.
  1119. +*/
  1120. +@media screen and (min-width: 240px) {
  1121. + .card.small {
  1122. + max-width: 240px; } }
  1123. +@media screen and (min-width: 480px) {
  1124. + .card.large {
  1125. + max-width: 480px; } }
  1126. +.card.fluid {
  1127. + max-width: 100%;
  1128. + width: auto; }
  1129. +
  1130. +.card.warning {
  1131. + --card-back-color: #e5b8b7;
  1132. + --card-fore-color: #3b234b;
  1133. + --card-border-color: #8c0078; }
  1134. +
  1135. +.card.error {
  1136. + --card-back-color: #464650;
  1137. + --card-fore-color: #ffffff;
  1138. + --card-border-color: #8c0078; }
  1139. +
  1140. +.card > .sectione.dark {
  1141. + --card-back-color: #3b234b;
  1142. + --card-fore-color: #ffffff; }
  1143. +
  1144. +.card > .sectione.double-padded {
  1145. + padding: calc(1.5 * var(--universal-padding)); }
  1146. +
  1147. +/*
  1148. + Definitions for forms and input elements.
  1149. +*/
  1150. +/* Input_control module CSS variable definitions */
  1151. +:root {
  1152. + --form-back-color: #ffe97f;
  1153. + --form-fore-color: #03234b;
  1154. + --form-border-color: #3cb4e6;
  1155. + --input-back-color: #ffffff;
  1156. + --input-fore-color: #03234b;
  1157. + --input-border-color: #3cb4e6;
  1158. + --input-focus-color: #0288d1;
  1159. + --input-invalid-color: #d32f2f;
  1160. + --button-back-color: #e2e2e2;
  1161. + --button-hover-back-color: #dcdcdc;
  1162. + --button-fore-color: #212121;
  1163. + --button-border-color: transparent;
  1164. + --button-hover-border-color: transparent;
  1165. + --button-group-border-color: rgba(124, 124, 124, 0.54); }
  1166. +
  1167. +form {
  1168. + background: var(--form-back-color);
  1169. + color: var(--form-fore-color);
  1170. + border: 0.0714285714rem solid var(--form-border-color);
  1171. + border-radius: var(--universal-border-radius);
  1172. + margin: var(--universal-margin);
  1173. + padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
  1174. +
  1175. +fieldset {
  1176. + border: 0.0714285714rem solid var(--form-border-color);
  1177. + border-radius: var(--universal-border-radius);
  1178. + margin: calc(var(--universal-margin) / 4);
  1179. + padding: var(--universal-padding); }
  1180. +
  1181. +legend {
  1182. + box-sizing: border-box;
  1183. + display: table;
  1184. + max-width: 100%;
  1185. + white-space: normal;
  1186. + font-weight: 500;
  1187. + padding: calc(var(--universal-padding) / 2); }
  1188. +
  1189. +label {
  1190. + padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
  1191. +
  1192. +.input-group {
  1193. + display: inline-block; }
  1194. + .input-group.fluid {
  1195. + display: flex;
  1196. + align-items: center;
  1197. + justify-content: center; }
  1198. + .input-group.fluid > input {
  1199. + max-width: 100%;
  1200. + flex-grow: 1;
  1201. + flex-basis: 0px; }
  1202. + @media screen and (max-width: 499px) {
  1203. + .input-group.fluid {
  1204. + align-items: stretch;
  1205. + flex-direction: column; } }
  1206. + .input-group.vertical {
  1207. + display: flex;
  1208. + align-items: stretch;
  1209. + flex-direction: column; }
  1210. + .input-group.vertical > input {
  1211. + max-width: 100%;
  1212. + flex-grow: 1;
  1213. + flex-basis: 0px; }
  1214. +
  1215. +[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {
  1216. + height: auto; }
  1217. +
  1218. +[type="search"] {
  1219. + -webkit-appearance: textfield;
  1220. + outline-offset: -2px; }
  1221. +
  1222. +[type="search"]::-webkit-search-cancel-button,
  1223. +[type="search"]::-webkit-search-decoration {
  1224. + -webkit-appearance: none; }
  1225. +
  1226. +input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],
  1227. +[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {
  1228. + box-sizing: border-box;
  1229. + background: var(--input-back-color);
  1230. + color: var(--input-fore-color);
  1231. + border: 0.0714285714rem solid var(--input-border-color);
  1232. + border-radius: var(--universal-border-radius);
  1233. + margin: calc(var(--universal-margin) / 2);
  1234. + padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
  1235. +
  1236. +input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {
  1237. + border-color: var(--input-focus-color);
  1238. + box-shadow: none; }
  1239. +input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {
  1240. + border-color: var(--input-invalid-color);
  1241. + box-shadow: none; }
  1242. +input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {
  1243. + background: var(--secondary-back-color); }
  1244. +
  1245. +select {
  1246. + max-width: 100%; }
  1247. +
  1248. +option {
  1249. + overflow: hidden;
  1250. + text-overflow: ellipsis; }
  1251. +
  1252. +[type="checkbox"], [type="radio"] {
  1253. + -webkit-appearance: none;
  1254. + -moz-appearance: none;
  1255. + appearance: none;
  1256. + position: relative;
  1257. + height: calc(1rem + var(--universal-padding) / 2);
  1258. + width: calc(1rem + var(--universal-padding) / 2);
  1259. + vertical-align: text-bottom;
  1260. + padding: 0;
  1261. + flex-basis: calc(1rem + var(--universal-padding) / 2) !important;
  1262. + flex-grow: 0 !important; }
  1263. + [type="checkbox"]:checked:before, [type="radio"]:checked:before {
  1264. + position: absolute; }
  1265. +
  1266. +[type="checkbox"]:checked:before {
  1267. + content: '\2713';
  1268. + font-family: sans-serif;
  1269. + font-size: calc(1rem + var(--universal-padding) / 2);
  1270. + top: calc(0rem - var(--universal-padding));
  1271. + left: calc(var(--universal-padding) / 4); }
  1272. +
  1273. +[type="radio"] {
  1274. + border-radius: 100%; }
  1275. + [type="radio"]:checked:before {
  1276. + border-radius: 100%;
  1277. + content: '';
  1278. + top: calc(0.0714285714rem + var(--universal-padding) / 2);
  1279. + left: calc(0.0714285714rem + var(--universal-padding) / 2);
  1280. + background: var(--input-fore-color);
  1281. + width: 0.5rem;
  1282. + height: 0.5rem; }
  1283. +
  1284. +:placeholder-shown {
  1285. + color: var(--input-fore-color); }
  1286. +
  1287. +::-ms-placeholder {
  1288. + color: var(--input-fore-color);
  1289. + opacity: 0.54; }
  1290. +
  1291. +button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {
  1292. + border-style: none;
  1293. + padding: 0; }
  1294. +
  1295. +button, html [type="button"], [type="reset"], [type="submit"] {
  1296. + -webkit-appearance: button; }
  1297. +
  1298. +button {
  1299. + overflow: visible;
  1300. + text-transform: none; }
  1301. +
  1302. +button, [type="button"], [type="submit"], [type="reset"],
  1303. +a.button, label.button, .button,
  1304. +a[role="button"], label[role="button"], [role="button"] {
  1305. + display: inline-block;
  1306. + background: var(--button-back-color);
  1307. + color: var(--button-fore-color);
  1308. + border: 0.0714285714rem solid var(--button-border-color);
  1309. + border-radius: var(--universal-border-radius);
  1310. + padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
  1311. + margin: var(--universal-margin);
  1312. + text-decoration: none;
  1313. + cursor: pointer;
  1314. + transition: background 0.3s; }
  1315. + button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,
  1316. + a.button:hover,
  1317. + a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,
  1318. + a[role="button"]:hover,
  1319. + a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {
  1320. + background: var(--button-hover-back-color);
  1321. + border-color: var(--button-hover-border-color); }
  1322. +
  1323. +input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {
  1324. + cursor: not-allowed;
  1325. + opacity: 0.75; }
  1326. +
  1327. +.button-group {
  1328. + display: flex;
  1329. + border: 0.0714285714rem solid var(--button-group-border-color);
  1330. + border-radius: var(--universal-border-radius);
  1331. + margin: var(--universal-margin); }
  1332. + .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
  1333. + margin: 0;
  1334. + max-width: 100%;
  1335. + flex: 1 1 auto;
  1336. + text-align: center;
  1337. + border: 0;
  1338. + border-radius: 0;
  1339. + box-shadow: none; }
  1340. + .button-group > :not(:first-child) {
  1341. + border-left: 0.0714285714rem solid var(--button-group-border-color); }
  1342. + @media screen and (max-width: 499px) {
  1343. + .button-group {
  1344. + flex-direction: column; }
  1345. + .button-group > :not(:first-child) {
  1346. + border: 0;
  1347. + border-top: 0.0714285714rem solid var(--button-group-border-color); } }
  1348. +
  1349. +/*
  1350. + Custom elements for forms and input elements.
  1351. +*/
  1352. +button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {
  1353. + --button-back-color: #1976d2;
  1354. + --button-fore-color: #f8f8f8; }
  1355. + button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {
  1356. + --button-hover-back-color: #1565c0; }
  1357. +
  1358. +button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {
  1359. + --button-back-color: #d32f2f;
  1360. + --button-fore-color: #f8f8f8; }
  1361. + button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {
  1362. + --button-hover-back-color: #c62828; }
  1363. +
  1364. +button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {
  1365. + --button-back-color: #308732;
  1366. + --button-fore-color: #f8f8f8; }
  1367. + button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {
  1368. + --button-hover-back-color: #277529; }
  1369. +
  1370. +button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {
  1371. + --button-back-color: #212121;
  1372. + --button-fore-color: #f8f8f8; }
  1373. + button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {
  1374. + --button-hover-back-color: #111; }
  1375. +
  1376. +button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {
  1377. + padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));
  1378. + margin: var(--universal-margin); }
  1379. +
  1380. +button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {
  1381. + padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));
  1382. + margin: var(--universal-margin); }
  1383. +
  1384. +/*
  1385. + Definitions for navigation elements.
  1386. +*/
  1387. +/* Navigation module CSS variable definitions */
  1388. +:root {
  1389. + --header-back-color: #03234b;
  1390. + --header-hover-back-color: #ffd200;
  1391. + --header-fore-color: #ffffff;
  1392. + --header-border-color: #3cb4e6;
  1393. + --nav-back-color: #ffffff;
  1394. + --nav-hover-back-color: #ffe97f;
  1395. + --nav-fore-color: #e6007e;
  1396. + --nav-border-color: #3cb4e6;
  1397. + --nav-link-color: #3cb4e6;
  1398. + --footer-fore-color: #ffffff;
  1399. + --footer-back-color: #03234b;
  1400. + --footer-border-color: #3cb4e6;
  1401. + --footer-link-color: #3cb4e6;
  1402. + --drawer-back-color: #ffffff;
  1403. + --drawer-hover-back-color: #ffe97f;
  1404. + --drawer-border-color: #3cb4e6;
  1405. + --drawer-close-color: #e6007e; }
  1406. +
  1407. +header {
  1408. + height: 2.75rem;
  1409. + background: var(--header-back-color);
  1410. + color: var(--header-fore-color);
  1411. + border-bottom: 0.0714285714rem solid var(--header-border-color);
  1412. + padding: calc(var(--universal-padding) / 4) 0;
  1413. + white-space: nowrap;
  1414. + overflow-x: auto;
  1415. + overflow-y: hidden; }
  1416. + header.row {
  1417. + box-sizing: content-box; }
  1418. + header .logo {
  1419. + color: var(--header-fore-color);
  1420. + font-size: 1.75rem;
  1421. + padding: var(--universal-padding) calc(2 * var(--universal-padding));
  1422. + text-decoration: none; }
  1423. + header button, header [type="button"], header .button, header [role="button"] {
  1424. + box-sizing: border-box;
  1425. + position: relative;
  1426. + top: calc(0rem - var(--universal-padding) / 4);
  1427. + height: calc(3.1875rem + var(--universal-padding) / 2);
  1428. + background: var(--header-back-color);
  1429. + line-height: calc(3.1875rem - var(--universal-padding) * 1.5);
  1430. + text-align: center;
  1431. + color: var(--header-fore-color);
  1432. + border: 0;
  1433. + border-radius: 0;
  1434. + margin: 0;
  1435. + text-transform: uppercase; }
  1436. + header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {
  1437. + background: var(--header-hover-back-color); }
  1438. +
  1439. +nav {
  1440. + background: var(--nav-back-color);
  1441. + color: var(--nav-fore-color);
  1442. + border: 0.0714285714rem solid var(--nav-border-color);
  1443. + border-radius: var(--universal-border-radius);
  1444. + margin: var(--universal-margin); }
  1445. + nav * {
  1446. + padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
  1447. + nav a, nav a:visited {
  1448. + display: block;
  1449. + color: var(--nav-link-color);
  1450. + border-radius: var(--universal-border-radius);
  1451. + transition: background 0.3s; }
  1452. + nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {
  1453. + text-decoration: none;
  1454. + background: var(--nav-hover-back-color); }
  1455. + nav .sublink-1 {
  1456. + position: relative;
  1457. + margin-left: calc(2 * var(--universal-padding)); }
  1458. + nav .sublink-1:before {
  1459. + position: absolute;
  1460. + left: calc(var(--universal-padding) - 1 * var(--universal-padding));
  1461. + top: -0.0714285714rem;
  1462. + content: '';
  1463. + height: 100%;
  1464. + border: 0.0714285714rem solid var(--nav-border-color);
  1465. + border-left: 0; }
  1466. + nav .sublink-2 {
  1467. + position: relative;
  1468. + margin-left: calc(4 * var(--universal-padding)); }
  1469. + nav .sublink-2:before {
  1470. + position: absolute;
  1471. + left: calc(var(--universal-padding) - 3 * var(--universal-padding));
  1472. + top: -0.0714285714rem;
  1473. + content: '';
  1474. + height: 100%;
  1475. + border: 0.0714285714rem solid var(--nav-border-color);
  1476. + border-left: 0; }
  1477. +
  1478. +footer {
  1479. + background: var(--footer-back-color);
  1480. + color: var(--footer-fore-color);
  1481. + border-top: 0.0714285714rem solid var(--footer-border-color);
  1482. + padding: calc(2 * var(--universal-padding)) var(--universal-padding);
  1483. + font-size: 0.875rem; }
  1484. + footer a, footer a:visited {
  1485. + color: var(--footer-link-color); }
  1486. +
  1487. +header.sticky {
  1488. + position: -webkit-sticky;
  1489. + position: sticky;
  1490. + z-index: 1101;
  1491. + top: 0; }
  1492. +
  1493. +footer.sticky {
  1494. + position: -webkit-sticky;
  1495. + position: sticky;
  1496. + z-index: 1101;
  1497. + bottom: 0; }
  1498. +
  1499. +.drawer-toggle:before {
  1500. + display: inline-block;
  1501. + position: relative;
  1502. + vertical-align: bottom;
  1503. + content: '\00a0\2261\00a0';
  1504. + font-family: sans-serif;
  1505. + font-size: 1.5em; }
  1506. +@media screen and (min-width: 500px) {
  1507. + .drawer-toggle:not(.persistent) {
  1508. + display: none; } }
  1509. +
  1510. +[type="checkbox"].drawer {
  1511. + height: 1px;
  1512. + width: 1px;
  1513. + margin: -1px;
  1514. + overflow: hidden;
  1515. + position: absolute;
  1516. + clip: rect(0 0 0 0);
  1517. + -webkit-clip-path: inset(100%);
  1518. + clip-path: inset(100%); }
  1519. + [type="checkbox"].drawer + * {
  1520. + display: block;
  1521. + box-sizing: border-box;
  1522. + position: fixed;
  1523. + top: 0;
  1524. + width: 320px;
  1525. + height: 100vh;
  1526. + overflow-y: auto;
  1527. + background: var(--drawer-back-color);
  1528. + border: 0.0714285714rem solid var(--drawer-border-color);
  1529. + border-radius: 0;
  1530. + margin: 0;
  1531. + z-index: 1110;
  1532. + right: -320px;
  1533. + transition: right 0.3s; }
  1534. + [type="checkbox"].drawer + * .drawer-close {
  1535. + position: absolute;
  1536. + top: var(--universal-margin);
  1537. + right: var(--universal-margin);
  1538. + z-index: 1111;
  1539. + width: 2rem;
  1540. + height: 2rem;
  1541. + border-radius: var(--universal-border-radius);
  1542. + padding: var(--universal-padding);
  1543. + margin: 0;
  1544. + cursor: pointer;
  1545. + transition: background 0.3s; }
  1546. + [type="checkbox"].drawer + * .drawer-close:before {
  1547. + display: block;
  1548. + content: '\00D7';
  1549. + color: var(--drawer-close-color);
  1550. + position: relative;
  1551. + font-family: sans-serif;
  1552. + font-size: 2rem;
  1553. + line-height: 1;
  1554. + text-align: center; }
  1555. + [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {
  1556. + background: var(--drawer-hover-back-color); }
  1557. + @media screen and (max-width: 320px) {
  1558. + [type="checkbox"].drawer + * {
  1559. + width: 100%; } }
  1560. + [type="checkbox"].drawer:checked + * {
  1561. + right: 0; }
  1562. + @media screen and (min-width: 500px) {
  1563. + [type="checkbox"].drawer:not(.persistent) + * {
  1564. + position: static;
  1565. + height: 100%;
  1566. + z-index: 1100; }
  1567. + [type="checkbox"].drawer:not(.persistent) + * .drawer-close {
  1568. + display: none; } }
  1569. +
  1570. +/*
  1571. + Definitions for the responsive table component.
  1572. +*/
  1573. +/* Table module CSS variable definitions. */
  1574. +:root {
  1575. + --table-border-color: #03234b;
  1576. + --table-border-separator-color: #03234b;
  1577. + --table-head-back-color: #03234b;
  1578. + --table-head-fore-color: #ffffff;
  1579. + --table-body-back-color: #ffffff;
  1580. + --table-body-fore-color: #03234b;
  1581. + --table-body-alt-back-color: #f4f4f4; }
  1582. +
  1583. +table {
  1584. + border-collapse: separate;
  1585. + border-spacing: 0;
  1586. + margin: 0;
  1587. + display: flex;
  1588. + flex: 0 1 auto;
  1589. + flex-flow: row wrap;
  1590. + padding: var(--universal-padding);
  1591. + padding-top: 0; }
  1592. + table caption {
  1593. + font-size: 1rem;
  1594. + margin: calc(2 * var(--universal-margin)) 0;
  1595. + max-width: 100%;
  1596. + flex: 0 0 100%; }
  1597. + table thead, table tbody {
  1598. + display: flex;
  1599. + flex-flow: row wrap;
  1600. + border: 0.0714285714rem solid var(--table-border-color); }
  1601. + table thead {
  1602. + z-index: 999;
  1603. + border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
  1604. + border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
  1605. + table tbody {
  1606. + border-top: 0;
  1607. + margin-top: calc(0 - var(--universal-margin));
  1608. + border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
  1609. + table tr {
  1610. + display: flex;
  1611. + padding: 0; }
  1612. + table th, table td {
  1613. + padding: calc(0.5 * var(--universal-padding));
  1614. + font-size: 0.9rem; }
  1615. + table th {
  1616. + text-align: left;
  1617. + background: var(--table-head-back-color);
  1618. + color: var(--table-head-fore-color); }
  1619. + table td {
  1620. + background: var(--table-body-back-color);
  1621. + color: var(--table-body-fore-color);
  1622. + border-top: 0.0714285714rem solid var(--table-border-color); }
  1623. +
  1624. +table:not(.horizontal) {
  1625. + overflow: auto;
  1626. + max-height: 100%; }
  1627. + table:not(.horizontal) thead, table:not(.horizontal) tbody {
  1628. + max-width: 100%;
  1629. + flex: 0 0 100%; }
  1630. + table:not(.horizontal) tr {
  1631. + flex-flow: row wrap;
  1632. + flex: 0 0 100%; }
  1633. + table:not(.horizontal) th, table:not(.horizontal) td {
  1634. + flex: 1 0 0%;
  1635. + overflow: hidden;
  1636. + text-overflow: ellipsis; }
  1637. + table:not(.horizontal) thead {
  1638. + position: sticky;
  1639. + top: 0; }
  1640. + table:not(.horizontal) tbody tr:first-child td {
  1641. + border-top: 0; }
  1642. +
  1643. +table.horizontal {
  1644. + border: 0; }
  1645. + table.horizontal thead, table.horizontal tbody {
  1646. + border: 0;
  1647. + flex: .2 0 0;
  1648. + flex-flow: row nowrap; }
  1649. + table.horizontal tbody {
  1650. + overflow: auto;
  1651. + justify-content: space-between;
  1652. + flex: .8 0 0;
  1653. + margin-left: 0;
  1654. + padding-bottom: calc(var(--universal-padding) / 4); }
  1655. + table.horizontal tr {
  1656. + flex-direction: column;
  1657. + flex: 1 0 auto; }
  1658. + table.horizontal th, table.horizontal td {
  1659. + width: auto;
  1660. + border: 0;
  1661. + border-bottom: 0.0714285714rem solid var(--table-border-color); }
  1662. + table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
  1663. + border-top: 0; }
  1664. + table.horizontal th {
  1665. + text-align: right;
  1666. + border-left: 0.0714285714rem solid var(--table-border-color);
  1667. + border-right: 0.0714285714rem solid var(--table-border-separator-color); }
  1668. + table.horizontal thead tr:first-child {
  1669. + padding-left: 0; }
  1670. + table.horizontal th:first-child, table.horizontal td:first-child {
  1671. + border-top: 0.0714285714rem solid var(--table-border-color); }
  1672. + table.horizontal tbody tr:last-child td {
  1673. + border-right: 0.0714285714rem solid var(--table-border-color); }
  1674. + table.horizontal tbody tr:last-child td:first-child {
  1675. + border-top-right-radius: 0.25rem; }
  1676. + table.horizontal tbody tr:last-child td:last-child {
  1677. + border-bottom-right-radius: 0.25rem; }
  1678. + table.horizontal thead tr:first-child th:first-child {
  1679. + border-top-left-radius: 0.25rem; }
  1680. + table.horizontal thead tr:first-child th:last-child {
  1681. + border-bottom-left-radius: 0.25rem; }
  1682. +
  1683. +@media screen and (max-width: 499px) {
  1684. + table, table.horizontal {
  1685. + border-collapse: collapse;
  1686. + border: 0;
  1687. + width: 100%;
  1688. + display: table; }
  1689. + table thead, table th, table.horizontal thead, table.horizontal th {
  1690. + border: 0;
  1691. + height: 1px;
  1692. + width: 1px;
  1693. + margin: -1px;
  1694. + overflow: hidden;
  1695. + padding: 0;
  1696. + position: absolute;
  1697. + clip: rect(0 0 0 0);
  1698. + -webkit-clip-path: inset(100%);
  1699. + clip-path: inset(100%); }
  1700. + table tbody, table.horizontal tbody {
  1701. + border: 0;
  1702. + display: table-row-group; }
  1703. + table tr, table.horizontal tr {
  1704. + display: block;
  1705. + border: 0.0714285714rem solid var(--table-border-color);
  1706. + border-radius: var(--universal-border-radius);
  1707. + background: #ffffff;
  1708. + padding: var(--universal-padding);
  1709. + margin: var(--universal-margin);
  1710. + margin-bottom: calc(1 * var(--universal-margin)); }
  1711. + table th, table td, table.horizontal th, table.horizontal td {
  1712. + width: auto; }
  1713. + table td, table.horizontal td {
  1714. + display: block;
  1715. + border: 0;
  1716. + text-align: right; }
  1717. + table td:before, table.horizontal td:before {
  1718. + content: attr(data-label);
  1719. + float: left;
  1720. + font-weight: 600; }
  1721. + table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {
  1722. + border-top: 0; }
  1723. + table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
  1724. + border-right: 0; } }
  1725. +table tr:nth-of-type(2n) > td {
  1726. + background: var(--table-body-alt-back-color); }
  1727. +
  1728. +@media screen and (max-width: 500px) {
  1729. + table tr:nth-of-type(2n) {
  1730. + background: var(--table-body-alt-back-color); } }
  1731. +:root {
  1732. + --table-body-hover-back-color: #90caf9; }
  1733. +
  1734. +table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
  1735. + background: var(--table-body-hover-back-color); }
  1736. +
  1737. +@media screen and (max-width: 500px) {
  1738. + table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
  1739. + background: var(--table-body-hover-back-color); } }
  1740. +/*
  1741. + Definitions for contextual background elements, toasts and tooltips.
  1742. +*/
  1743. +/* Contextual module CSS variable definitions */
  1744. +:root {
  1745. + --mark-back-color: #3cb4e6;
  1746. + --mark-fore-color: #ffffff; }
  1747. +
  1748. +mark {
  1749. + background: var(--mark-back-color);
  1750. + color: var(--mark-fore-color);
  1751. + font-size: 0.95em;
  1752. + line-height: 1em;
  1753. + border-radius: var(--universal-border-radius);
  1754. + padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
  1755. + mark.inline-block {
  1756. + display: inline-block;
  1757. + font-size: 1em;
  1758. + line-height: 1.4;
  1759. + padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
  1760. +
  1761. +:root {
  1762. + --toast-back-color: #424242;
  1763. + --toast-fore-color: #fafafa; }
  1764. +
  1765. +.toast {
  1766. + position: fixed;
  1767. + bottom: calc(var(--universal-margin) * 3);
  1768. + left: 50%;
  1769. + transform: translate(-50%, -50%);
  1770. + z-index: 1111;
  1771. + color: var(--toast-fore-color);
  1772. + background: var(--toast-back-color);
  1773. + border-radius: calc(var(--universal-border-radius) * 16);
  1774. + padding: var(--universal-padding) calc(var(--universal-padding) * 3); }
  1775. +
  1776. +:root {
  1777. + --tooltip-back-color: #212121;
  1778. + --tooltip-fore-color: #fafafa; }
  1779. +
  1780. +.tooltip {
  1781. + position: relative;
  1782. + display: inline-block; }
  1783. + .tooltip:before, .tooltip:after {
  1784. + position: absolute;
  1785. + opacity: 0;
  1786. + clip: rect(0 0 0 0);
  1787. + -webkit-clip-path: inset(100%);
  1788. + clip-path: inset(100%);
  1789. + transition: all 0.3s;
  1790. + z-index: 1010;
  1791. + left: 50%; }
  1792. + .tooltip:not(.bottom):before, .tooltip:not(.bottom):after {
  1793. + bottom: 75%; }
  1794. + .tooltip.bottom:before, .tooltip.bottom:after {
  1795. + top: 75%; }
  1796. + .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {
  1797. + opacity: 1;
  1798. + clip: auto;
  1799. + -webkit-clip-path: inset(0%);
  1800. + clip-path: inset(0%); }
  1801. + .tooltip:before {
  1802. + content: '';
  1803. + background: transparent;
  1804. + border: var(--universal-margin) solid transparent;
  1805. + left: calc(50% - var(--universal-margin)); }
  1806. + .tooltip:not(.bottom):before {
  1807. + border-top-color: #212121; }
  1808. + .tooltip.bottom:before {
  1809. + border-bottom-color: #212121; }
  1810. + .tooltip:after {
  1811. + content: attr(aria-label);
  1812. + color: var(--tooltip-fore-color);
  1813. + background: var(--tooltip-back-color);
  1814. + border-radius: var(--universal-border-radius);
  1815. + padding: var(--universal-padding);
  1816. + white-space: nowrap;
  1817. + transform: translateX(-50%); }
  1818. + .tooltip:not(.bottom):after {
  1819. + margin-bottom: calc(2 * var(--universal-margin)); }
  1820. + .tooltip.bottom:after {
  1821. + margin-top: calc(2 * var(--universal-margin)); }
  1822. +
  1823. +:root {
  1824. + --modal-overlay-color: rgba(0, 0, 0, 0.45);
  1825. + --modal-close-color: #e6007e;
  1826. + --modal-close-hover-color: #ffe97f; }
  1827. +
  1828. +[type="checkbox"].modal {
  1829. + height: 1px;
  1830. + width: 1px;
  1831. + margin: -1px;
  1832. + overflow: hidden;
  1833. + position: absolute;
  1834. + clip: rect(0 0 0 0);
  1835. + -webkit-clip-path: inset(100%);
  1836. + clip-path: inset(100%); }
  1837. + [type="checkbox"].modal + div {
  1838. + position: fixed;
  1839. + top: 0;
  1840. + left: 0;
  1841. + display: none;
  1842. + width: 100vw;
  1843. + height: 100vh;
  1844. + background: var(--modal-overlay-color); }
  1845. + [type="checkbox"].modal + div .card {
  1846. + margin: 0 auto;
  1847. + max-height: 50vh;
  1848. + overflow: auto; }
  1849. + [type="checkbox"].modal + div .card .modal-close {
  1850. + position: absolute;
  1851. + top: 0;
  1852. + right: 0;
  1853. + width: 1.75rem;
  1854. + height: 1.75rem;
  1855. + border-radius: var(--universal-border-radius);
  1856. + padding: var(--universal-padding);
  1857. + margin: 0;
  1858. + cursor: pointer;
  1859. + transition: background 0.3s; }
  1860. + [type="checkbox"].modal + div .card .modal-close:before {
  1861. + display: block;
  1862. + content: '\00D7';
  1863. + color: var(--modal-close-color);
  1864. + position: relative;
  1865. + font-family: sans-serif;
  1866. + font-size: 1.75rem;
  1867. + line-height: 1;
  1868. + text-align: center; }
  1869. + [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {
  1870. + background: var(--modal-close-hover-color); }
  1871. + [type="checkbox"].modal:checked + div {
  1872. + display: flex;
  1873. + flex: 0 1 auto;
  1874. + z-index: 1200; }
  1875. + [type="checkbox"].modal:checked + div .card .modal-close {
  1876. + z-index: 1211; }
  1877. +
  1878. +:root {
  1879. + --collapse-label-back-color: #03234b;
  1880. + --collapse-label-fore-color: #ffffff;
  1881. + --collapse-label-hover-back-color: #3cb4e6;
  1882. + --collapse-selected-label-back-color: #3cb4e6;
  1883. + --collapse-border-color: var(--collapse-label-back-color);
  1884. + --collapse-selected-border-color: #ceecf8;
  1885. + --collapse-content-back-color: #ffffff;
  1886. + --collapse-selected-label-border-color: #3cb4e6; }
  1887. +
  1888. +.collapse {
  1889. + width: calc(100% - 2 * var(--universal-margin));
  1890. + opacity: 1;
  1891. + display: flex;
  1892. + flex-direction: column;
  1893. + margin: var(--universal-margin);
  1894. + border-radius: var(--universal-border-radius); }
  1895. + .collapse > [type="radio"], .collapse > [type="checkbox"] {
  1896. + height: 1px;
  1897. + width: 1px;
  1898. + margin: -1px;
  1899. + overflow: hidden;
  1900. + position: absolute;
  1901. + clip: rect(0 0 0 0);
  1902. + -webkit-clip-path: inset(100%);
  1903. + clip-path: inset(100%); }
  1904. + .collapse > label {
  1905. + flex-grow: 1;
  1906. + display: inline-block;
  1907. + height: 1.25rem;
  1908. + cursor: pointer;
  1909. + transition: background 0.2s;
  1910. + color: var(--collapse-label-fore-color);
  1911. + background: var(--collapse-label-back-color);
  1912. + border: 0.0714285714rem solid var(--collapse-selected-border-color);
  1913. + padding: calc(1.25 * var(--universal-padding)); }
  1914. + .collapse > label:hover, .collapse > label:focus {
  1915. + background: var(--collapse-label-hover-back-color); }
  1916. + .collapse > label + div {
  1917. + flex-basis: auto;
  1918. + height: 1px;
  1919. + width: 1px;
  1920. + margin: -1px;
  1921. + overflow: hidden;
  1922. + position: absolute;
  1923. + clip: rect(0 0 0 0);
  1924. + -webkit-clip-path: inset(100%);
  1925. + clip-path: inset(100%);
  1926. + transition: max-height 0.3s;
  1927. + max-height: 1px; }
  1928. + .collapse > :checked + label {
  1929. + background: var(--collapse-selected-label-back-color);
  1930. + border-color: var(--collapse-selected-label-border-color); }
  1931. + .collapse > :checked + label + div {
  1932. + box-sizing: border-box;
  1933. + position: relative;
  1934. + width: 100%;
  1935. + height: auto;
  1936. + overflow: auto;
  1937. + margin: 0;
  1938. + background: var(--collapse-content-back-color);
  1939. + border: 0.0714285714rem solid var(--collapse-selected-border-color);
  1940. + border-top: 0;
  1941. + padding: var(--universal-padding);
  1942. + clip: auto;
  1943. + -webkit-clip-path: inset(0%);
  1944. + clip-path: inset(0%);
  1945. + max-height: 100%; }
  1946. + .collapse > label:not(:first-of-type) {
  1947. + border-top: 0; }
  1948. + .collapse > label:first-of-type {
  1949. + border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }
  1950. + .collapse > label:last-of-type:not(:first-of-type) {
  1951. + border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
  1952. + .collapse > label:last-of-type:first-of-type {
  1953. + border-radius: var(--universal-border-radius); }
  1954. + .collapse > :checked:last-of-type:not(:first-of-type) + label {
  1955. + border-radius: 0; }
  1956. + .collapse > :checked:last-of-type + label + div {
  1957. + border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
  1958. +
  1959. +/*
  1960. + Custom elements for contextual background elements, toasts and tooltips.
  1961. +*/
  1962. +mark.tertiary {
  1963. + --mark-back-color: #3cb4e6; }
  1964. +
  1965. +mark.tag {
  1966. + padding: calc(var(--universal-padding)/2) var(--universal-padding);
  1967. + border-radius: 1em; }
  1968. +
  1969. +/*
  1970. + Definitions for progress elements and spinners.
  1971. +*/
  1972. +/* Progress module CSS variable definitions */
  1973. +:root {
  1974. + --progress-back-color: #3cb4e6;
  1975. + --progress-fore-color: #555; }
  1976. +
  1977. +progress {
  1978. + display: block;
  1979. + vertical-align: baseline;
  1980. + -webkit-appearance: none;
  1981. + -moz-appearance: none;
  1982. + appearance: none;
  1983. + height: 0.75rem;
  1984. + width: calc(100% - 2 * var(--universal-margin));
  1985. + margin: var(--universal-margin);
  1986. + border: 0;
  1987. + border-radius: calc(2 * var(--universal-border-radius));
  1988. + background: var(--progress-back-color);
  1989. + color: var(--progress-fore-color); }
  1990. + progress::-webkit-progress-value {
  1991. + background: var(--progress-fore-color);
  1992. + border-top-left-radius: calc(2 * var(--universal-border-radius));
  1993. + border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
  1994. + progress::-webkit-progress-bar {
  1995. + background: var(--progress-back-color); }
  1996. + progress::-moz-progress-bar {
  1997. + background: var(--progress-fore-color);
  1998. + border-top-left-radius: calc(2 * var(--universal-border-radius));
  1999. + border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
  2000. + progress[value="1000"]::-webkit-progress-value {
  2001. + border-radius: calc(2 * var(--universal-border-radius)); }
  2002. + progress[value="1000"]::-moz-progress-bar {
  2003. + border-radius: calc(2 * var(--universal-border-radius)); }
  2004. + progress.inline {
  2005. + display: inline-block;
  2006. + vertical-align: middle;
  2007. + width: 60%; }
  2008. +
  2009. +:root {
  2010. + --spinner-back-color: #ddd;
  2011. + --spinner-fore-color: #555; }
  2012. +
  2013. +@keyframes spinner-donut-anim {
  2014. + 0% {
  2015. + transform: rotate(0deg); }
  2016. + 100% {
  2017. + transform: rotate(360deg); } }
  2018. +.spinner {
  2019. + display: inline-block;
  2020. + margin: var(--universal-margin);
  2021. + border: 0.25rem solid var(--spinner-back-color);
  2022. + border-left: 0.25rem solid var(--spinner-fore-color);
  2023. + border-radius: 50%;
  2024. + width: 1.25rem;
  2025. + height: 1.25rem;
  2026. + animation: spinner-donut-anim 1.2s linear infinite; }
  2027. +
  2028. +/*
  2029. + Custom elements for progress bars and spinners.
  2030. +*/
  2031. +progress.primary {
  2032. + --progress-fore-color: #1976d2; }
  2033. +
  2034. +progress.secondary {
  2035. + --progress-fore-color: #d32f2f; }
  2036. +
  2037. +progress.tertiary {
  2038. + --progress-fore-color: #308732; }
  2039. +
  2040. +.spinner.primary {
  2041. + --spinner-fore-color: #1976d2; }
  2042. +
  2043. +.spinner.secondary {
  2044. + --spinner-fore-color: #d32f2f; }
  2045. +
  2046. +.spinner.tertiary {
  2047. + --spinner-fore-color: #308732; }
  2048. +
  2049. +/*
  2050. + Definitions for icons - powered by Feather (https://feathericons.com/).
  2051. +*/
  2052. +span[class^='icon-'] {
  2053. + display: inline-block;
  2054. + height: 1em;
  2055. + width: 1em;
  2056. + vertical-align: -0.125em;
  2057. + background-size: contain;
  2058. + margin: 0 calc(var(--universal-margin) / 4); }
  2059. + span[class^='icon-'].secondary {
  2060. + -webkit-filter: invert(25%);
  2061. + filter: invert(25%); }
  2062. + span[class^='icon-'].inverse {
  2063. + -webkit-filter: invert(100%);
  2064. + filter: invert(100%); }
  2065. +
  2066. +span.icon-alert {
  2067. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
  2068. +span.icon-bookmark {
  2069. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
  2070. +span.icon-calendar {
  2071. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
  2072. +span.icon-credit {
  2073. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
  2074. +span.icon-edit {
  2075. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
  2076. +span.icon-link {
  2077. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
  2078. +span.icon-help {
  2079. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
  2080. +span.icon-home {
  2081. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
  2082. +span.icon-info {
  2083. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
  2084. +span.icon-lock {
  2085. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
  2086. +span.icon-mail {
  2087. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
  2088. +span.icon-location {
  2089. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
  2090. +span.icon-phone {
  2091. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
  2092. +span.icon-rss {
  2093. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
  2094. +span.icon-search {
  2095. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
  2096. +span.icon-settings {
  2097. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
  2098. +span.icon-share {
  2099. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
  2100. +span.icon-cart {
  2101. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
  2102. +span.icon-upload {
  2103. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
  2104. +span.icon-user {
  2105. + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
  2106. +
  2107. +/*
  2108. + Definitions for STMicroelectronics icons (https://brandportal.st.com/document/26).
  2109. +*/
  2110. +span.icon-st-update {
  2111. + background-image: url("Update.svg"); }
  2112. +span.icon-st-add {
  2113. + background-image: url("Add button.svg"); }
  2114. +
  2115. +/*
  2116. + Definitions for utilities and helper classes.
  2117. +*/
  2118. +/* Utility module CSS variable definitions */
  2119. +:root {
  2120. + --generic-border-color: rgba(0, 0, 0, 0.3);
  2121. + --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
  2122. +
  2123. +.hidden {
  2124. + display: none !important; }
  2125. +
  2126. +.visually-hidden {
  2127. + position: absolute !important;
  2128. + width: 1px !important;
  2129. + height: 1px !important;
  2130. + margin: -1px !important;
  2131. + border: 0 !important;
  2132. + padding: 0 !important;
  2133. + clip: rect(0 0 0 0) !important;
  2134. + -webkit-clip-path: inset(100%) !important;
  2135. + clip-path: inset(100%) !important;
  2136. + overflow: hidden !important; }
  2137. +
  2138. +.bordered {
  2139. + border: 0.0714285714rem solid var(--generic-border-color) !important; }
  2140. +
  2141. +.rounded {
  2142. + border-radius: var(--universal-border-radius) !important; }
  2143. +
  2144. +.circular {
  2145. + border-radius: 50% !important; }
  2146. +
  2147. +.shadowed {
  2148. + box-shadow: var(--generic-box-shadow) !important; }
  2149. +
  2150. +.responsive-margin {
  2151. + margin: calc(var(--universal-margin) / 4) !important; }
  2152. + @media screen and (min-width: 500px) {
  2153. + .responsive-margin {
  2154. + margin: calc(var(--universal-margin) / 2) !important; } }
  2155. + @media screen and (min-width: 1280px) {
  2156. + .responsive-margin {
  2157. + margin: var(--universal-margin) !important; } }
  2158. +
  2159. +.responsive-padding {
  2160. + padding: calc(var(--universal-padding) / 4) !important; }
  2161. + @media screen and (min-width: 500px) {
  2162. + .responsive-padding {
  2163. + padding: calc(var(--universal-padding) / 2) !important; } }
  2164. + @media screen and (min-width: 1280px) {
  2165. + .responsive-padding {
  2166. + padding: var(--universal-padding) !important; } }
  2167. +
  2168. +@media screen and (max-width: 499px) {
  2169. + .hidden-sm {
  2170. + display: none !important; } }
  2171. +@media screen and (min-width: 500px) and (max-width: 1279px) {
  2172. + .hidden-md {
  2173. + display: none !important; } }
  2174. +@media screen and (min-width: 1280px) {
  2175. + .hidden-lg {
  2176. + display: none !important; } }
  2177. +@media screen and (max-width: 499px) {
  2178. + .visually-hidden-sm {
  2179. + position: absolute !important;
  2180. + width: 1px !important;
  2181. + height: 1px !important;
  2182. + margin: -1px !important;
  2183. + border: 0 !important;
  2184. + padding: 0 !important;
  2185. + clip: rect(0 0 0 0) !important;
  2186. + -webkit-clip-path: inset(100%) !important;
  2187. + clip-path: inset(100%) !important;
  2188. + overflow: hidden !important; } }
  2189. +@media screen and (min-width: 500px) and (max-width: 1279px) {
  2190. + .visually-hidden-md {
  2191. + position: absolute !important;
  2192. + width: 1px !important;
  2193. + height: 1px !important;
  2194. + margin: -1px !important;
  2195. + border: 0 !important;
  2196. + padding: 0 !important;
  2197. + clip: rect(0 0 0 0) !important;
  2198. + -webkit-clip-path: inset(100%) !important;
  2199. + clip-path: inset(100%) !important;
  2200. + overflow: hidden !important; } }
  2201. +@media screen and (min-width: 1280px) {
  2202. + .visually-hidden-lg {
  2203. + position: absolute !important;
  2204. + width: 1px !important;
  2205. + height: 1px !important;
  2206. + margin: -1px !important;
  2207. + border: 0 !important;
  2208. + padding: 0 !important;
  2209. + clip: rect(0 0 0 0) !important;
  2210. + -webkit-clip-path: inset(100%) !important;
  2211. + clip-path: inset(100%) !important;
  2212. + overflow: hidden !important; } }
  2213. +
  2214. +/*# sourceMappingURL=mini-custom.css.map */
  2215. +
  2216. +img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
  2217. +img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
  2218. +
  2219. +.figure {
  2220. + display: block;
  2221. + margin-left: auto;
  2222. + margin-right: auto;
  2223. + text-align: center;
  2224. +}
  2225. \ No newline at end of file
  2226. diff --git a/_htmresc/st_logo_2020.png b/_htmresc/st_logo_2020.png
  2227. new file mode 100644
  2228. index 000000000..d6cebb5ac
  2229. Binary files /dev/null and b/_htmresc/st_logo_2020.png differ
  2230. diff --git a/lsm6dso.c b/lsm6dso.c
  2231. index f7ab817b1..739d67afd 100644
  2232. --- a/lsm6dso.c
  2233. +++ b/lsm6dso.c
  2234. @@ -1,40 +1,39 @@
  2235. /**
  2236. - ******************************************************************************
  2237. - * @file lsm6dso.c
  2238. - * @author MEMS Software Solutions Team
  2239. - * @brief LSM6DSO driver file
  2240. - ******************************************************************************
  2241. - * @attention
  2242. - *
  2243. - * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  2244. - * All rights reserved.</center></h2>
  2245. - *
  2246. - * This software component is licensed by ST under BSD 3-Clause license,
  2247. - * the "License"; You may not use this file except in compliance with the
  2248. - * License. You may obtain a copy of the License at:
  2249. - * opensource.org/licenses/BSD-3-Clause
  2250. - *
  2251. - ******************************************************************************
  2252. - */
  2253. + ******************************************************************************
  2254. + * @file lsm6dso.c
  2255. + * @author MEMS Software Solutions Team
  2256. + * @brief LSM6DSO driver file
  2257. + ******************************************************************************
  2258. + * @attention
  2259. + *
  2260. + * Copyright (c) 2019 STMicroelectronics.
  2261. + * All rights reserved.
  2262. + *
  2263. + * This software is licensed under terms that can be found in the LICENSE file
  2264. + * in the root directory of this software component.
  2265. + * If no LICENSE file comes with this software, it is provided AS-IS.
  2266. + *
  2267. + ******************************************************************************
  2268. + */
  2269. /* Includes ------------------------------------------------------------------*/
  2270. #include "lsm6dso.h"
  2271. /** @addtogroup BSP BSP
  2272. - * @{
  2273. - */
  2274. + * @{
  2275. + */
  2276. /** @addtogroup Component Component
  2277. - * @{
  2278. - */
  2279. + * @{
  2280. + */
  2281. /** @defgroup LSM6DSO LSM6DSO
  2282. - * @{
  2283. - */
  2284. + * @{
  2285. + */
  2286. /** @defgroup LSM6DSO_Exported_Variables LSM6DSO Exported Variables
  2287. - * @{
  2288. - */
  2289. + * @{
  2290. + */
  2291. LSM6DSO_CommonDrv_t LSM6DSO_COMMON_Driver =
  2292. {
  2293. @@ -71,12 +70,12 @@ LSM6DSO_GYRO_Drv_t LSM6DSO_GYRO_Driver =
  2294. };
  2295. /**
  2296. - * @}
  2297. - */
  2298. + * @}
  2299. + */
  2300. /** @defgroup LSM6DSO_Private_Function_Prototypes LSM6DSO Private Function Prototypes
  2301. - * @{
  2302. - */
  2303. + * @{
  2304. + */
  2305. static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr);
  2306. static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr);
  2307. @@ -87,18 +86,18 @@ static int32_t ReadRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t L
  2308. static int32_t WriteRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length);
  2309. /**
  2310. - * @}
  2311. - */
  2312. + * @}
  2313. + */
  2314. /** @defgroup LSM6DSO_Exported_Functions LSM6DSO Exported Functions
  2315. - * @{
  2316. - */
  2317. + * @{
  2318. + */
  2319. /**
  2320. - * @brief Register Component Bus IO operations
  2321. - * @param pObj the device pObj
  2322. - * @retval 0 in case of success, an error code otherwise
  2323. - */
  2324. + * @brief Register Component Bus IO operations
  2325. + * @param pObj the device pObj
  2326. + * @retval 0 in case of success, an error code otherwise
  2327. + */
  2328. int32_t LSM6DSO_RegisterBusIO(LSM6DSO_Object_t *pObj, LSM6DSO_IO_t *pIO)
  2329. {
  2330. int32_t ret = LSM6DSO_OK;
  2331. @@ -119,6 +118,7 @@ int32_t LSM6DSO_RegisterBusIO(LSM6DSO_Object_t *pObj, LSM6DSO_IO_t *pIO)
  2332. pObj->Ctx.read_reg = ReadRegWrap;
  2333. pObj->Ctx.write_reg = WriteRegWrap;
  2334. + pObj->Ctx.mdelay = pIO->Delay;
  2335. pObj->Ctx.handle = pObj;
  2336. if (pObj->IO.Init == NULL)
  2337. @@ -152,10 +152,10 @@ int32_t LSM6DSO_RegisterBusIO(LSM6DSO_Object_t *pObj, LSM6DSO_IO_t *pIO)
  2338. }
  2339. /**
  2340. - * @brief Initialize the LSM6DSO sensor
  2341. - * @param pObj the device pObj
  2342. - * @retval 0 in case of success, an error code otherwise
  2343. - */
  2344. + * @brief Initialize the LSM6DSO sensor
  2345. + * @param pObj the device pObj
  2346. + * @retval 0 in case of success, an error code otherwise
  2347. + */
  2348. int32_t LSM6DSO_Init(LSM6DSO_Object_t *pObj)
  2349. {
  2350. /* Disable I3C */
  2351. @@ -219,10 +219,10 @@ int32_t LSM6DSO_Init(LSM6DSO_Object_t *pObj)
  2352. }
  2353. /**
  2354. - * @brief Deinitialize the LSM6DSO sensor
  2355. - * @param pObj the device pObj
  2356. - * @retval 0 in case of success, an error code otherwise
  2357. - */
  2358. + * @brief Deinitialize the LSM6DSO sensor
  2359. + * @param pObj the device pObj
  2360. + * @retval 0 in case of success, an error code otherwise
  2361. + */
  2362. int32_t LSM6DSO_DeInit(LSM6DSO_Object_t *pObj)
  2363. {
  2364. /* Disable the component */
  2365. @@ -246,11 +246,11 @@ int32_t LSM6DSO_DeInit(LSM6DSO_Object_t *pObj)
  2366. }
  2367. /**
  2368. - * @brief Read component ID
  2369. - * @param pObj the device pObj
  2370. - * @param Id the WHO_AM_I value
  2371. - * @retval 0 in case of success, an error code otherwise
  2372. - */
  2373. + * @brief Read component ID
  2374. + * @param pObj the device pObj
  2375. + * @param Id the WHO_AM_I value
  2376. + * @retval 0 in case of success, an error code otherwise
  2377. + */
  2378. int32_t LSM6DSO_ReadID(LSM6DSO_Object_t *pObj, uint8_t *Id)
  2379. {
  2380. if (lsm6dso_device_id_get(&(pObj->Ctx), Id) != LSM6DSO_OK)
  2381. @@ -262,11 +262,11 @@ int32_t LSM6DSO_ReadID(LSM6DSO_Object_t *pObj, uint8_t *Id)
  2382. }
  2383. /**
  2384. - * @brief Get LSM6DSO sensor capabilities
  2385. - * @param pObj Component object pointer
  2386. - * @param Capabilities pointer to LSM6DSO sensor capabilities
  2387. - * @retval 0 in case of success, an error code otherwise
  2388. - */
  2389. + * @brief Get LSM6DSO sensor capabilities
  2390. + * @param pObj Component object pointer
  2391. + * @param Capabilities pointer to LSM6DSO sensor capabilities
  2392. + * @retval 0 in case of success, an error code otherwise
  2393. + */
  2394. int32_t LSM6DSO_GetCapabilities(LSM6DSO_Object_t *pObj, LSM6DSO_Capabilities_t *Capabilities)
  2395. {
  2396. /* Prevent unused argument(s) compilation warning */
  2397. @@ -286,10 +286,10 @@ int32_t LSM6DSO_GetCapabilities(LSM6DSO_Object_t *pObj, LSM6DSO_Capabilities_t *
  2398. }
  2399. /**
  2400. - * @brief Enable the LSM6DSO accelerometer sensor
  2401. - * @param pObj the device pObj
  2402. - * @retval 0 in case of success, an error code otherwise
  2403. - */
  2404. + * @brief Enable the LSM6DSO accelerometer sensor
  2405. + * @param pObj the device pObj
  2406. + * @retval 0 in case of success, an error code otherwise
  2407. + */
  2408. int32_t LSM6DSO_ACC_Enable(LSM6DSO_Object_t *pObj)
  2409. {
  2410. /* Check if the component is already enabled */
  2411. @@ -310,10 +310,10 @@ int32_t LSM6DSO_ACC_Enable(LSM6DSO_Object_t *pObj)
  2412. }
  2413. /**
  2414. - * @brief Disable the LSM6DSO accelerometer sensor
  2415. - * @param pObj the device pObj
  2416. - * @retval 0 in case of success, an error code otherwise
  2417. - */
  2418. + * @brief Disable the LSM6DSO accelerometer sensor
  2419. + * @param pObj the device pObj
  2420. + * @retval 0 in case of success, an error code otherwise
  2421. + */
  2422. int32_t LSM6DSO_ACC_Disable(LSM6DSO_Object_t *pObj)
  2423. {
  2424. /* Check if the component is already disabled */
  2425. @@ -340,11 +340,11 @@ int32_t LSM6DSO_ACC_Disable(LSM6DSO_Object_t *pObj)
  2426. }
  2427. /**
  2428. - * @brief Get the LSM6DSO accelerometer sensor sensitivity
  2429. - * @param pObj the device pObj
  2430. - * @param Sensitivity pointer
  2431. - * @retval 0 in case of success, an error code otherwise
  2432. - */
  2433. + * @brief Get the LSM6DSO accelerometer sensor sensitivity
  2434. + * @param pObj the device pObj
  2435. + * @param Sensitivity pointer
  2436. + * @retval 0 in case of success, an error code otherwise
  2437. + */
  2438. int32_t LSM6DSO_ACC_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity)
  2439. {
  2440. int32_t ret = LSM6DSO_OK;
  2441. @@ -384,11 +384,11 @@ int32_t LSM6DSO_ACC_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity)
  2442. }
  2443. /**
  2444. - * @brief Get the LSM6DSO accelerometer sensor output data rate
  2445. - * @param pObj the device pObj
  2446. - * @param Odr pointer where the output data rate is written
  2447. - * @retval 0 in case of success, an error code otherwise
  2448. - */
  2449. + * @brief Get the LSM6DSO accelerometer sensor output data rate
  2450. + * @param pObj the device pObj
  2451. + * @param Odr pointer where the output data rate is written
  2452. + * @retval 0 in case of success, an error code otherwise
  2453. + */
  2454. int32_t LSM6DSO_ACC_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr)
  2455. {
  2456. int32_t ret = LSM6DSO_OK;
  2457. @@ -459,29 +459,29 @@ int32_t LSM6DSO_ACC_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr)
  2458. }
  2459. /**
  2460. - * @brief Set the LSM6DSO accelerometer sensor output data rate
  2461. - * @param pObj the device pObj
  2462. - * @param Odr the output data rate value to be set
  2463. - * @retval 0 in case of success, an error code otherwise
  2464. - */
  2465. + * @brief Set the LSM6DSO accelerometer sensor output data rate
  2466. + * @param pObj the device pObj
  2467. + * @param Odr the output data rate value to be set
  2468. + * @retval 0 in case of success, an error code otherwise
  2469. + */
  2470. int32_t LSM6DSO_ACC_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr)
  2471. {
  2472. return LSM6DSO_ACC_SetOutputDataRate_With_Mode(pObj, Odr, LSM6DSO_ACC_HIGH_PERFORMANCE_MODE);
  2473. }
  2474. /**
  2475. - * @brief Set the LSM6DSO accelerometer sensor output data rate with operating mode
  2476. - * @param pObj the device pObj
  2477. - * @param Odr the output data rate value to be set
  2478. - * @param Mode the accelerometer operating mode
  2479. - * @note This function switches off the gyroscope if Ultra Low Power Mode is set
  2480. - * @retval 0 in case of success, an error code otherwise
  2481. - */
  2482. + * @brief Set the LSM6DSO accelerometer sensor output data rate with operating mode
  2483. + * @param pObj the device pObj
  2484. + * @param Odr the output data rate value to be set
  2485. + * @param Mode the accelerometer operating mode
  2486. + * @note This function switches off the gyroscope if Ultra Low Power Mode is set
  2487. + * @retval 0 in case of success, an error code otherwise
  2488. + */
  2489. int32_t LSM6DSO_ACC_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr, LSM6DSO_ACC_Operating_Mode_t Mode)
  2490. {
  2491. int32_t ret = LSM6DSO_OK;
  2492. float_t newOdr = Odr;
  2493. -
  2494. +
  2495. switch (Mode)
  2496. {
  2497. case LSM6DSO_ACC_HIGH_PERFORMANCE_MODE:
  2498. @@ -651,7 +651,7 @@ int32_t LSM6DSO_ACC_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t
  2499. break;
  2500. }
  2501. - if(ret == LSM6DSO_ERROR)
  2502. + if (ret == LSM6DSO_ERROR)
  2503. {
  2504. return LSM6DSO_ERROR;
  2505. }
  2506. @@ -669,11 +669,11 @@ int32_t LSM6DSO_ACC_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t
  2507. }
  2508. /**
  2509. - * @brief Get the LSM6DSO accelerometer sensor full scale
  2510. - * @param pObj the device pObj
  2511. - * @param FullScale pointer where the full scale is written
  2512. - * @retval 0 in case of success, an error code otherwise
  2513. - */
  2514. + * @brief Get the LSM6DSO accelerometer sensor full scale
  2515. + * @param pObj the device pObj
  2516. + * @param FullScale pointer where the full scale is written
  2517. + * @retval 0 in case of success, an error code otherwise
  2518. + */
  2519. int32_t LSM6DSO_ACC_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale)
  2520. {
  2521. int32_t ret = LSM6DSO_OK;
  2522. @@ -712,11 +712,11 @@ int32_t LSM6DSO_ACC_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale)
  2523. }
  2524. /**
  2525. - * @brief Set the LSM6DSO accelerometer sensor full scale
  2526. - * @param pObj the device pObj
  2527. - * @param FullScale the functional full scale to be set
  2528. - * @retval 0 in case of success, an error code otherwise
  2529. - */
  2530. + * @brief Set the LSM6DSO accelerometer sensor full scale
  2531. + * @param pObj the device pObj
  2532. + * @param FullScale the functional full scale to be set
  2533. + * @retval 0 in case of success, an error code otherwise
  2534. + */
  2535. int32_t LSM6DSO_ACC_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale)
  2536. {
  2537. lsm6dso_fs_xl_t new_fs;
  2538. @@ -737,11 +737,11 @@ int32_t LSM6DSO_ACC_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale)
  2539. }
  2540. /**
  2541. - * @brief Get the LSM6DSO accelerometer sensor raw axes
  2542. - * @param pObj the device pObj
  2543. - * @param Value pointer where the raw values of the axes are written
  2544. - * @retval 0 in case of success, an error code otherwise
  2545. - */
  2546. + * @brief Get the LSM6DSO accelerometer sensor raw axes
  2547. + * @param pObj the device pObj
  2548. + * @param Value pointer where the raw values of the axes are written
  2549. + * @retval 0 in case of success, an error code otherwise
  2550. + */
  2551. int32_t LSM6DSO_ACC_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value)
  2552. {
  2553. lsm6dso_axis3bit16_t data_raw;
  2554. @@ -761,11 +761,11 @@ int32_t LSM6DSO_ACC_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value)
  2555. }
  2556. /**
  2557. - * @brief Get the LSM6DSO accelerometer sensor axes
  2558. - * @param pObj the device pObj
  2559. - * @param Acceleration pointer where the values of the axes are written
  2560. - * @retval 0 in case of success, an error code otherwise
  2561. - */
  2562. + * @brief Get the LSM6DSO accelerometer sensor axes
  2563. + * @param pObj the device pObj
  2564. + * @param Acceleration pointer where the values of the axes are written
  2565. + * @retval 0 in case of success, an error code otherwise
  2566. + */
  2567. int32_t LSM6DSO_ACC_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration)
  2568. {
  2569. lsm6dso_axis3bit16_t data_raw;
  2570. @@ -792,10 +792,10 @@ int32_t LSM6DSO_ACC_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration
  2571. }
  2572. /**
  2573. - * @brief Enable the LSM6DSO gyroscope sensor
  2574. - * @param pObj the device pObj
  2575. - * @retval 0 in case of success, an error code otherwise
  2576. - */
  2577. + * @brief Enable the LSM6DSO gyroscope sensor
  2578. + * @param pObj the device pObj
  2579. + * @retval 0 in case of success, an error code otherwise
  2580. + */
  2581. int32_t LSM6DSO_GYRO_Enable(LSM6DSO_Object_t *pObj)
  2582. {
  2583. /* Check if the component is already enabled */
  2584. @@ -816,10 +816,10 @@ int32_t LSM6DSO_GYRO_Enable(LSM6DSO_Object_t *pObj)
  2585. }
  2586. /**
  2587. - * @brief Disable the LSM6DSO gyroscope sensor
  2588. - * @param pObj the device pObj
  2589. - * @retval 0 in case of success, an error code otherwise
  2590. - */
  2591. + * @brief Disable the LSM6DSO gyroscope sensor
  2592. + * @param pObj the device pObj
  2593. + * @retval 0 in case of success, an error code otherwise
  2594. + */
  2595. int32_t LSM6DSO_GYRO_Disable(LSM6DSO_Object_t *pObj)
  2596. {
  2597. /* Check if the component is already disabled */
  2598. @@ -846,11 +846,11 @@ int32_t LSM6DSO_GYRO_Disable(LSM6DSO_Object_t *pObj)
  2599. }
  2600. /**
  2601. - * @brief Get the LSM6DSO gyroscope sensor sensitivity
  2602. - * @param pObj the device pObj
  2603. - * @param Sensitivity pointer
  2604. - * @retval 0 in case of success, an error code otherwise
  2605. - */
  2606. + * @brief Get the LSM6DSO gyroscope sensor sensitivity
  2607. + * @param pObj the device pObj
  2608. + * @param Sensitivity pointer
  2609. + * @retval 0 in case of success, an error code otherwise
  2610. + */
  2611. int32_t LSM6DSO_GYRO_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity)
  2612. {
  2613. int32_t ret = LSM6DSO_OK;
  2614. @@ -894,11 +894,11 @@ int32_t LSM6DSO_GYRO_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity
  2615. }
  2616. /**
  2617. - * @brief Get the LSM6DSO gyroscope sensor output data rate
  2618. - * @param pObj the device pObj
  2619. - * @param Odr pointer where the output data rate is written
  2620. - * @retval 0 in case of success, an error code otherwise
  2621. - */
  2622. + * @brief Get the LSM6DSO gyroscope sensor output data rate
  2623. + * @param pObj the device pObj
  2624. + * @param Odr pointer where the output data rate is written
  2625. + * @retval 0 in case of success, an error code otherwise
  2626. + */
  2627. int32_t LSM6DSO_GYRO_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr)
  2628. {
  2629. int32_t ret = LSM6DSO_OK;
  2630. @@ -965,24 +965,25 @@ int32_t LSM6DSO_GYRO_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr)
  2631. }
  2632. /**
  2633. - * @brief Set the LSM6DSO gyroscope sensor output data rate
  2634. - * @param pObj the device pObj
  2635. - * @param Odr the output data rate value to be set
  2636. - * @retval 0 in case of success, an error code otherwise
  2637. - */
  2638. + * @brief Set the LSM6DSO gyroscope sensor output data rate
  2639. + * @param pObj the device pObj
  2640. + * @param Odr the output data rate value to be set
  2641. + * @retval 0 in case of success, an error code otherwise
  2642. + */
  2643. int32_t LSM6DSO_GYRO_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr)
  2644. {
  2645. return LSM6DSO_GYRO_SetOutputDataRate_With_Mode(pObj, Odr, LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE);
  2646. }
  2647. /**
  2648. - * @brief Set the LSM6DSO gyroscope sensor output data rate with operating mode
  2649. - * @param pObj the device pObj
  2650. - * @param Odr the output data rate value to be set
  2651. - * @param Mode the gyroscope operating mode
  2652. - * @retval 0 in case of success, an error code otherwise
  2653. - */
  2654. -int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr, LSM6DSO_GYRO_Operating_Mode_t Mode)
  2655. + * @brief Set the LSM6DSO gyroscope sensor output data rate with operating mode
  2656. + * @param pObj the device pObj
  2657. + * @param Odr the output data rate value to be set
  2658. + * @param Mode the gyroscope operating mode
  2659. + * @retval 0 in case of success, an error code otherwise
  2660. + */
  2661. +int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr,
  2662. + LSM6DSO_GYRO_Operating_Mode_t Mode)
  2663. {
  2664. int32_t ret = LSM6DSO_OK;
  2665. float_t newOdr = Odr;
  2666. @@ -1058,11 +1059,11 @@ int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t
  2667. }
  2668. /**
  2669. - * @brief Get the LSM6DSO gyroscope sensor full scale
  2670. - * @param pObj the device pObj
  2671. - * @param FullScale pointer where the full scale is written
  2672. - * @retval 0 in case of success, an error code otherwise
  2673. - */
  2674. + * @brief Get the LSM6DSO gyroscope sensor full scale
  2675. + * @param pObj the device pObj
  2676. + * @param FullScale pointer where the full scale is written
  2677. + * @retval 0 in case of success, an error code otherwise
  2678. + */
  2679. int32_t LSM6DSO_GYRO_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale)
  2680. {
  2681. int32_t ret = LSM6DSO_OK;
  2682. @@ -1105,11 +1106,11 @@ int32_t LSM6DSO_GYRO_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale)
  2683. }
  2684. /**
  2685. - * @brief Set the LSM6DSO gyroscope sensor full scale
  2686. - * @param pObj the device pObj
  2687. - * @param FullScale the functional full scale to be set
  2688. - * @retval 0 in case of success, an error code otherwise
  2689. - */
  2690. + * @brief Set the LSM6DSO gyroscope sensor full scale
  2691. + * @param pObj the device pObj
  2692. + * @param FullScale the functional full scale to be set
  2693. + * @retval 0 in case of success, an error code otherwise
  2694. + */
  2695. int32_t LSM6DSO_GYRO_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale)
  2696. {
  2697. lsm6dso_fs_g_t new_fs;
  2698. @@ -1129,11 +1130,11 @@ int32_t LSM6DSO_GYRO_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale)
  2699. }
  2700. /**
  2701. - * @brief Get the LSM6DSO gyroscope sensor raw axes
  2702. - * @param pObj the device pObj
  2703. - * @param Value pointer where the raw values of the axes are written
  2704. - * @retval 0 in case of success, an error code otherwise
  2705. - */
  2706. + * @brief Get the LSM6DSO gyroscope sensor raw axes
  2707. + * @param pObj the device pObj
  2708. + * @param Value pointer where the raw values of the axes are written
  2709. + * @retval 0 in case of success, an error code otherwise
  2710. + */
  2711. int32_t LSM6DSO_GYRO_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value)
  2712. {
  2713. lsm6dso_axis3bit16_t data_raw;
  2714. @@ -1153,11 +1154,11 @@ int32_t LSM6DSO_GYRO_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value
  2715. }
  2716. /**
  2717. - * @brief Get the LSM6DSO gyroscope sensor axes
  2718. - * @param pObj the device pObj
  2719. - * @param AngularRate pointer where the values of the axes are written
  2720. - * @retval 0 in case of success, an error code otherwise
  2721. - */
  2722. + * @brief Get the LSM6DSO gyroscope sensor axes
  2723. + * @param pObj the device pObj
  2724. + * @param AngularRate pointer where the values of the axes are written
  2725. + * @retval 0 in case of success, an error code otherwise
  2726. + */
  2727. int32_t LSM6DSO_GYRO_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularRate)
  2728. {
  2729. lsm6dso_axis3bit16_t data_raw;
  2730. @@ -1184,12 +1185,12 @@ int32_t LSM6DSO_GYRO_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularRate
  2731. }
  2732. /**
  2733. - * @brief Get the LSM6DSO register value
  2734. - * @param pObj the device pObj
  2735. - * @param Reg address to be read
  2736. - * @param Data pointer where the value is written
  2737. - * @retval 0 in case of success, an error code otherwise
  2738. - */
  2739. + * @brief Get the LSM6DSO register value
  2740. + * @param pObj the device pObj
  2741. + * @param Reg address to be read
  2742. + * @param Data pointer where the value is written
  2743. + * @retval 0 in case of success, an error code otherwise
  2744. + */
  2745. int32_t LSM6DSO_Read_Reg(LSM6DSO_Object_t *pObj, uint8_t Reg, uint8_t *Data)
  2746. {
  2747. if (lsm6dso_read_reg(&(pObj->Ctx), Reg, Data, 1) != LSM6DSO_OK)
  2748. @@ -1201,12 +1202,12 @@ int32_t LSM6DSO_Read_Reg(LSM6DSO_Object_t *pObj, uint8_t Reg, uint8_t *Data)
  2749. }
  2750. /**
  2751. - * @brief Set the LSM6DSO register value
  2752. - * @param pObj the device pObj
  2753. - * @param Reg address to be written
  2754. - * @param Data value to be written
  2755. - * @retval 0 in case of success, an error code otherwise
  2756. - */
  2757. + * @brief Set the LSM6DSO register value
  2758. + * @param pObj the device pObj
  2759. + * @param Reg address to be written
  2760. + * @param Data value to be written
  2761. + * @retval 0 in case of success, an error code otherwise
  2762. + */
  2763. int32_t LSM6DSO_Write_Reg(LSM6DSO_Object_t *pObj, uint8_t Reg, uint8_t Data)
  2764. {
  2765. if (lsm6dso_write_reg(&(pObj->Ctx), Reg, &Data, 1) != LSM6DSO_OK)
  2766. @@ -1218,11 +1219,11 @@ int32_t LSM6DSO_Write_Reg(LSM6DSO_Object_t *pObj, uint8_t Reg, uint8_t Data)
  2767. }
  2768. /**
  2769. - * @brief Set the interrupt latch
  2770. - * @param pObj the device pObj
  2771. - * @param Status value to be written
  2772. - * @retval 0 in case of success, an error code otherwise
  2773. - */
  2774. + * @brief Set the interrupt latch
  2775. + * @param pObj the device pObj
  2776. + * @param Status value to be written
  2777. + * @retval 0 in case of success, an error code otherwise
  2778. + */
  2779. int32_t LSM6DSO_Set_Interrupt_Latch(LSM6DSO_Object_t *pObj, uint8_t Status)
  2780. {
  2781. int32_t ret = LSM6DSO_OK;
  2782. @@ -1266,11 +1267,11 @@ int32_t LSM6DSO_Set_Interrupt_Latch(LSM6DSO_Object_t *pObj, uint8_t Status)
  2783. }
  2784. /**
  2785. - * @brief Enable free fall detection
  2786. - * @param pObj the device pObj
  2787. - * @param IntPin interrupt pin line to be used
  2788. - * @retval 0 in case of success, an error code otherwise
  2789. - */
  2790. + * @brief Enable free fall detection
  2791. + * @param pObj the device pObj
  2792. + * @param IntPin interrupt pin line to be used
  2793. + * @retval 0 in case of success, an error code otherwise
  2794. + */
  2795. int32_t LSM6DSO_ACC_Enable_Free_Fall_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
  2796. {
  2797. int32_t ret = LSM6DSO_OK;
  2798. @@ -1353,10 +1354,10 @@ int32_t LSM6DSO_ACC_Enable_Free_Fall_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_S
  2799. }
  2800. /**
  2801. - * @brief Disable free fall detection
  2802. - * @param pObj the device pObj
  2803. - * @retval 0 in case of success, an error code otherwise
  2804. - */
  2805. + * @brief Disable free fall detection
  2806. + * @param pObj the device pObj
  2807. + * @retval 0 in case of success, an error code otherwise
  2808. + */
  2809. int32_t LSM6DSO_ACC_Disable_Free_Fall_Detection(LSM6DSO_Object_t *pObj)
  2810. {
  2811. lsm6dso_pin_int1_route_t val1;
  2812. @@ -1403,11 +1404,11 @@ int32_t LSM6DSO_ACC_Disable_Free_Fall_Detection(LSM6DSO_Object_t *pObj)
  2813. }
  2814. /**
  2815. - * @brief Set free fall threshold
  2816. - * @param pObj the device pObj
  2817. - * @param Threshold free fall detection threshold
  2818. - * @retval 0 in case of success, an error code otherwise
  2819. - */
  2820. + * @brief Set free fall threshold
  2821. + * @param pObj the device pObj
  2822. + * @param Threshold free fall detection threshold
  2823. + * @retval 0 in case of success, an error code otherwise
  2824. + */
  2825. int32_t LSM6DSO_ACC_Set_Free_Fall_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
  2826. {
  2827. int32_t ret = LSM6DSO_OK;
  2828. @@ -1458,11 +1459,11 @@ int32_t LSM6DSO_ACC_Set_Free_Fall_Threshold(LSM6DSO_Object_t *pObj, uint8_t Thre
  2829. }
  2830. /**
  2831. - * @brief Set free fall duration
  2832. - * @param pObj the device pObj
  2833. - * @param Duration free fall detection duration
  2834. - * @retval 0 in case of success, an error code otherwise
  2835. - */
  2836. + * @brief Set free fall duration
  2837. + * @param pObj the device pObj
  2838. + * @param Duration free fall detection duration
  2839. + * @retval 0 in case of success, an error code otherwise
  2840. + */
  2841. int32_t LSM6DSO_ACC_Set_Free_Fall_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
  2842. {
  2843. if (lsm6dso_ff_dur_set(&(pObj->Ctx), Duration) != LSM6DSO_OK)
  2844. @@ -1474,10 +1475,10 @@ int32_t LSM6DSO_ACC_Set_Free_Fall_Duration(LSM6DSO_Object_t *pObj, uint8_t Durat
  2845. }
  2846. /**
  2847. - * @brief Enable pedometer
  2848. - * @param pObj the device pObj
  2849. - * @retval 0 in case of success, an error code otherwise
  2850. - */
  2851. + * @brief Enable pedometer
  2852. + * @param pObj the device pObj
  2853. + * @retval 0 in case of success, an error code otherwise
  2854. + */
  2855. int32_t LSM6DSO_ACC_Enable_Pedometer(LSM6DSO_Object_t *pObj)
  2856. {
  2857. lsm6dso_pin_int1_route_t val;
  2858. @@ -1541,10 +1542,10 @@ int32_t LSM6DSO_ACC_Enable_Pedometer(LSM6DSO_Object_t *pObj)
  2859. }
  2860. /**
  2861. - * @brief Disable pedometer
  2862. - * @param pObj the device pObj
  2863. - * @retval 0 in case of success, an error code otherwise
  2864. - */
  2865. + * @brief Disable pedometer
  2866. + * @param pObj the device pObj
  2867. + * @retval 0 in case of success, an error code otherwise
  2868. + */
  2869. int32_t LSM6DSO_ACC_Disable_Pedometer(LSM6DSO_Object_t *pObj)
  2870. {
  2871. lsm6dso_pin_int1_route_t val1;
  2872. @@ -1581,11 +1582,11 @@ int32_t LSM6DSO_ACC_Disable_Pedometer(LSM6DSO_Object_t *pObj)
  2873. }
  2874. /**
  2875. - * @brief Get step count
  2876. - * @param pObj the device pObj
  2877. - * @param StepCount step counter
  2878. - * @retval 0 in case of success, an error code otherwise
  2879. - */
  2880. + * @brief Get step count
  2881. + * @param pObj the device pObj
  2882. + * @param StepCount step counter
  2883. + * @retval 0 in case of success, an error code otherwise
  2884. + */
  2885. int32_t LSM6DSO_ACC_Get_Step_Count(LSM6DSO_Object_t *pObj, uint16_t *StepCount)
  2886. {
  2887. if (lsm6dso_number_of_steps_get(&(pObj->Ctx), StepCount) != LSM6DSO_OK)
  2888. @@ -1597,10 +1598,10 @@ int32_t LSM6DSO_ACC_Get_Step_Count(LSM6DSO_Object_t *pObj, uint16_t *StepCount)
  2889. }
  2890. /**
  2891. - * @brief Enable step counter reset
  2892. - * @param pObj the device pObj
  2893. - * @retval 0 in case of success, an error code otherwise
  2894. - */
  2895. + * @brief Enable step counter reset
  2896. + * @param pObj the device pObj
  2897. + * @retval 0 in case of success, an error code otherwise
  2898. + */
  2899. int32_t LSM6DSO_ACC_Step_Counter_Reset(LSM6DSO_Object_t *pObj)
  2900. {
  2901. if (lsm6dso_steps_reset(&(pObj->Ctx)) != LSM6DSO_OK)
  2902. @@ -1612,11 +1613,11 @@ int32_t LSM6DSO_ACC_Step_Counter_Reset(LSM6DSO_Object_t *pObj)
  2903. }
  2904. /**
  2905. - * @brief Enable tilt detection
  2906. - * @param pObj the device pObj
  2907. - * @param IntPin interrupt pin line to be used
  2908. - * @retval 0 in case of success, an error code otherwise
  2909. - */
  2910. + * @brief Enable tilt detection
  2911. + * @param pObj the device pObj
  2912. + * @param IntPin interrupt pin line to be used
  2913. + * @retval 0 in case of success, an error code otherwise
  2914. + */
  2915. int32_t LSM6DSO_ACC_Enable_Tilt_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
  2916. {
  2917. int32_t ret = LSM6DSO_OK;
  2918. @@ -1700,10 +1701,10 @@ int32_t LSM6DSO_ACC_Enable_Tilt_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_Sensor
  2919. }
  2920. /**
  2921. - * @brief Disable tilt detection
  2922. - * @param pObj the device pObj
  2923. - * @retval 0 in case of success, an error code otherwise
  2924. - */
  2925. + * @brief Disable tilt detection
  2926. + * @param pObj the device pObj
  2927. + * @retval 0 in case of success, an error code otherwise
  2928. + */
  2929. int32_t LSM6DSO_ACC_Disable_Tilt_Detection(LSM6DSO_Object_t *pObj)
  2930. {
  2931. lsm6dso_pin_int1_route_t val1;
  2932. @@ -1753,11 +1754,11 @@ int32_t LSM6DSO_ACC_Disable_Tilt_Detection(LSM6DSO_Object_t *pObj)
  2933. }
  2934. /**
  2935. - * @brief Enable wake up detection
  2936. - * @param pObj the device pObj
  2937. - * @param IntPin interrupt pin line to be used
  2938. - * @retval 0 in case of success, an error code otherwise
  2939. - */
  2940. + * @brief Enable wake up detection
  2941. + * @param pObj the device pObj
  2942. + * @param IntPin interrupt pin line to be used
  2943. + * @retval 0 in case of success, an error code otherwise
  2944. + */
  2945. int32_t LSM6DSO_ACC_Enable_Wake_Up_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
  2946. {
  2947. int32_t ret = LSM6DSO_OK;
  2948. @@ -1828,10 +1829,10 @@ int32_t LSM6DSO_ACC_Enable_Wake_Up_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_Sen
  2949. }
  2950. /**
  2951. - * @brief Disable wake up detection
  2952. - * @param pObj the device pObj
  2953. - * @retval 0 in case of success, an error code otherwise
  2954. - */
  2955. + * @brief Disable wake up detection
  2956. + * @param pObj the device pObj
  2957. + * @retval 0 in case of success, an error code otherwise
  2958. + */
  2959. int32_t LSM6DSO_ACC_Disable_Wake_Up_Detection(LSM6DSO_Object_t *pObj)
  2960. {
  2961. lsm6dso_pin_int1_route_t val1;
  2962. @@ -1878,11 +1879,11 @@ int32_t LSM6DSO_ACC_Disable_Wake_Up_Detection(LSM6DSO_Object_t *pObj)
  2963. }
  2964. /**
  2965. - * @brief Set wake up threshold
  2966. - * @param pObj the device pObj
  2967. - * @param Threshold wake up detection threshold
  2968. - * @retval 0 in case of success, an error code otherwise
  2969. - */
  2970. + * @brief Set wake up threshold
  2971. + * @param pObj the device pObj
  2972. + * @param Threshold wake up detection threshold
  2973. + * @retval 0 in case of success, an error code otherwise
  2974. + */
  2975. int32_t LSM6DSO_ACC_Set_Wake_Up_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
  2976. {
  2977. /* Set wake up threshold. */
  2978. @@ -1895,11 +1896,11 @@ int32_t LSM6DSO_ACC_Set_Wake_Up_Threshold(LSM6DSO_Object_t *pObj, uint8_t Thresh
  2979. }
  2980. /**
  2981. - * @brief Set wake up duration
  2982. - * @param pObj the device pObj
  2983. - * @param Duration wake up detection duration
  2984. - * @retval 0 in case of success, an error code otherwise
  2985. - */
  2986. + * @brief Set wake up duration
  2987. + * @param pObj the device pObj
  2988. + * @param Duration wake up detection duration
  2989. + * @retval 0 in case of success, an error code otherwise
  2990. + */
  2991. int32_t LSM6DSO_ACC_Set_Wake_Up_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
  2992. {
  2993. /* Set wake up duration. */
  2994. @@ -1912,11 +1913,11 @@ int32_t LSM6DSO_ACC_Set_Wake_Up_Duration(LSM6DSO_Object_t *pObj, uint8_t Duratio
  2995. }
  2996. /**
  2997. - * @brief Enable single tap detection
  2998. - * @param pObj the device pObj
  2999. - * @param IntPin interrupt pin line to be used
  3000. - * @retval 0 in case of success, an error code otherwise
  3001. - */
  3002. + * @brief Enable single tap detection
  3003. + * @param pObj the device pObj
  3004. + * @param IntPin interrupt pin line to be used
  3005. + * @retval 0 in case of success, an error code otherwise
  3006. + */
  3007. int32_t LSM6DSO_ACC_Enable_Single_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
  3008. {
  3009. int32_t ret = LSM6DSO_OK;
  3010. @@ -2015,10 +2016,10 @@ int32_t LSM6DSO_ACC_Enable_Single_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_
  3011. }
  3012. /**
  3013. - * @brief Disable single tap detection
  3014. - * @param pObj the device pObj
  3015. - * @retval 0 in case of success, an error code otherwise
  3016. - */
  3017. + * @brief Disable single tap detection
  3018. + * @param pObj the device pObj
  3019. + * @retval 0 in case of success, an error code otherwise
  3020. + */
  3021. int32_t LSM6DSO_ACC_Disable_Single_Tap_Detection(LSM6DSO_Object_t *pObj)
  3022. {
  3023. lsm6dso_pin_int1_route_t val1;
  3024. @@ -2089,11 +2090,11 @@ int32_t LSM6DSO_ACC_Disable_Single_Tap_Detection(LSM6DSO_Object_t *pObj)
  3025. }
  3026. /**
  3027. - * @brief Enable double tap detection
  3028. - * @param pObj the device pObj
  3029. - * @param IntPin interrupt pin line to be used
  3030. - * @retval 0 in case of success, an error code otherwise
  3031. - */
  3032. + * @brief Enable double tap detection
  3033. + * @param pObj the device pObj
  3034. + * @param IntPin interrupt pin line to be used
  3035. + * @retval 0 in case of success, an error code otherwise
  3036. + */
  3037. int32_t LSM6DSO_ACC_Enable_Double_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
  3038. {
  3039. int32_t ret = LSM6DSO_OK;
  3040. @@ -2200,10 +2201,10 @@ int32_t LSM6DSO_ACC_Enable_Double_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_
  3041. }
  3042. /**
  3043. - * @brief Disable double tap detection
  3044. - * @param pObj the device pObj
  3045. - * @retval 0 in case of success, an error code otherwise
  3046. - */
  3047. + * @brief Disable double tap detection
  3048. + * @param pObj the device pObj
  3049. + * @retval 0 in case of success, an error code otherwise
  3050. + */
  3051. int32_t LSM6DSO_ACC_Disable_Double_Tap_Detection(LSM6DSO_Object_t *pObj)
  3052. {
  3053. lsm6dso_pin_int1_route_t val1;
  3054. @@ -2286,11 +2287,11 @@ int32_t LSM6DSO_ACC_Disable_Double_Tap_Detection(LSM6DSO_Object_t *pObj)
  3055. }
  3056. /**
  3057. - * @brief Set tap threshold
  3058. - * @param pObj the device pObj
  3059. - * @param Threshold tap threshold
  3060. - * @retval 0 in case of success, an error code otherwise
  3061. - */
  3062. + * @brief Set tap threshold
  3063. + * @param pObj the device pObj
  3064. + * @param Threshold tap threshold
  3065. + * @retval 0 in case of success, an error code otherwise
  3066. + */
  3067. int32_t LSM6DSO_ACC_Set_Tap_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
  3068. {
  3069. /* Set tap threshold. */
  3070. @@ -2303,11 +2304,11 @@ int32_t LSM6DSO_ACC_Set_Tap_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
  3071. }
  3072. /**
  3073. - * @brief Set tap shock time
  3074. - * @param pObj the device pObj
  3075. - * @param Time tap shock time
  3076. - * @retval 0 in case of success, an error code otherwise
  3077. - */
  3078. + * @brief Set tap shock time
  3079. + * @param pObj the device pObj
  3080. + * @param Time tap shock time
  3081. + * @retval 0 in case of success, an error code otherwise
  3082. + */
  3083. int32_t LSM6DSO_ACC_Set_Tap_Shock_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
  3084. {
  3085. /* Set tap shock time window. */
  3086. @@ -2320,11 +2321,11 @@ int32_t LSM6DSO_ACC_Set_Tap_Shock_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
  3087. }
  3088. /**
  3089. - * @brief Set tap quiet time
  3090. - * @param pObj the device pObj
  3091. - * @param Time tap quiet time
  3092. - * @retval 0 in case of success, an error code otherwise
  3093. - */
  3094. + * @brief Set tap quiet time
  3095. + * @param pObj the device pObj
  3096. + * @param Time tap quiet time
  3097. + * @retval 0 in case of success, an error code otherwise
  3098. + */
  3099. int32_t LSM6DSO_ACC_Set_Tap_Quiet_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
  3100. {
  3101. /* Set tap quiet time window. */
  3102. @@ -2337,11 +2338,11 @@ int32_t LSM6DSO_ACC_Set_Tap_Quiet_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
  3103. }
  3104. /**
  3105. - * @brief Set tap duration time
  3106. - * @param pObj the device pObj
  3107. - * @param Time tap duration time
  3108. - * @retval 0 in case of success, an error code otherwise
  3109. - */
  3110. + * @brief Set tap duration time
  3111. + * @param pObj the device pObj
  3112. + * @param Time tap duration time
  3113. + * @retval 0 in case of success, an error code otherwise
  3114. + */
  3115. int32_t LSM6DSO_ACC_Set_Tap_Duration_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
  3116. {
  3117. /* Set tap duration time window. */
  3118. @@ -2354,11 +2355,11 @@ int32_t LSM6DSO_ACC_Set_Tap_Duration_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
  3119. }
  3120. /**
  3121. - * @brief Enable 6D orientation detection
  3122. - * @param pObj the device pObj
  3123. - * @param IntPin interrupt pin line to be used
  3124. - * @retval 0 in case of success, an error code otherwise
  3125. - */
  3126. + * @brief Enable 6D orientation detection
  3127. + * @param pObj the device pObj
  3128. + * @param IntPin interrupt pin line to be used
  3129. + * @retval 0 in case of success, an error code otherwise
  3130. + */
  3131. int32_t LSM6DSO_ACC_Enable_6D_Orientation(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
  3132. {
  3133. int32_t ret = LSM6DSO_OK;
  3134. @@ -2423,10 +2424,10 @@ int32_t LSM6DSO_ACC_Enable_6D_Orientation(LSM6DSO_Object_t *pObj, LSM6DSO_Sensor
  3135. }
  3136. /**
  3137. - * @brief Disable 6D orientation detection
  3138. - * @param pObj the device pObj
  3139. - * @retval 0 in case of success, an error code otherwise
  3140. - */
  3141. + * @brief Disable 6D orientation detection
  3142. + * @param pObj the device pObj
  3143. + * @retval 0 in case of success, an error code otherwise
  3144. + */
  3145. int32_t LSM6DSO_ACC_Disable_6D_Orientation(LSM6DSO_Object_t *pObj)
  3146. {
  3147. lsm6dso_pin_int1_route_t val1;
  3148. @@ -2467,11 +2468,11 @@ int32_t LSM6DSO_ACC_Disable_6D_Orientation(LSM6DSO_Object_t *pObj)
  3149. }
  3150. /**
  3151. - * @brief Set 6D orientation threshold
  3152. - * @param pObj the device pObj
  3153. - * @param Threshold 6D Orientation detection threshold
  3154. - * @retval 0 in case of success, an error code otherwise
  3155. - */
  3156. + * @brief Set 6D orientation threshold
  3157. + * @param pObj the device pObj
  3158. + * @param Threshold 6D Orientation detection threshold
  3159. + * @retval 0 in case of success, an error code otherwise
  3160. + */
  3161. int32_t LSM6DSO_ACC_Set_6D_Orientation_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
  3162. {
  3163. int32_t ret = LSM6DSO_OK;
  3164. @@ -2496,11 +2497,11 @@ int32_t LSM6DSO_ACC_Set_6D_Orientation_Threshold(LSM6DSO_Object_t *pObj, uint8_t
  3165. break;
  3166. }
  3167. - if(ret == LSM6DSO_ERROR)
  3168. + if (ret == LSM6DSO_ERROR)
  3169. {
  3170. return LSM6DSO_ERROR;
  3171. }
  3172. -
  3173. +
  3174. if (lsm6dso_6d_threshold_set(&(pObj->Ctx), newThreshold) != LSM6DSO_OK)
  3175. {
  3176. return LSM6DSO_ERROR;
  3177. @@ -2510,11 +2511,11 @@ int32_t LSM6DSO_ACC_Set_6D_Orientation_Threshold(LSM6DSO_Object_t *pObj, uint8_t
  3178. }
  3179. /**
  3180. - * @brief Get the status of XLow orientation
  3181. - * @param pObj the device pObj
  3182. - * @param XLow the status of XLow orientation
  3183. - * @retval 0 in case of success, an error code otherwise
  3184. - */
  3185. + * @brief Get the status of XLow orientation
  3186. + * @param pObj the device pObj
  3187. + * @param XLow the status of XLow orientation
  3188. + * @retval 0 in case of success, an error code otherwise
  3189. + */
  3190. int32_t LSM6DSO_ACC_Get_6D_Orientation_XL(LSM6DSO_Object_t *pObj, uint8_t *XLow)
  3191. {
  3192. lsm6dso_d6d_src_t data;
  3193. @@ -2530,11 +2531,11 @@ int32_t LSM6DSO_ACC_Get_6D_Orientation_XL(LSM6DSO_Object_t *pObj, uint8_t *XLow)
  3194. }
  3195. /**
  3196. - * @brief Get the status of XHigh orientation
  3197. - * @param pObj the device pObj
  3198. - * @param XHigh the status of XHigh orientation
  3199. - * @retval 0 in case of success, an error code otherwise
  3200. - */
  3201. + * @brief Get the status of XHigh orientation
  3202. + * @param pObj the device pObj
  3203. + * @param XHigh the status of XHigh orientation
  3204. + * @retval 0 in case of success, an error code otherwise
  3205. + */
  3206. int32_t LSM6DSO_ACC_Get_6D_Orientation_XH(LSM6DSO_Object_t *pObj, uint8_t *XHigh)
  3207. {
  3208. lsm6dso_d6d_src_t data;
  3209. @@ -2550,11 +2551,11 @@ int32_t LSM6DSO_ACC_Get_6D_Orientation_XH(LSM6DSO_Object_t *pObj, uint8_t *XHigh
  3210. }
  3211. /**
  3212. - * @brief Get the status of YLow orientation
  3213. - * @param pObj the device pObj
  3214. - * @param YLow the status of YLow orientation
  3215. - * @retval 0 in case of success, an error code otherwise
  3216. - */
  3217. + * @brief Get the status of YLow orientation
  3218. + * @param pObj the device pObj
  3219. + * @param YLow the status of YLow orientation
  3220. + * @retval 0 in case of success, an error code otherwise
  3221. + */
  3222. int32_t LSM6DSO_ACC_Get_6D_Orientation_YL(LSM6DSO_Object_t *pObj, uint8_t *YLow)
  3223. {
  3224. lsm6dso_d6d_src_t data;
  3225. @@ -2570,11 +2571,11 @@ int32_t LSM6DSO_ACC_Get_6D_Orientation_YL(LSM6DSO_Object_t *pObj, uint8_t *YLow)
  3226. }
  3227. /**
  3228. - * @brief Get the status of YHigh orientation
  3229. - * @param pObj the device pObj
  3230. - * @param YHigh the status of YHigh orientation
  3231. - * @retval 0 in case of success, an error code otherwise
  3232. - */
  3233. + * @brief Get the status of YHigh orientation
  3234. + * @param pObj the device pObj
  3235. + * @param YHigh the status of YHigh orientation
  3236. + * @retval 0 in case of success, an error code otherwise
  3237. + */
  3238. int32_t LSM6DSO_ACC_Get_6D_Orientation_YH(LSM6DSO_Object_t *pObj, uint8_t *YHigh)
  3239. {
  3240. lsm6dso_d6d_src_t data;
  3241. @@ -2590,11 +2591,11 @@ int32_t LSM6DSO_ACC_Get_6D_Orientation_YH(LSM6DSO_Object_t *pObj, uint8_t *YHigh
  3242. }
  3243. /**
  3244. - * @brief Get the status of ZLow orientation
  3245. - * @param pObj the device pObj
  3246. - * @param ZLow the status of ZLow orientation
  3247. - * @retval 0 in case of success, an error code otherwise
  3248. - */
  3249. + * @brief Get the status of ZLow orientation
  3250. + * @param pObj the device pObj
  3251. + * @param ZLow the status of ZLow orientation
  3252. + * @retval 0 in case of success, an error code otherwise
  3253. + */
  3254. int32_t LSM6DSO_ACC_Get_6D_Orientation_ZL(LSM6DSO_Object_t *pObj, uint8_t *ZLow)
  3255. {
  3256. lsm6dso_d6d_src_t data;
  3257. @@ -2610,11 +2611,11 @@ int32_t LSM6DSO_ACC_Get_6D_Orientation_ZL(LSM6DSO_Object_t *pObj, uint8_t *ZLow)
  3258. }
  3259. /**
  3260. - * @brief Get the status of ZHigh orientation
  3261. - * @param pObj the device pObj
  3262. - * @param ZHigh the status of ZHigh orientation
  3263. - * @retval 0 in case of success, an error code otherwise
  3264. - */
  3265. + * @brief Get the status of ZHigh orientation
  3266. + * @param pObj the device pObj
  3267. + * @param ZHigh the status of ZHigh orientation
  3268. + * @retval 0 in case of success, an error code otherwise
  3269. + */
  3270. int32_t LSM6DSO_ACC_Get_6D_Orientation_ZH(LSM6DSO_Object_t *pObj, uint8_t *ZHigh)
  3271. {
  3272. lsm6dso_d6d_src_t data;
  3273. @@ -2630,11 +2631,11 @@ int32_t LSM6DSO_ACC_Get_6D_Orientation_ZH(LSM6DSO_Object_t *pObj, uint8_t *ZHigh
  3274. }
  3275. /**
  3276. - * @brief Get the LSM6DSO ACC data ready bit value
  3277. - * @param pObj the device pObj
  3278. - * @param Status the status of data ready bit
  3279. - * @retval 0 in case of success, an error code otherwise
  3280. - */
  3281. + * @brief Get the LSM6DSO ACC data ready bit value
  3282. + * @param pObj the device pObj
  3283. + * @param Status the status of data ready bit
  3284. + * @retval 0 in case of success, an error code otherwise
  3285. + */
  3286. int32_t LSM6DSO_ACC_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
  3287. {
  3288. if (lsm6dso_xl_flag_data_ready_get(&(pObj->Ctx), Status) != LSM6DSO_OK)
  3289. @@ -2646,11 +2647,11 @@ int32_t LSM6DSO_ACC_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
  3290. }
  3291. /**
  3292. - * @brief Get the status of all hardware events
  3293. - * @param pObj the device pObj
  3294. - * @param Status the status of all hardware events
  3295. - * @retval 0 in case of success, an error code otherwise
  3296. - */
  3297. + * @brief Get the status of all hardware events
  3298. + * @param pObj the device pObj
  3299. + * @param Status the status of all hardware events
  3300. + * @retval 0 in case of success, an error code otherwise
  3301. + */
  3302. int32_t LSM6DSO_ACC_Get_Event_Status(LSM6DSO_Object_t *pObj, LSM6DSO_Event_Status_t *Status)
  3303. {
  3304. uint8_t tilt_ia;
  3305. @@ -2780,11 +2781,11 @@ int32_t LSM6DSO_ACC_Get_Event_Status(LSM6DSO_Object_t *pObj, LSM6DSO_Event_Statu
  3306. }
  3307. /**
  3308. - * @brief Set self test
  3309. - * @param pObj the device pObj
  3310. - * @param val the value of st_xl in reg CTRL5_C
  3311. - * @retval 0 in case of success, an error code otherwise
  3312. - */
  3313. + * @brief Set self test
  3314. + * @param pObj the device pObj
  3315. + * @param val the value of st_xl in reg CTRL5_C
  3316. + * @retval 0 in case of success, an error code otherwise
  3317. + */
  3318. int32_t LSM6DSO_ACC_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t val)
  3319. {
  3320. lsm6dso_st_xl_t reg;
  3321. @@ -2803,11 +2804,11 @@ int32_t LSM6DSO_ACC_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t val)
  3322. }
  3323. /**
  3324. - * @brief Get the LSM6DSO GYRO data ready bit value
  3325. - * @param pObj the device pObj
  3326. - * @param Status the status of data ready bit
  3327. - * @retval 0 in case of success, an error code otherwise
  3328. - */
  3329. + * @brief Get the LSM6DSO GYRO data ready bit value
  3330. + * @param pObj the device pObj
  3331. + * @param Status the status of data ready bit
  3332. + * @retval 0 in case of success, an error code otherwise
  3333. + */
  3334. int32_t LSM6DSO_GYRO_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
  3335. {
  3336. if (lsm6dso_gy_flag_data_ready_get(&(pObj->Ctx), Status) != LSM6DSO_OK)
  3337. @@ -2819,11 +2820,11 @@ int32_t LSM6DSO_GYRO_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
  3338. }
  3339. /**
  3340. - * @brief Set self test
  3341. - * @param pObj the device pObj
  3342. - * @param val the value of st_xl in reg CTRL5_C
  3343. - * @retval 0 in case of success, an error code otherwise
  3344. - */
  3345. + * @brief Set self test
  3346. + * @param pObj the device pObj
  3347. + * @param val the value of st_xl in reg CTRL5_C
  3348. + * @retval 0 in case of success, an error code otherwise
  3349. + */
  3350. int32_t LSM6DSO_GYRO_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t val)
  3351. {
  3352. lsm6dso_st_g_t reg;
  3353. @@ -2843,11 +2844,11 @@ int32_t LSM6DSO_GYRO_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t val)
  3354. }
  3355. /**
  3356. - * @brief Get the LSM6DSO FIFO number of samples
  3357. - * @param pObj the device pObj
  3358. - * @param NumSamples number of samples
  3359. - * @retval 0 in case of success, an error code otherwise
  3360. - */
  3361. + * @brief Get the LSM6DSO FIFO number of samples
  3362. + * @param pObj the device pObj
  3363. + * @param NumSamples number of samples
  3364. + * @retval 0 in case of success, an error code otherwise
  3365. + */
  3366. int32_t LSM6DSO_FIFO_Get_Num_Samples(LSM6DSO_Object_t *pObj, uint16_t *NumSamples)
  3367. {
  3368. if (lsm6dso_fifo_data_level_get(&(pObj->Ctx), NumSamples) != LSM6DSO_OK)
  3369. @@ -2859,11 +2860,11 @@ int32_t LSM6DSO_FIFO_Get_Num_Samples(LSM6DSO_Object_t *pObj, uint16_t *NumSample
  3370. }
  3371. /**
  3372. - * @brief Get the LSM6DSO FIFO full status
  3373. - * @param pObj the device pObj
  3374. - * @param Status FIFO full status
  3375. - * @retval 0 in case of success, an error code otherwise
  3376. - */
  3377. + * @brief Get the LSM6DSO FIFO full status
  3378. + * @param pObj the device pObj
  3379. + * @param Status FIFO full status
  3380. + * @retval 0 in case of success, an error code otherwise
  3381. + */
  3382. int32_t LSM6DSO_FIFO_Get_Full_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
  3383. {
  3384. lsm6dso_reg_t reg;
  3385. @@ -2879,11 +2880,11 @@ int32_t LSM6DSO_FIFO_Get_Full_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
  3386. }
  3387. /**
  3388. - * @brief Set the LSM6DSO FIFO full interrupt on INT1 pin
  3389. - * @param pObj the device pObj
  3390. - * @param Status FIFO full interrupt on INT1 pin status
  3391. - * @retval 0 in case of success, an error code otherwise
  3392. - */
  3393. + * @brief Set the LSM6DSO FIFO full interrupt on INT1 pin
  3394. + * @param pObj the device pObj
  3395. + * @param Status FIFO full interrupt on INT1 pin status
  3396. + * @retval 0 in case of success, an error code otherwise
  3397. + */
  3398. int32_t LSM6DSO_FIFO_Set_INT1_FIFO_Full(LSM6DSO_Object_t *pObj, uint8_t Status)
  3399. {
  3400. lsm6dso_reg_t reg;
  3401. @@ -2904,11 +2905,11 @@ int32_t LSM6DSO_FIFO_Set_INT1_FIFO_Full(LSM6DSO_Object_t *pObj, uint8_t Status)
  3402. }
  3403. /**
  3404. - * @brief Set the LSM6DSO FIFO watermark level
  3405. - * @param pObj the device pObj
  3406. - * @param Watermark FIFO watermark level
  3407. - * @retval 0 in case of success, an error code otherwise
  3408. - */
  3409. + * @brief Set the LSM6DSO FIFO watermark level
  3410. + * @param pObj the device pObj
  3411. + * @param Watermark FIFO watermark level
  3412. + * @retval 0 in case of success, an error code otherwise
  3413. + */
  3414. int32_t LSM6DSO_FIFO_Set_Watermark_Level(LSM6DSO_Object_t *pObj, uint16_t Watermark)
  3415. {
  3416. if (lsm6dso_fifo_watermark_set(&(pObj->Ctx), Watermark) != LSM6DSO_OK)
  3417. @@ -2920,11 +2921,11 @@ int32_t LSM6DSO_FIFO_Set_Watermark_Level(LSM6DSO_Object_t *pObj, uint16_t Waterm
  3418. }
  3419. /**
  3420. - * @brief Set the LSM6DSO FIFO stop on watermark
  3421. - * @param pObj the device pObj
  3422. - * @param Status FIFO stop on watermark status
  3423. - * @retval 0 in case of success, an error code otherwise
  3424. - */
  3425. + * @brief Set the LSM6DSO FIFO stop on watermark
  3426. + * @param pObj the device pObj
  3427. + * @param Status FIFO stop on watermark status
  3428. + * @retval 0 in case of success, an error code otherwise
  3429. + */
  3430. int32_t LSM6DSO_FIFO_Set_Stop_On_Fth(LSM6DSO_Object_t *pObj, uint8_t Status)
  3431. {
  3432. if (lsm6dso_fifo_stop_on_wtm_set(&(pObj->Ctx), Status) != LSM6DSO_OK)
  3433. @@ -2936,11 +2937,11 @@ int32_t LSM6DSO_FIFO_Set_Stop_On_Fth(LSM6DSO_Object_t *pObj, uint8_t Status)
  3434. }
  3435. /**
  3436. - * @brief Set the LSM6DSO FIFO mode
  3437. - * @param pObj the device pObj
  3438. - * @param Mode FIFO mode
  3439. - * @retval 0 in case of success, an error code otherwise
  3440. - */
  3441. + * @brief Set the LSM6DSO FIFO mode
  3442. + * @param pObj the device pObj
  3443. + * @param Mode FIFO mode
  3444. + * @retval 0 in case of success, an error code otherwise
  3445. + */
  3446. int32_t LSM6DSO_FIFO_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode)
  3447. {
  3448. int32_t ret = LSM6DSO_OK;
  3449. @@ -2985,31 +2986,31 @@ int32_t LSM6DSO_FIFO_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode)
  3450. }
  3451. /**
  3452. - * @brief Get the LSM6DSO FIFO tag
  3453. - * @param pObj the device pObj
  3454. - * @param Tag FIFO tag
  3455. - * @retval 0 in case of success, an error code otherwise
  3456. - */
  3457. + * @brief Get the LSM6DSO FIFO tag
  3458. + * @param pObj the device pObj
  3459. + * @param Tag FIFO tag
  3460. + * @retval 0 in case of success, an error code otherwise
  3461. + */
  3462. int32_t LSM6DSO_FIFO_Get_Tag(LSM6DSO_Object_t *pObj, uint8_t *Tag)
  3463. {
  3464. lsm6dso_fifo_tag_t tag_local;
  3465. - if (lsm6dso_fifo_sensor_tag_get(&(pObj->Ctx), &tag_local) != LSM6DSO_OK)
  3466. + if (lsm6dso_fifo_sensor_tag_get(&(pObj->Ctx), &tag_local) != LSM6DSO_OK)
  3467. {
  3468. return LSM6DSO_ERROR;
  3469. }
  3470. - *Tag = (uint8_t)tag_local;
  3471. + *Tag = (uint8_t)tag_local;
  3472. return LSM6DSO_OK;
  3473. }
  3474. /**
  3475. - * @brief Get the LSM6DSO FIFO raw data
  3476. - * @param pObj the device pObj
  3477. - * @param Data FIFO raw data array [6]
  3478. - * @retval 0 in case of success, an error code otherwise
  3479. - */
  3480. + * @brief Get the LSM6DSO FIFO raw data
  3481. + * @param pObj the device pObj
  3482. + * @param Data FIFO raw data array [6]
  3483. + * @retval 0 in case of success, an error code otherwise
  3484. + */
  3485. int32_t LSM6DSO_FIFO_Get_Data(LSM6DSO_Object_t *pObj, uint8_t *Data)
  3486. {
  3487. if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_FIFO_DATA_OUT_X_L, Data, 6) != LSM6DSO_OK)
  3488. @@ -3021,11 +3022,11 @@ int32_t LSM6DSO_FIFO_Get_Data(LSM6DSO_Object_t *pObj, uint8_t *Data)
  3489. }
  3490. /**
  3491. - * @brief Get the LSM6DSO FIFO accelero single sample (16-bit data per 3 axes) and calculate acceleration [mg]
  3492. - * @param pObj the device pObj
  3493. - * @param Acceleration FIFO accelero axes [mg]
  3494. - * @retval 0 in case of success, an error code otherwise
  3495. - */
  3496. + * @brief Get the LSM6DSO FIFO accelero single sample (16-bit data per 3 axes) and calculate acceleration [mg]
  3497. + * @param pObj the device pObj
  3498. + * @param Acceleration FIFO accelero axes [mg]
  3499. + * @retval 0 in case of success, an error code otherwise
  3500. + */
  3501. int32_t LSM6DSO_FIFO_ACC_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration)
  3502. {
  3503. lsm6dso_axis3bit16_t data_raw;
  3504. @@ -3054,26 +3055,26 @@ int32_t LSM6DSO_FIFO_ACC_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Accele
  3505. }
  3506. /**
  3507. - * @brief Set the LSM6DSO FIFO accelero BDR value
  3508. - * @param pObj the device pObj
  3509. - * @param Bdr FIFO accelero BDR value
  3510. - * @retval 0 in case of success, an error code otherwise
  3511. - */
  3512. + * @brief Set the LSM6DSO FIFO accelero BDR value
  3513. + * @param pObj the device pObj
  3514. + * @param Bdr FIFO accelero BDR value
  3515. + * @retval 0 in case of success, an error code otherwise
  3516. + */
  3517. int32_t LSM6DSO_FIFO_ACC_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr)
  3518. {
  3519. lsm6dso_bdr_xl_t new_bdr;
  3520. new_bdr = (Bdr <= 0.0f) ? LSM6DSO_XL_NOT_BATCHED
  3521. - : (Bdr <= 12.5f) ? LSM6DSO_XL_BATCHED_AT_12Hz5
  3522. - : (Bdr <= 26.0f) ? LSM6DSO_XL_BATCHED_AT_26Hz
  3523. - : (Bdr <= 52.0f) ? LSM6DSO_XL_BATCHED_AT_52Hz
  3524. - : (Bdr <= 104.0f) ? LSM6DSO_XL_BATCHED_AT_104Hz
  3525. - : (Bdr <= 208.0f) ? LSM6DSO_XL_BATCHED_AT_208Hz
  3526. - : (Bdr <= 417.0f) ? LSM6DSO_XL_BATCHED_AT_417Hz
  3527. - : (Bdr <= 833.0f) ? LSM6DSO_XL_BATCHED_AT_833Hz
  3528. - : (Bdr <= 1667.0f) ? LSM6DSO_XL_BATCHED_AT_1667Hz
  3529. - : (Bdr <= 3333.0f) ? LSM6DSO_XL_BATCHED_AT_3333Hz
  3530. - : LSM6DSO_XL_BATCHED_AT_6667Hz;
  3531. + : (Bdr <= 12.5f) ? LSM6DSO_XL_BATCHED_AT_12Hz5
  3532. + : (Bdr <= 26.0f) ? LSM6DSO_XL_BATCHED_AT_26Hz
  3533. + : (Bdr <= 52.0f) ? LSM6DSO_XL_BATCHED_AT_52Hz
  3534. + : (Bdr <= 104.0f) ? LSM6DSO_XL_BATCHED_AT_104Hz
  3535. + : (Bdr <= 208.0f) ? LSM6DSO_XL_BATCHED_AT_208Hz
  3536. + : (Bdr <= 417.0f) ? LSM6DSO_XL_BATCHED_AT_417Hz
  3537. + : (Bdr <= 833.0f) ? LSM6DSO_XL_BATCHED_AT_833Hz
  3538. + : (Bdr <= 1667.0f) ? LSM6DSO_XL_BATCHED_AT_1667Hz
  3539. + : (Bdr <= 3333.0f) ? LSM6DSO_XL_BATCHED_AT_3333Hz
  3540. + : LSM6DSO_XL_BATCHED_AT_6667Hz;
  3541. if (lsm6dso_fifo_xl_batch_set(&(pObj->Ctx), new_bdr) != LSM6DSO_OK)
  3542. {
  3543. @@ -3084,11 +3085,11 @@ int32_t LSM6DSO_FIFO_ACC_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr)
  3544. }
  3545. /**
  3546. - * @brief Get the LSM6DSO FIFO gyro single sample (16-bit data per 3 axes) and calculate angular velocity [mDPS]
  3547. - * @param pObj the device pObj
  3548. - * @param AngularVelocity FIFO gyro axes [mDPS]
  3549. - * @retval 0 in case of success, an error code otherwise
  3550. - */
  3551. + * @brief Get the LSM6DSO FIFO gyro single sample (16-bit data per 3 axes) and calculate angular velocity [mDPS]
  3552. + * @param pObj the device pObj
  3553. + * @param AngularVelocity FIFO gyro axes [mDPS]
  3554. + * @retval 0 in case of success, an error code otherwise
  3555. + */
  3556. int32_t LSM6DSO_FIFO_GYRO_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularVelocity)
  3557. {
  3558. lsm6dso_axis3bit16_t data_raw;
  3559. @@ -3117,26 +3118,26 @@ int32_t LSM6DSO_FIFO_GYRO_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Angul
  3560. }
  3561. /**
  3562. - * @brief Set the LSM6DSO FIFO gyro BDR value
  3563. - * @param pObj the device pObj
  3564. - * @param Bdr FIFO gyro BDR value
  3565. - * @retval 0 in case of success, an error code otherwise
  3566. - */
  3567. + * @brief Set the LSM6DSO FIFO gyro BDR value
  3568. + * @param pObj the device pObj
  3569. + * @param Bdr FIFO gyro BDR value
  3570. + * @retval 0 in case of success, an error code otherwise
  3571. + */
  3572. int32_t LSM6DSO_FIFO_GYRO_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr)
  3573. {
  3574. lsm6dso_bdr_gy_t new_bdr;
  3575. new_bdr = (Bdr <= 0.0f) ? LSM6DSO_GY_NOT_BATCHED
  3576. - : (Bdr <= 12.5f) ? LSM6DSO_GY_BATCHED_AT_12Hz5
  3577. - : (Bdr <= 26.0f) ? LSM6DSO_GY_BATCHED_AT_26Hz
  3578. - : (Bdr <= 52.0f) ? LSM6DSO_GY_BATCHED_AT_52Hz
  3579. - : (Bdr <= 104.0f) ? LSM6DSO_GY_BATCHED_AT_104Hz
  3580. - : (Bdr <= 208.0f) ? LSM6DSO_GY_BATCHED_AT_208Hz
  3581. - : (Bdr <= 417.0f) ? LSM6DSO_GY_BATCHED_AT_417Hz
  3582. - : (Bdr <= 833.0f) ? LSM6DSO_GY_BATCHED_AT_833Hz
  3583. - : (Bdr <= 1667.0f) ? LSM6DSO_GY_BATCHED_AT_1667Hz
  3584. - : (Bdr <= 3333.0f) ? LSM6DSO_GY_BATCHED_AT_3333Hz
  3585. - : LSM6DSO_GY_BATCHED_AT_6667Hz;
  3586. + : (Bdr <= 12.5f) ? LSM6DSO_GY_BATCHED_AT_12Hz5
  3587. + : (Bdr <= 26.0f) ? LSM6DSO_GY_BATCHED_AT_26Hz
  3588. + : (Bdr <= 52.0f) ? LSM6DSO_GY_BATCHED_AT_52Hz
  3589. + : (Bdr <= 104.0f) ? LSM6DSO_GY_BATCHED_AT_104Hz
  3590. + : (Bdr <= 208.0f) ? LSM6DSO_GY_BATCHED_AT_208Hz
  3591. + : (Bdr <= 417.0f) ? LSM6DSO_GY_BATCHED_AT_417Hz
  3592. + : (Bdr <= 833.0f) ? LSM6DSO_GY_BATCHED_AT_833Hz
  3593. + : (Bdr <= 1667.0f) ? LSM6DSO_GY_BATCHED_AT_1667Hz
  3594. + : (Bdr <= 3333.0f) ? LSM6DSO_GY_BATCHED_AT_3333Hz
  3595. + : LSM6DSO_GY_BATCHED_AT_6667Hz;
  3596. if (lsm6dso_fifo_gy_batch_set(&(pObj->Ctx), new_bdr) != LSM6DSO_OK)
  3597. {
  3598. @@ -3147,10 +3148,10 @@ int32_t LSM6DSO_FIFO_GYRO_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr)
  3599. }
  3600. /**
  3601. - * @brief Enable LSM6DSO accelerometer DRDY interrupt on INT1
  3602. - * @param pObj the device pObj
  3603. - * @retval 0 in case of success, an error code otherwise
  3604. - */
  3605. + * @brief Enable LSM6DSO accelerometer DRDY interrupt on INT1
  3606. + * @param pObj the device pObj
  3607. + * @retval 0 in case of success, an error code otherwise
  3608. + */
  3609. int32_t LSM6DSO_ACC_Enable_DRDY_On_INT1(LSM6DSO_Object_t *pObj)
  3610. {
  3611. lsm6dso_pin_int1_route_t pin_int1_route;
  3612. @@ -3171,10 +3172,10 @@ int32_t LSM6DSO_ACC_Enable_DRDY_On_INT1(LSM6DSO_Object_t *pObj)
  3613. }
  3614. /**
  3615. - * @brief Disable LSM6DSO accelerometer DRDY interrupt on INT1
  3616. - * @param pObj the device pObj
  3617. - * @retval 0 in case of success, an error code otherwise
  3618. - */
  3619. + * @brief Disable LSM6DSO accelerometer DRDY interrupt on INT1
  3620. + * @param pObj the device pObj
  3621. + * @retval 0 in case of success, an error code otherwise
  3622. + */
  3623. int32_t LSM6DSO_ACC_Disable_DRDY_On_INT1(LSM6DSO_Object_t *pObj)
  3624. {
  3625. lsm6dso_pin_int1_route_t pin_int1_route;
  3626. @@ -3194,11 +3195,11 @@ int32_t LSM6DSO_ACC_Disable_DRDY_On_INT1(LSM6DSO_Object_t *pObj)
  3627. }
  3628. /**
  3629. - * @brief Set the LSM6DSO accelerometer power mode
  3630. - * @param pObj the device pObj
  3631. - * @param PowerMode Value of the powerMode
  3632. - * @retval 0 in case of success, an error code otherwise
  3633. - */
  3634. + * @brief Set the LSM6DSO accelerometer power mode
  3635. + * @param pObj the device pObj
  3636. + * @param PowerMode Value of the powerMode
  3637. + * @retval 0 in case of success, an error code otherwise
  3638. + */
  3639. int32_t LSM6DSO_ACC_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode)
  3640. {
  3641. int32_t ret = LSM6DSO_OK;
  3642. @@ -3234,12 +3235,12 @@ int32_t LSM6DSO_ACC_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode)
  3643. }
  3644. /**
  3645. - * @brief Set the LSM6DSO accelerometer filter mode
  3646. - * @param pObj the device pObj
  3647. - * @param LowHighPassFlag 0/1 for setting low-pass/high-pass filter mode
  3648. - * @param FilterMode Value of the filter Mode
  3649. - * @retval 0 in case of success, an error code otherwise
  3650. - */
  3651. + * @brief Set the LSM6DSO accelerometer filter mode
  3652. + * @param pObj the device pObj
  3653. + * @param LowHighPassFlag 0/1 for setting low-pass/high-pass filter mode
  3654. + * @param FilterMode Value of the filter Mode
  3655. + * @retval 0 in case of success, an error code otherwise
  3656. + */
  3657. int32_t LSM6DSO_ACC_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode)
  3658. {
  3659. int32_t ret = LSM6DSO_OK;
  3660. @@ -3352,13 +3353,14 @@ int32_t LSM6DSO_ACC_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassF
  3661. }
  3662. /**
  3663. - * @brief Enable LSM6DSO accelerometer inactivity detection
  3664. - * @param pObj the device pObj
  3665. - * @param InactMode inactivity detection mode
  3666. - * @param IntPin interrupt pin line to be used
  3667. - * @retval 0 in case of success, an error code otherwise
  3668. - */
  3669. -int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_inact_en_t InactMode, LSM6DSO_SensorIntPin_t IntPin)
  3670. + * @brief Enable LSM6DSO accelerometer inactivity detection
  3671. + * @param pObj the device pObj
  3672. + * @param InactMode inactivity detection mode
  3673. + * @param IntPin interrupt pin line to be used
  3674. + * @retval 0 in case of success, an error code otherwise
  3675. + */
  3676. +int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_inact_en_t InactMode,
  3677. + LSM6DSO_SensorIntPin_t IntPin)
  3678. {
  3679. lsm6dso_pin_int1_route_t val1;
  3680. lsm6dso_pin_int2_route_t val2;
  3681. @@ -3381,7 +3383,7 @@ int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_
  3682. }
  3683. /* Enable inactivity detection. */
  3684. - switch(InactMode)
  3685. + switch (InactMode)
  3686. {
  3687. case LSM6DSO_XL_AND_GY_NOT_AFFECTED:
  3688. {
  3689. @@ -3419,7 +3421,7 @@ int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_
  3690. ret = LSM6DSO_ERROR;
  3691. break;
  3692. }
  3693. -
  3694. +
  3695. if (ret == LSM6DSO_ERROR)
  3696. {
  3697. return LSM6DSO_ERROR;
  3698. @@ -3465,10 +3467,10 @@ int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_
  3699. }
  3700. /**
  3701. - * @brief Disable LSM6DSO accelerometer inactivity detection
  3702. - * @param pObj the device pObj
  3703. - * @retval 0 in case of success, an error code otherwise
  3704. - */
  3705. + * @brief Disable LSM6DSO accelerometer inactivity detection
  3706. + * @param pObj the device pObj
  3707. + * @retval 0 in case of success, an error code otherwise
  3708. + */
  3709. int32_t LSM6DSO_ACC_Disable_Inactivity_Detection(LSM6DSO_Object_t *pObj)
  3710. {
  3711. lsm6dso_pin_int1_route_t val1;
  3712. @@ -3514,11 +3516,11 @@ int32_t LSM6DSO_ACC_Disable_Inactivity_Detection(LSM6DSO_Object_t *pObj)
  3713. }
  3714. /**
  3715. - * @brief Set LSM6DSO accelerometer sleep duration
  3716. - * @param pObj the device pObj
  3717. - * @param Duration wake up detection duration
  3718. - * @retval 0 in case of success, an error code otherwise
  3719. - */
  3720. + * @brief Set LSM6DSO accelerometer sleep duration
  3721. + * @param pObj the device pObj
  3722. + * @param Duration wake up detection duration
  3723. + * @retval 0 in case of success, an error code otherwise
  3724. + */
  3725. int32_t LSM6DSO_ACC_Set_Sleep_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
  3726. {
  3727. /* Set wake up duration. */
  3728. @@ -3531,10 +3533,10 @@ int32_t LSM6DSO_ACC_Set_Sleep_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
  3729. }
  3730. /**
  3731. - * @brief Enable LSM6DSO gyroscope DRDY interrupt on INT2
  3732. - * @param pObj the device pObj
  3733. - * @retval 0 in case of success, an error code otherwise
  3734. - */
  3735. + * @brief Enable LSM6DSO gyroscope DRDY interrupt on INT2
  3736. + * @param pObj the device pObj
  3737. + * @retval 0 in case of success, an error code otherwise
  3738. + */
  3739. int32_t LSM6DSO_GYRO_Enable_DRDY_On_INT2(LSM6DSO_Object_t *pObj)
  3740. {
  3741. lsm6dso_pin_int2_route_t pin_int2_route;
  3742. @@ -3555,11 +3557,11 @@ int32_t LSM6DSO_GYRO_Enable_DRDY_On_INT2(LSM6DSO_Object_t *pObj)
  3743. }
  3744. /**
  3745. - * @brief Set the LSM6DSO gyroscope power mode
  3746. - * @param pObj the device pObj
  3747. - * @param PowerMode Value of the powerMode
  3748. - * @retval 0 in case of success, an error code otherwise
  3749. - */
  3750. + * @brief Set the LSM6DSO gyroscope power mode
  3751. + * @param pObj the device pObj
  3752. + * @param PowerMode Value of the powerMode
  3753. + * @retval 0 in case of success, an error code otherwise
  3754. + */
  3755. int32_t LSM6DSO_GYRO_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode)
  3756. {
  3757. int32_t ret = LSM6DSO_OK;
  3758. @@ -3592,12 +3594,12 @@ int32_t LSM6DSO_GYRO_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode)
  3759. }
  3760. /**
  3761. - * @brief Set the LSM6DSO gyroscope filter mode
  3762. - * @param pObj the device pObj
  3763. - * @param LowHighPassFlag 0/1 for setting low-pass/high-pass filter mode
  3764. - * @param FilterMode Value of the filter Mode
  3765. - * @retval 0 in case of success, an error code otherwise
  3766. - */
  3767. + * @brief Set the LSM6DSO gyroscope filter mode
  3768. + * @param pObj the device pObj
  3769. + * @param LowHighPassFlag 0/1 for setting low-pass/high-pass filter mode
  3770. + * @param FilterMode Value of the filter Mode
  3771. + * @retval 0 in case of success, an error code otherwise
  3772. + */
  3773. int32_t LSM6DSO_GYRO_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode)
  3774. {
  3775. int32_t ret = LSM6DSO_OK;
  3776. @@ -3694,11 +3696,11 @@ int32_t LSM6DSO_GYRO_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPass
  3777. }
  3778. /**
  3779. - * @brief Set LSM6DSO DRDY mode
  3780. - * @param pObj the device pObj
  3781. - * @param Mode DRDY mode
  3782. - * @retval 0 in case of success, an error code otherwise
  3783. - */
  3784. + * @brief Set LSM6DSO DRDY mode
  3785. + * @param pObj the device pObj
  3786. + * @param Mode DRDY mode
  3787. + * @retval 0 in case of success, an error code otherwise
  3788. + */
  3789. int32_t LSM6DSO_DRDY_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode)
  3790. {
  3791. int32_t ret = LSM6DSO_OK;
  3792. @@ -3732,34 +3734,34 @@ int32_t LSM6DSO_DRDY_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode)
  3793. }
  3794. /**
  3795. - * @}
  3796. - */
  3797. + * @}
  3798. + */
  3799. /** @defgroup LSM6DSO_Private_Functions LSM6DSO Private Functions
  3800. - * @{
  3801. - */
  3802. + * @{
  3803. + */
  3804. /**
  3805. - * @brief Set the LSM6DSO accelerometer sensor output data rate when enabled
  3806. - * @param pObj the device pObj
  3807. - * @param Odr the functional output data rate to be set
  3808. - * @retval 0 in case of success, an error code otherwise
  3809. - */
  3810. + * @brief Set the LSM6DSO accelerometer sensor output data rate when enabled
  3811. + * @param pObj the device pObj
  3812. + * @param Odr the functional output data rate to be set
  3813. + * @retval 0 in case of success, an error code otherwise
  3814. + */
  3815. static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr)
  3816. {
  3817. lsm6dso_odr_xl_t new_odr;
  3818. new_odr = (Odr <= 1.6f) ? LSM6DSO_XL_ODR_1Hz6
  3819. - : (Odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
  3820. - : (Odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
  3821. - : (Odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
  3822. - : (Odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
  3823. - : (Odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
  3824. - : (Odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
  3825. - : (Odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
  3826. - : (Odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
  3827. - : (Odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
  3828. - : LSM6DSO_XL_ODR_6667Hz;
  3829. + : (Odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
  3830. + : (Odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
  3831. + : (Odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
  3832. + : (Odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
  3833. + : (Odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
  3834. + : (Odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
  3835. + : (Odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
  3836. + : (Odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
  3837. + : (Odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
  3838. + : LSM6DSO_XL_ODR_6667Hz;
  3839. /* Output data rate selection. */
  3840. if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), new_odr) != LSM6DSO_OK)
  3841. @@ -3771,48 +3773,48 @@ static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj
  3842. }
  3843. /**
  3844. - * @brief Set the LSM6DSO accelerometer sensor output data rate when disabled
  3845. - * @param pObj the device pObj
  3846. - * @param Odr the functional output data rate to be set
  3847. - * @retval 0 in case of success, an error code otherwise
  3848. - */
  3849. + * @brief Set the LSM6DSO accelerometer sensor output data rate when disabled
  3850. + * @param pObj the device pObj
  3851. + * @param Odr the functional output data rate to be set
  3852. + * @retval 0 in case of success, an error code otherwise
  3853. + */
  3854. static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr)
  3855. {
  3856. pObj->acc_odr = (Odr <= 1.6f) ? LSM6DSO_XL_ODR_1Hz6
  3857. - : (Odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
  3858. - : (Odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
  3859. - : (Odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
  3860. - : (Odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
  3861. - : (Odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
  3862. - : (Odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
  3863. - : (Odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
  3864. - : (Odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
  3865. - : (Odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
  3866. - : LSM6DSO_XL_ODR_6667Hz;
  3867. + : (Odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
  3868. + : (Odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
  3869. + : (Odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
  3870. + : (Odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
  3871. + : (Odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
  3872. + : (Odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
  3873. + : (Odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
  3874. + : (Odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
  3875. + : (Odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
  3876. + : LSM6DSO_XL_ODR_6667Hz;
  3877. return LSM6DSO_OK;
  3878. }
  3879. /**
  3880. - * @brief Set the LSM6DSO gyroscope sensor output data rate when enabled
  3881. - * @param pObj the device pObj
  3882. - * @param Odr the functional output data rate to be set
  3883. - * @retval 0 in case of success, an error code otherwise
  3884. - */
  3885. + * @brief Set the LSM6DSO gyroscope sensor output data rate when enabled
  3886. + * @param pObj the device pObj
  3887. + * @param Odr the functional output data rate to be set
  3888. + * @retval 0 in case of success, an error code otherwise
  3889. + */
  3890. static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr)
  3891. {
  3892. lsm6dso_odr_g_t new_odr;
  3893. new_odr = (Odr <= 12.5f) ? LSM6DSO_GY_ODR_12Hz5
  3894. - : (Odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
  3895. - : (Odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
  3896. - : (Odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
  3897. - : (Odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
  3898. - : (Odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
  3899. - : (Odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
  3900. - : (Odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
  3901. - : (Odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
  3902. - : LSM6DSO_GY_ODR_6667Hz;
  3903. + : (Odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
  3904. + : (Odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
  3905. + : (Odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
  3906. + : (Odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
  3907. + : (Odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
  3908. + : (Odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
  3909. + : (Odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
  3910. + : (Odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
  3911. + : LSM6DSO_GY_ODR_6667Hz;
  3912. /* Output data rate selection. */
  3913. if (lsm6dso_gy_data_rate_set(&(pObj->Ctx), new_odr) != LSM6DSO_OK)
  3914. @@ -3824,50 +3826,50 @@ static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pOb
  3915. }
  3916. /**
  3917. - * @brief Set the LSM6DSO gyroscope sensor output data rate when disabled
  3918. - * @param pObj the device pObj
  3919. - * @param Odr the functional output data rate to be set
  3920. - * @retval 0 in case of success, an error code otherwise
  3921. - */
  3922. + * @brief Set the LSM6DSO gyroscope sensor output data rate when disabled
  3923. + * @param pObj the device pObj
  3924. + * @param Odr the functional output data rate to be set
  3925. + * @retval 0 in case of success, an error code otherwise
  3926. + */
  3927. static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr)
  3928. {
  3929. pObj->gyro_odr = (Odr <= 12.5f) ? LSM6DSO_GY_ODR_12Hz5
  3930. - : (Odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
  3931. - : (Odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
  3932. - : (Odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
  3933. - : (Odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
  3934. - : (Odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
  3935. - : (Odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
  3936. - : (Odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
  3937. - : (Odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
  3938. - : LSM6DSO_GY_ODR_6667Hz;
  3939. + : (Odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
  3940. + : (Odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
  3941. + : (Odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
  3942. + : (Odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
  3943. + : (Odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
  3944. + : (Odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
  3945. + : (Odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
  3946. + : (Odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
  3947. + : LSM6DSO_GY_ODR_6667Hz;
  3948. return LSM6DSO_OK;
  3949. }
  3950. /**
  3951. - * @brief This function provides a minimum delay based on Tick counter
  3952. - * @param pObj the device pObj
  3953. - * @param msDelay delay expressed in ms
  3954. - * @retval None
  3955. - */
  3956. + * @brief This function provides a minimum delay based on Tick counter
  3957. + * @param pObj the device pObj
  3958. + * @param msDelay delay expressed in ms
  3959. + * @retval None
  3960. + */
  3961. static void LSM6DSO_Delay(LSM6DSO_Object_t *pObj, uint32_t msDelay)
  3962. {
  3963. uint32_t tickstart = pObj->IO.GetTick();
  3964. - while((pObj->IO.GetTick() - tickstart) < msDelay)
  3965. + while ((pObj->IO.GetTick() - tickstart) < msDelay)
  3966. {
  3967. }
  3968. }
  3969. /**
  3970. - * @brief Wrap Read register component function to Bus IO function
  3971. - * @param Handle the device handler
  3972. - * @param Reg the register address
  3973. - * @param pData the stored data pointer
  3974. - * @param Length the length
  3975. - * @retval 0 in case of success, an error code otherwise
  3976. - */
  3977. + * @brief Wrap Read register component function to Bus IO function
  3978. + * @param Handle the device handler
  3979. + * @param Reg the register address
  3980. + * @param pData the stored data pointer
  3981. + * @param Length the length
  3982. + * @retval 0 in case of success, an error code otherwise
  3983. + */
  3984. static int32_t ReadRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length)
  3985. {
  3986. LSM6DSO_Object_t *pObj = (LSM6DSO_Object_t *)Handle;
  3987. @@ -3876,13 +3878,13 @@ static int32_t ReadRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t L
  3988. }
  3989. /**
  3990. - * @brief Wrap Write register component function to Bus IO function
  3991. - * @param Handle the device handler
  3992. - * @param Reg the register address
  3993. - * @param pData the stored data pointer
  3994. - * @param Length the length
  3995. - * @retval 0 in case of success, an error code otherwise
  3996. - */
  3997. + * @brief Wrap Write register component function to Bus IO function
  3998. + * @param Handle the device handler
  3999. + * @param Reg the register address
  4000. + * @param pData the stored data pointer
  4001. + * @param Length the length
  4002. + * @retval 0 in case of success, an error code otherwise
  4003. + */
  4004. static int32_t WriteRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length)
  4005. {
  4006. LSM6DSO_Object_t *pObj = (LSM6DSO_Object_t *)Handle;
  4007. @@ -3905,5 +3907,3 @@ static int32_t WriteRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t
  4008. /**
  4009. * @}
  4010. */
  4011. -
  4012. -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  4013. diff --git a/lsm6dso.h b/lsm6dso.h
  4014. index 420265701..1843df0ac 100644
  4015. --- a/lsm6dso.h
  4016. +++ b/lsm6dso.h
  4017. @@ -1,21 +1,20 @@
  4018. /**
  4019. - ******************************************************************************
  4020. - * @file lsm6dso.h
  4021. - * @author MEMS Software Solutions Team
  4022. - * @brief LSM6DSO header driver file
  4023. - ******************************************************************************
  4024. - * @attention
  4025. - *
  4026. - * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  4027. - * All rights reserved.</center></h2>
  4028. - *
  4029. - * This software component is licensed by ST under BSD 3-Clause license,
  4030. - * the "License"; You may not use this file except in compliance with the
  4031. - * License. You may obtain a copy of the License at:
  4032. - * opensource.org/licenses/BSD-3-Clause
  4033. - *
  4034. - ******************************************************************************
  4035. - */
  4036. + ******************************************************************************
  4037. + * @file lsm6dso.h
  4038. + * @author MEMS Software Solutions Team
  4039. + * @brief LSM6DSO header driver file
  4040. + ******************************************************************************
  4041. + * @attention
  4042. + *
  4043. + * Copyright (c) 2019 STMicroelectronics.
  4044. + * All rights reserved.
  4045. + *
  4046. + * This software is licensed under terms that can be found in the LICENSE file
  4047. + * in the root directory of this software component.
  4048. + * If no LICENSE file comes with this software, it is provided AS-IS.
  4049. + *
  4050. + ******************************************************************************
  4051. + */
  4052. /* Define to prevent recursive inclusion -------------------------------------*/
  4053. #ifndef LSM6DSO_H
  4054. @@ -31,24 +30,25 @@ extern "C"
  4055. #include <string.h>
  4056. /** @addtogroup BSP BSP
  4057. - * @{
  4058. - */
  4059. + * @{
  4060. + */
  4061. /** @addtogroup Component Component
  4062. - * @{
  4063. - */
  4064. + * @{
  4065. + */
  4066. /** @addtogroup LSM6DSO LSM6DSO
  4067. - * @{
  4068. - */
  4069. + * @{
  4070. + */
  4071. /** @defgroup LSM6DSO_Exported_Types LSM6DSO Exported Types
  4072. - * @{
  4073. - */
  4074. + * @{
  4075. + */
  4076. typedef int32_t (*LSM6DSO_Init_Func)(void);
  4077. typedef int32_t (*LSM6DSO_DeInit_Func)(void);
  4078. typedef int32_t (*LSM6DSO_GetTick_Func)(void);
  4079. +typedef void (*LSM6DSO_Delay_Func)(uint32_t);
  4080. typedef int32_t (*LSM6DSO_WriteReg_Func)(uint16_t, uint16_t, uint8_t *, uint16_t);
  4081. typedef int32_t (*LSM6DSO_ReadReg_Func)(uint16_t, uint16_t, uint8_t *, uint16_t);
  4082. @@ -80,6 +80,7 @@ typedef struct
  4083. LSM6DSO_WriteReg_Func WriteReg;
  4084. LSM6DSO_ReadReg_Func ReadReg;
  4085. LSM6DSO_GetTick_Func GetTick;
  4086. + LSM6DSO_Delay_Func Delay;
  4087. } LSM6DSO_IO_t;
  4088. @@ -168,33 +169,37 @@ typedef struct
  4089. int32_t (*GetAxesRaw)(LSM6DSO_Object_t *, LSM6DSO_AxesRaw_t *);
  4090. } LSM6DSO_GYRO_Drv_t;
  4091. -typedef union{
  4092. +typedef union
  4093. +{
  4094. int16_t i16bit[3];
  4095. uint8_t u8bit[6];
  4096. } lsm6dso_axis3bit16_t;
  4097. -typedef union{
  4098. +typedef union
  4099. +{
  4100. int16_t i16bit;
  4101. uint8_t u8bit[2];
  4102. } lsm6dso_axis1bit16_t;
  4103. -typedef union{
  4104. +typedef union
  4105. +{
  4106. int32_t i32bit[3];
  4107. uint8_t u8bit[12];
  4108. } lsm6dso_axis3bit32_t;
  4109. -typedef union{
  4110. +typedef union
  4111. +{
  4112. int32_t i32bit;
  4113. uint8_t u8bit[4];
  4114. } lsm6dso_axis1bit32_t;
  4115. /**
  4116. - * @}
  4117. - */
  4118. + * @}
  4119. + */
  4120. /** @defgroup LSM6DSO_Exported_Constants LSM6DSO Exported Constants
  4121. - * @{
  4122. - */
  4123. + * @{
  4124. + */
  4125. #define LSM6DSO_OK 0
  4126. #define LSM6DSO_ERROR -1
  4127. @@ -215,12 +220,12 @@ typedef union{
  4128. #define LSM6DSO_GYRO_SENSITIVITY_FS_2000DPS 70.000f
  4129. /**
  4130. - * @}
  4131. - */
  4132. + * @}
  4133. + */
  4134. /** @addtogroup LSM6DSO_Exported_Functions LSM6DSO Exported Functions
  4135. - * @{
  4136. - */
  4137. + * @{
  4138. + */
  4139. int32_t LSM6DSO_RegisterBusIO(LSM6DSO_Object_t *pObj, LSM6DSO_IO_t *pIO);
  4140. int32_t LSM6DSO_Init(LSM6DSO_Object_t *pObj);
  4141. @@ -244,7 +249,8 @@ int32_t LSM6DSO_GYRO_Disable(LSM6DSO_Object_t *pObj);
  4142. int32_t LSM6DSO_GYRO_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity);
  4143. int32_t LSM6DSO_GYRO_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr);
  4144. int32_t LSM6DSO_GYRO_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr);
  4145. -int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr, LSM6DSO_GYRO_Operating_Mode_t Mode);
  4146. +int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr,
  4147. + LSM6DSO_GYRO_Operating_Mode_t Mode);
  4148. int32_t LSM6DSO_GYRO_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale);
  4149. int32_t LSM6DSO_GYRO_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale);
  4150. int32_t LSM6DSO_GYRO_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value);
  4151. @@ -317,7 +323,8 @@ int32_t LSM6DSO_ACC_Enable_DRDY_On_INT1(LSM6DSO_Object_t *pObj);
  4152. int32_t LSM6DSO_ACC_Disable_DRDY_On_INT1(LSM6DSO_Object_t *pObj);
  4153. int32_t LSM6DSO_ACC_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode);
  4154. int32_t LSM6DSO_ACC_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode);
  4155. -int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_inact_en_t InactMode, LSM6DSO_SensorIntPin_t IntPin);
  4156. +int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_inact_en_t InactMode,
  4157. + LSM6DSO_SensorIntPin_t IntPin);
  4158. int32_t LSM6DSO_ACC_Disable_Inactivity_Detection(LSM6DSO_Object_t *pObj);
  4159. int32_t LSM6DSO_ACC_Set_Sleep_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration);
  4160. @@ -328,20 +335,20 @@ int32_t LSM6DSO_GYRO_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPass
  4161. int32_t LSM6DSO_DRDY_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode);
  4162. /**
  4163. - * @}
  4164. - */
  4165. + * @}
  4166. + */
  4167. /** @addtogroup LSM6DSO_Exported_Variables LSM6DSO Exported Variables
  4168. - * @{
  4169. - */
  4170. + * @{
  4171. + */
  4172. extern LSM6DSO_CommonDrv_t LSM6DSO_COMMON_Driver;
  4173. extern LSM6DSO_ACC_Drv_t LSM6DSO_ACC_Driver;
  4174. extern LSM6DSO_GYRO_Drv_t LSM6DSO_GYRO_Driver;
  4175. /**
  4176. - * @}
  4177. - */
  4178. + * @}
  4179. + */
  4180. #ifdef __cplusplus
  4181. }
  4182. @@ -350,15 +357,13 @@ extern LSM6DSO_GYRO_Drv_t LSM6DSO_GYRO_Driver;
  4183. #endif
  4184. /**
  4185. - * @}
  4186. - */
  4187. + * @}
  4188. + */
  4189. /**
  4190. - * @}
  4191. - */
  4192. + * @}
  4193. + */
  4194. /**
  4195. - * @}
  4196. - */
  4197. -
  4198. -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  4199. + * @}
  4200. + */
  4201. diff --git a/lsm6dso_reg.c b/lsm6dso_reg.c
  4202. index b045cc260..9eb6542ee 100644
  4203. --- a/lsm6dso_reg.c
  4204. +++ b/lsm6dso_reg.c
  4205. @@ -1,21 +1,20 @@
  4206. -/*
  4207. - ******************************************************************************
  4208. - * @file lsm6dso_reg.c
  4209. - * @author Sensors Software Solution Team
  4210. - * @brief LSM6DSO driver file
  4211. - ******************************************************************************
  4212. - * @attention
  4213. - *
  4214. - * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  4215. - * All rights reserved.</center></h2>
  4216. - *
  4217. - * This software component is licensed by ST under BSD 3-Clause license,
  4218. - * the "License"; You may not use this file except in compliance with the
  4219. - * License. You may obtain a copy of the License at:
  4220. - * opensource.org/licenses/BSD-3-Clause
  4221. - *
  4222. - ******************************************************************************
  4223. - */
  4224. +/**
  4225. + ******************************************************************************
  4226. + * @file lsm6dso_reg.c
  4227. + * @author Sensors Software Solution Team
  4228. + * @brief LSM6DSO driver file
  4229. + ******************************************************************************
  4230. + * @attention
  4231. + *
  4232. + * Copyright (c) 2019 STMicroelectronics.
  4233. + * All rights reserved.
  4234. + *
  4235. + * This software is licensed under terms that can be found in the LICENSE file
  4236. + * in the root directory of this software component.
  4237. + * If no LICENSE file comes with this software, it is provided AS-IS.
  4238. + *
  4239. + ******************************************************************************
  4240. + */
  4241. #include "lsm6dso_reg.h"
  4242. #include <stddef.h>
  4243. @@ -26,7 +25,7 @@
  4244. * lsm6dso enhanced inertial module.
  4245. * @{
  4246. *
  4247. -*/
  4248. + */
  4249. /**
  4250. * @defgroup LSM6DSO_Interfaces_Functions
  4251. @@ -35,7 +34,7 @@
  4252. * MANDATORY: return 0 -> no Error.
  4253. * @{
  4254. *
  4255. -*/
  4256. + */
  4257. /**
  4258. * @brief Read generic device register
  4259. @@ -47,12 +46,14 @@
  4260. * @retval interface status (MANDATORY: return 0 -> no Error)
  4261. *
  4262. */
  4263. -int32_t lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
  4264. - uint8_t *data,
  4265. - uint16_t len)
  4266. +int32_t __weak lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
  4267. + uint8_t *data,
  4268. + uint16_t len)
  4269. {
  4270. int32_t ret;
  4271. +
  4272. ret = ctx->read_reg(ctx->handle, reg, data, len);
  4273. +
  4274. return ret;
  4275. }
  4276. @@ -66,19 +67,21 @@ int32_t lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
  4277. * @retval interface status (MANDATORY: return 0 -> no Error)
  4278. *
  4279. */
  4280. -int32_t lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
  4281. - uint8_t *data,
  4282. - uint16_t len)
  4283. +int32_t __weak lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
  4284. + uint8_t *data,
  4285. + uint16_t len)
  4286. {
  4287. int32_t ret;
  4288. +
  4289. ret = ctx->write_reg(ctx->handle, reg, data, len);
  4290. +
  4291. return ret;
  4292. }
  4293. /**
  4294. * @}
  4295. *
  4296. -*/
  4297. + */
  4298. /**
  4299. * @defgroup LSM6DSOX_Private_functions
  4300. @@ -89,7 +92,8 @@ int32_t lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
  4301. static void bytecpy(uint8_t *target, uint8_t *source)
  4302. {
  4303. - if ( (target != NULL) && (source != NULL) ) {
  4304. + if ((target != NULL) && (source != NULL))
  4305. + {
  4306. *target = *source;
  4307. }
  4308. }
  4309. @@ -99,7 +103,7 @@ static void bytecpy(uint8_t *target, uint8_t *source)
  4310. * @brief These functions convert raw-data into engineering units.
  4311. * @{
  4312. *
  4313. -*/
  4314. + */
  4315. float_t lsm6dso_from_fs2_to_mg(int16_t lsb)
  4316. {
  4317. return ((float_t)lsb) * 0.061f;
  4318. @@ -158,20 +162,21 @@ float_t lsm6dso_from_lsb_to_nsec(int16_t lsb)
  4319. /**
  4320. * @}
  4321. *
  4322. -*/
  4323. + */
  4324. /**
  4325. * @defgroup LSM6DSO_Data_Generation
  4326. * @brief This section groups all the functions concerning
  4327. * data generation.
  4328. *
  4329. -*/
  4330. + */
  4331. /**
  4332. * @brief Accelerometer full-scale selection.[set]
  4333. *
  4334. * @param ctx read / write interface definitions
  4335. * @param val change the values of fs_xl in reg CTRL1_XL
  4336. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4337. *
  4338. */
  4339. int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx,
  4340. @@ -179,9 +184,11 @@ int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx,
  4341. {
  4342. lsm6dso_ctrl1_xl_t reg;
  4343. int32_t ret;
  4344. +
  4345. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  4346. - if (ret == 0) {
  4347. + if (ret == 0)
  4348. + {
  4349. reg.fs_xl = (uint8_t) val;
  4350. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  4351. }
  4352. @@ -194,6 +201,7 @@ int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx,
  4353. *
  4354. * @param ctx read / write interface definitions
  4355. * @param val Get the values of fs_xl in reg CTRL1_XL
  4356. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4357. *
  4358. */
  4359. int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx,
  4360. @@ -201,9 +209,11 @@ int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx,
  4361. {
  4362. lsm6dso_ctrl1_xl_t reg;
  4363. int32_t ret;
  4364. +
  4365. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  4366. - switch (reg.fs_xl) {
  4367. + switch (reg.fs_xl)
  4368. + {
  4369. case LSM6DSO_2g:
  4370. *val = LSM6DSO_2g;
  4371. break;
  4372. @@ -233,6 +243,7 @@ int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx,
  4373. *
  4374. * @param ctx read / write interface definitions
  4375. * @param val change the values of odr_xl in reg CTRL1_XL
  4376. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4377. *
  4378. */
  4379. int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
  4380. @@ -243,93 +254,112 @@ int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
  4381. lsm6dso_fsm_odr_t fsm_odr;
  4382. lsm6dso_ctrl1_xl_t reg;
  4383. int32_t ret;
  4384. +
  4385. /* Check the Finite State Machine data rate constraints */
  4386. ret = lsm6dso_fsm_enable_get(ctx, &fsm_enable);
  4387. - if (ret == 0) {
  4388. - if ( (fsm_enable.fsm_enable_a.fsm1_en |
  4389. - fsm_enable.fsm_enable_a.fsm2_en |
  4390. - fsm_enable.fsm_enable_a.fsm3_en |
  4391. - fsm_enable.fsm_enable_a.fsm4_en |
  4392. - fsm_enable.fsm_enable_a.fsm5_en |
  4393. - fsm_enable.fsm_enable_a.fsm6_en |
  4394. - fsm_enable.fsm_enable_a.fsm7_en |
  4395. - fsm_enable.fsm_enable_a.fsm8_en |
  4396. - fsm_enable.fsm_enable_b.fsm9_en |
  4397. - fsm_enable.fsm_enable_b.fsm10_en |
  4398. - fsm_enable.fsm_enable_b.fsm11_en |
  4399. - fsm_enable.fsm_enable_b.fsm12_en |
  4400. - fsm_enable.fsm_enable_b.fsm13_en |
  4401. - fsm_enable.fsm_enable_b.fsm14_en |
  4402. - fsm_enable.fsm_enable_b.fsm15_en |
  4403. - fsm_enable.fsm_enable_b.fsm16_en ) == PROPERTY_ENABLE ) {
  4404. + if (ret == 0)
  4405. + {
  4406. + if ((fsm_enable.fsm_enable_a.fsm1_en |
  4407. + fsm_enable.fsm_enable_a.fsm2_en |
  4408. + fsm_enable.fsm_enable_a.fsm3_en |
  4409. + fsm_enable.fsm_enable_a.fsm4_en |
  4410. + fsm_enable.fsm_enable_a.fsm5_en |
  4411. + fsm_enable.fsm_enable_a.fsm6_en |
  4412. + fsm_enable.fsm_enable_a.fsm7_en |
  4413. + fsm_enable.fsm_enable_a.fsm8_en |
  4414. + fsm_enable.fsm_enable_b.fsm9_en |
  4415. + fsm_enable.fsm_enable_b.fsm10_en |
  4416. + fsm_enable.fsm_enable_b.fsm11_en |
  4417. + fsm_enable.fsm_enable_b.fsm12_en |
  4418. + fsm_enable.fsm_enable_b.fsm13_en |
  4419. + fsm_enable.fsm_enable_b.fsm14_en |
  4420. + fsm_enable.fsm_enable_b.fsm15_en |
  4421. + fsm_enable.fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
  4422. + {
  4423. ret = lsm6dso_fsm_data_rate_get(ctx, &fsm_odr);
  4424. - if (ret == 0) {
  4425. - switch (fsm_odr) {
  4426. + if (ret == 0)
  4427. + {
  4428. + switch (fsm_odr)
  4429. + {
  4430. case LSM6DSO_ODR_FSM_12Hz5:
  4431. - if (val == LSM6DSO_XL_ODR_OFF) {
  4432. + if (val == LSM6DSO_XL_ODR_OFF)
  4433. + {
  4434. odr_xl = LSM6DSO_XL_ODR_12Hz5;
  4435. }
  4436. - else {
  4437. + else
  4438. + {
  4439. odr_xl = val;
  4440. }
  4441. break;
  4442. case LSM6DSO_ODR_FSM_26Hz:
  4443. - if (val == LSM6DSO_XL_ODR_OFF) {
  4444. + if (val == LSM6DSO_XL_ODR_OFF)
  4445. + {
  4446. odr_xl = LSM6DSO_XL_ODR_26Hz;
  4447. }
  4448. - else if (val == LSM6DSO_XL_ODR_12Hz5) {
  4449. + else if (val == LSM6DSO_XL_ODR_12Hz5)
  4450. + {
  4451. odr_xl = LSM6DSO_XL_ODR_26Hz;
  4452. }
  4453. - else {
  4454. + else
  4455. + {
  4456. odr_xl = val;
  4457. }
  4458. break;
  4459. case LSM6DSO_ODR_FSM_52Hz:
  4460. - if (val == LSM6DSO_XL_ODR_OFF) {
  4461. + if (val == LSM6DSO_XL_ODR_OFF)
  4462. + {
  4463. odr_xl = LSM6DSO_XL_ODR_52Hz;
  4464. }
  4465. - else if (val == LSM6DSO_XL_ODR_12Hz5) {
  4466. + else if (val == LSM6DSO_XL_ODR_12Hz5)
  4467. + {
  4468. odr_xl = LSM6DSO_XL_ODR_52Hz;
  4469. }
  4470. - else if (val == LSM6DSO_XL_ODR_26Hz) {
  4471. + else if (val == LSM6DSO_XL_ODR_26Hz)
  4472. + {
  4473. odr_xl = LSM6DSO_XL_ODR_52Hz;
  4474. }
  4475. - else {
  4476. + else
  4477. + {
  4478. odr_xl = val;
  4479. }
  4480. break;
  4481. case LSM6DSO_ODR_FSM_104Hz:
  4482. - if (val == LSM6DSO_XL_ODR_OFF) {
  4483. + if (val == LSM6DSO_XL_ODR_OFF)
  4484. + {
  4485. odr_xl = LSM6DSO_XL_ODR_104Hz;
  4486. }
  4487. - else if (val == LSM6DSO_XL_ODR_12Hz5) {
  4488. + else if (val == LSM6DSO_XL_ODR_12Hz5)
  4489. + {
  4490. odr_xl = LSM6DSO_XL_ODR_104Hz;
  4491. }
  4492. - else if (val == LSM6DSO_XL_ODR_26Hz) {
  4493. + else if (val == LSM6DSO_XL_ODR_26Hz)
  4494. + {
  4495. odr_xl = LSM6DSO_XL_ODR_104Hz;
  4496. }
  4497. - else if (val == LSM6DSO_XL_ODR_52Hz) {
  4498. + else if (val == LSM6DSO_XL_ODR_52Hz)
  4499. + {
  4500. odr_xl = LSM6DSO_XL_ODR_104Hz;
  4501. }
  4502. - else {
  4503. + else
  4504. + {
  4505. odr_xl = val;
  4506. }
  4507. @@ -343,11 +373,13 @@ int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
  4508. }
  4509. }
  4510. - if (ret == 0) {
  4511. + if (ret == 0)
  4512. + {
  4513. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  4514. }
  4515. - if (ret == 0) {
  4516. + if (ret == 0)
  4517. + {
  4518. reg.odr_xl = (uint8_t) odr_xl;
  4519. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  4520. }
  4521. @@ -360,6 +392,7 @@ int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
  4522. *
  4523. * @param ctx read / write interface definitions
  4524. * @param val Get the values of odr_xl in reg CTRL1_XL
  4525. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4526. *
  4527. */
  4528. int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx,
  4529. @@ -367,9 +400,11 @@ int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx,
  4530. {
  4531. lsm6dso_ctrl1_xl_t reg;
  4532. int32_t ret;
  4533. +
  4534. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  4535. - switch (reg.odr_xl) {
  4536. + switch (reg.odr_xl)
  4537. + {
  4538. case LSM6DSO_XL_ODR_OFF:
  4539. *val = LSM6DSO_XL_ODR_OFF;
  4540. break;
  4541. @@ -431,6 +466,7 @@ int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx,
  4542. *
  4543. * @param ctx read / write interface definitions
  4544. * @param val change the values of fs_g in reg CTRL2_G
  4545. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4546. *
  4547. */
  4548. int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx,
  4549. @@ -438,9 +474,11 @@ int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx,
  4550. {
  4551. lsm6dso_ctrl2_g_t reg;
  4552. int32_t ret;
  4553. +
  4554. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
  4555. - if (ret == 0) {
  4556. + if (ret == 0)
  4557. + {
  4558. reg.fs_g = (uint8_t) val;
  4559. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
  4560. }
  4561. @@ -453,6 +491,7 @@ int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx,
  4562. *
  4563. * @param ctx read / write interface definitions
  4564. * @param val Get the values of fs_g in reg CTRL2_G
  4565. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4566. *
  4567. */
  4568. int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx,
  4569. @@ -460,9 +499,11 @@ int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx,
  4570. {
  4571. lsm6dso_ctrl2_g_t reg;
  4572. int32_t ret;
  4573. +
  4574. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
  4575. - switch (reg.fs_g) {
  4576. + switch (reg.fs_g)
  4577. + {
  4578. case LSM6DSO_250dps:
  4579. *val = LSM6DSO_250dps;
  4580. break;
  4581. @@ -496,6 +537,7 @@ int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx,
  4582. *
  4583. * @param ctx read / write interface definitions
  4584. * @param val change the values of odr_g in reg CTRL2_G
  4585. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4586. *
  4587. */
  4588. int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx,
  4589. @@ -506,93 +548,112 @@ int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx,
  4590. lsm6dso_fsm_odr_t fsm_odr;
  4591. lsm6dso_ctrl2_g_t reg;
  4592. int32_t ret;
  4593. +
  4594. /* Check the Finite State Machine data rate constraints */
  4595. ret = lsm6dso_fsm_enable_get(ctx, &fsm_enable);
  4596. - if (ret == 0) {
  4597. - if ( (fsm_enable.fsm_enable_a.fsm1_en |
  4598. - fsm_enable.fsm_enable_a.fsm2_en |
  4599. - fsm_enable.fsm_enable_a.fsm3_en |
  4600. - fsm_enable.fsm_enable_a.fsm4_en |
  4601. - fsm_enable.fsm_enable_a.fsm5_en |
  4602. - fsm_enable.fsm_enable_a.fsm6_en |
  4603. - fsm_enable.fsm_enable_a.fsm7_en |
  4604. - fsm_enable.fsm_enable_a.fsm8_en |
  4605. - fsm_enable.fsm_enable_b.fsm9_en |
  4606. - fsm_enable.fsm_enable_b.fsm10_en |
  4607. - fsm_enable.fsm_enable_b.fsm11_en |
  4608. - fsm_enable.fsm_enable_b.fsm12_en |
  4609. - fsm_enable.fsm_enable_b.fsm13_en |
  4610. - fsm_enable.fsm_enable_b.fsm14_en |
  4611. - fsm_enable.fsm_enable_b.fsm15_en |
  4612. - fsm_enable.fsm_enable_b.fsm16_en ) == PROPERTY_ENABLE ) {
  4613. + if (ret == 0)
  4614. + {
  4615. + if ((fsm_enable.fsm_enable_a.fsm1_en |
  4616. + fsm_enable.fsm_enable_a.fsm2_en |
  4617. + fsm_enable.fsm_enable_a.fsm3_en |
  4618. + fsm_enable.fsm_enable_a.fsm4_en |
  4619. + fsm_enable.fsm_enable_a.fsm5_en |
  4620. + fsm_enable.fsm_enable_a.fsm6_en |
  4621. + fsm_enable.fsm_enable_a.fsm7_en |
  4622. + fsm_enable.fsm_enable_a.fsm8_en |
  4623. + fsm_enable.fsm_enable_b.fsm9_en |
  4624. + fsm_enable.fsm_enable_b.fsm10_en |
  4625. + fsm_enable.fsm_enable_b.fsm11_en |
  4626. + fsm_enable.fsm_enable_b.fsm12_en |
  4627. + fsm_enable.fsm_enable_b.fsm13_en |
  4628. + fsm_enable.fsm_enable_b.fsm14_en |
  4629. + fsm_enable.fsm_enable_b.fsm15_en |
  4630. + fsm_enable.fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
  4631. + {
  4632. ret = lsm6dso_fsm_data_rate_get(ctx, &fsm_odr);
  4633. - if (ret == 0) {
  4634. - switch (fsm_odr) {
  4635. + if (ret == 0)
  4636. + {
  4637. + switch (fsm_odr)
  4638. + {
  4639. case LSM6DSO_ODR_FSM_12Hz5:
  4640. - if (val == LSM6DSO_GY_ODR_OFF) {
  4641. + if (val == LSM6DSO_GY_ODR_OFF)
  4642. + {
  4643. odr_gy = LSM6DSO_GY_ODR_12Hz5;
  4644. }
  4645. - else {
  4646. + else
  4647. + {
  4648. odr_gy = val;
  4649. }
  4650. break;
  4651. case LSM6DSO_ODR_FSM_26Hz:
  4652. - if (val == LSM6DSO_GY_ODR_OFF) {
  4653. + if (val == LSM6DSO_GY_ODR_OFF)
  4654. + {
  4655. odr_gy = LSM6DSO_GY_ODR_26Hz;
  4656. }
  4657. - else if (val == LSM6DSO_GY_ODR_12Hz5) {
  4658. + else if (val == LSM6DSO_GY_ODR_12Hz5)
  4659. + {
  4660. odr_gy = LSM6DSO_GY_ODR_26Hz;
  4661. }
  4662. - else {
  4663. + else
  4664. + {
  4665. odr_gy = val;
  4666. }
  4667. break;
  4668. case LSM6DSO_ODR_FSM_52Hz:
  4669. - if (val == LSM6DSO_GY_ODR_OFF) {
  4670. + if (val == LSM6DSO_GY_ODR_OFF)
  4671. + {
  4672. odr_gy = LSM6DSO_GY_ODR_52Hz;
  4673. }
  4674. - else if (val == LSM6DSO_GY_ODR_12Hz5) {
  4675. + else if (val == LSM6DSO_GY_ODR_12Hz5)
  4676. + {
  4677. odr_gy = LSM6DSO_GY_ODR_52Hz;
  4678. }
  4679. - else if (val == LSM6DSO_GY_ODR_26Hz) {
  4680. + else if (val == LSM6DSO_GY_ODR_26Hz)
  4681. + {
  4682. odr_gy = LSM6DSO_GY_ODR_52Hz;
  4683. }
  4684. - else {
  4685. + else
  4686. + {
  4687. odr_gy = val;
  4688. }
  4689. break;
  4690. case LSM6DSO_ODR_FSM_104Hz:
  4691. - if (val == LSM6DSO_GY_ODR_OFF) {
  4692. + if (val == LSM6DSO_GY_ODR_OFF)
  4693. + {
  4694. odr_gy = LSM6DSO_GY_ODR_104Hz;
  4695. }
  4696. - else if (val == LSM6DSO_GY_ODR_12Hz5) {
  4697. + else if (val == LSM6DSO_GY_ODR_12Hz5)
  4698. + {
  4699. odr_gy = LSM6DSO_GY_ODR_104Hz;
  4700. }
  4701. - else if (val == LSM6DSO_GY_ODR_26Hz) {
  4702. + else if (val == LSM6DSO_GY_ODR_26Hz)
  4703. + {
  4704. odr_gy = LSM6DSO_GY_ODR_104Hz;
  4705. }
  4706. - else if (val == LSM6DSO_GY_ODR_52Hz) {
  4707. + else if (val == LSM6DSO_GY_ODR_52Hz)
  4708. + {
  4709. odr_gy = LSM6DSO_GY_ODR_104Hz;
  4710. }
  4711. - else {
  4712. + else
  4713. + {
  4714. odr_gy = val;
  4715. }
  4716. @@ -606,11 +667,13 @@ int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx,
  4717. }
  4718. }
  4719. - if (ret == 0) {
  4720. + if (ret == 0)
  4721. + {
  4722. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
  4723. }
  4724. - if (ret == 0) {
  4725. + if (ret == 0)
  4726. + {
  4727. reg.odr_g = (uint8_t) odr_gy;
  4728. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
  4729. }
  4730. @@ -623,6 +686,7 @@ int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx,
  4731. *
  4732. * @param ctx read / write interface definitions
  4733. * @param val Get the values of odr_g in reg CTRL2_G
  4734. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4735. *
  4736. */
  4737. int32_t lsm6dso_gy_data_rate_get(stmdev_ctx_t *ctx,
  4738. @@ -630,9 +694,11 @@ int32_t lsm6dso_gy_data_rate_get(stmdev_ctx_t *ctx,
  4739. {
  4740. lsm6dso_ctrl2_g_t reg;
  4741. int32_t ret;
  4742. +
  4743. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
  4744. - switch (reg.odr_g) {
  4745. + switch (reg.odr_g)
  4746. + {
  4747. case LSM6DSO_GY_ODR_OFF:
  4748. *val = LSM6DSO_GY_ODR_OFF;
  4749. break;
  4750. @@ -690,15 +756,18 @@ int32_t lsm6dso_gy_data_rate_get(stmdev_ctx_t *ctx,
  4751. *
  4752. * @param ctx read / write interface definitions
  4753. * @param val change the values of bdu in reg CTRL3_C
  4754. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4755. *
  4756. */
  4757. int32_t lsm6dso_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val)
  4758. {
  4759. lsm6dso_ctrl3_c_t reg;
  4760. int32_t ret;
  4761. +
  4762. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  4763. - if (ret == 0) {
  4764. + if (ret == 0)
  4765. + {
  4766. reg.bdu = val;
  4767. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  4768. }
  4769. @@ -711,14 +780,17 @@ int32_t lsm6dso_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val)
  4770. *
  4771. * @param ctx read / write interface definitions
  4772. * @param val change the values of bdu in reg CTRL3_C
  4773. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4774. *
  4775. */
  4776. int32_t lsm6dso_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val)
  4777. {
  4778. lsm6dso_ctrl3_c_t reg;
  4779. int32_t ret;
  4780. +
  4781. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  4782. *val = reg.bdu;
  4783. +
  4784. return ret;
  4785. }
  4786. @@ -728,6 +800,7 @@ int32_t lsm6dso_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val)
  4787. *
  4788. * @param ctx read / write interface definitions
  4789. * @param val change the values of usr_off_w in reg CTRL6_C
  4790. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4791. *
  4792. */
  4793. int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
  4794. @@ -735,9 +808,11 @@ int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
  4795. {
  4796. lsm6dso_ctrl6_c_t reg;
  4797. int32_t ret;
  4798. +
  4799. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  4800. - if (ret == 0) {
  4801. + if (ret == 0)
  4802. + {
  4803. reg.usr_off_w = (uint8_t)val;
  4804. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  4805. }
  4806. @@ -751,6 +826,7 @@ int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
  4807. *
  4808. * @param ctx read / write interface definitions
  4809. * @param val Get the values of usr_off_w in reg CTRL6_C
  4810. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4811. *
  4812. */
  4813. int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
  4814. @@ -758,9 +834,11 @@ int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
  4815. {
  4816. lsm6dso_ctrl6_c_t reg;
  4817. int32_t ret;
  4818. +
  4819. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  4820. - switch (reg.usr_off_w) {
  4821. + switch (reg.usr_off_w)
  4822. + {
  4823. case LSM6DSO_LSb_1mg:
  4824. *val = LSM6DSO_LSb_1mg;
  4825. break;
  4826. @@ -783,6 +861,7 @@ int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
  4827. * @param ctx read / write interface definitions
  4828. * @param val change the values of xl_hm_mode in
  4829. * reg CTRL6_C
  4830. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4831. *
  4832. */
  4833. int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
  4834. @@ -791,22 +870,24 @@ int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
  4835. lsm6dso_ctrl5_c_t ctrl5_c;
  4836. lsm6dso_ctrl6_c_t ctrl6_c;
  4837. int32_t ret;
  4838. +
  4839. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
  4840. - if (ret == 0) {
  4841. + if (ret == 0)
  4842. + {
  4843. ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x02U) >> 1;
  4844. - ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c,
  4845. - 1);
  4846. + ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
  4847. }
  4848. - if (ret == 0) {
  4849. + if (ret == 0)
  4850. + {
  4851. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
  4852. }
  4853. - if (ret == 0) {
  4854. + if (ret == 0)
  4855. + {
  4856. ctrl6_c.xl_hm_mode = (uint8_t)val & 0x01U;
  4857. - ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c,
  4858. - 1);
  4859. + ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
  4860. }
  4861. return ret;
  4862. @@ -817,6 +898,7 @@ int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
  4863. *
  4864. * @param ctx read / write interface definitions
  4865. * @param val Get the values of xl_hm_mode in reg CTRL6_C
  4866. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4867. *
  4868. */
  4869. int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
  4870. @@ -825,12 +907,15 @@ int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
  4871. lsm6dso_ctrl5_c_t ctrl5_c;
  4872. lsm6dso_ctrl6_c_t ctrl6_c;
  4873. int32_t ret;
  4874. +
  4875. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
  4876. - if (ret == 0) {
  4877. + if (ret == 0)
  4878. + {
  4879. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
  4880. - switch ( (ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode) {
  4881. + switch ((ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode)
  4882. + {
  4883. case LSM6DSO_HIGH_PERFORMANCE_MD:
  4884. *val = LSM6DSO_HIGH_PERFORMANCE_MD;
  4885. break;
  4886. @@ -857,6 +942,7 @@ int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
  4887. *
  4888. * @param ctx read / write interface definitions
  4889. * @param val change the values of g_hm_mode in reg CTRL7_G
  4890. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4891. *
  4892. */
  4893. int32_t lsm6dso_gy_power_mode_set(stmdev_ctx_t *ctx,
  4894. @@ -864,9 +950,11 @@ int32_t lsm6dso_gy_power_mode_set(stmdev_ctx_t *ctx,
  4895. {
  4896. lsm6dso_ctrl7_g_t reg;
  4897. int32_t ret;
  4898. +
  4899. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  4900. - if (ret == 0) {
  4901. + if (ret == 0)
  4902. + {
  4903. reg.g_hm_mode = (uint8_t)val;
  4904. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  4905. }
  4906. @@ -879,6 +967,7 @@ int32_t lsm6dso_gy_power_mode_set(stmdev_ctx_t *ctx,
  4907. *
  4908. * @param ctx read / write interface definitions
  4909. * @param val Get the values of g_hm_mode in reg CTRL7_G
  4910. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4911. *
  4912. */
  4913. int32_t lsm6dso_gy_power_mode_get(stmdev_ctx_t *ctx,
  4914. @@ -886,9 +975,11 @@ int32_t lsm6dso_gy_power_mode_get(stmdev_ctx_t *ctx,
  4915. {
  4916. lsm6dso_ctrl7_g_t reg;
  4917. int32_t ret;
  4918. +
  4919. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  4920. - switch (reg.g_hm_mode) {
  4921. + switch (reg.g_hm_mode)
  4922. + {
  4923. case LSM6DSO_GY_HIGH_PERFORMANCE:
  4924. *val = LSM6DSO_GY_HIGH_PERFORMANCE;
  4925. break;
  4926. @@ -910,13 +1001,16 @@ int32_t lsm6dso_gy_power_mode_get(stmdev_ctx_t *ctx,
  4927. *
  4928. * @param ctx read / write interface definitions
  4929. * @param val register STATUS_REG
  4930. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4931. *
  4932. */
  4933. int32_t lsm6dso_status_reg_get(stmdev_ctx_t *ctx,
  4934. lsm6dso_status_reg_t *val)
  4935. {
  4936. int32_t ret;
  4937. +
  4938. ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *) val, 1);
  4939. +
  4940. return ret;
  4941. }
  4942. @@ -925,6 +1019,7 @@ int32_t lsm6dso_status_reg_get(stmdev_ctx_t *ctx,
  4943. *
  4944. * @param ctx read / write interface definitions
  4945. * @param val change the values of xlda in reg STATUS_REG
  4946. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4947. *
  4948. */
  4949. int32_t lsm6dso_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
  4950. @@ -932,8 +1027,10 @@ int32_t lsm6dso_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
  4951. {
  4952. lsm6dso_status_reg_t reg;
  4953. int32_t ret;
  4954. +
  4955. ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
  4956. *val = reg.xlda;
  4957. +
  4958. return ret;
  4959. }
  4960. @@ -942,6 +1039,7 @@ int32_t lsm6dso_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
  4961. *
  4962. * @param ctx read / write interface definitions
  4963. * @param val change the values of gda in reg STATUS_REG
  4964. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4965. *
  4966. */
  4967. int32_t lsm6dso_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  4968. @@ -949,8 +1047,10 @@ int32_t lsm6dso_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  4969. {
  4970. lsm6dso_status_reg_t reg;
  4971. int32_t ret;
  4972. +
  4973. ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
  4974. *val = reg.gda;
  4975. +
  4976. return ret;
  4977. }
  4978. @@ -959,6 +1059,7 @@ int32_t lsm6dso_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  4979. *
  4980. * @param ctx read / write interface definitions
  4981. * @param val change the values of tda in reg STATUS_REG
  4982. + * @retval interface status (MANDATORY: return 0 -> no Error)
  4983. *
  4984. */
  4985. int32_t lsm6dso_temp_flag_data_ready_get(stmdev_ctx_t *ctx,
  4986. @@ -966,104 +1067,124 @@ int32_t lsm6dso_temp_flag_data_ready_get(stmdev_ctx_t *ctx,
  4987. {
  4988. lsm6dso_status_reg_t reg;
  4989. int32_t ret;
  4990. +
  4991. ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
  4992. *val = reg.tda;
  4993. +
  4994. return ret;
  4995. }
  4996. /**
  4997. * @brief Accelerometer X-axis user offset correction expressed in
  4998. - * two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  4999. + * two's complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  5000. * The value must be in the range [-127 127].[set]
  5001. *
  5002. * @param ctx read / write interface definitions
  5003. * @param buff buffer that contains data to write
  5004. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5005. *
  5006. */
  5007. int32_t lsm6dso_xl_usr_offset_x_set(stmdev_ctx_t *ctx, uint8_t *buff)
  5008. {
  5009. int32_t ret;
  5010. +
  5011. ret = lsm6dso_write_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
  5012. +
  5013. return ret;
  5014. }
  5015. /**
  5016. - * @brief Accelerometer X-axis user offset correction expressed in two’s
  5017. + * @brief Accelerometer X-axis user offset correction expressed in two's
  5018. * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  5019. * The value must be in the range [-127 127].[get]
  5020. *
  5021. * @param ctx read / write interface definitions
  5022. * @param buff buffer that stores data read
  5023. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5024. *
  5025. */
  5026. int32_t lsm6dso_xl_usr_offset_x_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5027. {
  5028. int32_t ret;
  5029. +
  5030. ret = lsm6dso_read_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
  5031. +
  5032. return ret;
  5033. }
  5034. /**
  5035. - * @brief Accelerometer Y-axis user offset correction expressed in two’s
  5036. + * @brief Accelerometer Y-axis user offset correction expressed in two's
  5037. * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  5038. * The value must be in the range [-127 127].[set]
  5039. *
  5040. * @param ctx read / write interface definitions
  5041. * @param buff buffer that contains data to write
  5042. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5043. *
  5044. */
  5045. int32_t lsm6dso_xl_usr_offset_y_set(stmdev_ctx_t *ctx, uint8_t *buff)
  5046. {
  5047. int32_t ret;
  5048. +
  5049. ret = lsm6dso_write_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
  5050. +
  5051. return ret;
  5052. }
  5053. /**
  5054. - * @brief Accelerometer Y-axis user offset correction expressed in two’s
  5055. + * @brief Accelerometer Y-axis user offset correction expressed in two's
  5056. * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  5057. * The value must be in the range [-127 127].[get]
  5058. *
  5059. * @param ctx read / write interface definitions
  5060. * @param buff buffer that stores data read
  5061. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5062. *
  5063. */
  5064. int32_t lsm6dso_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5065. {
  5066. int32_t ret;
  5067. +
  5068. ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
  5069. +
  5070. return ret;
  5071. }
  5072. /**
  5073. - * @brief Accelerometer Z-axis user offset correction expressed in two’s
  5074. + * @brief Accelerometer Z-axis user offset correction expressed in two's
  5075. * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  5076. * The value must be in the range [-127 127].[set]
  5077. *
  5078. * @param ctx read / write interface definitions
  5079. * @param buff buffer that contains data to write
  5080. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5081. *
  5082. */
  5083. int32_t lsm6dso_xl_usr_offset_z_set(stmdev_ctx_t *ctx, uint8_t *buff)
  5084. {
  5085. int32_t ret;
  5086. +
  5087. ret = lsm6dso_write_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
  5088. +
  5089. return ret;
  5090. }
  5091. /**
  5092. - * @brief Accelerometer Z-axis user offset correction expressed in two’s
  5093. + * @brief Accelerometer Z-axis user offset correction expressed in two's
  5094. * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
  5095. * The value must be in the range [-127 127].[get]
  5096. *
  5097. * @param ctx read / write interface definitions
  5098. * @param buff buffer that stores data read
  5099. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5100. *
  5101. */
  5102. int32_t lsm6dso_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5103. {
  5104. int32_t ret;
  5105. +
  5106. ret = lsm6dso_read_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
  5107. +
  5108. return ret;
  5109. }
  5110. @@ -1072,15 +1193,18 @@ int32_t lsm6dso_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5111. *
  5112. * @param ctx read / write interface definitions
  5113. * @param val change the values of usr_off_on_out in reg CTRL7_G
  5114. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5115. *
  5116. */
  5117. int32_t lsm6dso_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val)
  5118. {
  5119. lsm6dso_ctrl7_g_t reg;
  5120. int32_t ret;
  5121. +
  5122. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  5123. - if (ret == 0) {
  5124. + if (ret == 0)
  5125. + {
  5126. reg.usr_off_on_out = val;
  5127. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  5128. }
  5129. @@ -1093,14 +1217,17 @@ int32_t lsm6dso_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val)
  5130. *
  5131. * @param ctx read / write interface definitions
  5132. * @param val values of usr_off_on_out in reg CTRL7_G
  5133. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5134. *
  5135. */
  5136. int32_t lsm6dso_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val)
  5137. {
  5138. lsm6dso_ctrl7_g_t reg;
  5139. int32_t ret;
  5140. +
  5141. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  5142. *val = reg.usr_off_on_out;
  5143. +
  5144. return ret;
  5145. }
  5146. @@ -1121,7 +1248,7 @@ int32_t lsm6dso_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val)
  5147. * @brief Reset timestamp counter.[set]
  5148. *
  5149. * @param ctx Read / write interface definitions.(ptr)
  5150. - * @retval Interface status (MANDATORY: return 0 -> no Error).
  5151. + * @retval Interface status (MANDATORY: return 0 -> no Error)
  5152. *
  5153. */
  5154. int32_t lsm6dso_timestamp_rst(stmdev_ctx_t *ctx)
  5155. @@ -1135,15 +1262,18 @@ int32_t lsm6dso_timestamp_rst(stmdev_ctx_t *ctx)
  5156. *
  5157. * @param ctx read / write interface definitions
  5158. * @param val change the values of timestamp_en in reg CTRL10_C
  5159. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5160. *
  5161. */
  5162. int32_t lsm6dso_timestamp_set(stmdev_ctx_t *ctx, uint8_t val)
  5163. {
  5164. lsm6dso_ctrl10_c_t reg;
  5165. int32_t ret;
  5166. +
  5167. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
  5168. - if (ret == 0) {
  5169. + if (ret == 0)
  5170. + {
  5171. reg.timestamp_en = val;
  5172. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
  5173. }
  5174. @@ -1156,35 +1286,41 @@ int32_t lsm6dso_timestamp_set(stmdev_ctx_t *ctx, uint8_t val)
  5175. *
  5176. * @param ctx read / write interface definitions
  5177. * @param val change the values of timestamp_en in reg CTRL10_C
  5178. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5179. *
  5180. */
  5181. int32_t lsm6dso_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val)
  5182. {
  5183. lsm6dso_ctrl10_c_t reg;
  5184. int32_t ret;
  5185. +
  5186. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
  5187. *val = reg.timestamp_en;
  5188. +
  5189. return ret;
  5190. }
  5191. /**
  5192. * @brief Timestamp first data output register (r).
  5193. * The value is expressed as a 32-bit word and the bit
  5194. - * resolution is 25 μs.[get]
  5195. + * resolution is 25 us.[get]
  5196. *
  5197. * @param ctx read / write interface definitions
  5198. * @param buff buffer that stores data read
  5199. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5200. *
  5201. */
  5202. int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val)
  5203. {
  5204. uint8_t buff[4];
  5205. int32_t ret;
  5206. +
  5207. ret = lsm6dso_read_reg(ctx, LSM6DSO_TIMESTAMP0, buff, 4);
  5208. *val = buff[3];
  5209. *val = (*val * 256U) + buff[2];
  5210. *val = (*val * 256U) + buff[1];
  5211. *val = (*val * 256U) + buff[0];
  5212. +
  5213. return ret;
  5214. }
  5215. @@ -1198,7 +1334,7 @@ int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val)
  5216. * @brief This section groups all the data output functions.
  5217. * @{
  5218. *
  5219. -*/
  5220. + */
  5221. /**
  5222. * @brief Circular burst-mode (rounding) read of the output
  5223. @@ -1206,6 +1342,7 @@ int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val)
  5224. *
  5225. * @param ctx read / write interface definitions
  5226. * @param val change the values of rounding in reg CTRL5_C
  5227. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5228. *
  5229. */
  5230. int32_t lsm6dso_rounding_mode_set(stmdev_ctx_t *ctx,
  5231. @@ -1213,9 +1350,11 @@ int32_t lsm6dso_rounding_mode_set(stmdev_ctx_t *ctx,
  5232. {
  5233. lsm6dso_ctrl5_c_t reg;
  5234. int32_t ret;
  5235. +
  5236. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5237. - if (ret == 0) {
  5238. + if (ret == 0)
  5239. + {
  5240. reg.rounding = (uint8_t)val;
  5241. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5242. }
  5243. @@ -1228,6 +1367,7 @@ int32_t lsm6dso_rounding_mode_set(stmdev_ctx_t *ctx,
  5244. *
  5245. * @param ctx read / write interface definitions
  5246. * @param val Get the values of rounding in reg CTRL5_C
  5247. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5248. *
  5249. */
  5250. int32_t lsm6dso_rounding_mode_get(stmdev_ctx_t *ctx,
  5251. @@ -1235,9 +1375,11 @@ int32_t lsm6dso_rounding_mode_get(stmdev_ctx_t *ctx,
  5252. {
  5253. lsm6dso_ctrl5_c_t reg;
  5254. int32_t ret;
  5255. +
  5256. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5257. - switch (reg.rounding) {
  5258. + switch (reg.rounding)
  5259. + {
  5260. case LSM6DSO_NO_ROUND:
  5261. *val = LSM6DSO_NO_ROUND;
  5262. break;
  5263. @@ -1264,35 +1406,40 @@ int32_t lsm6dso_rounding_mode_get(stmdev_ctx_t *ctx,
  5264. /**
  5265. * @brief Temperature data output register (r).
  5266. - * L and H registers together express a 16-bit word in two’s
  5267. + * L and H registers together express a 16-bit word in two's
  5268. * complement.[get]
  5269. *
  5270. * @param ctx read / write interface definitions
  5271. * @param buff buffer that stores data read
  5272. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5273. *
  5274. */
  5275. int32_t lsm6dso_temperature_raw_get(stmdev_ctx_t *ctx, int16_t *val)
  5276. {
  5277. uint8_t buff[2];
  5278. int32_t ret;
  5279. +
  5280. ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 2);
  5281. val[0] = (int16_t)buff[1];
  5282. val[0] = (val[0] * 256) + (int16_t)buff[0];
  5283. +
  5284. return ret;
  5285. }
  5286. /**
  5287. * @brief Angular rate sensor. The value is expressed as a 16-bit
  5288. - * word in two’s complement.[get]
  5289. + * word in two's complement.[get]
  5290. *
  5291. * @param ctx read / write interface definitions
  5292. * @param buff buffer that stores data read
  5293. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5294. *
  5295. */
  5296. int32_t lsm6dso_angular_rate_raw_get(stmdev_ctx_t *ctx, int16_t *val)
  5297. {
  5298. uint8_t buff[6];
  5299. int32_t ret;
  5300. +
  5301. ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_G, buff, 6);
  5302. val[0] = (int16_t)buff[1];
  5303. val[0] = (val[0] * 256) + (int16_t)buff[0];
  5304. @@ -1300,21 +1447,24 @@ int32_t lsm6dso_angular_rate_raw_get(stmdev_ctx_t *ctx, int16_t *val)
  5305. val[1] = (val[1] * 256) + (int16_t)buff[2];
  5306. val[2] = (int16_t)buff[5];
  5307. val[2] = (val[2] * 256) + (int16_t)buff[4];
  5308. +
  5309. return ret;
  5310. }
  5311. /**
  5312. * @brief Linear acceleration output register.
  5313. - * The value is expressed as a 16-bit word in two’s complement.[get]
  5314. + * The value is expressed as a 16-bit word in two's complement.[get]
  5315. *
  5316. * @param ctx read / write interface definitions
  5317. * @param buff buffer that stores data read
  5318. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5319. *
  5320. */
  5321. int32_t lsm6dso_acceleration_raw_get(stmdev_ctx_t *ctx, int16_t *val)
  5322. {
  5323. uint8_t buff[6];
  5324. int32_t ret;
  5325. +
  5326. ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_A, buff, 6);
  5327. val[0] = (int16_t)buff[1];
  5328. val[0] = (val[0] * 256) + (int16_t)buff[0];
  5329. @@ -1322,6 +1472,7 @@ int32_t lsm6dso_acceleration_raw_get(stmdev_ctx_t *ctx, int16_t *val)
  5330. val[1] = (val[1] * 256) + (int16_t)buff[2];
  5331. val[2] = (int16_t)buff[5];
  5332. val[2] = (val[2] * 256) + (int16_t)buff[4];
  5333. +
  5334. return ret;
  5335. }
  5336. @@ -1330,12 +1481,15 @@ int32_t lsm6dso_acceleration_raw_get(stmdev_ctx_t *ctx, int16_t *val)
  5337. *
  5338. * @param ctx read / write interface definitions
  5339. * @param buff buffer that stores data read
  5340. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5341. *
  5342. */
  5343. int32_t lsm6dso_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5344. {
  5345. int32_t ret;
  5346. +
  5347. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_X_L, buff, 6);
  5348. +
  5349. return ret;
  5350. }
  5351. @@ -1344,19 +1498,23 @@ int32_t lsm6dso_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5352. *
  5353. * @param ctx read / write interface definitions
  5354. * @param buff buffer that stores data read
  5355. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5356. *
  5357. */
  5358. int32_t lsm6dso_number_of_steps_get(stmdev_ctx_t *ctx, uint16_t *val)
  5359. {
  5360. uint8_t buff[2];
  5361. int32_t ret;
  5362. +
  5363. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  5364. - if (ret == 0) {
  5365. + if (ret == 0)
  5366. + {
  5367. ret = lsm6dso_read_reg(ctx, LSM6DSO_STEP_COUNTER_L, buff, 2);
  5368. }
  5369. - if (ret == 0) {
  5370. + if (ret == 0)
  5371. + {
  5372. *val = buff[1];
  5373. *val = (*val * 256U) + buff[0];
  5374. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  5375. @@ -1369,25 +1527,29 @@ int32_t lsm6dso_number_of_steps_get(stmdev_ctx_t *ctx, uint16_t *val)
  5376. * @brief Reset step counter register.[get]
  5377. *
  5378. * @param ctx read / write interface definitions
  5379. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5380. *
  5381. */
  5382. int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx)
  5383. {
  5384. lsm6dso_emb_func_src_t reg;
  5385. int32_t ret;
  5386. +
  5387. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  5388. - if (ret == 0) {
  5389. + if (ret == 0)
  5390. + {
  5391. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg, 1);
  5392. }
  5393. - if (ret == 0) {
  5394. + if (ret == 0)
  5395. + {
  5396. reg.pedo_rst_step = PROPERTY_ENABLE;
  5397. - ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg,
  5398. - 1);
  5399. + ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg, 1);
  5400. }
  5401. - if (ret == 0) {
  5402. + if (ret == 0)
  5403. + {
  5404. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  5405. }
  5406. @@ -1404,7 +1566,7 @@ int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx)
  5407. * @brief This section groups common useful functions.
  5408. * @{
  5409. *
  5410. -*/
  5411. + */
  5412. /**
  5413. * @brief Difference in percentage of the effective ODR(and timestamp rate)
  5414. @@ -1414,16 +1576,19 @@ int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx)
  5415. * @param ctx read / write interface definitions
  5416. * @param val change the values of freq_fine in reg
  5417. * INTERNAL_FREQ_FINE
  5418. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5419. *
  5420. */
  5421. int32_t lsm6dso_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val)
  5422. {
  5423. lsm6dso_internal_freq_fine_t reg;
  5424. int32_t ret;
  5425. +
  5426. ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
  5427. (uint8_t *)&reg, 1);
  5428. - if (ret == 0) {
  5429. + if (ret == 0)
  5430. + {
  5431. reg.freq_fine = val;
  5432. ret = lsm6dso_write_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
  5433. (uint8_t *)&reg, 1);
  5434. @@ -1439,15 +1604,18 @@ int32_t lsm6dso_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val)
  5435. *
  5436. * @param ctx read / write interface definitions
  5437. * @param val change the values of freq_fine in reg INTERNAL_FREQ_FINE
  5438. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5439. *
  5440. */
  5441. int32_t lsm6dso_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val)
  5442. {
  5443. lsm6dso_internal_freq_fine_t reg;
  5444. int32_t ret;
  5445. +
  5446. ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
  5447. (uint8_t *)&reg, 1);
  5448. *val = reg.freq_fine;
  5449. +
  5450. return ret;
  5451. }
  5452. @@ -1459,6 +1627,7 @@ int32_t lsm6dso_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val)
  5453. * @param ctx read / write interface definitions
  5454. * @param val change the values of reg_access in
  5455. * reg FUNC_CFG_ACCESS
  5456. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5457. *
  5458. */
  5459. int32_t lsm6dso_mem_bank_set(stmdev_ctx_t *ctx,
  5460. @@ -1466,13 +1635,13 @@ int32_t lsm6dso_mem_bank_set(stmdev_ctx_t *ctx,
  5461. {
  5462. lsm6dso_func_cfg_access_t reg;
  5463. int32_t ret;
  5464. - ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg,
  5465. - 1);
  5466. - if (ret == 0) {
  5467. + ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
  5468. +
  5469. + if (ret == 0)
  5470. + {
  5471. reg.reg_access = (uint8_t)val;
  5472. - ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg,
  5473. - 1);
  5474. + ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
  5475. }
  5476. return ret;
  5477. @@ -1485,6 +1654,7 @@ int32_t lsm6dso_mem_bank_set(stmdev_ctx_t *ctx,
  5478. * @param ctx read / write interface definitions
  5479. * @param val Get the values of reg_access in
  5480. * reg FUNC_CFG_ACCESS
  5481. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5482. *
  5483. */
  5484. int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx,
  5485. @@ -1492,10 +1662,11 @@ int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx,
  5486. {
  5487. lsm6dso_func_cfg_access_t reg;
  5488. int32_t ret;
  5489. - ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg,
  5490. - 1);
  5491. - switch (reg.reg_access) {
  5492. + ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
  5493. +
  5494. + switch (reg.reg_access)
  5495. + {
  5496. case LSM6DSO_USER_BANK:
  5497. *val = LSM6DSO_USER_BANK;
  5498. break;
  5499. @@ -1522,6 +1693,7 @@ int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx,
  5500. * @param ctx read / write interface definitions
  5501. * @param uint8_t address: page line address
  5502. * @param val value to write
  5503. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5504. *
  5505. */
  5506. int32_t lsm6dso_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address,
  5507. @@ -1531,51 +1703,57 @@ int32_t lsm6dso_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address,
  5508. lsm6dso_page_sel_t page_sel;
  5509. lsm6dso_page_address_t page_address;
  5510. int32_t ret;
  5511. +
  5512. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  5513. - if (ret == 0) {
  5514. + if (ret == 0)
  5515. + {
  5516. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5517. }
  5518. - if (ret == 0) {
  5519. + if (ret == 0)
  5520. + {
  5521. page_rw.page_rw = 0x02; /* page_write enable */
  5522. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  5523. - 1);
  5524. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5525. }
  5526. - if (ret == 0) {
  5527. - ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5528. - 1);
  5529. + if (ret == 0)
  5530. + {
  5531. + ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5532. }
  5533. - if (ret == 0) {
  5534. + if (ret == 0)
  5535. + {
  5536. page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
  5537. page_sel.not_used_01 = 1;
  5538. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5539. - 1);
  5540. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5541. }
  5542. - if (ret == 0) {
  5543. + if (ret == 0)
  5544. + {
  5545. page_address.page_addr = (uint8_t)address & 0xFFU;
  5546. ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
  5547. (uint8_t *)&page_address, 1);
  5548. }
  5549. - if (ret == 0) {
  5550. + if (ret == 0)
  5551. + {
  5552. ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
  5553. }
  5554. - if (ret == 0) {
  5555. + if (ret == 0)
  5556. + {
  5557. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5558. }
  5559. - if (ret == 0) {
  5560. + if (ret == 0)
  5561. + {
  5562. page_rw.page_rw = 0x00; /* page_write disable */
  5563. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  5564. - 1);
  5565. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5566. }
  5567. - if (ret == 0) {
  5568. + if (ret == 0)
  5569. + {
  5570. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  5571. }
  5572. @@ -1589,6 +1767,7 @@ int32_t lsm6dso_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address,
  5573. * @param uint8_t address: page line address
  5574. * @param uint8_t *buf: buffer to write
  5575. * @param uint8_t len: buffer len
  5576. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5577. *
  5578. */
  5579. int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
  5580. @@ -1599,49 +1778,55 @@ int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
  5581. lsm6dso_page_address_t page_address;
  5582. uint16_t addr_pointed;
  5583. int32_t ret;
  5584. +
  5585. uint8_t i ;
  5586. addr_pointed = address;
  5587. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  5588. - if (ret == 0) {
  5589. + if (ret == 0)
  5590. + {
  5591. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5592. }
  5593. - if (ret == 0) {
  5594. + if (ret == 0)
  5595. + {
  5596. page_rw.page_rw = 0x02; /* page_write enable*/
  5597. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  5598. - 1);
  5599. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5600. }
  5601. - if (ret == 0) {
  5602. - ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5603. - 1);
  5604. + if (ret == 0)
  5605. + {
  5606. + ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5607. }
  5608. - if (ret == 0) {
  5609. + if (ret == 0)
  5610. + {
  5611. page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
  5612. page_sel.not_used_01 = 1;
  5613. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5614. - 1);
  5615. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5616. }
  5617. - if (ret == 0) {
  5618. + if (ret == 0)
  5619. + {
  5620. page_address.page_addr = (uint8_t)(addr_pointed & 0x00FFU);
  5621. ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
  5622. (uint8_t *)&page_address, 1);
  5623. }
  5624. - if (ret == 0) {
  5625. - for (i = 0; ( (i < len) && (ret == 0) ); i++) {
  5626. + if (ret == 0)
  5627. + {
  5628. + for (i = 0; ((i < len) && (ret == 0)); i++)
  5629. + {
  5630. ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, &buf[i], 1);
  5631. addr_pointed++;
  5632. /* Check if page wrap */
  5633. - if ( ( (addr_pointed % 0x0100U) == 0x00U ) && (ret == 0) ) {
  5634. - ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *)&page_sel,
  5635. - 1);
  5636. + if (((addr_pointed % 0x0100U) == 0x00U) && (ret == 0))
  5637. + {
  5638. + ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *)&page_sel, 1);
  5639. - if (ret == 0) {
  5640. + if (ret == 0)
  5641. + {
  5642. page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
  5643. page_sel.not_used_01 = 1;
  5644. ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL,
  5645. @@ -1652,21 +1837,22 @@ int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
  5646. page_sel.page_sel = 0;
  5647. page_sel.not_used_01 = 1;
  5648. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5649. - 1);
  5650. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5651. }
  5652. - if (ret == 0) {
  5653. + if (ret == 0)
  5654. + {
  5655. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5656. }
  5657. - if (ret == 0) {
  5658. + if (ret == 0)
  5659. + {
  5660. page_rw.page_rw = 0x00; /* page_write disable */
  5661. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  5662. - 1);
  5663. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5664. }
  5665. - if (ret == 0) {
  5666. + if (ret == 0)
  5667. + {
  5668. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  5669. }
  5670. @@ -1679,6 +1865,7 @@ int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
  5671. * @param ctx read / write interface definitions
  5672. * @param uint8_t address: page line address
  5673. * @param val read value
  5674. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5675. *
  5676. */
  5677. int32_t lsm6dso_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
  5678. @@ -1688,51 +1875,57 @@ int32_t lsm6dso_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
  5679. lsm6dso_page_sel_t page_sel;
  5680. lsm6dso_page_address_t page_address;
  5681. int32_t ret;
  5682. +
  5683. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  5684. - if (ret == 0) {
  5685. + if (ret == 0)
  5686. + {
  5687. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5688. }
  5689. - if (ret == 0) {
  5690. + if (ret == 0)
  5691. + {
  5692. page_rw.page_rw = 0x01; /* page_read enable*/
  5693. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  5694. - 1);
  5695. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5696. }
  5697. - if (ret == 0) {
  5698. - ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5699. - 1);
  5700. + if (ret == 0)
  5701. + {
  5702. + ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5703. }
  5704. - if (ret == 0) {
  5705. + if (ret == 0)
  5706. + {
  5707. page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
  5708. page_sel.not_used_01 = 1;
  5709. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel,
  5710. - 1);
  5711. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
  5712. }
  5713. - if (ret == 0) {
  5714. + if (ret == 0)
  5715. + {
  5716. page_address.page_addr = (uint8_t)address & 0x00FFU;
  5717. ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
  5718. (uint8_t *)&page_address, 1);
  5719. }
  5720. - if (ret == 0) {
  5721. + if (ret == 0)
  5722. + {
  5723. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
  5724. }
  5725. - if (ret == 0) {
  5726. + if (ret == 0)
  5727. + {
  5728. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5729. }
  5730. - if (ret == 0) {
  5731. + if (ret == 0)
  5732. + {
  5733. page_rw.page_rw = 0x00; /* page_read disable */
  5734. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  5735. - 1);
  5736. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  5737. }
  5738. - if (ret == 0) {
  5739. + if (ret == 0)
  5740. + {
  5741. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  5742. }
  5743. @@ -1746,6 +1939,7 @@ int32_t lsm6dso_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
  5744. * @param val change the values of
  5745. * dataready_pulsed in
  5746. * reg COUNTER_BDR_REG1
  5747. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5748. *
  5749. */
  5750. int32_t lsm6dso_data_ready_mode_set(stmdev_ctx_t *ctx,
  5751. @@ -1753,10 +1947,11 @@ int32_t lsm6dso_data_ready_mode_set(stmdev_ctx_t *ctx,
  5752. {
  5753. lsm6dso_counter_bdr_reg1_t reg;
  5754. int32_t ret;
  5755. - ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg,
  5756. - 1);
  5757. - if (ret == 0) {
  5758. + ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
  5759. +
  5760. + if (ret == 0)
  5761. + {
  5762. reg.dataready_pulsed = (uint8_t)val;
  5763. ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
  5764. (uint8_t *)&reg, 1);
  5765. @@ -1772,6 +1967,7 @@ int32_t lsm6dso_data_ready_mode_set(stmdev_ctx_t *ctx,
  5766. * @param val Get the values of
  5767. * dataready_pulsed in
  5768. * reg COUNTER_BDR_REG1
  5769. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5770. *
  5771. */
  5772. int32_t lsm6dso_data_ready_mode_get(stmdev_ctx_t *ctx,
  5773. @@ -1779,10 +1975,11 @@ int32_t lsm6dso_data_ready_mode_get(stmdev_ctx_t *ctx,
  5774. {
  5775. lsm6dso_counter_bdr_reg1_t reg;
  5776. int32_t ret;
  5777. - ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg,
  5778. - 1);
  5779. - switch (reg.dataready_pulsed) {
  5780. + ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
  5781. +
  5782. + switch (reg.dataready_pulsed)
  5783. + {
  5784. case LSM6DSO_DRDY_LATCHED:
  5785. *val = LSM6DSO_DRDY_LATCHED;
  5786. break;
  5787. @@ -1804,12 +2001,15 @@ int32_t lsm6dso_data_ready_mode_get(stmdev_ctx_t *ctx,
  5788. *
  5789. * @param ctx read / write interface definitions
  5790. * @param buff buffer that stores data read
  5791. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5792. *
  5793. */
  5794. int32_t lsm6dso_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5795. {
  5796. int32_t ret;
  5797. +
  5798. ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I, buff, 1);
  5799. +
  5800. return ret;
  5801. }
  5802. @@ -1819,15 +2019,18 @@ int32_t lsm6dso_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff)
  5803. *
  5804. * @param ctx read / write interface definitions
  5805. * @param val change the values of sw_reset in reg CTRL3_C
  5806. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5807. *
  5808. */
  5809. int32_t lsm6dso_reset_set(stmdev_ctx_t *ctx, uint8_t val)
  5810. {
  5811. lsm6dso_ctrl3_c_t reg;
  5812. int32_t ret;
  5813. +
  5814. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5815. - if (ret == 0) {
  5816. + if (ret == 0)
  5817. + {
  5818. reg.sw_reset = val;
  5819. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5820. }
  5821. @@ -1840,14 +2043,17 @@ int32_t lsm6dso_reset_set(stmdev_ctx_t *ctx, uint8_t val)
  5822. *
  5823. * @param ctx read / write interface definitions
  5824. * @param val change the values of sw_reset in reg CTRL3_C
  5825. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5826. *
  5827. */
  5828. int32_t lsm6dso_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
  5829. {
  5830. lsm6dso_ctrl3_c_t reg;
  5831. int32_t ret;
  5832. +
  5833. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5834. *val = reg.sw_reset;
  5835. +
  5836. return ret;
  5837. }
  5838. @@ -1857,15 +2063,18 @@ int32_t lsm6dso_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
  5839. *
  5840. * @param ctx read / write interface definitions
  5841. * @param val change the values of if_inc in reg CTRL3_C
  5842. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5843. *
  5844. */
  5845. int32_t lsm6dso_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val)
  5846. {
  5847. lsm6dso_ctrl3_c_t reg;
  5848. int32_t ret;
  5849. +
  5850. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5851. - if (ret == 0) {
  5852. + if (ret == 0)
  5853. + {
  5854. reg.if_inc = val;
  5855. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5856. }
  5857. @@ -1879,14 +2088,17 @@ int32_t lsm6dso_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val)
  5858. *
  5859. * @param ctx read / write interface definitions
  5860. * @param val change the values of if_inc in reg CTRL3_C
  5861. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5862. *
  5863. */
  5864. int32_t lsm6dso_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val)
  5865. {
  5866. lsm6dso_ctrl3_c_t reg;
  5867. int32_t ret;
  5868. +
  5869. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5870. *val = reg.if_inc;
  5871. +
  5872. return ret;
  5873. }
  5874. @@ -1895,15 +2107,18 @@ int32_t lsm6dso_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val)
  5875. *
  5876. * @param ctx read / write interface definitions
  5877. * @param val change the values of boot in reg CTRL3_C
  5878. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5879. *
  5880. */
  5881. int32_t lsm6dso_boot_set(stmdev_ctx_t *ctx, uint8_t val)
  5882. {
  5883. lsm6dso_ctrl3_c_t reg;
  5884. int32_t ret;
  5885. +
  5886. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5887. - if (ret == 0) {
  5888. + if (ret == 0)
  5889. + {
  5890. reg.boot = val;
  5891. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5892. }
  5893. @@ -1916,14 +2131,17 @@ int32_t lsm6dso_boot_set(stmdev_ctx_t *ctx, uint8_t val)
  5894. *
  5895. * @param ctx read / write interface definitions
  5896. * @param val change the values of boot in reg CTRL3_C
  5897. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5898. *
  5899. */
  5900. int32_t lsm6dso_boot_get(stmdev_ctx_t *ctx, uint8_t *val)
  5901. {
  5902. lsm6dso_ctrl3_c_t reg;
  5903. int32_t ret;
  5904. +
  5905. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  5906. *val = reg.boot;
  5907. +
  5908. return ret;
  5909. }
  5910. @@ -1932,6 +2150,7 @@ int32_t lsm6dso_boot_get(stmdev_ctx_t *ctx, uint8_t *val)
  5911. *
  5912. * @param ctx read / write interface definitions
  5913. * @param val change the values of st_xl in reg CTRL5_C
  5914. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5915. *
  5916. */
  5917. int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx,
  5918. @@ -1939,9 +2158,11 @@ int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx,
  5919. {
  5920. lsm6dso_ctrl5_c_t reg;
  5921. int32_t ret;
  5922. +
  5923. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5924. - if (ret == 0) {
  5925. + if (ret == 0)
  5926. + {
  5927. reg.st_xl = (uint8_t)val;
  5928. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5929. }
  5930. @@ -1954,6 +2175,7 @@ int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx,
  5931. *
  5932. * @param ctx read / write interface definitions
  5933. * @param val Get the values of st_xl in reg CTRL5_C
  5934. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5935. *
  5936. */
  5937. int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx,
  5938. @@ -1961,9 +2183,11 @@ int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx,
  5939. {
  5940. lsm6dso_ctrl5_c_t reg;
  5941. int32_t ret;
  5942. +
  5943. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5944. - switch (reg.st_xl) {
  5945. + switch (reg.st_xl)
  5946. + {
  5947. case LSM6DSO_XL_ST_DISABLE:
  5948. *val = LSM6DSO_XL_ST_DISABLE;
  5949. break;
  5950. @@ -1989,6 +2213,7 @@ int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx,
  5951. *
  5952. * @param ctx read / write interface definitions
  5953. * @param val change the values of st_g in reg CTRL5_C
  5954. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5955. *
  5956. */
  5957. int32_t lsm6dso_gy_self_test_set(stmdev_ctx_t *ctx,
  5958. @@ -1996,9 +2221,11 @@ int32_t lsm6dso_gy_self_test_set(stmdev_ctx_t *ctx,
  5959. {
  5960. lsm6dso_ctrl5_c_t reg;
  5961. int32_t ret;
  5962. +
  5963. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5964. - if (ret == 0) {
  5965. + if (ret == 0)
  5966. + {
  5967. reg.st_g = (uint8_t)val;
  5968. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5969. }
  5970. @@ -2011,6 +2238,7 @@ int32_t lsm6dso_gy_self_test_set(stmdev_ctx_t *ctx,
  5971. *
  5972. * @param ctx read / write interface definitions
  5973. * @param val Get the values of st_g in reg CTRL5_C
  5974. + * @retval interface status (MANDATORY: return 0 -> no Error)
  5975. *
  5976. */
  5977. int32_t lsm6dso_gy_self_test_get(stmdev_ctx_t *ctx,
  5978. @@ -2018,9 +2246,11 @@ int32_t lsm6dso_gy_self_test_get(stmdev_ctx_t *ctx,
  5979. {
  5980. lsm6dso_ctrl5_c_t reg;
  5981. int32_t ret;
  5982. +
  5983. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
  5984. - switch (reg.st_g) {
  5985. + switch (reg.st_g)
  5986. + {
  5987. case LSM6DSO_GY_ST_DISABLE:
  5988. *val = LSM6DSO_GY_ST_DISABLE;
  5989. break;
  5990. @@ -2052,22 +2282,25 @@ int32_t lsm6dso_gy_self_test_get(stmdev_ctx_t *ctx,
  5991. * filters configuration
  5992. * @{
  5993. *
  5994. -*/
  5995. + */
  5996. /**
  5997. * @brief Accelerometer output from LPF2 filtering stage selection.[set]
  5998. *
  5999. * @param ctx read / write interface definitions
  6000. * @param val change the values of lpf2_xl_en in reg CTRL1_XL
  6001. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6002. *
  6003. */
  6004. int32_t lsm6dso_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val)
  6005. {
  6006. lsm6dso_ctrl1_xl_t reg;
  6007. int32_t ret;
  6008. +
  6009. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  6010. - if (ret == 0) {
  6011. + if (ret == 0)
  6012. + {
  6013. reg.lpf2_xl_en = val;
  6014. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  6015. }
  6016. @@ -2080,14 +2313,17 @@ int32_t lsm6dso_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val)
  6017. *
  6018. * @param ctx read / write interface definitions
  6019. * @param val change the values of lpf2_xl_en in reg CTRL1_XL
  6020. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6021. *
  6022. */
  6023. int32_t lsm6dso_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val)
  6024. {
  6025. lsm6dso_ctrl1_xl_t reg;
  6026. int32_t ret;
  6027. +
  6028. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
  6029. *val = reg.lpf2_xl_en;
  6030. +
  6031. return ret;
  6032. }
  6033. @@ -2098,15 +2334,18 @@ int32_t lsm6dso_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val)
  6034. *
  6035. * @param ctx read / write interface definitions
  6036. * @param val change the values of lpf1_sel_g in reg CTRL4_C
  6037. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6038. *
  6039. */
  6040. int32_t lsm6dso_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val)
  6041. {
  6042. lsm6dso_ctrl4_c_t reg;
  6043. int32_t ret;
  6044. +
  6045. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  6046. - if (ret == 0) {
  6047. + if (ret == 0)
  6048. + {
  6049. reg.lpf1_sel_g = val;
  6050. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  6051. }
  6052. @@ -2121,14 +2360,17 @@ int32_t lsm6dso_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val)
  6053. *
  6054. * @param ctx read / write interface definitions
  6055. * @param val change the values of lpf1_sel_g in reg CTRL4_C
  6056. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6057. *
  6058. */
  6059. int32_t lsm6dso_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val)
  6060. {
  6061. lsm6dso_ctrl4_c_t reg;
  6062. int32_t ret;
  6063. +
  6064. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  6065. *val = reg.lpf1_sel_g;
  6066. +
  6067. return ret;
  6068. }
  6069. @@ -2138,6 +2380,7 @@ int32_t lsm6dso_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val)
  6070. *
  6071. * @param ctx read / write interface definitions
  6072. * @param val change the values of drdy_mask in reg CTRL4_C
  6073. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6074. *
  6075. */
  6076. int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
  6077. @@ -2145,9 +2388,11 @@ int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
  6078. {
  6079. lsm6dso_ctrl4_c_t reg;
  6080. int32_t ret;
  6081. +
  6082. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  6083. - if (ret == 0) {
  6084. + if (ret == 0)
  6085. + {
  6086. reg.drdy_mask = val;
  6087. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  6088. }
  6089. @@ -2161,6 +2406,7 @@ int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
  6090. *
  6091. * @param ctx read / write interface definitions
  6092. * @param val change the values of drdy_mask in reg CTRL4_C
  6093. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6094. *
  6095. */
  6096. int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
  6097. @@ -2168,8 +2414,10 @@ int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
  6098. {
  6099. lsm6dso_ctrl4_c_t reg;
  6100. int32_t ret;
  6101. +
  6102. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  6103. *val = reg.drdy_mask;
  6104. +
  6105. return ret;
  6106. }
  6107. @@ -2178,6 +2426,7 @@ int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
  6108. *
  6109. * @param ctx read / write interface definitions
  6110. * @param val change the values of ftype in reg CTRL6_C
  6111. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6112. *
  6113. */
  6114. int32_t lsm6dso_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  6115. @@ -2185,9 +2434,11 @@ int32_t lsm6dso_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  6116. {
  6117. lsm6dso_ctrl6_c_t reg;
  6118. int32_t ret;
  6119. +
  6120. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  6121. - if (ret == 0) {
  6122. + if (ret == 0)
  6123. + {
  6124. reg.ftype = (uint8_t)val;
  6125. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  6126. }
  6127. @@ -2200,6 +2451,7 @@ int32_t lsm6dso_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  6128. *
  6129. * @param ctx read / write interface definitions
  6130. * @param val Get the values of ftype in reg CTRL6_C
  6131. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6132. *
  6133. */
  6134. int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  6135. @@ -2207,9 +2459,11 @@ int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  6136. {
  6137. lsm6dso_ctrl6_c_t reg;
  6138. int32_t ret;
  6139. +
  6140. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  6141. - switch (reg.ftype) {
  6142. + switch (reg.ftype)
  6143. + {
  6144. case LSM6DSO_ULTRA_LIGHT:
  6145. *val = LSM6DSO_ULTRA_LIGHT;
  6146. break;
  6147. @@ -2255,15 +2509,18 @@ int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  6148. *
  6149. * @param ctx read / write interface definitions
  6150. * @param val change the values of low_pass_on_6d in reg CTRL8_XL
  6151. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6152. *
  6153. */
  6154. int32_t lsm6dso_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val)
  6155. {
  6156. lsm6dso_ctrl8_xl_t reg;
  6157. int32_t ret;
  6158. +
  6159. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6160. - if (ret == 0) {
  6161. + if (ret == 0)
  6162. + {
  6163. reg.low_pass_on_6d = val;
  6164. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6165. }
  6166. @@ -2276,14 +2533,17 @@ int32_t lsm6dso_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val)
  6167. *
  6168. * @param ctx read / write interface definitions
  6169. * @param val change the values of low_pass_on_6d in reg CTRL8_XL
  6170. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6171. *
  6172. */
  6173. int32_t lsm6dso_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val)
  6174. {
  6175. lsm6dso_ctrl8_xl_t reg;
  6176. int32_t ret;
  6177. +
  6178. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6179. *val = reg.low_pass_on_6d;
  6180. +
  6181. return ret;
  6182. }
  6183. @@ -2294,6 +2554,7 @@ int32_t lsm6dso_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val)
  6184. * @param ctx read / write interface definitions
  6185. * @param val change the values of hp_slope_xl_en
  6186. * in reg CTRL8_XL
  6187. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6188. *
  6189. */
  6190. int32_t lsm6dso_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
  6191. @@ -2301,9 +2562,11 @@ int32_t lsm6dso_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
  6192. {
  6193. lsm6dso_ctrl8_xl_t reg;
  6194. int32_t ret;
  6195. +
  6196. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6197. - if (ret == 0) {
  6198. + if (ret == 0)
  6199. + {
  6200. reg.hp_slope_xl_en = ((uint8_t)val & 0x10U) >> 4;
  6201. reg.hp_ref_mode_xl = ((uint8_t)val & 0x20U) >> 5;
  6202. reg.hpcf_xl = (uint8_t)val & 0x07U;
  6203. @@ -2320,6 +2583,7 @@ int32_t lsm6dso_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
  6204. * @param ctx read / write interface definitions
  6205. * @param val Get the values of hp_slope_xl_en
  6206. * in reg CTRL8_XL
  6207. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6208. *
  6209. */
  6210. int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
  6211. @@ -2327,10 +2591,12 @@ int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
  6212. {
  6213. lsm6dso_ctrl8_xl_t reg;
  6214. int32_t ret;
  6215. +
  6216. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6217. switch ((reg.hp_ref_mode_xl << 5) | (reg.hp_slope_xl_en << 4) |
  6218. - reg.hpcf_xl) {
  6219. + reg.hpcf_xl)
  6220. + {
  6221. case LSM6DSO_HP_PATH_DISABLE_ON_OUT:
  6222. *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
  6223. break;
  6224. @@ -2439,15 +2705,18 @@ int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
  6225. * @param ctx read / write interface definitions
  6226. * @param val change the values of fastsettl_mode_xl in
  6227. * reg CTRL8_XL
  6228. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6229. *
  6230. */
  6231. int32_t lsm6dso_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val)
  6232. {
  6233. lsm6dso_ctrl8_xl_t reg;
  6234. int32_t ret;
  6235. +
  6236. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6237. - if (ret == 0) {
  6238. + if (ret == 0)
  6239. + {
  6240. reg.fastsettl_mode_xl = val;
  6241. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6242. }
  6243. @@ -2462,14 +2731,17 @@ int32_t lsm6dso_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val)
  6244. *
  6245. * @param ctx read / write interface definitions
  6246. * @param val change the values of fastsettl_mode_xl in reg CTRL8_XL
  6247. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6248. *
  6249. */
  6250. int32_t lsm6dso_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val)
  6251. {
  6252. lsm6dso_ctrl8_xl_t reg;
  6253. int32_t ret;
  6254. +
  6255. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6256. *val = reg.fastsettl_mode_xl;
  6257. +
  6258. return ret;
  6259. }
  6260. @@ -2479,6 +2751,7 @@ int32_t lsm6dso_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val)
  6261. *
  6262. * @param ctx read / write interface definitions
  6263. * @param val change the values of slope_fds in reg TAP_CFG0
  6264. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6265. *
  6266. */
  6267. int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
  6268. @@ -2486,9 +2759,11 @@ int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
  6269. {
  6270. lsm6dso_tap_cfg0_t reg;
  6271. int32_t ret;
  6272. +
  6273. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  6274. - if (ret == 0) {
  6275. + if (ret == 0)
  6276. + {
  6277. reg.slope_fds = (uint8_t)val;
  6278. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  6279. }
  6280. @@ -2502,6 +2777,7 @@ int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
  6281. *
  6282. * @param ctx read / write interface definitions
  6283. * @param val Get the values of slope_fds in reg TAP_CFG0
  6284. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6285. *
  6286. */
  6287. int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
  6288. @@ -2509,9 +2785,11 @@ int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
  6289. {
  6290. lsm6dso_tap_cfg0_t reg;
  6291. int32_t ret;
  6292. +
  6293. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  6294. - switch (reg.slope_fds) {
  6295. + switch (reg.slope_fds)
  6296. + {
  6297. case LSM6DSO_USE_SLOPE:
  6298. *val = LSM6DSO_USE_SLOPE;
  6299. break;
  6300. @@ -2535,6 +2813,7 @@ int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
  6301. * @param ctx read / write interface definitions
  6302. * @param val Get the values of hp_en_g and hp_en_g
  6303. * in reg CTRL7_G
  6304. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6305. *
  6306. */
  6307. int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
  6308. @@ -2542,9 +2821,11 @@ int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
  6309. {
  6310. lsm6dso_ctrl7_g_t reg;
  6311. int32_t ret;
  6312. +
  6313. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  6314. - if (ret == 0) {
  6315. + if (ret == 0)
  6316. + {
  6317. reg.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
  6318. reg.hpm_g = (uint8_t)val & 0x03U;
  6319. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  6320. @@ -2560,6 +2841,7 @@ int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
  6321. * @param ctx read / write interface definitions
  6322. * @param val Get the values of hp_en_g and hp_en_g
  6323. * in reg CTRL7_G
  6324. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6325. *
  6326. */
  6327. int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
  6328. @@ -2567,9 +2849,11 @@ int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
  6329. {
  6330. lsm6dso_ctrl7_g_t reg;
  6331. int32_t ret;
  6332. +
  6333. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  6334. - switch ((reg.hp_en_g << 7) + reg.hpm_g) {
  6335. + switch ((reg.hp_en_g << 7) + reg.hpm_g)
  6336. + {
  6337. case LSM6DSO_HP_FILTER_NONE:
  6338. *val = LSM6DSO_HP_FILTER_NONE;
  6339. break;
  6340. @@ -2609,7 +2893,7 @@ int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
  6341. * auxiliary interface.
  6342. * @{
  6343. *
  6344. -*/
  6345. + */
  6346. /**
  6347. * @brief aOn auxiliary interface connect/disconnect SDO and OCS
  6348. @@ -2618,6 +2902,7 @@ int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
  6349. * @param ctx read / write interface definitions
  6350. * @param val change the values of ois_pu_dis in
  6351. * reg PIN_CTRL
  6352. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6353. *
  6354. */
  6355. int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
  6356. @@ -2625,9 +2910,11 @@ int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
  6357. {
  6358. lsm6dso_pin_ctrl_t reg;
  6359. int32_t ret;
  6360. +
  6361. ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
  6362. - if (ret == 0) {
  6363. + if (ret == 0)
  6364. + {
  6365. reg.ois_pu_dis = (uint8_t)val;
  6366. ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
  6367. }
  6368. @@ -2641,6 +2928,7 @@ int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
  6369. *
  6370. * @param ctx read / write interface definitions
  6371. * @param val Get the values of ois_pu_dis in reg PIN_CTRL
  6372. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6373. *
  6374. */
  6375. int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
  6376. @@ -2648,9 +2936,11 @@ int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
  6377. {
  6378. lsm6dso_pin_ctrl_t reg;
  6379. int32_t ret;
  6380. +
  6381. ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
  6382. - switch (reg.ois_pu_dis) {
  6383. + switch (reg.ois_pu_dis)
  6384. + {
  6385. case LSM6DSO_AUX_PULL_UP_DISC:
  6386. *val = LSM6DSO_AUX_PULL_UP_DISC;
  6387. break;
  6388. @@ -2672,6 +2962,7 @@ int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
  6389. *
  6390. * @param ctx read / write interface definitions
  6391. * @param val change the values of ois_on in reg CTRL7_G
  6392. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6393. *
  6394. */
  6395. int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx,
  6396. @@ -2679,9 +2970,11 @@ int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx,
  6397. {
  6398. lsm6dso_ctrl7_g_t reg;
  6399. int32_t ret;
  6400. +
  6401. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  6402. - if (ret == 0) {
  6403. + if (ret == 0)
  6404. + {
  6405. reg.ois_on_en = (uint8_t)val & 0x01U;
  6406. reg.ois_on = (uint8_t)val & 0x01U;
  6407. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  6408. @@ -2695,6 +2988,7 @@ int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx,
  6409. *
  6410. * @param ctx read / write interface definitions
  6411. * @param val Get the values of ois_on in reg CTRL7_G
  6412. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6413. *
  6414. */
  6415. int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx,
  6416. @@ -2702,9 +2996,11 @@ int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx,
  6417. {
  6418. lsm6dso_ctrl7_g_t reg;
  6419. int32_t ret;
  6420. +
  6421. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
  6422. - switch (reg.ois_on) {
  6423. + switch (reg.ois_on)
  6424. + {
  6425. case LSM6DSO_AUX_ON:
  6426. *val = LSM6DSO_AUX_ON;
  6427. break;
  6428. @@ -2732,6 +3028,7 @@ int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx,
  6429. * @param ctx read / write interface definitions
  6430. * @param val change the values of xl_fs_mode in
  6431. * reg CTRL8_XL
  6432. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6433. *
  6434. */
  6435. int32_t lsm6dso_aux_xl_fs_mode_set(stmdev_ctx_t *ctx,
  6436. @@ -2739,9 +3036,11 @@ int32_t lsm6dso_aux_xl_fs_mode_set(stmdev_ctx_t *ctx,
  6437. {
  6438. lsm6dso_ctrl8_xl_t reg;
  6439. int32_t ret;
  6440. +
  6441. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6442. - if (ret == 0) {
  6443. + if (ret == 0)
  6444. + {
  6445. reg.xl_fs_mode = (uint8_t)val;
  6446. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6447. }
  6448. @@ -2759,6 +3058,7 @@ int32_t lsm6dso_aux_xl_fs_mode_set(stmdev_ctx_t *ctx,
  6449. *
  6450. * @param ctx read / write interface definitions
  6451. * @param val Get the values of xl_fs_mode in reg CTRL8_XL
  6452. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6453. *
  6454. */
  6455. int32_t lsm6dso_aux_xl_fs_mode_get(stmdev_ctx_t *ctx,
  6456. @@ -2766,9 +3066,11 @@ int32_t lsm6dso_aux_xl_fs_mode_get(stmdev_ctx_t *ctx,
  6457. {
  6458. lsm6dso_ctrl8_xl_t reg;
  6459. int32_t ret;
  6460. +
  6461. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
  6462. - switch (reg.xl_fs_mode) {
  6463. + switch (reg.xl_fs_mode)
  6464. + {
  6465. case LSM6DSO_USE_SAME_XL_FS:
  6466. *val = LSM6DSO_USE_SAME_XL_FS;
  6467. break;
  6468. @@ -2790,14 +3092,16 @@ int32_t lsm6dso_aux_xl_fs_mode_get(stmdev_ctx_t *ctx,
  6469. *
  6470. * @param ctx read / write interface definitions
  6471. * @param lsm6dso_status_spiaux_t: registers STATUS_SPIAUX
  6472. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6473. *
  6474. */
  6475. int32_t lsm6dso_aux_status_reg_get(stmdev_ctx_t *ctx,
  6476. lsm6dso_status_spiaux_t *val)
  6477. {
  6478. int32_t ret;
  6479. - ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *) val,
  6480. - 1);
  6481. +
  6482. + ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *) val, 1);
  6483. +
  6484. return ret;
  6485. }
  6486. @@ -2806,6 +3110,7 @@ int32_t lsm6dso_aux_status_reg_get(stmdev_ctx_t *ctx,
  6487. *
  6488. * @param ctx read / write interface definitions
  6489. * @param val change the values of xlda in reg STATUS_SPIAUX
  6490. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6491. *
  6492. */
  6493. int32_t lsm6dso_aux_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
  6494. @@ -2813,9 +3118,10 @@ int32_t lsm6dso_aux_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
  6495. {
  6496. lsm6dso_status_spiaux_t reg;
  6497. int32_t ret;
  6498. - ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg,
  6499. - 1);
  6500. +
  6501. + ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
  6502. *val = reg.xlda;
  6503. +
  6504. return ret;
  6505. }
  6506. @@ -2824,6 +3130,7 @@ int32_t lsm6dso_aux_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
  6507. *
  6508. * @param ctx read / write interface definitions
  6509. * @param val change the values of gda in reg STATUS_SPIAUX
  6510. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6511. *
  6512. */
  6513. int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  6514. @@ -2831,9 +3138,10 @@ int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  6515. {
  6516. lsm6dso_status_spiaux_t reg;
  6517. int32_t ret;
  6518. - ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg,
  6519. - 1);
  6520. +
  6521. + ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
  6522. *val = reg.gda;
  6523. +
  6524. return ret;
  6525. }
  6526. @@ -2842,6 +3150,7 @@ int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  6527. *
  6528. * @param ctx read / write interface definitions
  6529. * @param val change the values of gyro_settling in reg STATUS_SPIAUX
  6530. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6531. *
  6532. */
  6533. int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx,
  6534. @@ -2849,9 +3158,10 @@ int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx,
  6535. {
  6536. lsm6dso_status_spiaux_t reg;
  6537. int32_t ret;
  6538. - ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg,
  6539. - 1);
  6540. +
  6541. + ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
  6542. *val = reg.gyro_settling;
  6543. +
  6544. return ret;
  6545. }
  6546. @@ -2861,6 +3171,7 @@ int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx,
  6547. *
  6548. * @param ctx read / write interface definitions
  6549. * @param val change the values of st_xl_ois in reg INT_OIS
  6550. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6551. *
  6552. */
  6553. int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
  6554. @@ -2868,9 +3179,11 @@ int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
  6555. {
  6556. lsm6dso_int_ois_t reg;
  6557. int32_t ret;
  6558. +
  6559. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6560. - if (ret == 0) {
  6561. + if (ret == 0)
  6562. + {
  6563. reg.st_xl_ois = (uint8_t)val;
  6564. ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6565. }
  6566. @@ -2884,6 +3197,7 @@ int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
  6567. *
  6568. * @param ctx read / write interface definitions
  6569. * @param val Get the values of st_xl_ois in reg INT_OIS
  6570. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6571. *
  6572. */
  6573. int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
  6574. @@ -2891,9 +3205,11 @@ int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
  6575. {
  6576. lsm6dso_int_ois_t reg;
  6577. int32_t ret;
  6578. +
  6579. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6580. - switch (reg.st_xl_ois) {
  6581. + switch (reg.st_xl_ois)
  6582. + {
  6583. case LSM6DSO_AUX_XL_DISABLE:
  6584. *val = LSM6DSO_AUX_XL_DISABLE;
  6585. break;
  6586. @@ -2920,6 +3236,7 @@ int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
  6587. * @param ctx read / write interface definitions
  6588. * @param val change the values of den_lh_ois in
  6589. * reg INT_OIS
  6590. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6591. *
  6592. */
  6593. int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
  6594. @@ -2927,9 +3244,11 @@ int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
  6595. {
  6596. lsm6dso_int_ois_t reg;
  6597. int32_t ret;
  6598. +
  6599. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6600. - if (ret == 0) {
  6601. + if (ret == 0)
  6602. + {
  6603. reg.den_lh_ois = (uint8_t)val;
  6604. ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6605. }
  6606. @@ -2942,6 +3261,7 @@ int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
  6607. *
  6608. * @param ctx read / write interface definitions
  6609. * @param val Get the values of den_lh_ois in reg INT_OIS
  6610. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6611. *
  6612. */
  6613. int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
  6614. @@ -2949,9 +3269,11 @@ int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
  6615. {
  6616. lsm6dso_int_ois_t reg;
  6617. int32_t ret;
  6618. +
  6619. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6620. - switch (reg.den_lh_ois) {
  6621. + switch (reg.den_lh_ois)
  6622. + {
  6623. case LSM6DSO_AUX_DEN_ACTIVE_LOW:
  6624. *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
  6625. break;
  6626. @@ -2973,6 +3295,7 @@ int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
  6627. *
  6628. * @param ctx read / write interface definitions
  6629. * @param val change the values of lvl2_ois in reg INT_OIS
  6630. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6631. *
  6632. */
  6633. int32_t lsm6dso_aux_den_mode_set(stmdev_ctx_t *ctx,
  6634. @@ -2981,20 +3304,22 @@ int32_t lsm6dso_aux_den_mode_set(stmdev_ctx_t *ctx,
  6635. lsm6dso_ctrl1_ois_t ctrl1_ois;
  6636. lsm6dso_int_ois_t int_ois;
  6637. int32_t ret;
  6638. +
  6639. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
  6640. - if (ret == 0) {
  6641. + if (ret == 0)
  6642. + {
  6643. int_ois.lvl2_ois = (uint8_t)val & 0x01U;
  6644. - ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois,
  6645. - 1);
  6646. + ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
  6647. }
  6648. - if (ret == 0) {
  6649. - ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois,
  6650. - 1);
  6651. + if (ret == 0)
  6652. + {
  6653. + ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
  6654. }
  6655. - if (ret == 0) {
  6656. + if (ret == 0)
  6657. + {
  6658. ctrl1_ois.lvl1_ois = ((uint8_t)val & 0x02U) >> 1;
  6659. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS,
  6660. (uint8_t *) &ctrl1_ois, 1);
  6661. @@ -3008,6 +3333,7 @@ int32_t lsm6dso_aux_den_mode_set(stmdev_ctx_t *ctx,
  6662. *
  6663. * @param ctx read / write interface definitions
  6664. * @param val Get the values of lvl2_ois in reg INT_OIS
  6665. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6666. *
  6667. */
  6668. int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx,
  6669. @@ -3016,13 +3342,15 @@ int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx,
  6670. lsm6dso_ctrl1_ois_t ctrl1_ois;
  6671. lsm6dso_int_ois_t int_ois;
  6672. int32_t ret;
  6673. +
  6674. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
  6675. - if (ret == 0) {
  6676. - ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois,
  6677. - 1);
  6678. + if (ret == 0)
  6679. + {
  6680. + ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
  6681. - switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois) {
  6682. + switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois)
  6683. + {
  6684. case LSM6DSO_AUX_DEN_DISABLE:
  6685. *val = LSM6DSO_AUX_DEN_DISABLE;
  6686. break;
  6687. @@ -3050,15 +3378,18 @@ int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx,
  6688. *
  6689. * @param ctx read / write interface definitions
  6690. * @param val change the values of int2_drdy_ois in reg INT_OIS
  6691. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6692. *
  6693. */
  6694. int32_t lsm6dso_aux_drdy_on_int2_set(stmdev_ctx_t *ctx, uint8_t val)
  6695. {
  6696. lsm6dso_int_ois_t reg;
  6697. int32_t ret;
  6698. +
  6699. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6700. - if (ret == 0) {
  6701. + if (ret == 0)
  6702. + {
  6703. reg.int2_drdy_ois = val;
  6704. ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6705. }
  6706. @@ -3072,14 +3403,17 @@ int32_t lsm6dso_aux_drdy_on_int2_set(stmdev_ctx_t *ctx, uint8_t val)
  6707. *
  6708. * @param ctx read / write interface definitions
  6709. * @param val change the values of int2_drdy_ois in reg INT_OIS
  6710. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6711. *
  6712. */
  6713. int32_t lsm6dso_aux_drdy_on_int2_get(stmdev_ctx_t *ctx, uint8_t *val)
  6714. {
  6715. lsm6dso_int_ois_t reg;
  6716. int32_t ret;
  6717. +
  6718. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
  6719. *val = reg.int2_drdy_ois;
  6720. +
  6721. return ret;
  6722. }
  6723. @@ -3094,6 +3428,7 @@ int32_t lsm6dso_aux_drdy_on_int2_get(stmdev_ctx_t *ctx, uint8_t *val)
  6724. * @param ctx read / write interface definitions
  6725. * @param val change the values of ois_en_spi2 in
  6726. * reg CTRL1_OIS
  6727. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6728. *
  6729. */
  6730. int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx,
  6731. @@ -3101,9 +3436,11 @@ int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx,
  6732. {
  6733. lsm6dso_ctrl1_ois_t reg;
  6734. int32_t ret;
  6735. +
  6736. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6737. - if (ret == 0) {
  6738. + if (ret == 0)
  6739. + {
  6740. reg.ois_en_spi2 = (uint8_t)val & 0x01U;
  6741. reg.mode4_en = ((uint8_t)val & 0x02U) >> 1;
  6742. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6743. @@ -3123,6 +3460,7 @@ int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx,
  6744. * @param ctx read / write interface definitions
  6745. * @param val Get the values of ois_en_spi2 in
  6746. * reg CTRL1_OIS
  6747. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6748. *
  6749. */
  6750. int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx,
  6751. @@ -3130,9 +3468,11 @@ int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx,
  6752. {
  6753. lsm6dso_ctrl1_ois_t reg;
  6754. int32_t ret;
  6755. +
  6756. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6757. - switch ((reg.mode4_en << 1) | reg.ois_en_spi2) {
  6758. + switch ((reg.mode4_en << 1) | reg.ois_en_spi2)
  6759. + {
  6760. case LSM6DSO_AUX_DISABLE:
  6761. *val = LSM6DSO_AUX_DISABLE;
  6762. break;
  6763. @@ -3158,6 +3498,7 @@ int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx,
  6764. *
  6765. * @param ctx read / write interface definitions
  6766. * @param val change the values of fs_g_ois in reg CTRL1_OIS
  6767. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6768. *
  6769. */
  6770. int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
  6771. @@ -3165,9 +3506,11 @@ int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
  6772. {
  6773. lsm6dso_ctrl1_ois_t reg;
  6774. int32_t ret;
  6775. +
  6776. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6777. - if (ret == 0) {
  6778. + if (ret == 0)
  6779. + {
  6780. reg.fs_g_ois = (uint8_t)val;
  6781. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6782. }
  6783. @@ -3180,6 +3523,7 @@ int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
  6784. *
  6785. * @param ctx read / write interface definitions
  6786. * @param val Get the values of fs_g_ois in reg CTRL1_OIS
  6787. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6788. *
  6789. */
  6790. int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
  6791. @@ -3187,9 +3531,11 @@ int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
  6792. {
  6793. lsm6dso_ctrl1_ois_t reg;
  6794. int32_t ret;
  6795. +
  6796. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6797. - switch (reg.fs_g_ois) {
  6798. + switch (reg.fs_g_ois)
  6799. + {
  6800. case LSM6DSO_250dps_AUX:
  6801. *val = LSM6DSO_250dps_AUX;
  6802. break;
  6803. @@ -3223,6 +3569,7 @@ int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
  6804. *
  6805. * @param ctx read / write interface definitions
  6806. * @param val change the values of sim_ois in reg CTRL1_OIS
  6807. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6808. *
  6809. */
  6810. int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx,
  6811. @@ -3230,9 +3577,11 @@ int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx,
  6812. {
  6813. lsm6dso_ctrl1_ois_t reg;
  6814. int32_t ret;
  6815. +
  6816. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6817. - if (ret == 0) {
  6818. + if (ret == 0)
  6819. + {
  6820. reg.sim_ois = (uint8_t)val;
  6821. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6822. }
  6823. @@ -3245,6 +3594,7 @@ int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx,
  6824. *
  6825. * @param ctx read / write interface definitions
  6826. * @param val Get the values of sim_ois in reg CTRL1_OIS
  6827. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6828. *
  6829. */
  6830. int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx,
  6831. @@ -3252,9 +3602,11 @@ int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx,
  6832. {
  6833. lsm6dso_ctrl1_ois_t reg;
  6834. int32_t ret;
  6835. +
  6836. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
  6837. - switch (reg.sim_ois) {
  6838. + switch (reg.sim_ois)
  6839. + {
  6840. case LSM6DSO_AUX_SPI_4_WIRE:
  6841. *val = LSM6DSO_AUX_SPI_4_WIRE;
  6842. break;
  6843. @@ -3277,6 +3629,7 @@ int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx,
  6844. * @param ctx read / write interface definitions
  6845. * @param val change the values of ftype_ois in
  6846. * reg CTRL2_OIS
  6847. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6848. *
  6849. */
  6850. int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  6851. @@ -3284,9 +3637,11 @@ int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  6852. {
  6853. lsm6dso_ctrl2_ois_t reg;
  6854. int32_t ret;
  6855. +
  6856. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
  6857. - if (ret == 0) {
  6858. + if (ret == 0)
  6859. + {
  6860. reg.ftype_ois = (uint8_t)val;
  6861. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
  6862. }
  6863. @@ -3299,6 +3654,7 @@ int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  6864. *
  6865. * @param ctx read / write interface definitions
  6866. * @param val Get the values of ftype_ois in reg CTRL2_OIS
  6867. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6868. *
  6869. */
  6870. int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  6871. @@ -3306,9 +3662,11 @@ int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  6872. {
  6873. lsm6dso_ctrl2_ois_t reg;
  6874. int32_t ret;
  6875. +
  6876. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
  6877. - switch (reg.ftype_ois) {
  6878. + switch (reg.ftype_ois)
  6879. + {
  6880. case LSM6DSO_351Hz39:
  6881. *val = LSM6DSO_351Hz39;
  6882. break;
  6883. @@ -3338,6 +3696,7 @@ int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  6884. *
  6885. * @param ctx read / write interface definitions
  6886. * @param val change the values of hpm_ois in reg CTRL2_OIS
  6887. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6888. *
  6889. */
  6890. int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
  6891. @@ -3345,9 +3704,11 @@ int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
  6892. {
  6893. lsm6dso_ctrl2_ois_t reg;
  6894. int32_t ret;
  6895. +
  6896. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
  6897. - if (ret == 0) {
  6898. + if (ret == 0)
  6899. + {
  6900. reg.hpm_ois = (uint8_t)val & 0x03U;
  6901. reg.hp_en_ois = ((uint8_t)val & 0x10U) >> 4;
  6902. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
  6903. @@ -3361,6 +3722,7 @@ int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
  6904. *
  6905. * @param ctx read / write interface definitions
  6906. * @param val Get the values of hpm_ois in reg CTRL2_OIS
  6907. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6908. *
  6909. */
  6910. int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
  6911. @@ -3368,9 +3730,11 @@ int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
  6912. {
  6913. lsm6dso_ctrl2_ois_t reg;
  6914. int32_t ret;
  6915. +
  6916. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
  6917. - switch ((reg.hp_en_ois << 4) | reg.hpm_ois) {
  6918. + switch ((reg.hp_en_ois << 4) | reg.hpm_ois)
  6919. + {
  6920. case LSM6DSO_AUX_HP_DISABLE:
  6921. *val = LSM6DSO_AUX_HP_DISABLE;
  6922. break;
  6923. @@ -3409,6 +3773,7 @@ int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
  6924. * @param ctx read / write interface definitions
  6925. * @param val change the values of st_ois_clampdis in
  6926. * reg CTRL3_OIS
  6927. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6928. *
  6929. */
  6930. int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
  6931. @@ -3416,9 +3781,11 @@ int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
  6932. {
  6933. lsm6dso_ctrl3_ois_t reg;
  6934. int32_t ret;
  6935. +
  6936. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  6937. - if (ret == 0) {
  6938. + if (ret == 0)
  6939. + {
  6940. reg.st_ois_clampdis = (uint8_t)val;
  6941. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  6942. }
  6943. @@ -3436,6 +3803,7 @@ int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
  6944. * @param ctx read / write interface definitions
  6945. * @param val Get the values of st_ois_clampdis in
  6946. * reg CTRL3_OIS
  6947. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6948. *
  6949. */
  6950. int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
  6951. @@ -3443,9 +3811,11 @@ int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
  6952. {
  6953. lsm6dso_ctrl3_ois_t reg;
  6954. int32_t ret;
  6955. +
  6956. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  6957. - switch (reg.st_ois_clampdis) {
  6958. + switch (reg.st_ois_clampdis)
  6959. + {
  6960. case LSM6DSO_ENABLE_CLAMP:
  6961. *val = LSM6DSO_ENABLE_CLAMP;
  6962. break;
  6963. @@ -3467,6 +3837,7 @@ int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
  6964. *
  6965. * @param ctx read / write interface definitions
  6966. * @param val change the values of st_ois in reg CTRL3_OIS
  6967. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6968. *
  6969. */
  6970. int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
  6971. @@ -3474,9 +3845,11 @@ int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
  6972. {
  6973. lsm6dso_ctrl3_ois_t reg;
  6974. int32_t ret;
  6975. +
  6976. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  6977. - if (ret == 0) {
  6978. + if (ret == 0)
  6979. + {
  6980. reg.st_ois = (uint8_t)val;
  6981. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  6982. }
  6983. @@ -3489,6 +3862,7 @@ int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
  6984. *
  6985. * @param ctx read / write interface definitions
  6986. * @param val Get the values of st_ois in reg CTRL3_OIS
  6987. + * @retval interface status (MANDATORY: return 0 -> no Error)
  6988. *
  6989. */
  6990. int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
  6991. @@ -3496,9 +3870,11 @@ int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
  6992. {
  6993. lsm6dso_ctrl3_ois_t reg;
  6994. int32_t ret;
  6995. +
  6996. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  6997. - switch (reg.st_ois) {
  6998. + switch (reg.st_ois)
  6999. + {
  7000. case LSM6DSO_AUX_GY_DISABLE:
  7001. *val = LSM6DSO_AUX_GY_DISABLE;
  7002. break;
  7003. @@ -3525,6 +3901,7 @@ int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
  7004. * @param ctx read / write interface definitions
  7005. * @param val change the values of
  7006. * filter_xl_conf_ois in reg CTRL3_OIS
  7007. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7008. *
  7009. */
  7010. int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
  7011. @@ -3532,9 +3909,11 @@ int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
  7012. {
  7013. lsm6dso_ctrl3_ois_t reg;
  7014. int32_t ret;
  7015. +
  7016. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  7017. - if (ret == 0) {
  7018. + if (ret == 0)
  7019. + {
  7020. reg.filter_xl_conf_ois = (uint8_t)val;
  7021. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  7022. }
  7023. @@ -3548,6 +3927,7 @@ int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
  7024. * @param ctx read / write interface definitions
  7025. * @param val Get the values of
  7026. * filter_xl_conf_ois in reg CTRL3_OIS
  7027. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7028. *
  7029. */
  7030. int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
  7031. @@ -3555,9 +3935,11 @@ int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
  7032. {
  7033. lsm6dso_ctrl3_ois_t reg;
  7034. int32_t ret;
  7035. +
  7036. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  7037. - switch (reg.filter_xl_conf_ois) {
  7038. + switch (reg.filter_xl_conf_ois)
  7039. + {
  7040. case LSM6DSO_289Hz:
  7041. *val = LSM6DSO_289Hz;
  7042. break;
  7043. @@ -3604,6 +3986,7 @@ int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
  7044. * @param ctx read / write interface definitions
  7045. * @param val change the values of fs_xl_ois in
  7046. * reg CTRL3_OIS
  7047. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7048. *
  7049. */
  7050. int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
  7051. @@ -3611,9 +3994,11 @@ int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
  7052. {
  7053. lsm6dso_ctrl3_ois_t reg;
  7054. int32_t ret;
  7055. +
  7056. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  7057. - if (ret == 0) {
  7058. + if (ret == 0)
  7059. + {
  7060. reg.fs_xl_ois = (uint8_t)val;
  7061. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  7062. }
  7063. @@ -3626,6 +4011,7 @@ int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
  7064. *
  7065. * @param ctx read / write interface definitions
  7066. * @param val Get the values of fs_xl_ois in reg CTRL3_OIS
  7067. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7068. *
  7069. */
  7070. int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
  7071. @@ -3633,9 +4019,11 @@ int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
  7072. {
  7073. lsm6dso_ctrl3_ois_t reg;
  7074. int32_t ret;
  7075. +
  7076. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
  7077. - switch (reg.fs_xl_ois) {
  7078. + switch (reg.fs_xl_ois)
  7079. + {
  7080. case LSM6DSO_AUX_2g:
  7081. *val = LSM6DSO_AUX_2g;
  7082. break;
  7083. @@ -3671,7 +4059,7 @@ int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
  7084. * serial interface management (not auxiliary)
  7085. * @{
  7086. *
  7087. -*/
  7088. + */
  7089. /**
  7090. * @brief Connect/Disconnect SDO/SA0 internal pull-up.[set]
  7091. @@ -3679,6 +4067,7 @@ int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
  7092. * @param ctx read / write interface definitions
  7093. * @param val change the values of sdo_pu_en in
  7094. * reg PIN_CTRL
  7095. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7096. *
  7097. */
  7098. int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
  7099. @@ -3686,9 +4075,11 @@ int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
  7100. {
  7101. lsm6dso_pin_ctrl_t reg;
  7102. int32_t ret;
  7103. +
  7104. ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
  7105. - if (ret == 0) {
  7106. + if (ret == 0)
  7107. + {
  7108. reg.sdo_pu_en = (uint8_t)val;
  7109. ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
  7110. }
  7111. @@ -3701,6 +4092,7 @@ int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
  7112. *
  7113. * @param ctx read / write interface definitions
  7114. * @param val Get the values of sdo_pu_en in reg PIN_CTRL
  7115. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7116. *
  7117. */
  7118. int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
  7119. @@ -3708,9 +4100,11 @@ int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
  7120. {
  7121. lsm6dso_pin_ctrl_t reg;
  7122. int32_t ret;
  7123. +
  7124. ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
  7125. - switch (reg.sdo_pu_en) {
  7126. + switch (reg.sdo_pu_en)
  7127. + {
  7128. case LSM6DSO_PULL_UP_DISC:
  7129. *val = LSM6DSO_PULL_UP_DISC;
  7130. break;
  7131. @@ -3732,15 +4126,18 @@ int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
  7132. *
  7133. * @param ctx read / write interface definitions
  7134. * @param val change the values of sim in reg CTRL3_C
  7135. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7136. *
  7137. */
  7138. int32_t lsm6dso_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_t val)
  7139. {
  7140. lsm6dso_ctrl3_c_t reg;
  7141. int32_t ret;
  7142. +
  7143. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7144. - if (ret == 0) {
  7145. + if (ret == 0)
  7146. + {
  7147. reg.sim = (uint8_t)val;
  7148. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7149. }
  7150. @@ -3753,15 +4150,18 @@ int32_t lsm6dso_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_t val)
  7151. *
  7152. * @param ctx read / write interface definitions
  7153. * @param val Get the values of sim in reg CTRL3_C
  7154. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7155. *
  7156. */
  7157. int32_t lsm6dso_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_t *val)
  7158. {
  7159. lsm6dso_ctrl3_c_t reg;
  7160. int32_t ret;
  7161. +
  7162. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7163. - switch (reg.sim) {
  7164. + switch (reg.sim)
  7165. + {
  7166. case LSM6DSO_SPI_4_WIRE:
  7167. *val = LSM6DSO_SPI_4_WIRE;
  7168. break;
  7169. @@ -3784,6 +4184,7 @@ int32_t lsm6dso_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_t *val)
  7170. * @param ctx read / write interface definitions
  7171. * @param val change the values of i2c_disable in
  7172. * reg CTRL4_C
  7173. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7174. *
  7175. */
  7176. int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
  7177. @@ -3791,9 +4192,11 @@ int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
  7178. {
  7179. lsm6dso_ctrl4_c_t reg;
  7180. int32_t ret;
  7181. +
  7182. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7183. - if (ret == 0) {
  7184. + if (ret == 0)
  7185. + {
  7186. reg.i2c_disable = (uint8_t)val;
  7187. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7188. }
  7189. @@ -3807,6 +4210,7 @@ int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
  7190. * @param ctx read / write interface definitions
  7191. * @param val Get the values of i2c_disable in
  7192. * reg CTRL4_C
  7193. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7194. *
  7195. */
  7196. int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
  7197. @@ -3814,9 +4218,11 @@ int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
  7198. {
  7199. lsm6dso_ctrl4_c_t reg;
  7200. int32_t ret;
  7201. +
  7202. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7203. - switch (reg.i2c_disable) {
  7204. + switch (reg.i2c_disable)
  7205. + {
  7206. case LSM6DSO_I2C_ENABLE:
  7207. *val = LSM6DSO_I2C_ENABLE;
  7208. break;
  7209. @@ -3839,6 +4245,7 @@ int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
  7210. * @param ctx read / write interface definitions
  7211. * @param val change the values of i3c_disable
  7212. * in reg CTRL9_XL
  7213. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7214. *
  7215. */
  7216. int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
  7217. @@ -3847,21 +4254,23 @@ int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
  7218. lsm6dso_i3c_bus_avb_t i3c_bus_avb;
  7219. lsm6dso_ctrl9_xl_t ctrl9_xl;
  7220. int32_t ret;
  7221. - ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl,
  7222. - 1);
  7223. - if (ret == 0) {
  7224. + ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
  7225. +
  7226. + if (ret == 0)
  7227. + {
  7228. ctrl9_xl.i3c_disable = ((uint8_t)val & 0x80U) >> 7;
  7229. - ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl,
  7230. - 1);
  7231. + ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
  7232. }
  7233. - if (ret == 0) {
  7234. + if (ret == 0)
  7235. + {
  7236. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  7237. (uint8_t *)&i3c_bus_avb, 1);
  7238. }
  7239. - if (ret == 0) {
  7240. + if (ret == 0)
  7241. + {
  7242. i3c_bus_avb.i3c_bus_avb_sel = (uint8_t)val & 0x03U;
  7243. ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  7244. (uint8_t *)&i3c_bus_avb, 1);
  7245. @@ -3876,6 +4285,7 @@ int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
  7246. * @param ctx read / write interface definitions
  7247. * @param val change the values of i3c_disable in
  7248. * reg CTRL9_XL
  7249. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7250. *
  7251. */
  7252. int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
  7253. @@ -3884,14 +4294,16 @@ int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
  7254. lsm6dso_ctrl9_xl_t ctrl9_xl;
  7255. lsm6dso_i3c_bus_avb_t i3c_bus_avb;
  7256. int32_t ret;
  7257. - ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl,
  7258. - 1);
  7259. - if (ret == 0) {
  7260. + ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
  7261. +
  7262. + if (ret == 0)
  7263. + {
  7264. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  7265. (uint8_t *)&i3c_bus_avb, 1);
  7266. - switch ((ctrl9_xl.i3c_disable << 7) | i3c_bus_avb.i3c_bus_avb_sel) {
  7267. + switch ((ctrl9_xl.i3c_disable << 7) | i3c_bus_avb.i3c_bus_avb_sel)
  7268. + {
  7269. case LSM6DSO_I3C_DISABLE:
  7270. *val = LSM6DSO_I3C_DISABLE;
  7271. break;
  7272. @@ -3938,6 +4350,7 @@ int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
  7273. *
  7274. * @param ctx read / write interface definitions
  7275. * @param val change the values of pd_dis_int1 in reg I3C_BUS_AVB
  7276. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7277. *
  7278. */
  7279. int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
  7280. @@ -3945,9 +4358,11 @@ int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
  7281. {
  7282. lsm6dso_i3c_bus_avb_t reg;
  7283. int32_t ret;
  7284. +
  7285. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)&reg, 1);
  7286. - if (ret == 0) {
  7287. + if (ret == 0)
  7288. + {
  7289. reg.pd_dis_int1 = (uint8_t)val;
  7290. ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)&reg, 1);
  7291. }
  7292. @@ -3960,6 +4375,7 @@ int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
  7293. *
  7294. * @param ctx read / write interface definitions
  7295. * @param val Get the values of pd_dis_int1 in reg I3C_BUS_AVB
  7296. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7297. *
  7298. */
  7299. int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
  7300. @@ -3967,9 +4383,11 @@ int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
  7301. {
  7302. lsm6dso_i3c_bus_avb_t reg;
  7303. int32_t ret;
  7304. +
  7305. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)&reg, 1);
  7306. - switch (reg.pd_dis_int1) {
  7307. + switch (reg.pd_dis_int1)
  7308. + {
  7309. case LSM6DSO_PULL_DOWN_DISC:
  7310. *val = LSM6DSO_PULL_DOWN_DISC;
  7311. break;
  7312. @@ -3991,15 +4409,18 @@ int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
  7313. *
  7314. * @param ctx read / write interface definitions
  7315. * @param val change the values of pp_od in reg CTRL3_C
  7316. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7317. *
  7318. */
  7319. int32_t lsm6dso_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_pp_od_t val)
  7320. {
  7321. lsm6dso_ctrl3_c_t reg;
  7322. int32_t ret;
  7323. +
  7324. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7325. - if (ret == 0) {
  7326. + if (ret == 0)
  7327. + {
  7328. reg.pp_od = (uint8_t)val;
  7329. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7330. }
  7331. @@ -4012,15 +4433,18 @@ int32_t lsm6dso_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_pp_od_t val)
  7332. *
  7333. * @param ctx read / write interface definitions
  7334. * @param val Get the values of pp_od in reg CTRL3_C
  7335. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7336. *
  7337. */
  7338. int32_t lsm6dso_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_pp_od_t *val)
  7339. {
  7340. lsm6dso_ctrl3_c_t reg;
  7341. int32_t ret;
  7342. +
  7343. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7344. - switch (reg.pp_od) {
  7345. + switch (reg.pp_od)
  7346. + {
  7347. case LSM6DSO_PUSH_PULL:
  7348. *val = LSM6DSO_PUSH_PULL;
  7349. break;
  7350. @@ -4042,6 +4466,7 @@ int32_t lsm6dso_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_pp_od_t *val)
  7351. *
  7352. * @param ctx read / write interface definitions
  7353. * @param val change the values of h_lactive in reg CTRL3_C
  7354. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7355. *
  7356. */
  7357. int32_t lsm6dso_pin_polarity_set(stmdev_ctx_t *ctx,
  7358. @@ -4049,9 +4474,11 @@ int32_t lsm6dso_pin_polarity_set(stmdev_ctx_t *ctx,
  7359. {
  7360. lsm6dso_ctrl3_c_t reg;
  7361. int32_t ret;
  7362. +
  7363. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7364. - if (ret == 0) {
  7365. + if (ret == 0)
  7366. + {
  7367. reg.h_lactive = (uint8_t)val;
  7368. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7369. }
  7370. @@ -4064,6 +4491,7 @@ int32_t lsm6dso_pin_polarity_set(stmdev_ctx_t *ctx,
  7371. *
  7372. * @param ctx read / write interface definitions
  7373. * @param val Get the values of h_lactive in reg CTRL3_C
  7374. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7375. *
  7376. */
  7377. int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
  7378. @@ -4071,9 +4499,11 @@ int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
  7379. {
  7380. lsm6dso_ctrl3_c_t reg;
  7381. int32_t ret;
  7382. +
  7383. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
  7384. - switch (reg.h_lactive) {
  7385. + switch (reg.h_lactive)
  7386. + {
  7387. case LSM6DSO_ACTIVE_HIGH:
  7388. *val = LSM6DSO_ACTIVE_HIGH;
  7389. break;
  7390. @@ -4095,15 +4525,18 @@ int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
  7391. *
  7392. * @param ctx read / write interface definitions
  7393. * @param val change the values of int2_on_int1 in reg CTRL4_C
  7394. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7395. *
  7396. */
  7397. int32_t lsm6dso_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val)
  7398. {
  7399. lsm6dso_ctrl4_c_t reg;
  7400. int32_t ret;
  7401. +
  7402. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7403. - if (ret == 0) {
  7404. + if (ret == 0)
  7405. + {
  7406. reg.int2_on_int1 = val;
  7407. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7408. }
  7409. @@ -4116,14 +4549,17 @@ int32_t lsm6dso_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val)
  7410. *
  7411. * @param ctx read / write interface definitions
  7412. * @param val change the values of int2_on_int1 in reg CTRL4_C
  7413. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7414. *
  7415. */
  7416. int32_t lsm6dso_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val)
  7417. {
  7418. lsm6dso_ctrl4_c_t reg;
  7419. int32_t ret;
  7420. +
  7421. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7422. *val = reg.int2_on_int1;
  7423. +
  7424. return ret;
  7425. }
  7426. @@ -4132,6 +4568,7 @@ int32_t lsm6dso_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val)
  7427. *
  7428. * @param ctx read / write interface definitions
  7429. * @param val change the values of lir in reg TAP_CFG0
  7430. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7431. *
  7432. */
  7433. int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx,
  7434. @@ -4140,31 +4577,34 @@ int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx,
  7435. lsm6dso_tap_cfg0_t tap_cfg0;
  7436. lsm6dso_page_rw_t page_rw;
  7437. int32_t ret;
  7438. - ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0,
  7439. - 1);
  7440. - if (ret == 0) {
  7441. + ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
  7442. +
  7443. + if (ret == 0)
  7444. + {
  7445. tap_cfg0.lir = (uint8_t)val & 0x01U;
  7446. tap_cfg0.int_clr_on_read = (uint8_t)val & 0x01U;
  7447. - ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0,
  7448. - 1);
  7449. + ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
  7450. }
  7451. - if (ret == 0) {
  7452. + if (ret == 0)
  7453. + {
  7454. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  7455. }
  7456. - if (ret == 0) {
  7457. + if (ret == 0)
  7458. + {
  7459. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  7460. }
  7461. - if (ret == 0) {
  7462. + if (ret == 0)
  7463. + {
  7464. page_rw.emb_func_lir = ((uint8_t)val & 0x02U) >> 1;
  7465. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  7466. - 1);
  7467. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  7468. }
  7469. - if (ret == 0) {
  7470. + if (ret == 0)
  7471. + {
  7472. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  7473. }
  7474. @@ -4176,6 +4616,7 @@ int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx,
  7475. *
  7476. * @param ctx read / write interface definitions
  7477. * @param val Get the values of lir in reg TAP_CFG0
  7478. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7479. *
  7480. */
  7481. int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
  7482. @@ -4184,23 +4625,28 @@ int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
  7483. lsm6dso_tap_cfg0_t tap_cfg0;
  7484. lsm6dso_page_rw_t page_rw;
  7485. int32_t ret;
  7486. - ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0,
  7487. - 1);
  7488. - if (ret == 0) {
  7489. + ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
  7490. +
  7491. + if (ret == 0)
  7492. + {
  7493. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  7494. }
  7495. - if (ret == 0) {
  7496. + if (ret == 0)
  7497. + {
  7498. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  7499. }
  7500. - if (ret == 0) {
  7501. + if (ret == 0)
  7502. + {
  7503. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  7504. }
  7505. - if (ret == 0) {
  7506. - switch ((page_rw.emb_func_lir << 1) | tap_cfg0.lir) {
  7507. + if (ret == 0)
  7508. + {
  7509. + switch ((page_rw.emb_func_lir << 1) | tap_cfg0.lir)
  7510. + {
  7511. case LSM6DSO_ALL_INT_PULSED:
  7512. *val = LSM6DSO_ALL_INT_PULSED;
  7513. break;
  7514. @@ -4225,11 +4671,13 @@ int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
  7515. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  7516. }
  7517. - if (ret == 0) {
  7518. + if (ret == 0)
  7519. + {
  7520. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  7521. }
  7522. - if (ret == 0) {
  7523. + if (ret == 0)
  7524. + {
  7525. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  7526. }
  7527. @@ -4247,7 +4695,7 @@ int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
  7528. * event generation.
  7529. * @{
  7530. *
  7531. -*/
  7532. + */
  7533. /**
  7534. * @brief Weight of 1 LSB of wakeup threshold.[set]
  7535. @@ -4257,6 +4705,7 @@ int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
  7536. * @param ctx read / write interface definitions
  7537. * @param val change the values of wake_ths_w in
  7538. * reg WAKE_UP_DUR
  7539. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7540. *
  7541. */
  7542. int32_t lsm6dso_wkup_ths_weight_set(stmdev_ctx_t *ctx,
  7543. @@ -4264,9 +4713,11 @@ int32_t lsm6dso_wkup_ths_weight_set(stmdev_ctx_t *ctx,
  7544. {
  7545. lsm6dso_wake_up_dur_t reg;
  7546. int32_t ret;
  7547. +
  7548. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7549. - if (ret == 0) {
  7550. + if (ret == 0)
  7551. + {
  7552. reg.wake_ths_w = (uint8_t)val;
  7553. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7554. }
  7555. @@ -4282,6 +4733,7 @@ int32_t lsm6dso_wkup_ths_weight_set(stmdev_ctx_t *ctx,
  7556. * @param ctx read / write interface definitions
  7557. * @param val Get the values of wake_ths_w in
  7558. * reg WAKE_UP_DUR
  7559. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7560. *
  7561. */
  7562. int32_t lsm6dso_wkup_ths_weight_get(stmdev_ctx_t *ctx,
  7563. @@ -4289,9 +4741,11 @@ int32_t lsm6dso_wkup_ths_weight_get(stmdev_ctx_t *ctx,
  7564. {
  7565. lsm6dso_wake_up_dur_t reg;
  7566. int32_t ret;
  7567. +
  7568. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7569. - switch (reg.wake_ths_w) {
  7570. + switch (reg.wake_ths_w)
  7571. + {
  7572. case LSM6DSO_LSb_FS_DIV_64:
  7573. *val = LSM6DSO_LSb_FS_DIV_64;
  7574. break;
  7575. @@ -4314,15 +4768,18 @@ int32_t lsm6dso_wkup_ths_weight_get(stmdev_ctx_t *ctx,
  7576. *
  7577. * @param ctx read / write interface definitions
  7578. * @param val change the values of wk_ths in reg WAKE_UP_THS
  7579. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7580. *
  7581. */
  7582. int32_t lsm6dso_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
  7583. {
  7584. lsm6dso_wake_up_ths_t reg;
  7585. int32_t ret;
  7586. +
  7587. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  7588. - if (ret == 0) {
  7589. + if (ret == 0)
  7590. + {
  7591. reg.wk_ths = val;
  7592. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  7593. }
  7594. @@ -4336,14 +4793,17 @@ int32_t lsm6dso_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
  7595. *
  7596. * @param ctx read / write interface definitions
  7597. * @param val change the values of wk_ths in reg WAKE_UP_THS
  7598. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7599. *
  7600. */
  7601. int32_t lsm6dso_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val)
  7602. {
  7603. lsm6dso_wake_up_ths_t reg;
  7604. int32_t ret;
  7605. +
  7606. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  7607. *val = reg.wk_ths;
  7608. +
  7609. return ret;
  7610. }
  7611. @@ -4353,6 +4813,7 @@ int32_t lsm6dso_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val)
  7612. *
  7613. * @param ctx read / write interface definitions
  7614. * @param val change the values of usr_off_on_wu in reg WAKE_UP_THS
  7615. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7616. *
  7617. */
  7618. int32_t lsm6dso_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
  7619. @@ -4360,9 +4821,11 @@ int32_t lsm6dso_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
  7620. {
  7621. lsm6dso_wake_up_ths_t reg;
  7622. int32_t ret;
  7623. +
  7624. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  7625. - if (ret == 0) {
  7626. + if (ret == 0)
  7627. + {
  7628. reg.usr_off_on_wu = val;
  7629. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  7630. }
  7631. @@ -4376,6 +4839,7 @@ int32_t lsm6dso_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
  7632. *
  7633. * @param ctx read / write interface definitions
  7634. * @param val change the values of usr_off_on_wu in reg WAKE_UP_THS
  7635. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7636. *
  7637. */
  7638. int32_t lsm6dso_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
  7639. @@ -4383,8 +4847,10 @@ int32_t lsm6dso_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
  7640. {
  7641. lsm6dso_wake_up_ths_t reg;
  7642. int32_t ret;
  7643. +
  7644. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  7645. *val = reg.usr_off_on_wu;
  7646. +
  7647. return ret;
  7648. }
  7649. @@ -4394,15 +4860,18 @@ int32_t lsm6dso_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
  7650. *
  7651. * @param ctx read / write interface definitions
  7652. * @param val change the values of wake_dur in reg WAKE_UP_DUR
  7653. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7654. *
  7655. */
  7656. int32_t lsm6dso_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  7657. {
  7658. lsm6dso_wake_up_dur_t reg;
  7659. int32_t ret;
  7660. +
  7661. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7662. - if (ret == 0) {
  7663. + if (ret == 0)
  7664. + {
  7665. reg.wake_dur = val;
  7666. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7667. }
  7668. @@ -4416,14 +4885,17 @@ int32_t lsm6dso_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  7669. *
  7670. * @param ctx read / write interface definitions
  7671. * @param val change the values of wake_dur in reg WAKE_UP_DUR
  7672. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7673. *
  7674. */
  7675. int32_t lsm6dso_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  7676. {
  7677. lsm6dso_wake_up_dur_t reg;
  7678. int32_t ret;
  7679. +
  7680. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7681. *val = reg.wake_dur;
  7682. +
  7683. return ret;
  7684. }
  7685. @@ -4438,22 +4910,25 @@ int32_t lsm6dso_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  7686. * activity/inactivity detection.
  7687. * @{
  7688. *
  7689. -*/
  7690. + */
  7691. /**
  7692. * @brief Enables gyroscope Sleep mode.[set]
  7693. *
  7694. * @param ctx read / write interface definitions
  7695. * @param val change the values of sleep_g in reg CTRL4_C
  7696. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7697. *
  7698. */
  7699. int32_t lsm6dso_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val)
  7700. {
  7701. lsm6dso_ctrl4_c_t reg;
  7702. int32_t ret;
  7703. +
  7704. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7705. - if (ret == 0) {
  7706. + if (ret == 0)
  7707. + {
  7708. reg.sleep_g = val;
  7709. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7710. }
  7711. @@ -4466,14 +4941,17 @@ int32_t lsm6dso_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val)
  7712. *
  7713. * @param ctx read / write interface definitions
  7714. * @param val change the values of sleep_g in reg CTRL4_C
  7715. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7716. *
  7717. */
  7718. int32_t lsm6dso_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
  7719. {
  7720. lsm6dso_ctrl4_c_t reg;
  7721. int32_t ret;
  7722. +
  7723. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
  7724. *val = reg.sleep_g;
  7725. +
  7726. return ret;
  7727. }
  7728. @@ -4485,6 +4963,7 @@ int32_t lsm6dso_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
  7729. *
  7730. * @param ctx read / write interface definitions
  7731. * @param val change the values of sleep_status_on_int in reg TAP_CFG0
  7732. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7733. *
  7734. */
  7735. int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
  7736. @@ -4492,9 +4971,11 @@ int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
  7737. {
  7738. lsm6dso_tap_cfg0_t reg;
  7739. int32_t ret;
  7740. +
  7741. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7742. - if (ret == 0) {
  7743. + if (ret == 0)
  7744. + {
  7745. reg.sleep_status_on_int = (uint8_t)val;
  7746. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7747. }
  7748. @@ -4510,6 +4991,7 @@ int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
  7749. *
  7750. * @param ctx read / write interface definitions
  7751. * @param val Get the values of sleep_status_on_int in reg TAP_CFG0
  7752. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7753. *
  7754. */
  7755. int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
  7756. @@ -4517,9 +4999,11 @@ int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
  7757. {
  7758. lsm6dso_tap_cfg0_t reg;
  7759. int32_t ret;
  7760. +
  7761. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7762. - switch (reg.sleep_status_on_int) {
  7763. + switch (reg.sleep_status_on_int)
  7764. + {
  7765. case LSM6DSO_DRIVE_SLEEP_CHG_EVENT:
  7766. *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
  7767. break;
  7768. @@ -4541,6 +5025,7 @@ int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
  7769. *
  7770. * @param ctx read / write interface definitions
  7771. * @param val change the values of inact_en in reg TAP_CFG2
  7772. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7773. *
  7774. */
  7775. int32_t lsm6dso_act_mode_set(stmdev_ctx_t *ctx,
  7776. @@ -4548,9 +5033,11 @@ int32_t lsm6dso_act_mode_set(stmdev_ctx_t *ctx,
  7777. {
  7778. lsm6dso_tap_cfg2_t reg;
  7779. int32_t ret;
  7780. +
  7781. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
  7782. - if (ret == 0) {
  7783. + if (ret == 0)
  7784. + {
  7785. reg.inact_en = (uint8_t)val;
  7786. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
  7787. }
  7788. @@ -4563,6 +5050,7 @@ int32_t lsm6dso_act_mode_set(stmdev_ctx_t *ctx,
  7789. *
  7790. * @param ctx read / write interface definitions
  7791. * @param val Get the values of inact_en in reg TAP_CFG2
  7792. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7793. *
  7794. */
  7795. int32_t lsm6dso_act_mode_get(stmdev_ctx_t *ctx,
  7796. @@ -4570,9 +5058,11 @@ int32_t lsm6dso_act_mode_get(stmdev_ctx_t *ctx,
  7797. {
  7798. lsm6dso_tap_cfg2_t reg;
  7799. int32_t ret;
  7800. +
  7801. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
  7802. - switch (reg.inact_en) {
  7803. + switch (reg.inact_en)
  7804. + {
  7805. case LSM6DSO_XL_AND_GY_NOT_AFFECTED:
  7806. *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
  7807. break;
  7808. @@ -4603,15 +5093,18 @@ int32_t lsm6dso_act_mode_get(stmdev_ctx_t *ctx,
  7809. *
  7810. * @param ctx read / write interface definitions
  7811. * @param val change the values of sleep_dur in reg WAKE_UP_DUR
  7812. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7813. *
  7814. */
  7815. int32_t lsm6dso_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  7816. {
  7817. lsm6dso_wake_up_dur_t reg;
  7818. int32_t ret;
  7819. +
  7820. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7821. - if (ret == 0) {
  7822. + if (ret == 0)
  7823. + {
  7824. reg.sleep_dur = val;
  7825. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7826. }
  7827. @@ -4625,14 +5118,17 @@ int32_t lsm6dso_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  7828. *
  7829. * @param ctx read / write interface definitions
  7830. * @param val change the values of sleep_dur in reg WAKE_UP_DUR
  7831. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7832. *
  7833. */
  7834. int32_t lsm6dso_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  7835. {
  7836. lsm6dso_wake_up_dur_t reg;
  7837. int32_t ret;
  7838. +
  7839. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
  7840. *val = reg.sleep_dur;
  7841. +
  7842. return ret;
  7843. }
  7844. @@ -4647,22 +5143,25 @@ int32_t lsm6dso_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  7845. * tap and double tap event generation.
  7846. * @{
  7847. *
  7848. -*/
  7849. + */
  7850. /**
  7851. * @brief Enable Z direction in tap recognition.[set]
  7852. *
  7853. * @param ctx read / write interface definitions
  7854. * @param val change the values of tap_z_en in reg TAP_CFG0
  7855. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7856. *
  7857. */
  7858. int32_t lsm6dso_tap_detection_on_z_set(stmdev_ctx_t *ctx, uint8_t val)
  7859. {
  7860. lsm6dso_tap_cfg0_t reg;
  7861. int32_t ret;
  7862. +
  7863. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7864. - if (ret == 0) {
  7865. + if (ret == 0)
  7866. + {
  7867. reg.tap_z_en = val;
  7868. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7869. }
  7870. @@ -4675,6 +5174,7 @@ int32_t lsm6dso_tap_detection_on_z_set(stmdev_ctx_t *ctx, uint8_t val)
  7871. *
  7872. * @param ctx read / write interface definitions
  7873. * @param val change the values of tap_z_en in reg TAP_CFG0
  7874. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7875. *
  7876. */
  7877. int32_t lsm6dso_tap_detection_on_z_get(stmdev_ctx_t *ctx,
  7878. @@ -4682,8 +5182,10 @@ int32_t lsm6dso_tap_detection_on_z_get(stmdev_ctx_t *ctx,
  7879. {
  7880. lsm6dso_tap_cfg0_t reg;
  7881. int32_t ret;
  7882. +
  7883. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7884. *val = reg.tap_z_en;
  7885. +
  7886. return ret;
  7887. }
  7888. @@ -4692,15 +5194,18 @@ int32_t lsm6dso_tap_detection_on_z_get(stmdev_ctx_t *ctx,
  7889. *
  7890. * @param ctx read / write interface definitions
  7891. * @param val change the values of tap_y_en in reg TAP_CFG0
  7892. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7893. *
  7894. */
  7895. int32_t lsm6dso_tap_detection_on_y_set(stmdev_ctx_t *ctx, uint8_t val)
  7896. {
  7897. lsm6dso_tap_cfg0_t reg;
  7898. int32_t ret;
  7899. +
  7900. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7901. - if (ret == 0) {
  7902. + if (ret == 0)
  7903. + {
  7904. reg.tap_y_en = val;
  7905. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7906. }
  7907. @@ -4713,6 +5218,7 @@ int32_t lsm6dso_tap_detection_on_y_set(stmdev_ctx_t *ctx, uint8_t val)
  7908. *
  7909. * @param ctx read / write interface definitions
  7910. * @param val change the values of tap_y_en in reg TAP_CFG0
  7911. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7912. *
  7913. */
  7914. int32_t lsm6dso_tap_detection_on_y_get(stmdev_ctx_t *ctx,
  7915. @@ -4720,8 +5226,10 @@ int32_t lsm6dso_tap_detection_on_y_get(stmdev_ctx_t *ctx,
  7916. {
  7917. lsm6dso_tap_cfg0_t reg;
  7918. int32_t ret;
  7919. +
  7920. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7921. *val = reg.tap_y_en;
  7922. +
  7923. return ret;
  7924. }
  7925. @@ -4730,15 +5238,18 @@ int32_t lsm6dso_tap_detection_on_y_get(stmdev_ctx_t *ctx,
  7926. *
  7927. * @param ctx read / write interface definitions
  7928. * @param val change the values of tap_x_en in reg TAP_CFG0
  7929. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7930. *
  7931. */
  7932. int32_t lsm6dso_tap_detection_on_x_set(stmdev_ctx_t *ctx, uint8_t val)
  7933. {
  7934. lsm6dso_tap_cfg0_t reg;
  7935. int32_t ret;
  7936. +
  7937. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7938. - if (ret == 0) {
  7939. + if (ret == 0)
  7940. + {
  7941. reg.tap_x_en = val;
  7942. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7943. }
  7944. @@ -4751,6 +5262,7 @@ int32_t lsm6dso_tap_detection_on_x_set(stmdev_ctx_t *ctx, uint8_t val)
  7945. *
  7946. * @param ctx read / write interface definitions
  7947. * @param val change the values of tap_x_en in reg TAP_CFG0
  7948. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7949. *
  7950. */
  7951. int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx,
  7952. @@ -4758,8 +5270,10 @@ int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx,
  7953. {
  7954. lsm6dso_tap_cfg0_t reg;
  7955. int32_t ret;
  7956. +
  7957. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
  7958. *val = reg.tap_x_en;
  7959. +
  7960. return ret;
  7961. }
  7962. @@ -4768,15 +5282,18 @@ int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx,
  7963. *
  7964. * @param ctx read / write interface definitions
  7965. * @param val change the values of tap_ths_x in reg TAP_CFG1
  7966. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7967. *
  7968. */
  7969. int32_t lsm6dso_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val)
  7970. {
  7971. lsm6dso_tap_cfg1_t reg;
  7972. int32_t ret;
  7973. +
  7974. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
  7975. - if (ret == 0) {
  7976. + if (ret == 0)
  7977. + {
  7978. reg.tap_ths_x = val;
  7979. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
  7980. }
  7981. @@ -4789,14 +5306,17 @@ int32_t lsm6dso_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val)
  7982. *
  7983. * @param ctx read / write interface definitions
  7984. * @param val change the values of tap_ths_x in reg TAP_CFG1
  7985. + * @retval interface status (MANDATORY: return 0 -> no Error)
  7986. *
  7987. */
  7988. int32_t lsm6dso_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val)
  7989. {
  7990. lsm6dso_tap_cfg1_t reg;
  7991. int32_t ret;
  7992. +
  7993. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
  7994. *val = reg.tap_ths_x;
  7995. +
  7996. return ret;
  7997. }
  7998. @@ -4806,6 +5326,7 @@ int32_t lsm6dso_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val)
  7999. * @param ctx read / write interface definitions
  8000. * @param val change the values of tap_priority in
  8001. * reg TAP_CFG1
  8002. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8003. *
  8004. */
  8005. int32_t lsm6dso_tap_axis_priority_set(stmdev_ctx_t *ctx,
  8006. @@ -4813,9 +5334,11 @@ int32_t lsm6dso_tap_axis_priority_set(stmdev_ctx_t *ctx,
  8007. {
  8008. lsm6dso_tap_cfg1_t reg;
  8009. int32_t ret;
  8010. +
  8011. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
  8012. - if (ret == 0) {
  8013. + if (ret == 0)
  8014. + {
  8015. reg.tap_priority = (uint8_t)val;
  8016. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
  8017. }
  8018. @@ -4829,6 +5352,7 @@ int32_t lsm6dso_tap_axis_priority_set(stmdev_ctx_t *ctx,
  8019. * @param ctx read / write interface definitions
  8020. * @param val Get the values of tap_priority in
  8021. * reg TAP_CFG1
  8022. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8023. *
  8024. */
  8025. int32_t lsm6dso_tap_axis_priority_get(stmdev_ctx_t *ctx,
  8026. @@ -4836,9 +5360,11 @@ int32_t lsm6dso_tap_axis_priority_get(stmdev_ctx_t *ctx,
  8027. {
  8028. lsm6dso_tap_cfg1_t reg;
  8029. int32_t ret;
  8030. +
  8031. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
  8032. - switch (reg.tap_priority) {
  8033. + switch (reg.tap_priority)
  8034. + {
  8035. case LSM6DSO_XYZ:
  8036. *val = LSM6DSO_XYZ;
  8037. break;
  8038. @@ -4876,15 +5402,18 @@ int32_t lsm6dso_tap_axis_priority_get(stmdev_ctx_t *ctx,
  8039. *
  8040. * @param ctx read / write interface definitions
  8041. * @param val change the values of tap_ths_y in reg TAP_CFG2
  8042. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8043. *
  8044. */
  8045. int32_t lsm6dso_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val)
  8046. {
  8047. lsm6dso_tap_cfg2_t reg;
  8048. int32_t ret;
  8049. +
  8050. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
  8051. - if (ret == 0) {
  8052. + if (ret == 0)
  8053. + {
  8054. reg.tap_ths_y = val;
  8055. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
  8056. }
  8057. @@ -4897,14 +5426,17 @@ int32_t lsm6dso_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val)
  8058. *
  8059. * @param ctx read / write interface definitions
  8060. * @param val change the values of tap_ths_y in reg TAP_CFG2
  8061. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8062. *
  8063. */
  8064. int32_t lsm6dso_tap_threshold_y_get(stmdev_ctx_t *ctx, uint8_t *val)
  8065. {
  8066. lsm6dso_tap_cfg2_t reg;
  8067. int32_t ret;
  8068. +
  8069. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
  8070. *val = reg.tap_ths_y;
  8071. +
  8072. return ret;
  8073. }
  8074. @@ -4913,15 +5445,18 @@ int32_t lsm6dso_tap_threshold_y_get(stmdev_ctx_t *ctx, uint8_t *val)
  8075. *
  8076. * @param ctx read / write interface definitions
  8077. * @param val change the values of tap_ths_z in reg TAP_THS_6D
  8078. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8079. *
  8080. */
  8081. int32_t lsm6dso_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val)
  8082. {
  8083. lsm6dso_tap_ths_6d_t reg;
  8084. int32_t ret;
  8085. +
  8086. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8087. - if (ret == 0) {
  8088. + if (ret == 0)
  8089. + {
  8090. reg.tap_ths_z = val;
  8091. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8092. }
  8093. @@ -4934,14 +5469,17 @@ int32_t lsm6dso_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val)
  8094. *
  8095. * @param ctx read / write interface definitions
  8096. * @param val change the values of tap_ths_z in reg TAP_THS_6D
  8097. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8098. *
  8099. */
  8100. int32_t lsm6dso_tap_threshold_z_get(stmdev_ctx_t *ctx, uint8_t *val)
  8101. {
  8102. lsm6dso_tap_ths_6d_t reg;
  8103. int32_t ret;
  8104. +
  8105. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8106. *val = reg.tap_ths_z;
  8107. +
  8108. return ret;
  8109. }
  8110. @@ -4955,15 +5493,18 @@ int32_t lsm6dso_tap_threshold_z_get(stmdev_ctx_t *ctx, uint8_t *val)
  8111. *
  8112. * @param ctx read / write interface definitions
  8113. * @param val change the values of shock in reg INT_DUR2
  8114. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8115. *
  8116. */
  8117. int32_t lsm6dso_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val)
  8118. {
  8119. lsm6dso_int_dur2_t reg;
  8120. int32_t ret;
  8121. +
  8122. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8123. - if (ret == 0) {
  8124. + if (ret == 0)
  8125. + {
  8126. reg.shock = val;
  8127. ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8128. }
  8129. @@ -4981,14 +5522,17 @@ int32_t lsm6dso_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val)
  8130. *
  8131. * @param ctx read / write interface definitions
  8132. * @param val change the values of shock in reg INT_DUR2
  8133. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8134. *
  8135. */
  8136. int32_t lsm6dso_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val)
  8137. {
  8138. lsm6dso_int_dur2_t reg;
  8139. int32_t ret;
  8140. +
  8141. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8142. *val = reg.shock;
  8143. +
  8144. return ret;
  8145. }
  8146. @@ -5003,15 +5547,18 @@ int32_t lsm6dso_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val)
  8147. *
  8148. * @param ctx read / write interface definitions
  8149. * @param val change the values of quiet in reg INT_DUR2
  8150. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8151. *
  8152. */
  8153. int32_t lsm6dso_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val)
  8154. {
  8155. lsm6dso_int_dur2_t reg;
  8156. int32_t ret;
  8157. +
  8158. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8159. - if (ret == 0) {
  8160. + if (ret == 0)
  8161. + {
  8162. reg.quiet = val;
  8163. ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8164. }
  8165. @@ -5030,14 +5577,17 @@ int32_t lsm6dso_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val)
  8166. *
  8167. * @param ctx read / write interface definitions
  8168. * @param val change the values of quiet in reg INT_DUR2
  8169. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8170. *
  8171. */
  8172. int32_t lsm6dso_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val)
  8173. {
  8174. lsm6dso_int_dur2_t reg;
  8175. int32_t ret;
  8176. +
  8177. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8178. *val = reg.quiet;
  8179. +
  8180. return ret;
  8181. }
  8182. @@ -5053,15 +5603,18 @@ int32_t lsm6dso_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val)
  8183. *
  8184. * @param ctx read / write interface definitions
  8185. * @param val change the values of dur in reg INT_DUR2
  8186. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8187. *
  8188. */
  8189. int32_t lsm6dso_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  8190. {
  8191. lsm6dso_int_dur2_t reg;
  8192. int32_t ret;
  8193. +
  8194. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8195. - if (ret == 0) {
  8196. + if (ret == 0)
  8197. + {
  8198. reg.dur = val;
  8199. ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8200. }
  8201. @@ -5081,14 +5634,17 @@ int32_t lsm6dso_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  8202. *
  8203. * @param ctx read / write interface definitions
  8204. * @param val change the values of dur in reg INT_DUR2
  8205. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8206. *
  8207. */
  8208. int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  8209. {
  8210. lsm6dso_int_dur2_t reg;
  8211. int32_t ret;
  8212. +
  8213. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
  8214. *val = reg.dur;
  8215. +
  8216. return ret;
  8217. }
  8218. @@ -5097,6 +5653,7 @@ int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  8219. *
  8220. * @param ctx read / write interface definitions
  8221. * @param val change the values of single_double_tap in reg WAKE_UP_THS
  8222. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8223. *
  8224. */
  8225. int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
  8226. @@ -5104,9 +5661,11 @@ int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
  8227. {
  8228. lsm6dso_wake_up_ths_t reg;
  8229. int32_t ret;
  8230. +
  8231. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  8232. - if (ret == 0) {
  8233. + if (ret == 0)
  8234. + {
  8235. reg.single_double_tap = (uint8_t)val;
  8236. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  8237. }
  8238. @@ -5119,6 +5678,7 @@ int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
  8239. *
  8240. * @param ctx read / write interface definitions
  8241. * @param val Get the values of single_double_tap in reg WAKE_UP_THS
  8242. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8243. *
  8244. */
  8245. int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
  8246. @@ -5126,9 +5686,11 @@ int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
  8247. {
  8248. lsm6dso_wake_up_ths_t reg;
  8249. int32_t ret;
  8250. +
  8251. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
  8252. - switch (reg.single_double_tap) {
  8253. + switch (reg.single_double_tap)
  8254. + {
  8255. case LSM6DSO_ONLY_SINGLE:
  8256. *val = LSM6DSO_ONLY_SINGLE;
  8257. break;
  8258. @@ -5156,13 +5718,14 @@ int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
  8259. * detection (6D).
  8260. * @{
  8261. *
  8262. -*/
  8263. + */
  8264. /**
  8265. * @brief Threshold for 4D/6D function.[set]
  8266. *
  8267. * @param ctx read / write interface definitions
  8268. * @param val change the values of sixd_ths in reg TAP_THS_6D
  8269. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8270. *
  8271. */
  8272. int32_t lsm6dso_6d_threshold_set(stmdev_ctx_t *ctx,
  8273. @@ -5170,9 +5733,11 @@ int32_t lsm6dso_6d_threshold_set(stmdev_ctx_t *ctx,
  8274. {
  8275. lsm6dso_tap_ths_6d_t reg;
  8276. int32_t ret;
  8277. +
  8278. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8279. - if (ret == 0) {
  8280. + if (ret == 0)
  8281. + {
  8282. reg.sixd_ths = (uint8_t)val;
  8283. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8284. }
  8285. @@ -5185,6 +5750,7 @@ int32_t lsm6dso_6d_threshold_set(stmdev_ctx_t *ctx,
  8286. *
  8287. * @param ctx read / write interface definitions
  8288. * @param val Get the values of sixd_ths in reg TAP_THS_6D
  8289. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8290. *
  8291. */
  8292. int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx,
  8293. @@ -5192,9 +5758,11 @@ int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx,
  8294. {
  8295. lsm6dso_tap_ths_6d_t reg;
  8296. int32_t ret;
  8297. +
  8298. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8299. - switch (reg.sixd_ths) {
  8300. + switch (reg.sixd_ths)
  8301. + {
  8302. case LSM6DSO_DEG_80:
  8303. *val = LSM6DSO_DEG_80;
  8304. break;
  8305. @@ -5224,15 +5792,18 @@ int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx,
  8306. *
  8307. * @param ctx read / write interface definitions
  8308. * @param val change the values of d4d_en in reg TAP_THS_6D
  8309. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8310. *
  8311. */
  8312. int32_t lsm6dso_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val)
  8313. {
  8314. lsm6dso_tap_ths_6d_t reg;
  8315. int32_t ret;
  8316. +
  8317. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8318. - if (ret == 0) {
  8319. + if (ret == 0)
  8320. + {
  8321. reg.d4d_en = val;
  8322. ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8323. }
  8324. @@ -5245,14 +5816,17 @@ int32_t lsm6dso_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val)
  8325. *
  8326. * @param ctx read / write interface definitions
  8327. * @param val change the values of d4d_en in reg TAP_THS_6D
  8328. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8329. *
  8330. */
  8331. int32_t lsm6dso_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
  8332. {
  8333. lsm6dso_tap_ths_6d_t reg;
  8334. int32_t ret;
  8335. +
  8336. ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
  8337. *val = reg.d4d_en;
  8338. +
  8339. return ret;
  8340. }
  8341. @@ -5267,12 +5841,13 @@ int32_t lsm6dso_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
  8342. * fall detection.
  8343. * @{
  8344. *
  8345. -*/
  8346. + */
  8347. /**
  8348. * @brief Free fall threshold setting.[set]
  8349. *
  8350. * @param ctx read / write interface definitions
  8351. * @param val change the values of ff_ths in reg FREE_FALL
  8352. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8353. *
  8354. */
  8355. int32_t lsm6dso_ff_threshold_set(stmdev_ctx_t *ctx,
  8356. @@ -5280,9 +5855,11 @@ int32_t lsm6dso_ff_threshold_set(stmdev_ctx_t *ctx,
  8357. {
  8358. lsm6dso_free_fall_t reg;
  8359. int32_t ret;
  8360. +
  8361. ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&reg, 1);
  8362. - if (ret == 0) {
  8363. + if (ret == 0)
  8364. + {
  8365. reg.ff_ths = (uint8_t)val;
  8366. ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&reg, 1);
  8367. }
  8368. @@ -5295,6 +5872,7 @@ int32_t lsm6dso_ff_threshold_set(stmdev_ctx_t *ctx,
  8369. *
  8370. * @param ctx read / write interface definitions
  8371. * @param val Get the values of ff_ths in reg FREE_FALL
  8372. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8373. *
  8374. */
  8375. int32_t lsm6dso_ff_threshold_get(stmdev_ctx_t *ctx,
  8376. @@ -5302,9 +5880,11 @@ int32_t lsm6dso_ff_threshold_get(stmdev_ctx_t *ctx,
  8377. {
  8378. lsm6dso_free_fall_t reg;
  8379. int32_t ret;
  8380. +
  8381. ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&reg, 1);
  8382. - switch (reg.ff_ths) {
  8383. + switch (reg.ff_ths)
  8384. + {
  8385. case LSM6DSO_FF_TSH_156mg:
  8386. *val = LSM6DSO_FF_TSH_156mg;
  8387. break;
  8388. @@ -5351,6 +5931,7 @@ int32_t lsm6dso_ff_threshold_get(stmdev_ctx_t *ctx,
  8389. *
  8390. * @param ctx read / write interface definitions
  8391. * @param val change the values of ff_dur in reg FREE_FALL
  8392. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8393. *
  8394. */
  8395. int32_t lsm6dso_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  8396. @@ -5358,24 +5939,26 @@ int32_t lsm6dso_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  8397. lsm6dso_wake_up_dur_t wake_up_dur;
  8398. lsm6dso_free_fall_t free_fall;
  8399. int32_t ret;
  8400. +
  8401. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR,
  8402. (uint8_t *)&wake_up_dur, 1);
  8403. - if (ret == 0) {
  8404. - ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall,
  8405. - 1);
  8406. + if (ret == 0)
  8407. + {
  8408. + ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
  8409. }
  8410. - if (ret == 0) {
  8411. + if (ret == 0)
  8412. + {
  8413. wake_up_dur.ff_dur = ((uint8_t)val & 0x20U) >> 5;
  8414. free_fall.ff_dur = (uint8_t)val & 0x1FU;
  8415. ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR,
  8416. (uint8_t *)&wake_up_dur, 1);
  8417. }
  8418. - if (ret == 0) {
  8419. - ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall,
  8420. - 1);
  8421. + if (ret == 0)
  8422. + {
  8423. + ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
  8424. }
  8425. return ret;
  8426. @@ -5387,6 +5970,7 @@ int32_t lsm6dso_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val)
  8427. *
  8428. * @param ctx read / write interface definitions
  8429. * @param val change the values of ff_dur in reg FREE_FALL
  8430. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8431. *
  8432. */
  8433. int32_t lsm6dso_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  8434. @@ -5394,12 +5978,13 @@ int32_t lsm6dso_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  8435. lsm6dso_wake_up_dur_t wake_up_dur;
  8436. lsm6dso_free_fall_t free_fall;
  8437. int32_t ret;
  8438. +
  8439. ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR,
  8440. (uint8_t *)&wake_up_dur, 1);
  8441. - if (ret == 0) {
  8442. - ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall,
  8443. - 1);
  8444. + if (ret == 0)
  8445. + {
  8446. + ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
  8447. *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
  8448. }
  8449. @@ -5416,13 +6001,14 @@ int32_t lsm6dso_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
  8450. * @brief This section group all the functions concerning the fifo usage
  8451. * @{
  8452. *
  8453. -*/
  8454. + */
  8455. /**
  8456. * @brief FIFO watermark level selection.[set]
  8457. *
  8458. * @param ctx read / write interface definitions
  8459. * @param val change the values of wtm in reg FIFO_CTRL1
  8460. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8461. *
  8462. */
  8463. int32_t lsm6dso_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val)
  8464. @@ -5430,17 +6016,20 @@ int32_t lsm6dso_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val)
  8465. lsm6dso_fifo_ctrl1_t fifo_ctrl1;
  8466. lsm6dso_fifo_ctrl2_t fifo_ctrl2;
  8467. int32_t ret;
  8468. +
  8469. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
  8470. (uint8_t *)&fifo_ctrl2, 1);
  8471. - if (ret == 0) {
  8472. + if (ret == 0)
  8473. + {
  8474. fifo_ctrl1.wtm = 0x00FFU & (uint8_t)val;
  8475. - fifo_ctrl2.wtm = (uint8_t)(( 0x0100U & val ) >> 8);
  8476. + fifo_ctrl2.wtm = (uint8_t)((0x0100U & val) >> 8);
  8477. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL1,
  8478. (uint8_t *)&fifo_ctrl1, 1);
  8479. }
  8480. - if (ret == 0) {
  8481. + if (ret == 0)
  8482. + {
  8483. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2,
  8484. (uint8_t *)&fifo_ctrl2, 1);
  8485. }
  8486. @@ -5453,6 +6042,7 @@ int32_t lsm6dso_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val)
  8487. *
  8488. * @param ctx read / write interface definitions
  8489. * @param val change the values of wtm in reg FIFO_CTRL1
  8490. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8491. *
  8492. */
  8493. int32_t lsm6dso_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val)
  8494. @@ -5460,10 +6050,12 @@ int32_t lsm6dso_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val)
  8495. lsm6dso_fifo_ctrl1_t fifo_ctrl1;
  8496. lsm6dso_fifo_ctrl2_t fifo_ctrl2;
  8497. int32_t ret;
  8498. +
  8499. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL1,
  8500. (uint8_t *)&fifo_ctrl1, 1);
  8501. - if (ret == 0) {
  8502. + if (ret == 0)
  8503. + {
  8504. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
  8505. (uint8_t *)&fifo_ctrl2, 1);
  8506. *val = ((uint16_t)fifo_ctrl2.wtm << 8) + (uint16_t)fifo_ctrl1.wtm;
  8507. @@ -5478,6 +6070,7 @@ int32_t lsm6dso_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val)
  8508. * @param ctx read / write interface definitions
  8509. * @param val change the values of FIFO_COMPR_INIT in
  8510. * reg EMB_FUNC_INIT_B
  8511. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8512. *
  8513. */
  8514. int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx,
  8515. @@ -5485,20 +6078,22 @@ int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx,
  8516. {
  8517. lsm6dso_emb_func_init_b_t reg;
  8518. int32_t ret;
  8519. +
  8520. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  8521. - if (ret == 0) {
  8522. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg,
  8523. - 1);
  8524. + if (ret == 0)
  8525. + {
  8526. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
  8527. }
  8528. - if (ret == 0) {
  8529. + if (ret == 0)
  8530. + {
  8531. reg.fifo_compr_init = val;
  8532. - ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg,
  8533. - 1);
  8534. + ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
  8535. }
  8536. - if (ret == 0) {
  8537. + if (ret == 0)
  8538. + {
  8539. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  8540. }
  8541. @@ -5511,6 +6106,7 @@ int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx,
  8542. * @param ctx read / write interface definitions
  8543. * @param val change the values of FIFO_COMPR_INIT in
  8544. * reg EMB_FUNC_INIT_B
  8545. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8546. *
  8547. */
  8548. int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx,
  8549. @@ -5518,14 +6114,16 @@ int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx,
  8550. {
  8551. lsm6dso_emb_func_init_b_t reg;
  8552. int32_t ret;
  8553. +
  8554. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  8555. - if (ret == 0) {
  8556. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg,
  8557. - 1);
  8558. + if (ret == 0)
  8559. + {
  8560. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
  8561. }
  8562. - if (ret == 0) {
  8563. + if (ret == 0)
  8564. + {
  8565. *val = reg.fifo_compr_init;
  8566. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  8567. }
  8568. @@ -5539,6 +6137,7 @@ int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx,
  8569. * @param ctx read / write interface definitions
  8570. * @param val change the values of uncoptr_rate in
  8571. * reg FIFO_CTRL2
  8572. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8573. *
  8574. */
  8575. int32_t lsm6dso_compression_algo_set(stmdev_ctx_t *ctx,
  8576. @@ -5546,10 +6145,12 @@ int32_t lsm6dso_compression_algo_set(stmdev_ctx_t *ctx,
  8577. {
  8578. lsm6dso_fifo_ctrl2_t fifo_ctrl2;
  8579. int32_t ret;
  8580. +
  8581. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
  8582. (uint8_t *)&fifo_ctrl2, 1);
  8583. - if (ret == 0) {
  8584. + if (ret == 0)
  8585. + {
  8586. fifo_ctrl2.fifo_compr_rt_en = ((uint8_t)val & 0x04U) >> 2;
  8587. fifo_ctrl2.uncoptr_rate = (uint8_t)val & 0x03U;
  8588. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2,
  8589. @@ -5565,6 +6166,7 @@ int32_t lsm6dso_compression_algo_set(stmdev_ctx_t *ctx,
  8590. * @param ctx read / write interface definitions
  8591. * @param val Get the values of uncoptr_rate in
  8592. * reg FIFO_CTRL2
  8593. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8594. *
  8595. */
  8596. int32_t lsm6dso_compression_algo_get(stmdev_ctx_t *ctx,
  8597. @@ -5572,9 +6174,11 @@ int32_t lsm6dso_compression_algo_get(stmdev_ctx_t *ctx,
  8598. {
  8599. lsm6dso_fifo_ctrl2_t reg;
  8600. int32_t ret;
  8601. +
  8602. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8603. - switch ((reg.fifo_compr_rt_en << 2) | reg.uncoptr_rate) {
  8604. + switch ((reg.fifo_compr_rt_en << 2) | reg.uncoptr_rate)
  8605. + {
  8606. case LSM6DSO_CMP_DISABLE:
  8607. *val = LSM6DSO_CMP_DISABLE;
  8608. break;
  8609. @@ -5608,6 +6212,7 @@ int32_t lsm6dso_compression_algo_get(stmdev_ctx_t *ctx,
  8610. *
  8611. * @param ctx read / write interface definitions
  8612. * @param val change the values of odrchg_en in reg FIFO_CTRL2
  8613. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8614. *
  8615. */
  8616. int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
  8617. @@ -5615,9 +6220,11 @@ int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
  8618. {
  8619. lsm6dso_fifo_ctrl2_t reg;
  8620. int32_t ret;
  8621. +
  8622. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8623. - if (ret == 0) {
  8624. + if (ret == 0)
  8625. + {
  8626. reg.odrchg_en = val;
  8627. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8628. }
  8629. @@ -5630,6 +6237,7 @@ int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
  8630. *
  8631. * @param ctx read / write interface definitions
  8632. * @param val change the values of odrchg_en in reg FIFO_CTRL2
  8633. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8634. *
  8635. */
  8636. int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
  8637. @@ -5637,8 +6245,10 @@ int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
  8638. {
  8639. lsm6dso_fifo_ctrl2_t reg;
  8640. int32_t ret;
  8641. +
  8642. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8643. *val = reg.odrchg_en;
  8644. +
  8645. return ret;
  8646. }
  8647. @@ -5648,6 +6258,7 @@ int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
  8648. * @param ctx read / write interface definitions
  8649. * @param val change the values of fifo_compr_rt_en in
  8650. * reg FIFO_CTRL2
  8651. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8652. *
  8653. */
  8654. int32_t lsm6dso_compression_algo_real_time_set(stmdev_ctx_t *ctx,
  8655. @@ -5655,9 +6266,11 @@ int32_t lsm6dso_compression_algo_real_time_set(stmdev_ctx_t *ctx,
  8656. {
  8657. lsm6dso_fifo_ctrl2_t reg;
  8658. int32_t ret;
  8659. +
  8660. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8661. - if (ret == 0) {
  8662. + if (ret == 0)
  8663. + {
  8664. reg.fifo_compr_rt_en = val;
  8665. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8666. }
  8667. @@ -5670,6 +6283,7 @@ int32_t lsm6dso_compression_algo_real_time_set(stmdev_ctx_t *ctx,
  8668. *
  8669. * @param ctx read / write interface definitions
  8670. * @param val change the values of fifo_compr_rt_en in reg FIFO_CTRL2
  8671. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8672. *
  8673. */
  8674. int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
  8675. @@ -5677,8 +6291,10 @@ int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
  8676. {
  8677. lsm6dso_fifo_ctrl2_t reg;
  8678. int32_t ret;
  8679. +
  8680. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8681. *val = reg.fifo_compr_rt_en;
  8682. +
  8683. return ret;
  8684. }
  8685. @@ -5688,15 +6304,18 @@ int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
  8686. *
  8687. * @param ctx read / write interface definitions
  8688. * @param val change the values of stop_on_wtm in reg FIFO_CTRL2
  8689. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8690. *
  8691. */
  8692. int32_t lsm6dso_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val)
  8693. {
  8694. lsm6dso_fifo_ctrl2_t reg;
  8695. int32_t ret;
  8696. +
  8697. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8698. - if (ret == 0) {
  8699. + if (ret == 0)
  8700. + {
  8701. reg.stop_on_wtm = val;
  8702. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8703. }
  8704. @@ -5710,14 +6329,17 @@ int32_t lsm6dso_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val)
  8705. *
  8706. * @param ctx read / write interface definitions
  8707. * @param val change the values of stop_on_wtm in reg FIFO_CTRL2
  8708. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8709. *
  8710. */
  8711. int32_t lsm6dso_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val)
  8712. {
  8713. lsm6dso_fifo_ctrl2_t reg;
  8714. int32_t ret;
  8715. +
  8716. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
  8717. *val = reg.stop_on_wtm;
  8718. +
  8719. return ret;
  8720. }
  8721. @@ -5727,6 +6349,7 @@ int32_t lsm6dso_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val)
  8722. *
  8723. * @param ctx read / write interface definitions
  8724. * @param val change the values of bdr_xl in reg FIFO_CTRL3
  8725. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8726. *
  8727. */
  8728. int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx,
  8729. @@ -5734,9 +6357,11 @@ int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx,
  8730. {
  8731. lsm6dso_fifo_ctrl3_t reg;
  8732. int32_t ret;
  8733. +
  8734. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
  8735. - if (ret == 0) {
  8736. + if (ret == 0)
  8737. + {
  8738. reg.bdr_xl = (uint8_t)val;
  8739. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
  8740. }
  8741. @@ -5750,6 +6375,7 @@ int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx,
  8742. *
  8743. * @param ctx read / write interface definitions
  8744. * @param val Get the values of bdr_xl in reg FIFO_CTRL3
  8745. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8746. *
  8747. */
  8748. int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx,
  8749. @@ -5757,9 +6383,11 @@ int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx,
  8750. {
  8751. lsm6dso_fifo_ctrl3_t reg;
  8752. int32_t ret;
  8753. +
  8754. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
  8755. - switch (reg.bdr_xl) {
  8756. + switch (reg.bdr_xl)
  8757. + {
  8758. case LSM6DSO_XL_NOT_BATCHED:
  8759. *val = LSM6DSO_XL_NOT_BATCHED;
  8760. break;
  8761. @@ -5822,6 +6450,7 @@ int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx,
  8762. *
  8763. * @param ctx read / write interface definitions
  8764. * @param val change the values of bdr_gy in reg FIFO_CTRL3
  8765. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8766. *
  8767. */
  8768. int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx,
  8769. @@ -5829,9 +6458,11 @@ int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx,
  8770. {
  8771. lsm6dso_fifo_ctrl3_t reg;
  8772. int32_t ret;
  8773. +
  8774. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
  8775. - if (ret == 0) {
  8776. + if (ret == 0)
  8777. + {
  8778. reg.bdr_gy = (uint8_t)val;
  8779. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
  8780. }
  8781. @@ -5845,6 +6476,7 @@ int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx,
  8782. *
  8783. * @param ctx read / write interface definitions
  8784. * @param val Get the values of bdr_gy in reg FIFO_CTRL3
  8785. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8786. *
  8787. */
  8788. int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx,
  8789. @@ -5852,9 +6484,11 @@ int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx,
  8790. {
  8791. lsm6dso_fifo_ctrl3_t reg;
  8792. int32_t ret;
  8793. +
  8794. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
  8795. - switch (reg.bdr_gy) {
  8796. + switch (reg.bdr_gy)
  8797. + {
  8798. case LSM6DSO_GY_NOT_BATCHED:
  8799. *val = LSM6DSO_GY_NOT_BATCHED;
  8800. break;
  8801. @@ -5916,6 +6550,7 @@ int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx,
  8802. *
  8803. * @param ctx read / write interface definitions
  8804. * @param val change the values of fifo_mode in reg FIFO_CTRL4
  8805. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8806. *
  8807. */
  8808. int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx,
  8809. @@ -5923,9 +6558,11 @@ int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx,
  8810. {
  8811. lsm6dso_fifo_ctrl4_t reg;
  8812. int32_t ret;
  8813. +
  8814. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8815. - if (ret == 0) {
  8816. + if (ret == 0)
  8817. + {
  8818. reg.fifo_mode = (uint8_t)val;
  8819. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8820. }
  8821. @@ -5938,6 +6575,7 @@ int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx,
  8822. *
  8823. * @param ctx read / write interface definitions
  8824. * @param val Get the values of fifo_mode in reg FIFO_CTRL4
  8825. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8826. *
  8827. */
  8828. int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx,
  8829. @@ -5945,9 +6583,11 @@ int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx,
  8830. {
  8831. lsm6dso_fifo_ctrl4_t reg;
  8832. int32_t ret;
  8833. +
  8834. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8835. - switch (reg.fifo_mode) {
  8836. + switch (reg.fifo_mode)
  8837. + {
  8838. case LSM6DSO_BYPASS_MODE:
  8839. *val = LSM6DSO_BYPASS_MODE;
  8840. break;
  8841. @@ -5986,6 +6626,7 @@ int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx,
  8842. *
  8843. * @param ctx read / write interface definitions
  8844. * @param val change the values of odr_t_batch in reg FIFO_CTRL4
  8845. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8846. *
  8847. */
  8848. int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
  8849. @@ -5993,9 +6634,11 @@ int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
  8850. {
  8851. lsm6dso_fifo_ctrl4_t reg;
  8852. int32_t ret;
  8853. +
  8854. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8855. - if (ret == 0) {
  8856. + if (ret == 0)
  8857. + {
  8858. reg.odr_t_batch = (uint8_t)val;
  8859. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8860. }
  8861. @@ -6009,6 +6652,7 @@ int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
  8862. *
  8863. * @param ctx read / write interface definitions
  8864. * @param val Get the values of odr_t_batch in reg FIFO_CTRL4
  8865. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8866. *
  8867. */
  8868. int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
  8869. @@ -6016,9 +6660,11 @@ int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
  8870. {
  8871. lsm6dso_fifo_ctrl4_t reg;
  8872. int32_t ret;
  8873. +
  8874. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8875. - switch (reg.odr_t_batch) {
  8876. + switch (reg.odr_t_batch)
  8877. + {
  8878. case LSM6DSO_TEMP_NOT_BATCHED:
  8879. *val = LSM6DSO_TEMP_NOT_BATCHED;
  8880. break;
  8881. @@ -6050,6 +6696,7 @@ int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
  8882. *
  8883. * @param ctx read / write interface definitions
  8884. * @param val change the values of odr_ts_batch in reg FIFO_CTRL4
  8885. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8886. *
  8887. */
  8888. int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
  8889. @@ -6057,9 +6704,11 @@ int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
  8890. {
  8891. lsm6dso_fifo_ctrl4_t reg;
  8892. int32_t ret;
  8893. +
  8894. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8895. - if (ret == 0) {
  8896. + if (ret == 0)
  8897. + {
  8898. reg.odr_ts_batch = (uint8_t)val;
  8899. ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8900. }
  8901. @@ -6074,6 +6723,7 @@ int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
  8902. *
  8903. * @param ctx read / write interface definitions
  8904. * @param val Get the values of odr_ts_batch in reg FIFO_CTRL4
  8905. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8906. *
  8907. */
  8908. int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
  8909. @@ -6081,9 +6731,11 @@ int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
  8910. {
  8911. lsm6dso_fifo_ctrl4_t reg;
  8912. int32_t ret;
  8913. +
  8914. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
  8915. - switch (reg.odr_ts_batch) {
  8916. + switch (reg.odr_ts_batch)
  8917. + {
  8918. case LSM6DSO_NO_DECIMATION:
  8919. *val = LSM6DSO_NO_DECIMATION;
  8920. break;
  8921. @@ -6115,6 +6767,7 @@ int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
  8922. * @param ctx read / write interface definitions
  8923. * @param val change the values of trig_counter_bdr
  8924. * in reg COUNTER_BDR_REG1
  8925. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8926. *
  8927. */
  8928. int32_t lsm6dso_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
  8929. @@ -6122,10 +6775,11 @@ int32_t lsm6dso_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
  8930. {
  8931. lsm6dso_counter_bdr_reg1_t reg;
  8932. int32_t ret;
  8933. - ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg,
  8934. - 1);
  8935. - if (ret == 0) {
  8936. + ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
  8937. +
  8938. + if (ret == 0)
  8939. + {
  8940. reg.trig_counter_bdr = (uint8_t)val;
  8941. ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
  8942. (uint8_t *)&reg, 1);
  8943. @@ -6141,6 +6795,7 @@ int32_t lsm6dso_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
  8944. * @param ctx read / write interface definitions
  8945. * @param val Get the values of trig_counter_bdr
  8946. * in reg COUNTER_BDR_REG1
  8947. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8948. *
  8949. */
  8950. int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
  8951. @@ -6148,10 +6803,11 @@ int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
  8952. {
  8953. lsm6dso_counter_bdr_reg1_t reg;
  8954. int32_t ret;
  8955. - ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg,
  8956. - 1);
  8957. - switch (reg.trig_counter_bdr) {
  8958. + ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
  8959. +
  8960. + switch (reg.trig_counter_bdr)
  8961. + {
  8962. case LSM6DSO_XL_BATCH_EVENT:
  8963. *val = LSM6DSO_XL_BATCH_EVENT;
  8964. break;
  8965. @@ -6170,21 +6826,23 @@ int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
  8966. /**
  8967. * @brief Resets the internal counter of batching vents for a single sensor.
  8968. - * This bit is automatically reset to zero if it was set to ‘1’.[set]
  8969. + * This bit is automatically reset to zero if it was set to '1'.[set]
  8970. *
  8971. * @param ctx read / write interface definitions
  8972. * @param val change the values of rst_counter_bdr in
  8973. * reg COUNTER_BDR_REG1
  8974. + * @retval interface status (MANDATORY: return 0 -> no Error)
  8975. *
  8976. */
  8977. int32_t lsm6dso_rst_batch_counter_set(stmdev_ctx_t *ctx, uint8_t val)
  8978. {
  8979. lsm6dso_counter_bdr_reg1_t reg;
  8980. int32_t ret;
  8981. - ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg,
  8982. - 1);
  8983. - if (ret == 0) {
  8984. + ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
  8985. +
  8986. + if (ret == 0)
  8987. + {
  8988. reg.rst_counter_bdr = val;
  8989. ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
  8990. (uint8_t *)&reg, 1);
  8991. @@ -6195,20 +6853,22 @@ int32_t lsm6dso_rst_batch_counter_set(stmdev_ctx_t *ctx, uint8_t val)
  8992. /**
  8993. * @brief Resets the internal counter of batching events for a single sensor.
  8994. - * This bit is automatically reset to zero if it was set to ‘1’.[get]
  8995. + * This bit is automatically reset to zero if it was set to '1'.[get]
  8996. *
  8997. * @param ctx read / write interface definitions
  8998. * @param val change the values of rst_counter_bdr in
  8999. * reg COUNTER_BDR_REG1
  9000. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9001. *
  9002. */
  9003. int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val)
  9004. {
  9005. lsm6dso_counter_bdr_reg1_t reg;
  9006. int32_t ret;
  9007. - ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg,
  9008. - 1);
  9009. +
  9010. + ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
  9011. *val = reg.rst_counter_bdr;
  9012. +
  9013. return ret;
  9014. }
  9015. @@ -6218,6 +6878,7 @@ int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val)
  9016. * @param ctx read / write interface definitions
  9017. * @param val change the values of cnt_bdr_th in
  9018. * reg COUNTER_BDR_REG2 and COUNTER_BDR_REG1.
  9019. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9020. *
  9021. */
  9022. int32_t lsm6dso_batch_counter_threshold_set(stmdev_ctx_t *ctx,
  9023. @@ -6226,17 +6887,20 @@ int32_t lsm6dso_batch_counter_threshold_set(stmdev_ctx_t *ctx,
  9024. lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
  9025. lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
  9026. int32_t ret;
  9027. +
  9028. ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
  9029. (uint8_t *)&counter_bdr_reg1, 1);
  9030. - if (ret == 0) {
  9031. + if (ret == 0)
  9032. + {
  9033. counter_bdr_reg2.cnt_bdr_th = 0x00FFU & (uint8_t)val;
  9034. counter_bdr_reg1.cnt_bdr_th = (uint8_t)(0x0700U & val) >> 8;
  9035. ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
  9036. (uint8_t *)&counter_bdr_reg1, 1);
  9037. }
  9038. - if (ret == 0) {
  9039. + if (ret == 0)
  9040. + {
  9041. ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
  9042. (uint8_t *)&counter_bdr_reg2, 1);
  9043. }
  9044. @@ -6250,6 +6914,7 @@ int32_t lsm6dso_batch_counter_threshold_set(stmdev_ctx_t *ctx,
  9045. * @param ctx read / write interface definitions
  9046. * @param val change the values of cnt_bdr_th in
  9047. * reg COUNTER_BDR_REG2 and COUNTER_BDR_REG1.
  9048. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9049. *
  9050. */
  9051. int32_t lsm6dso_batch_counter_threshold_get(stmdev_ctx_t *ctx,
  9052. @@ -6258,10 +6923,12 @@ int32_t lsm6dso_batch_counter_threshold_get(stmdev_ctx_t *ctx,
  9053. lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
  9054. lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
  9055. int32_t ret;
  9056. +
  9057. ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
  9058. (uint8_t *)&counter_bdr_reg1, 1);
  9059. - if (ret == 0) {
  9060. + if (ret == 0)
  9061. + {
  9062. ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
  9063. (uint8_t *)&counter_bdr_reg2, 1);
  9064. *val = ((uint16_t)counter_bdr_reg1.cnt_bdr_th << 8)
  9065. @@ -6276,6 +6943,7 @@ int32_t lsm6dso_batch_counter_threshold_get(stmdev_ctx_t *ctx,
  9066. *
  9067. * @param ctx read / write interface definitions
  9068. * @param val change the values of diff_fifo in reg FIFO_STATUS1
  9069. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9070. *
  9071. */
  9072. int32_t lsm6dso_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val)
  9073. @@ -6283,10 +6951,12 @@ int32_t lsm6dso_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val)
  9074. lsm6dso_fifo_status1_t fifo_status1;
  9075. lsm6dso_fifo_status2_t fifo_status2;
  9076. int32_t ret;
  9077. +
  9078. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS1,
  9079. (uint8_t *)&fifo_status1, 1);
  9080. - if (ret == 0) {
  9081. + if (ret == 0)
  9082. + {
  9083. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2,
  9084. (uint8_t *)&fifo_status2, 1);
  9085. *val = ((uint16_t)fifo_status2.diff_fifo << 8) +
  9086. @@ -6301,13 +6971,16 @@ int32_t lsm6dso_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val)
  9087. *
  9088. * @param ctx read / write interface definitions
  9089. * @param val registers FIFO_STATUS2
  9090. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9091. *
  9092. */
  9093. int32_t lsm6dso_fifo_status_get(stmdev_ctx_t *ctx,
  9094. lsm6dso_fifo_status2_t *val)
  9095. {
  9096. int32_t ret;
  9097. +
  9098. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *) val, 1);
  9099. +
  9100. return ret;
  9101. }
  9102. @@ -6316,14 +6989,17 @@ int32_t lsm6dso_fifo_status_get(stmdev_ctx_t *ctx,
  9103. *
  9104. * @param ctx read / write interface definitions
  9105. * @param val change the values of fifo_full_ia in reg FIFO_STATUS2
  9106. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9107. *
  9108. */
  9109. int32_t lsm6dso_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
  9110. {
  9111. lsm6dso_fifo_status2_t reg;
  9112. int32_t ret;
  9113. +
  9114. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)&reg, 1);
  9115. *val = reg.fifo_full_ia;
  9116. +
  9117. return ret;
  9118. }
  9119. @@ -6333,14 +7009,17 @@ int32_t lsm6dso_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
  9120. * @param ctx read / write interface definitions
  9121. * @param val change the values of fifo_over_run_latched in
  9122. * reg FIFO_STATUS2
  9123. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9124. *
  9125. */
  9126. int32_t lsm6dso_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
  9127. {
  9128. lsm6dso_fifo_status2_t reg;
  9129. int32_t ret;
  9130. +
  9131. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)&reg, 1);
  9132. *val = reg.fifo_ovr_ia;
  9133. +
  9134. return ret;
  9135. }
  9136. @@ -6349,14 +7028,17 @@ int32_t lsm6dso_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
  9137. *
  9138. * @param ctx read / write interface definitions
  9139. * @param val change the values of fifo_wtm_ia in reg FIFO_STATUS2
  9140. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9141. *
  9142. */
  9143. int32_t lsm6dso_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
  9144. {
  9145. lsm6dso_fifo_status2_t reg;
  9146. int32_t ret;
  9147. +
  9148. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)&reg, 1);
  9149. *val = reg.fifo_wtm_ia;
  9150. +
  9151. return ret;
  9152. }
  9153. @@ -6365,6 +7047,7 @@ int32_t lsm6dso_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
  9154. *
  9155. * @param ctx read / write interface definitions
  9156. * @param val change the values of tag_sensor in reg FIFO_DATA_OUT_TAG
  9157. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9158. *
  9159. */
  9160. int32_t lsm6dso_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
  9161. @@ -6372,10 +7055,12 @@ int32_t lsm6dso_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
  9162. {
  9163. lsm6dso_fifo_data_out_tag_t reg;
  9164. int32_t ret;
  9165. +
  9166. ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_TAG,
  9167. (uint8_t *)&reg, 1);
  9168. - switch (reg.tag_sensor) {
  9169. + switch (reg.tag_sensor)
  9170. + {
  9171. case LSM6DSO_GYRO_NC_TAG:
  9172. *val = LSM6DSO_GYRO_NC_TAG;
  9173. break;
  9174. @@ -6475,26 +7160,31 @@ int32_t lsm6dso_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
  9175. * @param ctx read / write interface definitions
  9176. * @param val change the values of gbias_fifo_en in
  9177. * reg LSM6DSO_EMB_FUNC_FIFO_CFG
  9178. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9179. *
  9180. */
  9181. int32_t lsm6dso_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val)
  9182. {
  9183. lsm6dso_emb_func_fifo_cfg_t reg;
  9184. int32_t ret;
  9185. +
  9186. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  9187. - if (ret == 0) {
  9188. + if (ret == 0)
  9189. + {
  9190. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
  9191. (uint8_t *)&reg, 1);
  9192. }
  9193. - if (ret == 0) {
  9194. + if (ret == 0)
  9195. + {
  9196. reg.pedo_fifo_en = val;
  9197. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
  9198. (uint8_t *)&reg, 1);
  9199. }
  9200. - if (ret == 0) {
  9201. + if (ret == 0)
  9202. + {
  9203. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9204. }
  9205. @@ -6507,20 +7197,24 @@ int32_t lsm6dso_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val)
  9206. * @param ctx read / write interface definitions
  9207. * @param val change the values of pedo_fifo_en in
  9208. * reg LSM6DSO_EMB_FUNC_FIFO_CFG
  9209. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9210. *
  9211. */
  9212. int32_t lsm6dso_fifo_pedo_batch_get(stmdev_ctx_t *ctx, uint8_t *val)
  9213. {
  9214. lsm6dso_emb_func_fifo_cfg_t reg;
  9215. int32_t ret;
  9216. +
  9217. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  9218. - if (ret == 0) {
  9219. + if (ret == 0)
  9220. + {
  9221. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
  9222. (uint8_t *)&reg, 1);
  9223. }
  9224. - if (ret == 0) {
  9225. + if (ret == 0)
  9226. + {
  9227. *val = reg.pedo_fifo_en;
  9228. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9229. }
  9230. @@ -6534,24 +7228,29 @@ int32_t lsm6dso_fifo_pedo_batch_get(stmdev_ctx_t *ctx, uint8_t *val)
  9231. * @param ctx read / write interface definitions
  9232. * @param val change the values of batch_ext_sens_0_en in
  9233. * reg SLV0_CONFIG
  9234. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9235. *
  9236. */
  9237. int32_t lsm6dso_sh_batch_slave_0_set(stmdev_ctx_t *ctx, uint8_t val)
  9238. {
  9239. lsm6dso_slv0_config_t reg;
  9240. int32_t ret;
  9241. +
  9242. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9243. - if (ret == 0) {
  9244. + if (ret == 0)
  9245. + {
  9246. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
  9247. }
  9248. - if (ret == 0) {
  9249. + if (ret == 0)
  9250. + {
  9251. reg.batch_ext_sens_0_en = val;
  9252. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
  9253. }
  9254. - if (ret == 0) {
  9255. + if (ret == 0)
  9256. + {
  9257. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9258. }
  9259. @@ -6564,19 +7263,23 @@ int32_t lsm6dso_sh_batch_slave_0_set(stmdev_ctx_t *ctx, uint8_t val)
  9260. * @param ctx read / write interface definitions
  9261. * @param val change the values of batch_ext_sens_0_en in
  9262. * reg SLV0_CONFIG
  9263. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9264. *
  9265. */
  9266. int32_t lsm6dso_sh_batch_slave_0_get(stmdev_ctx_t *ctx, uint8_t *val)
  9267. {
  9268. lsm6dso_slv0_config_t reg;
  9269. int32_t ret;
  9270. +
  9271. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9272. - if (ret == 0) {
  9273. + if (ret == 0)
  9274. + {
  9275. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
  9276. }
  9277. - if (ret == 0) {
  9278. + if (ret == 0)
  9279. + {
  9280. *val = reg.batch_ext_sens_0_en;
  9281. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9282. }
  9283. @@ -6590,24 +7293,29 @@ int32_t lsm6dso_sh_batch_slave_0_get(stmdev_ctx_t *ctx, uint8_t *val)
  9284. * @param ctx read / write interface definitions
  9285. * @param val change the values of batch_ext_sens_1_en in
  9286. * reg SLV1_CONFIG
  9287. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9288. *
  9289. */
  9290. int32_t lsm6dso_sh_batch_slave_1_set(stmdev_ctx_t *ctx, uint8_t val)
  9291. {
  9292. lsm6dso_slv1_config_t reg;
  9293. int32_t ret;
  9294. +
  9295. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9296. - if (ret == 0) {
  9297. + if (ret == 0)
  9298. + {
  9299. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
  9300. }
  9301. - if (ret == 0) {
  9302. + if (ret == 0)
  9303. + {
  9304. reg.batch_ext_sens_1_en = val;
  9305. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
  9306. }
  9307. - if (ret == 0) {
  9308. + if (ret == 0)
  9309. + {
  9310. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9311. }
  9312. @@ -6620,20 +7328,24 @@ int32_t lsm6dso_sh_batch_slave_1_set(stmdev_ctx_t *ctx, uint8_t val)
  9313. * @param ctx read / write interface definitions
  9314. * @param val change the values of batch_ext_sens_1_en in
  9315. * reg SLV1_CONFIG
  9316. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9317. *
  9318. */
  9319. int32_t lsm6dso_sh_batch_slave_1_get(stmdev_ctx_t *ctx, uint8_t *val)
  9320. {
  9321. lsm6dso_slv1_config_t reg;
  9322. int32_t ret;
  9323. +
  9324. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9325. - if (ret == 0) {
  9326. + if (ret == 0)
  9327. + {
  9328. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
  9329. *val = reg.batch_ext_sens_1_en;
  9330. }
  9331. - if (ret == 0) {
  9332. + if (ret == 0)
  9333. + {
  9334. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9335. }
  9336. @@ -6646,24 +7358,29 @@ int32_t lsm6dso_sh_batch_slave_1_get(stmdev_ctx_t *ctx, uint8_t *val)
  9337. * @param ctx read / write interface definitions
  9338. * @param val change the values of batch_ext_sens_2_en in
  9339. * reg SLV2_CONFIG
  9340. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9341. *
  9342. */
  9343. int32_t lsm6dso_sh_batch_slave_2_set(stmdev_ctx_t *ctx, uint8_t val)
  9344. {
  9345. lsm6dso_slv2_config_t reg;
  9346. int32_t ret;
  9347. +
  9348. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9349. - if (ret == 0) {
  9350. + if (ret == 0)
  9351. + {
  9352. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)&reg, 1);
  9353. }
  9354. - if (ret == 0) {
  9355. + if (ret == 0)
  9356. + {
  9357. reg.batch_ext_sens_2_en = val;
  9358. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)&reg, 1);
  9359. }
  9360. - if (ret == 0) {
  9361. + if (ret == 0)
  9362. + {
  9363. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9364. }
  9365. @@ -6676,19 +7393,23 @@ int32_t lsm6dso_sh_batch_slave_2_set(stmdev_ctx_t *ctx, uint8_t val)
  9366. * @param ctx read / write interface definitions
  9367. * @param val change the values of batch_ext_sens_2_en in
  9368. * reg SLV2_CONFIG
  9369. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9370. *
  9371. */
  9372. int32_t lsm6dso_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val)
  9373. {
  9374. lsm6dso_slv2_config_t reg;
  9375. int32_t ret;
  9376. +
  9377. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9378. - if (ret == 0) {
  9379. + if (ret == 0)
  9380. + {
  9381. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)&reg, 1);
  9382. }
  9383. - if (ret == 0) {
  9384. + if (ret == 0)
  9385. + {
  9386. *val = reg.batch_ext_sens_2_en;
  9387. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9388. }
  9389. @@ -6702,24 +7423,29 @@ int32_t lsm6dso_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val)
  9390. * @param ctx read / write interface definitions
  9391. * @param val change the values of batch_ext_sens_3_en
  9392. * in reg SLV3_CONFIG
  9393. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9394. *
  9395. */
  9396. int32_t lsm6dso_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val)
  9397. {
  9398. lsm6dso_slv3_config_t reg;
  9399. int32_t ret;
  9400. +
  9401. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9402. - if (ret == 0) {
  9403. + if (ret == 0)
  9404. + {
  9405. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)&reg, 1);
  9406. }
  9407. - if (ret == 0) {
  9408. + if (ret == 0)
  9409. + {
  9410. reg.batch_ext_sens_3_en = val;
  9411. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)&reg, 1);
  9412. }
  9413. - if (ret == 0) {
  9414. + if (ret == 0)
  9415. + {
  9416. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9417. }
  9418. @@ -6732,19 +7458,23 @@ int32_t lsm6dso_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val)
  9419. * @param ctx read / write interface definitions
  9420. * @param val change the values of batch_ext_sens_3_en in
  9421. * reg SLV3_CONFIG
  9422. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9423. *
  9424. */
  9425. int32_t lsm6dso_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val)
  9426. {
  9427. lsm6dso_slv3_config_t reg;
  9428. int32_t ret;
  9429. +
  9430. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  9431. - if (ret == 0) {
  9432. + if (ret == 0)
  9433. + {
  9434. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)&reg, 1);
  9435. }
  9436. - if (ret == 0) {
  9437. + if (ret == 0)
  9438. + {
  9439. *val = reg.batch_ext_sens_3_en;
  9440. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9441. }
  9442. @@ -6763,13 +7493,14 @@ int32_t lsm6dso_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val)
  9443. * DEN functionality.
  9444. * @{
  9445. *
  9446. -*/
  9447. + */
  9448. /**
  9449. * @brief DEN functionality marking mode.[set]
  9450. *
  9451. * @param ctx read / write interface definitions
  9452. * @param val change the values of den_mode in reg CTRL6_C
  9453. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9454. *
  9455. */
  9456. int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx,
  9457. @@ -6777,9 +7508,11 @@ int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx,
  9458. {
  9459. lsm6dso_ctrl6_c_t reg;
  9460. int32_t ret;
  9461. +
  9462. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  9463. - if (ret == 0) {
  9464. + if (ret == 0)
  9465. + {
  9466. reg.den_mode = (uint8_t)val;
  9467. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  9468. }
  9469. @@ -6792,6 +7525,7 @@ int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx,
  9470. *
  9471. * @param ctx read / write interface definitions
  9472. * @param val Get the values of den_mode in reg CTRL6_C
  9473. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9474. *
  9475. */
  9476. int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx,
  9477. @@ -6799,9 +7533,11 @@ int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx,
  9478. {
  9479. lsm6dso_ctrl6_c_t reg;
  9480. int32_t ret;
  9481. +
  9482. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
  9483. - switch (reg.den_mode) {
  9484. + switch (reg.den_mode)
  9485. + {
  9486. case LSM6DSO_DEN_DISABLE:
  9487. *val = LSM6DSO_DEN_DISABLE;
  9488. break;
  9489. @@ -6835,6 +7571,7 @@ int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx,
  9490. *
  9491. * @param ctx read / write interface definitions
  9492. * @param val change the values of den_lh in reg CTRL9_XL
  9493. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9494. *
  9495. */
  9496. int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx,
  9497. @@ -6842,9 +7579,11 @@ int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx,
  9498. {
  9499. lsm6dso_ctrl9_xl_t reg;
  9500. int32_t ret;
  9501. +
  9502. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9503. - if (ret == 0) {
  9504. + if (ret == 0)
  9505. + {
  9506. reg.den_lh = (uint8_t)val;
  9507. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9508. }
  9509. @@ -6857,6 +7596,7 @@ int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx,
  9510. *
  9511. * @param ctx read / write interface definitions
  9512. * @param val Get the values of den_lh in reg CTRL9_XL
  9513. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9514. *
  9515. */
  9516. int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx,
  9517. @@ -6864,9 +7604,11 @@ int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx,
  9518. {
  9519. lsm6dso_ctrl9_xl_t reg;
  9520. int32_t ret;
  9521. +
  9522. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9523. - switch (reg.den_lh) {
  9524. + switch (reg.den_lh)
  9525. + {
  9526. case LSM6DSO_DEN_ACT_LOW:
  9527. *val = LSM6DSO_DEN_ACT_LOW;
  9528. break;
  9529. @@ -6888,6 +7630,7 @@ int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx,
  9530. *
  9531. * @param ctx read / write interface definitions
  9532. * @param val change the values of den_xl_g in reg CTRL9_XL
  9533. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9534. *
  9535. */
  9536. int32_t lsm6dso_den_enable_set(stmdev_ctx_t *ctx,
  9537. @@ -6895,9 +7638,11 @@ int32_t lsm6dso_den_enable_set(stmdev_ctx_t *ctx,
  9538. {
  9539. lsm6dso_ctrl9_xl_t reg;
  9540. int32_t ret;
  9541. +
  9542. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9543. - if (ret == 0) {
  9544. + if (ret == 0)
  9545. + {
  9546. reg.den_xl_g = (uint8_t)val;
  9547. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9548. }
  9549. @@ -6910,6 +7655,7 @@ int32_t lsm6dso_den_enable_set(stmdev_ctx_t *ctx,
  9550. *
  9551. * @param ctx read / write interface definitions
  9552. * @param val Get the values of den_xl_g in reg CTRL9_XL
  9553. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9554. *
  9555. */
  9556. int32_t lsm6dso_den_enable_get(stmdev_ctx_t *ctx,
  9557. @@ -6917,9 +7663,11 @@ int32_t lsm6dso_den_enable_get(stmdev_ctx_t *ctx,
  9558. {
  9559. lsm6dso_ctrl9_xl_t reg;
  9560. int32_t ret;
  9561. +
  9562. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9563. - switch (reg.den_xl_g) {
  9564. + switch (reg.den_xl_g)
  9565. + {
  9566. case LSM6DSO_STAMP_IN_GY_DATA:
  9567. *val = LSM6DSO_STAMP_IN_GY_DATA;
  9568. break;
  9569. @@ -6945,15 +7693,18 @@ int32_t lsm6dso_den_enable_get(stmdev_ctx_t *ctx,
  9570. *
  9571. * @param ctx read / write interface definitions
  9572. * @param val change the values of den_z in reg CTRL9_XL
  9573. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9574. *
  9575. */
  9576. int32_t lsm6dso_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val)
  9577. {
  9578. lsm6dso_ctrl9_xl_t reg;
  9579. int32_t ret;
  9580. +
  9581. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9582. - if (ret == 0) {
  9583. + if (ret == 0)
  9584. + {
  9585. reg.den_z = val;
  9586. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9587. }
  9588. @@ -6966,14 +7717,17 @@ int32_t lsm6dso_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val)
  9589. *
  9590. * @param ctx read / write interface definitions
  9591. * @param val change the values of den_z in reg CTRL9_XL
  9592. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9593. *
  9594. */
  9595. int32_t lsm6dso_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val)
  9596. {
  9597. lsm6dso_ctrl9_xl_t reg;
  9598. int32_t ret;
  9599. +
  9600. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9601. *val = reg.den_z;
  9602. +
  9603. return ret;
  9604. }
  9605. @@ -6982,15 +7736,18 @@ int32_t lsm6dso_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val)
  9606. *
  9607. * @param ctx read / write interface definitions
  9608. * @param val change the values of den_y in reg CTRL9_XL
  9609. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9610. *
  9611. */
  9612. int32_t lsm6dso_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val)
  9613. {
  9614. lsm6dso_ctrl9_xl_t reg;
  9615. int32_t ret;
  9616. +
  9617. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9618. - if (ret == 0) {
  9619. + if (ret == 0)
  9620. + {
  9621. reg.den_y = val;
  9622. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9623. }
  9624. @@ -7003,14 +7760,17 @@ int32_t lsm6dso_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val)
  9625. *
  9626. * @param ctx read / write interface definitions
  9627. * @param val change the values of den_y in reg CTRL9_XL
  9628. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9629. *
  9630. */
  9631. int32_t lsm6dso_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val)
  9632. {
  9633. lsm6dso_ctrl9_xl_t reg;
  9634. int32_t ret;
  9635. +
  9636. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9637. *val = reg.den_y;
  9638. +
  9639. return ret;
  9640. }
  9641. @@ -7019,15 +7779,18 @@ int32_t lsm6dso_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val)
  9642. *
  9643. * @param ctx read / write interface definitions
  9644. * @param val change the values of den_x in reg CTRL9_XL
  9645. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9646. *
  9647. */
  9648. int32_t lsm6dso_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val)
  9649. {
  9650. lsm6dso_ctrl9_xl_t reg;
  9651. int32_t ret;
  9652. +
  9653. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9654. - if (ret == 0) {
  9655. + if (ret == 0)
  9656. + {
  9657. reg.den_x = val;
  9658. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9659. }
  9660. @@ -7040,14 +7803,17 @@ int32_t lsm6dso_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val)
  9661. *
  9662. * @param ctx read / write interface definitions
  9663. * @param val change the values of den_x in reg CTRL9_XL
  9664. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9665. *
  9666. */
  9667. int32_t lsm6dso_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val)
  9668. {
  9669. lsm6dso_ctrl9_xl_t reg;
  9670. int32_t ret;
  9671. +
  9672. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
  9673. *val = reg.den_x;
  9674. +
  9675. return ret;
  9676. }
  9677. @@ -7061,13 +7827,14 @@ int32_t lsm6dso_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val)
  9678. * @brief This section groups all the functions that manage pedometer.
  9679. * @{
  9680. *
  9681. -*/
  9682. + */
  9683. /**
  9684. * @brief Enable pedometer algorithm.[set]
  9685. *
  9686. * @param ctx read / write interface definitions
  9687. * @param val turn on and configure pedometer
  9688. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9689. *
  9690. */
  9691. int32_t lsm6dso_pedo_sens_set(stmdev_ctx_t *ctx,
  9692. @@ -7075,10 +7842,12 @@ int32_t lsm6dso_pedo_sens_set(stmdev_ctx_t *ctx,
  9693. {
  9694. lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
  9695. int32_t ret;
  9696. +
  9697. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
  9698. (uint8_t *)&pedo_cmd_reg);
  9699. - if (ret == 0) {
  9700. + if (ret == 0)
  9701. + {
  9702. pedo_cmd_reg.fp_rejection_en = ((uint8_t)val & 0x10U) >> 4;
  9703. pedo_cmd_reg.ad_det_en = ((uint8_t)val & 0x20U) >> 5;
  9704. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
  9705. @@ -7093,6 +7862,7 @@ int32_t lsm6dso_pedo_sens_set(stmdev_ctx_t *ctx,
  9706. *
  9707. * @param ctx read / write interface definitions
  9708. * @param val turn on and configure pedometer
  9709. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9710. *
  9711. */
  9712. int32_t lsm6dso_pedo_sens_get(stmdev_ctx_t *ctx,
  9713. @@ -7100,11 +7870,13 @@ int32_t lsm6dso_pedo_sens_get(stmdev_ctx_t *ctx,
  9714. {
  9715. lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
  9716. int32_t ret;
  9717. +
  9718. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
  9719. (uint8_t *)&pedo_cmd_reg);
  9720. - switch ( (pedo_cmd_reg.ad_det_en << 5) | (pedo_cmd_reg.fp_rejection_en
  9721. - << 4) ) {
  9722. + switch ((pedo_cmd_reg.ad_det_en << 5) | (pedo_cmd_reg.fp_rejection_en
  9723. + << 4))
  9724. + {
  9725. case LSM6DSO_PEDO_BASE_MODE:
  9726. *val = LSM6DSO_PEDO_BASE_MODE;
  9727. break;
  9728. @@ -7130,20 +7902,23 @@ int32_t lsm6dso_pedo_sens_get(stmdev_ctx_t *ctx,
  9729. *
  9730. * @param ctx read / write interface definitions
  9731. * @param val change the values of is_step_det in reg EMB_FUNC_STATUS
  9732. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9733. *
  9734. */
  9735. int32_t lsm6dso_pedo_step_detect_get(stmdev_ctx_t *ctx, uint8_t *val)
  9736. {
  9737. lsm6dso_emb_func_status_t reg;
  9738. int32_t ret;
  9739. +
  9740. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  9741. - if (ret == 0) {
  9742. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg,
  9743. - 1);
  9744. + if (ret == 0)
  9745. + {
  9746. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
  9747. }
  9748. - if (ret == 0) {
  9749. + if (ret == 0)
  9750. + {
  9751. *val = reg.is_step_det;
  9752. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9753. }
  9754. @@ -7156,14 +7931,17 @@ int32_t lsm6dso_pedo_step_detect_get(stmdev_ctx_t *ctx, uint8_t *val)
  9755. *
  9756. * @param ctx read / write interface definitions
  9757. * @param buff buffer that contains data to write
  9758. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9759. *
  9760. */
  9761. int32_t lsm6dso_pedo_debounce_steps_set(stmdev_ctx_t *ctx,
  9762. uint8_t *buff)
  9763. {
  9764. int32_t ret;
  9765. +
  9766. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF,
  9767. buff);
  9768. +
  9769. return ret;
  9770. }
  9771. @@ -7172,13 +7950,16 @@ int32_t lsm6dso_pedo_debounce_steps_set(stmdev_ctx_t *ctx,
  9772. *
  9773. * @param ctx read / write interface definitions
  9774. * @param buff buffer that stores data read
  9775. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9776. *
  9777. */
  9778. int32_t lsm6dso_pedo_debounce_steps_get(stmdev_ctx_t *ctx,
  9779. uint8_t *buff)
  9780. {
  9781. int32_t ret;
  9782. +
  9783. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF, buff);
  9784. +
  9785. return ret;
  9786. }
  9787. @@ -7187,18 +7968,21 @@ int32_t lsm6dso_pedo_debounce_steps_get(stmdev_ctx_t *ctx,
  9788. *
  9789. * @param ctx read / write interface definitions
  9790. * @param buff buffer that contains data to write
  9791. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9792. *
  9793. */
  9794. int32_t lsm6dso_pedo_steps_period_set(stmdev_ctx_t *ctx, uint16_t val)
  9795. {
  9796. uint8_t buff[2];
  9797. int32_t ret;
  9798. - buff[1] = (uint8_t) (val / 256U);
  9799. - buff[0] = (uint8_t) (val - (buff[1] * 256U));
  9800. +
  9801. + buff[1] = (uint8_t)(val / 256U);
  9802. + buff[0] = (uint8_t)(val - (buff[1] * 256U));
  9803. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L,
  9804. &buff[0]);
  9805. - if (ret == 0) {
  9806. + if (ret == 0)
  9807. + {
  9808. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
  9809. &buff[1]);
  9810. }
  9811. @@ -7211,6 +7995,7 @@ int32_t lsm6dso_pedo_steps_period_set(stmdev_ctx_t *ctx, uint16_t val)
  9812. *
  9813. * @param ctx read / write interface definitions
  9814. * @param buff buffer that stores data read
  9815. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9816. *
  9817. */
  9818. int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx,
  9819. @@ -7218,10 +8003,12 @@ int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx,
  9820. {
  9821. uint8_t buff[2];
  9822. int32_t ret;
  9823. +
  9824. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L,
  9825. &buff[0]);
  9826. - if (ret == 0) {
  9827. + if (ret == 0)
  9828. + {
  9829. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
  9830. &buff[1]);
  9831. *val = buff[1];
  9832. @@ -7237,6 +8024,7 @@ int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx,
  9833. *
  9834. * @param ctx read / write interface definitions
  9835. * @param val change the values of carry_count_en in reg PEDO_CMD_REG
  9836. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9837. *
  9838. */
  9839. int32_t lsm6dso_pedo_int_mode_set(stmdev_ctx_t *ctx,
  9840. @@ -7244,10 +8032,12 @@ int32_t lsm6dso_pedo_int_mode_set(stmdev_ctx_t *ctx,
  9841. {
  9842. lsm6dso_pedo_cmd_reg_t reg;
  9843. int32_t ret;
  9844. +
  9845. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
  9846. (uint8_t *)&reg);
  9847. - if (ret == 0) {
  9848. + if (ret == 0)
  9849. + {
  9850. reg.carry_count_en = (uint8_t)val;
  9851. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
  9852. (uint8_t *)&reg);
  9853. @@ -7262,6 +8052,7 @@ int32_t lsm6dso_pedo_int_mode_set(stmdev_ctx_t *ctx,
  9854. *
  9855. * @param ctx read / write interface definitions
  9856. * @param val Get the values of carry_count_en in reg PEDO_CMD_REG
  9857. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9858. *
  9859. */
  9860. int32_t lsm6dso_pedo_int_mode_get(stmdev_ctx_t *ctx,
  9861. @@ -7269,10 +8060,12 @@ int32_t lsm6dso_pedo_int_mode_get(stmdev_ctx_t *ctx,
  9862. {
  9863. lsm6dso_pedo_cmd_reg_t reg;
  9864. int32_t ret;
  9865. +
  9866. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
  9867. (uint8_t *)&reg);
  9868. - switch (reg.carry_count_en) {
  9869. + switch (reg.carry_count_en)
  9870. + {
  9871. case LSM6DSO_EVERY_STEP:
  9872. *val = LSM6DSO_EVERY_STEP;
  9873. break;
  9874. @@ -7300,13 +8093,14 @@ int32_t lsm6dso_pedo_int_mode_get(stmdev_ctx_t *ctx,
  9875. * significant motion detection.
  9876. * @{
  9877. *
  9878. -*/
  9879. + */
  9880. /**
  9881. * @brief Interrupt status bit for significant motion detection.[get]
  9882. *
  9883. * @param ctx read / write interface definitions
  9884. * @param val change the values of is_sigmot in reg EMB_FUNC_STATUS
  9885. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9886. *
  9887. */
  9888. int32_t lsm6dso_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
  9889. @@ -7314,14 +8108,16 @@ int32_t lsm6dso_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
  9890. {
  9891. lsm6dso_emb_func_status_t reg;
  9892. int32_t ret;
  9893. +
  9894. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  9895. - if (ret == 0) {
  9896. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg,
  9897. - 1);
  9898. + if (ret == 0)
  9899. + {
  9900. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
  9901. }
  9902. - if (ret == 0) {
  9903. + if (ret == 0)
  9904. + {
  9905. *val = reg.is_sigmot;
  9906. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9907. }
  9908. @@ -7340,13 +8136,14 @@ int32_t lsm6dso_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
  9909. * event detection.
  9910. * @{
  9911. *
  9912. -*/
  9913. + */
  9914. /**
  9915. * @brief Interrupt status bit for tilt detection.[get]
  9916. *
  9917. * @param ctx read / write interface definitions
  9918. * @param val change the values of is_tilt in reg EMB_FUNC_STATUS
  9919. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9920. *
  9921. */
  9922. int32_t lsm6dso_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
  9923. @@ -7354,14 +8151,16 @@ int32_t lsm6dso_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
  9924. {
  9925. lsm6dso_emb_func_status_t reg;
  9926. int32_t ret;
  9927. +
  9928. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  9929. - if (ret == 0) {
  9930. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg,
  9931. - 1);
  9932. + if (ret == 0)
  9933. + {
  9934. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
  9935. }
  9936. - if (ret == 0) {
  9937. + if (ret == 0)
  9938. + {
  9939. *val = reg.is_tilt;
  9940. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  9941. }
  9942. @@ -7380,25 +8179,28 @@ int32_t lsm6dso_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
  9943. * magnetometer sensor.
  9944. * @{
  9945. *
  9946. -*/
  9947. + */
  9948. /**
  9949. * @brief External magnetometer sensitivity value register.[set]
  9950. *
  9951. * @param ctx read / write interface definitions
  9952. * @param buff buffer that contains data to write
  9953. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9954. *
  9955. */
  9956. int32_t lsm6dso_mag_sensitivity_set(stmdev_ctx_t *ctx, uint16_t val)
  9957. {
  9958. uint8_t buff[2];
  9959. int32_t ret;
  9960. - buff[1] = (uint8_t) (val / 256U);
  9961. - buff[0] = (uint8_t) (val - (buff[1] * 256U));
  9962. +
  9963. + buff[1] = (uint8_t)(val / 256U);
  9964. + buff[0] = (uint8_t)(val - (buff[1] * 256U));
  9965. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
  9966. &buff[0]);
  9967. - if (ret == 0) {
  9968. + if (ret == 0)
  9969. + {
  9970. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
  9971. &buff[1]);
  9972. }
  9973. @@ -7411,16 +8213,19 @@ int32_t lsm6dso_mag_sensitivity_set(stmdev_ctx_t *ctx, uint16_t val)
  9974. *
  9975. * @param ctx read / write interface definitions
  9976. * @param buff buffer that stores data read
  9977. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9978. *
  9979. */
  9980. int32_t lsm6dso_mag_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val)
  9981. {
  9982. uint8_t buff[2];
  9983. int32_t ret;
  9984. +
  9985. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
  9986. &buff[0]);
  9987. - if (ret == 0) {
  9988. + if (ret == 0)
  9989. + {
  9990. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
  9991. &buff[1]);
  9992. *val = buff[1];
  9993. @@ -7435,37 +8240,44 @@ int32_t lsm6dso_mag_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val)
  9994. *
  9995. * @param ctx read / write interface definitions
  9996. * @param buff buffer that contains data to write
  9997. + * @retval interface status (MANDATORY: return 0 -> no Error)
  9998. *
  9999. */
  10000. int32_t lsm6dso_mag_offset_set(stmdev_ctx_t *ctx, int16_t *val)
  10001. {
  10002. uint8_t buff[6];
  10003. int32_t ret;
  10004. - buff[1] = (uint8_t) ((uint16_t)val[0] / 256U);
  10005. - buff[0] = (uint8_t) ((uint16_t)val[0] - (buff[1] * 256U));
  10006. - buff[3] = (uint8_t) ((uint16_t)val[1] / 256U);
  10007. - buff[2] = (uint8_t) ((uint16_t)val[1] - (buff[3] * 256U));
  10008. - buff[5] = (uint8_t) ((uint16_t)val[2] / 256U);
  10009. - buff[4] = (uint8_t) ((uint16_t)val[2] - (buff[5] * 256U));
  10010. +
  10011. + buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
  10012. + buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
  10013. + buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
  10014. + buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
  10015. + buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
  10016. + buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
  10017. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[0]);
  10018. - if (ret == 0) {
  10019. + if (ret == 0)
  10020. + {
  10021. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[1]);
  10022. }
  10023. - if (ret == 0) {
  10024. + if (ret == 0)
  10025. + {
  10026. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[2]);
  10027. }
  10028. - if (ret == 0) {
  10029. + if (ret == 0)
  10030. + {
  10031. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[3]);
  10032. }
  10033. - if (ret == 0) {
  10034. + if (ret == 0)
  10035. + {
  10036. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[4]);
  10037. }
  10038. - if (ret == 0) {
  10039. + if (ret == 0)
  10040. + {
  10041. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[5]);
  10042. }
  10043. @@ -7477,31 +8289,38 @@ int32_t lsm6dso_mag_offset_set(stmdev_ctx_t *ctx, int16_t *val)
  10044. *
  10045. * @param ctx read / write interface definitions
  10046. * @param buff buffer that stores data read
  10047. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10048. *
  10049. */
  10050. int32_t lsm6dso_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val)
  10051. {
  10052. uint8_t buff[6];
  10053. int32_t ret;
  10054. +
  10055. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[0]);
  10056. - if (ret == 0) {
  10057. + if (ret == 0)
  10058. + {
  10059. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[1]);
  10060. }
  10061. - if (ret == 0) {
  10062. + if (ret == 0)
  10063. + {
  10064. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[2]);
  10065. }
  10066. - if (ret == 0) {
  10067. + if (ret == 0)
  10068. + {
  10069. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[3]);
  10070. }
  10071. - if (ret == 0) {
  10072. + if (ret == 0)
  10073. + {
  10074. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[4]);
  10075. }
  10076. - if (ret == 0) {
  10077. + if (ret == 0)
  10078. + {
  10079. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[5]);
  10080. val[0] = (int16_t)buff[1];
  10081. val[0] = (val[0] * 256) + (int16_t)buff[0];
  10082. @@ -7525,90 +8344,103 @@ int32_t lsm6dso_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val)
  10083. *
  10084. * @param ctx read / write interface definitions
  10085. * @param buff buffer that contains data to write
  10086. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10087. *
  10088. */
  10089. int32_t lsm6dso_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val)
  10090. {
  10091. uint8_t buff[12];
  10092. int32_t ret;
  10093. +
  10094. uint8_t index;
  10095. - buff[1] = (uint8_t) ((uint16_t)val[0] / 256U);
  10096. - buff[0] = (uint8_t) ((uint16_t)val[0] - (buff[1] * 256U));
  10097. - buff[3] = (uint8_t) ((uint16_t)val[1] / 256U);
  10098. - buff[2] = (uint8_t) ((uint16_t)val[1] - (buff[3] * 256U));
  10099. - buff[5] = (uint8_t) ((uint16_t)val[2] / 256U);
  10100. - buff[4] = (uint8_t) ((uint16_t)val[2] - (buff[5] * 256U));
  10101. - buff[7] = (uint8_t) ((uint16_t)val[3] / 256U);
  10102. - buff[6] = (uint8_t) ((uint16_t)val[3] - (buff[7] * 256U));
  10103. - buff[9] = (uint8_t) ((uint16_t)val[4] / 256U);
  10104. - buff[8] = (uint8_t) ((uint16_t)val[4] - (buff[9] * 256U));
  10105. - buff[11] = (uint8_t) ((uint16_t)val[5] / 256U);
  10106. - buff[10] = (uint8_t) ((uint16_t)val[5] - (buff[11] * 256U));
  10107. + buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
  10108. + buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
  10109. + buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
  10110. + buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
  10111. + buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
  10112. + buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
  10113. + buff[7] = (uint8_t)((uint16_t)val[3] / 256U);
  10114. + buff[6] = (uint8_t)((uint16_t)val[3] - (buff[7] * 256U));
  10115. + buff[9] = (uint8_t)((uint16_t)val[4] / 256U);
  10116. + buff[8] = (uint8_t)((uint16_t)val[4] - (buff[9] * 256U));
  10117. + buff[11] = (uint8_t)((uint16_t)val[5] / 256U);
  10118. + buff[10] = (uint8_t)((uint16_t)val[5] - (buff[11] * 256U));
  10119. index = 0x00U;
  10120. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_L,
  10121. &buff[index]);
  10122. - if (ret == 0) {
  10123. + if (ret == 0)
  10124. + {
  10125. index++;
  10126. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_H,
  10127. &buff[index]);
  10128. }
  10129. - if (ret == 0) {
  10130. + if (ret == 0)
  10131. + {
  10132. index++;
  10133. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_L,
  10134. &buff[index]);
  10135. }
  10136. - if (ret == 0) {
  10137. + if (ret == 0)
  10138. + {
  10139. index++;
  10140. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_H,
  10141. &buff[index]);
  10142. }
  10143. - if (ret == 0) {
  10144. + if (ret == 0)
  10145. + {
  10146. index++;
  10147. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_L,
  10148. &buff[index]);
  10149. }
  10150. - if (ret == 0) {
  10151. + if (ret == 0)
  10152. + {
  10153. index++;
  10154. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_H,
  10155. &buff[index]);
  10156. }
  10157. - if (ret == 0) {
  10158. + if (ret == 0)
  10159. + {
  10160. index++;
  10161. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_L,
  10162. &buff[index]);
  10163. }
  10164. - if (ret == 0) {
  10165. + if (ret == 0)
  10166. + {
  10167. index++;
  10168. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_H,
  10169. &buff[index]);
  10170. }
  10171. - if (ret == 0) {
  10172. + if (ret == 0)
  10173. + {
  10174. index++;
  10175. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_L,
  10176. &buff[index]);
  10177. }
  10178. - if (ret == 0) {
  10179. + if (ret == 0)
  10180. + {
  10181. index++;
  10182. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_H,
  10183. &buff[index]);
  10184. }
  10185. - if (ret == 0) {
  10186. + if (ret == 0)
  10187. + {
  10188. index++;
  10189. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_L,
  10190. &buff[index]);
  10191. }
  10192. - if (ret == 0) {
  10193. + if (ret == 0)
  10194. + {
  10195. index++;
  10196. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_H,
  10197. &buff[index]);
  10198. @@ -7629,67 +8461,80 @@ int32_t lsm6dso_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val)
  10199. *
  10200. * @param ctx read / write interface definitions
  10201. * @param buff buffer that stores data read
  10202. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10203. *
  10204. */
  10205. int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val)
  10206. {
  10207. uint8_t buff[12];
  10208. int32_t ret;
  10209. +
  10210. uint8_t index;
  10211. index = 0x00U;
  10212. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_L, &buff[index]);
  10213. - if (ret == 0) {
  10214. + if (ret == 0)
  10215. + {
  10216. index++;
  10217. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_H, &buff[index]);
  10218. }
  10219. - if (ret == 0) {
  10220. + if (ret == 0)
  10221. + {
  10222. index++;
  10223. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_L, &buff[index]);
  10224. }
  10225. - if (ret == 0) {
  10226. + if (ret == 0)
  10227. + {
  10228. index++;
  10229. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_H, &buff[index]);
  10230. }
  10231. - if (ret == 0) {
  10232. + if (ret == 0)
  10233. + {
  10234. index++;
  10235. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_L, &buff[index]);
  10236. }
  10237. - if (ret == 0) {
  10238. + if (ret == 0)
  10239. + {
  10240. index++;
  10241. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_H, &buff[index]);
  10242. }
  10243. - if (ret == 0) {
  10244. + if (ret == 0)
  10245. + {
  10246. index++;
  10247. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_L, &buff[index]);
  10248. }
  10249. - if (ret == 0) {
  10250. + if (ret == 0)
  10251. + {
  10252. index++;
  10253. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_H, &buff[index]);
  10254. }
  10255. - if (ret == 0) {
  10256. + if (ret == 0)
  10257. + {
  10258. index++;
  10259. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_L, &buff[index]);
  10260. }
  10261. - if (ret == 0) {
  10262. + if (ret == 0)
  10263. + {
  10264. index++;
  10265. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_H, &buff[index]);
  10266. }
  10267. - if (ret == 0) {
  10268. + if (ret == 0)
  10269. + {
  10270. index++;
  10271. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_L, &buff[index]);
  10272. }
  10273. - if (ret == 0) {
  10274. + if (ret == 0)
  10275. + {
  10276. index++;
  10277. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_H, &buff[index]);
  10278. }
  10279. @@ -7706,6 +8551,7 @@ int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val)
  10280. val[4] = (val[4] * 256) + (int16_t)buff[8];
  10281. val[5] = (int16_t)buff[11];
  10282. val[5] = (val[5] * 256) + (int16_t)buff[10];
  10283. +
  10284. return ret;
  10285. }
  10286. @@ -7717,6 +8563,7 @@ int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val)
  10287. *
  10288. * @param ctx read / write interface definitions
  10289. * @param val change the values of mag_z_axis in reg MAG_CFG_A
  10290. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10291. *
  10292. */
  10293. int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
  10294. @@ -7724,10 +8571,12 @@ int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
  10295. {
  10296. lsm6dso_mag_cfg_a_t reg;
  10297. int32_t ret;
  10298. +
  10299. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
  10300. (uint8_t *)&reg);
  10301. - if (ret == 0) {
  10302. + if (ret == 0)
  10303. + {
  10304. reg.mag_z_axis = (uint8_t) val;
  10305. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A,
  10306. (uint8_t *)&reg);
  10307. @@ -7744,6 +8593,7 @@ int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
  10308. *
  10309. * @param ctx read / write interface definitions
  10310. * @param val Get the values of mag_z_axis in reg MAG_CFG_A
  10311. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10312. *
  10313. */
  10314. int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
  10315. @@ -7751,10 +8601,12 @@ int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
  10316. {
  10317. lsm6dso_mag_cfg_a_t reg;
  10318. int32_t ret;
  10319. +
  10320. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
  10321. (uint8_t *)&reg);
  10322. - switch (reg.mag_z_axis) {
  10323. + switch (reg.mag_z_axis)
  10324. + {
  10325. case LSM6DSO_Z_EQ_Y:
  10326. *val = LSM6DSO_Z_EQ_Y;
  10327. break;
  10328. @@ -7795,6 +8647,7 @@ int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
  10329. *
  10330. * @param ctx read / write interface definitions
  10331. * @param val change the values of mag_y_axis in reg MAG_CFG_A
  10332. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10333. *
  10334. */
  10335. int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
  10336. @@ -7802,10 +8655,12 @@ int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
  10337. {
  10338. lsm6dso_mag_cfg_a_t reg;
  10339. int32_t ret;
  10340. +
  10341. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
  10342. (uint8_t *)&reg);
  10343. - if (ret == 0) {
  10344. + if (ret == 0)
  10345. + {
  10346. reg.mag_y_axis = (uint8_t)val;
  10347. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A,
  10348. (uint8_t *) &reg);
  10349. @@ -7822,6 +8677,7 @@ int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
  10350. *
  10351. * @param ctx read / write interface definitions
  10352. * @param val Get the values of mag_y_axis in reg MAG_CFG_A
  10353. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10354. *
  10355. */
  10356. int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
  10357. @@ -7829,10 +8685,12 @@ int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
  10358. {
  10359. lsm6dso_mag_cfg_a_t reg;
  10360. int32_t ret;
  10361. +
  10362. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
  10363. (uint8_t *)&reg);
  10364. - switch (reg.mag_y_axis) {
  10365. + switch (reg.mag_y_axis)
  10366. + {
  10367. case LSM6DSO_Y_EQ_Y:
  10368. *val = LSM6DSO_Y_EQ_Y;
  10369. break;
  10370. @@ -7873,6 +8731,7 @@ int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
  10371. *
  10372. * @param ctx read / write interface definitions
  10373. * @param val change the values of mag_x_axis in reg MAG_CFG_B
  10374. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10375. *
  10376. */
  10377. int32_t lsm6dso_mag_x_orient_set(stmdev_ctx_t *ctx,
  10378. @@ -7880,10 +8739,12 @@ int32_t lsm6dso_mag_x_orient_set(stmdev_ctx_t *ctx,
  10379. {
  10380. lsm6dso_mag_cfg_b_t reg;
  10381. int32_t ret;
  10382. +
  10383. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B,
  10384. (uint8_t *)&reg);
  10385. - if (ret == 0) {
  10386. + if (ret == 0)
  10387. + {
  10388. reg.mag_x_axis = (uint8_t)val;
  10389. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_B,
  10390. (uint8_t *)&reg);
  10391. @@ -7900,6 +8761,7 @@ int32_t lsm6dso_mag_x_orient_set(stmdev_ctx_t *ctx,
  10392. *
  10393. * @param ctx read / write interface definitions
  10394. * @param val Get the values of mag_x_axis in reg MAG_CFG_B
  10395. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10396. *
  10397. */
  10398. int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
  10399. @@ -7907,10 +8769,12 @@ int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
  10400. {
  10401. lsm6dso_mag_cfg_b_t reg;
  10402. int32_t ret;
  10403. +
  10404. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B,
  10405. (uint8_t *)&reg);
  10406. - switch (reg.mag_x_axis) {
  10407. + switch (reg.mag_x_axis)
  10408. + {
  10409. case LSM6DSO_X_EQ_Y:
  10410. *val = LSM6DSO_X_EQ_Y;
  10411. break;
  10412. @@ -7954,7 +8818,7 @@ int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
  10413. * state_machine.
  10414. * @{
  10415. *
  10416. -*/
  10417. + */
  10418. /**
  10419. * @brief Interrupt status bit for FSM long counter
  10420. @@ -7962,6 +8826,7 @@ int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
  10421. *
  10422. * @param ctx read / write interface definitions
  10423. * @param val change the values of is_fsm_lc in reg EMB_FUNC_STATUS
  10424. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10425. *
  10426. */
  10427. int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
  10428. @@ -7969,14 +8834,16 @@ int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
  10429. {
  10430. lsm6dso_emb_func_status_t reg;
  10431. int32_t ret;
  10432. +
  10433. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10434. - if (ret == 0) {
  10435. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg,
  10436. - 1);
  10437. + if (ret == 0)
  10438. + {
  10439. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
  10440. }
  10441. - if (ret == 0) {
  10442. + if (ret == 0)
  10443. + {
  10444. *val = reg.is_fsm_lc;
  10445. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10446. }
  10447. @@ -7989,25 +8856,30 @@ int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
  10448. *
  10449. * @param ctx read / write interface definitions
  10450. * @param val union of registers from FSM_ENABLE_A to FSM_ENABLE_B
  10451. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10452. *
  10453. */
  10454. int32_t lsm6dso_fsm_enable_set(stmdev_ctx_t *ctx,
  10455. lsm6dso_emb_fsm_enable_t *val)
  10456. {
  10457. int32_t ret;
  10458. +
  10459. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10460. - if (ret == 0) {
  10461. + if (ret == 0)
  10462. + {
  10463. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_A,
  10464. (uint8_t *)&val->fsm_enable_a, 1);
  10465. }
  10466. - if (ret == 0) {
  10467. + if (ret == 0)
  10468. + {
  10469. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_B,
  10470. (uint8_t *)&val->fsm_enable_b, 1);
  10471. }
  10472. - if (ret == 0) {
  10473. + if (ret == 0)
  10474. + {
  10475. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10476. }
  10477. @@ -8019,19 +8891,23 @@ int32_t lsm6dso_fsm_enable_set(stmdev_ctx_t *ctx,
  10478. *
  10479. * @param ctx read / write interface definitions
  10480. * @param val union of registers from FSM_ENABLE_A to FSM_ENABLE_B
  10481. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10482. *
  10483. */
  10484. int32_t lsm6dso_fsm_enable_get(stmdev_ctx_t *ctx,
  10485. lsm6dso_emb_fsm_enable_t *val)
  10486. {
  10487. int32_t ret;
  10488. +
  10489. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10490. - if (ret == 0) {
  10491. + if (ret == 0)
  10492. + {
  10493. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, (uint8_t *) val, 2);
  10494. }
  10495. - if (ret == 0) {
  10496. + if (ret == 0)
  10497. + {
  10498. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10499. }
  10500. @@ -8044,21 +8920,25 @@ int32_t lsm6dso_fsm_enable_get(stmdev_ctx_t *ctx,
  10501. *
  10502. * @param ctx read / write interface definitions
  10503. * @param buff buffer that contains data to write
  10504. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10505. *
  10506. */
  10507. int32_t lsm6dso_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val)
  10508. {
  10509. uint8_t buff[2];
  10510. int32_t ret;
  10511. - buff[1] = (uint8_t) (val / 256U);
  10512. - buff[0] = (uint8_t) (val - (buff[1] * 256U));
  10513. +
  10514. + buff[1] = (uint8_t)(val / 256U);
  10515. + buff[0] = (uint8_t)(val - (buff[1] * 256U));
  10516. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10517. - if (ret == 0) {
  10518. + if (ret == 0)
  10519. + {
  10520. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
  10521. }
  10522. - if (ret == 0) {
  10523. + if (ret == 0)
  10524. + {
  10525. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10526. }
  10527. @@ -8071,19 +8951,23 @@ int32_t lsm6dso_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val)
  10528. *
  10529. * @param ctx read / write interface definitions
  10530. * @param buff buffer that stores data read
  10531. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10532. *
  10533. */
  10534. int32_t lsm6dso_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val)
  10535. {
  10536. uint8_t buff[2];
  10537. int32_t ret;
  10538. +
  10539. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10540. - if (ret == 0) {
  10541. + if (ret == 0)
  10542. + {
  10543. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
  10544. }
  10545. - if (ret == 0) {
  10546. + if (ret == 0)
  10547. + {
  10548. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10549. *val = buff[1];
  10550. *val = (*val * 256U) + buff[0];
  10551. @@ -8098,6 +8982,7 @@ int32_t lsm6dso_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val)
  10552. * @param ctx read / write interface definitions
  10553. * @param val change the values of fsm_lc_clr in
  10554. * reg FSM_LONG_COUNTER_CLEAR
  10555. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10556. *
  10557. */
  10558. int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx,
  10559. @@ -8105,20 +8990,24 @@ int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx,
  10560. {
  10561. lsm6dso_fsm_long_counter_clear_t reg;
  10562. int32_t ret;
  10563. +
  10564. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10565. - if (ret == 0) {
  10566. + if (ret == 0)
  10567. + {
  10568. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
  10569. (uint8_t *)&reg, 1);
  10570. }
  10571. - if (ret == 0) {
  10572. + if (ret == 0)
  10573. + {
  10574. reg. fsm_lc_clr = (uint8_t)val;
  10575. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
  10576. (uint8_t *)&reg, 1);
  10577. }
  10578. - if (ret == 0) {
  10579. + if (ret == 0)
  10580. + {
  10581. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10582. }
  10583. @@ -8131,6 +9020,7 @@ int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx,
  10584. * @param ctx read / write interface definitions
  10585. * @param val Get the values of fsm_lc_clr in
  10586. * reg FSM_LONG_COUNTER_CLEAR
  10587. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10588. *
  10589. */
  10590. int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
  10591. @@ -8138,15 +9028,19 @@ int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
  10592. {
  10593. lsm6dso_fsm_long_counter_clear_t reg;
  10594. int32_t ret;
  10595. +
  10596. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10597. - if (ret == 0) {
  10598. + if (ret == 0)
  10599. + {
  10600. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
  10601. (uint8_t *)&reg, 1);
  10602. }
  10603. - if (ret == 0) {
  10604. - switch (reg.fsm_lc_clr) {
  10605. + if (ret == 0)
  10606. + {
  10607. + switch (reg.fsm_lc_clr)
  10608. + {
  10609. case LSM6DSO_LC_NORMAL:
  10610. *val = LSM6DSO_LC_NORMAL;
  10611. break;
  10612. @@ -8165,7 +9059,8 @@ int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
  10613. }
  10614. }
  10615. - if (ret == 0) {
  10616. + if (ret == 0)
  10617. + {
  10618. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10619. }
  10620. @@ -8177,18 +9072,22 @@ int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
  10621. *
  10622. * @param ctx read / write interface definitions
  10623. * @param val struct of registers from FSM_OUTS1 to FSM_OUTS16
  10624. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10625. *
  10626. */
  10627. int32_t lsm6dso_fsm_out_get(stmdev_ctx_t *ctx, lsm6dso_fsm_out_t *val)
  10628. {
  10629. int32_t ret;
  10630. +
  10631. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10632. - if (ret == 0) {
  10633. + if (ret == 0)
  10634. + {
  10635. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_OUTS1, (uint8_t *)val, 16);
  10636. }
  10637. - if (ret == 0) {
  10638. + if (ret == 0)
  10639. + {
  10640. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10641. }
  10642. @@ -8200,6 +9099,7 @@ int32_t lsm6dso_fsm_out_get(stmdev_ctx_t *ctx, lsm6dso_fsm_out_t *val)
  10643. *
  10644. * @param ctx read / write interface definitions
  10645. * @param val change the values of fsm_odr in reg EMB_FUNC_ODR_CFG_B
  10646. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10647. *
  10648. */
  10649. int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx,
  10650. @@ -8207,14 +9107,17 @@ int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx,
  10651. {
  10652. lsm6dso_emb_func_odr_cfg_b_t reg;
  10653. int32_t ret;
  10654. +
  10655. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10656. - if (ret == 0) {
  10657. + if (ret == 0)
  10658. + {
  10659. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
  10660. (uint8_t *)&reg, 1);
  10661. }
  10662. - if (ret == 0) {
  10663. + if (ret == 0)
  10664. + {
  10665. reg.not_used_01 = 3; /* set default values */
  10666. reg.not_used_02 = 2; /* set default values */
  10667. reg.fsm_odr = (uint8_t)val;
  10668. @@ -8222,7 +9125,8 @@ int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx,
  10669. (uint8_t *)&reg, 1);
  10670. }
  10671. - if (ret == 0) {
  10672. + if (ret == 0)
  10673. + {
  10674. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10675. }
  10676. @@ -8234,6 +9138,7 @@ int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx,
  10677. *
  10678. * @param ctx read / write interface definitions
  10679. * @param val Get the values of fsm_odr in reg EMB_FUNC_ODR_CFG_B
  10680. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10681. *
  10682. */
  10683. int32_t lsm6dso_fsm_data_rate_get(stmdev_ctx_t *ctx,
  10684. @@ -8241,15 +9146,19 @@ int32_t lsm6dso_fsm_data_rate_get(stmdev_ctx_t *ctx,
  10685. {
  10686. lsm6dso_emb_func_odr_cfg_b_t reg;
  10687. int32_t ret;
  10688. +
  10689. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10690. - if (ret == 0) {
  10691. + if (ret == 0)
  10692. + {
  10693. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
  10694. (uint8_t *)&reg, 1);
  10695. }
  10696. - if (ret == 0) {
  10697. - switch (reg.fsm_odr) {
  10698. + if (ret == 0)
  10699. + {
  10700. + switch (reg.fsm_odr)
  10701. + {
  10702. case LSM6DSO_ODR_FSM_12Hz5:
  10703. *val = LSM6DSO_ODR_FSM_12Hz5;
  10704. break;
  10705. @@ -8282,26 +9191,29 @@ int32_t lsm6dso_fsm_data_rate_get(stmdev_ctx_t *ctx,
  10706. *
  10707. * @param ctx read / write interface definitions
  10708. * @param val change the values of fsm_init in reg FSM_INIT
  10709. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10710. *
  10711. */
  10712. int32_t lsm6dso_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val)
  10713. {
  10714. lsm6dso_emb_func_init_b_t reg;
  10715. int32_t ret;
  10716. +
  10717. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10718. - if (ret == 0) {
  10719. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg,
  10720. - 1);
  10721. + if (ret == 0)
  10722. + {
  10723. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
  10724. }
  10725. - if (ret == 0) {
  10726. + if (ret == 0)
  10727. + {
  10728. reg.fsm_init = val;
  10729. - ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg,
  10730. - 1);
  10731. + ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
  10732. }
  10733. - if (ret == 0) {
  10734. + if (ret == 0)
  10735. + {
  10736. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10737. }
  10738. @@ -8313,20 +9225,23 @@ int32_t lsm6dso_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val)
  10739. *
  10740. * @param ctx read / write interface definitions
  10741. * @param val change the values of fsm_init in reg FSM_INIT
  10742. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10743. *
  10744. */
  10745. int32_t lsm6dso_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val)
  10746. {
  10747. lsm6dso_emb_func_init_b_t reg;
  10748. int32_t ret;
  10749. +
  10750. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  10751. - if (ret == 0) {
  10752. - ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg,
  10753. - 1);
  10754. + if (ret == 0)
  10755. + {
  10756. + ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
  10757. }
  10758. - if (ret == 0) {
  10759. + if (ret == 0)
  10760. + {
  10761. *val = reg.fsm_init;
  10762. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10763. }
  10764. @@ -8342,6 +9257,7 @@ int32_t lsm6dso_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val)
  10765. *
  10766. * @param ctx read / write interface definitions
  10767. * @param val the value of long counter
  10768. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10769. *
  10770. */
  10771. int32_t lsm6dso_long_cnt_int_value_set(stmdev_ctx_t *ctx,
  10772. @@ -8349,12 +9265,14 @@ int32_t lsm6dso_long_cnt_int_value_set(stmdev_ctx_t *ctx,
  10773. {
  10774. uint8_t buff[2];
  10775. int32_t ret;
  10776. - buff[1] = (uint8_t) (val / 256U);
  10777. - buff[0] = (uint8_t) (val - (buff[1] * 256U));
  10778. +
  10779. + buff[1] = (uint8_t)(val / 256U);
  10780. + buff[0] = (uint8_t)(val - (buff[1] * 256U));
  10781. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L,
  10782. &buff[0]);
  10783. - if (ret == 0) {
  10784. + if (ret == 0)
  10785. + {
  10786. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H,
  10787. &buff[1]);
  10788. }
  10789. @@ -8370,6 +9288,7 @@ int32_t lsm6dso_long_cnt_int_value_set(stmdev_ctx_t *ctx,
  10790. *
  10791. * @param ctx read / write interface definitions
  10792. * @param val buffer that stores the value of long counter
  10793. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10794. *
  10795. */
  10796. int32_t lsm6dso_long_cnt_int_value_get(stmdev_ctx_t *ctx,
  10797. @@ -8377,10 +9296,12 @@ int32_t lsm6dso_long_cnt_int_value_get(stmdev_ctx_t *ctx,
  10798. {
  10799. uint8_t buff[2];
  10800. int32_t ret;
  10801. +
  10802. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L,
  10803. &buff[0]);
  10804. - if (ret == 0) {
  10805. + if (ret == 0)
  10806. + {
  10807. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H,
  10808. &buff[1]);
  10809. *val = buff[1];
  10810. @@ -8395,13 +9316,16 @@ int32_t lsm6dso_long_cnt_int_value_get(stmdev_ctx_t *ctx,
  10811. *
  10812. * @param ctx read / write interface definitions
  10813. * @param val value to write
  10814. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10815. *
  10816. */
  10817. int32_t lsm6dso_fsm_number_of_programs_set(stmdev_ctx_t *ctx,
  10818. uint8_t val)
  10819. {
  10820. int32_t ret;
  10821. +
  10822. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_PROGRAMS, &val);
  10823. +
  10824. return ret;
  10825. }
  10826. @@ -8410,13 +9334,16 @@ int32_t lsm6dso_fsm_number_of_programs_set(stmdev_ctx_t *ctx,
  10827. *
  10828. * @param ctx read / write interface definitions
  10829. * @param val buffer that stores data read.
  10830. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10831. *
  10832. */
  10833. int32_t lsm6dso_fsm_number_of_programs_get(stmdev_ctx_t *ctx,
  10834. uint8_t *val)
  10835. {
  10836. int32_t ret;
  10837. +
  10838. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_PROGRAMS, val);
  10839. +
  10840. return ret;
  10841. }
  10842. @@ -8426,18 +9353,21 @@ int32_t lsm6dso_fsm_number_of_programs_get(stmdev_ctx_t *ctx,
  10843. *
  10844. * @param ctx read / write interface definitions
  10845. * @param val the value of start address
  10846. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10847. *
  10848. */
  10849. int32_t lsm6dso_fsm_start_address_set(stmdev_ctx_t *ctx, uint16_t val)
  10850. {
  10851. uint8_t buff[2];
  10852. int32_t ret;
  10853. - buff[1] = (uint8_t) (val / 256U);
  10854. - buff[0] = (uint8_t) (val - (buff[1] * 256U));
  10855. +
  10856. + buff[1] = (uint8_t)(val / 256U);
  10857. + buff[0] = (uint8_t)(val - (buff[1] * 256U));
  10858. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_L,
  10859. &buff[0]);
  10860. - if (ret == 0) {
  10861. + if (ret == 0)
  10862. + {
  10863. ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_H,
  10864. &buff[1]);
  10865. }
  10866. @@ -8451,6 +9381,7 @@ int32_t lsm6dso_fsm_start_address_set(stmdev_ctx_t *ctx, uint16_t val)
  10867. *
  10868. * @param ctx read / write interface definitions
  10869. * @param val buffer the value of start address.
  10870. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10871. *
  10872. */
  10873. int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
  10874. @@ -8458,9 +9389,11 @@ int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
  10875. {
  10876. uint8_t buff[2];
  10877. int32_t ret;
  10878. +
  10879. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_L, &buff[0]);
  10880. - if (ret == 0) {
  10881. + if (ret == 0)
  10882. + {
  10883. ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_H, &buff[1]);
  10884. *val = buff[1];
  10885. *val = (*val * 256U) + buff[0];
  10886. @@ -8480,7 +9413,7 @@ int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
  10887. * sensor hub.
  10888. * @{
  10889. *
  10890. -*/
  10891. + */
  10892. /**
  10893. * @brief Sensor hub output registers.[get]
  10894. @@ -8488,20 +9421,24 @@ int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
  10895. * @param ctx read / write interface definitions
  10896. * @param val values read from registers SENSOR_HUB_1 to SENSOR_HUB_18
  10897. * @param len number of consecutive register to read (max 18)
  10898. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10899. *
  10900. */
  10901. int32_t lsm6dso_sh_read_data_raw_get(stmdev_ctx_t *ctx, uint8_t *val,
  10902. uint8_t len)
  10903. {
  10904. int32_t ret;
  10905. +
  10906. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  10907. - if (ret == 0) {
  10908. + if (ret == 0)
  10909. + {
  10910. ret = lsm6dso_read_reg(ctx, LSM6DSO_SENSOR_HUB_1, (uint8_t *) val,
  10911. len);
  10912. }
  10913. - if (ret == 0) {
  10914. + if (ret == 0)
  10915. + {
  10916. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10917. }
  10918. @@ -8513,6 +9450,7 @@ int32_t lsm6dso_sh_read_data_raw_get(stmdev_ctx_t *ctx, uint8_t *val,
  10919. *
  10920. * @param ctx read / write interface definitions
  10921. * @param val change the values of aux_sens_on in reg MASTER_CONFIG
  10922. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10923. *
  10924. */
  10925. int32_t lsm6dso_sh_slave_connected_set(stmdev_ctx_t *ctx,
  10926. @@ -8520,20 +9458,22 @@ int32_t lsm6dso_sh_slave_connected_set(stmdev_ctx_t *ctx,
  10927. {
  10928. lsm6dso_master_config_t reg;
  10929. int32_t ret;
  10930. +
  10931. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  10932. - if (ret == 0) {
  10933. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  10934. - 1);
  10935. + if (ret == 0)
  10936. + {
  10937. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  10938. }
  10939. - if (ret == 0) {
  10940. + if (ret == 0)
  10941. + {
  10942. reg.aux_sens_on = (uint8_t)val;
  10943. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  10944. - 1);
  10945. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  10946. }
  10947. - if (ret == 0) {
  10948. + if (ret == 0)
  10949. + {
  10950. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  10951. }
  10952. @@ -8545,6 +9485,7 @@ int32_t lsm6dso_sh_slave_connected_set(stmdev_ctx_t *ctx,
  10953. *
  10954. * @param ctx read / write interface definitions
  10955. * @param val Get the values of aux_sens_on in reg MASTER_CONFIG
  10956. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10957. *
  10958. */
  10959. int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
  10960. @@ -8552,15 +9493,18 @@ int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
  10961. {
  10962. lsm6dso_master_config_t reg;
  10963. int32_t ret;
  10964. +
  10965. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  10966. - if (ret == 0) {
  10967. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  10968. - 1);
  10969. + if (ret == 0)
  10970. + {
  10971. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  10972. }
  10973. - if (ret == 0) {
  10974. - switch (reg.aux_sens_on) {
  10975. + if (ret == 0)
  10976. + {
  10977. + switch (reg.aux_sens_on)
  10978. + {
  10979. case LSM6DSO_SLV_0:
  10980. *val = LSM6DSO_SLV_0;
  10981. break;
  10982. @@ -8593,26 +9537,29 @@ int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
  10983. *
  10984. * @param ctx read / write interface definitions
  10985. * @param val change the values of master_on in reg MASTER_CONFIG
  10986. + * @retval interface status (MANDATORY: return 0 -> no Error)
  10987. *
  10988. */
  10989. int32_t lsm6dso_sh_master_set(stmdev_ctx_t *ctx, uint8_t val)
  10990. {
  10991. lsm6dso_master_config_t reg;
  10992. int32_t ret;
  10993. +
  10994. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  10995. - if (ret == 0) {
  10996. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  10997. - 1);
  10998. + if (ret == 0)
  10999. + {
  11000. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11001. }
  11002. - if (ret == 0) {
  11003. + if (ret == 0)
  11004. + {
  11005. reg.master_on = val;
  11006. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11007. - 1);
  11008. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11009. }
  11010. - if (ret == 0) {
  11011. + if (ret == 0)
  11012. + {
  11013. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11014. }
  11015. @@ -8624,20 +9571,23 @@ int32_t lsm6dso_sh_master_set(stmdev_ctx_t *ctx, uint8_t val)
  11016. *
  11017. * @param ctx read / write interface definitions
  11018. * @param val change the values of master_on in reg MASTER_CONFIG
  11019. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11020. *
  11021. */
  11022. int32_t lsm6dso_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val)
  11023. {
  11024. lsm6dso_master_config_t reg;
  11025. int32_t ret;
  11026. +
  11027. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11028. - if (ret == 0) {
  11029. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11030. - 1);
  11031. + if (ret == 0)
  11032. + {
  11033. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11034. }
  11035. - if (ret == 0) {
  11036. + if (ret == 0)
  11037. + {
  11038. *val = reg.master_on;
  11039. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11040. }
  11041. @@ -8650,6 +9600,7 @@ int32_t lsm6dso_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val)
  11042. *
  11043. * @param ctx read / write interface definitions
  11044. * @param val change the values of shub_pu_en in reg MASTER_CONFIG
  11045. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11046. *
  11047. */
  11048. int32_t lsm6dso_sh_pin_mode_set(stmdev_ctx_t *ctx,
  11049. @@ -8657,20 +9608,22 @@ int32_t lsm6dso_sh_pin_mode_set(stmdev_ctx_t *ctx,
  11050. {
  11051. lsm6dso_master_config_t reg;
  11052. int32_t ret;
  11053. +
  11054. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11055. - if (ret == 0) {
  11056. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11057. - 1);
  11058. + if (ret == 0)
  11059. + {
  11060. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11061. }
  11062. - if (ret == 0) {
  11063. + if (ret == 0)
  11064. + {
  11065. reg.shub_pu_en = (uint8_t)val;
  11066. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11067. - 1);
  11068. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11069. }
  11070. - if (ret == 0) {
  11071. + if (ret == 0)
  11072. + {
  11073. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11074. }
  11075. @@ -8682,6 +9635,7 @@ int32_t lsm6dso_sh_pin_mode_set(stmdev_ctx_t *ctx,
  11076. *
  11077. * @param ctx read / write interface definitions
  11078. * @param val Get the values of shub_pu_en in reg MASTER_CONFIG
  11079. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11080. *
  11081. */
  11082. int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx,
  11083. @@ -8689,15 +9643,18 @@ int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx,
  11084. {
  11085. lsm6dso_master_config_t reg;
  11086. int32_t ret;
  11087. +
  11088. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11089. - if (ret == 0) {
  11090. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11091. - 1);
  11092. + if (ret == 0)
  11093. + {
  11094. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11095. }
  11096. - if (ret == 0) {
  11097. - switch (reg.shub_pu_en) {
  11098. + if (ret == 0)
  11099. + {
  11100. + switch (reg.shub_pu_en)
  11101. + {
  11102. case LSM6DSO_EXT_PULL_UP:
  11103. *val = LSM6DSO_EXT_PULL_UP;
  11104. break;
  11105. @@ -8723,26 +9680,29 @@ int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx,
  11106. * @param ctx read / write interface definitions
  11107. * @param val change the values of pass_through_mode in
  11108. * reg MASTER_CONFIG
  11109. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11110. *
  11111. */
  11112. int32_t lsm6dso_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val)
  11113. {
  11114. lsm6dso_master_config_t reg;
  11115. int32_t ret;
  11116. +
  11117. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11118. - if (ret == 0) {
  11119. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11120. - 1);
  11121. + if (ret == 0)
  11122. + {
  11123. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11124. }
  11125. - if (ret == 0) {
  11126. + if (ret == 0)
  11127. + {
  11128. reg.pass_through_mode = val;
  11129. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11130. - 1);
  11131. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11132. }
  11133. - if (ret == 0) {
  11134. + if (ret == 0)
  11135. + {
  11136. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11137. }
  11138. @@ -8755,20 +9715,23 @@ int32_t lsm6dso_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val)
  11139. * @param ctx read / write interface definitions
  11140. * @param val change the values of pass_through_mode in
  11141. * reg MASTER_CONFIG
  11142. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11143. *
  11144. */
  11145. int32_t lsm6dso_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val)
  11146. {
  11147. lsm6dso_master_config_t reg;
  11148. int32_t ret;
  11149. +
  11150. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11151. - if (ret == 0) {
  11152. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11153. - 1);
  11154. + if (ret == 0)
  11155. + {
  11156. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11157. }
  11158. - if (ret == 0) {
  11159. + if (ret == 0)
  11160. + {
  11161. *val = reg.pass_through_mode;
  11162. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11163. }
  11164. @@ -8781,6 +9744,7 @@ int32_t lsm6dso_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val)
  11165. *
  11166. * @param ctx read / write interface definitions
  11167. * @param val change the values of start_config in reg MASTER_CONFIG
  11168. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11169. *
  11170. */
  11171. int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
  11172. @@ -8788,20 +9752,22 @@ int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
  11173. {
  11174. lsm6dso_master_config_t reg;
  11175. int32_t ret;
  11176. +
  11177. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11178. - if (ret == 0) {
  11179. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11180. - 1);
  11181. + if (ret == 0)
  11182. + {
  11183. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11184. }
  11185. - if (ret == 0) {
  11186. + if (ret == 0)
  11187. + {
  11188. reg.start_config = (uint8_t)val;
  11189. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11190. - 1);
  11191. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11192. }
  11193. - if (ret == 0) {
  11194. + if (ret == 0)
  11195. + {
  11196. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11197. }
  11198. @@ -8813,6 +9779,7 @@ int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
  11199. *
  11200. * @param ctx read / write interface definitions
  11201. * @param val Get the values of start_config in reg MASTER_CONFIG
  11202. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11203. *
  11204. */
  11205. int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
  11206. @@ -8820,15 +9787,18 @@ int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
  11207. {
  11208. lsm6dso_master_config_t reg;
  11209. int32_t ret;
  11210. +
  11211. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11212. - if (ret == 0) {
  11213. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11214. - 1);
  11215. + if (ret == 0)
  11216. + {
  11217. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11218. }
  11219. - if (ret == 0) {
  11220. - switch (reg.start_config) {
  11221. + if (ret == 0)
  11222. + {
  11223. + switch (reg.start_config)
  11224. + {
  11225. case LSM6DSO_EXT_ON_INT2_PIN:
  11226. *val = LSM6DSO_EXT_ON_INT2_PIN;
  11227. break;
  11228. @@ -8854,6 +9824,7 @@ int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
  11229. *
  11230. * @param ctx read / write interface definitions
  11231. * @param val change the values of write_once in reg MASTER_CONFIG
  11232. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11233. *
  11234. */
  11235. int32_t lsm6dso_sh_write_mode_set(stmdev_ctx_t *ctx,
  11236. @@ -8861,20 +9832,22 @@ int32_t lsm6dso_sh_write_mode_set(stmdev_ctx_t *ctx,
  11237. {
  11238. lsm6dso_master_config_t reg;
  11239. int32_t ret;
  11240. +
  11241. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11242. - if (ret == 0) {
  11243. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11244. - 1);
  11245. + if (ret == 0)
  11246. + {
  11247. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11248. }
  11249. - if (ret == 0) {
  11250. + if (ret == 0)
  11251. + {
  11252. reg.write_once = (uint8_t)val;
  11253. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11254. - 1);
  11255. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11256. }
  11257. - if (ret == 0) {
  11258. + if (ret == 0)
  11259. + {
  11260. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11261. }
  11262. @@ -8887,6 +9860,7 @@ int32_t lsm6dso_sh_write_mode_set(stmdev_ctx_t *ctx,
  11263. *
  11264. * @param ctx read / write interface definitions
  11265. * @param val Get the values of write_once in reg MASTER_CONFIG
  11266. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11267. *
  11268. */
  11269. int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
  11270. @@ -8894,15 +9868,18 @@ int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
  11271. {
  11272. lsm6dso_master_config_t reg;
  11273. int32_t ret;
  11274. +
  11275. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11276. - if (ret == 0) {
  11277. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11278. - 1);
  11279. + if (ret == 0)
  11280. + {
  11281. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11282. }
  11283. - if (ret == 0) {
  11284. - switch (reg.write_once) {
  11285. + if (ret == 0)
  11286. + {
  11287. + switch (reg.write_once)
  11288. + {
  11289. case LSM6DSO_EACH_SH_CYCLE:
  11290. *val = LSM6DSO_EACH_SH_CYCLE;
  11291. break;
  11292. @@ -8926,32 +9903,35 @@ int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
  11293. * @brief Reset Master logic and output registers.[set]
  11294. *
  11295. * @param ctx read / write interface definitions
  11296. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11297. *
  11298. */
  11299. int32_t lsm6dso_sh_reset_set(stmdev_ctx_t *ctx)
  11300. {
  11301. lsm6dso_master_config_t reg;
  11302. int32_t ret;
  11303. +
  11304. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11305. - if (ret == 0) {
  11306. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11307. - 1);
  11308. + if (ret == 0)
  11309. + {
  11310. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11311. }
  11312. - if (ret == 0) {
  11313. + if (ret == 0)
  11314. + {
  11315. reg.rst_master_regs = PROPERTY_ENABLE;
  11316. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11317. - 1);
  11318. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11319. }
  11320. - if (ret == 0) {
  11321. + if (ret == 0)
  11322. + {
  11323. reg.rst_master_regs = PROPERTY_DISABLE;
  11324. - ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11325. - 1);
  11326. + ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11327. }
  11328. - if (ret == 0) {
  11329. + if (ret == 0)
  11330. + {
  11331. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11332. }
  11333. @@ -8963,20 +9943,23 @@ int32_t lsm6dso_sh_reset_set(stmdev_ctx_t *ctx)
  11334. *
  11335. * @param ctx read / write interface definitions
  11336. * @param val change the values of rst_master_regs in reg MASTER_CONFIG
  11337. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11338. *
  11339. */
  11340. int32_t lsm6dso_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
  11341. {
  11342. lsm6dso_master_config_t reg;
  11343. int32_t ret;
  11344. +
  11345. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11346. - if (ret == 0) {
  11347. - ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg,
  11348. - 1);
  11349. + if (ret == 0)
  11350. + {
  11351. + ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
  11352. }
  11353. - if (ret == 0) {
  11354. + if (ret == 0)
  11355. + {
  11356. *val = reg.rst_master_regs;
  11357. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11358. }
  11359. @@ -8989,6 +9972,7 @@ int32_t lsm6dso_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
  11360. *
  11361. * @param ctx read / write interface definitions
  11362. * @param val change the values of shub_odr in reg slv1_CONFIG
  11363. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11364. *
  11365. */
  11366. int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx,
  11367. @@ -8996,18 +9980,22 @@ int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx,
  11368. {
  11369. lsm6dso_slv0_config_t reg;
  11370. int32_t ret;
  11371. +
  11372. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11373. - if (ret == 0) {
  11374. - ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
  11375. + if (ret == 0)
  11376. + {
  11377. + ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
  11378. }
  11379. - if (ret == 0) {
  11380. + if (ret == 0)
  11381. + {
  11382. reg.shub_odr = (uint8_t)val;
  11383. - ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
  11384. + ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
  11385. }
  11386. - if (ret == 0) {
  11387. + if (ret == 0)
  11388. + {
  11389. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11390. }
  11391. @@ -9019,6 +10007,7 @@ int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx,
  11392. *
  11393. * @param ctx read / write interface definitions
  11394. * @param val Get the values of shub_odr in reg slv1_CONFIG
  11395. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11396. *
  11397. */
  11398. int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx,
  11399. @@ -9026,14 +10015,18 @@ int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx,
  11400. {
  11401. lsm6dso_slv0_config_t reg;
  11402. int32_t ret;
  11403. +
  11404. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11405. - if (ret == 0) {
  11406. - ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
  11407. + if (ret == 0)
  11408. + {
  11409. + ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
  11410. }
  11411. - if (ret == 0) {
  11412. - switch (reg.shub_odr) {
  11413. + if (ret == 0)
  11414. + {
  11415. + switch (reg.shub_odr)
  11416. + {
  11417. case LSM6DSO_SH_ODR_104Hz:
  11418. *val = LSM6DSO_SH_ODR_104Hz;
  11419. break;
  11420. @@ -9069,6 +10062,7 @@ int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx,
  11421. * - uint8_t slv1_add; 8 bit i2c device address
  11422. * - uint8_t slv1_subadd; 8 bit register device address
  11423. * - uint8_t slv1_data; 8 bit data to write
  11424. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11425. *
  11426. */
  11427. int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx,
  11428. @@ -9076,25 +10070,30 @@ int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx,
  11429. {
  11430. lsm6dso_slv0_add_t reg;
  11431. int32_t ret;
  11432. +
  11433. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11434. - if (ret == 0) {
  11435. + if (ret == 0)
  11436. + {
  11437. reg.slave0 = val->slv0_add;
  11438. reg.rw_0 = 0;
  11439. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)&reg, 1);
  11440. }
  11441. - if (ret == 0) {
  11442. + if (ret == 0)
  11443. + {
  11444. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
  11445. &(val->slv0_subadd), 1);
  11446. }
  11447. - if (ret == 0) {
  11448. + if (ret == 0)
  11449. + {
  11450. ret = lsm6dso_write_reg(ctx, LSM6DSO_DATAWRITE_SLV0,
  11451. &(val->slv0_data), 1);
  11452. }
  11453. - if (ret == 0) {
  11454. + if (ret == 0)
  11455. + {
  11456. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11457. }
  11458. @@ -9109,6 +10108,7 @@ int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx,
  11459. * - uint8_t slv1_add; 8 bit i2c device address
  11460. * - uint8_t slv1_subadd; 8 bit register device address
  11461. * - uint8_t slv1_len; num of bit to read
  11462. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11463. *
  11464. */
  11465. int32_t lsm6dso_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
  11466. @@ -9117,32 +10117,37 @@ int32_t lsm6dso_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
  11467. lsm6dso_slv0_add_t slv0_add;
  11468. lsm6dso_slv0_config_t slv0_config;
  11469. int32_t ret;
  11470. +
  11471. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11472. - if (ret == 0) {
  11473. + if (ret == 0)
  11474. + {
  11475. slv0_add.slave0 = val->slv_add;
  11476. slv0_add.rw_0 = 1;
  11477. - ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)&slv0_add,
  11478. - 1);
  11479. + ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)&slv0_add, 1);
  11480. }
  11481. - if (ret == 0) {
  11482. + if (ret == 0)
  11483. + {
  11484. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
  11485. &(val->slv_subadd), 1);
  11486. }
  11487. - if (ret == 0) {
  11488. + if (ret == 0)
  11489. + {
  11490. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG,
  11491. (uint8_t *)&slv0_config, 1);
  11492. }
  11493. - if (ret == 0) {
  11494. + if (ret == 0)
  11495. + {
  11496. slv0_config.slave0_numop = val->slv_len;
  11497. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG,
  11498. (uint8_t *)&slv0_config, 1);
  11499. }
  11500. - if (ret == 0) {
  11501. + if (ret == 0)
  11502. + {
  11503. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11504. }
  11505. @@ -9157,6 +10162,7 @@ int32_t lsm6dso_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
  11506. * - uint8_t slv1_add; 8 bit i2c device address
  11507. * - uint8_t slv1_subadd; 8 bit register device address
  11508. * - uint8_t slv1_len; num of bit to read
  11509. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11510. *
  11511. */
  11512. int32_t lsm6dso_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
  11513. @@ -9165,32 +10171,37 @@ int32_t lsm6dso_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
  11514. lsm6dso_slv1_add_t slv1_add;
  11515. lsm6dso_slv1_config_t slv1_config;
  11516. int32_t ret;
  11517. +
  11518. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11519. - if (ret == 0) {
  11520. + if (ret == 0)
  11521. + {
  11522. slv1_add.slave1_add = val->slv_add;
  11523. slv1_add.r_1 = 1;
  11524. - ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_ADD, (uint8_t *)&slv1_add,
  11525. - 1);
  11526. + ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_ADD, (uint8_t *)&slv1_add, 1);
  11527. }
  11528. - if (ret == 0) {
  11529. + if (ret == 0)
  11530. + {
  11531. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_SUBADD,
  11532. &(val->slv_subadd), 1);
  11533. }
  11534. - if (ret == 0) {
  11535. + if (ret == 0)
  11536. + {
  11537. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG,
  11538. (uint8_t *)&slv1_config, 1);
  11539. }
  11540. - if (ret == 0) {
  11541. + if (ret == 0)
  11542. + {
  11543. slv1_config.slave1_numop = val->slv_len;
  11544. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG,
  11545. (uint8_t *)&slv1_config, 1);
  11546. }
  11547. - if (ret == 0) {
  11548. + if (ret == 0)
  11549. + {
  11550. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11551. }
  11552. @@ -9205,6 +10216,7 @@ int32_t lsm6dso_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
  11553. * - uint8_t slv2_add; 8 bit i2c device address
  11554. * - uint8_t slv2_subadd; 8 bit register device address
  11555. * - uint8_t slv2_len; num of bit to read
  11556. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11557. *
  11558. */
  11559. int32_t lsm6dso_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
  11560. @@ -9213,32 +10225,37 @@ int32_t lsm6dso_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
  11561. lsm6dso_slv2_add_t slv2_add;
  11562. lsm6dso_slv2_config_t slv2_config;
  11563. int32_t ret;
  11564. +
  11565. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11566. - if (ret == 0) {
  11567. + if (ret == 0)
  11568. + {
  11569. slv2_add.slave2_add = val->slv_add;
  11570. slv2_add.r_2 = 1;
  11571. - ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_ADD, (uint8_t *)&slv2_add,
  11572. - 1);
  11573. + ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_ADD, (uint8_t *)&slv2_add, 1);
  11574. }
  11575. - if (ret == 0) {
  11576. + if (ret == 0)
  11577. + {
  11578. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_SUBADD,
  11579. &(val->slv_subadd), 1);
  11580. }
  11581. - if (ret == 0) {
  11582. + if (ret == 0)
  11583. + {
  11584. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG,
  11585. (uint8_t *)&slv2_config, 1);
  11586. }
  11587. - if (ret == 0) {
  11588. + if (ret == 0)
  11589. + {
  11590. slv2_config.slave2_numop = val->slv_len;
  11591. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG,
  11592. (uint8_t *)&slv2_config, 1);
  11593. }
  11594. - if (ret == 0) {
  11595. + if (ret == 0)
  11596. + {
  11597. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11598. }
  11599. @@ -9253,6 +10270,7 @@ int32_t lsm6dso_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
  11600. * - uint8_t slv3_add; 8 bit i2c device address
  11601. * - uint8_t slv3_subadd; 8 bit register device address
  11602. * - uint8_t slv3_len; num of bit to read
  11603. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11604. *
  11605. */
  11606. int32_t lsm6dso_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
  11607. @@ -9261,32 +10279,37 @@ int32_t lsm6dso_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
  11608. lsm6dso_slv3_add_t slv3_add;
  11609. lsm6dso_slv3_config_t slv3_config;
  11610. int32_t ret;
  11611. +
  11612. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11613. - if (ret == 0) {
  11614. + if (ret == 0)
  11615. + {
  11616. slv3_add.slave3_add = val->slv_add;
  11617. slv3_add.r_3 = 1;
  11618. - ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_ADD, (uint8_t *)&slv3_add,
  11619. - 1);
  11620. + ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_ADD, (uint8_t *)&slv3_add, 1);
  11621. }
  11622. - if (ret == 0) {
  11623. + if (ret == 0)
  11624. + {
  11625. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_SUBADD,
  11626. &(val->slv_subadd), 1);
  11627. }
  11628. - if (ret == 0) {
  11629. + if (ret == 0)
  11630. + {
  11631. ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG,
  11632. (uint8_t *)&slv3_config, 1);
  11633. }
  11634. - if (ret == 0) {
  11635. + if (ret == 0)
  11636. + {
  11637. slv3_config.slave3_numop = val->slv_len;
  11638. ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG,
  11639. (uint8_t *)&slv3_config, 1);
  11640. }
  11641. - if (ret == 0) {
  11642. + if (ret == 0)
  11643. + {
  11644. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11645. }
  11646. @@ -9298,20 +10321,23 @@ int32_t lsm6dso_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
  11647. *
  11648. * @param ctx read / write interface definitions
  11649. * @param val union of registers from STATUS_MASTER to
  11650. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11651. *
  11652. */
  11653. int32_t lsm6dso_sh_status_get(stmdev_ctx_t *ctx,
  11654. lsm6dso_status_master_t *val)
  11655. {
  11656. int32_t ret;
  11657. +
  11658. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
  11659. - if (ret == 0) {
  11660. - ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER, (uint8_t *) val,
  11661. - 1);
  11662. + if (ret == 0)
  11663. + {
  11664. + ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER, (uint8_t *) val, 1);
  11665. }
  11666. - if (ret == 0) {
  11667. + if (ret == 0)
  11668. + {
  11669. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11670. }
  11671. @@ -9340,6 +10366,7 @@ int32_t lsm6dso_sh_status_get(stmdev_ctx_t *ctx,
  11672. * to ignore this interface.(ptr)
  11673. * @param val ID values read from the two interfaces. ID values
  11674. * will be the same.(ptr)
  11675. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11676. *
  11677. */
  11678. int32_t lsm6dso_id_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11679. @@ -9347,13 +10374,16 @@ int32_t lsm6dso_id_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11680. {
  11681. int32_t ret = 0;
  11682. - if (ctx != NULL) {
  11683. + if (ctx != NULL)
  11684. + {
  11685. ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I,
  11686. (uint8_t *) & (val->ui), 1);
  11687. }
  11688. - if (aux_ctx != NULL) {
  11689. - if (ret == 0) {
  11690. + if (aux_ctx != NULL)
  11691. + {
  11692. + if (ret == 0)
  11693. + {
  11694. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_WHO_AM_I,
  11695. (uint8_t *) & (val->aux), 1);
  11696. }
  11697. @@ -9370,6 +10400,7 @@ int32_t lsm6dso_id_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11698. * and application note for more information
  11699. * about differencies between boot and sw_reset
  11700. * procedure.
  11701. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11702. *
  11703. */
  11704. int32_t lsm6dso_init_set(stmdev_ctx_t *ctx, lsm6dso_init_t val)
  11705. @@ -9378,56 +10409,65 @@ int32_t lsm6dso_init_set(stmdev_ctx_t *ctx, lsm6dso_init_t val)
  11706. lsm6dso_emb_func_init_b_t emb_func_init_b;
  11707. lsm6dso_ctrl3_c_t ctrl3_c;
  11708. int32_t ret;
  11709. +
  11710. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  11711. - if (ret == 0) {
  11712. + if (ret == 0)
  11713. + {
  11714. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B,
  11715. (uint8_t *)&emb_func_init_b, 1);
  11716. }
  11717. - if (ret == 0) {
  11718. + if (ret == 0)
  11719. + {
  11720. emb_func_init_b.fifo_compr_init = (uint8_t)val
  11721. - & ( (uint8_t)LSM6DSO_FIFO_COMP >> 2 );
  11722. + & ((uint8_t)LSM6DSO_FIFO_COMP >> 2);
  11723. emb_func_init_b.fsm_init = (uint8_t)val
  11724. - & ( (uint8_t)LSM6DSO_FSM >> 3 );
  11725. + & ((uint8_t)LSM6DSO_FSM >> 3);
  11726. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B,
  11727. (uint8_t *)&emb_func_init_b, 1);
  11728. }
  11729. - if (ret == 0) {
  11730. + if (ret == 0)
  11731. + {
  11732. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_A,
  11733. (uint8_t *)&emb_func_init_a, 1);
  11734. }
  11735. - if (ret == 0) {
  11736. - emb_func_init_a.step_det_init = ( (uint8_t)val
  11737. - & (uint8_t)LSM6DSO_PEDO ) >> 5;
  11738. - emb_func_init_a.tilt_init = ( (uint8_t)val
  11739. - & (uint8_t)LSM6DSO_TILT ) >> 6;
  11740. - emb_func_init_a.sig_mot_init = ( (uint8_t)val
  11741. - & (uint8_t)LSM6DSO_SMOTION ) >> 7;
  11742. + if (ret == 0)
  11743. + {
  11744. + emb_func_init_a.step_det_init = ((uint8_t)val
  11745. + & (uint8_t)LSM6DSO_PEDO) >> 5;
  11746. + emb_func_init_a.tilt_init = ((uint8_t)val
  11747. + & (uint8_t)LSM6DSO_TILT) >> 6;
  11748. + emb_func_init_a.sig_mot_init = ((uint8_t)val
  11749. + & (uint8_t)LSM6DSO_SMOTION) >> 7;
  11750. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_A,
  11751. (uint8_t *)&emb_func_init_a, 1);
  11752. }
  11753. - if (ret == 0) {
  11754. + if (ret == 0)
  11755. + {
  11756. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  11757. }
  11758. - if (ret == 0) {
  11759. + if (ret == 0)
  11760. + {
  11761. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  11762. }
  11763. - if ( ( (val == LSM6DSO_BOOT) || (val == LSM6DSO_RESET) ) &&
  11764. - (ret == 0) ) {
  11765. + if (((val == LSM6DSO_BOOT) || (val == LSM6DSO_RESET)) &&
  11766. + (ret == 0))
  11767. + {
  11768. ctrl3_c.boot = (uint8_t)val & (uint8_t)LSM6DSO_BOOT;
  11769. - ctrl3_c.sw_reset = ( (uint8_t)val & (uint8_t)LSM6DSO_RESET) >> 1;
  11770. + ctrl3_c.sw_reset = ((uint8_t)val & (uint8_t)LSM6DSO_RESET) >> 1;
  11771. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  11772. }
  11773. - if ( ( val == LSM6DSO_DRV_RDY )
  11774. - && ( (ctrl3_c.bdu == PROPERTY_DISABLE)
  11775. - || (ctrl3_c.if_inc == PROPERTY_DISABLE) ) && (ret == 0) ) {
  11776. + if ((val == LSM6DSO_DRV_RDY)
  11777. + && ((ctrl3_c.bdu == PROPERTY_DISABLE)
  11778. + || (ctrl3_c.if_inc == PROPERTY_DISABLE)) && (ret == 0))
  11779. + {
  11780. ctrl3_c.bdu = PROPERTY_ENABLE;
  11781. ctrl3_c.if_inc = PROPERTY_ENABLE;
  11782. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  11783. @@ -9445,6 +10485,7 @@ int32_t lsm6dso_init_set(stmdev_ctx_t *ctx, lsm6dso_init_t val)
  11784. * to ignore this interface.(ptr)
  11785. * @param val configures the bus operating mode for both the
  11786. * main and the auxiliary interface.
  11787. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11788. *
  11789. */
  11790. int32_t lsm6dso_bus_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11791. @@ -9457,68 +10498,80 @@ int32_t lsm6dso_bus_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11792. lsm6dso_ctrl4_c_t ctrl4_c;
  11793. uint8_t bit_val;
  11794. int32_t ret;
  11795. +
  11796. ret = 0;
  11797. - if (aux_ctx != NULL) {
  11798. + if (aux_ctx != NULL)
  11799. + {
  11800. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
  11801. (uint8_t *)&ctrl1_ois, 1);
  11802. - bit_val = ( (uint8_t)val.aux_bus_md & 0x04U ) >> 2;
  11803. + bit_val = ((uint8_t)val.aux_bus_md & 0x04U) >> 2;
  11804. - if ( ( ret == 0 ) && ( ctrl1_ois.sim_ois != bit_val ) ) {
  11805. + if ((ret == 0) && (ctrl1_ois.sim_ois != bit_val))
  11806. + {
  11807. ctrl1_ois.sim_ois = bit_val;
  11808. ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
  11809. (uint8_t *)&ctrl1_ois, 1);
  11810. }
  11811. }
  11812. - if (ctx != NULL) {
  11813. - if (ret == 0) {
  11814. + if (ctx != NULL)
  11815. + {
  11816. + if (ret == 0)
  11817. + {
  11818. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL,
  11819. (uint8_t *)&ctrl9_xl, 1);
  11820. }
  11821. bit_val = ((uint8_t)val.ui_bus_md & 0x04U) >> 2;
  11822. - if ( ( ret == 0 ) && ( ctrl9_xl.i3c_disable != bit_val ) ) {
  11823. + if ((ret == 0) && (ctrl9_xl.i3c_disable != bit_val))
  11824. + {
  11825. ctrl9_xl.i3c_disable = bit_val;
  11826. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL,
  11827. (uint8_t *)&ctrl9_xl, 1);
  11828. }
  11829. - if (ret == 0) {
  11830. + if (ret == 0)
  11831. + {
  11832. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  11833. (uint8_t *)&i3c_bus_avb, 1);
  11834. }
  11835. bit_val = ((uint8_t)val.ui_bus_md & 0x30U) >> 4;
  11836. - if ( ( ret == 0 ) && ( i3c_bus_avb.i3c_bus_avb_sel != bit_val ) ) {
  11837. + if ((ret == 0) && (i3c_bus_avb.i3c_bus_avb_sel != bit_val))
  11838. + {
  11839. i3c_bus_avb.i3c_bus_avb_sel = bit_val;
  11840. ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  11841. (uint8_t *)&i3c_bus_avb, 1);
  11842. }
  11843. - if (ret == 0) {
  11844. + if (ret == 0)
  11845. + {
  11846. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C,
  11847. (uint8_t *)&ctrl4_c, 1);
  11848. }
  11849. - bit_val = ( (uint8_t)val.ui_bus_md & 0x02U ) >> 1;
  11850. + bit_val = ((uint8_t)val.ui_bus_md & 0x02U) >> 1;
  11851. - if ( ( ret == 0 ) && ( ctrl4_c.i2c_disable != bit_val ) ) {
  11852. + if ((ret == 0) && (ctrl4_c.i2c_disable != bit_val))
  11853. + {
  11854. ctrl4_c.i2c_disable = bit_val;
  11855. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C,
  11856. (uint8_t *)&ctrl4_c, 1);
  11857. }
  11858. - if (ret == 0) {
  11859. + if (ret == 0)
  11860. + {
  11861. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C,
  11862. (uint8_t *)&ctrl3_c, 1);
  11863. }
  11864. bit_val = (uint8_t)val.ui_bus_md & 0x01U;
  11865. - if ( ( ret == 0 ) && ( ctrl3_c.sim != bit_val ) ) {
  11866. + if ((ret == 0) && (ctrl3_c.sim != bit_val))
  11867. + {
  11868. ctrl3_c.sim = bit_val;
  11869. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C,
  11870. (uint8_t *)&ctrl3_c, 1);
  11871. @@ -9537,6 +10590,7 @@ int32_t lsm6dso_bus_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11872. * to ignore this interface.(ptr)
  11873. * @param val retrieves the bus operating mode for both the main
  11874. * and the auxiliary interface.(ptr)
  11875. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11876. *
  11877. */
  11878. int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11879. @@ -9549,11 +10603,13 @@ int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11880. lsm6dso_ctrl4_c_t ctrl4_c;
  11881. int32_t ret = 0;
  11882. - if (aux_ctx != NULL) {
  11883. + if (aux_ctx != NULL)
  11884. + {
  11885. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
  11886. (uint8_t *)&ctrl1_ois, 1);
  11887. - switch ( ctrl1_ois.sim_ois ) {
  11888. + switch (ctrl1_ois.sim_ois)
  11889. + {
  11890. case LSM6DSO_SPI_4W_AUX:
  11891. val->aux_bus_md = LSM6DSO_SPI_4W_AUX;
  11892. break;
  11893. @@ -9568,29 +10624,35 @@ int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11894. }
  11895. }
  11896. - if (ctx != NULL) {
  11897. - if (ret == 0) {
  11898. + if (ctx != NULL)
  11899. + {
  11900. + if (ret == 0)
  11901. + {
  11902. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL,
  11903. (uint8_t *)&ctrl9_xl, 1);
  11904. }
  11905. - if (ret == 0) {
  11906. + if (ret == 0)
  11907. + {
  11908. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  11909. (uint8_t *)&i3c_bus_avb, 1);
  11910. }
  11911. - if (ret == 0) {
  11912. + if (ret == 0)
  11913. + {
  11914. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C,
  11915. (uint8_t *)&ctrl4_c, 1);
  11916. }
  11917. - if (ret == 0) {
  11918. + if (ret == 0)
  11919. + {
  11920. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C,
  11921. (uint8_t *)&ctrl3_c, 1);
  11922. - switch ( ( i3c_bus_avb.i3c_bus_avb_sel << 4 ) &
  11923. - ( ctrl9_xl.i3c_disable << 2 ) &
  11924. - ( ctrl4_c.i2c_disable << 1) & ctrl3_c.sim ) {
  11925. + switch ((i3c_bus_avb.i3c_bus_avb_sel << 4) &
  11926. + (ctrl9_xl.i3c_disable << 2) &
  11927. + (ctrl4_c.i2c_disable << 1) & ctrl3_c.sim)
  11928. + {
  11929. case LSM6DSO_SEL_BY_HW:
  11930. val->ui_bus_md = LSM6DSO_SEL_BY_HW;
  11931. break;
  11932. @@ -9641,6 +10703,7 @@ int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11933. * @param aux_ctx auxiliary communication interface handler. Use NULL
  11934. * to ignore this interface.(ptr)
  11935. * @param val the status of the device.(ptr)
  11936. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11937. *
  11938. */
  11939. int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11940. @@ -9652,7 +10715,8 @@ int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11941. int32_t ret;
  11942. ret = 0;
  11943. - if (aux_ctx != NULL) {
  11944. + if (aux_ctx != NULL)
  11945. + {
  11946. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_STATUS_SPIAUX,
  11947. (uint8_t *)&status_spiaux, 1);
  11948. val->ois_drdy_xl = status_spiaux.xlda;
  11949. @@ -9660,13 +10724,15 @@ int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11950. val->ois_gyro_settling = status_spiaux.gyro_settling;
  11951. }
  11952. - if (ctx != NULL) {
  11953. + if (ctx != NULL)
  11954. + {
  11955. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  11956. val->sw_reset = ctrl3_c.sw_reset;
  11957. val->boot = ctrl3_c.boot;
  11958. - if ( (ret == 0) && ( ctrl3_c.sw_reset == PROPERTY_DISABLE ) &&
  11959. - ( ctrl3_c.boot == PROPERTY_DISABLE ) ) {
  11960. + if ((ret == 0) && (ctrl3_c.sw_reset == PROPERTY_DISABLE) &&
  11961. + (ctrl3_c.boot == PROPERTY_DISABLE))
  11962. + {
  11963. ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG,
  11964. (uint8_t *)&status_reg, 1);
  11965. val->drdy_xl = status_reg.xlda;
  11966. @@ -9684,6 +10750,7 @@ int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  11967. * @param ctx communication interface handler.(ptr)
  11968. * @param val the electrical settings for the configurable
  11969. * pins.
  11970. + * @retval interface status (MANDATORY: return 0 -> no Error)
  11971. *
  11972. */
  11973. int32_t lsm6dso_pin_conf_set(stmdev_ctx_t *ctx,
  11974. @@ -9693,31 +10760,35 @@ int32_t lsm6dso_pin_conf_set(stmdev_ctx_t *ctx,
  11975. lsm6dso_pin_ctrl_t pin_ctrl;
  11976. lsm6dso_ctrl3_c_t ctrl3_c;
  11977. int32_t ret;
  11978. - ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl,
  11979. - 1);
  11980. - if (ret == 0) {
  11981. + ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
  11982. +
  11983. + if (ret == 0)
  11984. + {
  11985. pin_ctrl.ois_pu_dis = ~val.aux_sdo_ocs_pull_up;
  11986. pin_ctrl.sdo_pu_en = val.sdo_sa0_pull_up;
  11987. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl,
  11988. - 1);
  11989. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
  11990. }
  11991. - if (ret == 0) {
  11992. + if (ret == 0)
  11993. + {
  11994. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  11995. }
  11996. - if (ret == 0) {
  11997. + if (ret == 0)
  11998. + {
  11999. ctrl3_c.pp_od = ~val.int1_int2_push_pull;
  12000. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  12001. }
  12002. - if (ret == 0) {
  12003. + if (ret == 0)
  12004. + {
  12005. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  12006. (uint8_t *)&i3c_bus_avb, 1);
  12007. }
  12008. - if (ret == 0) {
  12009. + if (ret == 0)
  12010. + {
  12011. i3c_bus_avb.pd_dis_int1 = ~val.int1_pull_down;
  12012. ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  12013. (uint8_t *)&i3c_bus_avb, 1);
  12014. @@ -9732,6 +10803,7 @@ int32_t lsm6dso_pin_conf_set(stmdev_ctx_t *ctx,
  12015. * @param ctx communication interface handler.(ptr)
  12016. * @param val the electrical settings for the configurable
  12017. * pins.(ptr)
  12018. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12019. *
  12020. */
  12021. int32_t lsm6dso_pin_conf_get(stmdev_ctx_t *ctx,
  12022. @@ -9741,22 +10813,25 @@ int32_t lsm6dso_pin_conf_get(stmdev_ctx_t *ctx,
  12023. lsm6dso_pin_ctrl_t pin_ctrl;
  12024. lsm6dso_ctrl3_c_t ctrl3_c;
  12025. int32_t ret;
  12026. - ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl,
  12027. - 1);
  12028. - if (ret == 0) {
  12029. + ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
  12030. +
  12031. + if (ret == 0)
  12032. + {
  12033. val->aux_sdo_ocs_pull_up = ~pin_ctrl.ois_pu_dis;
  12034. val->aux_sdo_ocs_pull_up = pin_ctrl.sdo_pu_en;
  12035. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  12036. }
  12037. - if (ret == 0) {
  12038. + if (ret == 0)
  12039. + {
  12040. val->int1_int2_push_pull = ~ctrl3_c.pp_od;
  12041. ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
  12042. (uint8_t *)&i3c_bus_avb, 1);
  12043. }
  12044. - if (ret == 0) {
  12045. + if (ret == 0)
  12046. + {
  12047. val->int1_pull_down = ~i3c_bus_avb.pd_dis_int1;
  12048. }
  12049. @@ -9768,6 +10843,7 @@ int32_t lsm6dso_pin_conf_get(stmdev_ctx_t *ctx,
  12050. *
  12051. * @param ctx communication interface handler.(ptr)
  12052. * @param val the pins hardware signal settings.
  12053. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12054. *
  12055. */
  12056. int32_t lsm6dso_interrupt_mode_set(stmdev_ctx_t *ctx,
  12057. @@ -9777,40 +10853,45 @@ int32_t lsm6dso_interrupt_mode_set(stmdev_ctx_t *ctx,
  12058. lsm6dso_page_rw_t page_rw;
  12059. lsm6dso_ctrl3_c_t ctrl3_c;
  12060. int32_t ret;
  12061. +
  12062. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  12063. - if (ret == 0) {
  12064. + if (ret == 0)
  12065. + {
  12066. ctrl3_c.h_lactive = val.active_low;
  12067. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  12068. }
  12069. - if (ret == 0) {
  12070. - ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0,
  12071. - 1);
  12072. + if (ret == 0)
  12073. + {
  12074. + ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
  12075. }
  12076. - if (ret == 0) {
  12077. + if (ret == 0)
  12078. + {
  12079. tap_cfg0.lir = val.base_latched;
  12080. tap_cfg0.int_clr_on_read = val.base_latched | val.emb_latched;
  12081. - ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0,
  12082. - 1);
  12083. + ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
  12084. }
  12085. - if (ret == 0) {
  12086. + if (ret == 0)
  12087. + {
  12088. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  12089. }
  12090. - if (ret == 0) {
  12091. + if (ret == 0)
  12092. + {
  12093. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  12094. }
  12095. - if (ret == 0) {
  12096. + if (ret == 0)
  12097. + {
  12098. page_rw.emb_func_lir = val.emb_latched;
  12099. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  12100. - 1);
  12101. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  12102. }
  12103. - if (ret == 0) {
  12104. + if (ret == 0)
  12105. + {
  12106. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  12107. }
  12108. @@ -9822,6 +10903,7 @@ int32_t lsm6dso_interrupt_mode_set(stmdev_ctx_t *ctx,
  12109. *
  12110. * @param ctx communication interface handler.(ptr)
  12111. * @param val the pins hardware signal settings.(ptr)
  12112. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12113. *
  12114. */
  12115. int32_t lsm6dso_interrupt_mode_get(stmdev_ctx_t *ctx,
  12116. @@ -9831,31 +10913,35 @@ int32_t lsm6dso_interrupt_mode_get(stmdev_ctx_t *ctx,
  12117. lsm6dso_page_rw_t page_rw;
  12118. lsm6dso_ctrl3_c_t ctrl3_c;
  12119. int32_t ret;
  12120. +
  12121. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
  12122. - if (ret == 0) {
  12123. + if (ret == 0)
  12124. + {
  12125. ctrl3_c.h_lactive = val->active_low;
  12126. - ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0,
  12127. - 1);
  12128. + ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
  12129. }
  12130. - if (ret == 0) {
  12131. + if (ret == 0)
  12132. + {
  12133. tap_cfg0.lir = val->base_latched;
  12134. tap_cfg0.int_clr_on_read = val->base_latched | val->emb_latched;
  12135. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  12136. }
  12137. - if (ret == 0) {
  12138. + if (ret == 0)
  12139. + {
  12140. ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  12141. }
  12142. - if (ret == 0) {
  12143. + if (ret == 0)
  12144. + {
  12145. page_rw.emb_func_lir = val->emb_latched;
  12146. - ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw,
  12147. - 1);
  12148. + ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
  12149. }
  12150. - if (ret == 0) {
  12151. + if (ret == 0)
  12152. + {
  12153. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  12154. }
  12155. @@ -9867,6 +10953,7 @@ int32_t lsm6dso_interrupt_mode_get(stmdev_ctx_t *ctx,
  12156. *
  12157. * @param ctx communication interface handler.(ptr)
  12158. * @param val the signals to route on int1 pin.
  12159. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12160. *
  12161. */
  12162. int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  12163. @@ -9898,9 +10985,11 @@ int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  12164. md1_cfg.int1_wu = val.wake_up;
  12165. md1_cfg.int1_single_tap = val.single_tap;
  12166. md1_cfg.int1_sleep_change = val.sleep_change;
  12167. + emb_func_int1.not_used_01 = 0;
  12168. emb_func_int1.int1_step_detector = val.step_detector;
  12169. emb_func_int1.int1_tilt = val.tilt;
  12170. emb_func_int1.int1_sig_mot = val.sig_mot;
  12171. + emb_func_int1.not_used_02 = 0;
  12172. emb_func_int1.int1_fsm_lc = val.fsm_lc;
  12173. fsm_int1_a.int1_fsm1 = val.fsm1;
  12174. fsm_int1_a.int1_fsm2 = val.fsm2;
  12175. @@ -9920,66 +11009,77 @@ int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  12176. fsm_int1_b.int1_fsm16 = val.fsm16;
  12177. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
  12178. - if (ret == 0) {
  12179. - if ( ( val.drdy_temp | val.timestamp ) != PROPERTY_DISABLE) {
  12180. + if (ret == 0)
  12181. + {
  12182. + if ((val.drdy_temp | val.timestamp) != PROPERTY_DISABLE)
  12183. + {
  12184. ctrl4_c.int2_on_int1 = PROPERTY_ENABLE;
  12185. }
  12186. - else {
  12187. + else
  12188. + {
  12189. ctrl4_c.int2_on_int1 = PROPERTY_DISABLE;
  12190. }
  12191. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
  12192. }
  12193. - if (ret == 0) {
  12194. + if (ret == 0)
  12195. + {
  12196. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  12197. }
  12198. - if (ret == 0) {
  12199. + if (ret == 0)
  12200. + {
  12201. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
  12202. (uint8_t *)&emb_func_int1, 1);
  12203. }
  12204. - if (ret == 0) {
  12205. + if (ret == 0)
  12206. + {
  12207. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_A,
  12208. (uint8_t *)&fsm_int1_a, 1);
  12209. }
  12210. - if (ret == 0) {
  12211. + if (ret == 0)
  12212. + {
  12213. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_B,
  12214. (uint8_t *)&fsm_int1_b, 1);
  12215. }
  12216. - if (ret == 0) {
  12217. + if (ret == 0)
  12218. + {
  12219. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  12220. }
  12221. - if (ret == 0) {
  12222. - if ( ( emb_func_int1.int1_fsm_lc
  12223. - | emb_func_int1.int1_sig_mot
  12224. - | emb_func_int1.int1_step_detector
  12225. - | emb_func_int1.int1_tilt
  12226. - | fsm_int1_a.int1_fsm1
  12227. - | fsm_int1_a.int1_fsm2
  12228. - | fsm_int1_a.int1_fsm3
  12229. - | fsm_int1_a.int1_fsm4
  12230. - | fsm_int1_a.int1_fsm5
  12231. - | fsm_int1_a.int1_fsm6
  12232. - | fsm_int1_a.int1_fsm7
  12233. - | fsm_int1_a.int1_fsm8
  12234. - | fsm_int1_b.int1_fsm9
  12235. - | fsm_int1_b.int1_fsm10
  12236. - | fsm_int1_b.int1_fsm11
  12237. - | fsm_int1_b.int1_fsm12
  12238. - | fsm_int1_b.int1_fsm13
  12239. - | fsm_int1_b.int1_fsm14
  12240. - | fsm_int1_b.int1_fsm15
  12241. - | fsm_int1_b.int1_fsm16) != PROPERTY_DISABLE) {
  12242. + if (ret == 0)
  12243. + {
  12244. + if ((emb_func_int1.int1_fsm_lc
  12245. + | emb_func_int1.int1_sig_mot
  12246. + | emb_func_int1.int1_step_detector
  12247. + | emb_func_int1.int1_tilt
  12248. + | fsm_int1_a.int1_fsm1
  12249. + | fsm_int1_a.int1_fsm2
  12250. + | fsm_int1_a.int1_fsm3
  12251. + | fsm_int1_a.int1_fsm4
  12252. + | fsm_int1_a.int1_fsm5
  12253. + | fsm_int1_a.int1_fsm6
  12254. + | fsm_int1_a.int1_fsm7
  12255. + | fsm_int1_a.int1_fsm8
  12256. + | fsm_int1_b.int1_fsm9
  12257. + | fsm_int1_b.int1_fsm10
  12258. + | fsm_int1_b.int1_fsm11
  12259. + | fsm_int1_b.int1_fsm12
  12260. + | fsm_int1_b.int1_fsm13
  12261. + | fsm_int1_b.int1_fsm14
  12262. + | fsm_int1_b.int1_fsm15
  12263. + | fsm_int1_b.int1_fsm16) != PROPERTY_DISABLE)
  12264. + {
  12265. md1_cfg.int1_emb_func = PROPERTY_ENABLE;
  12266. }
  12267. - else {
  12268. + else
  12269. + {
  12270. md1_cfg.int1_emb_func = PROPERTY_DISABLE;
  12271. }
  12272. @@ -9987,77 +11087,83 @@ int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  12273. (uint8_t *)&int1_ctrl, 1);
  12274. }
  12275. - if (ret == 0) {
  12276. + if (ret == 0)
  12277. + {
  12278. ret = lsm6dso_write_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t *)&md1_cfg, 1);
  12279. }
  12280. - if (ret == 0) {
  12281. - ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl,
  12282. - 1);
  12283. + if (ret == 0)
  12284. + {
  12285. + ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
  12286. }
  12287. - if (ret == 0) {
  12288. + if (ret == 0)
  12289. + {
  12290. int2_ctrl.int2_drdy_temp = val.drdy_temp;
  12291. - ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl,
  12292. - 1);
  12293. + ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
  12294. }
  12295. - if (ret == 0) {
  12296. + if (ret == 0)
  12297. + {
  12298. ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
  12299. }
  12300. - if (ret == 0) {
  12301. + if (ret == 0)
  12302. + {
  12303. md2_cfg.int2_timestamp = val.timestamp;
  12304. ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
  12305. }
  12306. - if (ret == 0) {
  12307. - ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2,
  12308. - 1);
  12309. + if (ret == 0)
  12310. + {
  12311. + ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
  12312. }
  12313. - if (ret == 0) {
  12314. + if (ret == 0)
  12315. + {
  12316. ret = lsm6dso_pin_int2_route_get(ctx, NULL, &pin_int2_route);
  12317. }
  12318. - if (ret == 0) {
  12319. - if ( ( pin_int2_route.fifo_bdr
  12320. - | pin_int2_route.drdy_g
  12321. - | pin_int2_route.drdy_temp
  12322. - | pin_int2_route.drdy_xl
  12323. - | pin_int2_route.fifo_full
  12324. - | pin_int2_route.fifo_ovr
  12325. - | pin_int2_route.fifo_th
  12326. - | pin_int2_route.six_d
  12327. - | pin_int2_route.double_tap
  12328. - | pin_int2_route.free_fall
  12329. - | pin_int2_route.wake_up
  12330. - | pin_int2_route.single_tap
  12331. - | pin_int2_route.sleep_change
  12332. - | int1_ctrl.den_drdy_flag
  12333. - | int1_ctrl.int1_boot
  12334. - | int1_ctrl.int1_cnt_bdr
  12335. - | int1_ctrl.int1_drdy_g
  12336. - | int1_ctrl.int1_drdy_xl
  12337. - | int1_ctrl.int1_fifo_full
  12338. - | int1_ctrl.int1_fifo_ovr
  12339. - | int1_ctrl.int1_fifo_th
  12340. - | md1_cfg.int1_shub
  12341. - | md1_cfg.int1_6d
  12342. - | md1_cfg.int1_double_tap
  12343. - | md1_cfg.int1_ff
  12344. - | md1_cfg.int1_wu
  12345. - | md1_cfg.int1_single_tap
  12346. - | md1_cfg.int1_sleep_change) != PROPERTY_DISABLE) {
  12347. + if (ret == 0)
  12348. + {
  12349. + if ((pin_int2_route.fifo_bdr
  12350. + | pin_int2_route.drdy_g
  12351. + | pin_int2_route.drdy_temp
  12352. + | pin_int2_route.drdy_xl
  12353. + | pin_int2_route.fifo_full
  12354. + | pin_int2_route.fifo_ovr
  12355. + | pin_int2_route.fifo_th
  12356. + | pin_int2_route.six_d
  12357. + | pin_int2_route.double_tap
  12358. + | pin_int2_route.free_fall
  12359. + | pin_int2_route.wake_up
  12360. + | pin_int2_route.single_tap
  12361. + | pin_int2_route.sleep_change
  12362. + | int1_ctrl.den_drdy_flag
  12363. + | int1_ctrl.int1_boot
  12364. + | int1_ctrl.int1_cnt_bdr
  12365. + | int1_ctrl.int1_drdy_g
  12366. + | int1_ctrl.int1_drdy_xl
  12367. + | int1_ctrl.int1_fifo_full
  12368. + | int1_ctrl.int1_fifo_ovr
  12369. + | int1_ctrl.int1_fifo_th
  12370. + | md1_cfg.int1_shub
  12371. + | md1_cfg.int1_6d
  12372. + | md1_cfg.int1_double_tap
  12373. + | md1_cfg.int1_ff
  12374. + | md1_cfg.int1_wu
  12375. + | md1_cfg.int1_single_tap
  12376. + | md1_cfg.int1_sleep_change) != PROPERTY_DISABLE)
  12377. + {
  12378. tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
  12379. }
  12380. - else {
  12381. + else
  12382. + {
  12383. tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
  12384. }
  12385. - ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2,
  12386. - 1);
  12387. + ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
  12388. }
  12389. return ret;
  12390. @@ -10068,6 +11174,7 @@ int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  12391. *
  12392. * @param ctx communication interface handler.(ptr)
  12393. * @param val the signals that are routed on int1 pin.(ptr)
  12394. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12395. *
  12396. */
  12397. int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
  12398. @@ -10084,52 +11191,62 @@ int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
  12399. int32_t ret;
  12400. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  12401. - if (ret == 0) {
  12402. + if (ret == 0)
  12403. + {
  12404. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
  12405. (uint8_t *)&emb_func_int1, 1);
  12406. }
  12407. - if (ret == 0) {
  12408. + if (ret == 0)
  12409. + {
  12410. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_A,
  12411. (uint8_t *)&fsm_int1_a, 1);
  12412. }
  12413. - if (ret == 0) {
  12414. + if (ret == 0)
  12415. + {
  12416. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_B,
  12417. (uint8_t *)&fsm_int1_b, 1);
  12418. }
  12419. - if (ret == 0) {
  12420. + if (ret == 0)
  12421. + {
  12422. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  12423. }
  12424. - if (ret == 0) {
  12425. + if (ret == 0)
  12426. + {
  12427. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT1_CTRL,
  12428. (uint8_t *)&int1_ctrl, 1);
  12429. }
  12430. - if (ret == 0) {
  12431. + if (ret == 0)
  12432. + {
  12433. ret = lsm6dso_read_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t *)&md1_cfg, 1);
  12434. }
  12435. - if (ret == 0) {
  12436. + if (ret == 0)
  12437. + {
  12438. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
  12439. }
  12440. - if (ctrl4_c.int2_on_int1 == PROPERTY_ENABLE) {
  12441. - if (ret == 0) {
  12442. - ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl,
  12443. - 1);
  12444. + if (ctrl4_c.int2_on_int1 == PROPERTY_ENABLE)
  12445. + {
  12446. + if (ret == 0)
  12447. + {
  12448. + ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
  12449. val->drdy_temp = int2_ctrl.int2_drdy_temp;
  12450. }
  12451. - if (ret == 0) {
  12452. + if (ret == 0)
  12453. + {
  12454. ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
  12455. val->timestamp = md2_cfg.int2_timestamp;
  12456. }
  12457. }
  12458. - else {
  12459. + else
  12460. + {
  12461. val->drdy_temp = PROPERTY_DISABLE;
  12462. val->timestamp = PROPERTY_DISABLE;
  12463. }
  12464. @@ -10169,6 +11286,7 @@ int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
  12465. val->fsm14 = fsm_int1_b.int1_fsm14;
  12466. val->fsm15 = fsm_int1_b.int1_fsm15;
  12467. val->fsm16 = fsm_int1_b.int1_fsm16;
  12468. +
  12469. return ret;
  12470. }
  12471. @@ -10180,6 +11298,7 @@ int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
  12472. * @param aux_ctx auxiliary communication interface handler. Use NULL
  12473. * to ignore this interface.(ptr)
  12474. * @param val the signals to route on int2 pin.
  12475. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12476. *
  12477. */
  12478. int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12479. @@ -10198,18 +11317,21 @@ int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12480. int32_t ret;
  12481. ret = 0;
  12482. - if ( aux_ctx != NULL ) {
  12483. + if (aux_ctx != NULL)
  12484. + {
  12485. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_INT_OIS,
  12486. (uint8_t *)&int_ois, 1);
  12487. - if (ret == 0) {
  12488. + if (ret == 0)
  12489. + {
  12490. int_ois.int2_drdy_ois = val.drdy_ois;
  12491. ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_INT_OIS,
  12492. (uint8_t *)&int_ois, 1);
  12493. }
  12494. }
  12495. - if ( ctx != NULL ) {
  12496. + if (ctx != NULL)
  12497. + {
  12498. int2_ctrl.int2_drdy_xl = val.drdy_xl;
  12499. int2_ctrl.int2_drdy_g = val.drdy_g;
  12500. int2_ctrl.int2_drdy_temp = val.drdy_temp;
  12501. @@ -10217,6 +11339,7 @@ int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12502. int2_ctrl.int2_fifo_ovr = val.fifo_ovr;
  12503. int2_ctrl.int2_fifo_full = val.fifo_full;
  12504. int2_ctrl.int2_cnt_bdr = val.fifo_bdr;
  12505. + int2_ctrl.not_used_01 = 0;
  12506. md2_cfg.int2_timestamp = val.timestamp;
  12507. md2_cfg.int2_6d = val.six_d;
  12508. md2_cfg.int2_double_tap = val.double_tap;
  12509. @@ -10224,8 +11347,11 @@ int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12510. md2_cfg.int2_wu = val.wake_up;
  12511. md2_cfg.int2_single_tap = val.single_tap;
  12512. md2_cfg.int2_sleep_change = val.sleep_change;
  12513. + emb_func_int2.not_used_01 = 0;
  12514. emb_func_int2. int2_step_detector = val.step_detector;
  12515. emb_func_int2.int2_tilt = val.tilt;
  12516. + emb_func_int2.int2_sig_mot = val.sig_mot;
  12517. + emb_func_int2.not_used_02 = 0;
  12518. emb_func_int2.int2_fsm_lc = val.fsm_lc;
  12519. fsm_int2_a.int2_fsm1 = val.fsm1;
  12520. fsm_int2_a.int2_fsm2 = val.fsm2;
  12521. @@ -10244,70 +11370,77 @@ int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12522. fsm_int2_b.int2_fsm15 = val.fsm15;
  12523. fsm_int2_b.int2_fsm16 = val.fsm16;
  12524. - if (ret == 0) {
  12525. + if (ret == 0)
  12526. + {
  12527. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
  12528. - if (ret == 0) {
  12529. - if ( ( val.drdy_temp | val.timestamp ) != PROPERTY_DISABLE ) {
  12530. + if (ret == 0)
  12531. + {
  12532. + if ((val.drdy_temp | val.timestamp) != PROPERTY_DISABLE)
  12533. + {
  12534. ctrl4_c.int2_on_int1 = PROPERTY_DISABLE;
  12535. }
  12536. - else {
  12537. - ctrl4_c.int2_on_int1 = PROPERTY_ENABLE;
  12538. - }
  12539. -
  12540. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
  12541. }
  12542. }
  12543. - if (ret == 0) {
  12544. + if (ret == 0)
  12545. + {
  12546. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  12547. }
  12548. - if (ret == 0) {
  12549. + if (ret == 0)
  12550. + {
  12551. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
  12552. (uint8_t *)&emb_func_int2, 1);
  12553. }
  12554. - if (ret == 0) {
  12555. + if (ret == 0)
  12556. + {
  12557. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_A,
  12558. (uint8_t *)&fsm_int2_a, 1);
  12559. }
  12560. - if (ret == 0) {
  12561. + if (ret == 0)
  12562. + {
  12563. ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_B,
  12564. (uint8_t *)&fsm_int2_b, 1);
  12565. }
  12566. - if (ret == 0) {
  12567. + if (ret == 0)
  12568. + {
  12569. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  12570. }
  12571. - if (ret == 0) {
  12572. - if (( emb_func_int2.int2_fsm_lc
  12573. - | emb_func_int2.int2_sig_mot
  12574. - | emb_func_int2.int2_step_detector
  12575. - | emb_func_int2.int2_tilt
  12576. - | fsm_int2_a.int2_fsm1
  12577. - | fsm_int2_a.int2_fsm2
  12578. - | fsm_int2_a.int2_fsm3
  12579. - | fsm_int2_a.int2_fsm4
  12580. - | fsm_int2_a.int2_fsm5
  12581. - | fsm_int2_a.int2_fsm6
  12582. - | fsm_int2_a.int2_fsm7
  12583. - | fsm_int2_a.int2_fsm8
  12584. - | fsm_int2_b.int2_fsm9
  12585. - | fsm_int2_b.int2_fsm10
  12586. - | fsm_int2_b.int2_fsm11
  12587. - | fsm_int2_b.int2_fsm12
  12588. - | fsm_int2_b.int2_fsm13
  12589. - | fsm_int2_b.int2_fsm14
  12590. - | fsm_int2_b.int2_fsm15
  12591. - | fsm_int2_b.int2_fsm16) != PROPERTY_DISABLE ) {
  12592. + if (ret == 0)
  12593. + {
  12594. + if ((emb_func_int2.int2_fsm_lc
  12595. + | emb_func_int2.int2_sig_mot
  12596. + | emb_func_int2.int2_step_detector
  12597. + | emb_func_int2.int2_tilt
  12598. + | fsm_int2_a.int2_fsm1
  12599. + | fsm_int2_a.int2_fsm2
  12600. + | fsm_int2_a.int2_fsm3
  12601. + | fsm_int2_a.int2_fsm4
  12602. + | fsm_int2_a.int2_fsm5
  12603. + | fsm_int2_a.int2_fsm6
  12604. + | fsm_int2_a.int2_fsm7
  12605. + | fsm_int2_a.int2_fsm8
  12606. + | fsm_int2_b.int2_fsm9
  12607. + | fsm_int2_b.int2_fsm10
  12608. + | fsm_int2_b.int2_fsm11
  12609. + | fsm_int2_b.int2_fsm12
  12610. + | fsm_int2_b.int2_fsm13
  12611. + | fsm_int2_b.int2_fsm14
  12612. + | fsm_int2_b.int2_fsm15
  12613. + | fsm_int2_b.int2_fsm16) != PROPERTY_DISABLE)
  12614. + {
  12615. md2_cfg.int2_emb_func = PROPERTY_ENABLE;
  12616. }
  12617. - else {
  12618. + else
  12619. + {
  12620. md2_cfg.int2_emb_func = PROPERTY_DISABLE;
  12621. }
  12622. @@ -10315,56 +11448,60 @@ int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12623. (uint8_t *)&int2_ctrl, 1);
  12624. }
  12625. - if (ret == 0) {
  12626. + if (ret == 0)
  12627. + {
  12628. ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
  12629. }
  12630. - if (ret == 0) {
  12631. - ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2,
  12632. - 1);
  12633. + if (ret == 0)
  12634. + {
  12635. + ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
  12636. }
  12637. - if (ret == 0) {
  12638. + if (ret == 0)
  12639. + {
  12640. ret = lsm6dso_pin_int1_route_get(ctx, &pin_int1_route);
  12641. }
  12642. - if (ret == 0) {
  12643. - if ( ( val.fifo_bdr
  12644. - | val.drdy_g
  12645. - | val.drdy_temp
  12646. - | val.drdy_xl
  12647. - | val.fifo_full
  12648. - | val.fifo_ovr
  12649. - | val.fifo_th
  12650. - | val.six_d
  12651. - | val.double_tap
  12652. - | val.free_fall
  12653. - | val.wake_up
  12654. - | val.single_tap
  12655. - | val.sleep_change
  12656. - | pin_int1_route.den_flag
  12657. - | pin_int1_route.boot
  12658. - | pin_int1_route.fifo_bdr
  12659. - | pin_int1_route.drdy_g
  12660. - | pin_int1_route.drdy_xl
  12661. - | pin_int1_route.fifo_full
  12662. - | pin_int1_route.fifo_ovr
  12663. - | pin_int1_route.fifo_th
  12664. - | pin_int1_route.six_d
  12665. - | pin_int1_route.double_tap
  12666. - | pin_int1_route.free_fall
  12667. - | pin_int1_route.wake_up
  12668. - | pin_int1_route.single_tap
  12669. - | pin_int1_route.sleep_change ) != PROPERTY_DISABLE) {
  12670. + if (ret == 0)
  12671. + {
  12672. + if ((val.fifo_bdr
  12673. + | val.drdy_g
  12674. + | val.drdy_temp
  12675. + | val.drdy_xl
  12676. + | val.fifo_full
  12677. + | val.fifo_ovr
  12678. + | val.fifo_th
  12679. + | val.six_d
  12680. + | val.double_tap
  12681. + | val.free_fall
  12682. + | val.wake_up
  12683. + | val.single_tap
  12684. + | val.sleep_change
  12685. + | pin_int1_route.den_flag
  12686. + | pin_int1_route.boot
  12687. + | pin_int1_route.fifo_bdr
  12688. + | pin_int1_route.drdy_g
  12689. + | pin_int1_route.drdy_xl
  12690. + | pin_int1_route.fifo_full
  12691. + | pin_int1_route.fifo_ovr
  12692. + | pin_int1_route.fifo_th
  12693. + | pin_int1_route.six_d
  12694. + | pin_int1_route.double_tap
  12695. + | pin_int1_route.free_fall
  12696. + | pin_int1_route.wake_up
  12697. + | pin_int1_route.single_tap
  12698. + | pin_int1_route.sleep_change) != PROPERTY_DISABLE)
  12699. + {
  12700. tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
  12701. }
  12702. - else {
  12703. + else
  12704. + {
  12705. tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
  12706. }
  12707. - ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2,
  12708. - 1);
  12709. + ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
  12710. }
  12711. }
  12712. @@ -10379,6 +11516,7 @@ int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  12713. * @param aux_ctx auxiliary communication interface handler. Use NULL
  12714. * to ignore this interface.(ptr)
  12715. * @param val the signals that are routed on int2 pin.(ptr)
  12716. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12717. *
  12718. */
  12719. int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
  12720. @@ -10395,64 +11533,78 @@ int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
  12721. int32_t ret;
  12722. ret = 0;
  12723. - if ( aux_ctx != NULL ) {
  12724. + if (aux_ctx != NULL)
  12725. + {
  12726. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_INT_OIS,
  12727. (uint8_t *)&int_ois, 1);
  12728. val->drdy_ois = int_ois.int2_drdy_ois;
  12729. }
  12730. - if ( ctx != NULL ) {
  12731. - if (ret == 0) {
  12732. + if (ctx != NULL)
  12733. + {
  12734. + if (ret == 0)
  12735. + {
  12736. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  12737. }
  12738. - if (ret == 0) {
  12739. + if (ret == 0)
  12740. + {
  12741. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
  12742. (uint8_t *)&emb_func_int2, 1);
  12743. }
  12744. - if (ret == 0) {
  12745. + if (ret == 0)
  12746. + {
  12747. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_A,
  12748. (uint8_t *)&fsm_int2_a, 1);
  12749. }
  12750. - if (ret == 0) {
  12751. + if (ret == 0)
  12752. + {
  12753. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_B,
  12754. (uint8_t *)&fsm_int2_b, 1);
  12755. }
  12756. - if (ret == 0) {
  12757. + if (ret == 0)
  12758. + {
  12759. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  12760. }
  12761. - if (ret == 0) {
  12762. + if (ret == 0)
  12763. + {
  12764. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
  12765. (uint8_t *)&int2_ctrl, 1);
  12766. }
  12767. - if (ret == 0) {
  12768. + if (ret == 0)
  12769. + {
  12770. ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG,
  12771. (uint8_t *)&md2_cfg, 1);
  12772. }
  12773. - if (ret == 0) {
  12774. + if (ret == 0)
  12775. + {
  12776. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
  12777. }
  12778. - if (ctrl4_c.int2_on_int1 == PROPERTY_DISABLE) {
  12779. - if (ret == 0) {
  12780. + if (ctrl4_c.int2_on_int1 == PROPERTY_DISABLE)
  12781. + {
  12782. + if (ret == 0)
  12783. + {
  12784. ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
  12785. (uint8_t *)&int2_ctrl, 1);
  12786. val->drdy_temp = int2_ctrl.int2_drdy_temp;
  12787. }
  12788. - if (ret == 0) {
  12789. + if (ret == 0)
  12790. + {
  12791. ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
  12792. val->timestamp = md2_cfg.int2_timestamp;
  12793. }
  12794. }
  12795. - else {
  12796. + else
  12797. + {
  12798. val->drdy_temp = PROPERTY_DISABLE;
  12799. val->timestamp = PROPERTY_DISABLE;
  12800. }
  12801. @@ -10500,6 +11652,7 @@ int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
  12802. *
  12803. * @param ctx communication interface handler.(ptr)
  12804. * @param val the status of all the interrupt sources.(ptr)
  12805. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12806. *
  12807. */
  12808. int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  12809. @@ -10520,7 +11673,8 @@ int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  12810. int32_t ret;
  12811. ret = lsm6dso_read_reg(ctx, LSM6DSO_ALL_INT_SRC, reg, 5);
  12812. - if (ret == 0) {
  12813. + if (ret == 0)
  12814. + {
  12815. bytecpy((uint8_t *)&all_int_src, &reg[0]);
  12816. bytecpy((uint8_t *)&wake_up_src, &reg[1]);
  12817. bytecpy((uint8_t *)&tap_src, &reg[2]);
  12818. @@ -10553,11 +11707,13 @@ int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  12819. val->drdy_temp = status_reg.tda;
  12820. }
  12821. - if (ret == 0) {
  12822. + if (ret == 0)
  12823. + {
  12824. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS_MAINPAGE, reg, 3);
  12825. }
  12826. - if (ret == 0) {
  12827. + if (ret == 0)
  12828. + {
  12829. bytecpy((uint8_t *)&emb_func_status_mainpage, &reg[0]);
  12830. bytecpy((uint8_t *)&fsm_status_a_mainpage, &reg[1]);
  12831. bytecpy((uint8_t *)&fsm_status_b_mainpage, &reg[2]);
  12832. @@ -10583,11 +11739,13 @@ int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  12833. val->fsm16 = fsm_status_b_mainpage.is_fsm16;
  12834. }
  12835. - if (ret == 0) {
  12836. + if (ret == 0)
  12837. + {
  12838. ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER_MAINPAGE, reg, 3);
  12839. }
  12840. - if (ret == 0) {
  12841. + if (ret == 0)
  12842. + {
  12843. bytecpy((uint8_t *)&status_master_mainpage, &reg[0]);
  12844. bytecpy((uint8_t *)&fifo_status1, &reg[1]);
  12845. bytecpy((uint8_t *)&fifo_status2, &reg[2]);
  12846. @@ -10618,6 +11776,7 @@ int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  12847. * to ignore this interface.(ptr)
  12848. * @param val set the sensor conversion parameters by checking
  12849. * the constraints of the device.(ptr)
  12850. + * @retval interface status (MANDATORY: return 0 -> no Error)
  12851. *
  12852. */
  12853. int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  12854. @@ -10642,49 +11801,56 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  12855. uint8_t odr_xl;
  12856. uint8_t reg[8];
  12857. int32_t ret;
  12858. +
  12859. ret = 0;
  12860. /* FIXME: Remove warnings with STM32CubeIDE */
  12861. ctrl3_c.not_used_01 = 0;
  12862. ctrl4_c.not_used_01 = 0;
  12863. + ctrl5_c.xl_ulp_en = 0;
  12864. /* reading input configuration */
  12865. - xl_hm_mode = ( (uint8_t)val->ui.xl.odr & 0x10U ) >> 4;
  12866. - xl_ulp_en = ( (uint8_t)val->ui.xl.odr & 0x20U ) >> 5;
  12867. + xl_hm_mode = ((uint8_t)val->ui.xl.odr & 0x10U) >> 4;
  12868. + xl_ulp_en = ((uint8_t)val->ui.xl.odr & 0x20U) >> 5;
  12869. odr_xl = (uint8_t)val->ui.xl.odr & 0x0FU;
  12870. /* if enable xl ultra low power mode disable gy and OIS chain */
  12871. - if (xl_ulp_en == PROPERTY_ENABLE) {
  12872. + if (xl_ulp_en == PROPERTY_ENABLE)
  12873. + {
  12874. val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
  12875. val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
  12876. val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
  12877. }
  12878. /* if OIS xl is enabled also gyro OIS is enabled */
  12879. - if (val->ois.xl.odr == LSM6DSO_XL_OIS_6667Hz_HP) {
  12880. + if (val->ois.xl.odr == LSM6DSO_XL_OIS_6667Hz_HP)
  12881. + {
  12882. val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
  12883. }
  12884. - g_hm_mode = ( (uint8_t)val->ui.gy.odr & 0x10U ) >> 4;
  12885. + g_hm_mode = ((uint8_t)val->ui.gy.odr & 0x10U) >> 4;
  12886. odr_gy = (uint8_t)val->ui.gy.odr & 0x0FU;
  12887. /* reading registers to be configured */
  12888. - if ( ctx != NULL ) {
  12889. + if (ctx != NULL)
  12890. + {
  12891. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, reg, 8);
  12892. - bytecpy(( uint8_t *)&ctrl1_xl, &reg[0]);
  12893. - bytecpy(( uint8_t *)&ctrl2_g, &reg[1]);
  12894. - bytecpy(( uint8_t *)&ctrl3_c, &reg[2]);
  12895. - bytecpy(( uint8_t *)&ctrl4_c, &reg[3]);
  12896. - bytecpy(( uint8_t *)&ctrl5_c, &reg[4]);
  12897. - bytecpy(( uint8_t *)&ctrl6_c, &reg[5]);
  12898. - bytecpy(( uint8_t *)&ctrl7_g, &reg[6]);
  12899. - bytecpy(( uint8_t *)&ctrl8_xl, &reg[7]);
  12900. -
  12901. - if ( ret == 0 ) {
  12902. + bytecpy((uint8_t *)&ctrl1_xl, &reg[0]);
  12903. + bytecpy((uint8_t *)&ctrl2_g, &reg[1]);
  12904. + bytecpy((uint8_t *)&ctrl3_c, &reg[2]);
  12905. + bytecpy((uint8_t *)&ctrl4_c, &reg[3]);
  12906. + bytecpy((uint8_t *)&ctrl5_c, &reg[4]);
  12907. + bytecpy((uint8_t *)&ctrl6_c, &reg[5]);
  12908. + bytecpy((uint8_t *)&ctrl7_g, &reg[6]);
  12909. + bytecpy((uint8_t *)&ctrl8_xl, &reg[7]);
  12910. +
  12911. + if (ret == 0)
  12912. + {
  12913. ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
  12914. (uint8_t *)&func_cfg_access, 1);
  12915. }
  12916. /* if toggle xl ultra low power mode, turn off xl before reconfigure */
  12917. - if (ctrl5_c.xl_ulp_en != xl_ulp_en) {
  12918. + if (ctrl5_c.xl_ulp_en != xl_ulp_en)
  12919. + {
  12920. ctrl1_xl.odr_xl = (uint8_t) 0x00U;
  12921. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL,
  12922. (uint8_t *)&ctrl1_xl, 1);
  12923. @@ -10692,37 +11858,46 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  12924. }
  12925. /* reading OIS registers to be configured */
  12926. - if ( aux_ctx != NULL ) {
  12927. - if (ret == 0) {
  12928. + if (aux_ctx != NULL)
  12929. + {
  12930. + if (ret == 0)
  12931. + {
  12932. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
  12933. }
  12934. - bytecpy(( uint8_t *)&ctrl1_ois, &reg[0]);
  12935. - bytecpy(( uint8_t *)&ctrl2_ois, &reg[1]);
  12936. - bytecpy(( uint8_t *)&ctrl3_ois, &reg[2]);
  12937. + bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
  12938. + bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
  12939. + bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
  12940. }
  12941. - else {
  12942. - if ( ctx != NULL ) {
  12943. - if (ret == 0) {
  12944. + else
  12945. + {
  12946. + if (ctx != NULL)
  12947. + {
  12948. + if (ret == 0)
  12949. + {
  12950. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, reg, 3);
  12951. }
  12952. - bytecpy(( uint8_t *)&ctrl1_ois, &reg[0]);
  12953. - bytecpy(( uint8_t *)&ctrl2_ois, &reg[1]);
  12954. - bytecpy(( uint8_t *)&ctrl3_ois, &reg[2]);
  12955. + bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
  12956. + bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
  12957. + bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
  12958. }
  12959. }
  12960. /* Check the Finite State Machine data rate constraints */
  12961. - if (val->fsm.sens != LSM6DSO_FSM_DISABLE) {
  12962. - switch (val->fsm.odr) {
  12963. + if (val->fsm.sens != LSM6DSO_FSM_DISABLE)
  12964. + {
  12965. + switch (val->fsm.odr)
  12966. + {
  12967. case LSM6DSO_FSM_12Hz5:
  12968. - if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl == 0x00U) ) {
  12969. + if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl == 0x00U))
  12970. + {
  12971. odr_xl = 0x01U;
  12972. }
  12973. - if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy == 0x00U) ) {
  12974. + if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy == 0x00U))
  12975. + {
  12976. xl_ulp_en = PROPERTY_DISABLE;
  12977. odr_gy = 0x01U;
  12978. }
  12979. @@ -10730,11 +11905,13 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  12980. break;
  12981. case LSM6DSO_FSM_26Hz:
  12982. - if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x02U) ) {
  12983. + if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x02U))
  12984. + {
  12985. odr_xl = 0x02U;
  12986. }
  12987. - if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x02U) ) {
  12988. + if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x02U))
  12989. + {
  12990. xl_ulp_en = PROPERTY_DISABLE;
  12991. odr_gy = 0x02U;
  12992. }
  12993. @@ -10742,11 +11919,13 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  12994. break;
  12995. case LSM6DSO_FSM_52Hz:
  12996. - if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x03U) ) {
  12997. + if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x03U))
  12998. + {
  12999. odr_xl = 0x03U;
  13000. }
  13001. - if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x03U) ) {
  13002. + if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x03U))
  13003. + {
  13004. xl_ulp_en = PROPERTY_DISABLE;
  13005. odr_gy = 0x03U;
  13006. }
  13007. @@ -10754,11 +11933,13 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13008. break;
  13009. case LSM6DSO_FSM_104Hz:
  13010. - if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x04U) ) {
  13011. + if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x04U))
  13012. + {
  13013. odr_xl = 0x04U;
  13014. }
  13015. - if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x04U) ) {
  13016. + if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x04U))
  13017. + {
  13018. xl_ulp_en = PROPERTY_DISABLE;
  13019. odr_gy = 0x04U;
  13020. }
  13021. @@ -10773,8 +11954,9 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13022. }
  13023. /* Updating the accelerometer data rate configuration */
  13024. - switch ( ( ctrl5_c.xl_ulp_en << 5 ) | ( ctrl6_c.xl_hm_mode << 4 ) |
  13025. - ctrl1_xl.odr_xl ) {
  13026. + switch ((ctrl5_c.xl_ulp_en << 5) | (ctrl6_c.xl_hm_mode << 4) |
  13027. + ctrl1_xl.odr_xl)
  13028. + {
  13029. case LSM6DSO_XL_UI_OFF:
  13030. val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
  13031. break;
  13032. @@ -10873,7 +12055,8 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13033. }
  13034. /* Updating the accelerometer data rate configuration */
  13035. - switch ( (ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g) {
  13036. + switch ((ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g)
  13037. + {
  13038. case LSM6DSO_GY_UI_OFF:
  13039. val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
  13040. break;
  13041. @@ -10945,8 +12128,9 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13042. /* Check accelerometer full scale constraints */
  13043. /* Full scale of 16g must be the same for UI and OIS */
  13044. - if ( (val->ui.xl.fs == LSM6DSO_XL_UI_16g) ||
  13045. - (val->ois.xl.fs == LSM6DSO_XL_OIS_16g) ) {
  13046. + if ((val->ui.xl.fs == LSM6DSO_XL_UI_16g) ||
  13047. + (val->ois.xl.fs == LSM6DSO_XL_OIS_16g))
  13048. + {
  13049. val->ui.xl.fs = LSM6DSO_XL_UI_16g;
  13050. val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
  13051. }
  13052. @@ -10954,18 +12138,21 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13053. /* prapare new configuration */
  13054. /* Full scale of 16g must be the same for UI and OIS */
  13055. - if (val->ui.xl.fs == LSM6DSO_XL_UI_16g) {
  13056. + if (val->ui.xl.fs == LSM6DSO_XL_UI_16g)
  13057. + {
  13058. ctrl8_xl.xl_fs_mode = PROPERTY_DISABLE;
  13059. }
  13060. - else {
  13061. + else
  13062. + {
  13063. ctrl8_xl.xl_fs_mode = PROPERTY_ENABLE;
  13064. }
  13065. /* OIS new configuration */
  13066. ctrl7_g.ois_on_en = val->ois.ctrl_md & 0x01U;
  13067. - switch (val->ois.ctrl_md) {
  13068. + switch (val->ois.ctrl_md)
  13069. + {
  13070. case LSM6DSO_OIS_ONLY_AUX:
  13071. ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
  13072. ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr |
  13073. @@ -11000,33 +12187,38 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13074. ctrl2_g.fs_g = (uint8_t) val->ui.gy.fs;
  13075. /* writing checked configuration */
  13076. - if ( ctx != NULL ) {
  13077. - bytecpy(&reg[0], ( uint8_t *)&ctrl1_xl);
  13078. - bytecpy(&reg[1], ( uint8_t *)&ctrl2_g);
  13079. - bytecpy(&reg[2], ( uint8_t *)&ctrl3_c);
  13080. - bytecpy(&reg[3], ( uint8_t *)&ctrl4_c);
  13081. - bytecpy(&reg[4], ( uint8_t *)&ctrl5_c);
  13082. - bytecpy(&reg[5], ( uint8_t *)&ctrl6_c);
  13083. - bytecpy(&reg[6], ( uint8_t *)&ctrl7_g);
  13084. - bytecpy(&reg[7], ( uint8_t *)&ctrl8_xl);
  13085. -
  13086. - if ( ret == 0 ) {
  13087. + if (ctx != NULL)
  13088. + {
  13089. + bytecpy(&reg[0], (uint8_t *)&ctrl1_xl);
  13090. + bytecpy(&reg[1], (uint8_t *)&ctrl2_g);
  13091. + bytecpy(&reg[2], (uint8_t *)&ctrl3_c);
  13092. + bytecpy(&reg[3], (uint8_t *)&ctrl4_c);
  13093. + bytecpy(&reg[4], (uint8_t *)&ctrl5_c);
  13094. + bytecpy(&reg[5], (uint8_t *)&ctrl6_c);
  13095. + bytecpy(&reg[6], (uint8_t *)&ctrl7_g);
  13096. + bytecpy(&reg[7], (uint8_t *)&ctrl8_xl);
  13097. +
  13098. + if (ret == 0)
  13099. + {
  13100. ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 8);
  13101. }
  13102. - if ( ret == 0 ) {
  13103. + if (ret == 0)
  13104. + {
  13105. ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
  13106. (uint8_t *)&func_cfg_access, 1);
  13107. }
  13108. }
  13109. /* writing OIS checked configuration */
  13110. - if ( aux_ctx != NULL ) {
  13111. - bytecpy(&reg[0], ( uint8_t *)&ctrl1_ois);
  13112. - bytecpy(&reg[1], ( uint8_t *)&ctrl2_ois);
  13113. - bytecpy(&reg[2], ( uint8_t *)&ctrl3_ois);
  13114. -
  13115. - if (ret == 0) {
  13116. + if (aux_ctx != NULL)
  13117. + {
  13118. + bytecpy(&reg[0], (uint8_t *)&ctrl1_ois);
  13119. + bytecpy(&reg[1], (uint8_t *)&ctrl2_ois);
  13120. + bytecpy(&reg[2], (uint8_t *)&ctrl3_ois);
  13121. +
  13122. + if (ret == 0)
  13123. + {
  13124. ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
  13125. }
  13126. }
  13127. @@ -11042,6 +12234,7 @@ int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13128. * @param aux_ctx auxiliary communication interface handler. Use NULL
  13129. * to ignore this interface.(ptr)
  13130. * @param val get the sensor conversion parameters.(ptr)
  13131. + * @retval interface status (MANDATORY: return 0 -> no Error)
  13132. *
  13133. */
  13134. int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13135. @@ -11064,76 +12257,90 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13136. lsm6dso_ctrl7_g_t ctrl7_g;
  13137. uint8_t reg[8];
  13138. int32_t ret;
  13139. +
  13140. ret = 0;
  13141. /* reading the registers of the device */
  13142. - if ( ctx != NULL ) {
  13143. + if (ctx != NULL)
  13144. + {
  13145. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, reg, 7);
  13146. - bytecpy(( uint8_t *)&ctrl1_xl, &reg[0]);
  13147. - bytecpy(( uint8_t *)&ctrl2_g, &reg[1]);
  13148. - bytecpy(( uint8_t *)&ctrl3_c, &reg[2]);
  13149. - bytecpy(( uint8_t *)&ctrl4_c, &reg[3]);
  13150. - bytecpy(( uint8_t *)&ctrl5_c, &reg[4]);
  13151. - bytecpy(( uint8_t *)&ctrl6_c, &reg[5]);
  13152. - bytecpy(( uint8_t *)&ctrl7_g, &reg[6]);
  13153. -
  13154. - if ( ret == 0 ) {
  13155. + bytecpy((uint8_t *)&ctrl1_xl, &reg[0]);
  13156. + bytecpy((uint8_t *)&ctrl2_g, &reg[1]);
  13157. + bytecpy((uint8_t *)&ctrl3_c, &reg[2]);
  13158. + bytecpy((uint8_t *)&ctrl4_c, &reg[3]);
  13159. + bytecpy((uint8_t *)&ctrl5_c, &reg[4]);
  13160. + bytecpy((uint8_t *)&ctrl6_c, &reg[5]);
  13161. + bytecpy((uint8_t *)&ctrl7_g, &reg[6]);
  13162. +
  13163. + if (ret == 0)
  13164. + {
  13165. ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
  13166. (uint8_t *)&func_cfg_access, 1);
  13167. }
  13168. - if (ret == 0) {
  13169. + if (ret == 0)
  13170. + {
  13171. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  13172. }
  13173. - if (ret == 0) {
  13174. + if (ret == 0)
  13175. + {
  13176. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B, reg, 1);
  13177. - bytecpy(( uint8_t *)&emb_func_odr_cfg_b, &reg[0]);
  13178. + bytecpy((uint8_t *)&emb_func_odr_cfg_b, &reg[0]);
  13179. }
  13180. - if (ret == 0) {
  13181. + if (ret == 0)
  13182. + {
  13183. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
  13184. (uint8_t *)&emb_func_en_b, 1);
  13185. }
  13186. - if (ret == 0) {
  13187. + if (ret == 0)
  13188. + {
  13189. ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, reg, 2);
  13190. - bytecpy(( uint8_t *)&fsm_enable_a, &reg[0]);
  13191. - bytecpy(( uint8_t *)&fsm_enable_b, &reg[1]);
  13192. + bytecpy((uint8_t *)&fsm_enable_a, &reg[0]);
  13193. + bytecpy((uint8_t *)&fsm_enable_b, &reg[1]);
  13194. }
  13195. - if (ret == 0) {
  13196. + if (ret == 0)
  13197. + {
  13198. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  13199. }
  13200. }
  13201. - if ( aux_ctx != NULL ) {
  13202. - if (ret == 0) {
  13203. + if (aux_ctx != NULL)
  13204. + {
  13205. + if (ret == 0)
  13206. + {
  13207. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
  13208. }
  13209. - bytecpy(( uint8_t *)&ctrl1_ois, &reg[0]);
  13210. - bytecpy(( uint8_t *)&ctrl2_ois, &reg[1]);
  13211. - bytecpy(( uint8_t *)&ctrl3_ois, &reg[2]);
  13212. + bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
  13213. + bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
  13214. + bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
  13215. }
  13216. - else {
  13217. - if ( ctx != NULL ) {
  13218. - if (ret == 0) {
  13219. + else
  13220. + {
  13221. + if (ctx != NULL)
  13222. + {
  13223. + if (ret == 0)
  13224. + {
  13225. ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, reg, 3);
  13226. }
  13227. - bytecpy(( uint8_t *)&ctrl1_ois, &reg[0]);
  13228. - bytecpy(( uint8_t *)&ctrl2_ois, &reg[1]);
  13229. - bytecpy(( uint8_t *)&ctrl3_ois, &reg[2]);
  13230. + bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
  13231. + bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
  13232. + bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
  13233. }
  13234. }
  13235. /* fill the input structure */
  13236. /* get accelerometer configuration */
  13237. - switch ( (ctrl5_c.xl_ulp_en << 5) | (ctrl6_c.xl_hm_mode << 4) |
  13238. - ctrl1_xl.odr_xl ) {
  13239. + switch ((ctrl5_c.xl_ulp_en << 5) | (ctrl6_c.xl_hm_mode << 4) |
  13240. + ctrl1_xl.odr_xl)
  13241. + {
  13242. case LSM6DSO_XL_UI_OFF:
  13243. val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
  13244. break;
  13245. @@ -11231,7 +12438,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13246. break;
  13247. }
  13248. - switch ( ctrl1_xl.fs_xl ) {
  13249. + switch (ctrl1_xl.fs_xl)
  13250. + {
  13251. case LSM6DSO_XL_UI_2g:
  13252. val->ui.xl.fs = LSM6DSO_XL_UI_2g;
  13253. break;
  13254. @@ -11254,7 +12462,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13255. }
  13256. /* get gyroscope configuration */
  13257. - switch ( (ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g) {
  13258. + switch ((ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g)
  13259. + {
  13260. case LSM6DSO_GY_UI_OFF:
  13261. val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
  13262. break;
  13263. @@ -11324,7 +12533,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13264. break;
  13265. }
  13266. - switch (ctrl2_g.fs_g) {
  13267. + switch (ctrl2_g.fs_g)
  13268. + {
  13269. case LSM6DSO_GY_UI_125dps:
  13270. val->ui.gy.fs = LSM6DSO_GY_UI_125dps;
  13271. break;
  13272. @@ -11351,15 +12561,17 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13273. }
  13274. /* get finite state machine configuration */
  13275. - if ( (fsm_enable_a.fsm1_en | fsm_enable_a.fsm2_en |
  13276. - fsm_enable_a.fsm3_en |
  13277. - fsm_enable_a.fsm4_en | fsm_enable_a.fsm5_en | fsm_enable_a.fsm6_en |
  13278. - fsm_enable_a.fsm7_en | fsm_enable_a.fsm8_en | fsm_enable_b.fsm9_en |
  13279. - fsm_enable_b.fsm10_en | fsm_enable_b.fsm11_en |
  13280. - fsm_enable_b.fsm12_en | fsm_enable_b.fsm13_en |
  13281. - fsm_enable_b.fsm14_en | fsm_enable_b.fsm15_en |
  13282. - fsm_enable_b.fsm16_en) == PROPERTY_ENABLE ) {
  13283. - switch (emb_func_odr_cfg_b.fsm_odr) {
  13284. + if ((fsm_enable_a.fsm1_en | fsm_enable_a.fsm2_en |
  13285. + fsm_enable_a.fsm3_en |
  13286. + fsm_enable_a.fsm4_en | fsm_enable_a.fsm5_en | fsm_enable_a.fsm6_en |
  13287. + fsm_enable_a.fsm7_en | fsm_enable_a.fsm8_en | fsm_enable_b.fsm9_en |
  13288. + fsm_enable_b.fsm10_en | fsm_enable_b.fsm11_en |
  13289. + fsm_enable_b.fsm12_en | fsm_enable_b.fsm13_en |
  13290. + fsm_enable_b.fsm14_en | fsm_enable_b.fsm15_en |
  13291. + fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
  13292. + {
  13293. + switch (emb_func_odr_cfg_b.fsm_odr)
  13294. + {
  13295. case LSM6DSO_FSM_12Hz5:
  13296. val->fsm.odr = LSM6DSO_FSM_12Hz5;
  13297. break;
  13298. @@ -11383,25 +12595,30 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13299. val->fsm.sens = LSM6DSO_FSM_XL_GY;
  13300. - if (val->ui.gy.odr == LSM6DSO_GY_UI_OFF) {
  13301. + if (val->ui.gy.odr == LSM6DSO_GY_UI_OFF)
  13302. + {
  13303. val->fsm.sens = LSM6DSO_FSM_XL;
  13304. }
  13305. - if (val->ui.xl.odr == LSM6DSO_XL_UI_OFF) {
  13306. + if (val->ui.xl.odr == LSM6DSO_XL_UI_OFF)
  13307. + {
  13308. val->fsm.sens = LSM6DSO_FSM_GY;
  13309. }
  13310. }
  13311. - else {
  13312. + else
  13313. + {
  13314. val->fsm.sens = LSM6DSO_FSM_DISABLE;
  13315. }
  13316. /* get ois configuration */
  13317. /* OIS configuration mode */
  13318. - switch ( ctrl7_g.ois_on_en ) {
  13319. + switch (ctrl7_g.ois_on_en)
  13320. + {
  13321. case LSM6DSO_OIS_ONLY_AUX:
  13322. - switch ( ctrl3_ois.fs_xl_ois ) {
  13323. + switch (ctrl3_ois.fs_xl_ois)
  13324. + {
  13325. case LSM6DSO_XL_OIS_2g:
  13326. val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
  13327. break;
  13328. @@ -11423,7 +12640,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13329. break;
  13330. }
  13331. - switch ( ctrl1_ois.mode4_en ) {
  13332. + switch (ctrl1_ois.mode4_en)
  13333. + {
  13334. case LSM6DSO_XL_OIS_OFF:
  13335. val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
  13336. break;
  13337. @@ -11437,7 +12655,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13338. break;
  13339. }
  13340. - switch ( ctrl1_ois.fs_g_ois ) {
  13341. + switch (ctrl1_ois.fs_g_ois)
  13342. + {
  13343. case LSM6DSO_GY_OIS_250dps:
  13344. val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
  13345. break;
  13346. @@ -11459,7 +12678,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13347. break;
  13348. }
  13349. - switch ( ctrl1_ois.ois_en_spi2 ) {
  13350. + switch (ctrl1_ois.ois_en_spi2)
  13351. + {
  13352. case LSM6DSO_GY_OIS_OFF:
  13353. val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
  13354. break;
  13355. @@ -11477,7 +12697,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13356. break;
  13357. case LSM6DSO_OIS_MIXED:
  13358. - switch ( ctrl3_ois.fs_xl_ois ) {
  13359. + switch (ctrl3_ois.fs_xl_ois)
  13360. + {
  13361. case LSM6DSO_XL_OIS_2g:
  13362. val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
  13363. break;
  13364. @@ -11499,7 +12720,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13365. break;
  13366. }
  13367. - switch ( ctrl1_ois.mode4_en ) {
  13368. + switch (ctrl1_ois.mode4_en)
  13369. + {
  13370. case LSM6DSO_XL_OIS_OFF:
  13371. val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
  13372. break;
  13373. @@ -11513,7 +12735,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13374. break;
  13375. }
  13376. - switch ( ctrl1_ois.fs_g_ois ) {
  13377. + switch (ctrl1_ois.fs_g_ois)
  13378. + {
  13379. case LSM6DSO_GY_OIS_250dps:
  13380. val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
  13381. break;
  13382. @@ -11535,7 +12758,8 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13383. break;
  13384. }
  13385. - switch ( ctrl1_ois.ois_en_spi2 ) {
  13386. + switch (ctrl1_ois.ois_en_spi2)
  13387. + {
  13388. case LSM6DSO_GY_OIS_OFF:
  13389. val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
  13390. break;
  13391. @@ -11570,6 +12794,7 @@ int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13392. *
  13393. * @param ctx communication interface handler.(ptr)
  13394. * @param md the sensor conversion parameters.(ptr)
  13395. + * @retval interface status (MANDATORY: return 0 -> no Error)
  13396. *
  13397. */
  13398. int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13399. @@ -11577,31 +12802,35 @@ int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13400. {
  13401. uint8_t buff[14];
  13402. int32_t ret;
  13403. +
  13404. uint8_t i;
  13405. uint8_t j;
  13406. ret = 0;
  13407. /* read data */
  13408. - if ( ctx != NULL ) {
  13409. + if (ctx != NULL)
  13410. + {
  13411. ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 14);
  13412. }
  13413. j = 0;
  13414. /* temperature conversion */
  13415. data->ui.heat.raw = (int16_t)buff[j + 1U];
  13416. - data->ui.heat.raw = ( ((int16_t)data->ui.heat.raw * (int16_t)256) +
  13417. - (int16_t)buff[j] );
  13418. + data->ui.heat.raw = (((int16_t)data->ui.heat.raw * (int16_t)256) +
  13419. + (int16_t)buff[j]);
  13420. j += 2U;
  13421. data->ui.heat.deg_c = lsm6dso_from_lsb_to_celsius((
  13422. int16_t)data->ui.heat.raw);
  13423. /* angular rate conversion */
  13424. - for (i = 0U; i < 3U; i++) {
  13425. + for (i = 0U; i < 3U; i++)
  13426. + {
  13427. data->ui.gy.raw[i] = (int16_t)buff[j + 1U];
  13428. data->ui.gy.raw[i] = (data->ui.gy.raw[i] * 256) + (int16_t) buff[j];
  13429. j += 2U;
  13430. - switch ( md->ui.gy.fs ) {
  13431. + switch (md->ui.gy.fs)
  13432. + {
  13433. case LSM6DSO_GY_UI_250dps:
  13434. data->ui.gy.mdps[i] = lsm6dso_from_fs250_to_mdps(data->ui.gy.raw[i]);
  13435. break;
  13436. @@ -11629,12 +12858,14 @@ int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13437. }
  13438. /* acceleration conversion */
  13439. - for (i = 0U; i < 3U; i++) {
  13440. + for (i = 0U; i < 3U; i++)
  13441. + {
  13442. data->ui.xl.raw[i] = (int16_t)buff[j + 1U];
  13443. data->ui.xl.raw[i] = (data->ui.xl.raw[i] * 256) + (int16_t) buff[j];
  13444. j += 2U;
  13445. - switch ( md->ui.xl.fs ) {
  13446. + switch (md->ui.xl.fs)
  13447. + {
  13448. case LSM6DSO_XL_UI_2g:
  13449. data->ui.xl.mg[i] = lsm6dso_from_fs2_to_mg(data->ui.xl.raw[i]);
  13450. break;
  13451. @@ -11658,8 +12889,10 @@ int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13452. }
  13453. /* read data from ois chain */
  13454. - if (aux_ctx != NULL) {
  13455. - if (ret == 0) {
  13456. + if (aux_ctx != NULL)
  13457. + {
  13458. + if (ret == 0)
  13459. + {
  13460. ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_OUTX_L_G, buff, 12);
  13461. }
  13462. }
  13463. @@ -11667,12 +12900,14 @@ int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13464. j = 0;
  13465. /* ois angular rate conversion */
  13466. - for (i = 0U; i < 3U; i++) {
  13467. + for (i = 0U; i < 3U; i++)
  13468. + {
  13469. data->ois.gy.raw[i] = (int16_t) buff[j + 1U];
  13470. data->ois.gy.raw[i] = (data->ois.gy.raw[i] * 256) + (int16_t) buff[j];
  13471. j += 2U;
  13472. - switch ( md->ois.gy.fs ) {
  13473. + switch (md->ois.gy.fs)
  13474. + {
  13475. case LSM6DSO_GY_UI_250dps:
  13476. data->ois.gy.mdps[i] = lsm6dso_from_fs250_to_mdps(
  13477. data->ois.gy.raw[i]);
  13478. @@ -11705,12 +12940,14 @@ int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13479. }
  13480. /* ois acceleration conversion */
  13481. - for (i = 0U; i < 3U; i++) {
  13482. + for (i = 0U; i < 3U; i++)
  13483. + {
  13484. data->ois.xl.raw[i] = (int16_t) buff[j + 1U];
  13485. data->ois.xl.raw[i] = (data->ois.xl.raw[i] * 256) + (int16_t) buff[j];
  13486. j += 2U;
  13487. - switch ( md->ois.xl.fs ) {
  13488. + switch (md->ois.xl.fs)
  13489. + {
  13490. case LSM6DSO_XL_UI_2g:
  13491. data->ois.xl.mg[i] = lsm6dso_from_fs2_to_mg(data->ois.xl.raw[i]);
  13492. break;
  13493. @@ -11742,6 +12979,7 @@ int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  13494. * @param ctx read / write interface definitions
  13495. * @param val change the values of registers
  13496. * EMB_FUNC_EN_A e EMB_FUNC_EN_B.
  13497. + * @retval interface status (MANDATORY: return 0 -> no Error)
  13498. *
  13499. */
  13500. int32_t lsm6dso_embedded_sens_set(stmdev_ctx_t *ctx,
  13501. @@ -11750,14 +12988,17 @@ int32_t lsm6dso_embedded_sens_set(stmdev_ctx_t *ctx,
  13502. lsm6dso_emb_func_en_a_t emb_func_en_a;
  13503. lsm6dso_emb_func_en_b_t emb_func_en_b;
  13504. int32_t ret;
  13505. +
  13506. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  13507. - if (ret == 0) {
  13508. + if (ret == 0)
  13509. + {
  13510. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
  13511. (uint8_t *)&emb_func_en_a, 1);
  13512. }
  13513. - if (ret == 0) {
  13514. + if (ret == 0)
  13515. + {
  13516. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
  13517. (uint8_t *)&emb_func_en_b, 1);
  13518. emb_func_en_b.fsm_en = val->fsm;
  13519. @@ -11768,17 +13009,20 @@ int32_t lsm6dso_embedded_sens_set(stmdev_ctx_t *ctx,
  13520. emb_func_en_b.fifo_compr_en = val->fifo_compr;
  13521. }
  13522. - if (ret == 0) {
  13523. + if (ret == 0)
  13524. + {
  13525. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
  13526. (uint8_t *)&emb_func_en_a, 1);
  13527. }
  13528. - if (ret == 0) {
  13529. + if (ret == 0)
  13530. + {
  13531. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
  13532. (uint8_t *)&emb_func_en_b, 1);
  13533. }
  13534. - if (ret == 0) {
  13535. + if (ret == 0)
  13536. + {
  13537. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  13538. }
  13539. @@ -11791,6 +13035,7 @@ int32_t lsm6dso_embedded_sens_set(stmdev_ctx_t *ctx,
  13540. * @param ctx read / write interface definitions
  13541. * @param val get the values of registers
  13542. * EMB_FUNC_EN_A e EMB_FUNC_EN_B.
  13543. + * @retval interface status (MANDATORY: return 0 -> no Error)
  13544. *
  13545. */
  13546. int32_t lsm6dso_embedded_sens_get(stmdev_ctx_t *ctx,
  13547. @@ -11799,14 +13044,17 @@ int32_t lsm6dso_embedded_sens_get(stmdev_ctx_t *ctx,
  13548. lsm6dso_emb_func_en_a_t emb_func_en_a;
  13549. lsm6dso_emb_func_en_b_t emb_func_en_b;
  13550. int32_t ret;
  13551. +
  13552. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  13553. - if (ret == 0) {
  13554. + if (ret == 0)
  13555. + {
  13556. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
  13557. (uint8_t *)&emb_func_en_a, 1);
  13558. }
  13559. - if (ret == 0) {
  13560. + if (ret == 0)
  13561. + {
  13562. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
  13563. (uint8_t *)&emb_func_en_b, 1);
  13564. emb_sens->fsm = emb_func_en_b.fsm_en;
  13565. @@ -11817,7 +13065,8 @@ int32_t lsm6dso_embedded_sens_get(stmdev_ctx_t *ctx,
  13566. emb_sens->fifo_compr = emb_func_en_b.fifo_compr_en;
  13567. }
  13568. - if (ret == 0) {
  13569. + if (ret == 0)
  13570. + {
  13571. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  13572. }
  13573. @@ -11830,6 +13079,7 @@ int32_t lsm6dso_embedded_sens_get(stmdev_ctx_t *ctx,
  13574. * @param ctx read / write interface definitions
  13575. * @param val get the values of registers
  13576. * EMB_FUNC_EN_A e EMB_FUNC_EN_B.
  13577. + * @retval interface status (MANDATORY: return 0 -> no Error)
  13578. *
  13579. */
  13580. int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx)
  13581. @@ -11837,14 +13087,17 @@ int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx)
  13582. lsm6dso_emb_func_en_a_t emb_func_en_a;
  13583. lsm6dso_emb_func_en_b_t emb_func_en_b;
  13584. int32_t ret;
  13585. +
  13586. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
  13587. - if (ret == 0) {
  13588. + if (ret == 0)
  13589. + {
  13590. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
  13591. (uint8_t *)&emb_func_en_a, 1);
  13592. }
  13593. - if (ret == 0) {
  13594. + if (ret == 0)
  13595. + {
  13596. ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
  13597. (uint8_t *)&emb_func_en_b, 1);
  13598. emb_func_en_b.fsm_en = PROPERTY_DISABLE;
  13599. @@ -11855,17 +13108,20 @@ int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx)
  13600. emb_func_en_b.fifo_compr_en = PROPERTY_DISABLE;
  13601. }
  13602. - if (ret == 0) {
  13603. + if (ret == 0)
  13604. + {
  13605. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
  13606. (uint8_t *)&emb_func_en_a, 1);
  13607. }
  13608. - if (ret == 0) {
  13609. + if (ret == 0)
  13610. + {
  13611. ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
  13612. (uint8_t *)&emb_func_en_b, 1);
  13613. }
  13614. - if (ret == 0) {
  13615. + if (ret == 0)
  13616. + {
  13617. ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
  13618. }
  13619. @@ -11881,5 +13137,3 @@ int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx)
  13620. * @}
  13621. *
  13622. */
  13623. -
  13624. -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
  13625. diff --git a/lsm6dso_reg.h b/lsm6dso_reg.h
  13626. index d13f05d6b..b72f62327 100644
  13627. --- a/lsm6dso_reg.h
  13628. +++ b/lsm6dso_reg.h
  13629. @@ -1,22 +1,21 @@
  13630. -/*
  13631. - ******************************************************************************
  13632. - * @file lsm6dso_reg.h
  13633. - * @author Sensors Software Solution Team
  13634. - * @brief This file contains all the functions prototypes for the
  13635. - * lsm6dso_reg.c driver.
  13636. - ******************************************************************************
  13637. - * @attention
  13638. - *
  13639. - * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
  13640. - * All rights reserved.</center></h2>
  13641. - *
  13642. - * This software component is licensed by ST under BSD 3-Clause license,
  13643. - * the "License"; You may not use this file except in compliance with the
  13644. - * License. You may obtain a copy of the License at:
  13645. - * opensource.org/licenses/BSD-3-Clause
  13646. - *
  13647. - ******************************************************************************
  13648. - */
  13649. +/**
  13650. + ******************************************************************************
  13651. + * @file lsm6dso_reg.h
  13652. + * @author Sensors Software Solution Team
  13653. + * @brief This file contains all the functions prototypes for the
  13654. + * lsm6dso_reg.c driver.
  13655. + ******************************************************************************
  13656. + * @attention
  13657. + *
  13658. + * Copyright (c) 2019 STMicroelectronics.
  13659. + * All rights reserved.
  13660. + *
  13661. + * This software is licensed under terms that can be found in the LICENSE file
  13662. + * in the root directory of this software component.
  13663. + * If no LICENSE file comes with this software, it is provided AS-IS.
  13664. + *
  13665. + ******************************************************************************
  13666. + */
  13667. /* Define to prevent recursive inclusion -------------------------------------*/
  13668. #ifndef LSM6DSO_REGS_H
  13669. @@ -28,6 +27,7 @@ extern "C" {
  13670. /* Includes ------------------------------------------------------------------*/
  13671. #include <stdint.h>
  13672. +#include <stddef.h>
  13673. #include <math.h>
  13674. /** @addtogroup LSM6DSO
  13675. @@ -74,7 +74,8 @@ extern "C" {
  13676. #ifndef MEMS_SHARED_TYPES
  13677. #define MEMS_SHARED_TYPES
  13678. -typedef struct {
  13679. +typedef struct
  13680. +{
  13681. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13682. uint8_t bit0 : 1;
  13683. uint8_t bit1 : 1;
  13684. @@ -107,19 +108,40 @@ typedef struct {
  13685. *
  13686. */
  13687. -typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, uint8_t *,
  13688. - uint16_t);
  13689. -typedef int32_t (*stmdev_read_ptr) (void *, uint8_t, uint8_t *,
  13690. - uint16_t);
  13691. +typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
  13692. +typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
  13693. +typedef void (*stmdev_mdelay_ptr)(uint32_t millisec);
  13694. -typedef struct {
  13695. +typedef struct
  13696. +{
  13697. /** Component mandatory fields **/
  13698. stmdev_write_ptr write_reg;
  13699. stmdev_read_ptr read_reg;
  13700. + /** Component optional fields **/
  13701. + stmdev_mdelay_ptr mdelay;
  13702. /** Customizable optional pointer **/
  13703. void *handle;
  13704. } stmdev_ctx_t;
  13705. +#ifndef __weak
  13706. +#define __weak __attribute__((weak))
  13707. +#endif /* __weak */
  13708. +
  13709. +/*
  13710. + * These are the basic platform dependent I/O routines to read
  13711. + * and write device registers connected on a standard bus.
  13712. + * The driver keeps offering a default implementation based on function
  13713. + * pointers to read/write routines for backward compatibility.
  13714. + * The __weak directive allows the final application to overwrite
  13715. + * them with a custom implementation.
  13716. + */
  13717. +int32_t lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
  13718. + uint8_t *data,
  13719. + uint16_t len);
  13720. +int32_t lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
  13721. + uint8_t *data,
  13722. + uint16_t len);
  13723. +
  13724. /**
  13725. * @}
  13726. *
  13727. @@ -141,7 +163,8 @@ typedef struct {
  13728. *
  13729. */
  13730. -typedef struct {
  13731. +typedef struct
  13732. +{
  13733. uint8_t address;
  13734. uint8_t data;
  13735. } ucf_line_t;
  13736. @@ -176,7 +199,8 @@ typedef struct {
  13737. */
  13738. #define LSM6DSO_FUNC_CFG_ACCESS 0x01U
  13739. -typedef struct {
  13740. +typedef struct
  13741. +{
  13742. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13743. uint8_t not_used_01 : 6;
  13744. uint8_t reg_access :
  13745. @@ -189,7 +213,8 @@ uint8_t reg_access :
  13746. } lsm6dso_func_cfg_access_t;
  13747. #define LSM6DSO_PIN_CTRL 0x02U
  13748. -typedef struct {
  13749. +typedef struct
  13750. +{
  13751. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13752. uint8_t not_used_01 : 6;
  13753. uint8_t sdo_pu_en : 1;
  13754. @@ -202,12 +227,14 @@ typedef struct {
  13755. } lsm6dso_pin_ctrl_t;
  13756. #define LSM6DSO_FIFO_CTRL1 0x07U
  13757. -typedef struct {
  13758. +typedef struct
  13759. +{
  13760. uint8_t wtm : 8;
  13761. } lsm6dso_fifo_ctrl1_t;
  13762. #define LSM6DSO_FIFO_CTRL2 0x08U
  13763. -typedef struct {
  13764. +typedef struct
  13765. +{
  13766. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13767. uint8_t wtm : 1;
  13768. uint8_t uncoptr_rate : 2;
  13769. @@ -228,7 +255,8 @@ typedef struct {
  13770. } lsm6dso_fifo_ctrl2_t;
  13771. #define LSM6DSO_FIFO_CTRL3 0x09U
  13772. -typedef struct {
  13773. +typedef struct
  13774. +{
  13775. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13776. uint8_t bdr_xl : 4;
  13777. uint8_t bdr_gy : 4;
  13778. @@ -239,7 +267,8 @@ typedef struct {
  13779. } lsm6dso_fifo_ctrl3_t;
  13780. #define LSM6DSO_FIFO_CTRL4 0x0AU
  13781. -typedef struct {
  13782. +typedef struct
  13783. +{
  13784. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13785. uint8_t fifo_mode : 3;
  13786. uint8_t not_used_01 : 1;
  13787. @@ -254,7 +283,8 @@ typedef struct {
  13788. } lsm6dso_fifo_ctrl4_t;
  13789. #define LSM6DSO_COUNTER_BDR_REG1 0x0BU
  13790. -typedef struct {
  13791. +typedef struct
  13792. +{
  13793. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13794. uint8_t cnt_bdr_th : 3;
  13795. uint8_t not_used_01 : 2;
  13796. @@ -271,12 +301,14 @@ typedef struct {
  13797. } lsm6dso_counter_bdr_reg1_t;
  13798. #define LSM6DSO_COUNTER_BDR_REG2 0x0CU
  13799. -typedef struct {
  13800. +typedef struct
  13801. +{
  13802. uint8_t cnt_bdr_th : 8;
  13803. } lsm6dso_counter_bdr_reg2_t;
  13804. #define LSM6DSO_INT1_CTRL 0x0D
  13805. -typedef struct {
  13806. +typedef struct
  13807. +{
  13808. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13809. uint8_t int1_drdy_xl : 1;
  13810. uint8_t int1_drdy_g : 1;
  13811. @@ -299,7 +331,8 @@ typedef struct {
  13812. } lsm6dso_int1_ctrl_t;
  13813. #define LSM6DSO_INT2_CTRL 0x0EU
  13814. -typedef struct {
  13815. +typedef struct
  13816. +{
  13817. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13818. uint8_t int2_drdy_xl : 1;
  13819. uint8_t int2_drdy_g : 1;
  13820. @@ -323,7 +356,8 @@ typedef struct {
  13821. #define LSM6DSO_WHO_AM_I 0x0FU
  13822. #define LSM6DSO_CTRL1_XL 0x10U
  13823. -typedef struct {
  13824. +typedef struct
  13825. +{
  13826. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13827. uint8_t not_used_01 : 1;
  13828. uint8_t lpf2_xl_en : 1;
  13829. @@ -338,7 +372,8 @@ typedef struct {
  13830. } lsm6dso_ctrl1_xl_t;
  13831. #define LSM6DSO_CTRL2_G 0x11U
  13832. -typedef struct {
  13833. +typedef struct
  13834. +{
  13835. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13836. uint8_t not_used_01 : 1;
  13837. uint8_t fs_g : 3; /* fs_125 + fs_g */
  13838. @@ -351,7 +386,8 @@ typedef struct {
  13839. } lsm6dso_ctrl2_g_t;
  13840. #define LSM6DSO_CTRL3_C 0x12U
  13841. -typedef struct {
  13842. +typedef struct
  13843. +{
  13844. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13845. uint8_t sw_reset : 1;
  13846. uint8_t not_used_01 : 1;
  13847. @@ -374,7 +410,8 @@ typedef struct {
  13848. } lsm6dso_ctrl3_c_t;
  13849. #define LSM6DSO_CTRL4_C 0x13U
  13850. -typedef struct {
  13851. +typedef struct
  13852. +{
  13853. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13854. uint8_t not_used_01 : 1;
  13855. uint8_t lpf1_sel_g : 1;
  13856. @@ -397,7 +434,8 @@ typedef struct {
  13857. } lsm6dso_ctrl4_c_t;
  13858. #define LSM6DSO_CTRL5_C 0x14U
  13859. -typedef struct {
  13860. +typedef struct
  13861. +{
  13862. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13863. uint8_t st_xl : 2;
  13864. uint8_t st_g : 2;
  13865. @@ -414,7 +452,8 @@ typedef struct {
  13866. } lsm6dso_ctrl5_c_t;
  13867. #define LSM6DSO_CTRL6_C 0x15U
  13868. -typedef struct {
  13869. +typedef struct
  13870. +{
  13871. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13872. uint8_t ftype : 3;
  13873. uint8_t usr_off_w : 1;
  13874. @@ -431,7 +470,8 @@ uint8_t den_mode :
  13875. } lsm6dso_ctrl6_c_t;
  13876. #define LSM6DSO_CTRL7_G 0x16U
  13877. -typedef struct {
  13878. +typedef struct
  13879. +{
  13880. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13881. uint8_t ois_on : 1;
  13882. uint8_t usr_off_on_out : 1;
  13883. @@ -452,7 +492,8 @@ typedef struct {
  13884. } lsm6dso_ctrl7_g_t;
  13885. #define LSM6DSO_CTRL8_XL 0x17U
  13886. -typedef struct {
  13887. +typedef struct
  13888. +{
  13889. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13890. uint8_t low_pass_on_6d : 1;
  13891. uint8_t xl_fs_mode : 1;
  13892. @@ -471,7 +512,8 @@ typedef struct {
  13893. } lsm6dso_ctrl8_xl_t;
  13894. #define LSM6DSO_CTRL9_XL 0x18U
  13895. -typedef struct {
  13896. +typedef struct
  13897. +{
  13898. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13899. uint8_t not_used_01 : 1;
  13900. uint8_t i3c_disable : 1;
  13901. @@ -492,7 +534,8 @@ typedef struct {
  13902. } lsm6dso_ctrl9_xl_t;
  13903. #define LSM6DSO_CTRL10_C 0x19U
  13904. -typedef struct {
  13905. +typedef struct
  13906. +{
  13907. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13908. uint8_t not_used_01 : 5;
  13909. uint8_t timestamp_en : 1;
  13910. @@ -505,7 +548,8 @@ typedef struct {
  13911. } lsm6dso_ctrl10_c_t;
  13912. #define LSM6DSO_ALL_INT_SRC 0x1AU
  13913. -typedef struct {
  13914. +typedef struct
  13915. +{
  13916. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13917. uint8_t ff_ia : 1;
  13918. uint8_t wu_ia : 1;
  13919. @@ -528,7 +572,8 @@ typedef struct {
  13920. } lsm6dso_all_int_src_t;
  13921. #define LSM6DSO_WAKE_UP_SRC 0x1BU
  13922. -typedef struct {
  13923. +typedef struct
  13924. +{
  13925. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13926. uint8_t z_wu : 1;
  13927. uint8_t y_wu : 1;
  13928. @@ -551,7 +596,8 @@ typedef struct {
  13929. } lsm6dso_wake_up_src_t;
  13930. #define LSM6DSO_TAP_SRC 0x1CU
  13931. -typedef struct {
  13932. +typedef struct
  13933. +{
  13934. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13935. uint8_t z_tap : 1;
  13936. uint8_t y_tap : 1;
  13937. @@ -574,7 +620,8 @@ typedef struct {
  13938. } lsm6dso_tap_src_t;
  13939. #define LSM6DSO_D6D_SRC 0x1DU
  13940. -typedef struct {
  13941. +typedef struct
  13942. +{
  13943. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13944. uint8_t xl : 1;
  13945. uint8_t xh : 1;
  13946. @@ -597,7 +644,8 @@ typedef struct {
  13947. } lsm6dso_d6d_src_t;
  13948. #define LSM6DSO_STATUS_REG 0x1EU
  13949. -typedef struct {
  13950. +typedef struct
  13951. +{
  13952. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13953. uint8_t xlda : 1;
  13954. uint8_t gda : 1;
  13955. @@ -612,7 +660,8 @@ typedef struct {
  13956. } lsm6dso_status_reg_t;
  13957. #define LSM6DSO_STATUS_SPIAUX 0x1EU
  13958. -typedef struct {
  13959. +typedef struct
  13960. +{
  13961. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13962. uint8_t xlda : 1;
  13963. uint8_t gda : 1;
  13964. @@ -641,7 +690,8 @@ typedef struct {
  13965. #define LSM6DSO_OUTZ_L_A 0x2CU
  13966. #define LSM6DSO_OUTZ_H_A 0x2DU
  13967. #define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE 0x35U
  13968. -typedef struct {
  13969. +typedef struct
  13970. +{
  13971. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13972. uint8_t not_used_01 : 3;
  13973. uint8_t is_step_det : 1;
  13974. @@ -660,7 +710,8 @@ typedef struct {
  13975. } lsm6dso_emb_func_status_mainpage_t;
  13976. #define LSM6DSO_FSM_STATUS_A_MAINPAGE 0x36U
  13977. -typedef struct {
  13978. +typedef struct
  13979. +{
  13980. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13981. uint8_t is_fsm1 : 1;
  13982. uint8_t is_fsm2 : 1;
  13983. @@ -683,7 +734,8 @@ typedef struct {
  13984. } lsm6dso_fsm_status_a_mainpage_t;
  13985. #define LSM6DSO_FSM_STATUS_B_MAINPAGE 0x37U
  13986. -typedef struct {
  13987. +typedef struct
  13988. +{
  13989. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13990. uint8_t is_fsm9 : 1;
  13991. uint8_t is_fsm10 : 1;
  13992. @@ -706,7 +758,8 @@ typedef struct {
  13993. } lsm6dso_fsm_status_b_mainpage_t;
  13994. #define LSM6DSO_STATUS_MASTER_MAINPAGE 0x39U
  13995. -typedef struct {
  13996. +typedef struct
  13997. +{
  13998. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  13999. uint8_t sens_hub_endop : 1;
  14000. uint8_t not_used_01 : 2;
  14001. @@ -727,12 +780,14 @@ typedef struct {
  14002. } lsm6dso_status_master_mainpage_t;
  14003. #define LSM6DSO_FIFO_STATUS1 0x3AU
  14004. -typedef struct {
  14005. +typedef struct
  14006. +{
  14007. uint8_t diff_fifo : 8;
  14008. } lsm6dso_fifo_status1_t;
  14009. #define LSM6DSO_FIFO_STATUS2 0x3B
  14010. -typedef struct {
  14011. +typedef struct
  14012. +{
  14013. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14014. uint8_t diff_fifo : 2;
  14015. uint8_t not_used_01 : 1;
  14016. @@ -757,7 +812,8 @@ typedef struct {
  14017. #define LSM6DSO_TIMESTAMP2 0x42U
  14018. #define LSM6DSO_TIMESTAMP3 0x43U
  14019. #define LSM6DSO_TAP_CFG0 0x56U
  14020. -typedef struct {
  14021. +typedef struct
  14022. +{
  14023. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14024. uint8_t lir : 1;
  14025. uint8_t tap_z_en : 1;
  14026. @@ -780,7 +836,8 @@ typedef struct {
  14027. } lsm6dso_tap_cfg0_t;
  14028. #define LSM6DSO_TAP_CFG1 0x57U
  14029. -typedef struct {
  14030. +typedef struct
  14031. +{
  14032. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14033. uint8_t tap_ths_x : 5;
  14034. uint8_t tap_priority : 3;
  14035. @@ -791,7 +848,8 @@ typedef struct {
  14036. } lsm6dso_tap_cfg1_t;
  14037. #define LSM6DSO_TAP_CFG2 0x58U
  14038. -typedef struct {
  14039. +typedef struct
  14040. +{
  14041. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14042. uint8_t tap_ths_y : 5;
  14043. uint8_t inact_en : 2;
  14044. @@ -804,7 +862,8 @@ typedef struct {
  14045. } lsm6dso_tap_cfg2_t;
  14046. #define LSM6DSO_TAP_THS_6D 0x59U
  14047. -typedef struct {
  14048. +typedef struct
  14049. +{
  14050. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14051. uint8_t tap_ths_z : 5;
  14052. uint8_t sixd_ths : 2;
  14053. @@ -817,7 +876,8 @@ typedef struct {
  14054. } lsm6dso_tap_ths_6d_t;
  14055. #define LSM6DSO_INT_DUR2 0x5AU
  14056. -typedef struct {
  14057. +typedef struct
  14058. +{
  14059. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14060. uint8_t shock : 2;
  14061. uint8_t quiet : 2;
  14062. @@ -830,7 +890,8 @@ typedef struct {
  14063. } lsm6dso_int_dur2_t;
  14064. #define LSM6DSO_WAKE_UP_THS 0x5BU
  14065. -typedef struct {
  14066. +typedef struct
  14067. +{
  14068. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14069. uint8_t wk_ths : 6;
  14070. uint8_t usr_off_on_wu : 1;
  14071. @@ -843,7 +904,8 @@ typedef struct {
  14072. } lsm6dso_wake_up_ths_t;
  14073. #define LSM6DSO_WAKE_UP_DUR 0x5CU
  14074. -typedef struct {
  14075. +typedef struct
  14076. +{
  14077. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14078. uint8_t sleep_dur : 4;
  14079. uint8_t wake_ths_w : 1;
  14080. @@ -858,7 +920,8 @@ typedef struct {
  14081. } lsm6dso_wake_up_dur_t;
  14082. #define LSM6DSO_FREE_FALL 0x5DU
  14083. -typedef struct {
  14084. +typedef struct
  14085. +{
  14086. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14087. uint8_t ff_ths : 3;
  14088. uint8_t ff_dur : 5;
  14089. @@ -869,7 +932,8 @@ typedef struct {
  14090. } lsm6dso_free_fall_t;
  14091. #define LSM6DSO_MD1_CFG 0x5EU
  14092. -typedef struct {
  14093. +typedef struct
  14094. +{
  14095. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14096. uint8_t int1_shub : 1;
  14097. uint8_t int1_emb_func : 1;
  14098. @@ -892,7 +956,8 @@ typedef struct {
  14099. } lsm6dso_md1_cfg_t;
  14100. #define LSM6DSO_MD2_CFG 0x5FU
  14101. -typedef struct {
  14102. +typedef struct
  14103. +{
  14104. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14105. uint8_t int2_timestamp : 1;
  14106. uint8_t int2_emb_func : 1;
  14107. @@ -915,7 +980,8 @@ typedef struct {
  14108. } lsm6dso_md2_cfg_t;
  14109. #define LSM6DSO_I3C_BUS_AVB 0x62U
  14110. -typedef struct {
  14111. +typedef struct
  14112. +{
  14113. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14114. uint8_t pd_dis_int1 : 1;
  14115. uint8_t not_used_01 : 2;
  14116. @@ -930,12 +996,14 @@ typedef struct {
  14117. } lsm6dso_i3c_bus_avb_t;
  14118. #define LSM6DSO_INTERNAL_FREQ_FINE 0x63U
  14119. -typedef struct {
  14120. +typedef struct
  14121. +{
  14122. uint8_t freq_fine : 8;
  14123. } lsm6dso_internal_freq_fine_t;
  14124. #define LSM6DSO_INT_OIS 0x6FU
  14125. -typedef struct {
  14126. +typedef struct
  14127. +{
  14128. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14129. uint8_t st_xl_ois : 2;
  14130. uint8_t not_used_01 : 3;
  14131. @@ -952,7 +1020,8 @@ typedef struct {
  14132. } lsm6dso_int_ois_t;
  14133. #define LSM6DSO_CTRL1_OIS 0x70U
  14134. -typedef struct {
  14135. +typedef struct
  14136. +{
  14137. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14138. uint8_t ois_en_spi2 : 1;
  14139. uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
  14140. @@ -971,7 +1040,8 @@ typedef struct {
  14141. } lsm6dso_ctrl1_ois_t;
  14142. #define LSM6DSO_CTRL2_OIS 0x71U
  14143. -typedef struct {
  14144. +typedef struct
  14145. +{
  14146. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14147. uint8_t hp_en_ois : 1;
  14148. uint8_t ftype_ois : 2;
  14149. @@ -988,7 +1058,8 @@ typedef struct {
  14150. } lsm6dso_ctrl2_ois_t;
  14151. #define LSM6DSO_CTRL3_OIS 0x72U
  14152. -typedef struct {
  14153. +typedef struct
  14154. +{
  14155. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14156. uint8_t st_ois_clampdis : 1;
  14157. uint8_t st_ois : 2;
  14158. @@ -1006,7 +1077,8 @@ typedef struct {
  14159. #define LSM6DSO_Y_OFS_USR 0x74U
  14160. #define LSM6DSO_Z_OFS_USR 0x75U
  14161. #define LSM6DSO_FIFO_DATA_OUT_TAG 0x78U
  14162. -typedef struct {
  14163. +typedef struct
  14164. +{
  14165. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14166. uint8_t tag_parity : 1;
  14167. uint8_t tag_cnt : 2;
  14168. @@ -1025,7 +1097,8 @@ typedef struct {
  14169. #define LSM6DSO_FIFO_DATA_OUT_Z_L 0x7DU
  14170. #define LSM6DSO_FIFO_DATA_OUT_Z_H 0x7EU
  14171. #define LSM6DSO_PAGE_SEL 0x02U
  14172. -typedef struct {
  14173. +typedef struct
  14174. +{
  14175. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14176. uint8_t not_used_01 : 4;
  14177. uint8_t page_sel : 4;
  14178. @@ -1036,7 +1109,8 @@ typedef struct {
  14179. } lsm6dso_page_sel_t;
  14180. #define LSM6DSO_EMB_FUNC_EN_A 0x04U
  14181. -typedef struct {
  14182. +typedef struct
  14183. +{
  14184. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14185. uint8_t not_used_01 : 3;
  14186. uint8_t pedo_en : 1;
  14187. @@ -1053,7 +1127,8 @@ typedef struct {
  14188. } lsm6dso_emb_func_en_a_t;
  14189. #define LSM6DSO_EMB_FUNC_EN_B 0x05U
  14190. -typedef struct {
  14191. +typedef struct
  14192. +{
  14193. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14194. uint8_t fsm_en : 1;
  14195. uint8_t not_used_01 : 2;
  14196. @@ -1070,17 +1145,20 @@ typedef struct {
  14197. } lsm6dso_emb_func_en_b_t;
  14198. #define LSM6DSO_PAGE_ADDRESS 0x08U
  14199. -typedef struct {
  14200. +typedef struct
  14201. +{
  14202. uint8_t page_addr : 8;
  14203. } lsm6dso_page_address_t;
  14204. #define LSM6DSO_PAGE_VALUE 0x09U
  14205. -typedef struct {
  14206. +typedef struct
  14207. +{
  14208. uint8_t page_value : 8;
  14209. } lsm6dso_page_value_t;
  14210. #define LSM6DSO_EMB_FUNC_INT1 0x0AU
  14211. -typedef struct {
  14212. +typedef struct
  14213. +{
  14214. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14215. uint8_t not_used_01 : 3;
  14216. uint8_t int1_step_detector : 1;
  14217. @@ -1099,7 +1177,8 @@ typedef struct {
  14218. } lsm6dso_emb_func_int1_t;
  14219. #define LSM6DSO_FSM_INT1_A 0x0BU
  14220. -typedef struct {
  14221. +typedef struct
  14222. +{
  14223. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14224. uint8_t int1_fsm1 : 1;
  14225. uint8_t int1_fsm2 : 1;
  14226. @@ -1122,7 +1201,8 @@ typedef struct {
  14227. } lsm6dso_fsm_int1_a_t;
  14228. #define LSM6DSO_FSM_INT1_B 0x0CU
  14229. -typedef struct {
  14230. +typedef struct
  14231. +{
  14232. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14233. uint8_t int1_fsm9 : 1;
  14234. uint8_t int1_fsm10 : 1;
  14235. @@ -1145,7 +1225,8 @@ typedef struct {
  14236. } lsm6dso_fsm_int1_b_t;
  14237. #define LSM6DSO_EMB_FUNC_INT2 0x0EU
  14238. -typedef struct {
  14239. +typedef struct
  14240. +{
  14241. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14242. uint8_t not_used_01 : 3;
  14243. uint8_t int2_step_detector : 1;
  14244. @@ -1164,7 +1245,8 @@ typedef struct {
  14245. } lsm6dso_emb_func_int2_t;
  14246. #define LSM6DSO_FSM_INT2_A 0x0FU
  14247. -typedef struct {
  14248. +typedef struct
  14249. +{
  14250. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14251. uint8_t int2_fsm1 : 1;
  14252. uint8_t int2_fsm2 : 1;
  14253. @@ -1187,7 +1269,8 @@ typedef struct {
  14254. } lsm6dso_fsm_int2_a_t;
  14255. #define LSM6DSO_FSM_INT2_B 0x10U
  14256. -typedef struct {
  14257. +typedef struct
  14258. +{
  14259. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14260. uint8_t int2_fsm9 : 1;
  14261. uint8_t int2_fsm10 : 1;
  14262. @@ -1210,7 +1293,8 @@ typedef struct {
  14263. } lsm6dso_fsm_int2_b_t;
  14264. #define LSM6DSO_EMB_FUNC_STATUS 0x12U
  14265. -typedef struct {
  14266. +typedef struct
  14267. +{
  14268. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14269. uint8_t not_used_01 : 3;
  14270. uint8_t is_step_det : 1;
  14271. @@ -1229,7 +1313,8 @@ typedef struct {
  14272. } lsm6dso_emb_func_status_t;
  14273. #define LSM6DSO_FSM_STATUS_A 0x13U
  14274. -typedef struct {
  14275. +typedef struct
  14276. +{
  14277. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14278. uint8_t is_fsm1 : 1;
  14279. uint8_t is_fsm2 : 1;
  14280. @@ -1252,7 +1337,8 @@ typedef struct {
  14281. } lsm6dso_fsm_status_a_t;
  14282. #define LSM6DSO_FSM_STATUS_B 0x14U
  14283. -typedef struct {
  14284. +typedef struct
  14285. +{
  14286. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14287. uint8_t is_fsm9 : 1;
  14288. uint8_t is_fsm10 : 1;
  14289. @@ -1275,7 +1361,8 @@ typedef struct {
  14290. } lsm6dso_fsm_status_b_t;
  14291. #define LSM6DSO_PAGE_RW 0x17U
  14292. -typedef struct {
  14293. +typedef struct
  14294. +{
  14295. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14296. uint8_t not_used_01 : 5;
  14297. uint8_t page_rw : 2; /* page_write + page_read */
  14298. @@ -1288,7 +1375,8 @@ typedef struct {
  14299. } lsm6dso_page_rw_t;
  14300. #define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U
  14301. -typedef struct {
  14302. +typedef struct
  14303. +{
  14304. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14305. uint8_t not_used_00 : 6;
  14306. uint8_t pedo_fifo_en : 1;
  14307. @@ -1301,7 +1389,8 @@ typedef struct {
  14308. } lsm6dso_emb_func_fifo_cfg_t;
  14309. #define LSM6DSO_FSM_ENABLE_A 0x46U
  14310. -typedef struct {
  14311. +typedef struct
  14312. +{
  14313. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14314. uint8_t fsm1_en : 1;
  14315. uint8_t fsm2_en : 1;
  14316. @@ -1324,7 +1413,8 @@ typedef struct {
  14317. } lsm6dso_fsm_enable_a_t;
  14318. #define LSM6DSO_FSM_ENABLE_B 0x47U
  14319. -typedef struct {
  14320. +typedef struct
  14321. +{
  14322. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14323. uint8_t fsm9_en : 1;
  14324. uint8_t fsm10_en : 1;
  14325. @@ -1349,7 +1439,8 @@ typedef struct {
  14326. #define LSM6DSO_FSM_LONG_COUNTER_L 0x48U
  14327. #define LSM6DSO_FSM_LONG_COUNTER_H 0x49U
  14328. #define LSM6DSO_FSM_LONG_COUNTER_CLEAR 0x4AU
  14329. -typedef struct {
  14330. +typedef struct
  14331. +{
  14332. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14333. uint8_t fsm_lc_clr :
  14334. 2; /* fsm_lc_cleared + fsm_lc_clear */
  14335. @@ -1362,7 +1453,8 @@ uint8_t fsm_lc_clr :
  14336. } lsm6dso_fsm_long_counter_clear_t;
  14337. #define LSM6DSO_FSM_OUTS1 0x4CU
  14338. -typedef struct {
  14339. +typedef struct
  14340. +{
  14341. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14342. uint8_t n_v : 1;
  14343. uint8_t p_v : 1;
  14344. @@ -1385,7 +1477,8 @@ typedef struct {
  14345. } lsm6dso_fsm_outs1_t;
  14346. #define LSM6DSO_FSM_OUTS2 0x4DU
  14347. -typedef struct {
  14348. +typedef struct
  14349. +{
  14350. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14351. uint8_t n_v : 1;
  14352. uint8_t p_v : 1;
  14353. @@ -1408,7 +1501,8 @@ typedef struct {
  14354. } lsm6dso_fsm_outs2_t;
  14355. #define LSM6DSO_FSM_OUTS3 0x4EU
  14356. -typedef struct {
  14357. +typedef struct
  14358. +{
  14359. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14360. uint8_t n_v : 1;
  14361. uint8_t p_v : 1;
  14362. @@ -1431,7 +1525,8 @@ typedef struct {
  14363. } lsm6dso_fsm_outs3_t;
  14364. #define LSM6DSO_FSM_OUTS4 0x4FU
  14365. -typedef struct {
  14366. +typedef struct
  14367. +{
  14368. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14369. uint8_t n_v : 1;
  14370. uint8_t p_v : 1;
  14371. @@ -1454,7 +1549,8 @@ typedef struct {
  14372. } lsm6dso_fsm_outs4_t;
  14373. #define LSM6DSO_FSM_OUTS5 0x50U
  14374. -typedef struct {
  14375. +typedef struct
  14376. +{
  14377. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14378. uint8_t n_v : 1;
  14379. uint8_t p_v : 1;
  14380. @@ -1477,7 +1573,8 @@ typedef struct {
  14381. } lsm6dso_fsm_outs5_t;
  14382. #define LSM6DSO_FSM_OUTS6 0x51U
  14383. -typedef struct {
  14384. +typedef struct
  14385. +{
  14386. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14387. uint8_t n_v : 1;
  14388. uint8_t p_v : 1;
  14389. @@ -1500,7 +1597,8 @@ typedef struct {
  14390. } lsm6dso_fsm_outs6_t;
  14391. #define LSM6DSO_FSM_OUTS7 0x52U
  14392. -typedef struct {
  14393. +typedef struct
  14394. +{
  14395. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14396. uint8_t n_v : 1;
  14397. uint8_t p_v : 1;
  14398. @@ -1523,7 +1621,8 @@ typedef struct {
  14399. } lsm6dso_fsm_outs7_t;
  14400. #define LSM6DSO_FSM_OUTS8 0x53U
  14401. -typedef struct {
  14402. +typedef struct
  14403. +{
  14404. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14405. uint8_t n_v : 1;
  14406. uint8_t p_v : 1;
  14407. @@ -1546,7 +1645,8 @@ typedef struct {
  14408. } lsm6dso_fsm_outs8_t;
  14409. #define LSM6DSO_FSM_OUTS9 0x54U
  14410. -typedef struct {
  14411. +typedef struct
  14412. +{
  14413. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14414. uint8_t n_v : 1;
  14415. uint8_t p_v : 1;
  14416. @@ -1569,7 +1669,8 @@ typedef struct {
  14417. } lsm6dso_fsm_outs9_t;
  14418. #define LSM6DSO_FSM_OUTS10 0x55U
  14419. -typedef struct {
  14420. +typedef struct
  14421. +{
  14422. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14423. uint8_t n_v : 1;
  14424. uint8_t p_v : 1;
  14425. @@ -1592,7 +1693,8 @@ typedef struct {
  14426. } lsm6dso_fsm_outs10_t;
  14427. #define LSM6DSO_FSM_OUTS11 0x56U
  14428. -typedef struct {
  14429. +typedef struct
  14430. +{
  14431. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14432. uint8_t n_v : 1;
  14433. uint8_t p_v : 1;
  14434. @@ -1615,7 +1717,8 @@ typedef struct {
  14435. } lsm6dso_fsm_outs11_t;
  14436. #define LSM6DSO_FSM_OUTS12 0x57U
  14437. -typedef struct {
  14438. +typedef struct
  14439. +{
  14440. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14441. uint8_t n_v : 1;
  14442. uint8_t p_v : 1;
  14443. @@ -1638,7 +1741,8 @@ typedef struct {
  14444. } lsm6dso_fsm_outs12_t;
  14445. #define LSM6DSO_FSM_OUTS13 0x58U
  14446. -typedef struct {
  14447. +typedef struct
  14448. +{
  14449. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14450. uint8_t n_v : 1;
  14451. uint8_t p_v : 1;
  14452. @@ -1661,7 +1765,8 @@ typedef struct {
  14453. } lsm6dso_fsm_outs13_t;
  14454. #define LSM6DSO_FSM_OUTS14 0x59U
  14455. -typedef struct {
  14456. +typedef struct
  14457. +{
  14458. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14459. uint8_t n_v : 1;
  14460. uint8_t p_v : 1;
  14461. @@ -1684,7 +1789,8 @@ typedef struct {
  14462. } lsm6dso_fsm_outs14_t;
  14463. #define LSM6DSO_FSM_OUTS15 0x5AU
  14464. -typedef struct {
  14465. +typedef struct
  14466. +{
  14467. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14468. uint8_t n_v : 1;
  14469. uint8_t p_v : 1;
  14470. @@ -1707,7 +1813,8 @@ typedef struct {
  14471. } lsm6dso_fsm_outs15_t;
  14472. #define LSM6DSO_FSM_OUTS16 0x5BU
  14473. -typedef struct {
  14474. +typedef struct
  14475. +{
  14476. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14477. uint8_t n_v : 1;
  14478. uint8_t p_v : 1;
  14479. @@ -1730,7 +1837,8 @@ typedef struct {
  14480. } lsm6dso_fsm_outs16_t;
  14481. #define LSM6DSO_EMB_FUNC_ODR_CFG_B 0x5FU
  14482. -typedef struct {
  14483. +typedef struct
  14484. +{
  14485. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14486. uint8_t not_used_01 : 3;
  14487. uint8_t fsm_odr : 2;
  14488. @@ -1745,7 +1853,8 @@ typedef struct {
  14489. #define LSM6DSO_STEP_COUNTER_L 0x62U
  14490. #define LSM6DSO_STEP_COUNTER_H 0x63U
  14491. #define LSM6DSO_EMB_FUNC_SRC 0x64U
  14492. -typedef struct {
  14493. +typedef struct
  14494. +{
  14495. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14496. uint8_t not_used_01 : 2;
  14497. uint8_t stepcounter_bit_set : 1;
  14498. @@ -1766,7 +1875,8 @@ typedef struct {
  14499. } lsm6dso_emb_func_src_t;
  14500. #define LSM6DSO_EMB_FUNC_INIT_A 0x66U
  14501. -typedef struct {
  14502. +typedef struct
  14503. +{
  14504. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14505. uint8_t not_used_01 : 3;
  14506. uint8_t step_det_init : 1;
  14507. @@ -1783,7 +1893,8 @@ typedef struct {
  14508. } lsm6dso_emb_func_init_a_t;
  14509. #define LSM6DSO_EMB_FUNC_INIT_B 0x67U
  14510. -typedef struct {
  14511. +typedef struct
  14512. +{
  14513. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14514. uint8_t fsm_init : 1;
  14515. uint8_t not_used_01 : 2;
  14516. @@ -1818,7 +1929,8 @@ typedef struct {
  14517. #define LSM6DSO_MAG_SI_ZZ_L 0xD0U
  14518. #define LSM6DSO_MAG_SI_ZZ_H 0xD1U
  14519. #define LSM6DSO_MAG_CFG_A 0xD4U
  14520. -typedef struct {
  14521. +typedef struct
  14522. +{
  14523. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14524. uint8_t mag_z_axis : 3;
  14525. uint8_t not_used_01 : 1;
  14526. @@ -1833,7 +1945,8 @@ typedef struct {
  14527. } lsm6dso_mag_cfg_a_t;
  14528. #define LSM6DSO_MAG_CFG_B 0xD5U
  14529. -typedef struct {
  14530. +typedef struct
  14531. +{
  14532. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14533. uint8_t mag_x_axis : 3;
  14534. uint8_t not_used_01 : 5;
  14535. @@ -1849,7 +1962,8 @@ typedef struct {
  14536. #define LSM6DSO_FSM_START_ADD_L 0x17EU
  14537. #define LSM6DSO_FSM_START_ADD_H 0x17FU
  14538. #define LSM6DSO_PEDO_CMD_REG 0x183U
  14539. -typedef struct {
  14540. +typedef struct
  14541. +{
  14542. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14543. uint8_t ad_det_en : 1;
  14544. uint8_t not_used_01 : 1;
  14545. @@ -1869,7 +1983,8 @@ typedef struct {
  14546. #define LSM6DSO_PEDO_SC_DELTAT_L 0x1D0U
  14547. #define LSM6DSO_PEDO_SC_DELTAT_H 0x1D1U
  14548. #define LSM6DSO_SENSOR_HUB_1 0x02U
  14549. -typedef struct {
  14550. +typedef struct
  14551. +{
  14552. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14553. uint8_t bit0 : 1;
  14554. uint8_t bit1 : 1;
  14555. @@ -1892,7 +2007,8 @@ typedef struct {
  14556. } lsm6dso_sensor_hub_1_t;
  14557. #define LSM6DSO_SENSOR_HUB_2 0x03U
  14558. -typedef struct {
  14559. +typedef struct
  14560. +{
  14561. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14562. uint8_t bit0 : 1;
  14563. uint8_t bit1 : 1;
  14564. @@ -1915,7 +2031,8 @@ typedef struct {
  14565. } lsm6dso_sensor_hub_2_t;
  14566. #define LSM6DSO_SENSOR_HUB_3 0x04U
  14567. -typedef struct {
  14568. +typedef struct
  14569. +{
  14570. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14571. uint8_t bit0 : 1;
  14572. uint8_t bit1 : 1;
  14573. @@ -1938,7 +2055,8 @@ typedef struct {
  14574. } lsm6dso_sensor_hub_3_t;
  14575. #define LSM6DSO_SENSOR_HUB_4 0x05U
  14576. -typedef struct {
  14577. +typedef struct
  14578. +{
  14579. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14580. uint8_t bit0 : 1;
  14581. uint8_t bit1 : 1;
  14582. @@ -1961,7 +2079,8 @@ typedef struct {
  14583. } lsm6dso_sensor_hub_4_t;
  14584. #define LSM6DSO_SENSOR_HUB_5 0x06U
  14585. -typedef struct {
  14586. +typedef struct
  14587. +{
  14588. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14589. uint8_t bit0 : 1;
  14590. uint8_t bit1 : 1;
  14591. @@ -1984,7 +2103,8 @@ typedef struct {
  14592. } lsm6dso_sensor_hub_5_t;
  14593. #define LSM6DSO_SENSOR_HUB_6 0x07U
  14594. -typedef struct {
  14595. +typedef struct
  14596. +{
  14597. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14598. uint8_t bit0 : 1;
  14599. uint8_t bit1 : 1;
  14600. @@ -2007,7 +2127,8 @@ typedef struct {
  14601. } lsm6dso_sensor_hub_6_t;
  14602. #define LSM6DSO_SENSOR_HUB_7 0x08U
  14603. -typedef struct {
  14604. +typedef struct
  14605. +{
  14606. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14607. uint8_t bit0 : 1;
  14608. uint8_t bit1 : 1;
  14609. @@ -2030,7 +2151,8 @@ typedef struct {
  14610. } lsm6dso_sensor_hub_7_t;
  14611. #define LSM6DSO_SENSOR_HUB_8 0x09U
  14612. -typedef struct {
  14613. +typedef struct
  14614. +{
  14615. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14616. uint8_t bit0 : 1;
  14617. uint8_t bit1 : 1;
  14618. @@ -2053,7 +2175,8 @@ typedef struct {
  14619. } lsm6dso_sensor_hub_8_t;
  14620. #define LSM6DSO_SENSOR_HUB_9 0x0AU
  14621. -typedef struct {
  14622. +typedef struct
  14623. +{
  14624. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14625. uint8_t bit0 : 1;
  14626. uint8_t bit1 : 1;
  14627. @@ -2076,7 +2199,8 @@ typedef struct {
  14628. } lsm6dso_sensor_hub_9_t;
  14629. #define LSM6DSO_SENSOR_HUB_10 0x0BU
  14630. -typedef struct {
  14631. +typedef struct
  14632. +{
  14633. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14634. uint8_t bit0 : 1;
  14635. uint8_t bit1 : 1;
  14636. @@ -2099,7 +2223,8 @@ typedef struct {
  14637. } lsm6dso_sensor_hub_10_t;
  14638. #define LSM6DSO_SENSOR_HUB_11 0x0CU
  14639. -typedef struct {
  14640. +typedef struct
  14641. +{
  14642. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14643. uint8_t bit0 : 1;
  14644. uint8_t bit1 : 1;
  14645. @@ -2122,7 +2247,8 @@ typedef struct {
  14646. } lsm6dso_sensor_hub_11_t;
  14647. #define LSM6DSO_SENSOR_HUB_12 0x0DU
  14648. -typedef struct {
  14649. +typedef struct
  14650. +{
  14651. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14652. uint8_t bit0 : 1;
  14653. uint8_t bit1 : 1;
  14654. @@ -2145,7 +2271,8 @@ typedef struct {
  14655. } lsm6dso_sensor_hub_12_t;
  14656. #define LSM6DSO_SENSOR_HUB_13 0x0EU
  14657. -typedef struct {
  14658. +typedef struct
  14659. +{
  14660. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14661. uint8_t bit0 : 1;
  14662. uint8_t bit1 : 1;
  14663. @@ -2168,7 +2295,8 @@ typedef struct {
  14664. } lsm6dso_sensor_hub_13_t;
  14665. #define LSM6DSO_SENSOR_HUB_14 0x0FU
  14666. -typedef struct {
  14667. +typedef struct
  14668. +{
  14669. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14670. uint8_t bit0 : 1;
  14671. uint8_t bit1 : 1;
  14672. @@ -2191,7 +2319,8 @@ typedef struct {
  14673. } lsm6dso_sensor_hub_14_t;
  14674. #define LSM6DSO_SENSOR_HUB_15 0x10U
  14675. -typedef struct {
  14676. +typedef struct
  14677. +{
  14678. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14679. uint8_t bit0 : 1;
  14680. uint8_t bit1 : 1;
  14681. @@ -2214,7 +2343,8 @@ typedef struct {
  14682. } lsm6dso_sensor_hub_15_t;
  14683. #define LSM6DSO_SENSOR_HUB_16 0x11U
  14684. -typedef struct {
  14685. +typedef struct
  14686. +{
  14687. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14688. uint8_t bit0 : 1;
  14689. uint8_t bit1 : 1;
  14690. @@ -2237,7 +2367,8 @@ typedef struct {
  14691. } lsm6dso_sensor_hub_16_t;
  14692. #define LSM6DSO_SENSOR_HUB_17 0x12U
  14693. -typedef struct {
  14694. +typedef struct
  14695. +{
  14696. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14697. uint8_t bit0 : 1;
  14698. uint8_t bit1 : 1;
  14699. @@ -2260,7 +2391,8 @@ typedef struct {
  14700. } lsm6dso_sensor_hub_17_t;
  14701. #define LSM6DSO_SENSOR_HUB_18 0x13U
  14702. -typedef struct {
  14703. +typedef struct
  14704. +{
  14705. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14706. uint8_t bit0 : 1;
  14707. uint8_t bit1 : 1;
  14708. @@ -2283,7 +2415,8 @@ typedef struct {
  14709. } lsm6dso_sensor_hub_18_t;
  14710. #define LSM6DSO_MASTER_CONFIG 0x14U
  14711. -typedef struct {
  14712. +typedef struct
  14713. +{
  14714. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14715. uint8_t aux_sens_on : 2;
  14716. uint8_t master_on : 1;
  14717. @@ -2304,7 +2437,8 @@ typedef struct {
  14718. } lsm6dso_master_config_t;
  14719. #define LSM6DSO_SLV0_ADD 0x15U
  14720. -typedef struct {
  14721. +typedef struct
  14722. +{
  14723. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14724. uint8_t rw_0 : 1;
  14725. uint8_t slave0 : 7;
  14726. @@ -2315,12 +2449,14 @@ typedef struct {
  14727. } lsm6dso_slv0_add_t;
  14728. #define LSM6DSO_SLV0_SUBADD 0x16U
  14729. -typedef struct {
  14730. +typedef struct
  14731. +{
  14732. uint8_t slave0_reg : 8;
  14733. } lsm6dso_slv0_subadd_t;
  14734. #define LSM6DSO_SLV0_CONFIG 0x17U
  14735. -typedef struct {
  14736. +typedef struct
  14737. +{
  14738. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14739. uint8_t slave0_numop : 3;
  14740. uint8_t batch_ext_sens_0_en : 1;
  14741. @@ -2335,7 +2471,8 @@ typedef struct {
  14742. } lsm6dso_slv0_config_t;
  14743. #define LSM6DSO_SLV1_ADD 0x18U
  14744. -typedef struct {
  14745. +typedef struct
  14746. +{
  14747. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14748. uint8_t r_1 : 1;
  14749. uint8_t slave1_add : 7;
  14750. @@ -2346,12 +2483,14 @@ typedef struct {
  14751. } lsm6dso_slv1_add_t;
  14752. #define LSM6DSO_SLV1_SUBADD 0x19U
  14753. -typedef struct {
  14754. +typedef struct
  14755. +{
  14756. uint8_t slave1_reg : 8;
  14757. } lsm6dso_slv1_subadd_t;
  14758. #define LSM6DSO_SLV1_CONFIG 0x1AU
  14759. -typedef struct {
  14760. +typedef struct
  14761. +{
  14762. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14763. uint8_t slave1_numop : 3;
  14764. uint8_t batch_ext_sens_1_en : 1;
  14765. @@ -2364,7 +2503,8 @@ typedef struct {
  14766. } lsm6dso_slv1_config_t;
  14767. #define LSM6DSO_SLV2_ADD 0x1BU
  14768. -typedef struct {
  14769. +typedef struct
  14770. +{
  14771. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14772. uint8_t r_2 : 1;
  14773. uint8_t slave2_add : 7;
  14774. @@ -2375,12 +2515,14 @@ typedef struct {
  14775. } lsm6dso_slv2_add_t;
  14776. #define LSM6DSO_SLV2_SUBADD 0x1CU
  14777. -typedef struct {
  14778. +typedef struct
  14779. +{
  14780. uint8_t slave2_reg : 8;
  14781. } lsm6dso_slv2_subadd_t;
  14782. #define LSM6DSO_SLV2_CONFIG 0x1DU
  14783. -typedef struct {
  14784. +typedef struct
  14785. +{
  14786. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14787. uint8_t slave2_numop : 3;
  14788. uint8_t batch_ext_sens_2_en : 1;
  14789. @@ -2393,7 +2535,8 @@ typedef struct {
  14790. } lsm6dso_slv2_config_t;
  14791. #define LSM6DSO_SLV3_ADD 0x1EU
  14792. -typedef struct {
  14793. +typedef struct
  14794. +{
  14795. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14796. uint8_t r_3 : 1;
  14797. uint8_t slave3_add : 7;
  14798. @@ -2404,12 +2547,14 @@ typedef struct {
  14799. } lsm6dso_slv3_add_t;
  14800. #define LSM6DSO_SLV3_SUBADD 0x1FU
  14801. -typedef struct {
  14802. +typedef struct
  14803. +{
  14804. uint8_t slave3_reg : 8;
  14805. } lsm6dso_slv3_subadd_t;
  14806. #define LSM6DSO_SLV3_CONFIG 0x20U
  14807. -typedef struct {
  14808. +typedef struct
  14809. +{
  14810. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14811. uint8_t slave3_numop : 3;
  14812. uint8_t batch_ext_sens_3_en : 1;
  14813. @@ -2422,12 +2567,14 @@ typedef struct {
  14814. } lsm6dso_slv3_config_t;
  14815. #define LSM6DSO_DATAWRITE_SLV0 0x21U
  14816. -typedef struct {
  14817. +typedef struct
  14818. +{
  14819. uint8_t slave0_dataw : 8;
  14820. } lsm6dso_datawrite_src_mode_sub_slv0_t;
  14821. #define LSM6DSO_STATUS_MASTER 0x22U
  14822. -typedef struct {
  14823. +typedef struct
  14824. +{
  14825. #if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  14826. uint8_t sens_hub_endop : 1;
  14827. uint8_t not_used_01 : 2;
  14828. @@ -2451,9 +2598,9 @@ typedef struct {
  14829. /**
  14830. * @defgroup LSM6DSO_Register_Union
  14831. - * @brief This union group all the registers that has a bitfield
  14832. + * @brief This union group all the registers having a bit-field
  14833. * description.
  14834. - * This union is useful but not need by the driver.
  14835. + * This union is useful but it's not needed by the driver.
  14836. *
  14837. * REMOVING this union you are compliant with:
  14838. * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
  14839. @@ -2461,7 +2608,8 @@ typedef struct {
  14840. * @{
  14841. *
  14842. */
  14843. -typedef union {
  14844. +typedef union
  14845. +{
  14846. lsm6dso_func_cfg_access_t func_cfg_access;
  14847. lsm6dso_pin_ctrl_t pin_ctrl;
  14848. lsm6dso_fifo_ctrl1_t fifo_ctrl1;
  14849. @@ -2591,28 +2739,25 @@ typedef union {
  14850. *
  14851. */
  14852. -int32_t lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
  14853. - uint8_t *data,
  14854. - uint16_t len);
  14855. -int32_t lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
  14856. - uint8_t *data,
  14857. - uint16_t len);
  14858. -
  14859. float_t lsm6dso_from_fs2_to_mg(int16_t lsb);
  14860. float_t lsm6dso_from_fs4_to_mg(int16_t lsb);
  14861. float_t lsm6dso_from_fs8_to_mg(int16_t lsb);
  14862. float_t lsm6dso_from_fs16_to_mg(int16_t lsb);
  14863. +
  14864. float_t lsm6dso_from_fs125_to_mdps(int16_t lsb);
  14865. float_t lsm6dso_from_fs500_to_mdps(int16_t lsb);
  14866. float_t lsm6dso_from_fs250_to_mdps(int16_t lsb);
  14867. float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb);
  14868. float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb);
  14869. +
  14870. float_t lsm6dso_from_lsb_to_celsius(int16_t lsb);
  14871. +
  14872. float_t lsm6dso_from_lsb_to_nsec(int16_t lsb);
  14873. -typedef enum {
  14874. +typedef enum
  14875. +{
  14876. LSM6DSO_2g = 0,
  14877. - LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */
  14878. + LSM6DSO_16g = 1, /* if XL_FS_MODE = '1' -> LSM6DSO_2g */
  14879. LSM6DSO_4g = 2,
  14880. LSM6DSO_8g = 3,
  14881. } lsm6dso_fs_xl_t;
  14882. @@ -2621,7 +2766,8 @@ int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx,
  14883. int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx,
  14884. lsm6dso_fs_xl_t *val);
  14885. -typedef enum {
  14886. +typedef enum
  14887. +{
  14888. LSM6DSO_XL_ODR_OFF = 0,
  14889. LSM6DSO_XL_ODR_12Hz5 = 1,
  14890. LSM6DSO_XL_ODR_26Hz = 2,
  14891. @@ -2640,7 +2786,8 @@ int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
  14892. int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx,
  14893. lsm6dso_odr_xl_t *val);
  14894. -typedef enum {
  14895. +typedef enum
  14896. +{
  14897. LSM6DSO_250dps = 0,
  14898. LSM6DSO_125dps = 1,
  14899. LSM6DSO_500dps = 2,
  14900. @@ -2652,7 +2799,8 @@ int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx,
  14901. int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx,
  14902. lsm6dso_fs_g_t *val);
  14903. -typedef enum {
  14904. +typedef enum
  14905. +{
  14906. LSM6DSO_GY_ODR_OFF = 0,
  14907. LSM6DSO_GY_ODR_12Hz5 = 1,
  14908. LSM6DSO_GY_ODR_26Hz = 2,
  14909. @@ -2674,7 +2822,8 @@ int32_t lsm6dso_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val);
  14910. int32_t lsm6dso_block_data_update_get(stmdev_ctx_t *ctx,
  14911. uint8_t *val);
  14912. -typedef enum {
  14913. +typedef enum
  14914. +{
  14915. LSM6DSO_LSb_1mg = 0,
  14916. LSM6DSO_LSb_16mg = 1,
  14917. } lsm6dso_usr_off_w_t;
  14918. @@ -2683,7 +2832,8 @@ int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
  14919. int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
  14920. lsm6dso_usr_off_w_t *val);
  14921. -typedef enum {
  14922. +typedef enum
  14923. +{
  14924. LSM6DSO_HIGH_PERFORMANCE_MD = 0,
  14925. LSM6DSO_LOW_NORMAL_POWER_MD = 1,
  14926. LSM6DSO_ULTRA_LOW_POWER_MD = 2,
  14927. @@ -2693,7 +2843,8 @@ int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
  14928. int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
  14929. lsm6dso_xl_hm_mode_t *val);
  14930. -typedef enum {
  14931. +typedef enum
  14932. +{
  14933. LSM6DSO_GY_HIGH_PERFORMANCE = 0,
  14934. LSM6DSO_GY_NORMAL = 1,
  14935. } lsm6dso_g_hm_mode_t;
  14936. @@ -2733,7 +2884,8 @@ int32_t lsm6dso_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val);
  14937. int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val);
  14938. -typedef enum {
  14939. +typedef enum
  14940. +{
  14941. LSM6DSO_NO_ROUND = 0,
  14942. LSM6DSO_ROUND_XL = 1,
  14943. LSM6DSO_ROUND_GY = 2,
  14944. @@ -2761,7 +2913,8 @@ int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx);
  14945. int32_t lsm6dso_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val);
  14946. int32_t lsm6dso_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val);
  14947. -typedef enum {
  14948. +typedef enum
  14949. +{
  14950. LSM6DSO_USER_BANK = 0,
  14951. LSM6DSO_SENSOR_HUB_BANK = 1,
  14952. LSM6DSO_EMBEDDED_FUNC_BANK = 2,
  14953. @@ -2780,7 +2933,8 @@ int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
  14954. int32_t lsm6dso_ln_pg_read(stmdev_ctx_t *ctx, uint16_t address,
  14955. uint8_t *val);
  14956. -typedef enum {
  14957. +typedef enum
  14958. +{
  14959. LSM6DSO_DRDY_LATCHED = 0,
  14960. LSM6DSO_DRDY_PULSED = 1,
  14961. } lsm6dso_dataready_pulsed_t;
  14962. @@ -2800,7 +2954,8 @@ int32_t lsm6dso_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val);
  14963. int32_t lsm6dso_boot_set(stmdev_ctx_t *ctx, uint8_t val);
  14964. int32_t lsm6dso_boot_get(stmdev_ctx_t *ctx, uint8_t *val);
  14965. -typedef enum {
  14966. +typedef enum
  14967. +{
  14968. LSM6DSO_XL_ST_DISABLE = 0,
  14969. LSM6DSO_XL_ST_POSITIVE = 1,
  14970. LSM6DSO_XL_ST_NEGATIVE = 2,
  14971. @@ -2810,7 +2965,8 @@ int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx,
  14972. int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx,
  14973. lsm6dso_st_xl_t *val);
  14974. -typedef enum {
  14975. +typedef enum
  14976. +{
  14977. LSM6DSO_GY_ST_DISABLE = 0,
  14978. LSM6DSO_GY_ST_POSITIVE = 1,
  14979. LSM6DSO_GY_ST_NEGATIVE = 3,
  14980. @@ -2831,7 +2987,8 @@ int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
  14981. int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
  14982. uint8_t *val);
  14983. -typedef enum {
  14984. +typedef enum
  14985. +{
  14986. LSM6DSO_ULTRA_LIGHT = 0,
  14987. LSM6DSO_VERY_LIGHT = 1,
  14988. LSM6DSO_LIGHT = 2,
  14989. @@ -2849,7 +3006,8 @@ int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  14990. int32_t lsm6dso_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val);
  14991. int32_t lsm6dso_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val);
  14992. -typedef enum {
  14993. +typedef enum
  14994. +{
  14995. LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00,
  14996. LSM6DSO_SLOPE_ODR_DIV_4 = 0x10,
  14997. LSM6DSO_HP_ODR_DIV_10 = 0x11,
  14998. @@ -2882,7 +3040,8 @@ int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
  14999. int32_t lsm6dso_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val);
  15000. int32_t lsm6dso_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val);
  15001. -typedef enum {
  15002. +typedef enum
  15003. +{
  15004. LSM6DSO_USE_SLOPE = 0,
  15005. LSM6DSO_USE_HPF = 1,
  15006. } lsm6dso_slope_fds_t;
  15007. @@ -2891,7 +3050,8 @@ int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
  15008. int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
  15009. lsm6dso_slope_fds_t *val);
  15010. -typedef enum {
  15011. +typedef enum
  15012. +{
  15013. LSM6DSO_HP_FILTER_NONE = 0x00,
  15014. LSM6DSO_HP_FILTER_16mHz = 0x80,
  15015. LSM6DSO_HP_FILTER_65mHz = 0x81,
  15016. @@ -2903,7 +3063,8 @@ int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
  15017. int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
  15018. lsm6dso_hpm_g_t *val);
  15019. -typedef enum {
  15020. +typedef enum
  15021. +{
  15022. LSM6DSO_AUX_PULL_UP_DISC = 0,
  15023. LSM6DSO_AUX_PULL_UP_CONNECT = 1,
  15024. } lsm6dso_ois_pu_dis_t;
  15025. @@ -2912,7 +3073,8 @@ int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
  15026. int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
  15027. lsm6dso_ois_pu_dis_t *val);
  15028. -typedef enum {
  15029. +typedef enum
  15030. +{
  15031. LSM6DSO_AUX_ON = 1,
  15032. LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0,
  15033. } lsm6dso_ois_on_t;
  15034. @@ -2921,7 +3083,8 @@ int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx,
  15035. int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx,
  15036. lsm6dso_ois_on_t *val);
  15037. -typedef enum {
  15038. +typedef enum
  15039. +{
  15040. LSM6DSO_USE_SAME_XL_FS = 0,
  15041. LSM6DSO_USE_DIFFERENT_XL_FS = 1,
  15042. } lsm6dso_xl_fs_mode_t;
  15043. @@ -2942,7 +3105,8 @@ int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
  15044. int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx,
  15045. uint8_t *val);
  15046. -typedef enum {
  15047. +typedef enum
  15048. +{
  15049. LSM6DSO_AUX_XL_DISABLE = 0,
  15050. LSM6DSO_AUX_XL_POS = 1,
  15051. LSM6DSO_AUX_XL_NEG = 2,
  15052. @@ -2952,7 +3116,8 @@ int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
  15053. int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
  15054. lsm6dso_st_xl_ois_t *val);
  15055. -typedef enum {
  15056. +typedef enum
  15057. +{
  15058. LSM6DSO_AUX_DEN_ACTIVE_LOW = 0,
  15059. LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1,
  15060. } lsm6dso_den_lh_ois_t;
  15061. @@ -2961,7 +3126,8 @@ int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
  15062. int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
  15063. lsm6dso_den_lh_ois_t *val);
  15064. -typedef enum {
  15065. +typedef enum
  15066. +{
  15067. LSM6DSO_AUX_DEN_DISABLE = 0,
  15068. LSM6DSO_AUX_DEN_LEVEL_LATCH = 3,
  15069. LSM6DSO_AUX_DEN_LEVEL_TRIG = 2,
  15070. @@ -2974,7 +3140,8 @@ int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx,
  15071. int32_t lsm6dso_aux_drdy_on_int2_set(stmdev_ctx_t *ctx, uint8_t val);
  15072. int32_t lsm6dso_aux_drdy_on_int2_get(stmdev_ctx_t *ctx, uint8_t *val);
  15073. -typedef enum {
  15074. +typedef enum
  15075. +{
  15076. LSM6DSO_AUX_DISABLE = 0,
  15077. LSM6DSO_MODE_3_GY = 1,
  15078. LSM6DSO_MODE_4_GY_XL = 3,
  15079. @@ -2984,7 +3151,8 @@ int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx,
  15080. int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx,
  15081. lsm6dso_ois_en_spi2_t *val);
  15082. -typedef enum {
  15083. +typedef enum
  15084. +{
  15085. LSM6DSO_250dps_AUX = 0,
  15086. LSM6DSO_125dps_AUX = 1,
  15087. LSM6DSO_500dps_AUX = 2,
  15088. @@ -2996,7 +3164,8 @@ int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
  15089. int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
  15090. lsm6dso_fs_g_ois_t *val);
  15091. -typedef enum {
  15092. +typedef enum
  15093. +{
  15094. LSM6DSO_AUX_SPI_4_WIRE = 0,
  15095. LSM6DSO_AUX_SPI_3_WIRE = 1,
  15096. } lsm6dso_sim_ois_t;
  15097. @@ -3005,7 +3174,8 @@ int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx,
  15098. int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx,
  15099. lsm6dso_sim_ois_t *val);
  15100. -typedef enum {
  15101. +typedef enum
  15102. +{
  15103. LSM6DSO_351Hz39 = 0,
  15104. LSM6DSO_236Hz63 = 1,
  15105. LSM6DSO_172Hz70 = 2,
  15106. @@ -3016,7 +3186,8 @@ int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  15107. int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  15108. lsm6dso_ftype_ois_t *val);
  15109. -typedef enum {
  15110. +typedef enum
  15111. +{
  15112. LSM6DSO_AUX_HP_DISABLE = 0x00,
  15113. LSM6DSO_AUX_HP_Hz016 = 0x10,
  15114. LSM6DSO_AUX_HP_Hz065 = 0x11,
  15115. @@ -3028,7 +3199,8 @@ int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
  15116. int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
  15117. lsm6dso_hpm_ois_t *val);
  15118. -typedef enum {
  15119. +typedef enum
  15120. +{
  15121. LSM6DSO_ENABLE_CLAMP = 0,
  15122. LSM6DSO_DISABLE_CLAMP = 1,
  15123. } lsm6dso_st_ois_clampdis_t;
  15124. @@ -3037,7 +3209,8 @@ int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
  15125. int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
  15126. lsm6dso_st_ois_clampdis_t *val);
  15127. -typedef enum {
  15128. +typedef enum
  15129. +{
  15130. LSM6DSO_AUX_GY_DISABLE = 0,
  15131. LSM6DSO_AUX_GY_POS = 1,
  15132. LSM6DSO_AUX_GY_NEG = 3,
  15133. @@ -3047,7 +3220,8 @@ int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
  15134. int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
  15135. lsm6dso_st_ois_t *val);
  15136. -typedef enum {
  15137. +typedef enum
  15138. +{
  15139. LSM6DSO_289Hz = 0,
  15140. LSM6DSO_258Hz = 1,
  15141. LSM6DSO_120Hz = 2,
  15142. @@ -3062,7 +3236,8 @@ int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
  15143. int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
  15144. lsm6dso_filter_xl_conf_ois_t *val);
  15145. -typedef enum {
  15146. +typedef enum
  15147. +{
  15148. LSM6DSO_AUX_2g = 0,
  15149. LSM6DSO_AUX_16g = 1,
  15150. LSM6DSO_AUX_4g = 2,
  15151. @@ -3073,7 +3248,8 @@ int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
  15152. int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
  15153. lsm6dso_fs_xl_ois_t *val);
  15154. -typedef enum {
  15155. +typedef enum
  15156. +{
  15157. LSM6DSO_PULL_UP_DISC = 0,
  15158. LSM6DSO_PULL_UP_CONNECT = 1,
  15159. } lsm6dso_sdo_pu_en_t;
  15160. @@ -3082,14 +3258,16 @@ int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
  15161. int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
  15162. lsm6dso_sdo_pu_en_t *val);
  15163. -typedef enum {
  15164. +typedef enum
  15165. +{
  15166. LSM6DSO_SPI_4_WIRE = 0,
  15167. LSM6DSO_SPI_3_WIRE = 1,
  15168. } lsm6dso_sim_t;
  15169. int32_t lsm6dso_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_t val);
  15170. int32_t lsm6dso_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_t *val);
  15171. -typedef enum {
  15172. +typedef enum
  15173. +{
  15174. LSM6DSO_I2C_ENABLE = 0,
  15175. LSM6DSO_I2C_DISABLE = 1,
  15176. } lsm6dso_i2c_disable_t;
  15177. @@ -3098,7 +3276,8 @@ int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
  15178. int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
  15179. lsm6dso_i2c_disable_t *val);
  15180. -typedef enum {
  15181. +typedef enum
  15182. +{
  15183. LSM6DSO_I3C_DISABLE = 0x80,
  15184. LSM6DSO_I3C_ENABLE_T_50us = 0x00,
  15185. LSM6DSO_I3C_ENABLE_T_2us = 0x01,
  15186. @@ -3110,7 +3289,8 @@ int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
  15187. int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
  15188. lsm6dso_i3c_disable_t *val);
  15189. -typedef enum {
  15190. +typedef enum
  15191. +{
  15192. LSM6DSO_PULL_DOWN_DISC = 0,
  15193. LSM6DSO_PULL_DOWN_CONNECT = 1,
  15194. } lsm6dso_int1_pd_en_t;
  15195. @@ -3119,14 +3299,16 @@ int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
  15196. int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
  15197. lsm6dso_int1_pd_en_t *val);
  15198. -typedef enum {
  15199. +typedef enum
  15200. +{
  15201. LSM6DSO_PUSH_PULL = 0,
  15202. LSM6DSO_OPEN_DRAIN = 1,
  15203. } lsm6dso_pp_od_t;
  15204. int32_t lsm6dso_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_pp_od_t val);
  15205. int32_t lsm6dso_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_pp_od_t *val);
  15206. -typedef enum {
  15207. +typedef enum
  15208. +{
  15209. LSM6DSO_ACTIVE_HIGH = 0,
  15210. LSM6DSO_ACTIVE_LOW = 1,
  15211. } lsm6dso_h_lactive_t;
  15212. @@ -3138,7 +3320,8 @@ int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
  15213. int32_t lsm6dso_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val);
  15214. int32_t lsm6dso_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val);
  15215. -typedef enum {
  15216. +typedef enum
  15217. +{
  15218. LSM6DSO_ALL_INT_PULSED = 0,
  15219. LSM6DSO_BASE_LATCHED_EMB_PULSED = 1,
  15220. LSM6DSO_BASE_PULSED_EMB_LATCHED = 2,
  15221. @@ -3149,7 +3332,8 @@ int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx,
  15222. int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
  15223. lsm6dso_lir_t *val);
  15224. -typedef enum {
  15225. +typedef enum
  15226. +{
  15227. LSM6DSO_LSb_FS_DIV_64 = 0,
  15228. LSM6DSO_LSb_FS_DIV_256 = 1,
  15229. } lsm6dso_wake_ths_w_t;
  15230. @@ -3172,7 +3356,8 @@ int32_t lsm6dso_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
  15231. int32_t lsm6dso_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val);
  15232. int32_t lsm6dso_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
  15233. -typedef enum {
  15234. +typedef enum
  15235. +{
  15236. LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0,
  15237. LSM6DSO_DRIVE_SLEEP_STATUS = 1,
  15238. } lsm6dso_sleep_status_on_int_t;
  15239. @@ -3181,7 +3366,8 @@ int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
  15240. int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
  15241. lsm6dso_sleep_status_on_int_t *val);
  15242. -typedef enum {
  15243. +typedef enum
  15244. +{
  15245. LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0,
  15246. LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1,
  15247. LSM6DSO_XL_12Hz5_GY_SLEEP = 2,
  15248. @@ -3213,7 +3399,8 @@ int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx,
  15249. int32_t lsm6dso_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val);
  15250. int32_t lsm6dso_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val);
  15251. -typedef enum {
  15252. +typedef enum
  15253. +{
  15254. LSM6DSO_XYZ = 0,
  15255. LSM6DSO_YXZ = 1,
  15256. LSM6DSO_XZY = 2,
  15257. @@ -3241,7 +3428,8 @@ int32_t lsm6dso_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val);
  15258. int32_t lsm6dso_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val);
  15259. int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
  15260. -typedef enum {
  15261. +typedef enum
  15262. +{
  15263. LSM6DSO_ONLY_SINGLE = 0,
  15264. LSM6DSO_BOTH_SINGLE_DOUBLE = 1,
  15265. } lsm6dso_single_double_tap_t;
  15266. @@ -3250,7 +3438,8 @@ int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
  15267. int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
  15268. lsm6dso_single_double_tap_t *val);
  15269. -typedef enum {
  15270. +typedef enum
  15271. +{
  15272. LSM6DSO_DEG_80 = 0,
  15273. LSM6DSO_DEG_70 = 1,
  15274. LSM6DSO_DEG_60 = 2,
  15275. @@ -3264,7 +3453,8 @@ int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx,
  15276. int32_t lsm6dso_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val);
  15277. int32_t lsm6dso_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
  15278. -typedef enum {
  15279. +typedef enum
  15280. +{
  15281. LSM6DSO_FF_TSH_156mg = 0,
  15282. LSM6DSO_FF_TSH_219mg = 1,
  15283. LSM6DSO_FF_TSH_250mg = 2,
  15284. @@ -3290,7 +3480,8 @@ int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx,
  15285. int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx,
  15286. uint8_t *val);
  15287. -typedef enum {
  15288. +typedef enum
  15289. +{
  15290. LSM6DSO_CMP_DISABLE = 0x00,
  15291. LSM6DSO_CMP_ALWAYS = 0x04,
  15292. LSM6DSO_CMP_8_TO_1 = 0x05,
  15293. @@ -3315,7 +3506,8 @@ int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
  15294. int32_t lsm6dso_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val);
  15295. int32_t lsm6dso_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val);
  15296. -typedef enum {
  15297. +typedef enum
  15298. +{
  15299. LSM6DSO_XL_NOT_BATCHED = 0,
  15300. LSM6DSO_XL_BATCHED_AT_12Hz5 = 1,
  15301. LSM6DSO_XL_BATCHED_AT_26Hz = 2,
  15302. @@ -3334,7 +3526,8 @@ int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx,
  15303. int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx,
  15304. lsm6dso_bdr_xl_t *val);
  15305. -typedef enum {
  15306. +typedef enum
  15307. +{
  15308. LSM6DSO_GY_NOT_BATCHED = 0,
  15309. LSM6DSO_GY_BATCHED_AT_12Hz5 = 1,
  15310. LSM6DSO_GY_BATCHED_AT_26Hz = 2,
  15311. @@ -3353,7 +3546,8 @@ int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx,
  15312. int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx,
  15313. lsm6dso_bdr_gy_t *val);
  15314. -typedef enum {
  15315. +typedef enum
  15316. +{
  15317. LSM6DSO_BYPASS_MODE = 0,
  15318. LSM6DSO_FIFO_MODE = 1,
  15319. LSM6DSO_STREAM_TO_FIFO_MODE = 3,
  15320. @@ -3366,7 +3560,8 @@ int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx,
  15321. int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx,
  15322. lsm6dso_fifo_mode_t *val);
  15323. -typedef enum {
  15324. +typedef enum
  15325. +{
  15326. LSM6DSO_TEMP_NOT_BATCHED = 0,
  15327. LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1,
  15328. LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2,
  15329. @@ -3377,7 +3572,8 @@ int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
  15330. int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
  15331. lsm6dso_odr_t_batch_t *val);
  15332. -typedef enum {
  15333. +typedef enum
  15334. +{
  15335. LSM6DSO_NO_DECIMATION = 0,
  15336. LSM6DSO_DEC_1 = 1,
  15337. LSM6DSO_DEC_8 = 2,
  15338. @@ -3388,12 +3584,14 @@ int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
  15339. int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
  15340. lsm6dso_odr_ts_batch_t *val);
  15341. -typedef enum {
  15342. +typedef enum
  15343. +{
  15344. LSM6DSO_XL_BATCH_EVENT = 0,
  15345. LSM6DSO_GYRO_BATCH_EVENT = 1,
  15346. } lsm6dso_trig_counter_bdr_t;
  15347. -typedef enum {
  15348. +typedef enum
  15349. +{
  15350. LSM6DSO_GYRO_NC_TAG = 1,
  15351. LSM6DSO_XL_NC_TAG,
  15352. LSM6DSO_TEMPERATURE_TAG,
  15353. @@ -3460,7 +3658,8 @@ int32_t lsm6dso_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val);
  15354. int32_t lsm6dso_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val);
  15355. int32_t lsm6dso_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val);
  15356. -typedef enum {
  15357. +typedef enum
  15358. +{
  15359. LSM6DSO_DEN_DISABLE = 0,
  15360. LSM6DSO_LEVEL_FIFO = 6,
  15361. LSM6DSO_LEVEL_LETCHED = 3,
  15362. @@ -3472,7 +3671,8 @@ int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx,
  15363. int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx,
  15364. lsm6dso_den_mode_t *val);
  15365. -typedef enum {
  15366. +typedef enum
  15367. +{
  15368. LSM6DSO_DEN_ACT_LOW = 0,
  15369. LSM6DSO_DEN_ACT_HIGH = 1,
  15370. } lsm6dso_den_lh_t;
  15371. @@ -3481,7 +3681,8 @@ int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx,
  15372. int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx,
  15373. lsm6dso_den_lh_t *val);
  15374. -typedef enum {
  15375. +typedef enum
  15376. +{
  15377. LSM6DSO_STAMP_IN_GY_DATA = 0,
  15378. LSM6DSO_STAMP_IN_XL_DATA = 1,
  15379. LSM6DSO_STAMP_IN_GY_XL_DATA = 2,
  15380. @@ -3500,7 +3701,8 @@ int32_t lsm6dso_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val);
  15381. int32_t lsm6dso_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val);
  15382. int32_t lsm6dso_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val);
  15383. -typedef enum {
  15384. +typedef enum
  15385. +{
  15386. LSM6DSO_PEDO_BASE_MODE = 0x00,
  15387. LSM6DSO_FALSE_STEP_REJ = 0x10,
  15388. LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x30,
  15389. @@ -3522,7 +3724,8 @@ int32_t lsm6dso_pedo_steps_period_set(stmdev_ctx_t *ctx,
  15390. int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx,
  15391. uint16_t *val);
  15392. -typedef enum {
  15393. +typedef enum
  15394. +{
  15395. LSM6DSO_EVERY_STEP = 0,
  15396. LSM6DSO_COUNT_OVERFLOW = 1,
  15397. } lsm6dso_carry_count_en_t;
  15398. @@ -3546,7 +3749,8 @@ int32_t lsm6dso_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val);
  15399. int32_t lsm6dso_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val);
  15400. int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val);
  15401. -typedef enum {
  15402. +typedef enum
  15403. +{
  15404. LSM6DSO_Z_EQ_Y = 0,
  15405. LSM6DSO_Z_EQ_MIN_Y = 1,
  15406. LSM6DSO_Z_EQ_X = 2,
  15407. @@ -3559,7 +3763,8 @@ int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
  15408. int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
  15409. lsm6dso_mag_z_axis_t *val);
  15410. -typedef enum {
  15411. +typedef enum
  15412. +{
  15413. LSM6DSO_Y_EQ_Y = 0,
  15414. LSM6DSO_Y_EQ_MIN_Y = 1,
  15415. LSM6DSO_Y_EQ_X = 2,
  15416. @@ -3572,7 +3777,8 @@ int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
  15417. int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
  15418. lsm6dso_mag_y_axis_t *val);
  15419. -typedef enum {
  15420. +typedef enum
  15421. +{
  15422. LSM6DSO_X_EQ_Y = 0,
  15423. LSM6DSO_X_EQ_MIN_Y = 1,
  15424. LSM6DSO_X_EQ_X = 2,
  15425. @@ -3588,7 +3794,8 @@ int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
  15426. int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
  15427. uint8_t *val);
  15428. -typedef struct {
  15429. +typedef struct
  15430. +{
  15431. lsm6dso_fsm_enable_a_t fsm_enable_a;
  15432. lsm6dso_fsm_enable_b_t fsm_enable_b;
  15433. } lsm6dso_emb_fsm_enable_t;
  15434. @@ -3600,7 +3807,8 @@ int32_t lsm6dso_fsm_enable_get(stmdev_ctx_t *ctx,
  15435. int32_t lsm6dso_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val);
  15436. int32_t lsm6dso_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val);
  15437. -typedef enum {
  15438. +typedef enum
  15439. +{
  15440. LSM6DSO_LC_NORMAL = 0,
  15441. LSM6DSO_LC_CLEAR = 1,
  15442. LSM6DSO_LC_CLEAR_DONE = 2,
  15443. @@ -3610,7 +3818,8 @@ int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx,
  15444. int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
  15445. lsm6dso_fsm_lc_clr_t *val);
  15446. -typedef struct {
  15447. +typedef struct
  15448. +{
  15449. lsm6dso_fsm_outs1_t fsm_outs1;
  15450. lsm6dso_fsm_outs2_t fsm_outs2;
  15451. lsm6dso_fsm_outs3_t fsm_outs3;
  15452. @@ -3631,7 +3840,8 @@ typedef struct {
  15453. int32_t lsm6dso_fsm_out_get(stmdev_ctx_t *ctx,
  15454. lsm6dso_fsm_out_t *val);
  15455. -typedef enum {
  15456. +typedef enum
  15457. +{
  15458. LSM6DSO_ODR_FSM_12Hz5 = 0,
  15459. LSM6DSO_ODR_FSM_26Hz = 1,
  15460. LSM6DSO_ODR_FSM_52Hz = 2,
  15461. @@ -3663,7 +3873,8 @@ int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
  15462. int32_t lsm6dso_sh_read_data_raw_get(stmdev_ctx_t *ctx, uint8_t *val,
  15463. uint8_t len);
  15464. -typedef enum {
  15465. +typedef enum
  15466. +{
  15467. LSM6DSO_SLV_0 = 0,
  15468. LSM6DSO_SLV_0_1 = 1,
  15469. LSM6DSO_SLV_0_1_2 = 2,
  15470. @@ -3677,7 +3888,8 @@ int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
  15471. int32_t lsm6dso_sh_master_set(stmdev_ctx_t *ctx, uint8_t val);
  15472. int32_t lsm6dso_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val);
  15473. -typedef enum {
  15474. +typedef enum
  15475. +{
  15476. LSM6DSO_EXT_PULL_UP = 0,
  15477. LSM6DSO_INTERNAL_PULL_UP = 1,
  15478. } lsm6dso_shub_pu_en_t;
  15479. @@ -3689,7 +3901,8 @@ int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx,
  15480. int32_t lsm6dso_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val);
  15481. int32_t lsm6dso_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val);
  15482. -typedef enum {
  15483. +typedef enum
  15484. +{
  15485. LSM6DSO_EXT_ON_INT2_PIN = 1,
  15486. LSM6DSO_XL_GY_DRDY = 0,
  15487. } lsm6dso_start_config_t;
  15488. @@ -3698,7 +3911,8 @@ int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
  15489. int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
  15490. lsm6dso_start_config_t *val);
  15491. -typedef enum {
  15492. +typedef enum
  15493. +{
  15494. LSM6DSO_EACH_SH_CYCLE = 0,
  15495. LSM6DSO_ONLY_FIRST_CYCLE = 1,
  15496. } lsm6dso_write_once_t;
  15497. @@ -3710,7 +3924,8 @@ int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
  15498. int32_t lsm6dso_sh_reset_set(stmdev_ctx_t *ctx);
  15499. int32_t lsm6dso_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
  15500. -typedef enum {
  15501. +typedef enum
  15502. +{
  15503. LSM6DSO_SH_ODR_104Hz = 0,
  15504. LSM6DSO_SH_ODR_52Hz = 1,
  15505. LSM6DSO_SH_ODR_26Hz = 2,
  15506. @@ -3721,7 +3936,8 @@ int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx,
  15507. int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx,
  15508. lsm6dso_shub_odr_t *val);
  15509. -typedef struct {
  15510. +typedef struct
  15511. +{
  15512. uint8_t slv0_add;
  15513. uint8_t slv0_subadd;
  15514. uint8_t slv0_data;
  15515. @@ -3729,7 +3945,8 @@ typedef struct {
  15516. int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx,
  15517. lsm6dso_sh_cfg_write_t *val);
  15518. -typedef struct {
  15519. +typedef struct
  15520. +{
  15521. uint8_t slv_add;
  15522. uint8_t slv_subadd;
  15523. uint8_t slv_len;
  15524. @@ -3747,35 +3964,44 @@ int32_t lsm6dso_sh_status_get(stmdev_ctx_t *ctx,
  15525. lsm6dso_status_master_t *val);
  15526. -typedef struct {
  15527. +typedef struct
  15528. +{
  15529. uint8_t ui;
  15530. uint8_t aux;
  15531. } lsm6dso_id_t;
  15532. int32_t lsm6dso_id_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15533. lsm6dso_id_t *val);
  15534. -typedef struct {
  15535. - enum {
  15536. - LSM6DSO_SEL_BY_HW = 0x00, /* bus mode select by HW (SPI 3W disable) */
  15537. - LSM6DSO_SPI_4W = 0x06, /* Only SPI: SDO / SDI separated pins */
  15538. - LSM6DSO_SPI_3W = 0x07, /* Only SPI: SDO / SDI share the same pin */
  15539. - LSM6DSO_I2C = 0x04, /* Only I2C */
  15540. - LSM6DSO_I3C_T_50us = 0x02, /* I3C: available time equal to 50 μs */
  15541. - LSM6DSO_I3C_T_2us = 0x12, /* I3C: available time equal to 2 μs */
  15542. - LSM6DSO_I3C_T_1ms = 0x22, /* I3C: available time equal to 1 ms */
  15543. - LSM6DSO_I3C_T_25ms = 0x32, /* I3C: available time equal to 25 ms */
  15544. - } ui_bus_md;
  15545. - enum {
  15546. - LSM6DSO_SPI_4W_AUX = 0x00,
  15547. - LSM6DSO_SPI_3W_AUX = 0x01,
  15548. - } aux_bus_md;
  15549. +typedef enum
  15550. +{
  15551. + LSM6DSO_SEL_BY_HW = 0x00, /* bus mode select by HW (SPI 3W disable) */
  15552. + LSM6DSO_SPI_4W = 0x06, /* Only SPI: SDO / SDI separated pins */
  15553. + LSM6DSO_SPI_3W = 0x07, /* Only SPI: SDO / SDI share the same pin */
  15554. + LSM6DSO_I2C = 0x04, /* Only I2C */
  15555. + LSM6DSO_I3C_T_50us = 0x02, /* I3C: available time equal to 50 us */
  15556. + LSM6DSO_I3C_T_2us = 0x12, /* I3C: available time equal to 2 us */
  15557. + LSM6DSO_I3C_T_1ms = 0x22, /* I3C: available time equal to 1 ms */
  15558. + LSM6DSO_I3C_T_25ms = 0x32, /* I3C: available time equal to 25 ms */
  15559. +} lsm6dso_ui_bus_md_t;
  15560. +
  15561. +typedef enum
  15562. +{
  15563. + LSM6DSO_SPI_4W_AUX = 0x00,
  15564. + LSM6DSO_SPI_3W_AUX = 0x01,
  15565. +} lsm6dso_aux_bus_md_t;
  15566. +
  15567. +typedef struct
  15568. +{
  15569. + lsm6dso_ui_bus_md_t ui_bus_md;
  15570. + lsm6dso_aux_bus_md_t aux_bus_md;
  15571. } lsm6dso_bus_mode_t;
  15572. int32_t lsm6dso_bus_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15573. lsm6dso_bus_mode_t val);
  15574. int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15575. lsm6dso_bus_mode_t *val);
  15576. -typedef enum {
  15577. +typedef enum
  15578. +{
  15579. LSM6DSO_DRV_RDY = 0x00, /* Initialize the device for driver usage */
  15580. LSM6DSO_BOOT = 0x01, /* Restore calib. param. ( it takes 10ms ) */
  15581. LSM6DSO_RESET = 0x02, /* Reset configuration registers */
  15582. @@ -3787,7 +4013,8 @@ typedef enum {
  15583. } lsm6dso_init_t;
  15584. int32_t lsm6dso_init_set(stmdev_ctx_t *ctx, lsm6dso_init_t val);
  15585. -typedef struct {
  15586. +typedef struct
  15587. +{
  15588. uint8_t sw_reset :
  15589. 1; /* Restoring configuration registers */
  15590. uint8_t boot : 1; /* Restoring calibration parameters */
  15591. @@ -3802,7 +4029,8 @@ uint8_t ois_gyro_settling :
  15592. int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15593. lsm6dso_status_t *val);
  15594. -typedef struct {
  15595. +typedef struct
  15596. +{
  15597. uint8_t sdo_sa0_pull_up : 1; /* 1 = pull-up on SDO/SA0 pin */
  15598. uint8_t aux_sdo_ocs_pull_up :
  15599. 1; /* 1 = pull-up on OCS_Aux/SDO_Aux pins */
  15600. @@ -3815,7 +4043,8 @@ int32_t lsm6dso_pin_conf_set(stmdev_ctx_t *ctx,
  15601. int32_t lsm6dso_pin_conf_get(stmdev_ctx_t *ctx,
  15602. lsm6dso_pin_conf_t *val);
  15603. -typedef struct {
  15604. +typedef struct
  15605. +{
  15606. uint8_t active_low : 1; /* 1 = active low / 0 = active high */
  15607. uint8_t base_latched :
  15608. 1; /* base functions are: FF, WU, 6D, Tap, Act/Inac */
  15609. @@ -3827,7 +4056,8 @@ int32_t lsm6dso_interrupt_mode_set(stmdev_ctx_t *ctx,
  15610. int32_t lsm6dso_interrupt_mode_get(stmdev_ctx_t *ctx,
  15611. lsm6dso_int_mode_t *val);
  15612. -typedef struct {
  15613. +typedef struct
  15614. +{
  15615. uint8_t drdy_xl : 1; /* Accelerometer data ready */
  15616. uint8_t drdy_g : 1; /* Gyroscope data ready */
  15617. uint8_t drdy_temp :
  15618. @@ -3885,7 +4115,8 @@ int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  15619. int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
  15620. lsm6dso_pin_int1_route_t *val);
  15621. -typedef struct {
  15622. +typedef struct
  15623. +{
  15624. uint8_t drdy_ois : 1; /* OIS chain data ready */
  15625. uint8_t drdy_xl : 1; /* Accelerometer data ready */
  15626. uint8_t drdy_g : 1; /* Gyroscope data ready */
  15627. @@ -3940,7 +4171,8 @@ int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
  15628. stmdev_ctx_t *aux_ctx,
  15629. lsm6dso_pin_int2_route_t *val);
  15630. -typedef struct {
  15631. +typedef struct
  15632. +{
  15633. uint8_t drdy_xl : 1; /* Accelerometer data ready */
  15634. uint8_t drdy_g : 1; /* Gyroscope data ready */
  15635. uint8_t drdy_temp : 1; /* Temperature data ready */
  15636. @@ -4030,146 +4262,196 @@ uint8_t fifo_bdr :
  15637. int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  15638. lsm6dso_all_sources_t *val);
  15639. -typedef struct {
  15640. +typedef struct
  15641. +{
  15642. uint8_t odr_fine_tune;
  15643. } dev_cal_t;
  15644. int32_t lsm6dso_calibration_get(stmdev_ctx_t *ctx, dev_cal_t *val);
  15645. -typedef struct {
  15646. - struct {
  15647. - struct {
  15648. - enum {
  15649. - LSM6DSO_XL_UI_OFF = 0x00, /* in power down */
  15650. - LSM6DSO_XL_UI_1Hz6_LP = 0x1B, /* @1Hz6 (low power) */
  15651. - LSM6DSO_XL_UI_1Hz6_ULP = 0x2B, /* @1Hz6 (ultra low/Gy, OIS imu off) */
  15652. - LSM6DSO_XL_UI_12Hz5_HP = 0x01, /* @12Hz5 (high performance) */
  15653. - LSM6DSO_XL_UI_12Hz5_LP = 0x11, /* @12Hz5 (low power) */
  15654. - LSM6DSO_XL_UI_12Hz5_ULP = 0x21, /* @12Hz5 (ultra low/Gy, OIS imu off) */
  15655. - LSM6DSO_XL_UI_26Hz_HP = 0x02, /* @26Hz (high performance) */
  15656. - LSM6DSO_XL_UI_26Hz_LP = 0x12, /* @26Hz (low power) */
  15657. - LSM6DSO_XL_UI_26Hz_ULP = 0x22, /* @26Hz (ultra low/Gy, OIS imu off) */
  15658. - LSM6DSO_XL_UI_52Hz_HP = 0x03, /* @52Hz (high performance) */
  15659. - LSM6DSO_XL_UI_52Hz_LP = 0x13, /* @52Hz (low power) */
  15660. - LSM6DSO_XL_UI_52Hz_ULP = 0x23, /* @52Hz (ultra low/Gy, OIS imu off) */
  15661. - LSM6DSO_XL_UI_104Hz_HP = 0x04, /* @104Hz (high performance) */
  15662. - LSM6DSO_XL_UI_104Hz_NM = 0x14, /* @104Hz (normal mode) */
  15663. - LSM6DSO_XL_UI_104Hz_ULP = 0x24, /* @104Hz (ultra low/Gy, OIS imu off) */
  15664. - LSM6DSO_XL_UI_208Hz_HP = 0x05, /* @208Hz (high performance) */
  15665. - LSM6DSO_XL_UI_208Hz_NM = 0x15, /* @208Hz (normal mode) */
  15666. - LSM6DSO_XL_UI_208Hz_ULP = 0x25, /* @208Hz (ultra low/Gy, OIS imu off) */
  15667. - LSM6DSO_XL_UI_416Hz_HP = 0x06, /* @416Hz (high performance) */
  15668. - LSM6DSO_XL_UI_833Hz_HP = 0x07, /* @833Hz (high performance) */
  15669. - LSM6DSO_XL_UI_1667Hz_HP = 0x08, /* @1kHz66 (high performance) */
  15670. - LSM6DSO_XL_UI_3333Hz_HP = 0x09, /* @3kHz33 (high performance) */
  15671. - LSM6DSO_XL_UI_6667Hz_HP = 0x0A, /* @6kHz66 (high performance) */
  15672. - } odr;
  15673. - enum {
  15674. - LSM6DSO_XL_UI_2g = 0,
  15675. - LSM6DSO_XL_UI_4g = 2,
  15676. - LSM6DSO_XL_UI_8g = 3,
  15677. - LSM6DSO_XL_UI_16g = 1, /* OIS full scale is also forced to be 16g */
  15678. - } fs;
  15679. +typedef enum
  15680. +{
  15681. + LSM6DSO_XL_UI_OFF = 0x00, /* in power down */
  15682. + LSM6DSO_XL_UI_1Hz6_LP = 0x1B, /* @1Hz6 (low power) */
  15683. + LSM6DSO_XL_UI_1Hz6_ULP = 0x2B, /* @1Hz6 (ultra low/Gy, OIS imu off) */
  15684. + LSM6DSO_XL_UI_12Hz5_HP = 0x01, /* @12Hz5 (high performance) */
  15685. + LSM6DSO_XL_UI_12Hz5_LP = 0x11, /* @12Hz5 (low power) */
  15686. + LSM6DSO_XL_UI_12Hz5_ULP = 0x21, /* @12Hz5 (ultra low/Gy, OIS imu off) */
  15687. + LSM6DSO_XL_UI_26Hz_HP = 0x02, /* @26Hz (high performance) */
  15688. + LSM6DSO_XL_UI_26Hz_LP = 0x12, /* @26Hz (low power) */
  15689. + LSM6DSO_XL_UI_26Hz_ULP = 0x22, /* @26Hz (ultra low/Gy, OIS imu off) */
  15690. + LSM6DSO_XL_UI_52Hz_HP = 0x03, /* @52Hz (high performance) */
  15691. + LSM6DSO_XL_UI_52Hz_LP = 0x13, /* @52Hz (low power) */
  15692. + LSM6DSO_XL_UI_52Hz_ULP = 0x23, /* @52Hz (ultra low/Gy, OIS imu off) */
  15693. + LSM6DSO_XL_UI_104Hz_HP = 0x04, /* @104Hz (high performance) */
  15694. + LSM6DSO_XL_UI_104Hz_NM = 0x14, /* @104Hz (normal mode) */
  15695. + LSM6DSO_XL_UI_104Hz_ULP = 0x24, /* @104Hz (ultra low/Gy, OIS imu off) */
  15696. + LSM6DSO_XL_UI_208Hz_HP = 0x05, /* @208Hz (high performance) */
  15697. + LSM6DSO_XL_UI_208Hz_NM = 0x15, /* @208Hz (normal mode) */
  15698. + LSM6DSO_XL_UI_208Hz_ULP = 0x25, /* @208Hz (ultra low/Gy, OIS imu off) */
  15699. + LSM6DSO_XL_UI_416Hz_HP = 0x06, /* @416Hz (high performance) */
  15700. + LSM6DSO_XL_UI_833Hz_HP = 0x07, /* @833Hz (high performance) */
  15701. + LSM6DSO_XL_UI_1667Hz_HP = 0x08, /* @1kHz66 (high performance) */
  15702. + LSM6DSO_XL_UI_3333Hz_HP = 0x09, /* @3kHz33 (high performance) */
  15703. + LSM6DSO_XL_UI_6667Hz_HP = 0x0A, /* @6kHz66 (high performance) */
  15704. +} lsm6dso_odr_xl_ui_t;
  15705. +
  15706. +typedef enum
  15707. +{
  15708. + LSM6DSO_XL_UI_2g = 0,
  15709. + LSM6DSO_XL_UI_4g = 2,
  15710. + LSM6DSO_XL_UI_8g = 3,
  15711. + LSM6DSO_XL_UI_16g = 1, /* OIS full scale is also forced to be 16g */
  15712. +} lsm6dso_fs_xl_ui_t;
  15713. +
  15714. +typedef enum
  15715. +{
  15716. + LSM6DSO_GY_UI_OFF = 0x00, /* gy in power down */
  15717. + LSM6DSO_GY_UI_12Hz5_LP = 0x11, /* gy @12Hz5 (low power) */
  15718. + LSM6DSO_GY_UI_12Hz5_HP = 0x01, /* gy @12Hz5 (high performance) */
  15719. + LSM6DSO_GY_UI_26Hz_LP = 0x12, /* gy @26Hz (low power) */
  15720. + LSM6DSO_GY_UI_26Hz_HP = 0x02, /* gy @26Hz (high performance) */
  15721. + LSM6DSO_GY_UI_52Hz_LP = 0x13, /* gy @52Hz (low power) */
  15722. + LSM6DSO_GY_UI_52Hz_HP = 0x03, /* gy @52Hz (high performance) */
  15723. + LSM6DSO_GY_UI_104Hz_NM = 0x14, /* gy @104Hz (low power) */
  15724. + LSM6DSO_GY_UI_104Hz_HP = 0x04, /* gy @104Hz (high performance) */
  15725. + LSM6DSO_GY_UI_208Hz_NM = 0x15, /* gy @208Hz (low power) */
  15726. + LSM6DSO_GY_UI_208Hz_HP = 0x05, /* gy @208Hz (high performance) */
  15727. + LSM6DSO_GY_UI_416Hz_HP = 0x06, /* gy @416Hz (high performance) */
  15728. + LSM6DSO_GY_UI_833Hz_HP = 0x07, /* gy @833Hz (high performance) */
  15729. + LSM6DSO_GY_UI_1667Hz_HP = 0x08, /* gy @1kHz66 (high performance) */
  15730. + LSM6DSO_GY_UI_3333Hz_HP = 0x09, /* gy @3kHz33 (high performance) */
  15731. + LSM6DSO_GY_UI_6667Hz_HP = 0x0A, /* gy @6kHz66 (high performance) */
  15732. +} lsm6dso_odr_g_ui_t;
  15733. +
  15734. +typedef enum
  15735. +{
  15736. + LSM6DSO_GY_UI_250dps = 0,
  15737. + LSM6DSO_GY_UI_125dps = 1,
  15738. + LSM6DSO_GY_UI_500dps = 2,
  15739. + LSM6DSO_GY_UI_1000dps = 4,
  15740. + LSM6DSO_GY_UI_2000dps = 6,
  15741. +} lsm6dso_fs_g_ui_t;
  15742. +
  15743. +typedef enum
  15744. +{
  15745. + LSM6DSO_OIS_ONLY_AUX = 0x00, /* Auxiliary SPI full control */
  15746. + LSM6DSO_OIS_MIXED = 0x01, /* Enabling by UI / read-config by AUX */
  15747. +} lsm6dso_ctrl_md_t;
  15748. +
  15749. +typedef enum
  15750. +{
  15751. + LSM6DSO_XL_OIS_OFF = 0x00, /* in power down */
  15752. + LSM6DSO_XL_OIS_6667Hz_HP = 0x01, /* @6kHz OIS imu active/NO ULP on UI */
  15753. +} lsm6dso_odr_xl_ois_noaux_t;
  15754. +
  15755. +typedef enum
  15756. +{
  15757. + LSM6DSO_XL_OIS_2g = 0,
  15758. + LSM6DSO_XL_OIS_4g = 2,
  15759. + LSM6DSO_XL_OIS_8g = 3,
  15760. + LSM6DSO_XL_OIS_16g = 1, /* UI full scale is also forced to be 16g */
  15761. +} lsm6dso_fs_xl_ois_noaux_t;
  15762. +
  15763. +typedef enum
  15764. +{
  15765. + LSM6DSO_GY_OIS_OFF = 0x00, /* in power down */
  15766. + LSM6DSO_GY_OIS_6667Hz_HP = 0x01, /* @6kHz No Ultra Low Power*/
  15767. +} lsm6dso_odr_g_ois_noaux_t;
  15768. +
  15769. +typedef enum
  15770. +{
  15771. + LSM6DSO_GY_OIS_250dps = 0,
  15772. + LSM6DSO_GY_OIS_125dps = 1,
  15773. + LSM6DSO_GY_OIS_500dps = 2,
  15774. + LSM6DSO_GY_OIS_1000dps = 4,
  15775. + LSM6DSO_GY_OIS_2000dps = 6,
  15776. +} lsm6dso_fs_g_ois_noaux_t;
  15777. +
  15778. +typedef enum
  15779. +{
  15780. + LSM6DSO_FSM_DISABLE = 0x00,
  15781. + LSM6DSO_FSM_XL = 0x01,
  15782. + LSM6DSO_FSM_GY = 0x02,
  15783. + LSM6DSO_FSM_XL_GY = 0x03,
  15784. +} lsm6dso_sens_fsm_t;
  15785. +
  15786. +typedef enum
  15787. +{
  15788. + LSM6DSO_FSM_12Hz5 = 0x00,
  15789. + LSM6DSO_FSM_26Hz = 0x01,
  15790. + LSM6DSO_FSM_52Hz = 0x02,
  15791. + LSM6DSO_FSM_104Hz = 0x03,
  15792. +} lsm6dso_odr_fsm_t;
  15793. +
  15794. +typedef struct
  15795. +{
  15796. + struct
  15797. + {
  15798. + struct
  15799. + {
  15800. + lsm6dso_odr_xl_ui_t odr;
  15801. + lsm6dso_fs_xl_ui_t fs;
  15802. } xl;
  15803. - struct {
  15804. - enum {
  15805. - LSM6DSO_GY_UI_OFF = 0x00, /* gy in power down */
  15806. - LSM6DSO_GY_UI_12Hz5_LP = 0x11, /* gy @12Hz5 (low power) */
  15807. - LSM6DSO_GY_UI_12Hz5_HP = 0x01, /* gy @12Hz5 (high performance) */
  15808. - LSM6DSO_GY_UI_26Hz_LP = 0x12, /* gy @26Hz (low power) */
  15809. - LSM6DSO_GY_UI_26Hz_HP = 0x02, /* gy @26Hz (high performance) */
  15810. - LSM6DSO_GY_UI_52Hz_LP = 0x13, /* gy @52Hz (low power) */
  15811. - LSM6DSO_GY_UI_52Hz_HP = 0x03, /* gy @52Hz (high performance) */
  15812. - LSM6DSO_GY_UI_104Hz_NM = 0x14, /* gy @104Hz (low power) */
  15813. - LSM6DSO_GY_UI_104Hz_HP = 0x04, /* gy @104Hz (high performance) */
  15814. - LSM6DSO_GY_UI_208Hz_NM = 0x15, /* gy @208Hz (low power) */
  15815. - LSM6DSO_GY_UI_208Hz_HP = 0x05, /* gy @208Hz (high performance) */
  15816. - LSM6DSO_GY_UI_416Hz_HP = 0x06, /* gy @416Hz (high performance) */
  15817. - LSM6DSO_GY_UI_833Hz_HP = 0x07, /* gy @833Hz (high performance) */
  15818. - LSM6DSO_GY_UI_1667Hz_HP = 0x08, /* gy @1kHz66 (high performance) */
  15819. - LSM6DSO_GY_UI_3333Hz_HP = 0x09, /* gy @3kHz33 (high performance) */
  15820. - LSM6DSO_GY_UI_6667Hz_HP = 0x0A, /* gy @6kHz66 (high performance) */
  15821. - } odr;
  15822. - enum {
  15823. - LSM6DSO_GY_UI_250dps = 0,
  15824. - LSM6DSO_GY_UI_125dps = 1,
  15825. - LSM6DSO_GY_UI_500dps = 2,
  15826. - LSM6DSO_GY_UI_1000dps = 4,
  15827. - LSM6DSO_GY_UI_2000dps = 6,
  15828. - } fs;
  15829. + struct
  15830. + {
  15831. + lsm6dso_odr_g_ui_t odr;
  15832. + lsm6dso_fs_g_ui_t fs;
  15833. } gy;
  15834. } ui;
  15835. - struct {
  15836. - enum {
  15837. - LSM6DSO_OIS_ONLY_AUX = 0x00, /* Auxiliary SPI full control */
  15838. - LSM6DSO_OIS_MIXED = 0x01, /* Enabling by UI / read-config by AUX */
  15839. - } ctrl_md;
  15840. - struct {
  15841. - enum {
  15842. - LSM6DSO_XL_OIS_OFF = 0x00, /* in power down */
  15843. - LSM6DSO_XL_OIS_6667Hz_HP = 0x01, /* @6kHz OIS imu active/NO ULP on UI */
  15844. - } odr;
  15845. - enum {
  15846. - LSM6DSO_XL_OIS_2g = 0,
  15847. - LSM6DSO_XL_OIS_4g = 2,
  15848. - LSM6DSO_XL_OIS_8g = 3,
  15849. - LSM6DSO_XL_OIS_16g = 1, /* UI full scale is also forced to be 16g */
  15850. - } fs;
  15851. + struct
  15852. + {
  15853. + lsm6dso_ctrl_md_t ctrl_md;
  15854. + struct
  15855. + {
  15856. + lsm6dso_odr_xl_ois_noaux_t odr;
  15857. + lsm6dso_fs_xl_ois_noaux_t fs;
  15858. } xl;
  15859. - struct {
  15860. - enum {
  15861. - LSM6DSO_GY_OIS_OFF = 0x00, /* in power down */
  15862. - LSM6DSO_GY_OIS_6667Hz_HP = 0x01, /* @6kHz No Ultra Low Power*/
  15863. - } odr;
  15864. - enum {
  15865. - LSM6DSO_GY_OIS_250dps = 0,
  15866. - LSM6DSO_GY_OIS_125dps = 1,
  15867. - LSM6DSO_GY_OIS_500dps = 2,
  15868. - LSM6DSO_GY_OIS_1000dps = 4,
  15869. - LSM6DSO_GY_OIS_2000dps = 6,
  15870. - } fs;
  15871. + struct
  15872. + {
  15873. + lsm6dso_odr_g_ois_noaux_t odr;
  15874. + lsm6dso_fs_g_ois_noaux_t fs;
  15875. } gy;
  15876. } ois;
  15877. - struct {
  15878. - enum {
  15879. - LSM6DSO_FSM_DISABLE = 0x00,
  15880. - LSM6DSO_FSM_XL = 0x01,
  15881. - LSM6DSO_FSM_GY = 0x02,
  15882. - LSM6DSO_FSM_XL_GY = 0x03,
  15883. - } sens;
  15884. - enum {
  15885. - LSM6DSO_FSM_12Hz5 = 0x00,
  15886. - LSM6DSO_FSM_26Hz = 0x01,
  15887. - LSM6DSO_FSM_52Hz = 0x02,
  15888. - LSM6DSO_FSM_104Hz = 0x03,
  15889. - } odr;
  15890. + struct
  15891. + {
  15892. + lsm6dso_sens_fsm_t sens;
  15893. + lsm6dso_odr_fsm_t odr;
  15894. } fsm;
  15895. } lsm6dso_md_t;
  15896. int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15897. lsm6dso_md_t *val);
  15898. int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15899. lsm6dso_md_t *val);
  15900. -typedef struct {
  15901. - struct {
  15902. - struct {
  15903. - float mg[3];
  15904. +typedef struct
  15905. +{
  15906. + struct
  15907. + {
  15908. + struct
  15909. + {
  15910. + float_t mg[3];
  15911. int16_t raw[3];
  15912. } xl;
  15913. - struct {
  15914. - float mdps[3];
  15915. + struct
  15916. + {
  15917. + float_t mdps[3];
  15918. int16_t raw[3];
  15919. } gy;
  15920. - struct {
  15921. - float deg_c;
  15922. + struct
  15923. + {
  15924. + float_t deg_c;
  15925. int16_t raw;
  15926. } heat;
  15927. } ui;
  15928. - struct {
  15929. - struct {
  15930. - float mg[3];
  15931. + struct
  15932. + {
  15933. + struct
  15934. + {
  15935. + float_t mg[3];
  15936. int16_t raw[3];
  15937. } xl;
  15938. - struct {
  15939. - float mdps[3];
  15940. + struct
  15941. + {
  15942. + float_t mdps[3];
  15943. int16_t raw[3];
  15944. } gy;
  15945. } ois;
  15946. @@ -4177,7 +4459,8 @@ typedef struct {
  15947. int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
  15948. lsm6dso_md_t *md, lsm6dso_data_t *data);
  15949. -typedef struct {
  15950. +typedef struct
  15951. +{
  15952. uint8_t sig_mot : 1; /* significant motion */
  15953. uint8_t tilt : 1; /* tilt detection */
  15954. uint8_t step : 1; /* step counter/detector */
  15955. @@ -4201,5 +4484,3 @@ int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx);
  15956. #endif
  15957. #endif /*LSM6DSO_DRIVER_H */
  15958. -
  15959. -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/