i2s.h 5.1 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Instance description for I2S
  5. *
  6. * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
  7. *
  8. * \asf_license_start
  9. *
  10. * \page License
  11. *
  12. * Redistribution and use in source and binary forms, with or without
  13. * modification, are permitted provided that the following conditions are met:
  14. *
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. *
  18. * 2. Redistributions in binary form must reproduce the above copyright notice,
  19. * this list of conditions and the following disclaimer in the documentation
  20. * and/or other materials provided with the distribution.
  21. *
  22. * 3. The name of Atmel may not be used to endorse or promote products derived
  23. * from this software without specific prior written permission.
  24. *
  25. * 4. This software may only be redistributed and used in connection with an
  26. * Atmel microcontroller product.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
  29. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  30. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
  31. * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
  32. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. *
  40. * \asf_license_stop
  41. *
  42. */
  43. /*
  44. * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
  45. */
  46. #ifndef _SAMD21_I2S_INSTANCE_
  47. #define _SAMD21_I2S_INSTANCE_
  48. /* ========== Register definition for I2S peripheral ========== */
  49. #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  50. #define REG_I2S_CTRLA (0x42005000U) /**< \brief (I2S) Control A */
  51. #define REG_I2S_CLKCTRL0 (0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
  52. #define REG_I2S_CLKCTRL1 (0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
  53. #define REG_I2S_INTENCLR (0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
  54. #define REG_I2S_INTENSET (0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
  55. #define REG_I2S_INTFLAG (0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
  56. #define REG_I2S_SYNCBUSY (0x42005018U) /**< \brief (I2S) Synchronization Status */
  57. #define REG_I2S_SERCTRL0 (0x42005020U) /**< \brief (I2S) Serializer 0 Control */
  58. #define REG_I2S_SERCTRL1 (0x42005024U) /**< \brief (I2S) Serializer 1 Control */
  59. #define REG_I2S_DATA0 (0x42005030U) /**< \brief (I2S) Data 0 */
  60. #define REG_I2S_DATA1 (0x42005034U) /**< \brief (I2S) Data 1 */
  61. #else
  62. #define REG_I2S_CTRLA (*(RwReg8 *)0x42005000U) /**< \brief (I2S) Control A */
  63. #define REG_I2S_CLKCTRL0 (*(RwReg *)0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
  64. #define REG_I2S_CLKCTRL1 (*(RwReg *)0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
  65. #define REG_I2S_INTENCLR (*(RwReg16*)0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
  66. #define REG_I2S_INTENSET (*(RwReg16*)0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
  67. #define REG_I2S_INTFLAG (*(RwReg16*)0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
  68. #define REG_I2S_SYNCBUSY (*(RoReg16*)0x42005018U) /**< \brief (I2S) Synchronization Status */
  69. #define REG_I2S_SERCTRL0 (*(RwReg *)0x42005020U) /**< \brief (I2S) Serializer 0 Control */
  70. #define REG_I2S_SERCTRL1 (*(RwReg *)0x42005024U) /**< \brief (I2S) Serializer 1 Control */
  71. #define REG_I2S_DATA0 (*(RwReg *)0x42005030U) /**< \brief (I2S) Data 0 */
  72. #define REG_I2S_DATA1 (*(RwReg *)0x42005034U) /**< \brief (I2S) Data 1 */
  73. #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  74. /* ========== Instance parameters for I2S peripheral ========== */
  75. #define I2S_CLK_NUM 2 // Number of clock units
  76. #define I2S_DMAC_ID_RX_0 41
  77. #define I2S_DMAC_ID_RX_1 42
  78. #define I2S_DMAC_ID_RX_LSB 41
  79. #define I2S_DMAC_ID_RX_MSB 42
  80. #define I2S_DMAC_ID_RX_SIZE 2
  81. #define I2S_DMAC_ID_TX_0 43
  82. #define I2S_DMAC_ID_TX_1 44
  83. #define I2S_DMAC_ID_TX_LSB 43
  84. #define I2S_DMAC_ID_TX_MSB 44
  85. #define I2S_DMAC_ID_TX_SIZE 2
  86. #define I2S_GCLK_ID_0 35
  87. #define I2S_GCLK_ID_1 36
  88. #define I2S_GCLK_ID_LSB 35
  89. #define I2S_GCLK_ID_MSB 36
  90. #define I2S_GCLK_ID_SIZE 2
  91. #define I2S_MAX_SLOTS 8 // Max number of data slots in frame
  92. #define I2S_SER_NUM 2 // Number of serializers
  93. #endif /* _SAMD21_I2S_INSTANCE_ */