ac.h 39 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Component description for AC
  5. *
  6. * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
  7. *
  8. * \asf_license_start
  9. *
  10. * \page License
  11. *
  12. * Redistribution and use in source and binary forms, with or without
  13. * modification, are permitted provided that the following conditions are met:
  14. *
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. *
  18. * 2. Redistributions in binary form must reproduce the above copyright notice,
  19. * this list of conditions and the following disclaimer in the documentation
  20. * and/or other materials provided with the distribution.
  21. *
  22. * 3. The name of Atmel may not be used to endorse or promote products derived
  23. * from this software without specific prior written permission.
  24. *
  25. * 4. This software may only be redistributed and used in connection with an
  26. * Atmel microcontroller product.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
  29. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  30. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
  31. * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
  32. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. *
  40. * \asf_license_stop
  41. *
  42. */
  43. /*
  44. * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
  45. */
  46. #ifndef _SAMD21_AC_COMPONENT_
  47. #define _SAMD21_AC_COMPONENT_
  48. /* ========================================================================== */
  49. /** SOFTWARE API DEFINITION FOR AC */
  50. /* ========================================================================== */
  51. /** \addtogroup SAMD21_AC Analog Comparators */
  52. /*@{*/
  53. #define AC_U2205
  54. #define REV_AC 0x112
  55. /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */
  56. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  57. typedef union {
  58. struct {
  59. uint8_t SWRST:1; /*!< bit: 0 Software Reset */
  60. uint8_t ENABLE:1; /*!< bit: 1 Enable */
  61. uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */
  62. uint8_t :4; /*!< bit: 3.. 6 Reserved */
  63. uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */
  64. } bit; /*!< Structure used for bit access */
  65. uint8_t reg; /*!< Type used for register access */
  66. } AC_CTRLA_Type;
  67. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  68. #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */
  69. #define AC_CTRLA_RESETVALUE 0x00ul /**< \brief (AC_CTRLA reset_value) Control A */
  70. #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */
  71. #define AC_CTRLA_SWRST (0x1ul << AC_CTRLA_SWRST_Pos)
  72. #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */
  73. #define AC_CTRLA_ENABLE (0x1ul << AC_CTRLA_ENABLE_Pos)
  74. #define AC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (AC_CTRLA) Run in Standby */
  75. #define AC_CTRLA_RUNSTDBY_Msk (0x1ul << AC_CTRLA_RUNSTDBY_Pos)
  76. #define AC_CTRLA_RUNSTDBY(value) ((AC_CTRLA_RUNSTDBY_Msk & ((value) << AC_CTRLA_RUNSTDBY_Pos)))
  77. #define AC_CTRLA_LPMUX_Pos 7 /**< \brief (AC_CTRLA) Low-Power Mux */
  78. #define AC_CTRLA_LPMUX (0x1ul << AC_CTRLA_LPMUX_Pos)
  79. #define AC_CTRLA_MASK 0x87ul /**< \brief (AC_CTRLA) MASK Register */
  80. /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */
  81. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  82. typedef union {
  83. struct {
  84. uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */
  85. uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */
  86. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  87. } bit; /*!< Structure used for bit access */
  88. struct {
  89. uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */
  90. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  91. } vec; /*!< Structure used for vec access */
  92. uint8_t reg; /*!< Type used for register access */
  93. } AC_CTRLB_Type;
  94. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  95. #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */
  96. #define AC_CTRLB_RESETVALUE 0x00ul /**< \brief (AC_CTRLB reset_value) Control B */
  97. #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */
  98. #define AC_CTRLB_START0 (1 << AC_CTRLB_START0_Pos)
  99. #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */
  100. #define AC_CTRLB_START1 (1 << AC_CTRLB_START1_Pos)
  101. #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */
  102. #define AC_CTRLB_START_Msk (0x3ul << AC_CTRLB_START_Pos)
  103. #define AC_CTRLB_START(value) ((AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos)))
  104. #define AC_CTRLB_MASK 0x03ul /**< \brief (AC_CTRLB) MASK Register */
  105. /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */
  106. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  107. typedef union {
  108. struct {
  109. uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */
  110. uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */
  111. uint16_t :2; /*!< bit: 2.. 3 Reserved */
  112. uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */
  113. uint16_t :3; /*!< bit: 5.. 7 Reserved */
  114. uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input */
  115. uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input */
  116. uint16_t :6; /*!< bit: 10..15 Reserved */
  117. } bit; /*!< Structure used for bit access */
  118. struct {
  119. uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */
  120. uint16_t :2; /*!< bit: 2.. 3 Reserved */
  121. uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */
  122. uint16_t :3; /*!< bit: 5.. 7 Reserved */
  123. uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input */
  124. uint16_t :6; /*!< bit: 10..15 Reserved */
  125. } vec; /*!< Structure used for vec access */
  126. uint16_t reg; /*!< Type used for register access */
  127. } AC_EVCTRL_Type;
  128. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  129. #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */
  130. #define AC_EVCTRL_RESETVALUE 0x0000ul /**< \brief (AC_EVCTRL reset_value) Event Control */
  131. #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */
  132. #define AC_EVCTRL_COMPEO0 (1 << AC_EVCTRL_COMPEO0_Pos)
  133. #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */
  134. #define AC_EVCTRL_COMPEO1 (1 << AC_EVCTRL_COMPEO1_Pos)
  135. #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */
  136. #define AC_EVCTRL_COMPEO_Msk (0x3ul << AC_EVCTRL_COMPEO_Pos)
  137. #define AC_EVCTRL_COMPEO(value) ((AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos)))
  138. #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */
  139. #define AC_EVCTRL_WINEO0 (1 << AC_EVCTRL_WINEO0_Pos)
  140. #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */
  141. #define AC_EVCTRL_WINEO_Msk (0x1ul << AC_EVCTRL_WINEO_Pos)
  142. #define AC_EVCTRL_WINEO(value) ((AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos)))
  143. #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input */
  144. #define AC_EVCTRL_COMPEI0 (1 << AC_EVCTRL_COMPEI0_Pos)
  145. #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input */
  146. #define AC_EVCTRL_COMPEI1 (1 << AC_EVCTRL_COMPEI1_Pos)
  147. #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input */
  148. #define AC_EVCTRL_COMPEI_Msk (0x3ul << AC_EVCTRL_COMPEI_Pos)
  149. #define AC_EVCTRL_COMPEI(value) ((AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos)))
  150. #define AC_EVCTRL_MASK 0x0313ul /**< \brief (AC_EVCTRL) MASK Register */
  151. /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */
  152. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  153. typedef union {
  154. struct {
  155. uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */
  156. uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */
  157. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  158. uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */
  159. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  160. } bit; /*!< Structure used for bit access */
  161. struct {
  162. uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */
  163. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  164. uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */
  165. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  166. } vec; /*!< Structure used for vec access */
  167. uint8_t reg; /*!< Type used for register access */
  168. } AC_INTENCLR_Type;
  169. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  170. #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */
  171. #define AC_INTENCLR_RESETVALUE 0x00ul /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */
  172. #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */
  173. #define AC_INTENCLR_COMP0 (1 << AC_INTENCLR_COMP0_Pos)
  174. #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */
  175. #define AC_INTENCLR_COMP1 (1 << AC_INTENCLR_COMP1_Pos)
  176. #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */
  177. #define AC_INTENCLR_COMP_Msk (0x3ul << AC_INTENCLR_COMP_Pos)
  178. #define AC_INTENCLR_COMP(value) ((AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos)))
  179. #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */
  180. #define AC_INTENCLR_WIN0 (1 << AC_INTENCLR_WIN0_Pos)
  181. #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */
  182. #define AC_INTENCLR_WIN_Msk (0x1ul << AC_INTENCLR_WIN_Pos)
  183. #define AC_INTENCLR_WIN(value) ((AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos)))
  184. #define AC_INTENCLR_MASK 0x13ul /**< \brief (AC_INTENCLR) MASK Register */
  185. /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */
  186. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  187. typedef union {
  188. struct {
  189. uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */
  190. uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */
  191. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  192. uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */
  193. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  194. } bit; /*!< Structure used for bit access */
  195. struct {
  196. uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */
  197. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  198. uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */
  199. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  200. } vec; /*!< Structure used for vec access */
  201. uint8_t reg; /*!< Type used for register access */
  202. } AC_INTENSET_Type;
  203. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  204. #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */
  205. #define AC_INTENSET_RESETVALUE 0x00ul /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */
  206. #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */
  207. #define AC_INTENSET_COMP0 (1 << AC_INTENSET_COMP0_Pos)
  208. #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */
  209. #define AC_INTENSET_COMP1 (1 << AC_INTENSET_COMP1_Pos)
  210. #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */
  211. #define AC_INTENSET_COMP_Msk (0x3ul << AC_INTENSET_COMP_Pos)
  212. #define AC_INTENSET_COMP(value) ((AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos)))
  213. #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */
  214. #define AC_INTENSET_WIN0 (1 << AC_INTENSET_WIN0_Pos)
  215. #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */
  216. #define AC_INTENSET_WIN_Msk (0x1ul << AC_INTENSET_WIN_Pos)
  217. #define AC_INTENSET_WIN(value) ((AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos)))
  218. #define AC_INTENSET_MASK 0x13ul /**< \brief (AC_INTENSET) MASK Register */
  219. /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */
  220. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  221. typedef union {
  222. struct {
  223. uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
  224. uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
  225. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  226. uint8_t WIN0:1; /*!< bit: 4 Window 0 */
  227. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  228. } bit; /*!< Structure used for bit access */
  229. struct {
  230. uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
  231. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  232. uint8_t WIN:1; /*!< bit: 4 Window x */
  233. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  234. } vec; /*!< Structure used for vec access */
  235. uint8_t reg; /*!< Type used for register access */
  236. } AC_INTFLAG_Type;
  237. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  238. #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */
  239. #define AC_INTFLAG_RESETVALUE 0x00ul /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */
  240. #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */
  241. #define AC_INTFLAG_COMP0 (1 << AC_INTFLAG_COMP0_Pos)
  242. #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */
  243. #define AC_INTFLAG_COMP1 (1 << AC_INTFLAG_COMP1_Pos)
  244. #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */
  245. #define AC_INTFLAG_COMP_Msk (0x3ul << AC_INTFLAG_COMP_Pos)
  246. #define AC_INTFLAG_COMP(value) ((AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos)))
  247. #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */
  248. #define AC_INTFLAG_WIN0 (1 << AC_INTFLAG_WIN0_Pos)
  249. #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */
  250. #define AC_INTFLAG_WIN_Msk (0x1ul << AC_INTFLAG_WIN_Pos)
  251. #define AC_INTFLAG_WIN(value) ((AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos)))
  252. #define AC_INTFLAG_MASK 0x13ul /**< \brief (AC_INTFLAG) MASK Register */
  253. /* -------- AC_STATUSA : (AC Offset: 0x08) (R/ 8) Status A -------- */
  254. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  255. typedef union {
  256. struct {
  257. uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */
  258. uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */
  259. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  260. uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */
  261. uint8_t :2; /*!< bit: 6.. 7 Reserved */
  262. } bit; /*!< Structure used for bit access */
  263. struct {
  264. uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */
  265. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  266. } vec; /*!< Structure used for vec access */
  267. uint8_t reg; /*!< Type used for register access */
  268. } AC_STATUSA_Type;
  269. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  270. #define AC_STATUSA_OFFSET 0x08 /**< \brief (AC_STATUSA offset) Status A */
  271. #define AC_STATUSA_RESETVALUE 0x00ul /**< \brief (AC_STATUSA reset_value) Status A */
  272. #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */
  273. #define AC_STATUSA_STATE0 (1 << AC_STATUSA_STATE0_Pos)
  274. #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */
  275. #define AC_STATUSA_STATE1 (1 << AC_STATUSA_STATE1_Pos)
  276. #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */
  277. #define AC_STATUSA_STATE_Msk (0x3ul << AC_STATUSA_STATE_Pos)
  278. #define AC_STATUSA_STATE(value) ((AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos)))
  279. #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */
  280. #define AC_STATUSA_WSTATE0_Msk (0x3ul << AC_STATUSA_WSTATE0_Pos)
  281. #define AC_STATUSA_WSTATE0(value) ((AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos)))
  282. #define AC_STATUSA_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSA) Signal is above window */
  283. #define AC_STATUSA_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSA) Signal is inside window */
  284. #define AC_STATUSA_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSA) Signal is below window */
  285. #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos)
  286. #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos)
  287. #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos)
  288. #define AC_STATUSA_MASK 0x33ul /**< \brief (AC_STATUSA) MASK Register */
  289. /* -------- AC_STATUSB : (AC Offset: 0x09) (R/ 8) Status B -------- */
  290. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  291. typedef union {
  292. struct {
  293. uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */
  294. uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */
  295. uint8_t :5; /*!< bit: 2.. 6 Reserved */
  296. uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy */
  297. } bit; /*!< Structure used for bit access */
  298. struct {
  299. uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */
  300. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  301. } vec; /*!< Structure used for vec access */
  302. uint8_t reg; /*!< Type used for register access */
  303. } AC_STATUSB_Type;
  304. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  305. #define AC_STATUSB_OFFSET 0x09 /**< \brief (AC_STATUSB offset) Status B */
  306. #define AC_STATUSB_RESETVALUE 0x00ul /**< \brief (AC_STATUSB reset_value) Status B */
  307. #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */
  308. #define AC_STATUSB_READY0 (1 << AC_STATUSB_READY0_Pos)
  309. #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */
  310. #define AC_STATUSB_READY1 (1 << AC_STATUSB_READY1_Pos)
  311. #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */
  312. #define AC_STATUSB_READY_Msk (0x3ul << AC_STATUSB_READY_Pos)
  313. #define AC_STATUSB_READY(value) ((AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos)))
  314. #define AC_STATUSB_SYNCBUSY_Pos 7 /**< \brief (AC_STATUSB) Synchronization Busy */
  315. #define AC_STATUSB_SYNCBUSY (0x1ul << AC_STATUSB_SYNCBUSY_Pos)
  316. #define AC_STATUSB_MASK 0x83ul /**< \brief (AC_STATUSB) MASK Register */
  317. /* -------- AC_STATUSC : (AC Offset: 0x0A) (R/ 8) Status C -------- */
  318. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  319. typedef union {
  320. struct {
  321. uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */
  322. uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */
  323. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  324. uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */
  325. uint8_t :2; /*!< bit: 6.. 7 Reserved */
  326. } bit; /*!< Structure used for bit access */
  327. struct {
  328. uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */
  329. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  330. } vec; /*!< Structure used for vec access */
  331. uint8_t reg; /*!< Type used for register access */
  332. } AC_STATUSC_Type;
  333. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  334. #define AC_STATUSC_OFFSET 0x0A /**< \brief (AC_STATUSC offset) Status C */
  335. #define AC_STATUSC_RESETVALUE 0x00ul /**< \brief (AC_STATUSC reset_value) Status C */
  336. #define AC_STATUSC_STATE0_Pos 0 /**< \brief (AC_STATUSC) Comparator 0 Current State */
  337. #define AC_STATUSC_STATE0 (1 << AC_STATUSC_STATE0_Pos)
  338. #define AC_STATUSC_STATE1_Pos 1 /**< \brief (AC_STATUSC) Comparator 1 Current State */
  339. #define AC_STATUSC_STATE1 (1 << AC_STATUSC_STATE1_Pos)
  340. #define AC_STATUSC_STATE_Pos 0 /**< \brief (AC_STATUSC) Comparator x Current State */
  341. #define AC_STATUSC_STATE_Msk (0x3ul << AC_STATUSC_STATE_Pos)
  342. #define AC_STATUSC_STATE(value) ((AC_STATUSC_STATE_Msk & ((value) << AC_STATUSC_STATE_Pos)))
  343. #define AC_STATUSC_WSTATE0_Pos 4 /**< \brief (AC_STATUSC) Window 0 Current State */
  344. #define AC_STATUSC_WSTATE0_Msk (0x3ul << AC_STATUSC_WSTATE0_Pos)
  345. #define AC_STATUSC_WSTATE0(value) ((AC_STATUSC_WSTATE0_Msk & ((value) << AC_STATUSC_WSTATE0_Pos)))
  346. #define AC_STATUSC_WSTATE0_ABOVE_Val 0x0ul /**< \brief (AC_STATUSC) Signal is above window */
  347. #define AC_STATUSC_WSTATE0_INSIDE_Val 0x1ul /**< \brief (AC_STATUSC) Signal is inside window */
  348. #define AC_STATUSC_WSTATE0_BELOW_Val 0x2ul /**< \brief (AC_STATUSC) Signal is below window */
  349. #define AC_STATUSC_WSTATE0_ABOVE (AC_STATUSC_WSTATE0_ABOVE_Val << AC_STATUSC_WSTATE0_Pos)
  350. #define AC_STATUSC_WSTATE0_INSIDE (AC_STATUSC_WSTATE0_INSIDE_Val << AC_STATUSC_WSTATE0_Pos)
  351. #define AC_STATUSC_WSTATE0_BELOW (AC_STATUSC_WSTATE0_BELOW_Val << AC_STATUSC_WSTATE0_Pos)
  352. #define AC_STATUSC_MASK 0x33ul /**< \brief (AC_STATUSC) MASK Register */
  353. /* -------- AC_WINCTRL : (AC Offset: 0x0C) (R/W 8) Window Control -------- */
  354. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  355. typedef union {
  356. struct {
  357. uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */
  358. uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */
  359. uint8_t :5; /*!< bit: 3.. 7 Reserved */
  360. } bit; /*!< Structure used for bit access */
  361. uint8_t reg; /*!< Type used for register access */
  362. } AC_WINCTRL_Type;
  363. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  364. #define AC_WINCTRL_OFFSET 0x0C /**< \brief (AC_WINCTRL offset) Window Control */
  365. #define AC_WINCTRL_RESETVALUE 0x00ul /**< \brief (AC_WINCTRL reset_value) Window Control */
  366. #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */
  367. #define AC_WINCTRL_WEN0 (0x1ul << AC_WINCTRL_WEN0_Pos)
  368. #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */
  369. #define AC_WINCTRL_WINTSEL0_Msk (0x3ul << AC_WINCTRL_WINTSEL0_Pos)
  370. #define AC_WINCTRL_WINTSEL0(value) ((AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos)))
  371. #define AC_WINCTRL_WINTSEL0_ABOVE_Val 0x0ul /**< \brief (AC_WINCTRL) Interrupt on signal above window */
  372. #define AC_WINCTRL_WINTSEL0_INSIDE_Val 0x1ul /**< \brief (AC_WINCTRL) Interrupt on signal inside window */
  373. #define AC_WINCTRL_WINTSEL0_BELOW_Val 0x2ul /**< \brief (AC_WINCTRL) Interrupt on signal below window */
  374. #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val 0x3ul /**< \brief (AC_WINCTRL) Interrupt on signal outside window */
  375. #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos)
  376. #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
  377. #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos)
  378. #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
  379. #define AC_WINCTRL_MASK 0x07ul /**< \brief (AC_WINCTRL) MASK Register */
  380. /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */
  381. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  382. typedef union {
  383. struct {
  384. uint32_t ENABLE:1; /*!< bit: 0 Enable */
  385. uint32_t SINGLE:1; /*!< bit: 1 Single-Shot Mode */
  386. uint32_t SPEED:2; /*!< bit: 2.. 3 Speed Selection */
  387. uint32_t :1; /*!< bit: 4 Reserved */
  388. uint32_t INTSEL:2; /*!< bit: 5.. 6 Interrupt Selection */
  389. uint32_t :1; /*!< bit: 7 Reserved */
  390. uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */
  391. uint32_t :1; /*!< bit: 11 Reserved */
  392. uint32_t MUXPOS:2; /*!< bit: 12..13 Positive Input Mux Selection */
  393. uint32_t :1; /*!< bit: 14 Reserved */
  394. uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */
  395. uint32_t OUT:2; /*!< bit: 16..17 Output */
  396. uint32_t :1; /*!< bit: 18 Reserved */
  397. uint32_t HYST:1; /*!< bit: 19 Hysteresis Enable */
  398. uint32_t :4; /*!< bit: 20..23 Reserved */
  399. uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */
  400. uint32_t :5; /*!< bit: 27..31 Reserved */
  401. } bit; /*!< Structure used for bit access */
  402. uint32_t reg; /*!< Type used for register access */
  403. } AC_COMPCTRL_Type;
  404. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  405. #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */
  406. #define AC_COMPCTRL_RESETVALUE 0x00000000ul /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */
  407. #define AC_COMPCTRL_ENABLE_Pos 0 /**< \brief (AC_COMPCTRL) Enable */
  408. #define AC_COMPCTRL_ENABLE (0x1ul << AC_COMPCTRL_ENABLE_Pos)
  409. #define AC_COMPCTRL_SINGLE_Pos 1 /**< \brief (AC_COMPCTRL) Single-Shot Mode */
  410. #define AC_COMPCTRL_SINGLE (0x1ul << AC_COMPCTRL_SINGLE_Pos)
  411. #define AC_COMPCTRL_SPEED_Pos 2 /**< \brief (AC_COMPCTRL) Speed Selection */
  412. #define AC_COMPCTRL_SPEED_Msk (0x3ul << AC_COMPCTRL_SPEED_Pos)
  413. #define AC_COMPCTRL_SPEED(value) ((AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos)))
  414. #define AC_COMPCTRL_SPEED_LOW_Val 0x0ul /**< \brief (AC_COMPCTRL) Low speed */
  415. #define AC_COMPCTRL_SPEED_HIGH_Val 0x1ul /**< \brief (AC_COMPCTRL) High speed */
  416. #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos)
  417. #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos)
  418. #define AC_COMPCTRL_INTSEL_Pos 5 /**< \brief (AC_COMPCTRL) Interrupt Selection */
  419. #define AC_COMPCTRL_INTSEL_Msk (0x3ul << AC_COMPCTRL_INTSEL_Pos)
  420. #define AC_COMPCTRL_INTSEL(value) ((AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos)))
  421. #define AC_COMPCTRL_INTSEL_TOGGLE_Val 0x0ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */
  422. #define AC_COMPCTRL_INTSEL_RISING_Val 0x1ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */
  423. #define AC_COMPCTRL_INTSEL_FALLING_Val 0x2ul /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */
  424. #define AC_COMPCTRL_INTSEL_EOC_Val 0x3ul /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */
  425. #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos)
  426. #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos)
  427. #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos)
  428. #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos)
  429. #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */
  430. #define AC_COMPCTRL_MUXNEG_Msk (0x7ul << AC_COMPCTRL_MUXNEG_Pos)
  431. #define AC_COMPCTRL_MUXNEG(value) ((AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos)))
  432. #define AC_COMPCTRL_MUXNEG_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */
  433. #define AC_COMPCTRL_MUXNEG_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */
  434. #define AC_COMPCTRL_MUXNEG_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */
  435. #define AC_COMPCTRL_MUXNEG_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */
  436. #define AC_COMPCTRL_MUXNEG_GND_Val 0x4ul /**< \brief (AC_COMPCTRL) Ground */
  437. #define AC_COMPCTRL_MUXNEG_VSCALE_Val 0x5ul /**< \brief (AC_COMPCTRL) VDD scaler */
  438. #define AC_COMPCTRL_MUXNEG_BANDGAP_Val 0x6ul /**< \brief (AC_COMPCTRL) Internal bandgap voltage */
  439. #define AC_COMPCTRL_MUXNEG_DAC_Val 0x7ul /**< \brief (AC_COMPCTRL) DAC output */
  440. #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos)
  441. #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos)
  442. #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos)
  443. #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos)
  444. #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos)
  445. #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos)
  446. #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos)
  447. #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos)
  448. #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */
  449. #define AC_COMPCTRL_MUXPOS_Msk (0x3ul << AC_COMPCTRL_MUXPOS_Pos)
  450. #define AC_COMPCTRL_MUXPOS(value) ((AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos)))
  451. #define AC_COMPCTRL_MUXPOS_PIN0_Val 0x0ul /**< \brief (AC_COMPCTRL) I/O pin 0 */
  452. #define AC_COMPCTRL_MUXPOS_PIN1_Val 0x1ul /**< \brief (AC_COMPCTRL) I/O pin 1 */
  453. #define AC_COMPCTRL_MUXPOS_PIN2_Val 0x2ul /**< \brief (AC_COMPCTRL) I/O pin 2 */
  454. #define AC_COMPCTRL_MUXPOS_PIN3_Val 0x3ul /**< \brief (AC_COMPCTRL) I/O pin 3 */
  455. #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos)
  456. #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos)
  457. #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos)
  458. #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos)
  459. #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */
  460. #define AC_COMPCTRL_SWAP (0x1ul << AC_COMPCTRL_SWAP_Pos)
  461. #define AC_COMPCTRL_OUT_Pos 16 /**< \brief (AC_COMPCTRL) Output */
  462. #define AC_COMPCTRL_OUT_Msk (0x3ul << AC_COMPCTRL_OUT_Pos)
  463. #define AC_COMPCTRL_OUT(value) ((AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos)))
  464. #define AC_COMPCTRL_OUT_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */
  465. #define AC_COMPCTRL_OUT_ASYNC_Val 0x1ul /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */
  466. #define AC_COMPCTRL_OUT_SYNC_Val 0x2ul /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */
  467. #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos)
  468. #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos)
  469. #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos)
  470. #define AC_COMPCTRL_HYST_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */
  471. #define AC_COMPCTRL_HYST (0x1ul << AC_COMPCTRL_HYST_Pos)
  472. #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */
  473. #define AC_COMPCTRL_FLEN_Msk (0x7ul << AC_COMPCTRL_FLEN_Pos)
  474. #define AC_COMPCTRL_FLEN(value) ((AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos)))
  475. #define AC_COMPCTRL_FLEN_OFF_Val 0x0ul /**< \brief (AC_COMPCTRL) No filtering */
  476. #define AC_COMPCTRL_FLEN_MAJ3_Val 0x1ul /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */
  477. #define AC_COMPCTRL_FLEN_MAJ5_Val 0x2ul /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */
  478. #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos)
  479. #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos)
  480. #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos)
  481. #define AC_COMPCTRL_MASK 0x070BB76Ful /**< \brief (AC_COMPCTRL) MASK Register */
  482. /* -------- AC_SCALER : (AC Offset: 0x20) (R/W 8) Scaler n -------- */
  483. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  484. typedef union {
  485. struct {
  486. uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */
  487. uint8_t :2; /*!< bit: 6.. 7 Reserved */
  488. } bit; /*!< Structure used for bit access */
  489. uint8_t reg; /*!< Type used for register access */
  490. } AC_SCALER_Type;
  491. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  492. #define AC_SCALER_OFFSET 0x20 /**< \brief (AC_SCALER offset) Scaler n */
  493. #define AC_SCALER_RESETVALUE 0x00ul /**< \brief (AC_SCALER reset_value) Scaler n */
  494. #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */
  495. #define AC_SCALER_VALUE_Msk (0x3Ful << AC_SCALER_VALUE_Pos)
  496. #define AC_SCALER_VALUE(value) ((AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos)))
  497. #define AC_SCALER_MASK 0x3Ful /**< \brief (AC_SCALER) MASK Register */
  498. /** \brief AC hardware registers */
  499. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  500. typedef struct {
  501. __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */
  502. __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */
  503. __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */
  504. __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */
  505. __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */
  506. __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */
  507. RoReg8 Reserved1[0x1];
  508. __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x08 (R/ 8) Status A */
  509. __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x09 (R/ 8) Status B */
  510. __I AC_STATUSC_Type STATUSC; /**< \brief Offset: 0x0A (R/ 8) Status C */
  511. RoReg8 Reserved2[0x1];
  512. __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0C (R/W 8) Window Control */
  513. RoReg8 Reserved3[0x3];
  514. __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */
  515. RoReg8 Reserved4[0x8];
  516. __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x20 (R/W 8) Scaler n */
  517. } Ac;
  518. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  519. /*@}*/
  520. #endif /* _SAMD21_AC_COMPONENT_ */