ac.h 39 KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Component description for AC
  5. *
  6. * Copyright (c) 2018 Microchip Technology Inc.
  7. *
  8. * \asf_license_start
  9. *
  10. * \page License
  11. *
  12. * SPDX-License-Identifier: Apache-2.0
  13. *
  14. * Licensed under the Apache License, Version 2.0 (the "License"); you may
  15. * not use this file except in compliance with the License.
  16. * You may obtain a copy of the Licence at
  17. *
  18. * http://www.apache.org/licenses/LICENSE-2.0
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  22. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. * \asf_license_stop
  27. *
  28. */
  29. #ifndef _SAMD11_AC_COMPONENT_
  30. #define _SAMD11_AC_COMPONENT_
  31. /* ========================================================================== */
  32. /** SOFTWARE API DEFINITION FOR AC */
  33. /* ========================================================================== */
  34. /** \addtogroup SAMD11_AC Analog Comparators */
  35. /*@{*/
  36. #define AC_U2205
  37. #define REV_AC 0x111
  38. /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */
  39. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  40. typedef union {
  41. struct {
  42. uint8_t SWRST:1; /*!< bit: 0 Software Reset */
  43. uint8_t ENABLE:1; /*!< bit: 1 Enable */
  44. uint8_t RUNSTDBY:1; /*!< bit: 2 Run in Standby */
  45. uint8_t :4; /*!< bit: 3.. 6 Reserved */
  46. uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */
  47. } bit; /*!< Structure used for bit access */
  48. uint8_t reg; /*!< Type used for register access */
  49. } AC_CTRLA_Type;
  50. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  51. #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */
  52. #define AC_CTRLA_RESETVALUE _U_(0x00) /**< \brief (AC_CTRLA reset_value) Control A */
  53. #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */
  54. #define AC_CTRLA_SWRST (_U_(0x1) << AC_CTRLA_SWRST_Pos)
  55. #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */
  56. #define AC_CTRLA_ENABLE (_U_(0x1) << AC_CTRLA_ENABLE_Pos)
  57. #define AC_CTRLA_RUNSTDBY_Pos 2 /**< \brief (AC_CTRLA) Run in Standby */
  58. #define AC_CTRLA_RUNSTDBY_Msk (_U_(0x1) << AC_CTRLA_RUNSTDBY_Pos)
  59. #define AC_CTRLA_RUNSTDBY(value) (AC_CTRLA_RUNSTDBY_Msk & ((value) << AC_CTRLA_RUNSTDBY_Pos))
  60. #define AC_CTRLA_LPMUX_Pos 7 /**< \brief (AC_CTRLA) Low-Power Mux */
  61. #define AC_CTRLA_LPMUX (_U_(0x1) << AC_CTRLA_LPMUX_Pos)
  62. #define AC_CTRLA_MASK _U_(0x87) /**< \brief (AC_CTRLA) MASK Register */
  63. /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */
  64. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  65. typedef union {
  66. struct {
  67. uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */
  68. uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */
  69. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  70. } bit; /*!< Structure used for bit access */
  71. struct {
  72. uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */
  73. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  74. } vec; /*!< Structure used for vec access */
  75. uint8_t reg; /*!< Type used for register access */
  76. } AC_CTRLB_Type;
  77. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  78. #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */
  79. #define AC_CTRLB_RESETVALUE _U_(0x00) /**< \brief (AC_CTRLB reset_value) Control B */
  80. #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */
  81. #define AC_CTRLB_START0 (_U_(1) << AC_CTRLB_START0_Pos)
  82. #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */
  83. #define AC_CTRLB_START1 (_U_(1) << AC_CTRLB_START1_Pos)
  84. #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */
  85. #define AC_CTRLB_START_Msk (_U_(0x3) << AC_CTRLB_START_Pos)
  86. #define AC_CTRLB_START(value) (AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos))
  87. #define AC_CTRLB_MASK _U_(0x03) /**< \brief (AC_CTRLB) MASK Register */
  88. /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */
  89. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  90. typedef union {
  91. struct {
  92. uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */
  93. uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */
  94. uint16_t :2; /*!< bit: 2.. 3 Reserved */
  95. uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */
  96. uint16_t :3; /*!< bit: 5.. 7 Reserved */
  97. uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input */
  98. uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input */
  99. uint16_t :6; /*!< bit: 10..15 Reserved */
  100. } bit; /*!< Structure used for bit access */
  101. struct {
  102. uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */
  103. uint16_t :2; /*!< bit: 2.. 3 Reserved */
  104. uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */
  105. uint16_t :3; /*!< bit: 5.. 7 Reserved */
  106. uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input */
  107. uint16_t :6; /*!< bit: 10..15 Reserved */
  108. } vec; /*!< Structure used for vec access */
  109. uint16_t reg; /*!< Type used for register access */
  110. } AC_EVCTRL_Type;
  111. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  112. #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */
  113. #define AC_EVCTRL_RESETVALUE _U_(0x0000) /**< \brief (AC_EVCTRL reset_value) Event Control */
  114. #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */
  115. #define AC_EVCTRL_COMPEO0 (_U_(1) << AC_EVCTRL_COMPEO0_Pos)
  116. #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */
  117. #define AC_EVCTRL_COMPEO1 (_U_(1) << AC_EVCTRL_COMPEO1_Pos)
  118. #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */
  119. #define AC_EVCTRL_COMPEO_Msk (_U_(0x3) << AC_EVCTRL_COMPEO_Pos)
  120. #define AC_EVCTRL_COMPEO(value) (AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos))
  121. #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */
  122. #define AC_EVCTRL_WINEO0 (_U_(1) << AC_EVCTRL_WINEO0_Pos)
  123. #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */
  124. #define AC_EVCTRL_WINEO_Msk (_U_(0x1) << AC_EVCTRL_WINEO_Pos)
  125. #define AC_EVCTRL_WINEO(value) (AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos))
  126. #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input */
  127. #define AC_EVCTRL_COMPEI0 (_U_(1) << AC_EVCTRL_COMPEI0_Pos)
  128. #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input */
  129. #define AC_EVCTRL_COMPEI1 (_U_(1) << AC_EVCTRL_COMPEI1_Pos)
  130. #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input */
  131. #define AC_EVCTRL_COMPEI_Msk (_U_(0x3) << AC_EVCTRL_COMPEI_Pos)
  132. #define AC_EVCTRL_COMPEI(value) (AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos))
  133. #define AC_EVCTRL_MASK _U_(0x0313) /**< \brief (AC_EVCTRL) MASK Register */
  134. /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */
  135. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  136. typedef union {
  137. struct {
  138. uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */
  139. uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */
  140. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  141. uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */
  142. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  143. } bit; /*!< Structure used for bit access */
  144. struct {
  145. uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */
  146. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  147. uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */
  148. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  149. } vec; /*!< Structure used for vec access */
  150. uint8_t reg; /*!< Type used for register access */
  151. } AC_INTENCLR_Type;
  152. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  153. #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */
  154. #define AC_INTENCLR_RESETVALUE _U_(0x00) /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */
  155. #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */
  156. #define AC_INTENCLR_COMP0 (_U_(1) << AC_INTENCLR_COMP0_Pos)
  157. #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */
  158. #define AC_INTENCLR_COMP1 (_U_(1) << AC_INTENCLR_COMP1_Pos)
  159. #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */
  160. #define AC_INTENCLR_COMP_Msk (_U_(0x3) << AC_INTENCLR_COMP_Pos)
  161. #define AC_INTENCLR_COMP(value) (AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos))
  162. #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */
  163. #define AC_INTENCLR_WIN0 (_U_(1) << AC_INTENCLR_WIN0_Pos)
  164. #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */
  165. #define AC_INTENCLR_WIN_Msk (_U_(0x1) << AC_INTENCLR_WIN_Pos)
  166. #define AC_INTENCLR_WIN(value) (AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos))
  167. #define AC_INTENCLR_MASK _U_(0x13) /**< \brief (AC_INTENCLR) MASK Register */
  168. /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */
  169. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  170. typedef union {
  171. struct {
  172. uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */
  173. uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */
  174. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  175. uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */
  176. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  177. } bit; /*!< Structure used for bit access */
  178. struct {
  179. uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */
  180. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  181. uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */
  182. uint8_t :3; /*!< bit: 5.. 7 Reserved */
  183. } vec; /*!< Structure used for vec access */
  184. uint8_t reg; /*!< Type used for register access */
  185. } AC_INTENSET_Type;
  186. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  187. #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */
  188. #define AC_INTENSET_RESETVALUE _U_(0x00) /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */
  189. #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */
  190. #define AC_INTENSET_COMP0 (_U_(1) << AC_INTENSET_COMP0_Pos)
  191. #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */
  192. #define AC_INTENSET_COMP1 (_U_(1) << AC_INTENSET_COMP1_Pos)
  193. #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */
  194. #define AC_INTENSET_COMP_Msk (_U_(0x3) << AC_INTENSET_COMP_Pos)
  195. #define AC_INTENSET_COMP(value) (AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos))
  196. #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */
  197. #define AC_INTENSET_WIN0 (_U_(1) << AC_INTENSET_WIN0_Pos)
  198. #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */
  199. #define AC_INTENSET_WIN_Msk (_U_(0x1) << AC_INTENSET_WIN_Pos)
  200. #define AC_INTENSET_WIN(value) (AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos))
  201. #define AC_INTENSET_MASK _U_(0x13) /**< \brief (AC_INTENSET) MASK Register */
  202. /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */
  203. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  204. typedef union { // __I to avoid read-modify-write on write-to-clear register
  205. struct {
  206. __I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */
  207. __I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */
  208. __I uint8_t :2; /*!< bit: 2.. 3 Reserved */
  209. __I uint8_t WIN0:1; /*!< bit: 4 Window 0 */
  210. __I uint8_t :3; /*!< bit: 5.. 7 Reserved */
  211. } bit; /*!< Structure used for bit access */
  212. struct {
  213. __I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */
  214. __I uint8_t :2; /*!< bit: 2.. 3 Reserved */
  215. __I uint8_t WIN:1; /*!< bit: 4 Window x */
  216. __I uint8_t :3; /*!< bit: 5.. 7 Reserved */
  217. } vec; /*!< Structure used for vec access */
  218. uint8_t reg; /*!< Type used for register access */
  219. } AC_INTFLAG_Type;
  220. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  221. #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */
  222. #define AC_INTFLAG_RESETVALUE _U_(0x00) /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */
  223. #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */
  224. #define AC_INTFLAG_COMP0 (_U_(1) << AC_INTFLAG_COMP0_Pos)
  225. #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */
  226. #define AC_INTFLAG_COMP1 (_U_(1) << AC_INTFLAG_COMP1_Pos)
  227. #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */
  228. #define AC_INTFLAG_COMP_Msk (_U_(0x3) << AC_INTFLAG_COMP_Pos)
  229. #define AC_INTFLAG_COMP(value) (AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos))
  230. #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */
  231. #define AC_INTFLAG_WIN0 (_U_(1) << AC_INTFLAG_WIN0_Pos)
  232. #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */
  233. #define AC_INTFLAG_WIN_Msk (_U_(0x1) << AC_INTFLAG_WIN_Pos)
  234. #define AC_INTFLAG_WIN(value) (AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos))
  235. #define AC_INTFLAG_MASK _U_(0x13) /**< \brief (AC_INTFLAG) MASK Register */
  236. /* -------- AC_STATUSA : (AC Offset: 0x08) (R/ 8) Status A -------- */
  237. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  238. typedef union {
  239. struct {
  240. uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */
  241. uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */
  242. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  243. uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */
  244. uint8_t :2; /*!< bit: 6.. 7 Reserved */
  245. } bit; /*!< Structure used for bit access */
  246. struct {
  247. uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */
  248. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  249. } vec; /*!< Structure used for vec access */
  250. uint8_t reg; /*!< Type used for register access */
  251. } AC_STATUSA_Type;
  252. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  253. #define AC_STATUSA_OFFSET 0x08 /**< \brief (AC_STATUSA offset) Status A */
  254. #define AC_STATUSA_RESETVALUE _U_(0x00) /**< \brief (AC_STATUSA reset_value) Status A */
  255. #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */
  256. #define AC_STATUSA_STATE0 (_U_(1) << AC_STATUSA_STATE0_Pos)
  257. #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */
  258. #define AC_STATUSA_STATE1 (_U_(1) << AC_STATUSA_STATE1_Pos)
  259. #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */
  260. #define AC_STATUSA_STATE_Msk (_U_(0x3) << AC_STATUSA_STATE_Pos)
  261. #define AC_STATUSA_STATE(value) (AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos))
  262. #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */
  263. #define AC_STATUSA_WSTATE0_Msk (_U_(0x3) << AC_STATUSA_WSTATE0_Pos)
  264. #define AC_STATUSA_WSTATE0(value) (AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos))
  265. #define AC_STATUSA_WSTATE0_ABOVE_Val _U_(0x0) /**< \brief (AC_STATUSA) Signal is above window */
  266. #define AC_STATUSA_WSTATE0_INSIDE_Val _U_(0x1) /**< \brief (AC_STATUSA) Signal is inside window */
  267. #define AC_STATUSA_WSTATE0_BELOW_Val _U_(0x2) /**< \brief (AC_STATUSA) Signal is below window */
  268. #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos)
  269. #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos)
  270. #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos)
  271. #define AC_STATUSA_MASK _U_(0x33) /**< \brief (AC_STATUSA) MASK Register */
  272. /* -------- AC_STATUSB : (AC Offset: 0x09) (R/ 8) Status B -------- */
  273. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  274. typedef union {
  275. struct {
  276. uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */
  277. uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */
  278. uint8_t :5; /*!< bit: 2.. 6 Reserved */
  279. uint8_t SYNCBUSY:1; /*!< bit: 7 Synchronization Busy */
  280. } bit; /*!< Structure used for bit access */
  281. struct {
  282. uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */
  283. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  284. } vec; /*!< Structure used for vec access */
  285. uint8_t reg; /*!< Type used for register access */
  286. } AC_STATUSB_Type;
  287. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  288. #define AC_STATUSB_OFFSET 0x09 /**< \brief (AC_STATUSB offset) Status B */
  289. #define AC_STATUSB_RESETVALUE _U_(0x00) /**< \brief (AC_STATUSB reset_value) Status B */
  290. #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */
  291. #define AC_STATUSB_READY0 (_U_(1) << AC_STATUSB_READY0_Pos)
  292. #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */
  293. #define AC_STATUSB_READY1 (_U_(1) << AC_STATUSB_READY1_Pos)
  294. #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */
  295. #define AC_STATUSB_READY_Msk (_U_(0x3) << AC_STATUSB_READY_Pos)
  296. #define AC_STATUSB_READY(value) (AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos))
  297. #define AC_STATUSB_SYNCBUSY_Pos 7 /**< \brief (AC_STATUSB) Synchronization Busy */
  298. #define AC_STATUSB_SYNCBUSY (_U_(0x1) << AC_STATUSB_SYNCBUSY_Pos)
  299. #define AC_STATUSB_MASK _U_(0x83) /**< \brief (AC_STATUSB) MASK Register */
  300. /* -------- AC_STATUSC : (AC Offset: 0x0A) (R/ 8) Status C -------- */
  301. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  302. typedef union {
  303. struct {
  304. uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */
  305. uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */
  306. uint8_t :2; /*!< bit: 2.. 3 Reserved */
  307. uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */
  308. uint8_t :2; /*!< bit: 6.. 7 Reserved */
  309. } bit; /*!< Structure used for bit access */
  310. struct {
  311. uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */
  312. uint8_t :6; /*!< bit: 2.. 7 Reserved */
  313. } vec; /*!< Structure used for vec access */
  314. uint8_t reg; /*!< Type used for register access */
  315. } AC_STATUSC_Type;
  316. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  317. #define AC_STATUSC_OFFSET 0x0A /**< \brief (AC_STATUSC offset) Status C */
  318. #define AC_STATUSC_RESETVALUE _U_(0x00) /**< \brief (AC_STATUSC reset_value) Status C */
  319. #define AC_STATUSC_STATE0_Pos 0 /**< \brief (AC_STATUSC) Comparator 0 Current State */
  320. #define AC_STATUSC_STATE0 (_U_(1) << AC_STATUSC_STATE0_Pos)
  321. #define AC_STATUSC_STATE1_Pos 1 /**< \brief (AC_STATUSC) Comparator 1 Current State */
  322. #define AC_STATUSC_STATE1 (_U_(1) << AC_STATUSC_STATE1_Pos)
  323. #define AC_STATUSC_STATE_Pos 0 /**< \brief (AC_STATUSC) Comparator x Current State */
  324. #define AC_STATUSC_STATE_Msk (_U_(0x3) << AC_STATUSC_STATE_Pos)
  325. #define AC_STATUSC_STATE(value) (AC_STATUSC_STATE_Msk & ((value) << AC_STATUSC_STATE_Pos))
  326. #define AC_STATUSC_WSTATE0_Pos 4 /**< \brief (AC_STATUSC) Window 0 Current State */
  327. #define AC_STATUSC_WSTATE0_Msk (_U_(0x3) << AC_STATUSC_WSTATE0_Pos)
  328. #define AC_STATUSC_WSTATE0(value) (AC_STATUSC_WSTATE0_Msk & ((value) << AC_STATUSC_WSTATE0_Pos))
  329. #define AC_STATUSC_WSTATE0_ABOVE_Val _U_(0x0) /**< \brief (AC_STATUSC) Signal is above window */
  330. #define AC_STATUSC_WSTATE0_INSIDE_Val _U_(0x1) /**< \brief (AC_STATUSC) Signal is inside window */
  331. #define AC_STATUSC_WSTATE0_BELOW_Val _U_(0x2) /**< \brief (AC_STATUSC) Signal is below window */
  332. #define AC_STATUSC_WSTATE0_ABOVE (AC_STATUSC_WSTATE0_ABOVE_Val << AC_STATUSC_WSTATE0_Pos)
  333. #define AC_STATUSC_WSTATE0_INSIDE (AC_STATUSC_WSTATE0_INSIDE_Val << AC_STATUSC_WSTATE0_Pos)
  334. #define AC_STATUSC_WSTATE0_BELOW (AC_STATUSC_WSTATE0_BELOW_Val << AC_STATUSC_WSTATE0_Pos)
  335. #define AC_STATUSC_MASK _U_(0x33) /**< \brief (AC_STATUSC) MASK Register */
  336. /* -------- AC_WINCTRL : (AC Offset: 0x0C) (R/W 8) Window Control -------- */
  337. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  338. typedef union {
  339. struct {
  340. uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */
  341. uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */
  342. uint8_t :5; /*!< bit: 3.. 7 Reserved */
  343. } bit; /*!< Structure used for bit access */
  344. uint8_t reg; /*!< Type used for register access */
  345. } AC_WINCTRL_Type;
  346. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  347. #define AC_WINCTRL_OFFSET 0x0C /**< \brief (AC_WINCTRL offset) Window Control */
  348. #define AC_WINCTRL_RESETVALUE _U_(0x00) /**< \brief (AC_WINCTRL reset_value) Window Control */
  349. #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */
  350. #define AC_WINCTRL_WEN0 (_U_(0x1) << AC_WINCTRL_WEN0_Pos)
  351. #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */
  352. #define AC_WINCTRL_WINTSEL0_Msk (_U_(0x3) << AC_WINCTRL_WINTSEL0_Pos)
  353. #define AC_WINCTRL_WINTSEL0(value) (AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos))
  354. #define AC_WINCTRL_WINTSEL0_ABOVE_Val _U_(0x0) /**< \brief (AC_WINCTRL) Interrupt on signal above window */
  355. #define AC_WINCTRL_WINTSEL0_INSIDE_Val _U_(0x1) /**< \brief (AC_WINCTRL) Interrupt on signal inside window */
  356. #define AC_WINCTRL_WINTSEL0_BELOW_Val _U_(0x2) /**< \brief (AC_WINCTRL) Interrupt on signal below window */
  357. #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val _U_(0x3) /**< \brief (AC_WINCTRL) Interrupt on signal outside window */
  358. #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos)
  359. #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
  360. #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos)
  361. #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos)
  362. #define AC_WINCTRL_MASK _U_(0x07) /**< \brief (AC_WINCTRL) MASK Register */
  363. /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */
  364. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  365. typedef union {
  366. struct {
  367. uint32_t ENABLE:1; /*!< bit: 0 Enable */
  368. uint32_t SINGLE:1; /*!< bit: 1 Single-Shot Mode */
  369. uint32_t SPEED:2; /*!< bit: 2.. 3 Speed Selection */
  370. uint32_t :1; /*!< bit: 4 Reserved */
  371. uint32_t INTSEL:2; /*!< bit: 5.. 6 Interrupt Selection */
  372. uint32_t :1; /*!< bit: 7 Reserved */
  373. uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */
  374. uint32_t :1; /*!< bit: 11 Reserved */
  375. uint32_t MUXPOS:2; /*!< bit: 12..13 Positive Input Mux Selection */
  376. uint32_t :1; /*!< bit: 14 Reserved */
  377. uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */
  378. uint32_t OUT:2; /*!< bit: 16..17 Output */
  379. uint32_t :1; /*!< bit: 18 Reserved */
  380. uint32_t HYST:1; /*!< bit: 19 Hysteresis Enable */
  381. uint32_t :4; /*!< bit: 20..23 Reserved */
  382. uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */
  383. uint32_t :5; /*!< bit: 27..31 Reserved */
  384. } bit; /*!< Structure used for bit access */
  385. uint32_t reg; /*!< Type used for register access */
  386. } AC_COMPCTRL_Type;
  387. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  388. #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */
  389. #define AC_COMPCTRL_RESETVALUE _U_(0x00000000) /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */
  390. #define AC_COMPCTRL_ENABLE_Pos 0 /**< \brief (AC_COMPCTRL) Enable */
  391. #define AC_COMPCTRL_ENABLE (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos)
  392. #define AC_COMPCTRL_SINGLE_Pos 1 /**< \brief (AC_COMPCTRL) Single-Shot Mode */
  393. #define AC_COMPCTRL_SINGLE (_U_(0x1) << AC_COMPCTRL_SINGLE_Pos)
  394. #define AC_COMPCTRL_SPEED_Pos 2 /**< \brief (AC_COMPCTRL) Speed Selection */
  395. #define AC_COMPCTRL_SPEED_Msk (_U_(0x3) << AC_COMPCTRL_SPEED_Pos)
  396. #define AC_COMPCTRL_SPEED(value) (AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos))
  397. #define AC_COMPCTRL_SPEED_LOW_Val _U_(0x0) /**< \brief (AC_COMPCTRL) Low speed */
  398. #define AC_COMPCTRL_SPEED_HIGH_Val _U_(0x1) /**< \brief (AC_COMPCTRL) High speed */
  399. #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos)
  400. #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos)
  401. #define AC_COMPCTRL_INTSEL_Pos 5 /**< \brief (AC_COMPCTRL) Interrupt Selection */
  402. #define AC_COMPCTRL_INTSEL_Msk (_U_(0x3) << AC_COMPCTRL_INTSEL_Pos)
  403. #define AC_COMPCTRL_INTSEL(value) (AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos))
  404. #define AC_COMPCTRL_INTSEL_TOGGLE_Val _U_(0x0) /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */
  405. #define AC_COMPCTRL_INTSEL_RISING_Val _U_(0x1) /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */
  406. #define AC_COMPCTRL_INTSEL_FALLING_Val _U_(0x2) /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */
  407. #define AC_COMPCTRL_INTSEL_EOC_Val _U_(0x3) /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */
  408. #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos)
  409. #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos)
  410. #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos)
  411. #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos)
  412. #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */
  413. #define AC_COMPCTRL_MUXNEG_Msk (_U_(0x7) << AC_COMPCTRL_MUXNEG_Pos)
  414. #define AC_COMPCTRL_MUXNEG(value) (AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos))
  415. #define AC_COMPCTRL_MUXNEG_PIN0_Val _U_(0x0) /**< \brief (AC_COMPCTRL) I/O pin 0 */
  416. #define AC_COMPCTRL_MUXNEG_PIN1_Val _U_(0x1) /**< \brief (AC_COMPCTRL) I/O pin 1 */
  417. #define AC_COMPCTRL_MUXNEG_PIN2_Val _U_(0x2) /**< \brief (AC_COMPCTRL) I/O pin 2 */
  418. #define AC_COMPCTRL_MUXNEG_PIN3_Val _U_(0x3) /**< \brief (AC_COMPCTRL) I/O pin 3 */
  419. #define AC_COMPCTRL_MUXNEG_GND_Val _U_(0x4) /**< \brief (AC_COMPCTRL) Ground */
  420. #define AC_COMPCTRL_MUXNEG_VSCALE_Val _U_(0x5) /**< \brief (AC_COMPCTRL) VDD scaler */
  421. #define AC_COMPCTRL_MUXNEG_BANDGAP_Val _U_(0x6) /**< \brief (AC_COMPCTRL) Internal bandgap voltage */
  422. #define AC_COMPCTRL_MUXNEG_DAC_Val _U_(0x7) /**< \brief (AC_COMPCTRL) DAC output */
  423. #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos)
  424. #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos)
  425. #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos)
  426. #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos)
  427. #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos)
  428. #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos)
  429. #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos)
  430. #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos)
  431. #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */
  432. #define AC_COMPCTRL_MUXPOS_Msk (_U_(0x3) << AC_COMPCTRL_MUXPOS_Pos)
  433. #define AC_COMPCTRL_MUXPOS(value) (AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos))
  434. #define AC_COMPCTRL_MUXPOS_PIN0_Val _U_(0x0) /**< \brief (AC_COMPCTRL) I/O pin 0 */
  435. #define AC_COMPCTRL_MUXPOS_PIN1_Val _U_(0x1) /**< \brief (AC_COMPCTRL) I/O pin 1 */
  436. #define AC_COMPCTRL_MUXPOS_PIN2_Val _U_(0x2) /**< \brief (AC_COMPCTRL) I/O pin 2 */
  437. #define AC_COMPCTRL_MUXPOS_PIN3_Val _U_(0x3) /**< \brief (AC_COMPCTRL) I/O pin 3 */
  438. #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos)
  439. #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos)
  440. #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos)
  441. #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos)
  442. #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */
  443. #define AC_COMPCTRL_SWAP (_U_(0x1) << AC_COMPCTRL_SWAP_Pos)
  444. #define AC_COMPCTRL_OUT_Pos 16 /**< \brief (AC_COMPCTRL) Output */
  445. #define AC_COMPCTRL_OUT_Msk (_U_(0x3) << AC_COMPCTRL_OUT_Pos)
  446. #define AC_COMPCTRL_OUT(value) (AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos))
  447. #define AC_COMPCTRL_OUT_OFF_Val _U_(0x0) /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */
  448. #define AC_COMPCTRL_OUT_ASYNC_Val _U_(0x1) /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */
  449. #define AC_COMPCTRL_OUT_SYNC_Val _U_(0x2) /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */
  450. #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos)
  451. #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos)
  452. #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos)
  453. #define AC_COMPCTRL_HYST_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */
  454. #define AC_COMPCTRL_HYST (_U_(0x1) << AC_COMPCTRL_HYST_Pos)
  455. #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */
  456. #define AC_COMPCTRL_FLEN_Msk (_U_(0x7) << AC_COMPCTRL_FLEN_Pos)
  457. #define AC_COMPCTRL_FLEN(value) (AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos))
  458. #define AC_COMPCTRL_FLEN_OFF_Val _U_(0x0) /**< \brief (AC_COMPCTRL) No filtering */
  459. #define AC_COMPCTRL_FLEN_MAJ3_Val _U_(0x1) /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */
  460. #define AC_COMPCTRL_FLEN_MAJ5_Val _U_(0x2) /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */
  461. #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos)
  462. #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos)
  463. #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos)
  464. #define AC_COMPCTRL_MASK _U_(0x070BB76F) /**< \brief (AC_COMPCTRL) MASK Register */
  465. /* -------- AC_SCALER : (AC Offset: 0x20) (R/W 8) Scaler n -------- */
  466. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  467. typedef union {
  468. struct {
  469. uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */
  470. uint8_t :2; /*!< bit: 6.. 7 Reserved */
  471. } bit; /*!< Structure used for bit access */
  472. uint8_t reg; /*!< Type used for register access */
  473. } AC_SCALER_Type;
  474. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  475. #define AC_SCALER_OFFSET 0x20 /**< \brief (AC_SCALER offset) Scaler n */
  476. #define AC_SCALER_RESETVALUE _U_(0x00) /**< \brief (AC_SCALER reset_value) Scaler n */
  477. #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */
  478. #define AC_SCALER_VALUE_Msk (_U_(0x3F) << AC_SCALER_VALUE_Pos)
  479. #define AC_SCALER_VALUE(value) (AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos))
  480. #define AC_SCALER_MASK _U_(0x3F) /**< \brief (AC_SCALER) MASK Register */
  481. /** \brief AC hardware registers */
  482. #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  483. typedef struct {
  484. __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */
  485. __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */
  486. __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */
  487. __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */
  488. __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */
  489. __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */
  490. RoReg8 Reserved1[0x1];
  491. __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x08 (R/ 8) Status A */
  492. __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x09 (R/ 8) Status B */
  493. __I AC_STATUSC_Type STATUSC; /**< \brief Offset: 0x0A (R/ 8) Status C */
  494. RoReg8 Reserved2[0x1];
  495. __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0C (R/W 8) Window Control */
  496. RoReg8 Reserved3[0x3];
  497. __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */
  498. RoReg8 Reserved4[0x8];
  499. __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x20 (R/W 8) Scaler n */
  500. } Ac;
  501. #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
  502. /*@}*/
  503. #endif /* _SAMD11_AC_COMPONENT_ */