wizchip_conf.c 24 KB

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  1. //****************************************************************************/
  2. //!
  3. //! \file wizchip_conf.c
  4. //! \brief WIZCHIP Config Header File.
  5. //! \version 1.0.1
  6. //! \date 2013/10/21
  7. //! \par Revision history
  8. //! <2015/02/05> Notice
  9. //! The version history is not updated after this point.
  10. //! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
  11. //! >> https://github.com/Wiznet/ioLibrary_Driver
  12. //! <2014/05/01> V1.0.1 Refer to M20140501
  13. //! 1. Explicit type casting in wizchip_bus_readdata() & wizchip_bus_writedata()
  14. // Issued by Mathias ClauBen.
  15. //! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
  16. //! For remove the warning when pointer type size is not 32bit.
  17. //! If ptrdiff_t doesn't support in your complier, You should must replace ptrdiff_t into your suitable pointer type.
  18. //! <2013/10/21> 1st Release
  19. //! \author MidnightCow
  20. //! \copyright
  21. //!
  22. //! Copyright (c) 2013, WIZnet Co., LTD.
  23. //! All rights reserved.
  24. //!
  25. //! Redistribution and use in source and binary forms, with or without
  26. //! modification, are permitted provided that the following conditions
  27. //! are met:
  28. //!
  29. //! * Redistributions of source code must retain the above copyright
  30. //! notice, this list of conditions and the following disclaimer.
  31. //! * Redistributions in binary form must reproduce the above copyright
  32. //! notice, this list of conditions and the following disclaimer in the
  33. //! documentation and/or other materials provided with the distribution.
  34. //! * Neither the name of the <ORGANIZATION> nor the names of its
  35. //! contributors may be used to endorse or promote products derived
  36. //! from this software without specific prior written permission.
  37. //!
  38. //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  39. //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  40. //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  41. //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  42. //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  43. //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  44. //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  45. //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  46. //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  47. //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  48. //! THE POSSIBILITY OF SUCH DAMAGE.
  49. //
  50. //*****************************************************************************/
  51. //A20140501 : for use the type - ptrdiff_t
  52. #include <stddef.h>
  53. //
  54. #include "wizchip_conf.h"
  55. /////////////
  56. //M20150401 : Remove ; in the default callback function such as wizchip_cris_enter(), wizchip_cs_select() and etc.
  57. /////////////
  58. /**
  59. * @brief Default function to enable interrupt.
  60. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  61. * null function is called.
  62. */
  63. //void wizchip_cris_enter(void) {};
  64. void wizchip_cris_enter(void) {}
  65. /**
  66. * @brief Default function to disable interrupt.
  67. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  68. * null function is called.
  69. */
  70. //void wizchip_cris_exit(void) {};
  71. void wizchip_cris_exit(void) {}
  72. /**
  73. * @brief Default function to select chip.
  74. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  75. * null function is called.
  76. */
  77. //void wizchip_cs_select(void) {};
  78. void wizchip_cs_select(void) {}
  79. /**
  80. * @brief Default function to deselect chip.
  81. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  82. * null function is called.
  83. */
  84. //void wizchip_cs_deselect(void) {};
  85. void wizchip_cs_deselect(void) {}
  86. /**
  87. * @brief Default function to read in direct or indirect interface.
  88. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  89. * null function is called.
  90. */
  91. //M20150601 : Rename the function for integrating with W5300
  92. //uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }
  93. iodata_t wizchip_bus_readdata(uint32_t AddrSel) { return * ((volatile iodata_t *)((ptrdiff_t) AddrSel)); }
  94. /**
  95. * @brief Default function to write in direct or indirect interface.
  96. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  97. * null function is called.
  98. */
  99. //M20150601 : Rename the function for integrating with W5300
  100. //void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }
  101. void wizchip_bus_writedata(uint32_t AddrSel, iodata_t wb) { *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb; }
  102. /**
  103. * @brief Default function to read in SPI interface.
  104. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  105. * null function is called.
  106. */
  107. //uint8_t wizchip_spi_readbyte(void) {return 0;};
  108. uint8_t wizchip_spi_readbyte(void) {return 0;}
  109. /**
  110. * @brief Default function to write in SPI interface.
  111. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  112. * null function is called.
  113. */
  114. //void wizchip_spi_writebyte(uint8_t wb) {};
  115. void wizchip_spi_writebyte(uint8_t wb) {}
  116. /**
  117. * @brief Default function to burst read in SPI interface.
  118. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  119. * null function is called.
  120. */
  121. //void wizchip_spi_readburst(uint8_t* pBuf, uint16_t len) {};
  122. void wizchip_spi_readburst(uint8_t* pBuf, uint16_t len) {}
  123. /**
  124. * @brief Default function to burst write in SPI interface.
  125. * @note This function help not to access wrong address. If you do not describe this function or register any functions,
  126. * null function is called.
  127. */
  128. //void wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {};
  129. void wizchip_spi_writeburst(uint8_t* pBuf, uint16_t len) {}
  130. /**
  131. * @\ref _WIZCHIP instance
  132. */
  133. //
  134. //M20150401 : For a compiler didnot support a member of structure
  135. // Replace the assignment of struct members with the assingment of array
  136. //
  137. /*
  138. _WIZCHIP WIZCHIP =
  139. {
  140. .id = _WIZCHIP_ID_,
  141. .if_mode = _WIZCHIP_IO_MODE_,
  142. .CRIS._enter = wizchip_cris_enter,
  143. .CRIS._exit = wizchip_cris_exit,
  144. .CS._select = wizchip_cs_select,
  145. .CS._deselect = wizchip_cs_deselect,
  146. .IF.BUS._read_byte = wizchip_bus_readbyte,
  147. .IF.BUS._write_byte = wizchip_bus_writebyte
  148. // .IF.SPI._read_byte = wizchip_spi_readbyte,
  149. // .IF.SPI._write_byte = wizchip_spi_writebyte
  150. };
  151. */
  152. _WIZCHIP WIZCHIP =
  153. {
  154. _WIZCHIP_IO_MODE_,
  155. _WIZCHIP_ID_ ,
  156. {
  157. wizchip_cris_enter,
  158. wizchip_cris_exit
  159. },
  160. {
  161. wizchip_cs_select,
  162. wizchip_cs_deselect
  163. },
  164. {
  165. {
  166. //M20150601 : Rename the function
  167. //wizchip_bus_readbyte,
  168. //wizchip_bus_writebyte
  169. wizchip_bus_readdata,
  170. wizchip_bus_writedata
  171. },
  172. }
  173. };
  174. static uint8_t _DNS_[4]; // DNS server ip address
  175. static dhcp_mode _DHCP_; // DHCP mode
  176. void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
  177. {
  178. if(!cris_en || !cris_ex)
  179. {
  180. WIZCHIP.CRIS._enter = wizchip_cris_enter;
  181. WIZCHIP.CRIS._exit = wizchip_cris_exit;
  182. }
  183. else
  184. {
  185. WIZCHIP.CRIS._enter = cris_en;
  186. WIZCHIP.CRIS._exit = cris_ex;
  187. }
  188. }
  189. void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
  190. {
  191. if(!cs_sel || !cs_desel)
  192. {
  193. WIZCHIP.CS._select = wizchip_cs_select;
  194. WIZCHIP.CS._deselect = wizchip_cs_deselect;
  195. }
  196. else
  197. {
  198. WIZCHIP.CS._select = cs_sel;
  199. WIZCHIP.CS._deselect = cs_desel;
  200. }
  201. }
  202. //M20150515 : For integrating with W5300
  203. //void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
  204. void reg_wizchip_bus_cbfunc(iodata_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, iodata_t wb))
  205. {
  206. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
  207. //M20150601 : Rename call back function for integrating with W5300
  208. /*
  209. if(!bus_rb || !bus_wb)
  210. {
  211. WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
  212. WIZCHIP.IF.BUS._write_byte = wizchip_bus_writebyte;
  213. }
  214. else
  215. {
  216. WIZCHIP.IF.BUS._read_byte = bus_rb;
  217. WIZCHIP.IF.BUS._write_byte = bus_wb;
  218. }
  219. */
  220. if(!bus_rb || !bus_wb)
  221. {
  222. WIZCHIP.IF.BUS._read_data = wizchip_bus_readdata;
  223. WIZCHIP.IF.BUS._write_data = wizchip_bus_writedata;
  224. }
  225. else
  226. {
  227. WIZCHIP.IF.BUS._read_data = bus_rb;
  228. WIZCHIP.IF.BUS._write_data = bus_wb;
  229. }
  230. }
  231. void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
  232. {
  233. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
  234. if(!spi_rb || !spi_wb)
  235. {
  236. WIZCHIP.IF.SPI._read_byte = wizchip_spi_readbyte;
  237. WIZCHIP.IF.SPI._write_byte = wizchip_spi_writebyte;
  238. }
  239. else
  240. {
  241. WIZCHIP.IF.SPI._read_byte = spi_rb;
  242. WIZCHIP.IF.SPI._write_byte = spi_wb;
  243. }
  244. }
  245. // 20140626 Eric Added for SPI burst operations
  246. void reg_wizchip_spiburst_cbfunc(void (*spi_rb)(uint8_t* pBuf, uint16_t len), void (*spi_wb)(uint8_t* pBuf, uint16_t len))
  247. {
  248. while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
  249. if(!spi_rb || !spi_wb)
  250. {
  251. WIZCHIP.IF.SPI._read_burst = wizchip_spi_readburst;
  252. WIZCHIP.IF.SPI._write_burst = wizchip_spi_writeburst;
  253. }
  254. else
  255. {
  256. WIZCHIP.IF.SPI._read_burst = spi_rb;
  257. WIZCHIP.IF.SPI._write_burst = spi_wb;
  258. }
  259. }
  260. int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
  261. {
  262. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
  263. uint8_t tmp = 0;
  264. #endif
  265. uint8_t* ptmp[2] = {0,0};
  266. switch(cwtype)
  267. {
  268. case CW_RESET_WIZCHIP:
  269. wizchip_sw_reset();
  270. break;
  271. case CW_INIT_WIZCHIP:
  272. if(arg != 0)
  273. {
  274. ptmp[0] = (uint8_t*)arg;
  275. ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
  276. }
  277. return wizchip_init(ptmp[0], ptmp[1]);
  278. case CW_CLR_INTERRUPT:
  279. wizchip_clrinterrupt(*((intr_kind*)arg));
  280. break;
  281. case CW_GET_INTERRUPT:
  282. *((intr_kind*)arg) = wizchip_getinterrupt();
  283. break;
  284. case CW_SET_INTRMASK:
  285. wizchip_setinterruptmask(*((intr_kind*)arg));
  286. break;
  287. case CW_GET_INTRMASK:
  288. *((intr_kind*)arg) = wizchip_getinterruptmask();
  289. break;
  290. //M20150601 : This can be supported by W5200, W5500
  291. //#if _WIZCHIP_ > W5100
  292. #if (_WIZCHIP_ == W5200 || _WIZCHIP_ == W5500)
  293. case CW_SET_INTRTIME:
  294. setINTLEVEL(*(uint16_t*)arg);
  295. break;
  296. case CW_GET_INTRTIME:
  297. *(uint16_t*)arg = getINTLEVEL();
  298. break;
  299. #endif
  300. case CW_GET_ID:
  301. ((uint8_t*)arg)[0] = WIZCHIP.id[0];
  302. ((uint8_t*)arg)[1] = WIZCHIP.id[1];
  303. ((uint8_t*)arg)[2] = WIZCHIP.id[2];
  304. ((uint8_t*)arg)[3] = WIZCHIP.id[3];
  305. ((uint8_t*)arg)[4] = WIZCHIP.id[4];
  306. ((uint8_t*)arg)[5] = WIZCHIP.id[5];
  307. ((uint8_t*)arg)[6] = 0;
  308. break;
  309. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5500
  310. case CW_RESET_PHY:
  311. wizphy_reset();
  312. break;
  313. case CW_SET_PHYCONF:
  314. wizphy_setphyconf((wiz_PhyConf*)arg);
  315. break;
  316. case CW_GET_PHYCONF:
  317. wizphy_getphyconf((wiz_PhyConf*)arg);
  318. break;
  319. case CW_GET_PHYSTATUS:
  320. break;
  321. case CW_SET_PHYPOWMODE:
  322. return wizphy_setphypmode(*(uint8_t*)arg);
  323. #endif
  324. #if _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5500
  325. case CW_GET_PHYPOWMODE:
  326. tmp = wizphy_getphypmode();
  327. if((int8_t)tmp == -1) return -1;
  328. *(uint8_t*)arg = tmp;
  329. break;
  330. case CW_GET_PHYLINK:
  331. tmp = wizphy_getphylink();
  332. if((int8_t)tmp == -1) return -1;
  333. *(uint8_t*)arg = tmp;
  334. break;
  335. #endif
  336. default:
  337. return -1;
  338. }
  339. return 0;
  340. }
  341. int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
  342. {
  343. switch(cntype)
  344. {
  345. case CN_SET_NETINFO:
  346. wizchip_setnetinfo((wiz_NetInfo*)arg);
  347. break;
  348. case CN_GET_NETINFO:
  349. wizchip_getnetinfo((wiz_NetInfo*)arg);
  350. break;
  351. case CN_SET_NETMODE:
  352. return wizchip_setnetmode(*(netmode_type*)arg);
  353. case CN_GET_NETMODE:
  354. *(netmode_type*)arg = wizchip_getnetmode();
  355. break;
  356. case CN_SET_TIMEOUT:
  357. wizchip_settimeout((wiz_NetTimeout*)arg);
  358. break;
  359. case CN_GET_TIMEOUT:
  360. wizchip_gettimeout((wiz_NetTimeout*)arg);
  361. break;
  362. default:
  363. return -1;
  364. }
  365. return 0;
  366. }
  367. void wizchip_sw_reset(void)
  368. {
  369. uint8_t gw[4], sn[4], sip[4];
  370. uint8_t mac[6];
  371. //A20150601
  372. #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
  373. uint16_t mr = (uint16_t)getMR();
  374. setMR(mr | MR_IND);
  375. #endif
  376. //
  377. getSHAR(mac);
  378. getGAR(gw); getSUBR(sn); getSIPR(sip);
  379. setMR(MR_RST);
  380. getMR(); // for delay
  381. //A2015051 : For indirect bus mode
  382. #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
  383. setMR(mr | MR_IND);
  384. #endif
  385. //
  386. setSHAR(mac);
  387. setGAR(gw);
  388. setSUBR(sn);
  389. setSIPR(sip);
  390. }
  391. int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
  392. {
  393. int8_t i;
  394. #if _WIZCHIP_ < W5200
  395. int8_t j;
  396. #endif
  397. int8_t tmp = 0;
  398. wizchip_sw_reset();
  399. if(txsize)
  400. {
  401. tmp = 0;
  402. //M20150601 : For integrating with W5300
  403. #if _WIZCHIP_ == W5300
  404. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  405. {
  406. if(txsize[i] >= 64) return -1; //No use 64KB even if W5300 support max 64KB memory allocation
  407. tmp += txsize[i];
  408. if(tmp > 128) return -1;
  409. }
  410. if(tmp % 8) return -1;
  411. #else
  412. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  413. {
  414. tmp += txsize[i];
  415. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100 and w5100s
  416. if(tmp > 8) return -1;
  417. #else
  418. if(tmp > 16) return -1;
  419. #endif
  420. }
  421. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  422. {
  423. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100
  424. j = 0;
  425. while((txsize[i] >> j != 1)&&(txsize[i] !=0)){j++;}
  426. setSn_TXBUF_SIZE(i, j);
  427. #else
  428. setSn_TXBUF_SIZE(i, txsize[i]);
  429. #endif
  430. }
  431. #endif
  432. }
  433. if(rxsize)
  434. {
  435. tmp = 0;
  436. #if _WIZCHIP_ == W5300
  437. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  438. {
  439. if(rxsize[i] >= 64) return -1; //No use 64KB even if W5300 support max 64KB memory allocation
  440. tmp += rxsize[i];
  441. if(tmp > 128) return -1;
  442. }
  443. if(tmp % 8) return -1;
  444. #else
  445. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  446. {
  447. tmp += rxsize[i];
  448. #if _WIZCHIP_ < W5200 //2016.10.28 peter add condition for w5100 and w5100s
  449. if(tmp > 8) return -1;
  450. #else
  451. if(tmp > 16) return -1;
  452. #endif
  453. }
  454. for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
  455. {
  456. #if _WIZCHIP_ < W5200 // add condition for w5100
  457. j = 0;
  458. while((rxsize[i] >> j != 1)&&(txsize[i] !=0)){j++;}
  459. setSn_RXBUF_SIZE(i, j);
  460. #else
  461. setSn_RXBUF_SIZE(i, rxsize[i]);
  462. #endif
  463. }
  464. #endif
  465. }
  466. return 0;
  467. }
  468. void wizchip_clrinterrupt(intr_kind intr)
  469. {
  470. uint8_t ir = (uint8_t)intr;
  471. uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
  472. #if _WIZCHIP_ < W5500
  473. ir |= (1<<4); // IK_WOL
  474. #endif
  475. #if _WIZCHIP_ == W5200
  476. ir |= (1 << 6);
  477. #endif
  478. #if _WIZCHIP_ < W5200
  479. sir &= 0x0F;
  480. #endif
  481. #if _WIZCHIP_ <= W5100S
  482. ir |= sir;
  483. setIR(ir);
  484. //A20150601 : For integrating with W5300
  485. #elif _WIZCHIP_ == W5300
  486. setIR( ((((uint16_t)ir) << 8) | (((uint16_t)sir) & 0x00FF)) );
  487. #else
  488. setIR(ir);
  489. //M20200227 : For clear
  490. //setSIR(sir);
  491. for(ir=0; ir<8; ir++){
  492. if(sir & (0x01 <<ir) ) setSn_IR(ir, 0xff);
  493. }
  494. #endif
  495. }
  496. intr_kind wizchip_getinterrupt(void)
  497. {
  498. uint8_t ir = 0;
  499. uint8_t sir = 0;
  500. uint16_t ret = 0;
  501. #if _WIZCHIP_ <= W5100S
  502. ir = getIR();
  503. sir = ir & 0x0F;
  504. //A20150601 : For integrating with W5300
  505. #elif _WIZCHIP_ == W5300
  506. ret = getIR();
  507. ir = (uint8_t)(ret >> 8);
  508. sir = (uint8_t)ret;
  509. #else
  510. ir = getIR();
  511. sir = getSIR();
  512. #endif
  513. //M20150601 : For Integrating with W5300
  514. //#if _WIZCHIP_ < W5500
  515. #if _WIZCHIP_ < W5200
  516. ir &= ~(1<<4); // IK_WOL
  517. #endif
  518. #if _WIZCHIP_ == W5200
  519. ir &= ~(1 << 6);
  520. #endif
  521. ret = sir;
  522. ret = (ret << 8) + ir;
  523. return (intr_kind)ret;
  524. }
  525. void wizchip_setinterruptmask(intr_kind intr)
  526. {
  527. uint8_t imr = (uint8_t)intr;
  528. uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
  529. #if _WIZCHIP_ < W5500
  530. imr &= ~(1<<4); // IK_WOL
  531. #endif
  532. #if _WIZCHIP_ == W5200
  533. imr &= ~(1 << 6);
  534. #endif
  535. #if _WIZCHIP_ < W5200
  536. simr &= 0x0F;
  537. imr |= simr;
  538. setIMR(imr);
  539. //A20150601 : For integrating with W5300
  540. #elif _WIZCHIP_ == W5300
  541. setIMR( ((((uint16_t)imr) << 8) | (((uint16_t)simr) & 0x00FF)) );
  542. #else
  543. setIMR(imr);
  544. setSIMR(simr);
  545. #endif
  546. }
  547. intr_kind wizchip_getinterruptmask(void)
  548. {
  549. uint8_t imr = 0;
  550. uint8_t simr = 0;
  551. uint16_t ret = 0;
  552. #if _WIZCHIP_ < W5200
  553. imr = getIMR();
  554. simr = imr & 0x0F;
  555. //A20150601 : For integrating with W5300
  556. #elif _WIZCHIP_ == W5300
  557. ret = getIMR();
  558. imr = (uint8_t)(ret >> 8);
  559. simr = (uint8_t)ret;
  560. #else
  561. imr = getIMR();
  562. simr = getSIMR();
  563. #endif
  564. #if _WIZCHIP_ < W5500
  565. imr &= ~(1<<4); // IK_WOL
  566. #endif
  567. #if _WIZCHIP_ == W5200
  568. imr &= ~(1 << 6); // IK_DEST_UNREACH
  569. #endif
  570. ret = simr;
  571. ret = (ret << 8) + imr;
  572. return (intr_kind)ret;
  573. }
  574. int8_t wizphy_getphylink(void)
  575. {
  576. int8_t tmp = PHY_LINK_OFF;
  577. #if _WIZCHIP_ == W5100S
  578. if(getPHYSR() & PHYSR_LNK)
  579. tmp = PHY_LINK_ON;
  580. #elif _WIZCHIP_ == W5200
  581. if(getPHYSTATUS() & PHYSTATUS_LINK)
  582. tmp = PHY_LINK_ON;
  583. #elif _WIZCHIP_ == W5500
  584. if(getPHYCFGR() & PHYCFGR_LNK_ON)
  585. tmp = PHY_LINK_ON;
  586. #else
  587. tmp = -1;
  588. #endif
  589. return tmp;
  590. }
  591. #if _WIZCHIP_ > W5100
  592. int8_t wizphy_getphypmode(void)
  593. {
  594. int8_t tmp = 0;
  595. #if _WIZCHIP_ == W5200
  596. if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
  597. tmp = PHY_POWER_DOWN;
  598. else
  599. tmp = PHY_POWER_NORM;
  600. #elif _WIZCHIP_ == 5500
  601. if((getPHYCFGR() & PHYCFGR_OPMDC_ALLA) == PHYCFGR_OPMDC_PDOWN)
  602. tmp = PHY_POWER_DOWN;
  603. else
  604. tmp = PHY_POWER_NORM;
  605. #else
  606. tmp = -1;
  607. #endif
  608. return tmp;
  609. }
  610. #endif
  611. #if _WIZCHIP_ == W5100S
  612. void wizphy_reset(void)
  613. {
  614. uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
  615. tmp |= BMCR_RESET;
  616. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  617. while(wiz_mdio_read(PHYMDIO_BMCR)&BMCR_RESET){}
  618. }
  619. void wizphy_setphyconf(wiz_PhyConf* phyconf)
  620. {
  621. uint16_t tmp = wiz_mdio_read(PHYMDIO_BMCR);
  622. if(phyconf->mode == PHY_MODE_AUTONEGO)
  623. tmp |= BMCR_AUTONEGO;
  624. else
  625. {
  626. tmp &= ~BMCR_AUTONEGO;
  627. if(phyconf->duplex == PHY_DUPLEX_FULL)
  628. {
  629. tmp |= BMCR_DUP;
  630. }
  631. else
  632. {
  633. tmp &= ~BMCR_DUP;
  634. }
  635. if(phyconf->speed == PHY_SPEED_100)
  636. {
  637. tmp |= BMCR_SPEED;
  638. }
  639. else
  640. {
  641. tmp &= ~BMCR_SPEED;
  642. }
  643. }
  644. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  645. }
  646. void wizphy_getphyconf(wiz_PhyConf* phyconf)
  647. {
  648. uint16_t tmp = 0;
  649. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  650. phyconf->by = PHY_CONFBY_SW;
  651. if(tmp & BMCR_AUTONEGO)
  652. {
  653. phyconf->mode = PHY_MODE_AUTONEGO;
  654. }
  655. else
  656. {
  657. phyconf->mode = PHY_MODE_MANUAL;
  658. if(tmp&BMCR_DUP) phyconf->duplex = PHY_DUPLEX_FULL;
  659. else phyconf->duplex = PHY_DUPLEX_HALF;
  660. if(tmp&BMCR_SPEED) phyconf->speed = PHY_SPEED_100;
  661. else phyconf->speed = PHY_SPEED_10;
  662. }
  663. }
  664. int8_t wizphy_setphypmode(uint8_t pmode)
  665. {
  666. uint16_t tmp = 0;
  667. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  668. if( pmode == PHY_POWER_DOWN)
  669. {
  670. tmp |= BMCR_PWDN;
  671. }
  672. else
  673. {
  674. tmp &= ~BMCR_PWDN;
  675. }
  676. wiz_mdio_write(PHYMDIO_BMCR, tmp);
  677. tmp = wiz_mdio_read(PHYMDIO_BMCR);
  678. if( pmode == PHY_POWER_DOWN)
  679. {
  680. if(tmp & BMCR_PWDN) return 0;
  681. }
  682. else
  683. {
  684. if((tmp & BMCR_PWDN) != BMCR_PWDN) return 0;
  685. }
  686. return -1;
  687. }
  688. #endif
  689. #if _WIZCHIP_ == W5500
  690. void wizphy_reset(void)
  691. {
  692. uint8_t tmp = getPHYCFGR();
  693. tmp &= PHYCFGR_RST;
  694. setPHYCFGR(tmp);
  695. tmp = getPHYCFGR();
  696. tmp |= ~PHYCFGR_RST;
  697. setPHYCFGR(tmp);
  698. }
  699. void wizphy_setphyconf(wiz_PhyConf* phyconf)
  700. {
  701. uint8_t tmp = 0;
  702. if(phyconf->by == PHY_CONFBY_SW)
  703. tmp |= PHYCFGR_OPMD;
  704. else
  705. tmp &= ~PHYCFGR_OPMD;
  706. if(phyconf->mode == PHY_MODE_AUTONEGO)
  707. tmp |= PHYCFGR_OPMDC_ALLA;
  708. else
  709. {
  710. if(phyconf->duplex == PHY_DUPLEX_FULL)
  711. {
  712. if(phyconf->speed == PHY_SPEED_100)
  713. tmp |= PHYCFGR_OPMDC_100F;
  714. else
  715. tmp |= PHYCFGR_OPMDC_10F;
  716. }
  717. else
  718. {
  719. if(phyconf->speed == PHY_SPEED_100)
  720. tmp |= PHYCFGR_OPMDC_100H;
  721. else
  722. tmp |= PHYCFGR_OPMDC_10H;
  723. }
  724. }
  725. setPHYCFGR(tmp);
  726. wizphy_reset();
  727. }
  728. void wizphy_getphyconf(wiz_PhyConf* phyconf)
  729. {
  730. uint8_t tmp = 0;
  731. tmp = getPHYCFGR();
  732. phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
  733. switch(tmp & PHYCFGR_OPMDC_ALLA)
  734. {
  735. case PHYCFGR_OPMDC_ALLA:
  736. case PHYCFGR_OPMDC_100FA:
  737. phyconf->mode = PHY_MODE_AUTONEGO;
  738. break;
  739. default:
  740. phyconf->mode = PHY_MODE_MANUAL;
  741. break;
  742. }
  743. switch(tmp & PHYCFGR_OPMDC_ALLA)
  744. {
  745. case PHYCFGR_OPMDC_100FA:
  746. case PHYCFGR_OPMDC_100F:
  747. case PHYCFGR_OPMDC_100H:
  748. phyconf->speed = PHY_SPEED_100;
  749. break;
  750. default:
  751. phyconf->speed = PHY_SPEED_10;
  752. break;
  753. }
  754. switch(tmp & PHYCFGR_OPMDC_ALLA)
  755. {
  756. case PHYCFGR_OPMDC_100FA:
  757. case PHYCFGR_OPMDC_100F:
  758. case PHYCFGR_OPMDC_10F:
  759. phyconf->duplex = PHY_DUPLEX_FULL;
  760. break;
  761. default:
  762. phyconf->duplex = PHY_DUPLEX_HALF;
  763. break;
  764. }
  765. }
  766. void wizphy_getphystat(wiz_PhyConf* phyconf)
  767. {
  768. uint8_t tmp = getPHYCFGR();
  769. phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
  770. phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
  771. }
  772. int8_t wizphy_setphypmode(uint8_t pmode)
  773. {
  774. uint8_t tmp = 0;
  775. tmp = getPHYCFGR();
  776. if((tmp & PHYCFGR_OPMD)== 0) return -1;
  777. tmp &= ~PHYCFGR_OPMDC_ALLA;
  778. if( pmode == PHY_POWER_DOWN)
  779. tmp |= PHYCFGR_OPMDC_PDOWN;
  780. else
  781. tmp |= PHYCFGR_OPMDC_ALLA;
  782. setPHYCFGR(tmp);
  783. wizphy_reset();
  784. tmp = getPHYCFGR();
  785. if( pmode == PHY_POWER_DOWN)
  786. {
  787. if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
  788. }
  789. else
  790. {
  791. if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
  792. }
  793. return -1;
  794. }
  795. #endif
  796. void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
  797. {
  798. setSHAR(pnetinfo->mac);
  799. setGAR(pnetinfo->gw);
  800. setSUBR(pnetinfo->sn);
  801. setSIPR(pnetinfo->ip);
  802. _DNS_[0] = pnetinfo->dns[0];
  803. _DNS_[1] = pnetinfo->dns[1];
  804. _DNS_[2] = pnetinfo->dns[2];
  805. _DNS_[3] = pnetinfo->dns[3];
  806. _DHCP_ = pnetinfo->dhcp;
  807. }
  808. void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
  809. {
  810. getSHAR(pnetinfo->mac);
  811. getGAR(pnetinfo->gw);
  812. getSUBR(pnetinfo->sn);
  813. getSIPR(pnetinfo->ip);
  814. pnetinfo->dns[0]= _DNS_[0];
  815. pnetinfo->dns[1]= _DNS_[1];
  816. pnetinfo->dns[2]= _DNS_[2];
  817. pnetinfo->dns[3]= _DNS_[3];
  818. pnetinfo->dhcp = _DHCP_;
  819. }
  820. int8_t wizchip_setnetmode(netmode_type netmode)
  821. {
  822. uint8_t tmp = 0;
  823. #if _WIZCHIP_ != W5500
  824. if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
  825. #else
  826. if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
  827. #endif
  828. tmp = getMR();
  829. tmp |= (uint8_t)netmode;
  830. setMR(tmp);
  831. return 0;
  832. }
  833. netmode_type wizchip_getnetmode(void)
  834. {
  835. return (netmode_type) getMR();
  836. }
  837. void wizchip_settimeout(wiz_NetTimeout* nettime)
  838. {
  839. setRCR(nettime->retry_cnt);
  840. setRTR(nettime->time_100us);
  841. }
  842. void wizchip_gettimeout(wiz_NetTimeout* nettime)
  843. {
  844. nettime->retry_cnt = getRCR();
  845. nettime->time_100us = getRTR();
  846. }