api-hal-subghz.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560
  1. #include "api-hal-subghz.h"
  2. #include <api-hal-gpio.h>
  3. #include <api-hal-spi.h>
  4. #include <api-hal-interrupt.h>
  5. #include <api-hal-resources.h>
  6. #include <furi.h>
  7. #include <cc1101.h>
  8. #include <stdio.h>
  9. static volatile SubGhzState api_hal_subghz_state = SubGhzStateInit;
  10. static const uint8_t api_hal_subghz_preset_ook_async_regs[][2] = {
  11. /* Base setting */
  12. { CC1101_IOCFG0, 0x0D }, // GD0 as async serial data output/input
  13. { CC1101_MCSM0, 0x18 }, // Autocalibrate on idle to TRX, ~150us OSC guard time
  14. /* Async OOK Specific things */
  15. { CC1101_MDMCFG2, 0x30 }, // ASK/OOK, No preamble/sync
  16. { CC1101_PKTCTRL0, 0x32 }, // Async, no CRC, Infinite
  17. { CC1101_FREND0, 0x01 }, // OOK/ASK PATABLE
  18. /* End */
  19. { 0, 0 },
  20. };
  21. static const uint8_t api_hal_subghz_preset_ook_async_patable[8] = {
  22. 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  23. };
  24. static const uint8_t api_hal_subghz_preset_mp_regs[][2] = {
  25. //https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
  26. //конфигугация GO0
  27. { CC1101_IOCFG0, 0x0D }, //Конфигурация вывода GDO2, Инвертирование логического уровня: низкий = "1", высокий = "0"
  28. { CC1101_FIFOTHR, 0x47 }, //Пороги RX FIFO и TX FIFO
  29. //настройка синтезатора частоты
  30. { CC1101_PKTCTRL0, 0x32 },
  31. //{ CC1101_FSCTRL1, 0x0E },
  32. { CC1101_FSCTRL1, 0x06 },
  33. //настройка частоты
  34. { CC1101_FREQ2, 0x10 },
  35. { CC1101_FREQ1, 0xB0 },
  36. { CC1101_FREQ0, 0x7F },
  37. //{ CC1101_MDMCFG4, 0x17 }, //ширина диапазона фильтра канала 650кГц изменить CC1101_FIFOTHR 0х07, CC1101_TEST2 0х88, CC1101_TEST1 0х31
  38. { CC1101_MDMCFG4, 0x67 }, //ширина диапазона фильтра канала 270кГц изменить CC1101_FIFOTHR 0х47, CC1101_TEST2 0х81, CC1101_TEST1 0х35
  39. //{ CC1101_MDMCFG4, 0xC7 }, //ширина диапазона фильтра канала 101кГц изменить CC1101_FIFOTHR 0х47, CC1101_TEST2 0х81, CC1101_TEST1 0х35
  40. { CC1101_MDMCFG3, 0x32 }, //Мантисса пользовательской скорости символов
  41. //настройка модуляции
  42. { CC1101_MDMCFG2, 0x30 }, //<---OOK/ASK без преамбулы, без манчестерского кодирования
  43. { CC1101_MDMCFG1, 0x23 },
  44. { CC1101_MDMCFG0, 0xF8 },
  45. { CC1101_MCSM0, 0x18 }, //Конфигурация конечного автомата управления радио
  46. { CC1101_FOCCFG, 0x18 },
  47. //настройки АРУ
  48. { CC1101_AGCTRL2, 0x07 }, // MAGN_TARGET для фильтра RX BW = <100 кГц составляет 0x3. Для более высокого фильтра RX MAGN_TARGET BW равен 0x7.
  49. { CC1101_AGCTRL1, 0x00 },
  50. { CC1101_AGCTRL0, 0x91 },
  51. // { CC1101_AGCTRL2, 0x03 },
  52. // { CC1101_AGCTRL1, 0x00 },
  53. // { CC1101_AGCTRL0, 0x40 },
  54. // { CC1101_AGCTRL2, 0x07 },
  55. // { CC1101_AGCTRL1, 0x47 },
  56. // { CC1101_AGCTRL0, 0x91 },
  57. { CC1101_WORCTRL, 0xFB },
  58. //настройка RX тракта FREND1 зависит от полосы пропускания фильтра RX: 0xB6, если полоса фильтра RX> 100 кГц, иначе 0x56
  59. //{ CC1101_FREND1, 0x56 },
  60. { CC1101_FREND1, 0xB6 },
  61. //настрйока TX тракта
  62. { CC1101_FREND0, 0x11 },
  63. //{ CC1101_FREND0, 0x01 },
  64. //Калибровка синтезатора частоты
  65. { CC1101_FSCAL3, 0xE9 },
  66. { CC1101_FSCAL2, 0x2A },
  67. { CC1101_FSCAL1, 0x00 },
  68. { CC1101_FSCAL0, 0x1F },
  69. //Если вы используете TEST2 = 0x81, TEST1 = 0x35 (применимо, если фильтр RX <325 кГц),
  70. // обязательно установите FIFOTHR [6] = 1; иначе TEST2 = 0x88, TEST1 = 0x31 и FIFOTHR [6] = 0
  71. { CC1101_TEST2, 0x81 },
  72. { CC1101_TEST1, 0x35 },
  73. { CC1101_TEST0, 0x09 },
  74. /* End */
  75. { 0, 0 },
  76. };
  77. static const uint8_t api_hal_subghz_preset_mp_patable[8] = {
  78. 0x00,
  79. 0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
  80. 0x00,
  81. 0x00,
  82. 0x00,
  83. 0x00,
  84. 0x00,
  85. 0x00
  86. };
  87. static const uint8_t api_hal_subghz_preset_2fsk_packet_regs[][2] = {
  88. /* Base setting */
  89. { CC1101_IOCFG0, 0x06 }, // GD0 as async serial data output/input
  90. { CC1101_MCSM0, 0x18 }, // Autocalibrate on idle to TRX, ~150us OSC guard time
  91. /* Magic */
  92. { CC1101_TEST2, 0x81},
  93. { CC1101_TEST1, 0x35},
  94. { CC1101_TEST0, 0x09},
  95. /* End */
  96. { 0, 0 },
  97. };
  98. static const uint8_t api_hal_subghz_preset_2fsk_packet_patable[8] = {
  99. 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  100. };
  101. void api_hal_subghz_init() {
  102. furi_assert(api_hal_subghz_state == SubGhzStateInit);
  103. api_hal_subghz_state = SubGhzStateIdle;
  104. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  105. #ifdef API_HAL_SUBGHZ_TX_GPIO
  106. hal_gpio_init(&API_HAL_SUBGHZ_TX_GPIO, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
  107. #endif
  108. // Reset
  109. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  110. cc1101_reset(device);
  111. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
  112. // Prepare GD0 for power on self test
  113. hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
  114. // GD0 low
  115. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHW);
  116. while(hal_gpio_read(&gpio_cc1101_g0) != false);
  117. // GD0 high
  118. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
  119. while(hal_gpio_read(&gpio_cc1101_g0) != true);
  120. // Reset GD0 to floating state
  121. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
  122. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  123. // RF switches
  124. hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
  125. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
  126. // Go to sleep
  127. cc1101_shutdown(device);
  128. api_hal_spi_device_return(device);
  129. }
  130. void api_hal_subghz_sleep() {
  131. furi_assert(api_hal_subghz_state == SubGhzStateIdle);
  132. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  133. cc1101_switch_to_idle(device);
  134. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
  135. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  136. cc1101_shutdown(device);
  137. api_hal_spi_device_return(device);
  138. }
  139. void api_hal_subghz_dump_state() {
  140. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  141. printf(
  142. "[api_hal_subghz] cc1101 chip %d, version %d\r\n",
  143. cc1101_get_partnumber(device),
  144. cc1101_get_version(device)
  145. );
  146. api_hal_spi_device_return(device);
  147. }
  148. void api_hal_subghz_load_preset(ApiHalSubGhzPreset preset) {
  149. if(preset == ApiHalSubGhzPresetOokAsync) {
  150. api_hal_subghz_load_registers(api_hal_subghz_preset_ook_async_regs);
  151. api_hal_subghz_load_patable(api_hal_subghz_preset_ook_async_patable);
  152. } else if(preset == ApiHalSubGhzPreset2FskPacket) {
  153. api_hal_subghz_load_registers(api_hal_subghz_preset_2fsk_packet_regs);
  154. api_hal_subghz_load_patable(api_hal_subghz_preset_2fsk_packet_patable);
  155. } else if(preset == ApiHalSubGhzPresetMP) {
  156. api_hal_subghz_load_registers(api_hal_subghz_preset_mp_regs);
  157. api_hal_subghz_load_patable(api_hal_subghz_preset_mp_patable);
  158. }
  159. }
  160. uint8_t api_hal_subghz_get_status() {
  161. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  162. CC1101StatusRaw st;
  163. st.status = cc1101_get_status(device);
  164. api_hal_spi_device_return(device);
  165. return st.status_raw;
  166. }
  167. void api_hal_subghz_load_registers(const uint8_t data[][2]) {
  168. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  169. cc1101_reset(device);
  170. uint32_t i = 0;
  171. while (data[i][0]) {
  172. cc1101_write_reg(device, data[i][0], data[i][1]);
  173. i++;
  174. }
  175. api_hal_spi_device_return(device);
  176. }
  177. void api_hal_subghz_load_patable(const uint8_t data[8]) {
  178. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  179. cc1101_set_pa_table(device, data);
  180. api_hal_spi_device_return(device);
  181. }
  182. void api_hal_subghz_write_packet(const uint8_t* data, uint8_t size) {
  183. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  184. cc1101_flush_tx(device);
  185. cc1101_write_fifo(device, data, size);
  186. api_hal_spi_device_return(device);
  187. }
  188. void api_hal_subghz_flush_rx() {
  189. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  190. cc1101_flush_rx(device);
  191. api_hal_spi_device_return(device);
  192. }
  193. void api_hal_subghz_read_packet(uint8_t* data, uint8_t* size) {
  194. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  195. cc1101_read_fifo(device, data, size);
  196. api_hal_spi_device_return(device);
  197. }
  198. void api_hal_subghz_shutdown() {
  199. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  200. // Reset and shutdown
  201. cc1101_shutdown(device);
  202. api_hal_spi_device_return(device);
  203. }
  204. void api_hal_subghz_reset() {
  205. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  206. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  207. cc1101_switch_to_idle(device);
  208. cc1101_reset(device);
  209. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
  210. api_hal_spi_device_return(device);
  211. }
  212. void api_hal_subghz_idle() {
  213. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  214. cc1101_switch_to_idle(device);
  215. api_hal_spi_device_return(device);
  216. }
  217. void api_hal_subghz_rx() {
  218. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  219. cc1101_switch_to_rx(device);
  220. api_hal_spi_device_return(device);
  221. }
  222. void api_hal_subghz_tx() {
  223. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  224. cc1101_switch_to_tx(device);
  225. api_hal_spi_device_return(device);
  226. }
  227. float api_hal_subghz_get_rssi() {
  228. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  229. int32_t rssi_dec = cc1101_get_rssi(device);
  230. api_hal_spi_device_return(device);
  231. float rssi = rssi_dec;
  232. if(rssi_dec >= 128) {
  233. rssi = ((rssi - 256.0f) / 2.0f) - 74.0f;
  234. } else {
  235. rssi = (rssi / 2.0f) - 74.0f;
  236. }
  237. return rssi;
  238. }
  239. uint32_t api_hal_subghz_set_frequency_and_path(uint32_t value) {
  240. value = api_hal_subghz_set_frequency(value);
  241. if(value >= 300000000 && value <= 348000335) {
  242. api_hal_subghz_set_path(ApiHalSubGhzPath315);
  243. } else if(value >= 387000000 && value <= 464000000) {
  244. api_hal_subghz_set_path(ApiHalSubGhzPath433);
  245. } else if(value >= 779000000 && value <= 928000000) {
  246. api_hal_subghz_set_path(ApiHalSubGhzPath868);
  247. } else {
  248. furi_check(0);
  249. }
  250. return value;
  251. }
  252. uint32_t api_hal_subghz_set_frequency(uint32_t value) {
  253. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  254. // Compensate rounding
  255. if (value % cc1101_get_frequency_step(device) > (cc1101_get_frequency_step(device) / 2)) {
  256. value += cc1101_get_frequency_step(device);
  257. }
  258. uint32_t real_frequency = cc1101_set_frequency(device, value);
  259. cc1101_calibrate(device);
  260. api_hal_spi_device_return(device);
  261. return real_frequency;
  262. }
  263. void api_hal_subghz_set_path(ApiHalSubGhzPath path) {
  264. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  265. if (path == ApiHalSubGhzPath433) {
  266. hal_gpio_write(&gpio_rf_sw_0, 0);
  267. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
  268. } else if (path == ApiHalSubGhzPath315) {
  269. hal_gpio_write(&gpio_rf_sw_0, 1);
  270. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
  271. } else if (path == ApiHalSubGhzPath868) {
  272. hal_gpio_write(&gpio_rf_sw_0, 1);
  273. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
  274. } else if (path == ApiHalSubGhzPathIsolate) {
  275. hal_gpio_write(&gpio_rf_sw_0, 0);
  276. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
  277. } else {
  278. furi_check(0);
  279. }
  280. api_hal_spi_device_return(device);
  281. }
  282. volatile uint32_t api_hal_subghz_capture_delta_duration = 0;
  283. volatile ApiHalSubGhzCaptureCallback api_hal_subghz_capture_callback = NULL;
  284. volatile void* api_hal_subghz_capture_callback_context = NULL;
  285. static void api_hal_subghz_capture_ISR() {
  286. // Channel 1
  287. if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
  288. LL_TIM_ClearFlag_CC1(TIM2);
  289. api_hal_subghz_capture_delta_duration = LL_TIM_IC_GetCaptureCH1(TIM2);
  290. if (api_hal_subghz_capture_callback) {
  291. api_hal_subghz_capture_callback(true, api_hal_subghz_capture_delta_duration,
  292. (void*)api_hal_subghz_capture_callback_context
  293. );
  294. }
  295. }
  296. // Channel 2
  297. if(LL_TIM_IsActiveFlag_CC2(TIM2)) {
  298. LL_TIM_ClearFlag_CC2(TIM2);
  299. if (api_hal_subghz_capture_callback) {
  300. api_hal_subghz_capture_callback(false, LL_TIM_IC_GetCaptureCH2(TIM2) - api_hal_subghz_capture_delta_duration,
  301. (void*)api_hal_subghz_capture_callback_context
  302. );
  303. }
  304. }
  305. }
  306. void api_hal_subghz_set_async_rx_callback(ApiHalSubGhzCaptureCallback callback, void* context) {
  307. api_hal_subghz_capture_callback = callback;
  308. api_hal_subghz_capture_callback_context = context;
  309. }
  310. void api_hal_subghz_start_async_rx() {
  311. furi_assert(api_hal_subghz_state == SubGhzStateIdle);
  312. api_hal_subghz_state = SubGhzStateAsyncRx;
  313. hal_gpio_init_ex(&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
  314. // Timer: base
  315. LL_TIM_InitTypeDef TIM_InitStruct = {0};
  316. TIM_InitStruct.Prescaler = 64-1;
  317. TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
  318. TIM_InitStruct.Autoreload = 0x7FFFFFFE;
  319. TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
  320. LL_TIM_Init(TIM2, &TIM_InitStruct);
  321. // Timer: advanced
  322. LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
  323. LL_TIM_DisableARRPreload(TIM2);
  324. LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
  325. LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
  326. LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
  327. LL_TIM_EnableMasterSlaveMode(TIM2);
  328. LL_TIM_DisableDMAReq_TRIG(TIM2);
  329. LL_TIM_DisableIT_TRIG(TIM2);
  330. // Timer: channel 1 indirect
  331. LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
  332. LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
  333. LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
  334. LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
  335. // Timer: channel 2 direct
  336. LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
  337. LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
  338. LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
  339. LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV1);
  340. // ISR setup
  341. api_hal_interrupt_set_timer_isr(TIM2, api_hal_subghz_capture_ISR);
  342. NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),5, 0));
  343. NVIC_EnableIRQ(TIM2_IRQn);
  344. // Interrupts and channels
  345. LL_TIM_EnableIT_CC1(TIM2);
  346. LL_TIM_EnableIT_CC2(TIM2);
  347. LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
  348. LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
  349. // Start timer
  350. LL_TIM_SetCounter(TIM2, 0);
  351. LL_TIM_EnableCounter(TIM2);
  352. // Switch to RX
  353. api_hal_subghz_rx();
  354. }
  355. void api_hal_subghz_stop_async_rx() {
  356. furi_assert(api_hal_subghz_state == SubGhzStateAsyncRx);
  357. api_hal_subghz_state = SubGhzStateIdle;
  358. // Shutdown radio
  359. api_hal_subghz_idle();
  360. LL_TIM_DeInit(TIM2);
  361. api_hal_interrupt_set_timer_isr(TIM2, NULL);
  362. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  363. }
  364. volatile size_t api_hal_subghz_tx_repeat = 0;
  365. static void api_hal_subghz_tx_dma_isr() {
  366. if (LL_DMA_IsActiveFlag_TC1(DMA1)) {
  367. LL_DMA_ClearFlag_TC1(DMA1);
  368. furi_assert(api_hal_subghz_state == SubGhzStateAsyncTx);
  369. if (--api_hal_subghz_tx_repeat == 0) {
  370. api_hal_subghz_state = SubGhzStateAsyncTxLast;
  371. LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_1);
  372. }
  373. }
  374. }
  375. static void api_hal_subghz_tx_timer_isr() {
  376. if(LL_TIM_IsActiveFlag_UPDATE(TIM2)) {
  377. LL_TIM_ClearFlag_UPDATE(TIM2);
  378. if (api_hal_subghz_state == SubGhzStateAsyncTxLast) {
  379. LL_TIM_DisableCounter(TIM2);
  380. api_hal_subghz_state = SubGhzStateAsyncTxEnd;
  381. }
  382. }
  383. }
  384. void api_hal_subghz_start_async_tx(uint32_t* buffer, size_t buffer_size, size_t repeat) {
  385. furi_assert(api_hal_subghz_state == SubGhzStateIdle);
  386. api_hal_subghz_state = SubGhzStateAsyncTx;
  387. api_hal_subghz_tx_repeat = repeat;
  388. // Connect CC1101_GD0 to TIM2 as output
  389. hal_gpio_init_ex(&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullDown, GpioSpeedLow, GpioAltFn1TIM2);
  390. // Configure DMA
  391. LL_DMA_InitTypeDef dma_config = {0};
  392. dma_config.PeriphOrM2MSrcAddress = (uint32_t)&(TIM2->ARR);
  393. dma_config.MemoryOrM2MDstAddress = (uint32_t)buffer;
  394. dma_config.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
  395. dma_config.Mode = LL_DMA_MODE_CIRCULAR;
  396. dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
  397. dma_config.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
  398. dma_config.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
  399. dma_config.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
  400. dma_config.NbData = buffer_size / sizeof(uint32_t);
  401. dma_config.PeriphRequest = LL_DMAMUX_REQ_TIM2_UP;
  402. dma_config.Priority = LL_DMA_MODE_NORMAL;
  403. LL_DMA_Init(DMA1, LL_DMA_CHANNEL_1, &dma_config);
  404. api_hal_interrupt_set_dma_channel_isr(DMA1, LL_DMA_CHANNEL_1, api_hal_subghz_tx_dma_isr);
  405. LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
  406. LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
  407. // Configure TIM2
  408. LL_TIM_InitTypeDef TIM_InitStruct = {0};
  409. TIM_InitStruct.Prescaler = 64-1;
  410. TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
  411. TIM_InitStruct.Autoreload = 1000;
  412. TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
  413. LL_TIM_Init(TIM2, &TIM_InitStruct);
  414. LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
  415. LL_TIM_EnableARRPreload(TIM2);
  416. // Configure TIM2 CH2
  417. LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0};
  418. TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_TOGGLE;
  419. TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
  420. TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
  421. TIM_OC_InitStruct.CompareValue = 0;
  422. TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
  423. LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH2, &TIM_OC_InitStruct);
  424. LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH2);
  425. LL_TIM_DisableMasterSlaveMode(TIM2);
  426. api_hal_interrupt_set_timer_isr(TIM2, api_hal_subghz_tx_timer_isr);
  427. LL_TIM_EnableIT_UPDATE(TIM2);
  428. LL_TIM_EnableDMAReq_UPDATE(TIM2);
  429. LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
  430. // Start counter
  431. LL_TIM_GenerateEvent_UPDATE(TIM2);
  432. #ifdef API_HAL_SUBGHZ_TX_GPIO
  433. hal_gpio_write(&API_HAL_SUBGHZ_TX_GPIO, true);
  434. #endif
  435. api_hal_subghz_tx();
  436. LL_TIM_SetCounter(TIM2, 0);
  437. LL_TIM_EnableCounter(TIM2);
  438. }
  439. void api_hal_subghz_wait_async_tx() {
  440. while(api_hal_subghz_state != SubGhzStateAsyncTxEnd) osDelay(1);
  441. }
  442. void api_hal_subghz_stop_async_tx() {
  443. furi_assert(api_hal_subghz_state == SubGhzStateAsyncTxEnd);
  444. api_hal_subghz_state = SubGhzStateIdle;
  445. // Shutdown radio
  446. api_hal_subghz_idle();
  447. #ifdef API_HAL_SUBGHZ_TX_GPIO
  448. hal_gpio_write(&API_HAL_SUBGHZ_TX_GPIO, false);
  449. #endif
  450. // Deinitialize Timer
  451. LL_TIM_DeInit(TIM2);
  452. api_hal_interrupt_set_timer_isr(TIM2, NULL);
  453. // Deinitialize DMA
  454. LL_DMA_DeInit(DMA1, LL_DMA_CHANNEL_1);
  455. api_hal_interrupt_set_dma_channel_isr(DMA1, LL_DMA_CHANNEL_1, NULL);
  456. // Deinitialize GPIO
  457. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  458. }