furi_hal_interrupt.c 7.3 KB

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  1. #include "furi_hal_interrupt.h"
  2. #include "furi_hal_os.h"
  3. #include <furi.h>
  4. #include <stm32wbxx.h>
  5. #include <stm32wbxx_ll_tim.h>
  6. #include <stm32wbxx_ll_rcc.h>
  7. #define TAG "FuriHalInterrupt"
  8. #define FURI_HAL_INTERRUPT_DEFAULT_PRIORITY 5
  9. typedef struct {
  10. FuriHalInterruptISR isr;
  11. void* context;
  12. } FuriHalInterruptISRPair;
  13. FuriHalInterruptISRPair furi_hal_interrupt_isr[FuriHalInterruptIdMax] = {0};
  14. const IRQn_Type furi_hal_interrupt_irqn[FuriHalInterruptIdMax] = {
  15. // TIM1, TIM16, TIM17
  16. [FuriHalInterruptIdTim1TrgComTim17] = TIM1_TRG_COM_TIM17_IRQn,
  17. [FuriHalInterruptIdTim1Cc] = TIM1_CC_IRQn,
  18. [FuriHalInterruptIdTim1UpTim16] = TIM1_UP_TIM16_IRQn,
  19. // TIM2
  20. [FuriHalInterruptIdTIM2] = TIM2_IRQn,
  21. // DMA1
  22. [FuriHalInterruptIdDma1Ch1] = DMA1_Channel1_IRQn,
  23. [FuriHalInterruptIdDma1Ch2] = DMA1_Channel2_IRQn,
  24. [FuriHalInterruptIdDma1Ch3] = DMA1_Channel3_IRQn,
  25. [FuriHalInterruptIdDma1Ch4] = DMA1_Channel4_IRQn,
  26. [FuriHalInterruptIdDma1Ch5] = DMA1_Channel5_IRQn,
  27. [FuriHalInterruptIdDma1Ch6] = DMA1_Channel6_IRQn,
  28. [FuriHalInterruptIdDma1Ch7] = DMA1_Channel7_IRQn,
  29. // DMA2
  30. [FuriHalInterruptIdDma2Ch1] = DMA2_Channel1_IRQn,
  31. [FuriHalInterruptIdDma2Ch2] = DMA2_Channel2_IRQn,
  32. [FuriHalInterruptIdDma2Ch3] = DMA2_Channel3_IRQn,
  33. [FuriHalInterruptIdDma2Ch4] = DMA2_Channel4_IRQn,
  34. [FuriHalInterruptIdDma2Ch5] = DMA2_Channel5_IRQn,
  35. [FuriHalInterruptIdDma2Ch6] = DMA2_Channel6_IRQn,
  36. [FuriHalInterruptIdDma2Ch7] = DMA2_Channel7_IRQn,
  37. // RCC
  38. [FuriHalInterruptIdRcc] = RCC_IRQn,
  39. // COMP
  40. [FuriHalInterruptIdCOMP] = COMP_IRQn,
  41. // HSEM
  42. [FuriHalInterruptIdHsem] = HSEM_IRQn,
  43. // LPTIMx
  44. [FuriHalInterruptIdLpTim1] = LPTIM1_IRQn,
  45. [FuriHalInterruptIdLpTim2] = LPTIM2_IRQn,
  46. };
  47. __attribute__((always_inline)) static inline void
  48. furi_hal_interrupt_call(FuriHalInterruptId index) {
  49. furi_assert(furi_hal_interrupt_isr[index].isr);
  50. furi_hal_interrupt_isr[index].isr(furi_hal_interrupt_isr[index].context);
  51. }
  52. __attribute__((always_inline)) static inline void
  53. furi_hal_interrupt_enable(FuriHalInterruptId index, uint16_t priority) {
  54. NVIC_SetPriority(
  55. furi_hal_interrupt_irqn[index],
  56. NVIC_EncodePriority(NVIC_GetPriorityGrouping(), priority, 0));
  57. NVIC_EnableIRQ(furi_hal_interrupt_irqn[index]);
  58. }
  59. __attribute__((always_inline)) static inline void
  60. furi_hal_interrupt_disable(FuriHalInterruptId index) {
  61. NVIC_DisableIRQ(furi_hal_interrupt_irqn[index]);
  62. }
  63. void furi_hal_interrupt_init() {
  64. NVIC_SetPriority(
  65. TAMP_STAMP_LSECSS_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
  66. NVIC_EnableIRQ(TAMP_STAMP_LSECSS_IRQn);
  67. NVIC_SetPriority(PendSV_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0));
  68. NVIC_SetPriority(FPU_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0));
  69. NVIC_EnableIRQ(FPU_IRQn);
  70. LL_SYSCFG_DisableIT_FPU_IOC();
  71. LL_SYSCFG_DisableIT_FPU_DZC();
  72. LL_SYSCFG_DisableIT_FPU_UFC();
  73. LL_SYSCFG_DisableIT_FPU_OFC();
  74. LL_SYSCFG_DisableIT_FPU_IDC();
  75. LL_SYSCFG_DisableIT_FPU_IXC();
  76. FURI_LOG_I(TAG, "Init OK");
  77. }
  78. void furi_hal_interrupt_set_isr(FuriHalInterruptId index, FuriHalInterruptISR isr, void* context) {
  79. furi_hal_interrupt_set_isr_ex(index, FURI_HAL_INTERRUPT_DEFAULT_PRIORITY, isr, context);
  80. }
  81. void furi_hal_interrupt_set_isr_ex(
  82. FuriHalInterruptId index,
  83. uint16_t priority,
  84. FuriHalInterruptISR isr,
  85. void* context) {
  86. furi_assert(index < FuriHalInterruptIdMax);
  87. furi_assert(priority < 15);
  88. furi_assert(furi_hal_interrupt_irqn[index]);
  89. if(isr) {
  90. // Pre ISR set
  91. furi_assert(furi_hal_interrupt_isr[index].isr == NULL);
  92. } else {
  93. // Pre ISR clear
  94. furi_assert(furi_hal_interrupt_isr[index].isr != NULL);
  95. furi_hal_interrupt_disable(index);
  96. }
  97. furi_hal_interrupt_isr[index].isr = isr;
  98. furi_hal_interrupt_isr[index].context = context;
  99. __DMB();
  100. if(isr) {
  101. // Post ISR set
  102. furi_hal_interrupt_enable(index, priority);
  103. } else {
  104. // Post ISR clear
  105. }
  106. }
  107. /* Timer 2 */
  108. void TIM2_IRQHandler() {
  109. furi_hal_interrupt_call(FuriHalInterruptIdTIM2);
  110. }
  111. /* Timer 1 Update */
  112. void TIM1_UP_TIM16_IRQHandler() {
  113. furi_hal_interrupt_call(FuriHalInterruptIdTim1UpTim16);
  114. }
  115. void TIM1_TRG_COM_TIM17_IRQHandler() {
  116. furi_hal_interrupt_call(FuriHalInterruptIdTim1TrgComTim17);
  117. }
  118. void TIM1_CC_IRQHandler() {
  119. furi_hal_interrupt_call(FuriHalInterruptIdTim1Cc);
  120. }
  121. /* DMA 1 */
  122. void DMA1_Channel1_IRQHandler() {
  123. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch1);
  124. }
  125. void DMA1_Channel2_IRQHandler() {
  126. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch2);
  127. }
  128. void DMA1_Channel3_IRQHandler() {
  129. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch3);
  130. }
  131. void DMA1_Channel4_IRQHandler() {
  132. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch4);
  133. }
  134. void DMA1_Channel5_IRQHandler() {
  135. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch5);
  136. }
  137. void DMA1_Channel6_IRQHandler() {
  138. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch6);
  139. }
  140. void DMA1_Channel7_IRQHandler() {
  141. furi_hal_interrupt_call(FuriHalInterruptIdDma1Ch7);
  142. }
  143. /* DMA 2 */
  144. void DMA2_Channel1_IRQHandler() {
  145. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch1);
  146. }
  147. void DMA2_Channel2_IRQHandler() {
  148. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch2);
  149. }
  150. void DMA2_Channel3_IRQHandler() {
  151. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch3);
  152. }
  153. void DMA2_Channel4_IRQHandler() {
  154. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch4);
  155. }
  156. void DMA2_Channel5_IRQHandler() {
  157. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch5);
  158. }
  159. void DMA2_Channel6_IRQHandler() {
  160. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch6);
  161. }
  162. void DMA2_Channel7_IRQHandler() {
  163. furi_hal_interrupt_call(FuriHalInterruptIdDma2Ch7);
  164. }
  165. void HSEM_IRQHandler() {
  166. furi_hal_interrupt_call(FuriHalInterruptIdHsem);
  167. }
  168. void TAMP_STAMP_LSECSS_IRQHandler(void) {
  169. if(LL_RCC_IsActiveFlag_LSECSS()) {
  170. LL_RCC_ClearFlag_LSECSS();
  171. if(!LL_RCC_LSE_IsReady()) {
  172. FURI_LOG_E(TAG, "LSE CSS fired: resetting system");
  173. NVIC_SystemReset();
  174. } else {
  175. FURI_LOG_E(TAG, "LSE CSS fired: but LSE is alive");
  176. }
  177. }
  178. }
  179. void RCC_IRQHandler() {
  180. furi_hal_interrupt_call(FuriHalInterruptIdRcc);
  181. }
  182. void NMI_Handler() {
  183. if(LL_RCC_IsActiveFlag_HSECSS()) {
  184. LL_RCC_ClearFlag_HSECSS();
  185. FURI_LOG_E(TAG, "HSE CSS fired: resetting system");
  186. NVIC_SystemReset();
  187. }
  188. }
  189. void HardFault_Handler() {
  190. furi_crash("HardFault");
  191. }
  192. void MemManage_Handler() {
  193. furi_crash("MemManage");
  194. }
  195. void BusFault_Handler() {
  196. furi_crash("BusFault");
  197. }
  198. void UsageFault_Handler() {
  199. furi_crash("UsageFault");
  200. }
  201. void DebugMon_Handler() {
  202. }
  203. #include "usbd_core.h"
  204. extern usbd_device udev;
  205. extern void HW_IPCC_Tx_Handler();
  206. extern void HW_IPCC_Rx_Handler();
  207. void SysTick_Handler() {
  208. furi_hal_os_tick();
  209. }
  210. void USB_LP_IRQHandler() {
  211. #ifndef FURI_RAM_EXEC
  212. usbd_poll(&udev);
  213. #endif
  214. }
  215. void USB_HP_IRQHandler() {
  216. }
  217. void IPCC_C1_TX_IRQHandler() {
  218. HW_IPCC_Tx_Handler();
  219. }
  220. void IPCC_C1_RX_IRQHandler() {
  221. HW_IPCC_Rx_Handler();
  222. }
  223. void FPU_IRQHandler() {
  224. furi_crash("FpuFault");
  225. }
  226. void LPTIM1_IRQHandler() {
  227. furi_hal_interrupt_call(FuriHalInterruptIdLpTim1);
  228. }
  229. void LPTIM2_IRQHandler() {
  230. furi_hal_interrupt_call(FuriHalInterruptIdLpTim2);
  231. }