rfal_rfst25r3916.c 212 KB

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  1. /******************************************************************************
  2. * \attention
  3. *
  4. * <h2><center>&copy; COPYRIGHT 2020 STMicroelectronics</center></h2>
  5. *
  6. * Licensed under ST MYLIBERTY SOFTWARE LICENSE AGREEMENT (the "License");
  7. * You may not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at:
  9. *
  10. * www.st.com/myliberty
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an "AS IS" BASIS,
  14. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
  15. * AND SPECIFICALLY DISCLAIMING THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT.
  17. * See the License for the specific language governing permissions and
  18. * limitations under the License.
  19. *
  20. ******************************************************************************/
  21. /*
  22. * PROJECT: ST25R3916 firmware
  23. * Revision:
  24. * LANGUAGE: ISO C99
  25. */
  26. /*! \file
  27. *
  28. * \author Gustavo Patricio
  29. *
  30. * \brief RF Abstraction Layer (RFAL)
  31. *
  32. * RFAL implementation for ST25R3916
  33. */
  34. /*
  35. ******************************************************************************
  36. * INCLUDES
  37. ******************************************************************************
  38. */
  39. #include "rfal_chip.h"
  40. #include "utils.h"
  41. #include "st25r3916.h"
  42. #include "st25r3916_com.h"
  43. #include "st25r3916_irq.h"
  44. #include "rfal_analogConfig.h"
  45. #include "rfal_iso15693_2.h"
  46. #include "rfal_crc.h"
  47. /*
  48. ******************************************************************************
  49. * ENABLE SWITCHS
  50. ******************************************************************************
  51. */
  52. #ifndef RFAL_FEATURE_LISTEN_MODE
  53. #define RFAL_FEATURE_LISTEN_MODE false /* Listen Mode configuration missing. Disabled by default */
  54. #endif /* RFAL_FEATURE_LISTEN_MODE */
  55. #ifndef RFAL_FEATURE_WAKEUP_MODE
  56. #define RFAL_FEATURE_WAKEUP_MODE false /* Wake-Up mode configuration missing. Disabled by default */
  57. #endif /* RFAL_FEATURE_WAKEUP_MODE */
  58. #ifndef RFAL_FEATURE_LOWPOWER_MODE
  59. #define RFAL_FEATURE_LOWPOWER_MODE false /* Low Power mode configuration missing. Disabled by default */
  60. #endif /* RFAL_FEATURE_LOWPOWER_MODE */
  61. /*
  62. ******************************************************************************
  63. * GLOBAL TYPES
  64. ******************************************************************************
  65. */
  66. /*! Struct that holds all involved on a Transceive including the context passed by the caller */
  67. typedef struct{
  68. rfalTransceiveState state; /*!< Current transceive state */
  69. rfalTransceiveState lastState; /*!< Last transceive state (debug purposes) */
  70. ReturnCode status; /*!< Current status/error of the transceive */
  71. rfalTransceiveContext ctx; /*!< The transceive context given by the caller */
  72. } rfalTxRx;
  73. /*! Struct that holds all context for the Listen Mode */
  74. typedef struct{
  75. rfalLmState state; /*!< Current Listen Mode state */
  76. uint32_t mdMask; /*!< Listen Mode mask used */
  77. uint32_t mdReg; /*!< Listen Mode register value used */
  78. uint32_t mdIrqs; /*!< Listen Mode IRQs used */
  79. rfalBitRate brDetected; /*!< Last bit rate detected */
  80. uint8_t* rxBuf; /*!< Location to store incoming data in Listen Mode */
  81. uint16_t rxBufLen; /*!< Length of rxBuf */
  82. uint16_t* rxLen; /*!< Pointer to write the data length placed into rxBuf */
  83. bool dataFlag; /*!< Listen Mode current Data Flag */
  84. bool iniFlag; /*!< Listen Mode initialized Flag (FeliCa slots) */
  85. } rfalLm;
  86. /*! Struct that holds all context for the Wake-Up Mode */
  87. typedef struct{
  88. rfalWumState state; /*!< Current Wake-Up Mode state */
  89. rfalWakeUpConfig cfg; /*!< Current Wake-Up Mode context */
  90. } rfalWum;
  91. /*! Struct that holds all context for the Low Power Mode */
  92. typedef struct{
  93. bool isRunning;
  94. } rfalLpm;
  95. /*! Struct that holds the timings GT and FDTs */
  96. typedef struct{
  97. uint32_t GT; /*!< GT in 1/fc */
  98. uint32_t FDTListen; /*!< FDTListen in 1/fc */
  99. uint32_t FDTPoll; /*!< FDTPoll in 1/fc */
  100. uint8_t nTRFW; /*!< n*TRFW used during RF CA */
  101. } rfalTimings;
  102. /*! Struct that holds the software timers */
  103. typedef struct{
  104. uint32_t GT; /*!< RFAL's GT timer */
  105. uint32_t RXE; /*!< Timer between RXS and RXE */
  106. uint32_t txRx; /*!< Transceive sanity timer */
  107. } rfalTimers;
  108. /*! Struct that holds the RFAL's callbacks */
  109. typedef struct{
  110. rfalPreTxRxCallback preTxRx; /*!< RFAL's Pre TxRx callback */
  111. rfalPostTxRxCallback postTxRx; /*!< RFAL's Post TxRx callback */
  112. } rfalCallbacks;
  113. /*! Struct that holds counters to control the FIFO on Tx and Rx */
  114. typedef struct{
  115. uint16_t expWL; /*!< The amount of bytes expected to be Tx when a WL interrupt occours */
  116. uint16_t bytesTotal; /*!< Total bytes to be transmitted OR the total bytes received */
  117. uint16_t bytesWritten;/*!< Amount of bytes already written on FIFO (Tx) OR read (RX) from FIFO and written on rxBuffer*/
  118. uint8_t status[ST25R3916_FIFO_STATUS_LEN]; /*!< FIFO Status Registers */
  119. } rfalFIFO;
  120. /*! Struct that holds RFAL's configuration settings */
  121. typedef struct{
  122. uint8_t obsvModeTx; /*!< RFAL's config of the ST25R3916's observation mode while Tx */
  123. uint8_t obsvModeRx; /*!< RFAL's config of the ST25R3916's observation mode while Rx */
  124. rfalEHandling eHandling; /*!< RFAL's error handling config/mode */
  125. } rfalConfigs;
  126. /*! Struct that holds NFC-F data - Used only inside rfalFelicaPoll() (static to avoid adding it into stack) */
  127. typedef struct{
  128. rfalFeliCaPollRes pollResponses[RFAL_FELICA_POLL_MAX_SLOTS]; /* FeliCa Poll response container for 16 slots */
  129. } rfalNfcfWorkingData;
  130. /*! Struct that holds NFC-V current context
  131. *
  132. * This buffer has to be big enough for coping with maximum response size (hamming coded)
  133. * - inventory requests responses: 14*2+2 bytes
  134. * - read single block responses: (32+4)*2+2 bytes
  135. * - read multiple block could be very long... -> not supported
  136. * - current implementation expects it be written in one bulk into FIFO
  137. * - needs to be above FIFO water level of ST25R3916 (200)
  138. * - the coding function needs to be able to
  139. * put more than FIFO water level bytes into it (n*64+1)>200 */
  140. typedef struct{
  141. uint8_t codingBuffer[((2 + 255 + 3)*2)]; /*!< Coding buffer, length MUST be above 257: [257; ...] */
  142. uint16_t nfcvOffset; /*!< Offset needed for ISO15693 coding function */
  143. rfalTransceiveContext origCtx; /*!< context provided by user */
  144. uint16_t ignoreBits; /*!< Number of bits at the beginning of a frame to be ignored when decoding */
  145. } rfalNfcvWorkingData;
  146. /*! RFAL instance */
  147. typedef struct{
  148. rfalState state; /*!< RFAL's current state */
  149. rfalMode mode; /*!< RFAL's current mode */
  150. rfalBitRate txBR; /*!< RFAL's current Tx Bit Rate */
  151. rfalBitRate rxBR; /*!< RFAL's current Rx Bit Rate */
  152. bool field; /*!< Current field state (On / Off) */
  153. rfalConfigs conf; /*!< RFAL's configuration settings */
  154. rfalTimings timings; /*!< RFAL's timing setting */
  155. rfalTxRx TxRx; /*!< RFAL's transceive management */
  156. rfalFIFO fifo; /*!< RFAL's FIFO management */
  157. rfalTimers tmr; /*!< RFAL's Software timers */
  158. rfalCallbacks callbacks; /*!< RFAL's callbacks */
  159. #if RFAL_FEATURE_LISTEN_MODE
  160. rfalLm Lm; /*!< RFAL's listen mode management */
  161. #endif /* RFAL_FEATURE_LISTEN_MODE */
  162. #if RFAL_FEATURE_WAKEUP_MODE
  163. rfalWum wum; /*!< RFAL's Wake-up mode management */
  164. #endif /* RFAL_FEATURE_WAKEUP_MODE */
  165. #if RFAL_FEATURE_LOWPOWER_MODE
  166. rfalLpm lpm; /*!< RFAL's Low power mode management */
  167. #endif /* RFAL_FEATURE_LOWPOWER_MODE */
  168. #if RFAL_FEATURE_NFCF
  169. rfalNfcfWorkingData nfcfData; /*!< RFAL's working data when supporting NFC-F */
  170. #endif /* RFAL_FEATURE_NFCF */
  171. #if RFAL_FEATURE_NFCV
  172. rfalNfcvWorkingData nfcvData; /*!< RFAL's working data when performing NFC-V */
  173. #endif /* RFAL_FEATURE_NFCV */
  174. } rfal;
  175. /*! Felica's command set */
  176. typedef enum
  177. {
  178. FELICA_CMD_POLLING = 0x00, /*!< Felica Poll/REQC command (aka SENSF_REQ) to identify a card */
  179. FELICA_CMD_POLLING_RES = 0x01, /*!< Felica Poll/REQC command (aka SENSF_RES) response */
  180. FELICA_CMD_REQUEST_SERVICE = 0x02, /*!< verify the existence of Area and Service */
  181. FELICA_CMD_REQUEST_RESPONSE = 0x04, /*!< verify the existence of a card */
  182. FELICA_CMD_READ_WITHOUT_ENCRYPTION = 0x06, /*!< read Block Data from a Service that requires no authentication */
  183. FELICA_CMD_WRITE_WITHOUT_ENCRYPTION = 0x08, /*!< write Block Data to a Service that requires no authentication */
  184. FELICA_CMD_REQUEST_SYSTEM_CODE = 0x0C, /*!< acquire the System Code registered to a card */
  185. FELICA_CMD_AUTHENTICATION1 = 0x10, /*!< authenticate a card */
  186. FELICA_CMD_AUTHENTICATION2 = 0x12, /*!< allow a card to authenticate a Reader/Writer */
  187. FELICA_CMD_READ = 0x14, /*!< read Block Data from a Service that requires authentication */
  188. FELICA_CMD_WRITE = 0x16, /*!< write Block Data to a Service that requires authentication */
  189. }t_rfalFeliCaCmd;
  190. /*! Union representing all PTMem sections */
  191. typedef union{ /* PRQA S 0750 # MISRA 19.2 - Both members are of the same type, just different names. Thus no problem can occur. */
  192. uint8_t PTMem_A[ST25R3916_PTM_A_LEN]; /*!< PT_Memory area allocated for NFC-A configuration */
  193. uint8_t PTMem_F[ST25R3916_PTM_F_LEN]; /*!< PT_Memory area allocated for NFC-F configuration */
  194. uint8_t TSN[ST25R3916_PTM_TSN_LEN]; /*!< PT_Memory area allocated for TSN - Random numbers */
  195. }t_rfalPTMem;
  196. /*
  197. ******************************************************************************
  198. * GLOBAL DEFINES
  199. ******************************************************************************
  200. */
  201. #define RFAL_FIFO_IN_WL 200U /*!< Number of bytes in the FIFO when WL interrupt occurs while Tx */
  202. #define RFAL_FIFO_OUT_WL (ST25R3916_FIFO_DEPTH - RFAL_FIFO_IN_WL) /*!< Number of bytes sent/out of the FIFO when WL interrupt occurs while Tx */
  203. #define RFAL_FIFO_STATUS_REG1 0U /*!< Location of FIFO status register 1 in local copy */
  204. #define RFAL_FIFO_STATUS_REG2 1U /*!< Location of FIFO status register 2 in local copy */
  205. #define RFAL_FIFO_STATUS_INVALID 0xFFU /*!< Value indicating that the local FIFO status in invalid|cleared */
  206. #define RFAL_ST25R3916_GPT_MAX_1FC rfalConv8fcTo1fc( 0xFFFFU ) /*!< Max GPT steps in 1fc (0xFFFF steps of 8/fc => 0xFFFF * 590ns = 38,7ms) */
  207. #define RFAL_ST25R3916_NRT_MAX_1FC rfalConv4096fcTo1fc( 0xFFFFU ) /*!< Max NRT steps in 1fc (0xFFFF steps of 4096/fc => 0xFFFF * 302us = 19.8s ) */
  208. #define RFAL_ST25R3916_NRT_DISABLED 0U /*!< NRT Disabled: All 0 No-response timer is not started, wait forever */
  209. #define RFAL_ST25R3916_MRT_MAX_1FC rfalConv64fcTo1fc( 0x00FFU ) /*!< Max MRT steps in 1fc (0x00FF steps of 64/fc => 0x00FF * 4.72us = 1.2ms ) */
  210. #define RFAL_ST25R3916_MRT_MIN_1FC rfalConv64fcTo1fc( 0x0004U ) /*!< Min MRT steps in 1fc ( 0<=mrt<=4 ; 4 (64/fc) => 0x0004 * 4.72us = 18.88us ) */
  211. #define RFAL_ST25R3916_GT_MAX_1FC rfalConvMsTo1fc( 6000U ) /*!< Max GT value allowed in 1/fc (SFGI=14 => SFGT + dSFGT = 5.4s) */
  212. #define RFAL_ST25R3916_GT_MIN_1FC rfalConvMsTo1fc(RFAL_ST25R3916_SW_TMR_MIN_1MS)/*!< Min GT value allowed in 1/fc */
  213. #define RFAL_ST25R3916_SW_TMR_MIN_1MS 1U /*!< Min value of a SW timer in ms */
  214. #define RFAL_OBSMODE_DISABLE 0x00U /*!< Observation Mode disabled */
  215. #define RFAL_RX_INCOMPLETE_MAXLEN (uint8_t)1U /*!< Threshold value where incoming rx may be considered as incomplete */
  216. #define RFAL_EMVCO_RX_MAXLEN (uint8_t)4U /*!< Maximum value where EMVCo to apply special error handling */
  217. #define RFAL_NORXE_TOUT 50U /*!< Timeout to be used on a potential missing RXE - Silicon ST25R3916 Errata #TBD */
  218. #define RFAL_ISO14443A_SDD_RES_LEN 5U /*!< SDD_RES | Anticollision (UID CLn) length - rfalNfcaSddRes */
  219. #define RFAL_ISO14443A_CRC_INTVAL 0x6363 /*!< ISO14443 CRC Initial Value|Register */
  220. #define RFAL_FELICA_POLL_DELAY_TIME 512U /*!< FeliCa Poll Processing time is 2.417 ms ~512*64/fc Digital 1.1 A4 */
  221. #define RFAL_FELICA_POLL_SLOT_TIME 256U /*!< FeliCa Poll Time Slot duration is 1.208 ms ~256*64/fc Digital 1.1 A4 */
  222. #define RFAL_LM_SENSF_RD0_POS 17U /*!< FeliCa SENSF_RES Request Data RD0 position */
  223. #define RFAL_LM_SENSF_RD1_POS 18U /*!< FeliCa SENSF_RES Request Data RD1 position */
  224. #define RFAL_LM_NFCID_INCOMPLETE 0x04U /*!< NFCA NFCID not complete bit in SEL_RES (SAK) */
  225. #define RFAL_ISO15693_IGNORE_BITS rfalConvBytesToBits(2U) /*!< Ignore collisions before the UID (RES_FLAG + DSFID) */
  226. #define RFAL_ISO15693_INV_RES_LEN 12U /*!< ISO15693 Inventory response length with CRC (bytes) */
  227. #define RFAL_ISO15693_INV_RES_DUR 4U /*!< ISO15693 Inventory response duration @ 26 kbps (ms) */
  228. #define RFAL_WU_MIN_WEIGHT_VAL 4U /*!< ST25R3916 minimum Wake-up weight value */
  229. /*******************************************************************************/
  230. #define RFAL_LM_GT rfalConvUsTo1fc(100U) /*!< Listen Mode Guard Time enforced (GT - Passive; TIRFG - Active) */
  231. #define RFAL_FDT_POLL_ADJUSTMENT rfalConvUsTo1fc(80U) /*!< FDT Poll adjustment: Time between the expiration of GPT to the actual Tx */
  232. #define RFAL_FDT_LISTEN_MRT_ADJUSTMENT 64U /*!< MRT jitter adjustment: timeout will be between [ tout ; tout + 64 cycles ] */
  233. #define RFAL_AP2P_FIELDOFF_TRFW rfalConv8fcTo1fc(64U) /*!< Time after TXE and Field Off in AP2P Trfw: 37.76us -> 64 (8/fc) */
  234. #ifndef RFAL_ST25R3916_AAT_SETTLE
  235. #define RFAL_ST25R3916_AAT_SETTLE 5U /*!< Time in ms required for AAT pins and Osc to settle after en bit set */
  236. #endif /* RFAL_ST25R3916_AAT_SETTLE */
  237. /*! FWT adjustment:
  238. * 64 : NRT jitter between TXE and NRT start */
  239. #define RFAL_FWT_ADJUSTMENT 64U
  240. /*! FWT ISO14443A adjustment:
  241. * 512 : 4bit length
  242. * 64 : Half a bit duration due to ST25R3916 Coherent receiver (1/fc) */
  243. #define RFAL_FWT_A_ADJUSTMENT (512U + 64U)
  244. /*! FWT ISO14443B adjustment:
  245. * SOF (14etu) + 1Byte (10etu) + 1etu (IRQ comes 1etu after first byte) - 3etu (ST25R3916 sends TXE 3etu after) */
  246. #define RFAL_FWT_B_ADJUSTMENT ((14U + 10U + 1U - 3U) * 128U)
  247. /*! FWT FeliCa 212 adjustment:
  248. * 1024 : Length of the two Sync bytes at 212kbps */
  249. #define RFAL_FWT_F_212_ADJUSTMENT 1024U
  250. /*! FWT FeliCa 424 adjustment:
  251. * 512 : Length of the two Sync bytes at 424kbps */
  252. #define RFAL_FWT_F_424_ADJUSTMENT 512U
  253. /*! Time between our field Off and other peer field On : Tadt + (n x Trfw)
  254. * Ecma 340 11.1.2 - Tadt: [56.64 , 188.72] us ; n: [0 , 3] ; Trfw = 37.76 us
  255. * Should be: 189 + (3*38) = 303us ; we'll use a more relaxed setting: 605 us */
  256. #define RFAL_AP2P_FIELDON_TADTTRFW rfalConvUsTo1fc(605U)
  257. /*! FDT Listen adjustment for ISO14443A EMVCo 2.6 4.8.1.3 ; Digital 1.1 6.10
  258. *
  259. * 276: Time from the rising pulse of the pause of the logic '1' (i.e. the time point to measure the deaftime from),
  260. * to the actual end of the EOF sequence (the point where the MRT starts). Please note that the ST25R391x uses the
  261. * ISO14443-2 definition where the EOF consists of logic '0' followed by sequence Y.
  262. * -64: Further adjustment for receiver to be ready just before first bit
  263. */
  264. #define RFAL_FDT_LISTEN_A_ADJUSTMENT (276U-64U)
  265. /*! FDT Listen adjustment for ISO14443B EMVCo 2.6 4.8.1.6 ; Digital 1.1 7.9
  266. *
  267. * 340: Time from the rising edge of the EoS to the starting point of the MRT timer (sometime after the final high
  268. * part of the EoS is completed)
  269. */
  270. #define RFAL_FDT_LISTEN_B_ADJUSTMENT 340U
  271. /*! FDT Listen adjustment for ISO15693
  272. * ISO15693 2000 8.4 t1 MIN = 4192/fc
  273. * ISO15693 2009 9.1 t1 MIN = 4320/fc
  274. * Digital 2.1 B.5 FDTV,LISTEN,MIN = 4310/fc
  275. * Set FDT Listen one step earlier than on the more recent spec versions for greater interoprability
  276. */
  277. #define RFAL_FDT_LISTEN_V_ADJUSTMENT 64U
  278. /*! FDT Poll adjustment for ISO14443B Correlator - sst 5 etu */
  279. #define RFAL_FDT_LISTEN_B_ADJT_CORR 128U
  280. /*! FDT Poll adjustment for ISO14443B Correlator sst window - 5 etu */
  281. #define RFAL_FDT_LISTEN_B_ADJT_CORR_SST 20U
  282. /*
  283. ******************************************************************************
  284. * GLOBAL MACROS
  285. ******************************************************************************
  286. */
  287. /*! Calculates Transceive Sanity Timer. It accounts for the slowest bit rate and the longest data format
  288. * 1s for transmission and reception of a 4K message at 106kpbs (~425ms each direction)
  289. * plus TxRx preparation and FIFO load over Serial Interface */
  290. #define rfalCalcSanityTmr( fwt ) (uint16_t)(1000U + rfalConv1fcToMs((fwt)))
  291. #define rfalGennTRFW( n ) (((n)+1U)&ST25R3916_REG_AUX_nfc_n_mask) /*!< Generates the next n*TRRW used for RFCA */
  292. #define rfalCalcNumBytes( nBits ) (((uint32_t)(nBits) + 7U) / 8U) /*!< Returns the number of bytes required to fit given the number of bits */
  293. #define rfalTimerStart( timer, time_ms ) do{ platformTimerDestroy( timer ); (timer) = platformTimerCreate((uint16_t)(time_ms)); } while(0) /*!< Configures and starts timer */
  294. #define rfalTimerisExpired( timer ) platformTimerIsExpired( timer ) /*!< Checks if timer has expired */
  295. #define rfalTimerDestroy( timer ) platformTimerDestroy( timer ) /*!< Destroys timer */
  296. #define rfalST25R3916ObsModeDisable() st25r3916WriteTestRegister(0x01U, (0x40U)) /*!< Disable ST25R3916 Observation mode */
  297. #define rfalST25R3916ObsModeTx() st25r3916WriteTestRegister(0x01U, (0x40U|gRFAL.conf.obsvModeTx)) /*!< Enable Tx Observation mode */
  298. #define rfalST25R3916ObsModeRx() st25r3916WriteTestRegister(0x01U, (0x40U|gRFAL.conf.obsvModeRx)) /*!< Enable Rx Observation mode */
  299. #define rfalCheckDisableObsMode() if(gRFAL.conf.obsvModeRx != 0U){ rfalST25R3916ObsModeDisable(); } /*!< Checks if the observation mode is enabled, and applies on ST25R3916 */
  300. #define rfalCheckEnableObsModeTx() if(gRFAL.conf.obsvModeTx != 0U){ rfalST25R3916ObsModeTx(); } /*!< Checks if the observation mode is enabled, and applies on ST25R3916 */
  301. #define rfalCheckEnableObsModeRx() if(gRFAL.conf.obsvModeRx != 0U){ rfalST25R3916ObsModeRx(); } /*!< Checks if the observation mode is enabled, and applies on ST25R3916 */
  302. #define rfalGetIncmplBits( FIFOStatus2 ) (( (FIFOStatus2) >> 1) & 0x07U) /*!< Returns the number of bits from fifo status */
  303. #define rfalIsIncompleteByteError( error ) (((error) >= ERR_INCOMPLETE_BYTE) && ((error) <= ERR_INCOMPLETE_BYTE_07)) /*!< Checks if given error is a Incomplete error */
  304. #define rfalAdjACBR( b ) (((uint16_t)(b) >= (uint16_t)RFAL_BR_52p97) ? (uint16_t)(b) : ((uint16_t)(b)+1U)) /*!< Adjusts ST25R391x Bit rate to Analog Configuration */
  305. #define rfalConvBR2ACBR( b ) (((rfalAdjACBR((b)))<<RFAL_ANALOG_CONFIG_BITRATE_SHIFT) & RFAL_ANALOG_CONFIG_BITRATE_MASK) /*!< Converts ST25R391x Bit rate to Analog Configuration bit rate id */
  306. #define rfalConvTDFormat( v ) ((uint16_t)(v) << 8U) /*!< Converts a uint8_t to the format used in SW Tag Detection */
  307. /*
  308. ******************************************************************************
  309. * LOCAL VARIABLES
  310. ******************************************************************************
  311. */
  312. static rfal gRFAL; /*!< RFAL module instance */
  313. /*
  314. ******************************************************************************
  315. * LOCAL FUNCTION PROTOTYPES
  316. ******************************************************************************
  317. */
  318. static void rfalTransceiveTx( void );
  319. static void rfalTransceiveRx( void );
  320. static ReturnCode rfalTransceiveRunBlockingTx( void );
  321. static void rfalPrepareTransceive( void );
  322. static void rfalCleanupTransceive( void );
  323. static void rfalErrorHandling( void );
  324. static ReturnCode rfalRunTransceiveWorker( void );
  325. #if RFAL_FEATURE_LISTEN_MODE
  326. static ReturnCode rfalRunListenModeWorker( void );
  327. #endif /* RFAL_FEATURE_LISTEN_MODE */
  328. #if RFAL_FEATURE_WAKEUP_MODE
  329. static void rfalRunWakeUpModeWorker( void );
  330. static uint16_t rfalWakeUpModeFilter( uint16_t curRef, uint16_t curVal, uint8_t weight );
  331. #endif /* RFAL_FEATURE_WAKEUP_MODE */
  332. static void rfalFIFOStatusUpdate( void );
  333. static void rfalFIFOStatusClear( void );
  334. static bool rfalFIFOStatusIsMissingPar( void );
  335. static bool rfalFIFOStatusIsIncompleteByte( void );
  336. static uint16_t rfalFIFOStatusGetNumBytes( void );
  337. static uint8_t rfalFIFOGetNumIncompleteBits( void );
  338. /*
  339. ******************************************************************************
  340. * GLOBAL FUNCTIONS
  341. ******************************************************************************
  342. */
  343. /*******************************************************************************/
  344. ReturnCode rfalInitialize( void )
  345. {
  346. ReturnCode err;
  347. EXIT_ON_ERR( err, st25r3916Initialize() );
  348. st25r3916ClearInterrupts();
  349. /* Disable any previous observation mode */
  350. rfalST25R3916ObsModeDisable();
  351. /*******************************************************************************/
  352. /* Apply RF Chip generic initialization */
  353. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_INIT) );
  354. // TODO:
  355. // I don't want to mess with config table ("Default Analog Configuration for Chip-Specific Reset", rfal_analogConfigTbl.h)
  356. // so with every rfalSetAnalogConfig((RFAL_ANALOG_CONFIG_CHIP_INIT)) currently we need to clear pulldown bits
  357. // luckily for us this is done only here
  358. // disable pulldowns
  359. st25r3916ClrRegisterBits(ST25R3916_REG_IO_CONF2, ( ST25R3916_REG_IO_CONF2_miso_pd1 | ST25R3916_REG_IO_CONF2_miso_pd2 ) );
  360. /*******************************************************************************/
  361. /* Enable External Field Detector as: Automatics */
  362. st25r3916ChangeRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_en_fd_mask, ST25R3916_REG_OP_CONTROL_en_fd_auto_efd );
  363. /* Clear FIFO status local copy */
  364. rfalFIFOStatusClear();
  365. /*******************************************************************************/
  366. gRFAL.state = RFAL_STATE_INIT;
  367. gRFAL.mode = RFAL_MODE_NONE;
  368. gRFAL.field = false;
  369. /* Set RFAL default configs */
  370. gRFAL.conf.obsvModeRx = RFAL_OBSMODE_DISABLE;
  371. gRFAL.conf.obsvModeTx = RFAL_OBSMODE_DISABLE;
  372. gRFAL.conf.eHandling = RFAL_ERRORHANDLING_NONE;
  373. /* Transceive set to IDLE */
  374. gRFAL.TxRx.lastState = RFAL_TXRX_STATE_IDLE;
  375. gRFAL.TxRx.state = RFAL_TXRX_STATE_IDLE;
  376. /* Disable all timings */
  377. gRFAL.timings.FDTListen = RFAL_TIMING_NONE;
  378. gRFAL.timings.FDTPoll = RFAL_TIMING_NONE;
  379. gRFAL.timings.GT = RFAL_TIMING_NONE;
  380. gRFAL.timings.nTRFW = 0U;
  381. /* Destroy any previous pending timers */
  382. rfalTimerDestroy( gRFAL.tmr.GT );
  383. rfalTimerDestroy( gRFAL.tmr.txRx );
  384. rfalTimerDestroy( gRFAL.tmr.RXE );
  385. gRFAL.tmr.GT = RFAL_TIMING_NONE;
  386. gRFAL.tmr.txRx = RFAL_TIMING_NONE;
  387. gRFAL.tmr.RXE = RFAL_TIMING_NONE;
  388. gRFAL.callbacks.preTxRx = NULL;
  389. gRFAL.callbacks.postTxRx = NULL;
  390. #if RFAL_FEATURE_NFCV
  391. /* Initialize NFC-V Data */
  392. gRFAL.nfcvData.ignoreBits = 0;
  393. #endif /* RFAL_FEATURE_NFCV */
  394. #if RFAL_FEATURE_LISTEN_MODE
  395. /* Initialize Listen Mode */
  396. gRFAL.Lm.state = RFAL_LM_STATE_NOT_INIT;
  397. gRFAL.Lm.brDetected = RFAL_BR_KEEP;
  398. gRFAL.Lm.iniFlag = false;
  399. #endif /* RFAL_FEATURE_LISTEN_MODE */
  400. #if RFAL_FEATURE_WAKEUP_MODE
  401. /* Initialize Wake-Up Mode */
  402. gRFAL.wum.state = RFAL_WUM_STATE_NOT_INIT;
  403. #endif /* RFAL_FEATURE_WAKEUP_MODE */
  404. #if RFAL_FEATURE_LOWPOWER_MODE
  405. /* Initialize Low Power Mode */
  406. gRFAL.lpm.isRunning = false;
  407. #endif /* RFAL_FEATURE_LOWPOWER_MODE */
  408. /*******************************************************************************/
  409. /* Perform Automatic Calibration (if configured to do so). *
  410. * Registers set by rfalSetAnalogConfig will tell rfalCalibrate what to perform*/
  411. rfalCalibrate();
  412. return ERR_NONE;
  413. }
  414. /*******************************************************************************/
  415. ReturnCode rfalCalibrate( void )
  416. {
  417. uint16_t resValue;
  418. /* Check if RFAL is not initialized */
  419. if( gRFAL.state == RFAL_STATE_IDLE )
  420. {
  421. return ERR_WRONG_STATE;
  422. }
  423. /*******************************************************************************/
  424. /* Perform ST25R3916 regulators and antenna calibration */
  425. /*******************************************************************************/
  426. /* Automatic regulator adjustment only performed if not set manually on Analog Configs */
  427. if( st25r3916CheckReg( ST25R3916_REG_REGULATOR_CONTROL, ST25R3916_REG_REGULATOR_CONTROL_reg_s, 0x00 ) )
  428. {
  429. /* Adjust the regulators so that Antenna Calibrate has better Regulator values */
  430. st25r3916AdjustRegulators( &resValue );
  431. }
  432. return ERR_NONE;
  433. }
  434. /*******************************************************************************/
  435. ReturnCode rfalAdjustRegulators( uint16_t* result )
  436. {
  437. return st25r3916AdjustRegulators( result );
  438. }
  439. /*******************************************************************************/
  440. void rfalSetUpperLayerCallback( rfalUpperLayerCallback pFunc )
  441. {
  442. st25r3916IRQCallbackSet( pFunc );
  443. }
  444. /*******************************************************************************/
  445. void rfalSetPreTxRxCallback( rfalPreTxRxCallback pFunc )
  446. {
  447. gRFAL.callbacks.preTxRx = pFunc;
  448. }
  449. /*******************************************************************************/
  450. void rfalSetPostTxRxCallback( rfalPostTxRxCallback pFunc )
  451. {
  452. gRFAL.callbacks.postTxRx = pFunc;
  453. }
  454. /*******************************************************************************/
  455. ReturnCode rfalDeinitialize( void )
  456. {
  457. /* Deinitialize chip */
  458. st25r3916Deinitialize();
  459. /* Set Analog configurations for deinitialization */
  460. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_DEINIT) );
  461. gRFAL.state = RFAL_STATE_IDLE;
  462. return ERR_NONE;
  463. }
  464. /*******************************************************************************/
  465. void rfalSetObsvMode( uint8_t txMode, uint8_t rxMode )
  466. {
  467. gRFAL.conf.obsvModeTx = txMode;
  468. gRFAL.conf.obsvModeRx = rxMode;
  469. }
  470. /*******************************************************************************/
  471. void rfalGetObsvMode( uint8_t* txMode, uint8_t* rxMode )
  472. {
  473. if(txMode != NULL)
  474. {
  475. *txMode = gRFAL.conf.obsvModeTx;
  476. }
  477. if(rxMode != NULL)
  478. {
  479. *rxMode = gRFAL.conf.obsvModeRx;
  480. }
  481. }
  482. /*******************************************************************************/
  483. void rfalDisableObsvMode( void )
  484. {
  485. gRFAL.conf.obsvModeTx = RFAL_OBSMODE_DISABLE;
  486. gRFAL.conf.obsvModeRx = RFAL_OBSMODE_DISABLE;
  487. }
  488. /*******************************************************************************/
  489. ReturnCode rfalSetMode( rfalMode mode, rfalBitRate txBR, rfalBitRate rxBR )
  490. {
  491. /* Check if RFAL is not initialized */
  492. if( gRFAL.state == RFAL_STATE_IDLE )
  493. {
  494. return ERR_WRONG_STATE;
  495. }
  496. /* Check allowed bit rate value */
  497. if( (txBR == RFAL_BR_KEEP) || (rxBR == RFAL_BR_KEEP) )
  498. {
  499. return ERR_PARAM;
  500. }
  501. switch( mode )
  502. {
  503. /*******************************************************************************/
  504. case RFAL_MODE_POLL_NFCA:
  505. /* Disable wake up mode, if set */
  506. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  507. /* Enable ISO14443A mode */
  508. st25r3916WriteRegister( ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_iso14443a );
  509. /* Set Analog configurations for this mode and bit rate */
  510. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  511. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  512. break;
  513. /*******************************************************************************/
  514. case RFAL_MODE_POLL_NFCA_T1T:
  515. /* Disable wake up mode, if set */
  516. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  517. /* Enable Topaz mode */
  518. st25r3916WriteRegister( ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_topaz );
  519. /* Set Analog configurations for this mode and bit rate */
  520. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  521. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  522. break;
  523. /*******************************************************************************/
  524. case RFAL_MODE_POLL_NFCB:
  525. /* Disable wake up mode, if set */
  526. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  527. /* Enable ISO14443B mode */
  528. st25r3916WriteRegister( ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_iso14443b );
  529. /* Set the EGT, SOF, EOF and EOF */
  530. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443B_1,
  531. (ST25R3916_REG_ISO14443B_1_egt_mask | ST25R3916_REG_ISO14443B_1_sof_mask | ST25R3916_REG_ISO14443B_1_eof),
  532. ( (0U<<ST25R3916_REG_ISO14443B_1_egt_shift) | ST25R3916_REG_ISO14443B_1_sof_0_10etu | ST25R3916_REG_ISO14443B_1_sof_1_2etu | ST25R3916_REG_ISO14443B_1_eof_10etu) );
  533. /* Set the minimum TR1, SOF, EOF and EOF12 */
  534. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443B_2,
  535. (ST25R3916_REG_ISO14443B_2_tr1_mask | ST25R3916_REG_ISO14443B_2_no_sof | ST25R3916_REG_ISO14443B_2_no_eof),
  536. (ST25R3916_REG_ISO14443B_2_tr1_80fs80fs) );
  537. /* Set Analog configurations for this mode and bit rate */
  538. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  539. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  540. break;
  541. /*******************************************************************************/
  542. case RFAL_MODE_POLL_B_PRIME:
  543. /* Disable wake up mode, if set */
  544. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  545. /* Enable ISO14443B mode */
  546. st25r3916WriteRegister( ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_iso14443b );
  547. /* Set the EGT, SOF, EOF and EOF */
  548. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443B_1,
  549. (ST25R3916_REG_ISO14443B_1_egt_mask | ST25R3916_REG_ISO14443B_1_sof_mask | ST25R3916_REG_ISO14443B_1_eof),
  550. ( (0U<<ST25R3916_REG_ISO14443B_1_egt_shift) | ST25R3916_REG_ISO14443B_1_sof_0_10etu | ST25R3916_REG_ISO14443B_1_sof_1_2etu | ST25R3916_REG_ISO14443B_1_eof_10etu) );
  551. /* Set the minimum TR1, EOF and EOF12 */
  552. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443B_2,
  553. (ST25R3916_REG_ISO14443B_2_tr1_mask | ST25R3916_REG_ISO14443B_2_no_sof | ST25R3916_REG_ISO14443B_2_no_eof),
  554. (ST25R3916_REG_ISO14443B_2_tr1_80fs80fs | ST25R3916_REG_ISO14443B_2_no_sof ) );
  555. /* Set Analog configurations for this mode and bit rate */
  556. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  557. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  558. break;
  559. /*******************************************************************************/
  560. case RFAL_MODE_POLL_B_CTS:
  561. /* Disable wake up mode, if set */
  562. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  563. /* Enable ISO14443B mode */
  564. st25r3916WriteRegister( ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_iso14443b );
  565. /* Set the EGT, SOF, EOF and EOF */
  566. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443B_1,
  567. (ST25R3916_REG_ISO14443B_1_egt_mask | ST25R3916_REG_ISO14443B_1_sof_mask | ST25R3916_REG_ISO14443B_1_eof),
  568. ( (0U<<ST25R3916_REG_ISO14443B_1_egt_shift) | ST25R3916_REG_ISO14443B_1_sof_0_10etu | ST25R3916_REG_ISO14443B_1_sof_1_2etu | ST25R3916_REG_ISO14443B_1_eof_10etu) );
  569. /* Set the minimum TR1, clear SOF, EOF and EOF12 */
  570. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443B_2,
  571. (ST25R3916_REG_ISO14443B_2_tr1_mask | ST25R3916_REG_ISO14443B_2_no_sof | ST25R3916_REG_ISO14443B_2_no_eof),
  572. (ST25R3916_REG_ISO14443B_2_tr1_80fs80fs | ST25R3916_REG_ISO14443B_2_no_sof | ST25R3916_REG_ISO14443B_2_no_eof ) );
  573. /* Set Analog configurations for this mode and bit rate */
  574. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  575. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  576. break;
  577. /*******************************************************************************/
  578. case RFAL_MODE_POLL_NFCF:
  579. /* Disable wake up mode, if set */
  580. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  581. /* Enable FeliCa mode */
  582. st25r3916WriteRegister( ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_felica );
  583. /* Set Analog configurations for this mode and bit rate */
  584. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  585. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  586. break;
  587. /*******************************************************************************/
  588. case RFAL_MODE_POLL_NFCV:
  589. case RFAL_MODE_POLL_PICOPASS:
  590. #if !RFAL_FEATURE_NFCV
  591. return ERR_DISABLED;
  592. #else
  593. /* Disable wake up mode, if set */
  594. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  595. /* Set Analog configurations for this mode and bit rate */
  596. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  597. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  598. break;
  599. #endif /* RFAL_FEATURE_NFCV */
  600. /*******************************************************************************/
  601. case RFAL_MODE_POLL_ACTIVE_P2P:
  602. /* Set NFCIP1 active communication Initiator mode and Automatic Response RF Collision Avoidance to always after EOF */
  603. st25r3916WriteRegister( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_targ_init | ST25R3916_REG_MODE_om_nfc | ST25R3916_REG_MODE_nfc_ar_eof) );
  604. /* External Field Detector enabled as Automatics on rfalInitialize() */
  605. /* Set NRT to start at end of TX (own) field */
  606. st25r3916ChangeRegisterBits( ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_nrt_nfc, ST25R3916_REG_TIMER_EMV_CONTROL_nrt_nfc_off );
  607. /* Set GPT to start after end of TX, as GPT is used in active communication mode to timeout the field switching off */
  608. /* The field is turned off 37.76us after the end of the transmission Trfw */
  609. st25r3916SetStartGPTimer( (uint16_t)rfalConv1fcTo8fc( RFAL_AP2P_FIELDOFF_TRFW ), ST25R3916_REG_TIMER_EMV_CONTROL_gptc_etx_nfc );
  610. /* Set PPon2 timer with the max time between our field Off and other peer field On : Tadt + (n x Trfw) */
  611. st25r3916WriteRegister( ST25R3916_REG_PPON2, (uint8_t)rfalConv1fcTo64fc( RFAL_AP2P_FIELDON_TADTTRFW ) );
  612. /* Set Analog configurations for this mode and bit rate */
  613. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  614. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  615. break;
  616. /*******************************************************************************/
  617. case RFAL_MODE_LISTEN_ACTIVE_P2P:
  618. /* Set NFCIP1 active communication Target mode and Automatic Response RF Collision Avoidance to always after EOF */
  619. st25r3916WriteRegister( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om_targ_nfcip | ST25R3916_REG_MODE_nfc_ar_eof) );
  620. /* Set TARFG: 0 (75us+0ms=75us), as Target no Guard time needed */
  621. st25r3916WriteRegister( ST25R3916_REG_FIELD_ON_GT, 0U );
  622. /* External Field Detector enabled as Automatics on rfalInitialize() */
  623. /* Set NRT to start at end of TX (own) field */
  624. st25r3916ChangeRegisterBits( ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_nrt_nfc, ST25R3916_REG_TIMER_EMV_CONTROL_nrt_nfc_off );
  625. /* Set GPT to start after end of TX, as GPT is used in active communication mode to timeout the field switching off */
  626. /* The field is turned off 37.76us after the end of the transmission Trfw */
  627. st25r3916SetStartGPTimer( (uint16_t)rfalConv1fcTo8fc( RFAL_AP2P_FIELDOFF_TRFW ), ST25R3916_REG_TIMER_EMV_CONTROL_gptc_etx_nfc );
  628. /* Set PPon2 timer with the max time between our field Off and other peer field On : Tadt + (n x Trfw) */
  629. st25r3916WriteRegister( ST25R3916_REG_PPON2, (uint8_t)rfalConv1fcTo64fc( RFAL_AP2P_FIELDON_TADTTRFW ) );
  630. /* Set Analog configurations for this mode and bit rate */
  631. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  632. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  633. break;
  634. /*******************************************************************************/
  635. case RFAL_MODE_LISTEN_NFCA:
  636. /* Disable wake up mode, if set */
  637. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  638. /* Enable Passive Target NFC-A mode, disable any Collision Avoidance */
  639. st25r3916WriteRegister( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om_targ_nfca | ST25R3916_REG_MODE_nfc_ar_off) );
  640. /* Set Analog configurations for this mode */
  641. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  642. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  643. break;
  644. /*******************************************************************************/
  645. case RFAL_MODE_LISTEN_NFCF:
  646. /* Disable wake up mode, if set */
  647. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  648. /* Enable Passive Target NFC-F mode, disable any Collision Avoidance */
  649. st25r3916WriteRegister( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om_targ_nfcf | ST25R3916_REG_MODE_nfc_ar_off) );
  650. /* Set Analog configurations for this mode */
  651. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_TX) );
  652. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCF | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_RX) );
  653. break;
  654. /*******************************************************************************/
  655. case RFAL_MODE_LISTEN_NFCB:
  656. return ERR_NOTSUPP;
  657. /*******************************************************************************/
  658. default:
  659. return ERR_NOT_IMPLEMENTED;
  660. }
  661. /* Set state as STATE_MODE_SET only if not initialized yet (PSL) */
  662. gRFAL.state = ((gRFAL.state < RFAL_STATE_MODE_SET) ? RFAL_STATE_MODE_SET : gRFAL.state);
  663. gRFAL.mode = mode;
  664. /* Apply the given bit rate */
  665. return rfalSetBitRate(txBR, rxBR);
  666. }
  667. /*******************************************************************************/
  668. rfalMode rfalGetMode( void )
  669. {
  670. return gRFAL.mode;
  671. }
  672. /*******************************************************************************/
  673. ReturnCode rfalSetBitRate( rfalBitRate txBR, rfalBitRate rxBR )
  674. {
  675. ReturnCode ret;
  676. /* Check if RFAL is not initialized */
  677. if( gRFAL.state == RFAL_STATE_IDLE )
  678. {
  679. return ERR_WRONG_STATE;
  680. }
  681. /* Store the new Bit Rates */
  682. gRFAL.txBR = ((txBR == RFAL_BR_KEEP) ? gRFAL.txBR : txBR);
  683. gRFAL.rxBR = ((rxBR == RFAL_BR_KEEP) ? gRFAL.rxBR : rxBR);
  684. /* Update the bitrate reg if not in NFCV mode (streaming) */
  685. if( (RFAL_MODE_POLL_NFCV != gRFAL.mode) && (RFAL_MODE_POLL_PICOPASS != gRFAL.mode) )
  686. {
  687. /* Set bit rate register */
  688. EXIT_ON_ERR( ret, st25r3916SetBitrate( (uint8_t)gRFAL.txBR, (uint8_t)gRFAL.rxBR ) );
  689. }
  690. switch( gRFAL.mode )
  691. {
  692. /*******************************************************************************/
  693. case RFAL_MODE_POLL_NFCA:
  694. case RFAL_MODE_POLL_NFCA_T1T:
  695. /* Set Analog configurations for this bit rate */
  696. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_POLL_COMMON) );
  697. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  698. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  699. break;
  700. /*******************************************************************************/
  701. case RFAL_MODE_POLL_NFCB:
  702. case RFAL_MODE_POLL_B_PRIME:
  703. case RFAL_MODE_POLL_B_CTS:
  704. /* Set Analog configurations for this bit rate */
  705. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_POLL_COMMON) );
  706. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  707. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCB | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  708. break;
  709. /*******************************************************************************/
  710. case RFAL_MODE_POLL_NFCF:
  711. /* Set Analog configurations for this bit rate */
  712. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_POLL_COMMON) );
  713. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  714. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCF | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  715. break;
  716. /*******************************************************************************/
  717. case RFAL_MODE_POLL_NFCV:
  718. case RFAL_MODE_POLL_PICOPASS:
  719. #if !RFAL_FEATURE_NFCV
  720. return ERR_DISABLED;
  721. #else
  722. if( ((gRFAL.rxBR != RFAL_BR_26p48) && (gRFAL.rxBR != RFAL_BR_52p97))
  723. || ((gRFAL.txBR != RFAL_BR_1p66) && (gRFAL.txBR != RFAL_BR_26p48)) )
  724. {
  725. return ERR_PARAM;
  726. }
  727. {
  728. const struct iso15693StreamConfig *isoStreamConfig;
  729. struct st25r3916StreamConfig streamConf;
  730. iso15693PhyConfig_t config;
  731. config.coding = (( gRFAL.txBR == RFAL_BR_1p66 ) ? ISO15693_VCD_CODING_1_256 : ISO15693_VCD_CODING_1_4);
  732. switch (gRFAL.rxBR){
  733. case RFAL_BR_52p97:
  734. config.speedMode = 1;
  735. break;
  736. default:
  737. config.speedMode = 0;
  738. break;
  739. }
  740. iso15693PhyConfigure(&config, &isoStreamConfig);
  741. /* MISRA 11.3 - Cannot point directly into different object type, copy to local var */
  742. streamConf.din = isoStreamConfig->din;
  743. streamConf.dout = isoStreamConfig->dout;
  744. streamConf.report_period_length = isoStreamConfig->report_period_length;
  745. streamConf.useBPSK = isoStreamConfig->useBPSK;
  746. st25r3916StreamConfigure(&streamConf);
  747. }
  748. /* Set Analog configurations for this bit rate */
  749. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_POLL_COMMON) );
  750. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  751. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  752. break;
  753. #endif /* RFAL_FEATURE_NFCV */
  754. /*******************************************************************************/
  755. case RFAL_MODE_POLL_ACTIVE_P2P:
  756. /* Set Analog configurations for this bit rate */
  757. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_POLL_COMMON) );
  758. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  759. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_AP2P | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  760. break;
  761. /*******************************************************************************/
  762. case RFAL_MODE_LISTEN_ACTIVE_P2P:
  763. /* Set Analog configurations for this bit rate */
  764. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LISTEN_COMMON) );
  765. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  766. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_AP2P | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  767. break;
  768. /*******************************************************************************/
  769. case RFAL_MODE_LISTEN_NFCA:
  770. /* Set Analog configurations for this bit rate */
  771. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LISTEN_COMMON) );
  772. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCA | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  773. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCA | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  774. break;
  775. /*******************************************************************************/
  776. case RFAL_MODE_LISTEN_NFCF:
  777. /* Set Analog configurations for this bit rate */
  778. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LISTEN_COMMON) );
  779. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCF | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX ) );
  780. rfalSetAnalogConfig( (rfalAnalogConfigId)(RFAL_ANALOG_CONFIG_LISTEN | RFAL_ANALOG_CONFIG_TECH_NFCF | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX ) );
  781. break;
  782. /*******************************************************************************/
  783. case RFAL_MODE_LISTEN_NFCB:
  784. case RFAL_MODE_NONE:
  785. return ERR_WRONG_STATE;
  786. /*******************************************************************************/
  787. default:
  788. return ERR_NOT_IMPLEMENTED;
  789. }
  790. return ERR_NONE;
  791. }
  792. /*******************************************************************************/
  793. ReturnCode rfalGetBitRate( rfalBitRate *txBR, rfalBitRate *rxBR )
  794. {
  795. if( (gRFAL.state == RFAL_STATE_IDLE) || (gRFAL.mode == RFAL_MODE_NONE) )
  796. {
  797. return ERR_WRONG_STATE;
  798. }
  799. if( txBR != NULL )
  800. {
  801. *txBR = gRFAL.txBR;
  802. }
  803. if( rxBR != NULL )
  804. {
  805. *rxBR = gRFAL.rxBR;
  806. }
  807. return ERR_NONE;
  808. }
  809. /*******************************************************************************/
  810. void rfalSetErrorHandling( rfalEHandling eHandling )
  811. {
  812. switch(eHandling)
  813. {
  814. case RFAL_ERRORHANDLING_NFC:
  815. case RFAL_ERRORHANDLING_NONE:
  816. st25r3916ClrRegisterBits( ST25R3916_REG_EMD_SUP_CONF, ST25R3916_REG_EMD_SUP_CONF_emd_emv );
  817. break;
  818. case RFAL_ERRORHANDLING_EMVCO:
  819. /* MISRA 16.4: no empty default statement (in case RFAL_SW_EMD is defined) */
  820. #ifndef RFAL_SW_EMD
  821. st25r3916ModifyRegister( ST25R3916_REG_EMD_SUP_CONF,
  822. (ST25R3916_REG_EMD_SUP_CONF_emd_emv | ST25R3916_REG_EMD_SUP_CONF_emd_thld_mask),
  823. (ST25R3916_REG_EMD_SUP_CONF_emd_emv_on | RFAL_EMVCO_RX_MAXLEN) );
  824. #endif /* RFAL_SW_EMD */
  825. break;
  826. default:
  827. /* MISRA 16.4: no empty default statement (a comment being enough) */
  828. break;
  829. }
  830. gRFAL.conf.eHandling = eHandling;
  831. }
  832. /*******************************************************************************/
  833. rfalEHandling rfalGetErrorHandling( void )
  834. {
  835. return gRFAL.conf.eHandling;
  836. }
  837. /*******************************************************************************/
  838. void rfalSetFDTPoll( uint32_t FDTPoll )
  839. {
  840. gRFAL.timings.FDTPoll = MIN( FDTPoll, RFAL_ST25R3916_GPT_MAX_1FC );
  841. }
  842. /*******************************************************************************/
  843. uint32_t rfalGetFDTPoll( void )
  844. {
  845. return gRFAL.timings.FDTPoll;
  846. }
  847. /*******************************************************************************/
  848. void rfalSetFDTListen( uint32_t FDTListen )
  849. {
  850. gRFAL.timings.FDTListen = MIN( FDTListen, RFAL_ST25R3916_MRT_MAX_1FC );
  851. }
  852. /*******************************************************************************/
  853. uint32_t rfalGetFDTListen( void )
  854. {
  855. return gRFAL.timings.FDTListen;
  856. }
  857. /*******************************************************************************/
  858. void rfalSetGT( uint32_t GT )
  859. {
  860. gRFAL.timings.GT = MIN( GT, RFAL_ST25R3916_GT_MAX_1FC );
  861. }
  862. /*******************************************************************************/
  863. uint32_t rfalGetGT( void )
  864. {
  865. return gRFAL.timings.GT;
  866. }
  867. /*******************************************************************************/
  868. bool rfalIsGTExpired( void )
  869. {
  870. if( gRFAL.tmr.GT != RFAL_TIMING_NONE )
  871. {
  872. if( !rfalTimerisExpired( gRFAL.tmr.GT ) )
  873. {
  874. return false;
  875. }
  876. }
  877. return true;
  878. }
  879. /*******************************************************************************/
  880. ReturnCode rfalFieldOnAndStartGT( void )
  881. {
  882. ReturnCode ret;
  883. /* Check if RFAL has been initialized (Oscillator should be running) and also
  884. * if a direct register access has been performed and left the Oscillator Off */
  885. if( !st25r3916IsOscOn() || (gRFAL.state < RFAL_STATE_INIT) )
  886. {
  887. return ERR_WRONG_STATE;
  888. }
  889. ret = ERR_NONE;
  890. /* Set Analog configurations for Field On event */
  891. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_FIELD_ON) );
  892. /*******************************************************************************/
  893. /* Perform collision avoidance and turn field On if not already On */
  894. if( !st25r3916IsTxEnabled() || !gRFAL.field )
  895. {
  896. /* Set TARFG: 0 (75us+0ms=75us), GT is fulfilled using a SW timer */
  897. st25r3916WriteRegister( ST25R3916_REG_FIELD_ON_GT, 0U );
  898. /* Use Thresholds set by AnalogConfig */
  899. ret = st25r3916PerformCollisionAvoidance( ST25R3916_CMD_INITIAL_RF_COLLISION, ST25R3916_THRESHOLD_DO_NOT_SET, ST25R3916_THRESHOLD_DO_NOT_SET, gRFAL.timings.nTRFW );
  900. /* n * TRFW timing shall vary Activity 2.1 3.3.1.1 */
  901. gRFAL.timings.nTRFW = rfalGennTRFW( gRFAL.timings.nTRFW );
  902. gRFAL.field = st25r3916IsTxEnabled(); //(ret == ERR_NONE);
  903. /* Only turn on Receiver and Transmitter if field was successfully turned On */
  904. if(gRFAL.field)
  905. {
  906. st25r3916TxRxOn(); /* Enable Tx and Rx (Tx is already On)*/
  907. }
  908. }
  909. /*******************************************************************************/
  910. /* Start GT timer in case the GT value is set */
  911. if( (gRFAL.timings.GT != RFAL_TIMING_NONE) )
  912. {
  913. /* Ensure that a SW timer doesn't have a lower value then the minimum */
  914. rfalTimerStart( gRFAL.tmr.GT, rfalConv1fcToMs( MAX( (gRFAL.timings.GT), RFAL_ST25R3916_GT_MIN_1FC) ) );
  915. }
  916. return ret;
  917. }
  918. /*******************************************************************************/
  919. ReturnCode rfalFieldOff( void )
  920. {
  921. /* Check whether a TxRx is not yet finished */
  922. if( gRFAL.TxRx.state != RFAL_TXRX_STATE_IDLE )
  923. {
  924. rfalCleanupTransceive();
  925. }
  926. /* Disable Tx and Rx */
  927. st25r3916TxRxOff();
  928. /* Set Analog configurations for Field Off event */
  929. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_FIELD_OFF) );
  930. gRFAL.field = false;
  931. return ERR_NONE;
  932. }
  933. /*******************************************************************************/
  934. ReturnCode rfalStartTransceive( const rfalTransceiveContext *ctx )
  935. {
  936. uint32_t FxTAdj; /* FWT or FDT adjustment calculation */
  937. /* Check for valid parameters */
  938. if( ctx == NULL )
  939. {
  940. return ERR_PARAM;
  941. }
  942. /* Ensure that RFAL is already Initialized and the mode has been set */
  943. if( (gRFAL.state >= RFAL_STATE_MODE_SET) /*&& (gRFAL.TxRx.state == RFAL_TXRX_STATE_INIT )*/ )
  944. {
  945. /*******************************************************************************/
  946. /* Check whether the field is already On, otherwise no TXE will be received */
  947. if( !st25r3916IsTxEnabled() && (!rfalIsModePassiveListen( gRFAL.mode ) && (ctx->txBuf != NULL)) )
  948. {
  949. return ERR_WRONG_STATE;
  950. }
  951. gRFAL.TxRx.ctx = *ctx;
  952. /*******************************************************************************/
  953. if( gRFAL.timings.FDTListen != RFAL_TIMING_NONE )
  954. {
  955. /* Calculate MRT adjustment accordingly to the current mode */
  956. FxTAdj = RFAL_FDT_LISTEN_MRT_ADJUSTMENT;
  957. if(gRFAL.mode == RFAL_MODE_POLL_NFCA) { FxTAdj += (uint32_t)RFAL_FDT_LISTEN_A_ADJUSTMENT; }
  958. if(gRFAL.mode == RFAL_MODE_POLL_NFCA_T1T) { FxTAdj += (uint32_t)RFAL_FDT_LISTEN_A_ADJUSTMENT; }
  959. if(gRFAL.mode == RFAL_MODE_POLL_NFCB) { FxTAdj += (uint32_t)RFAL_FDT_LISTEN_B_ADJUSTMENT; }
  960. if(gRFAL.mode == RFAL_MODE_POLL_NFCV) { FxTAdj += (uint32_t)RFAL_FDT_LISTEN_V_ADJUSTMENT; }
  961. /* Ensure that MRT is using 64/fc steps */
  962. st25r3916ClrRegisterBits(ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_mrt_step );
  963. /* If Correlator is being used further adjustment is required for NFCB */
  964. if( (st25r3916CheckReg(ST25R3916_REG_AUX, ST25R3916_REG_AUX_dis_corr, 0x00U)) && (gRFAL.mode == RFAL_MODE_POLL_NFCB) )
  965. {
  966. FxTAdj += (uint32_t)RFAL_FDT_LISTEN_B_ADJT_CORR; /* Reduce FDT(Listen) */
  967. st25r3916SetRegisterBits( ST25R3916_REG_CORR_CONF1, ST25R3916_REG_CORR_CONF1_corr_s3 ); /* Ensure BPSK start to 33 pilot pulses */
  968. st25r3916ChangeRegisterBits( ST25R3916_REG_SUBC_START_TIME, ST25R3916_REG_SUBC_START_TIME_sst_mask, RFAL_FDT_LISTEN_B_ADJT_CORR_SST ); /* Set sst */
  969. }
  970. /* Set Minimum FDT(Listen) in which PICC is not allowed to send a response */
  971. st25r3916WriteRegister( ST25R3916_REG_MASK_RX_TIMER, (uint8_t)rfalConv1fcTo64fc( (FxTAdj > gRFAL.timings.FDTListen) ? RFAL_ST25R3916_MRT_MIN_1FC : (gRFAL.timings.FDTListen - FxTAdj) ) );
  972. }
  973. /*******************************************************************************/
  974. /* FDT Poll will be loaded in rfalPrepareTransceive() once the previous was expired */
  975. /*******************************************************************************/
  976. if( (gRFAL.TxRx.ctx.fwt != RFAL_FWT_NONE) && (gRFAL.TxRx.ctx.fwt != 0U) )
  977. {
  978. /* Ensure proper timing configuration */
  979. if( gRFAL.timings.FDTListen >= gRFAL.TxRx.ctx.fwt )
  980. {
  981. return ERR_PARAM;
  982. }
  983. FxTAdj = RFAL_FWT_ADJUSTMENT;
  984. if(gRFAL.mode == RFAL_MODE_POLL_NFCA) { FxTAdj += (uint32_t)RFAL_FWT_A_ADJUSTMENT; }
  985. if(gRFAL.mode == RFAL_MODE_POLL_NFCA_T1T) { FxTAdj += (uint32_t)RFAL_FWT_A_ADJUSTMENT; }
  986. if(gRFAL.mode == RFAL_MODE_POLL_NFCB) { FxTAdj += (uint32_t)RFAL_FWT_B_ADJUSTMENT; }
  987. if( (gRFAL.mode == RFAL_MODE_POLL_NFCF) || (gRFAL.mode == RFAL_MODE_POLL_ACTIVE_P2P) )
  988. {
  989. FxTAdj += (uint32_t)((gRFAL.txBR == RFAL_BR_212) ? RFAL_FWT_F_212_ADJUSTMENT : RFAL_FWT_F_424_ADJUSTMENT );
  990. }
  991. /* Ensure that the given FWT doesn't exceed NRT maximum */
  992. gRFAL.TxRx.ctx.fwt = MIN( (gRFAL.TxRx.ctx.fwt + FxTAdj), RFAL_ST25R3916_NRT_MAX_1FC );
  993. /* Set FWT in the NRT */
  994. st25r3916SetNoResponseTime( rfalConv1fcTo64fc( gRFAL.TxRx.ctx.fwt ) );
  995. }
  996. else
  997. {
  998. /* Disable NRT, no NRE will be triggered, therefore wait endlessly for Rx */
  999. st25r3916SetNoResponseTime( RFAL_ST25R3916_NRT_DISABLED );
  1000. }
  1001. gRFAL.state = RFAL_STATE_TXRX;
  1002. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_IDLE;
  1003. gRFAL.TxRx.status = ERR_BUSY;
  1004. #if RFAL_FEATURE_NFCV
  1005. /*******************************************************************************/
  1006. if( (RFAL_MODE_POLL_NFCV == gRFAL.mode) || (RFAL_MODE_POLL_PICOPASS == gRFAL.mode) )
  1007. { /* Exchange receive buffer with internal buffer */
  1008. gRFAL.nfcvData.origCtx = gRFAL.TxRx.ctx;
  1009. gRFAL.TxRx.ctx.rxBuf = ((gRFAL.nfcvData.origCtx.rxBuf != NULL) ? gRFAL.nfcvData.codingBuffer : NULL);
  1010. gRFAL.TxRx.ctx.rxBufLen = (uint16_t)rfalConvBytesToBits(sizeof(gRFAL.nfcvData.codingBuffer));
  1011. gRFAL.TxRx.ctx.flags = (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL
  1012. | (uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP
  1013. | (uint32_t)RFAL_TXRX_FLAGS_NFCIP1_OFF
  1014. | (uint32_t)(gRFAL.nfcvData.origCtx.flags & (uint32_t)RFAL_TXRX_FLAGS_AGC_OFF)
  1015. | (uint32_t)RFAL_TXRX_FLAGS_PAR_RX_KEEP
  1016. | (uint32_t)RFAL_TXRX_FLAGS_PAR_TX_NONE;
  1017. /* In NFCV a TxRx with a valid txBuf and txBufSize==0 indicates to send an EOF */
  1018. /* Skip logic below that would go directly into receive */
  1019. if ( gRFAL.TxRx.ctx.txBuf != NULL )
  1020. {
  1021. return ERR_NONE;
  1022. }
  1023. }
  1024. #endif /* RFAL_FEATURE_NFCV */
  1025. /*******************************************************************************/
  1026. /* Check if the Transceive start performing Tx or goes directly to Rx */
  1027. if( (gRFAL.TxRx.ctx.txBuf == NULL) || (gRFAL.TxRx.ctx.txBufLen == 0U) )
  1028. {
  1029. /* Clear FIFO, Clear and Enable the Interrupts */
  1030. rfalPrepareTransceive( );
  1031. /* In AP2P check the field status */
  1032. if( rfalIsModeActiveComm(gRFAL.mode) )
  1033. {
  1034. /* Disable our field upon a Rx reEnable, and start PPON2 manually */
  1035. st25r3916TxOff();
  1036. st25r3916ExecuteCommand( ST25R3916_CMD_START_PPON2_TIMER );
  1037. }
  1038. /* No Tx done, enable the Receiver */
  1039. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  1040. /* Start NRT manually, if FWT = 0 (wait endlessly for Rx) chip will ignore anyhow */
  1041. st25r3916ExecuteCommand( ST25R3916_CMD_START_NO_RESPONSE_TIMER );
  1042. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_IDLE;
  1043. }
  1044. return ERR_NONE;
  1045. }
  1046. return ERR_WRONG_STATE;
  1047. }
  1048. /*******************************************************************************/
  1049. bool rfalIsTransceiveInTx( void )
  1050. {
  1051. return ( (gRFAL.TxRx.state >= RFAL_TXRX_STATE_TX_IDLE) && (gRFAL.TxRx.state < RFAL_TXRX_STATE_RX_IDLE) );
  1052. }
  1053. /*******************************************************************************/
  1054. bool rfalIsTransceiveInRx( void )
  1055. {
  1056. return (gRFAL.TxRx.state >= RFAL_TXRX_STATE_RX_IDLE);
  1057. }
  1058. /*******************************************************************************/
  1059. ReturnCode rfalTransceiveBlockingTx( uint8_t* txBuf, uint16_t txBufLen, uint8_t* rxBuf, uint16_t rxBufLen, uint16_t* actLen, uint32_t flags, uint32_t fwt )
  1060. {
  1061. ReturnCode ret;
  1062. rfalTransceiveContext ctx;
  1063. rfalCreateByteFlagsTxRxContext( ctx, txBuf, txBufLen, rxBuf, rxBufLen, actLen, flags, fwt );
  1064. EXIT_ON_ERR( ret, rfalStartTransceive( &ctx ) );
  1065. return rfalTransceiveRunBlockingTx();
  1066. }
  1067. /*******************************************************************************/
  1068. static ReturnCode rfalTransceiveRunBlockingTx( void )
  1069. {
  1070. ReturnCode ret;
  1071. do{
  1072. rfalWorker();
  1073. ret = rfalGetTransceiveStatus();
  1074. }
  1075. while( rfalIsTransceiveInTx() && (ret == ERR_BUSY) );
  1076. if( rfalIsTransceiveInRx() )
  1077. {
  1078. return ERR_NONE;
  1079. }
  1080. return ret;
  1081. }
  1082. /*******************************************************************************/
  1083. ReturnCode rfalTransceiveBlockingRx( void )
  1084. {
  1085. ReturnCode ret;
  1086. do{
  1087. rfalWorker();
  1088. ret = rfalGetTransceiveStatus();
  1089. }
  1090. while( rfalIsTransceiveInRx() && (ret == ERR_BUSY) );
  1091. return ret;
  1092. }
  1093. /*******************************************************************************/
  1094. ReturnCode rfalTransceiveBlockingTxRx( uint8_t* txBuf, uint16_t txBufLen, uint8_t* rxBuf, uint16_t rxBufLen, uint16_t* actLen, uint32_t flags, uint32_t fwt )
  1095. {
  1096. ReturnCode ret;
  1097. EXIT_ON_ERR( ret, rfalTransceiveBlockingTx( txBuf, txBufLen, rxBuf, rxBufLen, actLen, flags, fwt ) );
  1098. ret = rfalTransceiveBlockingRx();
  1099. /* Convert received bits to bytes */
  1100. if( actLen != NULL )
  1101. {
  1102. *actLen = rfalConvBitsToBytes(*actLen);
  1103. }
  1104. return ret;
  1105. }
  1106. /*******************************************************************************/
  1107. static ReturnCode rfalRunTransceiveWorker( void )
  1108. {
  1109. if( gRFAL.state == RFAL_STATE_TXRX )
  1110. {
  1111. /*******************************************************************************/
  1112. /* Check Transceive Sanity Timer has expired */
  1113. if( gRFAL.tmr.txRx != RFAL_TIMING_NONE )
  1114. {
  1115. if( rfalTimerisExpired( gRFAL.tmr.txRx ) )
  1116. {
  1117. /* If sanity timer has expired abort ongoing transceive and signal error */
  1118. gRFAL.TxRx.status = ERR_IO;
  1119. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1120. }
  1121. }
  1122. /*******************************************************************************/
  1123. /* Run Tx or Rx state machines */
  1124. if( rfalIsTransceiveInTx() )
  1125. {
  1126. rfalTransceiveTx();
  1127. return rfalGetTransceiveStatus();
  1128. }
  1129. if( rfalIsTransceiveInRx() )
  1130. {
  1131. rfalTransceiveRx();
  1132. return rfalGetTransceiveStatus();
  1133. }
  1134. }
  1135. return ERR_WRONG_STATE;
  1136. }
  1137. /*******************************************************************************/
  1138. rfalTransceiveState rfalGetTransceiveState( void )
  1139. {
  1140. return gRFAL.TxRx.state;
  1141. }
  1142. /*******************************************************************************/
  1143. ReturnCode rfalGetTransceiveStatus( void )
  1144. {
  1145. return ((gRFAL.TxRx.state == RFAL_TXRX_STATE_IDLE) ? gRFAL.TxRx.status : ERR_BUSY);
  1146. }
  1147. /*******************************************************************************/
  1148. ReturnCode rfalGetTransceiveRSSI( uint16_t *rssi )
  1149. {
  1150. uint16_t amRSSI;
  1151. uint16_t pmRSSI;
  1152. bool isSumMode;
  1153. if( rssi == NULL )
  1154. {
  1155. return ERR_PARAM;
  1156. }
  1157. st25r3916GetRSSI( &amRSSI, &pmRSSI );
  1158. /* Check if Correlator Summation mode is being used */
  1159. isSumMode = (st25r3916CheckReg( ST25R3916_REG_CORR_CONF1, ST25R3916_REG_CORR_CONF1_corr_s4, ST25R3916_REG_CORR_CONF1_corr_s4 ) ? st25r3916CheckReg( ST25R3916_REG_AUX, ST25R3916_REG_AUX_dis_corr, 0x00 ) : false );
  1160. if( isSumMode )
  1161. {
  1162. /*******************************************************************************/
  1163. /* Using SQRT from math.h and float. If due to compiler, resources or performance
  1164. * issue this cannot be used, other approaches can be foreseen with less accuracy:
  1165. * Use a simpler sqrt algorithm
  1166. * *rssi = MAX( amRSSI, pmRSSI );
  1167. * *rssi = ( (amRSSI + pmRSSI) / 2);
  1168. */
  1169. *rssi = (uint16_t) sqrt( ((double)amRSSI*(double)amRSSI) + ((double)pmRSSI*(double)pmRSSI) ); /* PRQA S 5209 # MISRA 4.9 - External function (sqrt()) requires double */
  1170. }
  1171. else
  1172. {
  1173. /* Check which channel was used */
  1174. *rssi = ( st25r3916CheckReg( ST25R3916_REG_AUX_DISPLAY, ST25R3916_REG_AUX_DISPLAY_a_cha, ST25R3916_REG_AUX_DISPLAY_a_cha ) ? pmRSSI : amRSSI );
  1175. }
  1176. return ERR_NONE;
  1177. }
  1178. /*******************************************************************************/
  1179. void rfalWorker( void )
  1180. {
  1181. platformProtectWorker(); /* Protect RFAL Worker/Task/Process */
  1182. switch( gRFAL.state )
  1183. {
  1184. case RFAL_STATE_TXRX:
  1185. rfalRunTransceiveWorker();
  1186. break;
  1187. #if RFAL_FEATURE_LISTEN_MODE
  1188. case RFAL_STATE_LM:
  1189. rfalRunListenModeWorker();
  1190. break;
  1191. #endif /* RFAL_FEATURE_LISTEN_MODE */
  1192. #if RFAL_FEATURE_WAKEUP_MODE
  1193. case RFAL_STATE_WUM:
  1194. rfalRunWakeUpModeWorker();
  1195. break;
  1196. #endif /* RFAL_FEATURE_WAKEUP_MODE */
  1197. /* Nothing to be done */
  1198. default:
  1199. /* MISRA 16.4: no empty default statement (a comment being enough) */
  1200. break;
  1201. }
  1202. platformUnprotectWorker(); /* Unprotect RFAL Worker/Task/Process */
  1203. }
  1204. /*******************************************************************************/
  1205. static void rfalErrorHandling( void )
  1206. {
  1207. uint16_t fifoBytesToRead;
  1208. fifoBytesToRead = rfalFIFOStatusGetNumBytes();
  1209. #ifdef RFAL_SW_EMD
  1210. /*******************************************************************************/
  1211. /* EMVCo */
  1212. /*******************************************************************************/
  1213. if( gRFAL.conf.eHandling == RFAL_ERRORHANDLING_EMVCO )
  1214. {
  1215. bool rxHasIncParError;
  1216. /*******************************************************************************/
  1217. /* EMD Handling - NFC Forum Digital 1.1 4.1.1.1 ; EMVCo v2.5 4.9.2 */
  1218. /* ReEnable the receiver on frames with a length < 4 bytes, upon: */
  1219. /* - Collision or Framing error detected */
  1220. /* - Residual bits are detected (hard framing error) */
  1221. /* - Parity error */
  1222. /* - CRC error */
  1223. /*******************************************************************************/
  1224. /* Check if reception has incomplete bytes or parity error */
  1225. rxHasIncParError = ( rfalFIFOStatusIsIncompleteByte() ? true : rfalFIFOStatusIsMissingPar() ); /* MISRA 13.5 */
  1226. /* In case there are residual bits decrement FIFO bytes */
  1227. /* Ensure FIFO contains some byte as the FIFO might be empty upon Framing errors */
  1228. if( (fifoBytesToRead > 0U) && rxHasIncParError )
  1229. {
  1230. fifoBytesToRead--;
  1231. }
  1232. if( ( (gRFAL.fifo.bytesTotal + fifoBytesToRead) < RFAL_EMVCO_RX_MAXLEN ) &&
  1233. ( (gRFAL.TxRx.status == ERR_RF_COLLISION) || (gRFAL.TxRx.status == ERR_FRAMING) ||
  1234. (gRFAL.TxRx.status == ERR_PAR) || (gRFAL.TxRx.status == ERR_CRC) ||
  1235. rxHasIncParError ) )
  1236. {
  1237. /* Ignore this reception, ReEnable receiver which also clears the FIFO */
  1238. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  1239. /* Ensure that the NRT has not expired meanwhile */
  1240. if( st25r3916CheckReg( ST25R3916_REG_NFCIP1_BIT_RATE, ST25R3916_REG_NFCIP1_BIT_RATE_nrt_on, 0x00 ) )
  1241. {
  1242. if( st25r3916CheckReg( ST25R3916_REG_AUX_DISPLAY, ST25R3916_REG_AUX_DISPLAY_rx_act, 0x00 ) )
  1243. {
  1244. /* Abort reception */
  1245. st25r3916ExecuteCommand( ST25R3916_CMD_MASK_RECEIVE_DATA );
  1246. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1247. return;
  1248. }
  1249. }
  1250. rfalFIFOStatusClear();
  1251. gRFAL.fifo.bytesTotal = 0;
  1252. gRFAL.TxRx.status = ERR_BUSY;
  1253. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXS;
  1254. }
  1255. return;
  1256. }
  1257. #endif
  1258. /*******************************************************************************/
  1259. /* ISO14443A Mode */
  1260. /*******************************************************************************/
  1261. if( gRFAL.mode == RFAL_MODE_POLL_NFCA )
  1262. {
  1263. /*******************************************************************************/
  1264. /* If we received a frame with a incomplete byte we`ll raise a specific error *
  1265. * ( support for T2T 4 bit ACK / NAK, MIFARE and Kovio ) */
  1266. /*******************************************************************************/
  1267. if( (gRFAL.TxRx.status == ERR_PAR) || (gRFAL.TxRx.status == ERR_CRC) )
  1268. {
  1269. if( rfalFIFOStatusIsIncompleteByte() )
  1270. {
  1271. st25r3916ReadFifo( (uint8_t*)(gRFAL.TxRx.ctx.rxBuf), fifoBytesToRead );
  1272. if( (gRFAL.TxRx.ctx.rxRcvdLen) != NULL )
  1273. {
  1274. *gRFAL.TxRx.ctx.rxRcvdLen = rfalFIFOGetNumIncompleteBits();
  1275. }
  1276. gRFAL.TxRx.status = ERR_INCOMPLETE_BYTE;
  1277. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1278. }
  1279. }
  1280. }
  1281. }
  1282. /*******************************************************************************/
  1283. static void rfalCleanupTransceive( void )
  1284. {
  1285. /*******************************************************************************/
  1286. /* Transceive flags */
  1287. /*******************************************************************************/
  1288. /* Restore default settings on NFCIP1 mode, Receiving parity + CRC bits and manual Tx Parity*/
  1289. st25r3916ClrRegisterBits( ST25R3916_REG_ISO14443A_NFC, (ST25R3916_REG_ISO14443A_NFC_no_tx_par | ST25R3916_REG_ISO14443A_NFC_no_rx_par | ST25R3916_REG_ISO14443A_NFC_nfc_f0) );
  1290. /* Restore AGC enabled */
  1291. st25r3916SetRegisterBits( ST25R3916_REG_RX_CONF2, ST25R3916_REG_RX_CONF2_agc_en );
  1292. /*******************************************************************************/
  1293. /*******************************************************************************/
  1294. /* Transceive timers */
  1295. /*******************************************************************************/
  1296. rfalTimerDestroy( gRFAL.tmr.txRx );
  1297. rfalTimerDestroy( gRFAL.tmr.RXE );
  1298. gRFAL.tmr.txRx = RFAL_TIMING_NONE;
  1299. gRFAL.tmr.RXE = RFAL_TIMING_NONE;
  1300. /*******************************************************************************/
  1301. /*******************************************************************************/
  1302. /* Execute Post Transceive Callback */
  1303. /*******************************************************************************/
  1304. if( gRFAL.callbacks.postTxRx != NULL )
  1305. {
  1306. gRFAL.callbacks.postTxRx();
  1307. }
  1308. /*******************************************************************************/
  1309. }
  1310. /*******************************************************************************/
  1311. static void rfalPrepareTransceive( void )
  1312. {
  1313. uint32_t maskInterrupts;
  1314. uint8_t reg;
  1315. /* If we are in RW or AP2P mode */
  1316. if( !rfalIsModePassiveListen( gRFAL.mode ) )
  1317. {
  1318. /* Reset receive logic with STOP command */
  1319. st25r3916ExecuteCommand( ST25R3916_CMD_STOP );
  1320. /* Reset Rx Gain */
  1321. st25r3916ExecuteCommand( ST25R3916_CMD_RESET_RXGAIN );
  1322. }
  1323. else
  1324. {
  1325. /* In Passive Listen Mode do not use STOP as it stops FDT timer */
  1326. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  1327. }
  1328. /*******************************************************************************/
  1329. /* FDT Poll */
  1330. /*******************************************************************************/
  1331. if( rfalIsModePassiveComm( gRFAL.mode ) ) /* Passive Comms */
  1332. {
  1333. /* In Passive communications General Purpose Timer is used to measure FDT Poll */
  1334. if( gRFAL.timings.FDTPoll != RFAL_TIMING_NONE )
  1335. {
  1336. /* Configure GPT to start at RX end */
  1337. st25r3916SetStartGPTimer( (uint16_t)rfalConv1fcTo8fc( MIN( gRFAL.timings.FDTPoll, (gRFAL.timings.FDTPoll - RFAL_FDT_POLL_ADJUSTMENT) ) ), ST25R3916_REG_TIMER_EMV_CONTROL_gptc_erx );
  1338. }
  1339. }
  1340. /*******************************************************************************/
  1341. /* Execute Pre Transceive Callback */
  1342. /*******************************************************************************/
  1343. if( gRFAL.callbacks.preTxRx != NULL )
  1344. {
  1345. gRFAL.callbacks.preTxRx();
  1346. }
  1347. /*******************************************************************************/
  1348. maskInterrupts = ( ST25R3916_IRQ_MASK_FWL | ST25R3916_IRQ_MASK_TXE |
  1349. ST25R3916_IRQ_MASK_RXS | ST25R3916_IRQ_MASK_RXE |
  1350. ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_CRC |
  1351. ST25R3916_IRQ_MASK_ERR1 | ST25R3916_IRQ_MASK_ERR2 |
  1352. ST25R3916_IRQ_MASK_NRE );
  1353. /*******************************************************************************/
  1354. /* Transceive flags */
  1355. /*******************************************************************************/
  1356. reg = (ST25R3916_REG_ISO14443A_NFC_no_tx_par_off | ST25R3916_REG_ISO14443A_NFC_no_rx_par_off | ST25R3916_REG_ISO14443A_NFC_nfc_f0_off);
  1357. /* Check if NFCIP1 mode is to be enabled */
  1358. if( (gRFAL.TxRx.ctx.flags & (uint8_t)RFAL_TXRX_FLAGS_NFCIP1_ON) != 0U )
  1359. {
  1360. reg |= ST25R3916_REG_ISO14443A_NFC_nfc_f0;
  1361. }
  1362. /* Check if Parity check is to be skipped and to keep the parity + CRC bits in FIFO */
  1363. if( (gRFAL.TxRx.ctx.flags & (uint8_t)RFAL_TXRX_FLAGS_PAR_RX_KEEP) != 0U )
  1364. {
  1365. reg |= ST25R3916_REG_ISO14443A_NFC_no_rx_par;
  1366. }
  1367. /* Check if automatic Parity bits is to be disabled */
  1368. if( (gRFAL.TxRx.ctx.flags & (uint8_t)RFAL_TXRX_FLAGS_PAR_TX_NONE) != 0U )
  1369. {
  1370. reg |= ST25R3916_REG_ISO14443A_NFC_no_tx_par;
  1371. }
  1372. /* Apply current TxRx flags on ISO14443A and NFC 106kb/s Settings Register */
  1373. st25r3916ChangeRegisterBits( ST25R3916_REG_ISO14443A_NFC, (ST25R3916_REG_ISO14443A_NFC_no_tx_par | ST25R3916_REG_ISO14443A_NFC_no_rx_par | ST25R3916_REG_ISO14443A_NFC_nfc_f0), reg );
  1374. /* Check if AGC is to be disabled */
  1375. if( (gRFAL.TxRx.ctx.flags & (uint8_t)RFAL_TXRX_FLAGS_AGC_OFF) != 0U )
  1376. {
  1377. st25r3916ClrRegisterBits( ST25R3916_REG_RX_CONF2, ST25R3916_REG_RX_CONF2_agc_en );
  1378. }
  1379. else
  1380. {
  1381. st25r3916SetRegisterBits( ST25R3916_REG_RX_CONF2, ST25R3916_REG_RX_CONF2_agc_en );
  1382. }
  1383. /*******************************************************************************/
  1384. /*******************************************************************************/
  1385. /* EMVCo NRT mode */
  1386. /*******************************************************************************/
  1387. if( gRFAL.conf.eHandling == RFAL_ERRORHANDLING_EMVCO )
  1388. {
  1389. st25r3916SetRegisterBits( ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_nrt_emv );
  1390. maskInterrupts |= ST25R3916_IRQ_MASK_RX_REST;
  1391. }
  1392. else
  1393. {
  1394. st25r3916ClrRegisterBits( ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_nrt_emv );
  1395. }
  1396. /*******************************************************************************/
  1397. /* In Passive Listen mode additionally enable External Field interrupts */
  1398. if( rfalIsModePassiveListen( gRFAL.mode ) )
  1399. {
  1400. maskInterrupts |= ( ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_WU_F ); /* Enable external Field interrupts to detect Link Loss and SENF_REQ auto responses */
  1401. }
  1402. /* In Active comms enable also External Field interrupts and set RF Collsion Avoindance */
  1403. if( rfalIsModeActiveComm( gRFAL.mode ) )
  1404. {
  1405. maskInterrupts |= ( ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_EON | ST25R3916_IRQ_MASK_PPON2 | ST25R3916_IRQ_MASK_CAT | ST25R3916_IRQ_MASK_CAC );
  1406. /* Set n=0 for subsequent RF Collision Avoidance */
  1407. st25r3916ChangeRegisterBits(ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_n_mask, 0);
  1408. }
  1409. /*******************************************************************************/
  1410. /* Start transceive Sanity Timer if a FWT is used */
  1411. if( (gRFAL.TxRx.ctx.fwt != RFAL_FWT_NONE) && (gRFAL.TxRx.ctx.fwt != 0U) )
  1412. {
  1413. rfalTimerStart( gRFAL.tmr.txRx, rfalCalcSanityTmr( gRFAL.TxRx.ctx.fwt ) );
  1414. }
  1415. /*******************************************************************************/
  1416. /*******************************************************************************/
  1417. /* Clear and enable these interrupts */
  1418. st25r3916GetInterrupt( maskInterrupts );
  1419. st25r3916EnableInterrupts( maskInterrupts );
  1420. /* Clear FIFO status local copy */
  1421. rfalFIFOStatusClear();
  1422. }
  1423. /*******************************************************************************/
  1424. static void rfalTransceiveTx( void )
  1425. {
  1426. volatile uint32_t irqs;
  1427. uint16_t tmp;
  1428. ReturnCode ret;
  1429. /* Supress warning in case NFC-V feature is disabled */
  1430. ret = ERR_NONE;
  1431. NO_WARNING( ret );
  1432. irqs = ST25R3916_IRQ_MASK_NONE;
  1433. if( gRFAL.TxRx.state != gRFAL.TxRx.lastState )
  1434. {
  1435. /* rfalLogD( "RFAL: lastSt: %d curSt: %d \r\n", gRFAL.TxRx.lastState, gRFAL.TxRx.state ); */
  1436. gRFAL.TxRx.lastState = gRFAL.TxRx.state;
  1437. }
  1438. switch( gRFAL.TxRx.state )
  1439. {
  1440. /*******************************************************************************/
  1441. case RFAL_TXRX_STATE_TX_IDLE:
  1442. /* Nothing to do */
  1443. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_WAIT_GT ;
  1444. /* fall through */
  1445. /*******************************************************************************/
  1446. case RFAL_TXRX_STATE_TX_WAIT_GT: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1447. if( !rfalIsGTExpired() )
  1448. {
  1449. break;
  1450. }
  1451. rfalTimerDestroy( gRFAL.tmr.GT );
  1452. gRFAL.tmr.GT = RFAL_TIMING_NONE;
  1453. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_WAIT_FDT;
  1454. /* fall through */
  1455. /*******************************************************************************/
  1456. case RFAL_TXRX_STATE_TX_WAIT_FDT: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1457. /* Only in Passive communications GPT is used to measure FDT Poll */
  1458. if( rfalIsModePassiveComm( gRFAL.mode ) )
  1459. {
  1460. if( st25r3916IsGPTRunning() )
  1461. {
  1462. break;
  1463. }
  1464. }
  1465. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_TRANSMIT;
  1466. /* fall through */
  1467. /*******************************************************************************/
  1468. case RFAL_TXRX_STATE_TX_TRANSMIT: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1469. /* Clear FIFO, Clear and Enable the Interrupts */
  1470. rfalPrepareTransceive( );
  1471. /* ST25R3916 has a fixed FIFO water level */
  1472. gRFAL.fifo.expWL = RFAL_FIFO_OUT_WL;
  1473. #if RFAL_FEATURE_NFCV
  1474. /*******************************************************************************/
  1475. /* In NFC-V streaming mode, the FIFO needs to be loaded with the coded bits */
  1476. if( (RFAL_MODE_POLL_NFCV == gRFAL.mode) || (RFAL_MODE_POLL_PICOPASS == gRFAL.mode) )
  1477. {
  1478. #if 0
  1479. /* Debugging code: output the payload bits by writing into the FIFO and subsequent clearing */
  1480. st25r3916WriteFifo(gRFAL.TxRx.ctx.txBuf, rfalConvBitsToBytes(gRFAL.TxRx.ctx.txBufLen));
  1481. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  1482. #endif
  1483. /* Calculate the bytes needed to be Written into FIFO (a incomplete byte will be added as 1byte) */
  1484. gRFAL.nfcvData.nfcvOffset = 0;
  1485. ret = iso15693VCDCode(gRFAL.TxRx.ctx.txBuf, rfalConvBitsToBytes(gRFAL.TxRx.ctx.txBufLen), (((gRFAL.nfcvData.origCtx.flags & (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL) != 0U)?false:true),(((gRFAL.nfcvData.origCtx.flags & (uint32_t)RFAL_TXRX_FLAGS_NFCV_FLAG_MANUAL) != 0U)?false:true), (RFAL_MODE_POLL_PICOPASS == gRFAL.mode),
  1486. &gRFAL.fifo.bytesTotal, &gRFAL.nfcvData.nfcvOffset, gRFAL.nfcvData.codingBuffer, MIN( (uint16_t)ST25R3916_FIFO_DEPTH, (uint16_t)sizeof(gRFAL.nfcvData.codingBuffer) ), &gRFAL.fifo.bytesWritten);
  1487. if( (ret != ERR_NONE) && (ret != ERR_AGAIN) )
  1488. {
  1489. gRFAL.TxRx.status = ret;
  1490. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_FAIL;
  1491. break;
  1492. }
  1493. /* Set the number of full bytes and bits to be transmitted */
  1494. st25r3916SetNumTxBits( (uint16_t)rfalConvBytesToBits(gRFAL.fifo.bytesTotal) );
  1495. /* Load FIFO with coded bytes */
  1496. st25r3916WriteFifo( gRFAL.nfcvData.codingBuffer, gRFAL.fifo.bytesWritten );
  1497. }
  1498. /*******************************************************************************/
  1499. else
  1500. #endif /* RFAL_FEATURE_NFCV */
  1501. {
  1502. /* Calculate the bytes needed to be Written into FIFO (a incomplete byte will be added as 1byte) */
  1503. gRFAL.fifo.bytesTotal = (uint16_t)rfalCalcNumBytes(gRFAL.TxRx.ctx.txBufLen);
  1504. /* Set the number of full bytes and bits to be transmitted */
  1505. st25r3916SetNumTxBits( gRFAL.TxRx.ctx.txBufLen );
  1506. /* Load FIFO with total length or FIFO's maximum */
  1507. gRFAL.fifo.bytesWritten = MIN( gRFAL.fifo.bytesTotal, ST25R3916_FIFO_DEPTH );
  1508. st25r3916WriteFifo( gRFAL.TxRx.ctx.txBuf, gRFAL.fifo.bytesWritten );
  1509. }
  1510. /*Check if Observation Mode is enabled and set it on ST25R391x */
  1511. rfalCheckEnableObsModeTx();
  1512. /*******************************************************************************/
  1513. /* If we're in Passive Listen mode ensure that the external field is still On */
  1514. if( rfalIsModePassiveListen(gRFAL.mode) )
  1515. {
  1516. if( !rfalIsExtFieldOn() )
  1517. {
  1518. gRFAL.TxRx.status = ERR_LINK_LOSS;
  1519. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_FAIL;
  1520. break;
  1521. }
  1522. }
  1523. /*******************************************************************************/
  1524. /* Trigger/Start transmission */
  1525. if( (gRFAL.TxRx.ctx.flags & (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL) != 0U )
  1526. {
  1527. st25r3916ExecuteCommand( ST25R3916_CMD_TRANSMIT_WITHOUT_CRC );
  1528. }
  1529. else
  1530. {
  1531. st25r3916ExecuteCommand( ST25R3916_CMD_TRANSMIT_WITH_CRC );
  1532. }
  1533. /* Check if a WL level is expected or TXE should come */
  1534. gRFAL.TxRx.state = (( gRFAL.fifo.bytesWritten < gRFAL.fifo.bytesTotal ) ? RFAL_TXRX_STATE_TX_WAIT_WL : RFAL_TXRX_STATE_TX_WAIT_TXE);
  1535. break;
  1536. /*******************************************************************************/
  1537. case RFAL_TXRX_STATE_TX_WAIT_WL:
  1538. irqs = st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_FWL | ST25R3916_IRQ_MASK_TXE) );
  1539. if( irqs == ST25R3916_IRQ_MASK_NONE )
  1540. {
  1541. break; /* No interrupt to process */
  1542. }
  1543. if( ((irqs & ST25R3916_IRQ_MASK_FWL) != 0U) && ((irqs & ST25R3916_IRQ_MASK_TXE) == 0U) )
  1544. {
  1545. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_RELOAD_FIFO;
  1546. }
  1547. else
  1548. {
  1549. gRFAL.TxRx.status = ERR_IO;
  1550. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_FAIL;
  1551. break;
  1552. }
  1553. /* fall through */
  1554. /*******************************************************************************/
  1555. case RFAL_TXRX_STATE_TX_RELOAD_FIFO: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1556. #if RFAL_FEATURE_NFCV
  1557. /*******************************************************************************/
  1558. /* In NFC-V streaming mode, the FIFO needs to be loaded with the coded bits */
  1559. if( (RFAL_MODE_POLL_NFCV == gRFAL.mode) || (RFAL_MODE_POLL_PICOPASS == gRFAL.mode) )
  1560. {
  1561. uint16_t maxLen;
  1562. /* Load FIFO with the remaining length or maximum available (which fit on the coding buffer) */
  1563. maxLen = (uint16_t)MIN( (gRFAL.fifo.bytesTotal - gRFAL.fifo.bytesWritten), gRFAL.fifo.expWL);
  1564. maxLen = (uint16_t)MIN( maxLen, sizeof(gRFAL.nfcvData.codingBuffer) );
  1565. tmp = 0;
  1566. /* Calculate the bytes needed to be Written into FIFO (a incomplete byte will be added as 1byte) */
  1567. ret = iso15693VCDCode(gRFAL.TxRx.ctx.txBuf, rfalConvBitsToBytes(gRFAL.TxRx.ctx.txBufLen), (((gRFAL.nfcvData.origCtx.flags & (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL) != 0U)?false:true),(((gRFAL.nfcvData.origCtx.flags & (uint32_t)RFAL_TXRX_FLAGS_NFCV_FLAG_MANUAL) != 0U)?false:true), (RFAL_MODE_POLL_PICOPASS == gRFAL.mode),
  1568. &gRFAL.fifo.bytesTotal, &gRFAL.nfcvData.nfcvOffset, gRFAL.nfcvData.codingBuffer, maxLen, &tmp);
  1569. if( (ret != ERR_NONE) && (ret != ERR_AGAIN) )
  1570. {
  1571. gRFAL.TxRx.status = ret;
  1572. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_FAIL;
  1573. break;
  1574. }
  1575. /* Load FIFO with coded bytes */
  1576. st25r3916WriteFifo( gRFAL.nfcvData.codingBuffer, tmp );
  1577. }
  1578. /*******************************************************************************/
  1579. else
  1580. #endif /* RFAL_FEATURE_NFCV */
  1581. {
  1582. /* Load FIFO with the remaining length or maximum available */
  1583. tmp = MIN( (gRFAL.fifo.bytesTotal - gRFAL.fifo.bytesWritten), gRFAL.fifo.expWL); /* tmp holds the number of bytes written on this iteration */
  1584. st25r3916WriteFifo( &gRFAL.TxRx.ctx.txBuf[gRFAL.fifo.bytesWritten], tmp );
  1585. }
  1586. /* Update total written bytes to FIFO */
  1587. gRFAL.fifo.bytesWritten += tmp;
  1588. /* Check if a WL level is expected or TXE should come */
  1589. gRFAL.TxRx.state = (( gRFAL.fifo.bytesWritten < gRFAL.fifo.bytesTotal ) ? RFAL_TXRX_STATE_TX_WAIT_WL : RFAL_TXRX_STATE_TX_WAIT_TXE);
  1590. break;
  1591. /*******************************************************************************/
  1592. case RFAL_TXRX_STATE_TX_WAIT_TXE:
  1593. irqs = st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_FWL | ST25R3916_IRQ_MASK_TXE) );
  1594. if( irqs == ST25R3916_IRQ_MASK_NONE )
  1595. {
  1596. break; /* No interrupt to process */
  1597. }
  1598. if( (irqs & ST25R3916_IRQ_MASK_TXE) != 0U )
  1599. {
  1600. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_DONE;
  1601. }
  1602. else if( (irqs & ST25R3916_IRQ_MASK_FWL) != 0U )
  1603. {
  1604. break; /* Ignore ST25R3916 FIFO WL if total TxLen is already on the FIFO */
  1605. }
  1606. else
  1607. {
  1608. gRFAL.TxRx.status = ERR_IO;
  1609. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_FAIL;
  1610. break;
  1611. }
  1612. /* fall through */
  1613. /*******************************************************************************/
  1614. case RFAL_TXRX_STATE_TX_DONE: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1615. /* If no rxBuf is provided do not wait/expect Rx */
  1616. if( gRFAL.TxRx.ctx.rxBuf == NULL )
  1617. {
  1618. /*Check if Observation Mode was enabled and disable it on ST25R391x */
  1619. rfalCheckDisableObsMode();
  1620. /* Clean up Transceive */
  1621. rfalCleanupTransceive();
  1622. gRFAL.TxRx.status = ERR_NONE;
  1623. gRFAL.TxRx.state = RFAL_TXRX_STATE_IDLE;
  1624. break;
  1625. }
  1626. rfalCheckEnableObsModeRx();
  1627. /* Goto Rx */
  1628. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_IDLE;
  1629. break;
  1630. /*******************************************************************************/
  1631. case RFAL_TXRX_STATE_TX_FAIL:
  1632. /* Error should be assigned by previous state */
  1633. if( gRFAL.TxRx.status == ERR_BUSY )
  1634. {
  1635. gRFAL.TxRx.status = ERR_SYSTEM;
  1636. }
  1637. /*Check if Observation Mode was enabled and disable it on ST25R391x */
  1638. rfalCheckDisableObsMode();
  1639. /* Clean up Transceive */
  1640. rfalCleanupTransceive();
  1641. gRFAL.TxRx.state = RFAL_TXRX_STATE_IDLE;
  1642. break;
  1643. /*******************************************************************************/
  1644. default:
  1645. gRFAL.TxRx.status = ERR_SYSTEM;
  1646. gRFAL.TxRx.state = RFAL_TXRX_STATE_TX_FAIL;
  1647. break;
  1648. }
  1649. }
  1650. /*******************************************************************************/
  1651. static void rfalTransceiveRx( void )
  1652. {
  1653. volatile uint32_t irqs;
  1654. uint16_t tmp;
  1655. uint16_t aux;
  1656. irqs = ST25R3916_IRQ_MASK_NONE;
  1657. if( gRFAL.TxRx.state != gRFAL.TxRx.lastState )
  1658. {
  1659. /* rfalLogD( "RFAL: lastSt: %d curSt: %d \r\n", gRFAL.TxRx.lastState, gRFAL.TxRx.state ); */
  1660. gRFAL.TxRx.lastState = gRFAL.TxRx.state;
  1661. }
  1662. switch( gRFAL.TxRx.state )
  1663. {
  1664. /*******************************************************************************/
  1665. case RFAL_TXRX_STATE_RX_IDLE:
  1666. /* Clear rx counters */
  1667. gRFAL.fifo.bytesWritten = 0; /* Total bytes written on RxBuffer */
  1668. gRFAL.fifo.bytesTotal = 0; /* Total bytes in FIFO will now be from Rx */
  1669. if( gRFAL.TxRx.ctx.rxRcvdLen != NULL )
  1670. {
  1671. *gRFAL.TxRx.ctx.rxRcvdLen = 0;
  1672. }
  1673. gRFAL.TxRx.state = ( rfalIsModeActiveComm( gRFAL.mode ) ? RFAL_TXRX_STATE_RX_WAIT_EON : RFAL_TXRX_STATE_RX_WAIT_RXS );
  1674. break;
  1675. /*******************************************************************************/
  1676. case RFAL_TXRX_STATE_RX_WAIT_RXS:
  1677. /*******************************************************************************/
  1678. irqs = st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_RXS | ST25R3916_IRQ_MASK_NRE | ST25R3916_IRQ_MASK_EOF) );
  1679. if( irqs == ST25R3916_IRQ_MASK_NONE )
  1680. {
  1681. break; /* No interrupt to process */
  1682. }
  1683. /* Only raise Timeout if NRE is detected with no Rx Start (NRT EMV mode) */
  1684. if( ((irqs & ST25R3916_IRQ_MASK_NRE) != 0U) && ((irqs & ST25R3916_IRQ_MASK_RXS) == 0U) )
  1685. {
  1686. gRFAL.TxRx.status = ERR_TIMEOUT;
  1687. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1688. break;
  1689. }
  1690. /* Only raise Link Loss if EOF is detected with no Rx Start */
  1691. if( ((irqs & ST25R3916_IRQ_MASK_EOF) != 0U) && ((irqs & ST25R3916_IRQ_MASK_RXS) == 0U) )
  1692. {
  1693. /* In AP2P a Field On has already occurred - treat this as timeout | mute */
  1694. gRFAL.TxRx.status = ( rfalIsModeActiveComm( gRFAL.mode ) ? ERR_TIMEOUT : ERR_LINK_LOSS );
  1695. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1696. break;
  1697. }
  1698. if( (irqs & ST25R3916_IRQ_MASK_RXS) != 0U )
  1699. {
  1700. /*******************************************************************************/
  1701. /* REMARK: Silicon workaround ST25R3916 Errata #TBD */
  1702. /* Rarely on corrupted frames I_rxs gets signaled but I_rxe is not signaled */
  1703. /* Use a SW timer to handle an eventual missing RXE */
  1704. rfalTimerStart( gRFAL.tmr.RXE, RFAL_NORXE_TOUT );
  1705. /*******************************************************************************/
  1706. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXE;
  1707. }
  1708. else
  1709. {
  1710. gRFAL.TxRx.status = ERR_IO;
  1711. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1712. break;
  1713. }
  1714. /* remove NRE that might appear together (NRT EMV mode), and remove RXS, but keep EOF if present for next state */
  1715. irqs &= ~(ST25R3916_IRQ_MASK_RXS | ST25R3916_IRQ_MASK_NRE);
  1716. /* fall through */
  1717. /*******************************************************************************/
  1718. case RFAL_TXRX_STATE_RX_WAIT_RXE: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1719. /*******************************************************************************/
  1720. /* REMARK: Silicon workaround ST25R3916 Errata #TBD */
  1721. /* ST25R396 may indicate RXS without RXE afterwards, this happens rarely on */
  1722. /* corrupted frames. */
  1723. /* SW timer is used to timeout upon a missing RXE */
  1724. if( rfalTimerisExpired( gRFAL.tmr.RXE ) )
  1725. {
  1726. gRFAL.TxRx.status = ERR_FRAMING;
  1727. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1728. }
  1729. /*******************************************************************************/
  1730. irqs |= st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_FWL | ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_RX_REST | ST25R3916_IRQ_MASK_WU_F ) );
  1731. if( irqs == ST25R3916_IRQ_MASK_NONE )
  1732. {
  1733. break; /* No interrupt to process */
  1734. }
  1735. if( (irqs & ST25R3916_IRQ_MASK_RX_REST) != 0U )
  1736. {
  1737. /* RX_REST indicates that Receiver has been reseted due to EMD, therefore a RXS + RXE should *
  1738. * follow if a good reception is followed within the valid initial timeout */
  1739. /* Check whether NRT has expired already, if so signal a timeout */
  1740. if( st25r3916GetInterrupt( ST25R3916_IRQ_MASK_NRE ) != 0U )
  1741. {
  1742. gRFAL.TxRx.status = ERR_TIMEOUT;
  1743. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1744. break;
  1745. }
  1746. if( st25r3916CheckReg( ST25R3916_REG_NFCIP1_BIT_RATE, ST25R3916_REG_NFCIP1_BIT_RATE_nrt_on, 0 ) ) /* MISRA 13.5 */
  1747. {
  1748. gRFAL.TxRx.status = ERR_TIMEOUT;
  1749. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1750. break;
  1751. }
  1752. /* Discard any previous RXS */
  1753. st25r3916GetInterrupt( ST25R3916_IRQ_MASK_RXS );
  1754. /* Check whether a following reception has already started */
  1755. if( st25r3916CheckReg( ST25R3916_REG_AUX_DISPLAY, ST25R3916_REG_AUX_DISPLAY_rx_act, ST25R3916_REG_AUX_DISPLAY_rx_act) )
  1756. {
  1757. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXE;
  1758. break;
  1759. }
  1760. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXS;
  1761. break;
  1762. }
  1763. if( ((irqs & ST25R3916_IRQ_MASK_FWL) != 0U) && ((irqs & ST25R3916_IRQ_MASK_RXE) == 0U) )
  1764. {
  1765. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_FIFO;
  1766. break;
  1767. }
  1768. /* Automatic responses allowed during TxRx only for the SENSF_REQ */
  1769. if( (irqs & ST25R3916_IRQ_MASK_WU_F) != 0U )
  1770. {
  1771. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXS;
  1772. break;
  1773. }
  1774. /* After RXE retrieve and check for any error irqs */
  1775. irqs |= st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_ERR1 | ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_COL) );
  1776. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_ERR_CHECK;
  1777. /* fall through */
  1778. /*******************************************************************************/
  1779. case RFAL_TXRX_STATE_RX_ERR_CHECK: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1780. if( (irqs & ST25R3916_IRQ_MASK_ERR1) != 0U )
  1781. {
  1782. gRFAL.TxRx.status = ERR_FRAMING;
  1783. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_DATA;
  1784. /* Check if there's a specific error handling for this */
  1785. rfalErrorHandling();
  1786. break;
  1787. }
  1788. /* Discard Soft Framing errors in AP2P and CE */
  1789. else if( rfalIsModePassivePoll( gRFAL.mode ) && ((irqs & ST25R3916_IRQ_MASK_ERR2) != 0U) )
  1790. {
  1791. gRFAL.TxRx.status = ERR_FRAMING;
  1792. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_DATA;
  1793. /* Check if there's a specific error handling for this */
  1794. rfalErrorHandling();
  1795. break;
  1796. }
  1797. else if( (irqs & ST25R3916_IRQ_MASK_PAR) != 0U )
  1798. {
  1799. gRFAL.TxRx.status = ERR_PAR;
  1800. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_DATA;
  1801. /* Check if there's a specific error handling for this */
  1802. rfalErrorHandling();
  1803. break;
  1804. }
  1805. else if( (irqs & ST25R3916_IRQ_MASK_CRC) != 0U )
  1806. {
  1807. gRFAL.TxRx.status = ERR_CRC;
  1808. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_DATA;
  1809. /* Check if there's a specific error handling for this */
  1810. rfalErrorHandling();
  1811. break;
  1812. }
  1813. else if( (irqs & ST25R3916_IRQ_MASK_COL) != 0U )
  1814. {
  1815. gRFAL.TxRx.status = ERR_RF_COLLISION;
  1816. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_DATA;
  1817. /* Check if there's a specific error handling for this */
  1818. rfalErrorHandling();
  1819. break;
  1820. }
  1821. else if( rfalIsModePassiveListen( gRFAL.mode ) && ((irqs & ST25R3916_IRQ_MASK_EOF) != 0U) )
  1822. {
  1823. gRFAL.TxRx.status = ERR_LINK_LOSS;
  1824. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1825. break;
  1826. }
  1827. else if( (irqs & ST25R3916_IRQ_MASK_RXE) != 0U )
  1828. {
  1829. /* Reception ended without any error indication, *
  1830. * check FIFO status for malformed or incomplete frames */
  1831. /* Check if the reception ends with an incomplete byte (residual bits) */
  1832. if( rfalFIFOStatusIsIncompleteByte() )
  1833. {
  1834. gRFAL.TxRx.status = ERR_INCOMPLETE_BYTE;
  1835. }
  1836. /* Check if the reception ends missing parity bit */
  1837. else if( rfalFIFOStatusIsMissingPar() )
  1838. {
  1839. gRFAL.TxRx.status = ERR_FRAMING;
  1840. }
  1841. else
  1842. {
  1843. /* MISRA 15.7 - Empty else */
  1844. }
  1845. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_READ_DATA;
  1846. }
  1847. else
  1848. {
  1849. gRFAL.TxRx.status = ERR_IO;
  1850. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1851. break;
  1852. }
  1853. /* fall through */
  1854. /*******************************************************************************/
  1855. case RFAL_TXRX_STATE_RX_READ_DATA: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1856. tmp = rfalFIFOStatusGetNumBytes();
  1857. /*******************************************************************************/
  1858. /* Check if CRC should not be placed in rxBuf */
  1859. if( ((gRFAL.TxRx.ctx.flags & (uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP) == 0U) )
  1860. {
  1861. /* if received frame was bigger than CRC */
  1862. if( (uint16_t)(gRFAL.fifo.bytesTotal + tmp) > 0U )
  1863. {
  1864. /* By default CRC will not be placed into the rxBuffer */
  1865. if( ( tmp > RFAL_CRC_LEN) )
  1866. {
  1867. tmp -= RFAL_CRC_LEN;
  1868. }
  1869. /* If the CRC was already placed into rxBuffer (due to WL interrupt where CRC was already in FIFO Read)
  1870. * cannot remove it from rxBuf. Can only remove it from rxBufLen not indicate the presence of CRC */
  1871. else if(gRFAL.fifo.bytesTotal > RFAL_CRC_LEN)
  1872. {
  1873. gRFAL.fifo.bytesTotal -= RFAL_CRC_LEN;
  1874. }
  1875. else
  1876. {
  1877. /* MISRA 15.7 - Empty else */
  1878. }
  1879. }
  1880. }
  1881. gRFAL.fifo.bytesTotal += tmp; /* add to total bytes counter */
  1882. /*******************************************************************************/
  1883. /* Check if remaining bytes fit on the rxBuf available */
  1884. if( gRFAL.fifo.bytesTotal > rfalConvBitsToBytes(gRFAL.TxRx.ctx.rxBufLen) )
  1885. {
  1886. tmp = (uint16_t)( rfalConvBitsToBytes(gRFAL.TxRx.ctx.rxBufLen) - gRFAL.fifo.bytesWritten);
  1887. /* Transmission errors have precedence over buffer error */
  1888. if( gRFAL.TxRx.status == ERR_BUSY )
  1889. {
  1890. gRFAL.TxRx.status = ERR_NOMEM;
  1891. }
  1892. }
  1893. /*******************************************************************************/
  1894. /* Retrieve remaining bytes from FIFO to rxBuf, and assign total length rcvd */
  1895. st25r3916ReadFifo( &gRFAL.TxRx.ctx.rxBuf[gRFAL.fifo.bytesWritten], tmp);
  1896. if( gRFAL.TxRx.ctx.rxRcvdLen != NULL )
  1897. {
  1898. (*gRFAL.TxRx.ctx.rxRcvdLen) = (uint16_t)rfalConvBytesToBits( gRFAL.fifo.bytesTotal );
  1899. if( rfalFIFOStatusIsIncompleteByte() )
  1900. {
  1901. (*gRFAL.TxRx.ctx.rxRcvdLen) -= (RFAL_BITS_IN_BYTE - rfalFIFOGetNumIncompleteBits());
  1902. }
  1903. }
  1904. #if RFAL_FEATURE_NFCV
  1905. /*******************************************************************************/
  1906. /* Decode sub bit stream into payload bits for NFCV, if no error found so far */
  1907. if( ((RFAL_MODE_POLL_NFCV == gRFAL.mode) || (RFAL_MODE_POLL_PICOPASS == gRFAL.mode)) && (gRFAL.TxRx.status == ERR_BUSY) )
  1908. {
  1909. ReturnCode ret;
  1910. uint16_t offset = 0; /* REMARK offset not currently used */
  1911. ret = iso15693VICCDecode(gRFAL.TxRx.ctx.rxBuf, gRFAL.fifo.bytesTotal,
  1912. gRFAL.nfcvData.origCtx.rxBuf, rfalConvBitsToBytes(gRFAL.nfcvData.origCtx.rxBufLen), &offset, gRFAL.nfcvData.origCtx.rxRcvdLen, gRFAL.nfcvData.ignoreBits, (RFAL_MODE_POLL_PICOPASS == gRFAL.mode));
  1913. if( ((ERR_NONE == ret) || (ERR_CRC == ret))
  1914. && (((uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP & gRFAL.nfcvData.origCtx.flags) == 0U)
  1915. && ((*gRFAL.nfcvData.origCtx.rxRcvdLen % RFAL_BITS_IN_BYTE) == 0U)
  1916. && (*gRFAL.nfcvData.origCtx.rxRcvdLen >= rfalConvBytesToBits(RFAL_CRC_LEN) )
  1917. )
  1918. {
  1919. *gRFAL.nfcvData.origCtx.rxRcvdLen -= (uint16_t)rfalConvBytesToBits(RFAL_CRC_LEN); /* Remove CRC */
  1920. }
  1921. #if 0
  1922. /* Debugging code: output the payload bits by writing into the FIFO and subsequent clearing */
  1923. st25r3916WriteFifo(gRFAL.nfcvData.origCtx.rxBuf, rfalConvBitsToBytes( *gRFAL.nfcvData.origCtx.rxRcvdLen));
  1924. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  1925. #endif
  1926. /* Restore original ctx */
  1927. gRFAL.TxRx.ctx = gRFAL.nfcvData.origCtx;
  1928. gRFAL.TxRx.status = ((ret != ERR_NONE) ? ret : ERR_BUSY);
  1929. }
  1930. #endif /* RFAL_FEATURE_NFCV */
  1931. /*******************************************************************************/
  1932. /* If an error as been marked/detected don't fall into to RX_DONE */
  1933. if( gRFAL.TxRx.status != ERR_BUSY )
  1934. {
  1935. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  1936. break;
  1937. }
  1938. if( rfalIsModeActiveComm( gRFAL.mode ) )
  1939. {
  1940. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_EOF;
  1941. break;
  1942. }
  1943. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_DONE;
  1944. /* fall through */
  1945. /*******************************************************************************/
  1946. case RFAL_TXRX_STATE_RX_DONE: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1947. /*Check if Observation Mode was enabled and disable it on ST25R391x */
  1948. rfalCheckDisableObsMode();
  1949. /* Clean up Transceive */
  1950. rfalCleanupTransceive();
  1951. gRFAL.TxRx.status = ERR_NONE;
  1952. gRFAL.TxRx.state = RFAL_TXRX_STATE_IDLE;
  1953. break;
  1954. /*******************************************************************************/
  1955. case RFAL_TXRX_STATE_RX_READ_FIFO:
  1956. /*******************************************************************************/
  1957. /* REMARK: Silicon workaround ST25R3916 Errata #TBD */
  1958. /* Rarely on corrupted frames I_rxs gets signaled but I_rxe is not signaled */
  1959. /* Use a SW timer to handle an eventual missing RXE */
  1960. rfalTimerStart( gRFAL.tmr.RXE, RFAL_NORXE_TOUT );
  1961. /*******************************************************************************/
  1962. tmp = rfalFIFOStatusGetNumBytes();
  1963. gRFAL.fifo.bytesTotal += tmp;
  1964. /*******************************************************************************/
  1965. /* Calculate the amount of bytes that still fits in rxBuf */
  1966. aux = (( gRFAL.fifo.bytesTotal > rfalConvBitsToBytes(gRFAL.TxRx.ctx.rxBufLen) ) ? (rfalConvBitsToBytes(gRFAL.TxRx.ctx.rxBufLen) - gRFAL.fifo.bytesWritten) : tmp);
  1967. /*******************************************************************************/
  1968. /* Retrieve incoming bytes from FIFO to rxBuf, and store already read amount */
  1969. st25r3916ReadFifo( &gRFAL.TxRx.ctx.rxBuf[gRFAL.fifo.bytesWritten], aux);
  1970. gRFAL.fifo.bytesWritten += aux;
  1971. /*******************************************************************************/
  1972. /* If the bytes already read were not the full FIFO WL, dump the remaining *
  1973. * FIFO so that ST25R391x can continue with reception */
  1974. if( aux < tmp )
  1975. {
  1976. st25r3916ReadFifo( NULL, (tmp - aux) );
  1977. }
  1978. rfalFIFOStatusClear();
  1979. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXE;
  1980. break;
  1981. /*******************************************************************************/
  1982. case RFAL_TXRX_STATE_RX_FAIL:
  1983. /*Check if Observation Mode was enabled and disable it on ST25R391x */
  1984. rfalCheckDisableObsMode();
  1985. /* Clean up Transceive */
  1986. rfalCleanupTransceive();
  1987. /* Error should be assigned by previous state */
  1988. if( gRFAL.TxRx.status == ERR_BUSY )
  1989. {
  1990. gRFAL.TxRx.status = ERR_SYSTEM;
  1991. }
  1992. /*rfalLogD( "RFAL: curSt: %d Error: %d \r\n", gRFAL.TxRx.state, gRFAL.TxRx.status );*/
  1993. gRFAL.TxRx.state = RFAL_TXRX_STATE_IDLE;
  1994. break;
  1995. /*******************************************************************************/
  1996. case RFAL_TXRX_STATE_RX_WAIT_EON:
  1997. irqs = st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_EON | ST25R3916_IRQ_MASK_NRE | ST25R3916_IRQ_MASK_PPON2) );
  1998. if( irqs == ST25R3916_IRQ_MASK_NONE )
  1999. {
  2000. break; /* No interrupt to process */
  2001. }
  2002. if( (irqs & ST25R3916_IRQ_MASK_EON) != 0U )
  2003. {
  2004. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_WAIT_RXS;
  2005. }
  2006. if( (irqs & ST25R3916_IRQ_MASK_NRE) != 0U )
  2007. {
  2008. gRFAL.TxRx.status = ERR_TIMEOUT;
  2009. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  2010. }
  2011. if( (irqs & ST25R3916_IRQ_MASK_PPON2) != 0U )
  2012. {
  2013. gRFAL.TxRx.status = ERR_LINK_LOSS;
  2014. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  2015. }
  2016. break;
  2017. /*******************************************************************************/
  2018. case RFAL_TXRX_STATE_RX_WAIT_EOF:
  2019. irqs = st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_CAT | ST25R3916_IRQ_MASK_CAC) );
  2020. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2021. {
  2022. break; /* No interrupt to process */
  2023. }
  2024. if( (irqs & ST25R3916_IRQ_MASK_CAT) != 0U )
  2025. {
  2026. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_DONE;
  2027. }
  2028. else if( (irqs & ST25R3916_IRQ_MASK_CAC) != 0U )
  2029. {
  2030. gRFAL.TxRx.status = ERR_RF_COLLISION;
  2031. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  2032. }
  2033. else
  2034. {
  2035. gRFAL.TxRx.status = ERR_IO;
  2036. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  2037. }
  2038. break;
  2039. /*******************************************************************************/
  2040. default:
  2041. gRFAL.TxRx.status = ERR_SYSTEM;
  2042. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_FAIL;
  2043. break;
  2044. }
  2045. }
  2046. /*******************************************************************************/
  2047. static void rfalFIFOStatusUpdate( void )
  2048. {
  2049. if(gRFAL.fifo.status[RFAL_FIFO_STATUS_REG2] == RFAL_FIFO_STATUS_INVALID)
  2050. {
  2051. st25r3916ReadMultipleRegisters( ST25R3916_REG_FIFO_STATUS1, gRFAL.fifo.status, ST25R3916_FIFO_STATUS_LEN );
  2052. }
  2053. }
  2054. /*******************************************************************************/
  2055. static void rfalFIFOStatusClear( void )
  2056. {
  2057. gRFAL.fifo.status[RFAL_FIFO_STATUS_REG2] = RFAL_FIFO_STATUS_INVALID;
  2058. }
  2059. /*******************************************************************************/
  2060. static uint16_t rfalFIFOStatusGetNumBytes( void )
  2061. {
  2062. uint16_t result;
  2063. rfalFIFOStatusUpdate();
  2064. result = ((((uint16_t)gRFAL.fifo.status[RFAL_FIFO_STATUS_REG2] & ST25R3916_REG_FIFO_STATUS2_fifo_b_mask) >> ST25R3916_REG_FIFO_STATUS2_fifo_b_shift) << RFAL_BITS_IN_BYTE);
  2065. result |= (((uint16_t)gRFAL.fifo.status[RFAL_FIFO_STATUS_REG1]) & 0x00FFU);
  2066. return result;
  2067. }
  2068. /*******************************************************************************/
  2069. static bool rfalFIFOStatusIsIncompleteByte( void )
  2070. {
  2071. rfalFIFOStatusUpdate();
  2072. return ((gRFAL.fifo.status[RFAL_FIFO_STATUS_REG2] & ST25R3916_REG_FIFO_STATUS2_fifo_lb_mask) != 0U);
  2073. }
  2074. /*******************************************************************************/
  2075. static bool rfalFIFOStatusIsMissingPar( void )
  2076. {
  2077. rfalFIFOStatusUpdate();
  2078. return ((gRFAL.fifo.status[RFAL_FIFO_STATUS_REG2] & ST25R3916_REG_FIFO_STATUS2_np_lb) != 0U);
  2079. }
  2080. /*******************************************************************************/
  2081. static uint8_t rfalFIFOGetNumIncompleteBits( void )
  2082. {
  2083. rfalFIFOStatusUpdate();
  2084. return ((gRFAL.fifo.status[RFAL_FIFO_STATUS_REG2] & ST25R3916_REG_FIFO_STATUS2_fifo_lb_mask) >> ST25R3916_REG_FIFO_STATUS2_fifo_lb_shift);
  2085. }
  2086. #if RFAL_FEATURE_NFCA
  2087. /*******************************************************************************/
  2088. ReturnCode rfalISO14443ATransceiveShortFrame( rfal14443AShortFrameCmd txCmd, uint8_t* rxBuf, uint8_t rxBufLen, uint16_t* rxRcvdLen, uint32_t fwt )
  2089. {
  2090. ReturnCode ret;
  2091. uint8_t directCmd;
  2092. /* Check if RFAL is properly initialized */
  2093. if( !st25r3916IsTxEnabled() || (gRFAL.state < RFAL_STATE_MODE_SET) || (( gRFAL.mode != RFAL_MODE_POLL_NFCA ) && ( gRFAL.mode != RFAL_MODE_POLL_NFCA_T1T )) )
  2094. {
  2095. return ERR_WRONG_STATE;
  2096. }
  2097. /* Check for valid parameters */
  2098. if( (rxBuf == NULL) || (rxRcvdLen == NULL) || (fwt == RFAL_FWT_NONE) )
  2099. {
  2100. return ERR_PARAM;
  2101. }
  2102. /*******************************************************************************/
  2103. /* Select the Direct Command to be performed */
  2104. switch (txCmd)
  2105. {
  2106. case RFAL_14443A_SHORTFRAME_CMD_WUPA:
  2107. directCmd = ST25R3916_CMD_TRANSMIT_WUPA;
  2108. break;
  2109. case RFAL_14443A_SHORTFRAME_CMD_REQA:
  2110. directCmd = ST25R3916_CMD_TRANSMIT_REQA;
  2111. break;
  2112. default:
  2113. return ERR_PARAM;
  2114. }
  2115. /* Disable CRC while receiving since ATQA has no CRC included */
  2116. st25r3916SetRegisterBits( ST25R3916_REG_AUX, ST25R3916_REG_AUX_no_crc_rx );
  2117. /*******************************************************************************/
  2118. /* Wait for GT and FDT */
  2119. while( !rfalIsGTExpired() ) { /* MISRA 15.6: mandatory brackets */ };
  2120. while( st25r3916IsGPTRunning() ) { /* MISRA 15.6: mandatory brackets */ };
  2121. rfalTimerDestroy( gRFAL.tmr.GT );
  2122. gRFAL.tmr.GT = RFAL_TIMING_NONE;
  2123. /*******************************************************************************/
  2124. /* Prepare for Transceive, Receive only (bypass Tx states) */
  2125. gRFAL.TxRx.ctx.flags = ( (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL | (uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP );
  2126. gRFAL.TxRx.ctx.rxBuf = rxBuf;
  2127. gRFAL.TxRx.ctx.rxBufLen = rxBufLen;
  2128. gRFAL.TxRx.ctx.rxRcvdLen = rxRcvdLen;
  2129. gRFAL.TxRx.ctx.fwt = fwt;
  2130. /*******************************************************************************/
  2131. /* Load NRT with FWT */
  2132. st25r3916SetNoResponseTime( rfalConv1fcTo64fc( MIN( (fwt + RFAL_FWT_ADJUSTMENT + RFAL_FWT_A_ADJUSTMENT), RFAL_ST25R3916_NRT_MAX_1FC ) ) );
  2133. if( gRFAL.timings.FDTListen != RFAL_TIMING_NONE )
  2134. {
  2135. /* Ensure that MRT is using 64/fc steps */
  2136. st25r3916ClrRegisterBits(ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_mrt_step );
  2137. /* Set Minimum FDT(Listen) in which PICC is not allowed to send a response */
  2138. st25r3916WriteRegister( ST25R3916_REG_MASK_RX_TIMER, (uint8_t)rfalConv1fcTo64fc( ((RFAL_FDT_LISTEN_MRT_ADJUSTMENT + RFAL_FDT_LISTEN_A_ADJUSTMENT) > gRFAL.timings.FDTListen) ? RFAL_ST25R3916_MRT_MIN_1FC : (gRFAL.timings.FDTListen - (RFAL_FDT_LISTEN_MRT_ADJUSTMENT + RFAL_FDT_LISTEN_A_ADJUSTMENT)) ) );
  2139. }
  2140. /* In Passive communications General Purpose Timer is used to measure FDT Poll */
  2141. if( gRFAL.timings.FDTPoll != RFAL_TIMING_NONE )
  2142. {
  2143. /* Configure GPT to start at RX end */
  2144. st25r3916SetStartGPTimer( (uint16_t)rfalConv1fcTo8fc( MIN( gRFAL.timings.FDTPoll, (gRFAL.timings.FDTPoll - RFAL_FDT_POLL_ADJUSTMENT) ) ) , ST25R3916_REG_TIMER_EMV_CONTROL_gptc_erx );
  2145. }
  2146. /*******************************************************************************/
  2147. rfalPrepareTransceive();
  2148. /* Also enable bit collision interrupt */
  2149. st25r3916GetInterrupt( ST25R3916_IRQ_MASK_COL );
  2150. st25r3916EnableInterrupts( ST25R3916_IRQ_MASK_COL );
  2151. /*Check if Observation Mode is enabled and set it on ST25R391x */
  2152. rfalCheckEnableObsModeTx();
  2153. /*******************************************************************************/
  2154. /* Clear nbtx bits before sending WUPA/REQA - otherwise ST25R3916 will report parity error, Note2 of the register */
  2155. st25r3916WriteRegister( ST25R3916_REG_NUM_TX_BYTES2, 0);
  2156. /* Send either WUPA or REQA. All affected tags will backscatter ATQA and change to READY state */
  2157. st25r3916ExecuteCommand( directCmd );
  2158. /* Wait for TXE */
  2159. if( st25r3916WaitForInterruptsTimed( ST25R3916_IRQ_MASK_TXE, (uint16_t)MAX( rfalConv1fcToMs( fwt ), RFAL_ST25R3916_SW_TMR_MIN_1MS ) ) == 0U )
  2160. {
  2161. ret = ERR_IO;
  2162. }
  2163. else
  2164. {
  2165. /*Check if Observation Mode is enabled and set it on ST25R391x */
  2166. rfalCheckEnableObsModeRx();
  2167. /* Jump into a transceive Rx state for reception (bypass Tx states) */
  2168. gRFAL.state = RFAL_STATE_TXRX;
  2169. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_IDLE;
  2170. gRFAL.TxRx.status = ERR_BUSY;
  2171. /* Execute Transceive Rx blocking */
  2172. ret = rfalTransceiveBlockingRx();
  2173. }
  2174. /* Disable Collision interrupt */
  2175. st25r3916DisableInterrupts( (ST25R3916_IRQ_MASK_COL) );
  2176. /* ReEnable CRC on Rx */
  2177. st25r3916ClrRegisterBits( ST25R3916_REG_AUX, ST25R3916_REG_AUX_no_crc_rx );
  2178. return ret;
  2179. }
  2180. /*******************************************************************************/
  2181. ReturnCode rfalISO14443ATransceiveAnticollisionFrame( uint8_t *buf, uint8_t *bytesToSend, uint8_t *bitsToSend, uint16_t *rxLength, uint32_t fwt )
  2182. {
  2183. ReturnCode ret;
  2184. rfalTransceiveContext ctx;
  2185. uint8_t collByte;
  2186. uint8_t collData;
  2187. /* Check if RFAL is properly initialized */
  2188. if( (gRFAL.state < RFAL_STATE_MODE_SET) || ( gRFAL.mode != RFAL_MODE_POLL_NFCA ) )
  2189. {
  2190. return ERR_WRONG_STATE;
  2191. }
  2192. /* Check for valid parameters */
  2193. if( (buf == NULL) || (bytesToSend == NULL) || (bitsToSend == NULL) || (rxLength == NULL) )
  2194. {
  2195. return ERR_PARAM;
  2196. }
  2197. /*******************************************************************************/
  2198. /* Set speficic Analog Config for Anticolission if needed */
  2199. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_ANTICOL) );
  2200. /*******************************************************************************/
  2201. /* Enable anti collision to recognise collision in first byte of SENS_REQ */
  2202. st25r3916SetRegisterBits( ST25R3916_REG_ISO14443A_NFC, ST25R3916_REG_ISO14443A_NFC_antcl );
  2203. /* Disable CRC while receiving */
  2204. st25r3916SetRegisterBits( ST25R3916_REG_AUX, ST25R3916_REG_AUX_no_crc_rx );
  2205. /*******************************************************************************/
  2206. /* Prepare for Transceive */
  2207. ctx.flags = ( (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL | (uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP );
  2208. ctx.txBuf = buf;
  2209. ctx.txBufLen = (uint16_t)(rfalConvBytesToBits( *bytesToSend ) + *bitsToSend );
  2210. ctx.rxBuf = &buf[*bytesToSend];
  2211. ctx.rxBufLen = (uint16_t)rfalConvBytesToBits( RFAL_ISO14443A_SDD_RES_LEN );
  2212. ctx.rxRcvdLen = rxLength;
  2213. ctx.fwt = fwt;
  2214. /* Disable Automatic Gain Control (AGC) for better detection of collisions if using Coherent Receiver */
  2215. ctx.flags |= (st25r3916CheckReg( ST25R3916_REG_AUX, ST25R3916_REG_AUX_dis_corr, ST25R3916_REG_AUX_dis_corr ) ? (uint32_t)RFAL_TXRX_FLAGS_AGC_OFF : 0x00U );
  2216. rfalStartTransceive( &ctx );
  2217. /* Additionally enable bit collision interrupt */
  2218. st25r3916GetInterrupt( ST25R3916_IRQ_MASK_COL );
  2219. st25r3916EnableInterrupts( ST25R3916_IRQ_MASK_COL );
  2220. /*******************************************************************************/
  2221. collByte = 0;
  2222. /* save the collision byte */
  2223. if ((*bitsToSend) > 0U)
  2224. {
  2225. buf[(*bytesToSend)] <<= (RFAL_BITS_IN_BYTE - (*bitsToSend));
  2226. buf[(*bytesToSend)] >>= (RFAL_BITS_IN_BYTE - (*bitsToSend));
  2227. collByte = buf[(*bytesToSend)];
  2228. }
  2229. /*******************************************************************************/
  2230. /* Run Transceive blocking */
  2231. ret = rfalTransceiveRunBlockingTx();
  2232. if( ret == ERR_NONE)
  2233. {
  2234. ret = rfalTransceiveBlockingRx();
  2235. /*******************************************************************************/
  2236. if ((*bitsToSend) > 0U)
  2237. {
  2238. buf[(*bytesToSend)] >>= (*bitsToSend);
  2239. buf[(*bytesToSend)] <<= (*bitsToSend);
  2240. buf[(*bytesToSend)] |= collByte;
  2241. }
  2242. if( (ERR_RF_COLLISION == ret) )
  2243. {
  2244. /* read out collision register */
  2245. st25r3916ReadRegister( ST25R3916_REG_COLLISION_STATUS, &collData);
  2246. (*bytesToSend) = ((collData >> ST25R3916_REG_COLLISION_STATUS_c_byte_shift) & 0x0FU); // 4-bits Byte information
  2247. (*bitsToSend) = ((collData >> ST25R3916_REG_COLLISION_STATUS_c_bit_shift) & 0x07U); // 3-bits bit information
  2248. }
  2249. }
  2250. /*******************************************************************************/
  2251. /* Disable Collision interrupt */
  2252. st25r3916DisableInterrupts( (ST25R3916_IRQ_MASK_COL) );
  2253. /* Disable anti collision again */
  2254. st25r3916ClrRegisterBits( ST25R3916_REG_ISO14443A_NFC, ST25R3916_REG_ISO14443A_NFC_antcl );
  2255. /* ReEnable CRC on Rx */
  2256. st25r3916ClrRegisterBits( ST25R3916_REG_AUX, ST25R3916_REG_AUX_no_crc_rx );
  2257. /*******************************************************************************/
  2258. /* Restore common Analog configurations for this mode */
  2259. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX) );
  2260. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCA | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX) );
  2261. return ret;
  2262. }
  2263. #endif /* RFAL_FEATURE_NFCA */
  2264. #if RFAL_FEATURE_NFCV
  2265. /*******************************************************************************/
  2266. ReturnCode rfalISO15693TransceiveAnticollisionFrame( uint8_t *txBuf, uint8_t txBufLen, uint8_t *rxBuf, uint8_t rxBufLen, uint16_t *actLen )
  2267. {
  2268. ReturnCode ret;
  2269. rfalTransceiveContext ctx;
  2270. /* Check if RFAL is properly initialized */
  2271. if( (gRFAL.state < RFAL_STATE_MODE_SET) || ( gRFAL.mode != RFAL_MODE_POLL_NFCV ) )
  2272. {
  2273. return ERR_WRONG_STATE;
  2274. }
  2275. /*******************************************************************************/
  2276. /* Set speficic Analog Config for Anticolission if needed */
  2277. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | RFAL_ANALOG_CONFIG_BITRATE_COMMON | RFAL_ANALOG_CONFIG_ANTICOL) );
  2278. /* Ignoring collisions before the UID (RES_FLAG + DSFID) */
  2279. gRFAL.nfcvData.ignoreBits = (uint16_t)RFAL_ISO15693_IGNORE_BITS;
  2280. /*******************************************************************************/
  2281. /* Prepare for Transceive */
  2282. ctx.flags = ((txBufLen==0U)?(uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL:(uint32_t)RFAL_TXRX_FLAGS_CRC_TX_AUTO) | (uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP | (uint32_t)RFAL_TXRX_FLAGS_AGC_OFF | ((txBufLen==0U)?(uint32_t)RFAL_TXRX_FLAGS_NFCV_FLAG_MANUAL:(uint32_t)RFAL_TXRX_FLAGS_NFCV_FLAG_AUTO); /* Disable Automatic Gain Control (AGC) for better detection of collision */
  2283. ctx.txBuf = txBuf;
  2284. ctx.txBufLen = (uint16_t)rfalConvBytesToBits(txBufLen);
  2285. ctx.rxBuf = rxBuf;
  2286. ctx.rxBufLen = (uint16_t)rfalConvBytesToBits(rxBufLen);
  2287. ctx.rxRcvdLen = actLen;
  2288. ctx.fwt = rfalConv64fcTo1fc(ISO15693_FWT);
  2289. rfalStartTransceive( &ctx );
  2290. /*******************************************************************************/
  2291. /* Run Transceive blocking */
  2292. ret = rfalTransceiveRunBlockingTx();
  2293. if( ret == ERR_NONE)
  2294. {
  2295. ret = rfalTransceiveBlockingRx();
  2296. }
  2297. /* Check if a Transmission error and received data is less then expected */
  2298. if( ((ret == ERR_RF_COLLISION) || (ret == ERR_CRC) || (ret == ERR_FRAMING)) && (rfalConvBitsToBytes(*ctx.rxRcvdLen) < RFAL_ISO15693_INV_RES_LEN) )
  2299. {
  2300. /* If INVENTORY_RES is shorter than expected, tag is still modulating *
  2301. * Ensure that response is complete before next frame */
  2302. platformDelay( (uint8_t)( (RFAL_ISO15693_INV_RES_LEN - rfalConvBitsToBytes(*ctx.rxRcvdLen)) / ((RFAL_ISO15693_INV_RES_LEN / RFAL_ISO15693_INV_RES_DUR)+1U) ));
  2303. }
  2304. /* Restore common Analog configurations for this mode */
  2305. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | rfalConvBR2ACBR(gRFAL.txBR) | RFAL_ANALOG_CONFIG_TX) );
  2306. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_POLL | RFAL_ANALOG_CONFIG_TECH_NFCV | rfalConvBR2ACBR(gRFAL.rxBR) | RFAL_ANALOG_CONFIG_RX) );
  2307. gRFAL.nfcvData.ignoreBits = 0;
  2308. return ret;
  2309. }
  2310. /*******************************************************************************/
  2311. ReturnCode rfalISO15693TransceiveEOFAnticollision( uint8_t *rxBuf, uint8_t rxBufLen, uint16_t *actLen )
  2312. {
  2313. uint8_t dummy;
  2314. return rfalISO15693TransceiveAnticollisionFrame( &dummy, 0, rxBuf, rxBufLen, actLen );
  2315. }
  2316. /*******************************************************************************/
  2317. ReturnCode rfalISO15693TransceiveEOF( uint8_t *rxBuf, uint8_t rxBufLen, uint16_t *actLen )
  2318. {
  2319. ReturnCode ret;
  2320. uint8_t dummy;
  2321. /* Check if RFAL is properly initialized */
  2322. if( (gRFAL.state < RFAL_STATE_MODE_SET) || ( gRFAL.mode != RFAL_MODE_POLL_NFCV ) )
  2323. {
  2324. return ERR_WRONG_STATE;
  2325. }
  2326. /*******************************************************************************/
  2327. /* Run Transceive blocking */
  2328. ret = rfalTransceiveBlockingTxRx( &dummy,
  2329. 0,
  2330. rxBuf,
  2331. rxBufLen,
  2332. actLen,
  2333. ( (uint32_t)RFAL_TXRX_FLAGS_CRC_TX_MANUAL | (uint32_t)RFAL_TXRX_FLAGS_CRC_RX_KEEP | (uint32_t)RFAL_TXRX_FLAGS_AGC_ON ),
  2334. rfalConv64fcTo1fc(ISO15693_FWT) );
  2335. return ret;
  2336. }
  2337. #endif /* RFAL_FEATURE_NFCV */
  2338. #if RFAL_FEATURE_NFCF
  2339. /*******************************************************************************/
  2340. ReturnCode rfalFeliCaPoll( rfalFeliCaPollSlots slots, uint16_t sysCode, uint8_t reqCode, rfalFeliCaPollRes* pollResList, uint8_t pollResListSize, uint8_t *devicesDetected, uint8_t *collisionsDetected )
  2341. {
  2342. ReturnCode ret;
  2343. uint8_t frame[RFAL_FELICA_POLL_REQ_LEN - RFAL_FELICA_LEN_LEN]; // LEN is added by ST25R391x automatically
  2344. uint16_t actLen;
  2345. uint8_t frameIdx;
  2346. uint8_t devDetected;
  2347. uint8_t colDetected;
  2348. rfalEHandling curHandling;
  2349. uint8_t nbSlots;
  2350. /* Check if RFAL is properly initialized */
  2351. if( (gRFAL.state < RFAL_STATE_MODE_SET) || ( gRFAL.mode != RFAL_MODE_POLL_NFCF ) )
  2352. {
  2353. return ERR_WRONG_STATE;
  2354. }
  2355. frameIdx = 0;
  2356. colDetected = 0;
  2357. devDetected = 0;
  2358. nbSlots = (uint8_t)slots;
  2359. /*******************************************************************************/
  2360. /* Compute SENSF_REQ frame */
  2361. frame[frameIdx++] = (uint8_t)FELICA_CMD_POLLING; /* CMD: SENF_REQ */
  2362. frame[frameIdx++] = (uint8_t)(sysCode >> 8); /* System Code (SC) */
  2363. frame[frameIdx++] = (uint8_t)(sysCode & 0xFFU); /* System Code (SC) */
  2364. frame[frameIdx++] = reqCode; /* Communication Parameter Request (RC)*/
  2365. frame[frameIdx++] = nbSlots; /* TimeSlot (TSN) */
  2366. /*******************************************************************************/
  2367. /* NRT should not stop on reception - Use EMVCo mode to run NRT in nrt_emv *
  2368. * ERRORHANDLING_EMVCO has no special handling for NFC-F mode */
  2369. curHandling = gRFAL.conf.eHandling;
  2370. rfalSetErrorHandling( RFAL_ERRORHANDLING_EMVCO );
  2371. /*******************************************************************************/
  2372. /* Run transceive blocking,
  2373. * Calculate Total Response Time in(64/fc):
  2374. * 512 PICC process time + (n * 256 Time Slot duration) */
  2375. ret = rfalTransceiveBlockingTx( frame,
  2376. (uint16_t)frameIdx,
  2377. (uint8_t*)gRFAL.nfcfData.pollResponses,
  2378. RFAL_FELICA_POLL_RES_LEN,
  2379. &actLen,
  2380. (RFAL_TXRX_FLAGS_DEFAULT),
  2381. rfalConv64fcTo1fc( RFAL_FELICA_POLL_DELAY_TIME + (RFAL_FELICA_POLL_SLOT_TIME * ((uint32_t)nbSlots + 1U)) ) );
  2382. /*******************************************************************************/
  2383. /* If Tx OK, Wait for all responses, store them as soon as they appear */
  2384. if( ret == ERR_NONE )
  2385. {
  2386. bool timeout;
  2387. do
  2388. {
  2389. ret = rfalTransceiveBlockingRx();
  2390. if( ret == ERR_TIMEOUT )
  2391. {
  2392. /* Upon timeout the full Poll Delay + (Slot time)*(nbSlots) has expired */
  2393. timeout = true;
  2394. }
  2395. else
  2396. {
  2397. /* Reception done, reEnabled Rx for following Slot */
  2398. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2399. st25r3916ExecuteCommand( ST25R3916_CMD_RESET_RXGAIN );
  2400. /* If the reception was OK, new device found */
  2401. if( ret == ERR_NONE )
  2402. {
  2403. devDetected++;
  2404. /* Overwrite the Transceive context for the next reception */
  2405. gRFAL.TxRx.ctx.rxBuf = (uint8_t*)gRFAL.nfcfData.pollResponses[devDetected];
  2406. }
  2407. /* If the reception was not OK, mark as collision */
  2408. else
  2409. {
  2410. colDetected++;
  2411. }
  2412. /* Check whether NRT has expired meanwhile */
  2413. timeout = st25r3916CheckReg( ST25R3916_REG_NFCIP1_BIT_RATE, ST25R3916_REG_NFCIP1_BIT_RATE_nrt_on, 0x00 );
  2414. if( !timeout )
  2415. {
  2416. /* Jump again into transceive Rx state for the following reception */
  2417. gRFAL.TxRx.status = ERR_BUSY;
  2418. gRFAL.state = RFAL_STATE_TXRX;
  2419. gRFAL.TxRx.state = RFAL_TXRX_STATE_RX_IDLE;
  2420. }
  2421. }
  2422. }while( ((nbSlots--) != 0U) && !timeout );
  2423. }
  2424. /*******************************************************************************/
  2425. /* Restore NRT to normal mode - back to previous error handling */
  2426. rfalSetErrorHandling( curHandling );
  2427. /*******************************************************************************/
  2428. /* Assign output parameters if requested */
  2429. if( (pollResList != NULL) && (pollResListSize > 0U) && (devDetected > 0U) )
  2430. {
  2431. ST_MEMCPY( pollResList, gRFAL.nfcfData.pollResponses, (RFAL_FELICA_POLL_RES_LEN * (uint32_t)MIN(pollResListSize, devDetected) ) );
  2432. }
  2433. if( devicesDetected != NULL )
  2434. {
  2435. *devicesDetected = devDetected;
  2436. }
  2437. if( collisionsDetected != NULL )
  2438. {
  2439. *collisionsDetected = colDetected;
  2440. }
  2441. return (( (colDetected != 0U) || (devDetected != 0U)) ? ERR_NONE : ret);
  2442. }
  2443. #endif /* RFAL_FEATURE_NFCF */
  2444. /*****************************************************************************
  2445. * Listen Mode *
  2446. *****************************************************************************/
  2447. /*******************************************************************************/
  2448. bool rfalIsExtFieldOn( void )
  2449. {
  2450. return st25r3916IsExtFieldOn();
  2451. }
  2452. #if RFAL_FEATURE_LISTEN_MODE
  2453. /*******************************************************************************/
  2454. ReturnCode rfalListenStart( uint32_t lmMask, const rfalLmConfPA *confA, const rfalLmConfPB *confB, const rfalLmConfPF *confF, uint8_t *rxBuf, uint16_t rxBufLen, uint16_t *rxLen )
  2455. {
  2456. t_rfalPTMem PTMem; /* PRQA S 0759 # MISRA 19.2 - Allocating Union where members are of the same type, just different names. Thus no problem can occur. */
  2457. uint8_t* pPTMem;
  2458. uint8_t autoResp;
  2459. /* Check if RFAL is initialized */
  2460. if( gRFAL.state < RFAL_STATE_INIT )
  2461. {
  2462. return ERR_WRONG_STATE;
  2463. }
  2464. gRFAL.Lm.state = RFAL_LM_STATE_NOT_INIT;
  2465. gRFAL.Lm.mdIrqs = ST25R3916_IRQ_MASK_NONE;
  2466. gRFAL.Lm.mdReg = (ST25R3916_REG_MODE_targ_init | ST25R3916_REG_MODE_om_nfc | ST25R3916_REG_MODE_nfc_ar_off);
  2467. /* By default disable all automatic responses */
  2468. autoResp = (ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a | ST25R3916_REG_PASSIVE_TARGET_rfu | ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r | ST25R3916_REG_PASSIVE_TARGET_d_ac_ap2p);
  2469. /*******************************************************************************/
  2470. if( (lmMask & RFAL_LM_MASK_NFCA) != 0U )
  2471. {
  2472. /* Check if the conf has been provided */
  2473. if( confA == NULL )
  2474. {
  2475. return ERR_PARAM;
  2476. }
  2477. pPTMem = (uint8_t*)PTMem.PTMem_A;
  2478. /*******************************************************************************/
  2479. /* Check and set supported NFCID Length */
  2480. switch(confA->nfcidLen)
  2481. {
  2482. case RFAL_LM_NFCID_LEN_04:
  2483. st25r3916ChangeRegisterBits( ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_id_mask, ST25R3916_REG_AUX_nfc_id_4bytes );
  2484. break;
  2485. case RFAL_LM_NFCID_LEN_07:
  2486. st25r3916ChangeRegisterBits( ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_id_mask, ST25R3916_REG_AUX_nfc_id_7bytes );
  2487. break;
  2488. default:
  2489. return ERR_PARAM;
  2490. }
  2491. /*******************************************************************************/
  2492. /* Set NFCID */
  2493. ST_MEMCPY( pPTMem, confA->nfcid, RFAL_NFCID1_TRIPLE_LEN );
  2494. pPTMem = &pPTMem[RFAL_NFCID1_TRIPLE_LEN]; /* MISRA 18.4 */
  2495. /* Set SENS_RES */
  2496. ST_MEMCPY( pPTMem, confA->SENS_RES, RFAL_LM_SENS_RES_LEN );
  2497. pPTMem = &pPTMem[RFAL_LM_SENS_RES_LEN]; /* MISRA 18.4 */
  2498. /* Set SEL_RES */
  2499. *pPTMem++ = ( (confA->nfcidLen == RFAL_LM_NFCID_LEN_04) ? ( confA->SEL_RES & ~RFAL_LM_NFCID_INCOMPLETE ) : (confA->SEL_RES | RFAL_LM_NFCID_INCOMPLETE) );
  2500. *pPTMem++ = ( confA->SEL_RES & ~RFAL_LM_NFCID_INCOMPLETE );
  2501. *pPTMem++ = ( confA->SEL_RES & ~RFAL_LM_NFCID_INCOMPLETE );
  2502. /* Write into PTMem-A */
  2503. st25r3916WritePTMem( PTMem.PTMem_A, ST25R3916_PTM_A_LEN );
  2504. /*******************************************************************************/
  2505. /* Enable automatic responses for A */
  2506. autoResp &= ~ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a;
  2507. /* Set Target mode, Bit Rate detection and Listen Mode for NFC-F */
  2508. gRFAL.Lm.mdReg |= (ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om0 | ST25R3916_REG_MODE_nfc_ar_off);
  2509. gRFAL.Lm.mdIrqs |= (ST25R3916_IRQ_MASK_WU_A | ST25R3916_IRQ_MASK_WU_A_X | ST25R3916_IRQ_MASK_RXE_PTA);
  2510. }
  2511. /*******************************************************************************/
  2512. if( (lmMask & RFAL_LM_MASK_NFCB) != 0U )
  2513. {
  2514. /* Check if the conf has been provided */
  2515. if( confB == NULL )
  2516. {
  2517. return ERR_PARAM;
  2518. }
  2519. return ERR_NOTSUPP;
  2520. }
  2521. /*******************************************************************************/
  2522. if( (lmMask & RFAL_LM_MASK_NFCF) != 0U )
  2523. {
  2524. pPTMem = (uint8_t*)PTMem.PTMem_F;
  2525. /* Check if the conf has been provided */
  2526. if( confF == NULL )
  2527. {
  2528. return ERR_PARAM;
  2529. }
  2530. /*******************************************************************************/
  2531. /* Set System Code */
  2532. ST_MEMCPY( pPTMem, confF->SC, RFAL_LM_SENSF_SC_LEN );
  2533. pPTMem = &pPTMem[RFAL_LM_SENSF_SC_LEN]; /* MISRA 18.4 */
  2534. /* Set SENSF_RES */
  2535. ST_MEMCPY( pPTMem, confF->SENSF_RES, RFAL_LM_SENSF_RES_LEN );
  2536. /* Set RD bytes to 0x00 as ST25R3916 cannot support advances features */
  2537. pPTMem[RFAL_LM_SENSF_RD0_POS] = 0x00; /* NFC Forum Digital 1.1 Table 46: 0x00 */
  2538. pPTMem[RFAL_LM_SENSF_RD1_POS] = 0x00; /* NFC Forum Digital 1.1 Table 47: No automatic bit rates */
  2539. pPTMem = &pPTMem[RFAL_LM_SENS_RES_LEN]; /* MISRA 18.4 */
  2540. /* Write into PTMem-F */
  2541. st25r3916WritePTMemF( PTMem.PTMem_F, ST25R3916_PTM_F_LEN );
  2542. /*******************************************************************************/
  2543. /* Write 24 TSN "Random" Numbers at first initialization and let it rollover */
  2544. if( !gRFAL.Lm.iniFlag )
  2545. {
  2546. pPTMem = (uint8_t*)PTMem.TSN;
  2547. *pPTMem++ = 0x12;
  2548. *pPTMem++ = 0x34;
  2549. *pPTMem++ = 0x56;
  2550. *pPTMem++ = 0x78;
  2551. *pPTMem++ = 0x9A;
  2552. *pPTMem++ = 0xBC;
  2553. *pPTMem++ = 0xDF;
  2554. *pPTMem++ = 0x21;
  2555. *pPTMem++ = 0x43;
  2556. *pPTMem++ = 0x65;
  2557. *pPTMem++ = 0x87;
  2558. *pPTMem++ = 0xA9;
  2559. /* Write into PTMem-TSN */
  2560. st25r3916WritePTMemTSN( PTMem.TSN, ST25R3916_PTM_TSN_LEN );
  2561. }
  2562. /*******************************************************************************/
  2563. /* Enable automatic responses for F */
  2564. autoResp &= ~(ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r);
  2565. /* Set Target mode, Bit Rate detection and Listen Mode for NFC-F */
  2566. gRFAL.Lm.mdReg |= (ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om2 | ST25R3916_REG_MODE_nfc_ar_off);
  2567. /* In CE NFC-F any data without error will be passed to FIFO, to support CUP */
  2568. gRFAL.Lm.mdIrqs |= (ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_RXE_PTA | ST25R3916_IRQ_MASK_RXE);
  2569. }
  2570. /*******************************************************************************/
  2571. if( (lmMask & RFAL_LM_MASK_ACTIVE_P2P) != 0U )
  2572. {
  2573. /* Enable Reception of P2P frames */
  2574. autoResp &= ~(ST25R3916_REG_PASSIVE_TARGET_d_ac_ap2p);
  2575. /* Set Target mode, Bit Rate detection and Automatic Response RF Collision Avoidance */
  2576. gRFAL.Lm.mdReg |= (ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om2 | ST25R3916_REG_MODE_om0 | ST25R3916_REG_MODE_nfc_ar_auto_rx);
  2577. /* n * TRFW timing shall vary Activity 2.1 3.4.1.1 */
  2578. st25r3916ChangeRegisterBits(ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_n_mask, gRFAL.timings.nTRFW);
  2579. gRFAL.timings.nTRFW = rfalGennTRFW( gRFAL.timings.nTRFW );
  2580. gRFAL.Lm.mdIrqs |= ( ST25R3916_IRQ_MASK_RXE );
  2581. }
  2582. /* Check if one of the modes were selected */
  2583. if( (gRFAL.Lm.mdReg & ST25R3916_REG_MODE_targ) == ST25R3916_REG_MODE_targ_targ )
  2584. {
  2585. gRFAL.state = RFAL_STATE_LM;
  2586. gRFAL.Lm.mdMask = lmMask;
  2587. gRFAL.Lm.rxBuf = rxBuf;
  2588. gRFAL.Lm.rxBufLen = rxBufLen;
  2589. gRFAL.Lm.rxLen = rxLen;
  2590. *gRFAL.Lm.rxLen = 0;
  2591. gRFAL.Lm.dataFlag = false;
  2592. gRFAL.Lm.iniFlag = true;
  2593. /* Apply the Automatic Responses configuration */
  2594. st25r3916ChangeRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a | ST25R3916_REG_PASSIVE_TARGET_rfu | ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r | ST25R3916_REG_PASSIVE_TARGET_d_ac_ap2p ), autoResp );
  2595. /* Disable GPT trigger source */
  2596. st25r3916ChangeRegisterBits( ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_gptc_mask, ST25R3916_REG_TIMER_EMV_CONTROL_gptc_no_trigger );
  2597. /* On Bit Rate Detection Mode ST25R391x will filter incoming frames during MRT time starting on External Field On event, use 512/fc steps */
  2598. st25r3916SetRegisterBits(ST25R3916_REG_TIMER_EMV_CONTROL, ST25R3916_REG_TIMER_EMV_CONTROL_mrt_step_512 );
  2599. st25r3916WriteRegister( ST25R3916_REG_MASK_RX_TIMER, (uint8_t)rfalConv1fcTo512fc( RFAL_LM_GT ) );
  2600. /* Restore default settings on NFCIP1 mode, Receiving parity + CRC bits and manual Tx Parity*/
  2601. st25r3916ClrRegisterBits( ST25R3916_REG_ISO14443A_NFC, (ST25R3916_REG_ISO14443A_NFC_no_tx_par | ST25R3916_REG_ISO14443A_NFC_no_rx_par | ST25R3916_REG_ISO14443A_NFC_nfc_f0) );
  2602. /* External Field Detector enabled as Automatics on rfalInitialize() */
  2603. /* Set Analog configurations for generic Listen mode */
  2604. /* Not on SetState(POWER OFF) as otherwise would be applied on every Field Event */
  2605. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LISTEN_ON) );
  2606. /* Initialize as POWER_OFF and set proper mode in RF Chip */
  2607. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2608. }
  2609. else
  2610. {
  2611. return ERR_REQUEST; /* Listen Start called but no mode was enabled */
  2612. }
  2613. return ERR_NONE;
  2614. }
  2615. /*******************************************************************************/
  2616. static ReturnCode rfalRunListenModeWorker( void )
  2617. {
  2618. volatile uint32_t irqs;
  2619. uint8_t tmp;
  2620. if( gRFAL.state != RFAL_STATE_LM )
  2621. {
  2622. return ERR_WRONG_STATE;
  2623. }
  2624. switch( gRFAL.Lm.state )
  2625. {
  2626. /*******************************************************************************/
  2627. case RFAL_LM_STATE_POWER_OFF:
  2628. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_EON ) );
  2629. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2630. {
  2631. break; /* No interrupt to process */
  2632. }
  2633. if( (irqs & ST25R3916_IRQ_MASK_EON) != 0U )
  2634. {
  2635. rfalListenSetState( RFAL_LM_STATE_IDLE );
  2636. }
  2637. else
  2638. {
  2639. break;
  2640. }
  2641. /* fall through */
  2642. /*******************************************************************************/
  2643. case RFAL_LM_STATE_IDLE: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  2644. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_NFCT | ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_RXE_PTA ) );
  2645. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2646. {
  2647. break; /* No interrupt to process */
  2648. }
  2649. if( (irqs & ST25R3916_IRQ_MASK_NFCT) != 0U )
  2650. {
  2651. /* Retrieve detected bitrate */
  2652. uint8_t newBr;
  2653. st25r3916ReadRegister( ST25R3916_REG_NFCIP1_BIT_RATE, &newBr );
  2654. newBr >>= ST25R3916_REG_NFCIP1_BIT_RATE_nfc_rate_shift;
  2655. if (newBr > ST25R3916_REG_BIT_RATE_rxrate_424)
  2656. {
  2657. newBr = ST25R3916_REG_BIT_RATE_rxrate_424;
  2658. }
  2659. gRFAL.Lm.brDetected = (rfalBitRate)(newBr); /* PRQA S 4342 # MISRA 10.5 - Guaranteed that no invalid enum values may be created. See also equalityGuard_RFAL_BR_106 ff.*/
  2660. }
  2661. if( ((irqs & ST25R3916_IRQ_MASK_WU_F) != 0U) && (gRFAL.Lm.brDetected != RFAL_BR_KEEP) )
  2662. {
  2663. rfalListenSetState( RFAL_LM_STATE_READY_F );
  2664. }
  2665. else if( ((irqs & ST25R3916_IRQ_MASK_RXE) != 0U) && (gRFAL.Lm.brDetected != RFAL_BR_KEEP) )
  2666. {
  2667. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_ERR1 ) );
  2668. if( ((irqs & ST25R3916_IRQ_MASK_CRC) != 0U) || ((irqs & ST25R3916_IRQ_MASK_PAR) != 0U) || ((irqs & ST25R3916_IRQ_MASK_ERR1) != 0U))
  2669. {
  2670. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  2671. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2672. st25r3916TxOff();
  2673. break; /* A bad reception occurred, remain in same state */
  2674. }
  2675. /* Retrieve received data */
  2676. *gRFAL.Lm.rxLen = st25r3916GetNumFIFOBytes();
  2677. st25r3916ReadFifo( gRFAL.Lm.rxBuf, MIN( *gRFAL.Lm.rxLen, rfalConvBitsToBytes(gRFAL.Lm.rxBufLen) ) );
  2678. /*******************************************************************************/
  2679. /* REMARK: Silicon workaround ST25R3916 Errata #TBD */
  2680. /* In bitrate detection mode CRC is now checked for NFC-A frames */
  2681. if( (*gRFAL.Lm.rxLen > RFAL_CRC_LEN) && (gRFAL.Lm.brDetected == RFAL_BR_106) )
  2682. {
  2683. if( rfalCrcCalculateCcitt( RFAL_ISO14443A_CRC_INTVAL, gRFAL.Lm.rxBuf, *gRFAL.Lm.rxLen ) != 0U )
  2684. {
  2685. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  2686. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2687. st25r3916TxOff();
  2688. break; /* A bad reception occurred, remain in same state */
  2689. }
  2690. }
  2691. /*******************************************************************************/
  2692. /* Check if the data we got has at least the CRC and remove it, otherwise leave at 0 */
  2693. *gRFAL.Lm.rxLen -= ((*gRFAL.Lm.rxLen > RFAL_CRC_LEN) ? RFAL_CRC_LEN : *gRFAL.Lm.rxLen);
  2694. *gRFAL.Lm.rxLen = (uint16_t)rfalConvBytesToBits( *gRFAL.Lm.rxLen );
  2695. gRFAL.Lm.dataFlag = true;
  2696. /*Check if Observation Mode was enabled and disable it on ST25R391x */
  2697. rfalCheckDisableObsMode();
  2698. }
  2699. else if( ((irqs & ST25R3916_IRQ_MASK_RXE_PTA) != 0U) && (gRFAL.Lm.brDetected != RFAL_BR_KEEP) )
  2700. {
  2701. if( ((gRFAL.Lm.mdMask & RFAL_LM_MASK_NFCA) != 0U) && (gRFAL.Lm.brDetected == RFAL_BR_106) )
  2702. {
  2703. st25r3916ReadRegister( ST25R3916_REG_PASSIVE_TARGET_STATUS, &tmp );
  2704. if( tmp > ST25R3916_REG_PASSIVE_TARGET_STATUS_pta_st_idle )
  2705. {
  2706. rfalListenSetState( RFAL_LM_STATE_READY_A );
  2707. }
  2708. }
  2709. }
  2710. else if( ((irqs & ST25R3916_IRQ_MASK_EOF) != 0U) && (!gRFAL.Lm.dataFlag) )
  2711. {
  2712. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2713. }
  2714. else
  2715. {
  2716. /* MISRA 15.7 - Empty else */
  2717. }
  2718. break;
  2719. /*******************************************************************************/
  2720. case RFAL_LM_STATE_READY_F:
  2721. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_EOF) );
  2722. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2723. {
  2724. break; /* No interrupt to process */
  2725. }
  2726. if( (irqs & ST25R3916_IRQ_MASK_WU_F) != 0U )
  2727. {
  2728. break;
  2729. }
  2730. else if( (irqs & ST25R3916_IRQ_MASK_RXE) != 0U )
  2731. {
  2732. /* Retrieve the error flags/irqs */
  2733. irqs |= st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_ERR1) );
  2734. if( ((irqs & ST25R3916_IRQ_MASK_CRC) != 0U) || ((irqs & ST25R3916_IRQ_MASK_ERR1) != 0U) )
  2735. {
  2736. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  2737. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2738. break; /* A bad reception occurred, remain in same state */
  2739. }
  2740. /* Retrieve received data */
  2741. *gRFAL.Lm.rxLen = st25r3916GetNumFIFOBytes();
  2742. st25r3916ReadFifo( gRFAL.Lm.rxBuf, MIN( *gRFAL.Lm.rxLen, rfalConvBitsToBytes(gRFAL.Lm.rxBufLen) ) );
  2743. /* Check if the data we got has at least the CRC and remove it, otherwise leave at 0 */
  2744. *gRFAL.Lm.rxLen -= ((*gRFAL.Lm.rxLen > RFAL_CRC_LEN) ? RFAL_CRC_LEN : *gRFAL.Lm.rxLen);
  2745. *gRFAL.Lm.rxLen = (uint16_t)rfalConvBytesToBits( *gRFAL.Lm.rxLen );
  2746. gRFAL.Lm.dataFlag = true;
  2747. }
  2748. else if( (irqs & ST25R3916_IRQ_MASK_EOF) != 0U )
  2749. {
  2750. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2751. }
  2752. else
  2753. {
  2754. /* MISRA 15.7 - Empty else */
  2755. }
  2756. break;
  2757. /*******************************************************************************/
  2758. case RFAL_LM_STATE_READY_A:
  2759. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_WU_A ) );
  2760. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2761. {
  2762. break; /* No interrupt to process */
  2763. }
  2764. if( (irqs & ST25R3916_IRQ_MASK_WU_A) != 0U )
  2765. {
  2766. rfalListenSetState( RFAL_LM_STATE_ACTIVE_A );
  2767. }
  2768. else if( (irqs & ST25R3916_IRQ_MASK_EOF) != 0U )
  2769. {
  2770. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2771. }
  2772. else
  2773. {
  2774. /* MISRA 15.7 - Empty else */
  2775. }
  2776. break;
  2777. /*******************************************************************************/
  2778. case RFAL_LM_STATE_ACTIVE_A:
  2779. case RFAL_LM_STATE_ACTIVE_Ax:
  2780. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_EOF) );
  2781. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2782. {
  2783. break; /* No interrupt to process */
  2784. }
  2785. if( (irqs & ST25R3916_IRQ_MASK_RXE) != 0U )
  2786. {
  2787. /* Retrieve the error flags/irqs */
  2788. irqs |= st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_ERR1) );
  2789. *gRFAL.Lm.rxLen = st25r3916GetNumFIFOBytes();
  2790. if( ((irqs & ST25R3916_IRQ_MASK_CRC) != 0U) || ((irqs & ST25R3916_IRQ_MASK_ERR1) != 0U) ||
  2791. ((irqs & ST25R3916_IRQ_MASK_PAR) != 0U) || (*gRFAL.Lm.rxLen <= RFAL_CRC_LEN) )
  2792. {
  2793. /* Clear rx context and FIFO */
  2794. *gRFAL.Lm.rxLen = 0;
  2795. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  2796. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2797. /* Check if we should go to IDLE or Sleep */
  2798. if( gRFAL.Lm.state == RFAL_LM_STATE_ACTIVE_Ax )
  2799. {
  2800. rfalListenSleepStart( RFAL_LM_STATE_SLEEP_A, gRFAL.Lm.rxBuf, gRFAL.Lm.rxBufLen, gRFAL.Lm.rxLen );
  2801. }
  2802. else
  2803. {
  2804. rfalListenSetState( RFAL_LM_STATE_IDLE );
  2805. }
  2806. st25r3916DisableInterrupts( ST25R3916_IRQ_MASK_RXE );
  2807. break;
  2808. }
  2809. /* Remove CRC from length */
  2810. *gRFAL.Lm.rxLen -= RFAL_CRC_LEN;
  2811. /* Retrieve received data */
  2812. st25r3916ReadFifo( gRFAL.Lm.rxBuf, MIN( *gRFAL.Lm.rxLen, rfalConvBitsToBytes(gRFAL.Lm.rxBufLen) ) );
  2813. *gRFAL.Lm.rxLen = (uint16_t)rfalConvBytesToBits( *gRFAL.Lm.rxLen );
  2814. gRFAL.Lm.dataFlag = true;
  2815. }
  2816. else if( (irqs & ST25R3916_IRQ_MASK_EOF) != 0U )
  2817. {
  2818. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2819. }
  2820. else
  2821. {
  2822. /* MISRA 15.7 - Empty else */
  2823. }
  2824. break;
  2825. /*******************************************************************************/
  2826. case RFAL_LM_STATE_SLEEP_A:
  2827. case RFAL_LM_STATE_SLEEP_B:
  2828. case RFAL_LM_STATE_SLEEP_AF:
  2829. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_NFCT | ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_RXE_PTA ) );
  2830. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2831. {
  2832. break; /* No interrupt to process */
  2833. }
  2834. if( (irqs & ST25R3916_IRQ_MASK_NFCT) != 0U )
  2835. {
  2836. uint8_t newBr;
  2837. /* Retrieve detected bitrate */
  2838. st25r3916ReadRegister( ST25R3916_REG_NFCIP1_BIT_RATE, &newBr );
  2839. newBr >>= ST25R3916_REG_NFCIP1_BIT_RATE_nfc_rate_shift;
  2840. if (newBr > ST25R3916_REG_BIT_RATE_rxrate_424)
  2841. {
  2842. newBr = ST25R3916_REG_BIT_RATE_rxrate_424;
  2843. }
  2844. gRFAL.Lm.brDetected = (rfalBitRate)(newBr); /* PRQA S 4342 # MISRA 10.5 - Guaranteed that no invalid enum values may be created. See also equalityGuard_RFAL_BR_106 ff.*/
  2845. }
  2846. if( ((irqs & ST25R3916_IRQ_MASK_WU_F) != 0U) && (gRFAL.Lm.brDetected != RFAL_BR_KEEP) )
  2847. {
  2848. rfalListenSetState( RFAL_LM_STATE_READY_F );
  2849. }
  2850. else if( ((irqs & ST25R3916_IRQ_MASK_RXE) != 0U) && (gRFAL.Lm.brDetected != RFAL_BR_KEEP) )
  2851. {
  2852. /* Clear rx context and FIFO */
  2853. *gRFAL.Lm.rxLen = 0;
  2854. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  2855. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2856. /* REMARK: In order to support CUP or proprietary frames, handling could be added here */
  2857. }
  2858. else if( ((irqs & ST25R3916_IRQ_MASK_RXE_PTA) != 0U) && (gRFAL.Lm.brDetected != RFAL_BR_KEEP) )
  2859. {
  2860. if( ((gRFAL.Lm.mdMask & RFAL_LM_MASK_NFCA) != 0U) && (gRFAL.Lm.brDetected == RFAL_BR_106) )
  2861. {
  2862. st25r3916ReadRegister( ST25R3916_REG_PASSIVE_TARGET_STATUS, &tmp );
  2863. if( tmp > ST25R3916_REG_PASSIVE_TARGET_STATUS_pta_st_halt )
  2864. {
  2865. rfalListenSetState( RFAL_LM_STATE_READY_Ax );
  2866. }
  2867. }
  2868. }
  2869. else if( (irqs & ST25R3916_IRQ_MASK_EOF) != 0U )
  2870. {
  2871. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2872. }
  2873. else
  2874. {
  2875. /* MISRA 15.7 - Empty else */
  2876. }
  2877. break;
  2878. /*******************************************************************************/
  2879. case RFAL_LM_STATE_READY_Ax:
  2880. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_EOF | ST25R3916_IRQ_MASK_WU_A_X ) );
  2881. if( irqs == ST25R3916_IRQ_MASK_NONE )
  2882. {
  2883. break; /* No interrupt to process */
  2884. }
  2885. if( (irqs & ST25R3916_IRQ_MASK_WU_A_X) != 0U )
  2886. {
  2887. rfalListenSetState( RFAL_LM_STATE_ACTIVE_Ax );
  2888. }
  2889. else if( (irqs & ST25R3916_IRQ_MASK_EOF) != 0U )
  2890. {
  2891. rfalListenSetState( RFAL_LM_STATE_POWER_OFF );
  2892. }
  2893. else
  2894. {
  2895. /* MISRA 15.7 - Empty else */
  2896. }
  2897. break;
  2898. /*******************************************************************************/
  2899. case RFAL_LM_STATE_CARDEMU_4A:
  2900. case RFAL_LM_STATE_CARDEMU_4B:
  2901. case RFAL_LM_STATE_CARDEMU_3:
  2902. case RFAL_LM_STATE_TARGET_F:
  2903. case RFAL_LM_STATE_TARGET_A:
  2904. break;
  2905. /*******************************************************************************/
  2906. default:
  2907. return ERR_WRONG_STATE;
  2908. }
  2909. return ERR_NONE;
  2910. }
  2911. /*******************************************************************************/
  2912. ReturnCode rfalListenStop( void )
  2913. {
  2914. /* Check if RFAL is initialized */
  2915. if( gRFAL.state < RFAL_STATE_INIT )
  2916. {
  2917. return ERR_WRONG_STATE;
  2918. }
  2919. gRFAL.Lm.state = RFAL_LM_STATE_NOT_INIT;
  2920. /*Check if Observation Mode was enabled and disable it on ST25R391x */
  2921. rfalCheckDisableObsMode();
  2922. /* Re-Enable the Oscillator if not running */
  2923. st25r3916OscOn();
  2924. /* Disable Receiver and Transmitter */
  2925. rfalFieldOff();
  2926. /* Disable all automatic responses */
  2927. st25r3916SetRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r | ST25R3916_REG_PASSIVE_TARGET_rfu | ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a | ST25R3916_REG_PASSIVE_TARGET_d_ac_ap2p) );
  2928. /* As there's no Off mode, set default value: ISO14443A with automatic RF Collision Avoidance Off */
  2929. st25r3916WriteRegister( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_om_iso14443a | ST25R3916_REG_MODE_tr_am_ook | ST25R3916_REG_MODE_nfc_ar_off) );
  2930. st25r3916DisableInterrupts( (ST25R3916_IRQ_MASK_RXE_PTA | ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_WU_A | ST25R3916_IRQ_MASK_WU_A_X | ST25R3916_IRQ_MASK_RFU2 | ST25R3916_IRQ_MASK_OSC ) );
  2931. st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_RXE_PTA | ST25R3916_IRQ_MASK_WU_F | ST25R3916_IRQ_MASK_WU_A | ST25R3916_IRQ_MASK_WU_A_X | ST25R3916_IRQ_MASK_RFU2 ) );
  2932. /* Set Analog configurations for Listen Off event */
  2933. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LISTEN_OFF) );
  2934. return ERR_NONE;
  2935. }
  2936. /*******************************************************************************/
  2937. ReturnCode rfalListenSleepStart( rfalLmState sleepSt, uint8_t *rxBuf, uint16_t rxBufLen, uint16_t *rxLen )
  2938. {
  2939. /* Check if RFAL is not initialized */
  2940. if( gRFAL.state < RFAL_STATE_INIT )
  2941. {
  2942. return ERR_WRONG_STATE;
  2943. }
  2944. switch(sleepSt)
  2945. {
  2946. /*******************************************************************************/
  2947. case RFAL_LM_STATE_SLEEP_A:
  2948. /* Enable automatic responses for A */
  2949. st25r3916ClrRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a) );
  2950. /* Reset NFCA target */
  2951. st25r3916ExecuteCommand( ST25R3916_CMD_GOTO_SLEEP );
  2952. /* Set Target mode, Bit Rate detection and Listen Mode for NFC-A */
  2953. st25r3916ChangeRegisterBits( ST25R3916_REG_MODE ,
  2954. (ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om_mask | ST25R3916_REG_MODE_nfc_ar_mask) ,
  2955. (ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om0 | ST25R3916_REG_MODE_nfc_ar_off) );
  2956. break;
  2957. /*******************************************************************************/
  2958. case RFAL_LM_STATE_SLEEP_AF:
  2959. /* Enable automatic responses for A + F */
  2960. st25r3916ClrRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r | ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a) );
  2961. /* Reset NFCA target state */
  2962. st25r3916ExecuteCommand( ST25R3916_CMD_GOTO_SLEEP );
  2963. /* Set Target mode, Bit Rate detection, Listen Mode for NFC-A and NFC-F */
  2964. st25r3916ChangeRegisterBits( ST25R3916_REG_MODE ,
  2965. (ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om_mask | ST25R3916_REG_MODE_nfc_ar_mask) ,
  2966. (ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om2 | ST25R3916_REG_MODE_om0 | ST25R3916_REG_MODE_nfc_ar_off) );
  2967. break;
  2968. /*******************************************************************************/
  2969. case RFAL_LM_STATE_SLEEP_B:
  2970. /* REMARK: Support for CE-B would be added here */
  2971. return ERR_NOT_IMPLEMENTED;
  2972. /*******************************************************************************/
  2973. default:
  2974. return ERR_PARAM;
  2975. }
  2976. /* Ensure that the NFCIP1 mode is disabled */
  2977. st25r3916ClrRegisterBits( ST25R3916_REG_ISO14443A_NFC, ST25R3916_REG_ISO14443A_NFC_nfc_f0 );
  2978. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  2979. /* Clear and enable required IRQs */
  2980. st25r3916ClearAndEnableInterrupts( (ST25R3916_IRQ_MASK_NFCT | ST25R3916_IRQ_MASK_RXS | ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_ERR1 |
  2981. ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_EON | ST25R3916_IRQ_MASK_EOF | gRFAL.Lm.mdIrqs ) );
  2982. /* Check whether the field was turn off right after the Sleep request */
  2983. if( !rfalIsExtFieldOn() )
  2984. {
  2985. /*rfalLogD( "RFAL: curState: %02X newState: %02X \r\n", gRFAL.Lm.state, RFAL_LM_STATE_NOT_INIT );*/
  2986. rfalListenStop();
  2987. return ERR_LINK_LOSS;
  2988. }
  2989. /*rfalLogD( "RFAL: curState: %02X newState: %02X \r\n", gRFAL.Lm.state, sleepSt );*/
  2990. /* Set the new Sleep State*/
  2991. gRFAL.Lm.state = sleepSt;
  2992. gRFAL.state = RFAL_STATE_LM;
  2993. gRFAL.Lm.rxBuf = rxBuf;
  2994. gRFAL.Lm.rxBufLen = rxBufLen;
  2995. gRFAL.Lm.rxLen = rxLen;
  2996. *gRFAL.Lm.rxLen = 0;
  2997. gRFAL.Lm.dataFlag = false;
  2998. return ERR_NONE;
  2999. }
  3000. /*******************************************************************************/
  3001. rfalLmState rfalListenGetState( bool *dataFlag, rfalBitRate *lastBR )
  3002. {
  3003. /* Allow state retrieval even if gRFAL.state != RFAL_STATE_LM so *
  3004. * that this Lm state can be used by caller after activation */
  3005. if( lastBR != NULL )
  3006. {
  3007. *lastBR = gRFAL.Lm.brDetected;
  3008. }
  3009. if( dataFlag != NULL )
  3010. {
  3011. *dataFlag = gRFAL.Lm.dataFlag;
  3012. }
  3013. return gRFAL.Lm.state;
  3014. }
  3015. /*******************************************************************************/
  3016. ReturnCode rfalListenSetState( rfalLmState newSt )
  3017. {
  3018. ReturnCode ret;
  3019. rfalLmState newState;
  3020. bool reSetState;
  3021. /* Check if RFAL is initialized */
  3022. if( gRFAL.state < RFAL_STATE_INIT )
  3023. {
  3024. return ERR_WRONG_STATE;
  3025. }
  3026. /* SetState clears the Data flag */
  3027. gRFAL.Lm.dataFlag = false;
  3028. newState = newSt;
  3029. ret = ERR_NONE;
  3030. do{
  3031. reSetState = false;
  3032. /*******************************************************************************/
  3033. switch( newState )
  3034. {
  3035. /*******************************************************************************/
  3036. case RFAL_LM_STATE_POWER_OFF:
  3037. /* Enable the receiver and reset logic */
  3038. st25r3916SetRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_rx_en );
  3039. st25r3916ExecuteCommand( ST25R3916_CMD_STOP );
  3040. if( (gRFAL.Lm.mdMask & RFAL_LM_MASK_NFCA) != 0U )
  3041. {
  3042. /* Enable automatic responses for A */
  3043. st25r3916ClrRegisterBits( ST25R3916_REG_PASSIVE_TARGET, ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a );
  3044. /* Prepares the NFCIP-1 Passive target logic to wait in the Sense/Idle state */
  3045. st25r3916ExecuteCommand( ST25R3916_CMD_GOTO_SENSE );
  3046. }
  3047. if( (gRFAL.Lm.mdMask & RFAL_LM_MASK_NFCF) != 0U )
  3048. {
  3049. /* Enable automatic responses for F */
  3050. st25r3916ClrRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r) );
  3051. }
  3052. if( (gRFAL.Lm.mdMask & RFAL_LM_MASK_ACTIVE_P2P) != 0U )
  3053. {
  3054. /* Ensure automatic response RF Collision Avoidance is back to only after Rx */
  3055. st25r3916ChangeRegisterBits( ST25R3916_REG_MODE, ST25R3916_REG_MODE_nfc_ar_mask, ST25R3916_REG_MODE_nfc_ar_auto_rx );
  3056. /* Ensure that our field is Off, as automatic response RF Collision Avoidance may have been triggered */
  3057. st25r3916TxOff();
  3058. }
  3059. /*******************************************************************************/
  3060. /* Ensure that the NFCIP1 mode is disabled */
  3061. st25r3916ClrRegisterBits( ST25R3916_REG_ISO14443A_NFC, ST25R3916_REG_ISO14443A_NFC_nfc_f0 );
  3062. /*******************************************************************************/
  3063. /* Clear and enable required IRQs */
  3064. st25r3916DisableInterrupts( ST25R3916_IRQ_MASK_ALL );
  3065. st25r3916ClearAndEnableInterrupts( (ST25R3916_IRQ_MASK_NFCT | ST25R3916_IRQ_MASK_RXS | ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_ERR1 | ST25R3916_IRQ_MASK_OSC |
  3066. ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_EON | ST25R3916_IRQ_MASK_EOF | gRFAL.Lm.mdIrqs ) );
  3067. /*******************************************************************************/
  3068. /* Clear the bitRate previously detected */
  3069. gRFAL.Lm.brDetected = RFAL_BR_KEEP;
  3070. /*******************************************************************************/
  3071. /* Apply the initial mode */
  3072. st25r3916ChangeRegisterBits( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om_mask | ST25R3916_REG_MODE_nfc_ar_mask), (uint8_t)gRFAL.Lm.mdReg );
  3073. /*******************************************************************************/
  3074. /* Check if external Field is already On */
  3075. if( rfalIsExtFieldOn() )
  3076. {
  3077. reSetState = true;
  3078. newState = RFAL_LM_STATE_IDLE; /* Set IDLE state */
  3079. }
  3080. #if 1 /* Perform bit rate detection in Low power mode */
  3081. else
  3082. {
  3083. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, (ST25R3916_REG_OP_CONTROL_tx_en | ST25R3916_REG_OP_CONTROL_rx_en | ST25R3916_REG_OP_CONTROL_en) );
  3084. }
  3085. #endif
  3086. break;
  3087. /*******************************************************************************/
  3088. case RFAL_LM_STATE_IDLE:
  3089. /*******************************************************************************/
  3090. /* Check if device is coming from Low Power bit rate detection */
  3091. if( !st25r3916CheckReg( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_en, ST25R3916_REG_OP_CONTROL_en ) )
  3092. {
  3093. /* Exit Low Power mode and confirm the temporarily enable */
  3094. st25r3916SetRegisterBits( ST25R3916_REG_OP_CONTROL, (ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_rx_en) );
  3095. if( !st25r3916CheckReg( ST25R3916_REG_AUX_DISPLAY, ST25R3916_REG_AUX_DISPLAY_osc_ok, ST25R3916_REG_AUX_DISPLAY_osc_ok ) )
  3096. {
  3097. /* Wait for Oscilator ready */
  3098. if( st25r3916WaitForInterruptsTimed( ST25R3916_IRQ_MASK_OSC, ST25R3916_TOUT_OSC_STABLE ) == 0U )
  3099. {
  3100. ret = ERR_IO;
  3101. break;
  3102. }
  3103. }
  3104. }
  3105. else
  3106. {
  3107. st25r3916GetInterrupt(ST25R3916_IRQ_MASK_OSC);
  3108. }
  3109. /*******************************************************************************/
  3110. /* In Active P2P the Initiator may: Turn its field On; LM goes into IDLE state;
  3111. * Initiator sends an unexpected frame raising a Protocol error; Initiator
  3112. * turns its field Off and ST25R3916 performs the automatic RF Collision
  3113. * Avoidance keeping our field On; upon a Protocol error upper layer sets
  3114. * again the state to IDLE to clear dataFlag and wait for next data.
  3115. *
  3116. * Ensure that when upper layer calls SetState(IDLE), it restores initial
  3117. * configuration and that check whether an external Field is still present */
  3118. if( (gRFAL.Lm.mdMask & RFAL_LM_MASK_ACTIVE_P2P) != 0U )
  3119. {
  3120. /* Ensure nfc_ar is reseted and back to only after Rx */
  3121. st25r3916ExecuteCommand( ST25R3916_CMD_STOP );
  3122. st25r3916ChangeRegisterBits( ST25R3916_REG_MODE, ST25R3916_REG_MODE_nfc_ar_mask, ST25R3916_REG_MODE_nfc_ar_auto_rx );
  3123. /* Ensure that our field is Off, as automatic response RF Collision Avoidance may have been triggered */
  3124. st25r3916TxOff();
  3125. /* If external Field is no longer detected go back to POWER_OFF */
  3126. if( !st25r3916IsExtFieldOn() )
  3127. {
  3128. reSetState = true;
  3129. newState = RFAL_LM_STATE_POWER_OFF; /* Set POWER_OFF state */
  3130. }
  3131. }
  3132. /*******************************************************************************/
  3133. /* If we are in ACTIVE_A, reEnable Listen for A before going to IDLE, otherwise do nothing */
  3134. if( gRFAL.Lm.state == RFAL_LM_STATE_ACTIVE_A )
  3135. {
  3136. /* Enable automatic responses for A and Reset NFCA target state */
  3137. st25r3916ClrRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a) );
  3138. st25r3916ExecuteCommand( ST25R3916_CMD_GOTO_SENSE );
  3139. }
  3140. /* ReEnable the receiver */
  3141. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  3142. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  3143. /*******************************************************************************/
  3144. /*Check if Observation Mode is enabled and set it on ST25R391x */
  3145. rfalCheckEnableObsModeRx();
  3146. break;
  3147. /*******************************************************************************/
  3148. case RFAL_LM_STATE_READY_F:
  3149. /*******************************************************************************/
  3150. /* If we're coming from BitRate detection mode, the Bit Rate Definition reg
  3151. * still has the last bit rate used.
  3152. * If a frame is received between setting the mode to Listen NFCA and
  3153. * setting Bit Rate Definition reg, it will raise a framing error.
  3154. * Set the bitrate immediately, and then the normal SetMode procedure */
  3155. st25r3916SetBitrate( (uint8_t)gRFAL.Lm.brDetected, (uint8_t)gRFAL.Lm.brDetected );
  3156. /*******************************************************************************/
  3157. /* Disable automatic responses for NFC-A */
  3158. st25r3916SetRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a) );
  3159. /* Set Mode NFC-F only */
  3160. ret = rfalSetMode( RFAL_MODE_LISTEN_NFCF, gRFAL.Lm.brDetected, gRFAL.Lm.brDetected );
  3161. gRFAL.state = RFAL_STATE_LM; /* Keep in Listen Mode */
  3162. /* ReEnable the receiver */
  3163. st25r3916ExecuteCommand( ST25R3916_CMD_CLEAR_FIFO );
  3164. st25r3916ExecuteCommand( ST25R3916_CMD_UNMASK_RECEIVE_DATA );
  3165. /* Clear any previous transmission errors (if Reader polled for other/unsupported technologies) */
  3166. st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_ERR1) );
  3167. st25r3916EnableInterrupts( ST25R3916_IRQ_MASK_RXE ); /* Start looking for any incoming data */
  3168. break;
  3169. /*******************************************************************************/
  3170. case RFAL_LM_STATE_CARDEMU_3:
  3171. /* Set Listen NFCF mode */
  3172. ret = rfalSetMode( RFAL_MODE_LISTEN_NFCF, gRFAL.Lm.brDetected, gRFAL.Lm.brDetected );
  3173. break;
  3174. /*******************************************************************************/
  3175. case RFAL_LM_STATE_READY_Ax:
  3176. case RFAL_LM_STATE_READY_A:
  3177. /*******************************************************************************/
  3178. /* If we're coming from BitRate detection mode, the Bit Rate Definition reg
  3179. * still has the last bit rate used.
  3180. * If a frame is received between setting the mode to Listen NFCA and
  3181. * setting Bit Rate Definition reg, it will raise a framing error.
  3182. * Set the bitrate immediately, and then the normal SetMode procedure */
  3183. st25r3916SetBitrate( (uint8_t)gRFAL.Lm.brDetected, (uint8_t)gRFAL.Lm.brDetected );
  3184. /*******************************************************************************/
  3185. /* Disable automatic responses for NFC-F */
  3186. st25r3916SetRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r) );
  3187. /* Set Mode NFC-A only */
  3188. ret = rfalSetMode( RFAL_MODE_LISTEN_NFCA, gRFAL.Lm.brDetected, gRFAL.Lm.brDetected );
  3189. gRFAL.state = RFAL_STATE_LM; /* Keep in Listen Mode */
  3190. break;
  3191. /*******************************************************************************/
  3192. case RFAL_LM_STATE_ACTIVE_Ax:
  3193. case RFAL_LM_STATE_ACTIVE_A:
  3194. /* Disable automatic responses for A */
  3195. st25r3916SetRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a) );
  3196. /* Clear any previous transmission errors (if Reader polled for other/unsupported technologies) */
  3197. st25r3916GetInterrupt( (ST25R3916_IRQ_MASK_PAR | ST25R3916_IRQ_MASK_CRC | ST25R3916_IRQ_MASK_ERR2 | ST25R3916_IRQ_MASK_ERR1) );
  3198. st25r3916EnableInterrupts( ST25R3916_IRQ_MASK_RXE ); /* Start looking for any incoming data */
  3199. break;
  3200. case RFAL_LM_STATE_TARGET_F:
  3201. /* Disable Automatic response SENSF_REQ */
  3202. st25r3916SetRegisterBits( ST25R3916_REG_PASSIVE_TARGET, (ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r) );
  3203. break;
  3204. /*******************************************************************************/
  3205. case RFAL_LM_STATE_SLEEP_A:
  3206. case RFAL_LM_STATE_SLEEP_B:
  3207. case RFAL_LM_STATE_SLEEP_AF:
  3208. /* These sleep states have to be set by the rfalListenSleepStart() method */
  3209. return ERR_REQUEST;
  3210. /*******************************************************************************/
  3211. case RFAL_LM_STATE_CARDEMU_4A:
  3212. case RFAL_LM_STATE_CARDEMU_4B:
  3213. case RFAL_LM_STATE_TARGET_A:
  3214. /* States not handled by the LM, just keep state context */
  3215. break;
  3216. /*******************************************************************************/
  3217. default:
  3218. return ERR_WRONG_STATE;
  3219. }
  3220. }
  3221. while( reSetState );
  3222. gRFAL.Lm.state = newState;
  3223. return ret;
  3224. }
  3225. #endif /* RFAL_FEATURE_LISTEN_MODE */
  3226. /*******************************************************************************
  3227. * Wake-Up Mode *
  3228. *******************************************************************************/
  3229. #if RFAL_FEATURE_WAKEUP_MODE
  3230. /*******************************************************************************/
  3231. ReturnCode rfalWakeUpModeStart( const rfalWakeUpConfig *config )
  3232. {
  3233. uint8_t aux;
  3234. uint8_t reg;
  3235. uint32_t irqs;
  3236. /* Check if RFAL is not initialized */
  3237. if( gRFAL.state < RFAL_STATE_INIT )
  3238. {
  3239. return ERR_WRONG_STATE;
  3240. }
  3241. /* The Wake-Up procedure is explained in detail in Application Note: AN4985 */
  3242. if( config == NULL )
  3243. {
  3244. gRFAL.wum.cfg.period = RFAL_WUM_PERIOD_200MS;
  3245. gRFAL.wum.cfg.irqTout = false;
  3246. gRFAL.wum.cfg.indAmp.enabled = true;
  3247. gRFAL.wum.cfg.indPha.enabled = false;
  3248. gRFAL.wum.cfg.cap.enabled = false;
  3249. gRFAL.wum.cfg.indAmp.delta = 2U;
  3250. gRFAL.wum.cfg.indAmp.reference = RFAL_WUM_REFERENCE_AUTO;
  3251. gRFAL.wum.cfg.indAmp.autoAvg = false;
  3252. /*******************************************************************************/
  3253. /* Check if AAT is enabled and if so make use of the SW Tag Detection */
  3254. if( st25r3916CheckReg( ST25R3916_REG_IO_CONF2, ST25R3916_REG_IO_CONF2_aat_en, ST25R3916_REG_IO_CONF2_aat_en ) )
  3255. {
  3256. gRFAL.wum.cfg.swTagDetect = true;
  3257. gRFAL.wum.cfg.indAmp.autoAvg = true;
  3258. gRFAL.wum.cfg.indAmp.aaWeight = RFAL_WUM_AA_WEIGHT_16;
  3259. }
  3260. }
  3261. else
  3262. {
  3263. gRFAL.wum.cfg = *config;
  3264. }
  3265. /* Check for valid configuration */
  3266. if( (!gRFAL.wum.cfg.cap.enabled && !gRFAL.wum.cfg.indAmp.enabled && !gRFAL.wum.cfg.indPha.enabled) ||
  3267. (gRFAL.wum.cfg.cap.enabled && (gRFAL.wum.cfg.indAmp.enabled || gRFAL.wum.cfg.indPha.enabled)) ||
  3268. (gRFAL.wum.cfg.cap.enabled && gRFAL.wum.cfg.swTagDetect) ||
  3269. ( (gRFAL.wum.cfg.indAmp.reference > RFAL_WUM_REFERENCE_AUTO) ||
  3270. (gRFAL.wum.cfg.indPha.reference > RFAL_WUM_REFERENCE_AUTO) ||
  3271. (gRFAL.wum.cfg.cap.reference > RFAL_WUM_REFERENCE_AUTO) ) )
  3272. {
  3273. return ERR_PARAM;
  3274. }
  3275. irqs = ST25R3916_IRQ_MASK_NONE;
  3276. /* Disable Tx, Rx, External Field Detector and set default ISO14443A mode */
  3277. st25r3916TxRxOff();
  3278. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_en_fd_mask );
  3279. st25r3916ChangeRegisterBits( ST25R3916_REG_MODE, (ST25R3916_REG_MODE_targ | ST25R3916_REG_MODE_om_mask), (ST25R3916_REG_MODE_targ_init | ST25R3916_REG_MODE_om_iso14443a) );
  3280. /* Set Analog configurations for Wake-up On event */
  3281. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_WAKEUP_ON) );
  3282. /*******************************************************************************/
  3283. /* Prepare Wake-Up Timer Control Register */
  3284. reg = (uint8_t)(((uint8_t)gRFAL.wum.cfg.period & 0x0FU) << ST25R3916_REG_WUP_TIMER_CONTROL_wut_shift);
  3285. reg |= (uint8_t)(((uint8_t)gRFAL.wum.cfg.period < (uint8_t)RFAL_WUM_PERIOD_100MS) ? ST25R3916_REG_WUP_TIMER_CONTROL_wur : 0x00U);
  3286. if( gRFAL.wum.cfg.irqTout || gRFAL.wum.cfg.swTagDetect )
  3287. {
  3288. reg |= ST25R3916_REG_WUP_TIMER_CONTROL_wto;
  3289. irqs |= ST25R3916_IRQ_MASK_WT;
  3290. }
  3291. /* Check if HW Wake-up is to be used or SW Tag detection */
  3292. if( gRFAL.wum.cfg.swTagDetect )
  3293. {
  3294. gRFAL.wum.cfg.indAmp.reference = 0U;
  3295. gRFAL.wum.cfg.indPha.reference = 0U;
  3296. gRFAL.wum.cfg.cap.reference = 0U;
  3297. }
  3298. else
  3299. {
  3300. /*******************************************************************************/
  3301. /* Check if Inductive Amplitude is to be performed */
  3302. if( gRFAL.wum.cfg.indAmp.enabled )
  3303. {
  3304. aux = (uint8_t)((gRFAL.wum.cfg.indAmp.delta) << ST25R3916_REG_AMPLITUDE_MEASURE_CONF_am_d_shift);
  3305. aux |= (uint8_t)(gRFAL.wum.cfg.indAmp.aaInclMeas ? ST25R3916_REG_AMPLITUDE_MEASURE_CONF_am_aam : 0x00U);
  3306. aux |= (uint8_t)(((uint8_t)gRFAL.wum.cfg.indAmp.aaWeight << ST25R3916_REG_AMPLITUDE_MEASURE_CONF_am_aew_shift) & ST25R3916_REG_AMPLITUDE_MEASURE_CONF_am_aew_mask);
  3307. aux |= (uint8_t)(gRFAL.wum.cfg.indAmp.autoAvg ? ST25R3916_REG_AMPLITUDE_MEASURE_CONF_am_ae : 0x00U);
  3308. st25r3916WriteRegister( ST25R3916_REG_AMPLITUDE_MEASURE_CONF, aux );
  3309. /* Only need to set the reference if not using Auto Average */
  3310. if( !gRFAL.wum.cfg.indAmp.autoAvg )
  3311. {
  3312. if( gRFAL.wum.cfg.indAmp.reference == RFAL_WUM_REFERENCE_AUTO )
  3313. {
  3314. st25r3916MeasureAmplitude( &aux );
  3315. gRFAL.wum.cfg.indAmp.reference = aux;
  3316. }
  3317. st25r3916WriteRegister( ST25R3916_REG_AMPLITUDE_MEASURE_REF, (uint8_t)gRFAL.wum.cfg.indAmp.reference );
  3318. }
  3319. reg |= ST25R3916_REG_WUP_TIMER_CONTROL_wam;
  3320. irqs |= ST25R3916_IRQ_MASK_WAM;
  3321. }
  3322. /*******************************************************************************/
  3323. /* Check if Inductive Phase is to be performed */
  3324. if( gRFAL.wum.cfg.indPha.enabled )
  3325. {
  3326. aux = (uint8_t)((gRFAL.wum.cfg.indPha.delta) << ST25R3916_REG_PHASE_MEASURE_CONF_pm_d_shift);
  3327. aux |= (uint8_t)(gRFAL.wum.cfg.indPha.aaInclMeas ? ST25R3916_REG_PHASE_MEASURE_CONF_pm_aam : 0x00U);
  3328. aux |= (uint8_t)(((uint8_t)gRFAL.wum.cfg.indPha.aaWeight << ST25R3916_REG_PHASE_MEASURE_CONF_pm_aew_shift) & ST25R3916_REG_PHASE_MEASURE_CONF_pm_aew_mask);
  3329. aux |= (uint8_t)(gRFAL.wum.cfg.indPha.autoAvg ? ST25R3916_REG_PHASE_MEASURE_CONF_pm_ae : 0x00U);
  3330. st25r3916WriteRegister( ST25R3916_REG_PHASE_MEASURE_CONF, aux );
  3331. /* Only need to set the reference if not using Auto Average */
  3332. if( !gRFAL.wum.cfg.indPha.autoAvg )
  3333. {
  3334. if( gRFAL.wum.cfg.indPha.reference == RFAL_WUM_REFERENCE_AUTO )
  3335. {
  3336. st25r3916MeasurePhase( &aux );
  3337. gRFAL.wum.cfg.indPha.reference = aux;
  3338. }
  3339. st25r3916WriteRegister( ST25R3916_REG_PHASE_MEASURE_REF, (uint8_t)gRFAL.wum.cfg.indPha.reference );
  3340. }
  3341. reg |= ST25R3916_REG_WUP_TIMER_CONTROL_wph;
  3342. irqs |= ST25R3916_IRQ_MASK_WPH;
  3343. }
  3344. /*******************************************************************************/
  3345. /* Check if Capacitive is to be performed */
  3346. if( gRFAL.wum.cfg.cap.enabled )
  3347. {
  3348. /*******************************************************************************/
  3349. /* Perform Capacitive sensor calibration */
  3350. /* Disable Oscillator and Field */
  3351. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, (ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_tx_en) );
  3352. /* Sensor gain should be configured on Analog Config: RFAL_ANALOG_CONFIG_CHIP_WAKEUP_ON */
  3353. /* Perform calibration procedure */
  3354. st25r3916CalibrateCapacitiveSensor( NULL );
  3355. /*******************************************************************************/
  3356. aux = (uint8_t)((gRFAL.wum.cfg.cap.delta) << ST25R3916_REG_CAPACITANCE_MEASURE_CONF_cm_d_shift);
  3357. aux |= (uint8_t)(gRFAL.wum.cfg.cap.aaInclMeas ? ST25R3916_REG_CAPACITANCE_MEASURE_CONF_cm_aam : 0x00U);
  3358. aux |= (uint8_t)(((uint8_t)gRFAL.wum.cfg.cap.aaWeight << ST25R3916_REG_CAPACITANCE_MEASURE_CONF_cm_aew_shift) & ST25R3916_REG_CAPACITANCE_MEASURE_CONF_cm_aew_mask);
  3359. aux |= (uint8_t)(gRFAL.wum.cfg.cap.autoAvg ? ST25R3916_REG_CAPACITANCE_MEASURE_CONF_cm_ae : 0x00U);
  3360. st25r3916WriteRegister( ST25R3916_REG_CAPACITANCE_MEASURE_CONF, aux );
  3361. /* Only need to set the reference if not using Auto Average */
  3362. if( !gRFAL.wum.cfg.cap.autoAvg || gRFAL.wum.cfg.swTagDetect )
  3363. {
  3364. if( gRFAL.wum.cfg.indPha.reference == RFAL_WUM_REFERENCE_AUTO )
  3365. {
  3366. st25r3916MeasureCapacitance( &aux );
  3367. gRFAL.wum.cfg.cap.reference = aux;
  3368. }
  3369. st25r3916WriteRegister( ST25R3916_REG_CAPACITANCE_MEASURE_REF, (uint8_t)gRFAL.wum.cfg.cap.reference );
  3370. }
  3371. reg |= ST25R3916_REG_WUP_TIMER_CONTROL_wcap;
  3372. irqs |= ST25R3916_IRQ_MASK_WCAP;
  3373. }
  3374. }
  3375. /* Disable and clear all interrupts except Wake-Up IRQs */
  3376. st25r3916DisableInterrupts( ST25R3916_IRQ_MASK_ALL );
  3377. st25r3916GetInterrupt( irqs );
  3378. st25r3916EnableInterrupts( irqs );
  3379. /* Enable Low Power Wake-Up Mode (Disable: Oscilattor, Tx, Rx and External Field Detector) */
  3380. st25r3916WriteRegister( ST25R3916_REG_WUP_TIMER_CONTROL, reg );
  3381. st25r3916ChangeRegisterBits( ST25R3916_REG_OP_CONTROL ,
  3382. (ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_rx_en | ST25R3916_REG_OP_CONTROL_tx_en |
  3383. ST25R3916_REG_OP_CONTROL_en_fd_mask | ST25R3916_REG_OP_CONTROL_wu ) ,
  3384. ST25R3916_REG_OP_CONTROL_wu );
  3385. gRFAL.wum.state = RFAL_WUM_STATE_ENABLED;
  3386. gRFAL.state = RFAL_STATE_WUM;
  3387. return ERR_NONE;
  3388. }
  3389. /*******************************************************************************/
  3390. bool rfalWakeUpModeHasWoke( void )
  3391. {
  3392. return (gRFAL.wum.state >= RFAL_WUM_STATE_ENABLED_WOKE);
  3393. }
  3394. /*******************************************************************************/
  3395. static uint16_t rfalWakeUpModeFilter( uint16_t curRef, uint16_t curVal, uint8_t weight )
  3396. {
  3397. uint16_t newRef;
  3398. /* Perform the averaging|filter as describded in ST25R3916 DS */
  3399. /* Avoid signed arithmetics by spliting in two cases */
  3400. if( curVal > curRef )
  3401. {
  3402. newRef = curRef + (( curVal - curRef ) / weight );
  3403. /* In order for the reference to converge to final value *
  3404. * increment once the diff is smaller that the weight */
  3405. if( (curVal != curRef) && (curRef == newRef) )
  3406. {
  3407. newRef &= 0xFF00U;
  3408. newRef += 0x0100U;
  3409. }
  3410. }
  3411. else
  3412. {
  3413. newRef = curRef - (( curRef - curVal ) / weight );
  3414. /* In order for the reference to converge to final value *
  3415. * decrement once the diff is smaller that the weight */
  3416. if( (curVal != curRef) && (curRef == newRef) )
  3417. {
  3418. newRef &= 0xFF00U;
  3419. }
  3420. }
  3421. return newRef;
  3422. }
  3423. /*******************************************************************************/
  3424. static void rfalRunWakeUpModeWorker( void )
  3425. {
  3426. uint32_t irqs;
  3427. uint8_t reg;
  3428. uint16_t value;
  3429. uint16_t delta;
  3430. if( gRFAL.state != RFAL_STATE_WUM )
  3431. {
  3432. return;
  3433. }
  3434. switch( gRFAL.wum.state )
  3435. {
  3436. case RFAL_WUM_STATE_ENABLED:
  3437. case RFAL_WUM_STATE_ENABLED_WOKE:
  3438. irqs = st25r3916GetInterrupt( ( ST25R3916_IRQ_MASK_WT | ST25R3916_IRQ_MASK_WAM | ST25R3916_IRQ_MASK_WPH | ST25R3916_IRQ_MASK_WCAP ) );
  3439. if( irqs == ST25R3916_IRQ_MASK_NONE )
  3440. {
  3441. break; /* No interrupt to process */
  3442. }
  3443. /*******************************************************************************/
  3444. /* Check and mark which measurement(s) cause interrupt */
  3445. if((irqs & ST25R3916_IRQ_MASK_WAM) != 0U)
  3446. {
  3447. st25r3916ReadRegister( ST25R3916_REG_AMPLITUDE_MEASURE_RESULT, &reg );
  3448. gRFAL.wum.state = RFAL_WUM_STATE_ENABLED_WOKE;
  3449. }
  3450. if((irqs & ST25R3916_IRQ_MASK_WPH) != 0U)
  3451. {
  3452. st25r3916ReadRegister( ST25R3916_REG_PHASE_MEASURE_RESULT, &reg );
  3453. gRFAL.wum.state = RFAL_WUM_STATE_ENABLED_WOKE;
  3454. }
  3455. if((irqs & ST25R3916_IRQ_MASK_WCAP) != 0U)
  3456. {
  3457. st25r3916ReadRegister( ST25R3916_REG_CAPACITANCE_MEASURE_RESULT, &reg );
  3458. gRFAL.wum.state = RFAL_WUM_STATE_ENABLED_WOKE;
  3459. }
  3460. if((irqs & ST25R3916_IRQ_MASK_WT) != 0U)
  3461. {
  3462. /*******************************************************************************/
  3463. if( gRFAL.wum.cfg.swTagDetect )
  3464. {
  3465. /* Enable Ready mode and wait the settle time */
  3466. st25r3916ChangeRegisterBits( ST25R3916_REG_OP_CONTROL, (ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_wu), ST25R3916_REG_OP_CONTROL_en );
  3467. platformDelay( RFAL_ST25R3916_AAT_SETTLE );
  3468. /*******************************************************************************/
  3469. if( gRFAL.wum.cfg.indAmp.enabled )
  3470. {
  3471. /* Perform amplitude measurement */
  3472. st25r3916MeasureAmplitude( &reg );
  3473. /* Convert inputs to TD format */
  3474. value = rfalConvTDFormat( reg );
  3475. delta = rfalConvTDFormat( gRFAL.wum.cfg.indAmp.delta );
  3476. /* Set first measurement as reference */
  3477. if( gRFAL.wum.cfg.indAmp.reference == 0U )
  3478. {
  3479. gRFAL.wum.cfg.indAmp.reference = value;
  3480. }
  3481. /* Check if device should be woken */
  3482. if( ( value >= (gRFAL.wum.cfg.indAmp.reference + delta) ) ||
  3483. ( value <= (gRFAL.wum.cfg.indAmp.reference - delta) ) )
  3484. {
  3485. gRFAL.wum.state = RFAL_WUM_STATE_ENABLED_WOKE;
  3486. break;
  3487. }
  3488. /* Update moving reference if enabled */
  3489. if( gRFAL.wum.cfg.indAmp.autoAvg )
  3490. {
  3491. gRFAL.wum.cfg.indAmp.reference = rfalWakeUpModeFilter( gRFAL.wum.cfg.indAmp.reference, value, (RFAL_WU_MIN_WEIGHT_VAL<<(uint8_t)gRFAL.wum.cfg.indAmp.aaWeight) );
  3492. }
  3493. }
  3494. /*******************************************************************************/
  3495. if( gRFAL.wum.cfg.indPha.enabled )
  3496. {
  3497. /* Perform Phase measurement */
  3498. st25r3916MeasurePhase( &reg );
  3499. /* Convert inputs to TD format */
  3500. value = rfalConvTDFormat( reg );
  3501. delta = rfalConvTDFormat( gRFAL.wum.cfg.indPha.delta );
  3502. /* Set first measurement as reference */
  3503. if( gRFAL.wum.cfg.indPha.reference == 0U )
  3504. {
  3505. gRFAL.wum.cfg.indPha.reference = value;
  3506. }
  3507. /* Check if device should be woken */
  3508. if( ( value >= (gRFAL.wum.cfg.indPha.reference + delta) ) ||
  3509. ( value <= (gRFAL.wum.cfg.indPha.reference - delta) ) )
  3510. {
  3511. gRFAL.wum.state = RFAL_WUM_STATE_ENABLED_WOKE;
  3512. break;
  3513. }
  3514. /* Update moving reference if enabled */
  3515. if( gRFAL.wum.cfg.indPha.autoAvg )
  3516. {
  3517. gRFAL.wum.cfg.indPha.reference = rfalWakeUpModeFilter( gRFAL.wum.cfg.indPha.reference, value, (RFAL_WU_MIN_WEIGHT_VAL<<(uint8_t)gRFAL.wum.cfg.indPha.aaWeight) );
  3518. }
  3519. }
  3520. /* Re-Enable low power Wake-Up mode for wto to trigger another measurement(s) */
  3521. st25r3916ChangeRegisterBits( ST25R3916_REG_OP_CONTROL, (ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_wu), (ST25R3916_REG_OP_CONTROL_wu) );
  3522. }
  3523. }
  3524. break;
  3525. default:
  3526. /* MISRA 16.4: no empty default statement (a comment being enough) */
  3527. break;
  3528. }
  3529. }
  3530. /*******************************************************************************/
  3531. ReturnCode rfalWakeUpModeStop( void )
  3532. {
  3533. /* Check if RFAL is in Wake-up mode */
  3534. if( gRFAL.state != RFAL_STATE_WUM )
  3535. {
  3536. return ERR_WRONG_STATE;
  3537. }
  3538. gRFAL.wum.state = RFAL_WUM_STATE_NOT_INIT;
  3539. /* Disable Wake-Up Mode */
  3540. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu );
  3541. st25r3916DisableInterrupts( (ST25R3916_IRQ_MASK_WT | ST25R3916_IRQ_MASK_WAM | ST25R3916_IRQ_MASK_WPH | ST25R3916_IRQ_MASK_WCAP) );
  3542. /* Re-Enable External Field Detector as: Automatics */
  3543. st25r3916ChangeRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_en_fd_mask, ST25R3916_REG_OP_CONTROL_en_fd_auto_efd );
  3544. /* Re-Enable the Oscillator */
  3545. st25r3916OscOn();
  3546. /* Set Analog configurations for Wake-up Off event */
  3547. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_WAKEUP_OFF) );
  3548. return ERR_NONE;
  3549. }
  3550. #endif /* RFAL_FEATURE_WAKEUP_MODE */
  3551. /*******************************************************************************
  3552. * Low-Power Mode *
  3553. *******************************************************************************/
  3554. #if RFAL_FEATURE_LOWPOWER_MODE
  3555. /*******************************************************************************/
  3556. ReturnCode rfalLowPowerModeStart( void )
  3557. {
  3558. /* Check if RFAL is not initialized */
  3559. if( gRFAL.state < RFAL_STATE_INIT )
  3560. {
  3561. return ERR_WRONG_STATE;
  3562. }
  3563. /* Stop any ongoing activity and set the device in low power by disabling oscillator, transmitter, receiver and external field detector */
  3564. st25r3916ExecuteCommand( ST25R3916_CMD_STOP );
  3565. st25r3916ClrRegisterBits( ST25R3916_REG_OP_CONTROL, ( ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_rx_en |
  3566. ST25R3916_REG_OP_CONTROL_wu | ST25R3916_REG_OP_CONTROL_tx_en |
  3567. ST25R3916_REG_OP_CONTROL_en_fd_mask ) );
  3568. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LOWPOWER_ON) );
  3569. gRFAL.state = RFAL_STATE_IDLE;
  3570. gRFAL.lpm.isRunning = true;
  3571. return ERR_NONE;
  3572. }
  3573. /*******************************************************************************/
  3574. ReturnCode rfalLowPowerModeStop( void )
  3575. {
  3576. ReturnCode ret;
  3577. /* Check if RFAL is on right state */
  3578. if( !gRFAL.lpm.isRunning )
  3579. {
  3580. return ERR_WRONG_STATE;
  3581. }
  3582. /* Re-enable device */
  3583. EXIT_ON_ERR( ret, st25r3916OscOn());
  3584. st25r3916ChangeRegisterBits( ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_en_fd_mask, ST25R3916_REG_OP_CONTROL_en_fd_auto_efd );
  3585. rfalSetAnalogConfig( (RFAL_ANALOG_CONFIG_TECH_CHIP | RFAL_ANALOG_CONFIG_CHIP_LOWPOWER_OFF) );
  3586. gRFAL.state = RFAL_STATE_INIT;
  3587. return ERR_NONE;
  3588. }
  3589. #endif /* RFAL_FEATURE_LOWPOWER_MODE */
  3590. /*******************************************************************************
  3591. * RF Chip *
  3592. *******************************************************************************/
  3593. /*******************************************************************************/
  3594. ReturnCode rfalChipWriteReg( uint16_t reg, const uint8_t* values, uint8_t len )
  3595. {
  3596. if( !st25r3916IsRegValid( (uint8_t)reg) )
  3597. {
  3598. return ERR_PARAM;
  3599. }
  3600. return st25r3916WriteMultipleRegisters( (uint8_t)reg, values, len );
  3601. }
  3602. /*******************************************************************************/
  3603. ReturnCode rfalChipReadReg( uint16_t reg, uint8_t* values, uint8_t len )
  3604. {
  3605. if( !st25r3916IsRegValid( (uint8_t)reg) )
  3606. {
  3607. return ERR_PARAM;
  3608. }
  3609. return st25r3916ReadMultipleRegisters( (uint8_t)reg, values, len );
  3610. }
  3611. /*******************************************************************************/
  3612. ReturnCode rfalChipExecCmd( uint16_t cmd )
  3613. {
  3614. if( !st25r3916IsCmdValid( (uint8_t)cmd) )
  3615. {
  3616. return ERR_PARAM;
  3617. }
  3618. return st25r3916ExecuteCommand( (uint8_t) cmd );
  3619. }
  3620. /*******************************************************************************/
  3621. ReturnCode rfalChipWriteTestReg( uint16_t reg, uint8_t value )
  3622. {
  3623. return st25r3916WriteTestRegister( (uint8_t)reg, value );
  3624. }
  3625. /*******************************************************************************/
  3626. ReturnCode rfalChipReadTestReg( uint16_t reg, uint8_t* value )
  3627. {
  3628. return st25r3916ReadTestRegister( (uint8_t)reg, value );
  3629. }
  3630. /*******************************************************************************/
  3631. ReturnCode rfalChipChangeRegBits( uint16_t reg, uint8_t valueMask, uint8_t value )
  3632. {
  3633. if( !st25r3916IsRegValid( (uint8_t)reg) )
  3634. {
  3635. return ERR_PARAM;
  3636. }
  3637. return st25r3916ChangeRegisterBits( (uint8_t)reg, valueMask, value );
  3638. }
  3639. /*******************************************************************************/
  3640. ReturnCode rfalChipChangeTestRegBits( uint16_t reg, uint8_t valueMask, uint8_t value )
  3641. {
  3642. st25r3916ChangeTestRegisterBits( (uint8_t)reg, valueMask, value );
  3643. return ERR_NONE;
  3644. }
  3645. /*******************************************************************************/
  3646. ReturnCode rfalChipSetRFO( uint8_t rfo )
  3647. {
  3648. return st25r3916ChangeRegisterBits( ST25R3916_REG_TX_DRIVER, ST25R3916_REG_TX_DRIVER_d_res_mask, rfo);
  3649. }
  3650. /*******************************************************************************/
  3651. ReturnCode rfalChipGetRFO( uint8_t* result )
  3652. {
  3653. ReturnCode ret;
  3654. ret = st25r3916ReadRegister(ST25R3916_REG_TX_DRIVER, result);
  3655. (*result) = ((*result) & ST25R3916_REG_TX_DRIVER_d_res_mask);
  3656. return ret;
  3657. }
  3658. /*******************************************************************************/
  3659. ReturnCode rfalChipMeasureAmplitude( uint8_t* result )
  3660. {
  3661. ReturnCode err;
  3662. uint8_t reg_opc, reg_mode, reg_conf1, reg_conf2;
  3663. /* Save registers which will be adjusted below */
  3664. st25r3916ReadRegister(ST25R3916_REG_OP_CONTROL, &reg_opc);
  3665. st25r3916ReadRegister(ST25R3916_REG_MODE, &reg_mode);
  3666. st25r3916ReadRegister(ST25R3916_REG_RX_CONF1, &reg_conf1);
  3667. st25r3916ReadRegister(ST25R3916_REG_RX_CONF2, &reg_conf2);
  3668. /* Set values as per defaults of DS. These regs/bits influence receiver chain and change amplitude */
  3669. /* Doing so achieves an amplitude comparable over a complete polling cylce */
  3670. st25r3916WriteRegister(ST25R3916_REG_OP_CONTROL, (reg_opc & ~ST25R3916_REG_OP_CONTROL_rx_chn));
  3671. st25r3916WriteRegister(ST25R3916_REG_MODE, ST25R3916_REG_MODE_om_iso14443a
  3672. | ST25R3916_REG_MODE_targ_init
  3673. | ST25R3916_REG_MODE_tr_am_ook
  3674. | ST25R3916_REG_MODE_nfc_ar_off);
  3675. st25r3916WriteRegister(ST25R3916_REG_RX_CONF1, (reg_conf1 & ~ST25R3916_REG_RX_CONF1_ch_sel_AM));
  3676. st25r3916WriteRegister(ST25R3916_REG_RX_CONF2, ((reg_conf2 & ~(ST25R3916_REG_RX_CONF2_demod_mode | ST25R3916_REG_RX_CONF2_amd_sel))
  3677. | ST25R3916_REG_RX_CONF2_amd_sel_peak));
  3678. /* Perform the actual measurement */
  3679. err = st25r3916MeasureAmplitude( result );
  3680. /* Restore values */
  3681. st25r3916WriteRegister(ST25R3916_REG_OP_CONTROL, reg_opc);
  3682. st25r3916WriteRegister(ST25R3916_REG_MODE, reg_mode);
  3683. st25r3916WriteRegister(ST25R3916_REG_RX_CONF1, reg_conf1);
  3684. st25r3916WriteRegister(ST25R3916_REG_RX_CONF2, reg_conf2);
  3685. return err;
  3686. }
  3687. /*******************************************************************************/
  3688. ReturnCode rfalChipMeasurePhase( uint8_t* result )
  3689. {
  3690. st25r3916MeasurePhase( result );
  3691. return ERR_NONE;
  3692. }
  3693. /*******************************************************************************/
  3694. ReturnCode rfalChipMeasureCapacitance( uint8_t* result )
  3695. {
  3696. st25r3916MeasureCapacitance( result );
  3697. return ERR_NONE;
  3698. }
  3699. /*******************************************************************************/
  3700. ReturnCode rfalChipMeasurePowerSupply( uint8_t param, uint8_t* result )
  3701. {
  3702. *result = st25r3916MeasurePowerSupply( param );
  3703. return ERR_NONE;
  3704. }
  3705. /*******************************************************************************/
  3706. extern uint8_t invalid_size_of_stream_configs[(sizeof(struct st25r3916StreamConfig) == sizeof(struct iso15693StreamConfig))?1:(-1)];