app_conf.h 15 KB

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  1. #pragma once
  2. #include "hw.h"
  3. #include "hw_conf.h"
  4. #include "hw_if.h"
  5. #include "ble_bufsize.h"
  6. #define CFG_TX_POWER (0x18) /* -0.15dBm */
  7. /**
  8. * Define Advertising parameters
  9. */
  10. #define CFG_ADV_BD_ADDRESS (0x7257acd87a6c)
  11. #define CFG_FAST_CONN_ADV_INTERVAL_MIN (0x80) /**< 80ms */
  12. #define CFG_FAST_CONN_ADV_INTERVAL_MAX (0xa0) /**< 100ms */
  13. #define CFG_LP_CONN_ADV_INTERVAL_MIN (0x640) /**< 1s */
  14. #define CFG_LP_CONN_ADV_INTERVAL_MAX (0xfa0) /**< 2.5s */
  15. /**
  16. * Define IO Authentication
  17. */
  18. #define CFG_BONDING_MODE (1)
  19. #define CFG_FIXED_PIN (111111)
  20. #define CFG_USED_FIXED_PIN (0)
  21. #define CFG_ENCRYPTION_KEY_SIZE_MAX (16)
  22. #define CFG_ENCRYPTION_KEY_SIZE_MIN (8)
  23. /**
  24. * Define IO capabilities
  25. */
  26. #define CFG_IO_CAPABILITY_DISPLAY_ONLY (0x00)
  27. #define CFG_IO_CAPABILITY_DISPLAY_YES_NO (0x01)
  28. #define CFG_IO_CAPABILITY_KEYBOARD_ONLY (0x02)
  29. #define CFG_IO_CAPABILITY_NO_INPUT_NO_OUTPUT (0x03)
  30. #define CFG_IO_CAPABILITY_KEYBOARD_DISPLAY (0x04)
  31. #define CFG_IO_CAPABILITY CFG_IO_CAPABILITY_DISPLAY_YES_NO
  32. /**
  33. * Define MITM modes
  34. */
  35. #define CFG_MITM_PROTECTION_NOT_REQUIRED (0x00)
  36. #define CFG_MITM_PROTECTION_REQUIRED (0x01)
  37. #define CFG_MITM_PROTECTION CFG_MITM_PROTECTION_REQUIRED
  38. /**
  39. * Define Secure Connections Support
  40. */
  41. #define CFG_SECURE_NOT_SUPPORTED (0x00)
  42. #define CFG_SECURE_OPTIONAL (0x01)
  43. #define CFG_SECURE_MANDATORY (0x02)
  44. #define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL
  45. /**
  46. * Define Keypress Notification Support
  47. */
  48. #define CFG_KEYPRESS_NOT_SUPPORTED (0x00)
  49. #define CFG_KEYPRESS_SUPPORTED (0x01)
  50. #define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED
  51. /**
  52. * Numeric Comparison Answers
  53. */
  54. #define YES (0x01)
  55. #define NO (0x00)
  56. /**
  57. * Device name configuration for Generic Access Service
  58. */
  59. #define CFG_GAP_DEVICE_NAME "TEMPLATE"
  60. #define CFG_GAP_DEVICE_NAME_LENGTH (8)
  61. /**
  62. * Define PHY
  63. */
  64. #define ALL_PHYS_PREFERENCE 0x00
  65. #define RX_2M_PREFERRED 0x02
  66. #define TX_2M_PREFERRED 0x02
  67. #define TX_1M 0x01
  68. #define TX_2M 0x02
  69. #define RX_1M 0x01
  70. #define RX_2M 0x02
  71. /**
  72. * Identity root key used to derive LTK and CSRK
  73. */
  74. #define CFG_BLE_IRK {0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0}
  75. /**
  76. * Encryption root key used to derive LTK and CSRK
  77. */
  78. #define CFG_BLE_ERK {0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21,0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21}
  79. /* USER CODE BEGIN Generic_Parameters */
  80. /**
  81. * SMPS supply
  82. * SMPS not used when Set to 0
  83. * SMPS used when Set to 1
  84. */
  85. #define CFG_USE_SMPS 1
  86. /* USER CODE END Generic_Parameters */
  87. /**< specific parameters */
  88. /*****************************************************/
  89. /**
  90. * AD Element - Group B Feature
  91. */
  92. /* LSB - Second Byte */
  93. #define CFG_FEATURE_OTA_REBOOT (0x20)
  94. /******************************************************************************
  95. * BLE Stack
  96. ******************************************************************************/
  97. /**
  98. * Maximum number of simultaneous connections that the device will support.
  99. * Valid values are from 1 to 8
  100. */
  101. #define CFG_BLE_NUM_LINK 2
  102. /**
  103. * Maximum number of Services that can be stored in the GATT database.
  104. * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
  105. */
  106. #define CFG_BLE_NUM_GATT_SERVICES 8
  107. /**
  108. * Maximum number of Attributes
  109. * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services)
  110. * that can be stored in the GATT database.
  111. * Note that certain characteristics and relative descriptors are added automatically during device initialization
  112. * so this parameters should be 9 plus the number of user Attributes
  113. */
  114. #define CFG_BLE_NUM_GATT_ATTRIBUTES 68
  115. /**
  116. * Maximum supported ATT_MTU size
  117. */
  118. #define CFG_BLE_MAX_ATT_MTU (156)
  119. /**
  120. * Size of the storage area for Attribute values
  121. * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute:
  122. * - attribute value length
  123. * - 5, if UUID is 16 bit; 19, if UUID is 128 bit
  124. * - 2, if server configuration descriptor is used
  125. * - 2*DTM_NUM_LINK, if client configuration descriptor is used
  126. * - 2, if extended properties is used
  127. * The total amount of memory needed is the sum of the above quantities for each attribute.
  128. */
  129. #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
  130. /**
  131. * Prepare Write List size in terms of number of packet
  132. */
  133. #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
  134. /**
  135. * Number of allocated memory blocks
  136. */
  137. #define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
  138. /**
  139. * Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
  140. */
  141. #define CFG_BLE_DATA_LENGTH_EXTENSION 1
  142. /**
  143. * Sleep clock accuracy in Slave mode (ppm value)
  144. */
  145. #define CFG_BLE_SLAVE_SCA 500
  146. /**
  147. * Sleep clock accuracy in Master mode
  148. * 0 : 251 ppm to 500 ppm
  149. * 1 : 151 ppm to 250 ppm
  150. * 2 : 101 ppm to 150 ppm
  151. * 3 : 76 ppm to 100 ppm
  152. * 4 : 51 ppm to 75 ppm
  153. * 5 : 31 ppm to 50 ppm
  154. * 6 : 21 ppm to 30 ppm
  155. * 7 : 0 ppm to 20 ppm
  156. */
  157. #define CFG_BLE_MASTER_SCA 0
  158. /**
  159. * Source for the low speed clock for RF wake-up
  160. * 1 : external high speed crystal HSE/32/32
  161. * 0 : external low speed crystal ( no calibration )
  162. */
  163. #define CFG_BLE_LSE_SOURCE 0
  164. /**
  165. * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
  166. */
  167. #define CFG_BLE_HSE_STARTUP_TIME 0x148
  168. /**
  169. * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us)
  170. */
  171. #define CFG_BLE_MAX_CONN_EVENT_LENGTH ( 0xFFFFFFFF )
  172. /**
  173. * Viterbi Mode
  174. * 1 : enabled
  175. * 0 : disabled
  176. */
  177. #define CFG_BLE_VITERBI_MODE 1
  178. /**
  179. * LL Only Mode
  180. * 1 : LL Only
  181. * 0 : LL + Host
  182. */
  183. #define CFG_BLE_LL_ONLY 0
  184. /******************************************************************************
  185. * Transport Layer
  186. ******************************************************************************/
  187. /**
  188. * Queue length of BLE Event
  189. * This parameter defines the number of asynchronous events that can be stored in the HCI layer before
  190. * being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
  191. * is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
  192. * enough to store all asynchronous events received in between.
  193. * When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
  194. * between the HCI command and its event.
  195. * This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
  196. * the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
  197. * for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
  198. * to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
  199. */
  200. #define CFG_TLBLE_EVT_QUEUE_LENGTH 5
  201. /**
  202. * This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
  203. * allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
  204. * It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
  205. * never be used)
  206. * With the current wireless firmware implementation, this parameter shall be kept to 255
  207. *
  208. */
  209. #define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE 255 /**< Set to 255 with the memory manager and the mailbox */
  210. #define TL_BLE_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE )
  211. /******************************************************************************
  212. * UART interfaces
  213. ******************************************************************************/
  214. /**
  215. * Select UART interfaces
  216. */
  217. #define CFG_DEBUG_TRACE_UART hw_uart1
  218. #define CFG_CONSOLE_MENU 0
  219. /******************************************************************************
  220. * Low Power
  221. ******************************************************************************/
  222. /**
  223. * When set to 1, the low power mode is enable
  224. * When set to 0, the device stays in RUN mode
  225. */
  226. #define CFG_LPM_SUPPORTED 0
  227. /******************************************************************************
  228. * Timer Server
  229. ******************************************************************************/
  230. /**
  231. * CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
  232. * The lower is the value, the better is the power consumption and the accuracy of the timerserver
  233. * The higher is the value, the finest is the granularity
  234. *
  235. * CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput
  236. * clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
  237. * the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
  238. *
  239. * CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
  240. * When the 1Hz calendar clock is required, it shall be sets according to other settings
  241. * When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
  242. *
  243. * CFG_RTCCLK_DIVIDER_CONF:
  244. * Shall be set to either 0,2,4,8,16
  245. * When set to either 2,4,8,16, the 1Hhz calendar is supported
  246. * When set to 0, the user sets its own configuration
  247. *
  248. * The following settings are computed with LSI as input to the RTC
  249. */
  250. #define CFG_RTCCLK_DIVIDER_CONF 0
  251. #if (CFG_RTCCLK_DIVIDER_CONF == 0)
  252. /**
  253. * Custom configuration
  254. * It does not support 1Hz calendar
  255. * It divides the RTC CLK by 16
  256. */
  257. #define CFG_RTCCLK_DIV (16)
  258. #define CFG_RTC_WUCKSEL_DIVIDER (0)
  259. #define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
  260. #define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
  261. #else
  262. #if (CFG_RTCCLK_DIVIDER_CONF == 2)
  263. /**
  264. * It divides the RTC CLK by 2
  265. */
  266. #define CFG_RTC_WUCKSEL_DIVIDER (3)
  267. #endif
  268. #if (CFG_RTCCLK_DIVIDER_CONF == 4)
  269. /**
  270. * It divides the RTC CLK by 4
  271. */
  272. #define CFG_RTC_WUCKSEL_DIVIDER (2)
  273. #endif
  274. #if (CFG_RTCCLK_DIVIDER_CONF == 8)
  275. /**
  276. * It divides the RTC CLK by 8
  277. */
  278. #define CFG_RTC_WUCKSEL_DIVIDER (1)
  279. #endif
  280. #if (CFG_RTCCLK_DIVIDER_CONF == 16)
  281. /**
  282. * It divides the RTC CLK by 16
  283. */
  284. #define CFG_RTC_WUCKSEL_DIVIDER (0)
  285. #endif
  286. #define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
  287. #define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
  288. #define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
  289. #endif
  290. /** tick timer value in us */
  291. #define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
  292. typedef enum
  293. {
  294. CFG_TIM_PROC_ID_ISR,
  295. /* USER CODE BEGIN CFG_TimProcID_t */
  296. /* USER CODE END CFG_TimProcID_t */
  297. } CFG_TimProcID_t;
  298. /******************************************************************************
  299. * Debug
  300. ******************************************************************************/
  301. /**
  302. * When set, this resets some hw resources to set the device in the same state than the power up
  303. * The FW resets only register that may prevent the FW to run properly
  304. *
  305. * This shall be set to 0 in a final product
  306. *
  307. */
  308. #define CFG_HW_RESET_BY_FW 0
  309. /**
  310. * keep debugger enabled while in any low power mode when set to 1
  311. * should be set to 0 in production
  312. */
  313. #define CFG_DEBUGGER_SUPPORTED 0
  314. /**
  315. * When set to 1, the traces are enabled in the BLE services
  316. */
  317. #define CFG_DEBUG_BLE_TRACE 0
  318. /**
  319. * Enable or Disable traces in application
  320. */
  321. #define CFG_DEBUG_APP_TRACE 0
  322. #if (CFG_DEBUG_APP_TRACE != 0)
  323. #define APP_DBG_MSG PRINT_MESG_DBG
  324. #else
  325. #define APP_DBG_MSG PRINT_NO_MESG
  326. #endif
  327. #if ( (CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0) )
  328. #define CFG_DEBUG_TRACE 1
  329. #endif
  330. #if (CFG_DEBUG_TRACE != 0)
  331. #undef CFG_LPM_SUPPORTED
  332. #undef CFG_DEBUGGER_SUPPORTED
  333. #define CFG_LPM_SUPPORTED 0
  334. #define CFG_DEBUGGER_SUPPORTED 1
  335. #endif
  336. /**
  337. * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
  338. * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
  339. *
  340. * When both are set to 0, no trace are output
  341. * When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
  342. */
  343. #define CFG_DEBUG_TRACE_LIGHT 0
  344. #define CFG_DEBUG_TRACE_FULL 0
  345. #if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
  346. #undef CFG_DEBUG_TRACE_FULL
  347. #undef CFG_DEBUG_TRACE_LIGHT
  348. #define CFG_DEBUG_TRACE_FULL 0
  349. #define CFG_DEBUG_TRACE_LIGHT 1
  350. #endif
  351. #if ( CFG_DEBUG_TRACE == 0 )
  352. #undef CFG_DEBUG_TRACE_FULL
  353. #undef CFG_DEBUG_TRACE_LIGHT
  354. #define CFG_DEBUG_TRACE_FULL 0
  355. #define CFG_DEBUG_TRACE_LIGHT 0
  356. #endif
  357. /**
  358. * When not set, the traces is looping on sending the trace over UART
  359. */
  360. #define DBG_TRACE_USE_CIRCULAR_QUEUE 0
  361. /**
  362. * max buffer Size to queue data traces and max data trace allowed.
  363. * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
  364. */
  365. #define DBG_TRACE_MSG_QUEUE_SIZE 4096
  366. #define MAX_DBG_TRACE_MSG_SIZE 1024
  367. #define CFG_LED_SUPPORTED 0
  368. #define CFG_BUTTON_SUPPORTED 0
  369. /******************************************************************************
  370. * FreeRTOS
  371. ******************************************************************************/
  372. #define CFG_SHCI_USER_EVT_PROCESS_NAME "ble_shci_evt"
  373. #define CFG_SHCI_USER_EVT_PROCESS_ATTR_BITS (0)
  374. #define CFG_SHCI_USER_EVT_PROCESS_CB_MEM (0)
  375. #define CFG_SHCI_USER_EVT_PROCESS_CB_SIZE (0)
  376. #define CFG_SHCI_USER_EVT_PROCESS_STACK_MEM (0)
  377. #define CFG_SHCI_USER_EVT_PROCESS_PRIORITY osPriorityNone
  378. #define CFG_SHCI_USER_EVT_PROCESS_STACK_SIZE (128 * 7)
  379. #define CFG_HCI_USER_EVT_PROCESS_NAME "ble_hci_evt"
  380. #define CFG_HCI_USER_EVT_PROCESS_ATTR_BITS (0)
  381. #define CFG_HCI_USER_EVT_PROCESS_CB_MEM (0)
  382. #define CFG_HCI_USER_EVT_PROCESS_CB_SIZE (0)
  383. #define CFG_HCI_USER_EVT_PROCESS_STACK_MEM (0)
  384. #define CFG_HCI_USER_EVT_PROCESS_PRIORITY osPriorityNone
  385. #define CFG_HCI_USER_EVT_PROCESS_STACK_SIZE (128 * 8)
  386. #define CFG_ADV_UPDATE_PROCESS_NAME "ble_adv_upd"
  387. #define CFG_ADV_UPDATE_PROCESS_ATTR_BITS (0)
  388. #define CFG_ADV_UPDATE_PROCESS_CB_MEM (0)
  389. #define CFG_ADV_UPDATE_PROCESS_CB_SIZE (0)
  390. #define CFG_ADV_UPDATE_PROCESS_STACK_MEM (0)
  391. #define CFG_ADV_UPDATE_PROCESS_PRIORITY osPriorityNone
  392. #define CFG_ADV_UPDATE_PROCESS_STACK_SIZE (128 * 6)
  393. #define CFG_HRS_PROCESS_NAME "hrs"
  394. #define CFG_HRS_PROCESS_ATTR_BITS (0)
  395. #define CFG_HRS_PROCESS_CB_MEM (0)
  396. #define CFG_HRS_PROCESS_CB_SIZE (0)
  397. #define CFG_HRS_PROCESS_STACK_MEM (0)
  398. #define CFG_HRS_PROCESS_PRIORITY osPriorityNone
  399. #define CFG_HRS_PROCESS_STACK_SIZE (128 * 5)
  400. typedef enum {
  401. CFG_LPM_APP,
  402. CFG_LPM_APP_BLE,
  403. } CFG_LPM_Id_t;
  404. #define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
  405. #define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR