cc1101.h 6.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174
  1. #pragma once
  2. #include "flipper_v2.h"
  3. #define F_OSC 26e6
  4. /*******************************debug mode*************************************/
  5. // #define CC1101_DEBUG 1
  6. //******************************CC1101 defines ********************************
  7. //******************************config registers *****************************
  8. #define CC1101_IOCFG2 0x00 //GDO2 output pin configration
  9. #define CC1101_IOCFG1 0x01 // GDO1 output pin configuration
  10. #define CC1101_IOCFG0 0x02 // GDO0 output pin configuration
  11. #define CC1101_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
  12. #define CC1101_SYNC1 0x04 // Sync word, high INT8U
  13. #define CC1101_SYNC0 0x05 // Sync word, low INT8U
  14. #define CC1101_PKTLEN 0x06 // Packet length
  15. #define CC1101_PKTCTRL1 0x07 // Packet automation control
  16. #define CC1101_PKTCTRL0 0x08 // Packet automation control
  17. #define CC1101_ADDR 0x09 // Device address
  18. #define CC1101_CHANNR 0x0A // Channel number
  19. #define CC1101_FSCTRL1 0x0B // Frequency synthesizer control
  20. #define CC1101_FSCTRL0 0x0C // Frequency synthesizer control
  21. #define CC1101_FREQ2 0x0D // Frequency control word, high INT8U
  22. #define CC1101_FREQ1 0x0E // Frequency control word, middle INT8U
  23. #define CC1101_FREQ0 0x0F // Frequency control word, low INT8U
  24. #define CC1101_MDMCFG4 0x10 // Modem configuration
  25. #define CC1101_MDMCFG3 0x11 // Modem configuration
  26. #define CC1101_MDMCFG2 0x12 // Modem configuration
  27. #define CC1101_MDMCFG1 0x13 // Modem configuration
  28. #define CC1101_MDMCFG0 0x14 // Modem configuration
  29. #define CC1101_DEVIATN 0x15 // Modem deviation setting
  30. #define CC1101_MCSM2 0x16 // Main Radio Control State Machine configuration
  31. #define CC1101_MCSM1 0x17 // Main Radio Control State Machine configuration
  32. #define CC1101_MCSM0 0x18 // Main Radio Control State Machine configuration
  33. #define CC1101_FOCCFG 0x19 // Frequency Offset Compensation configuration
  34. #define CC1101_BSCFG 0x1A // Bit Synchronization configuration
  35. #define CC1101_AGCCTRL2 0x1B // AGC control
  36. #define CC1101_AGCCTRL1 0x1C // AGC control
  37. #define CC1101_AGCCTRL0 0x1D // AGC control
  38. #define CC1101_WOREVT1 0x1E // High INT8U Event 0 timeout
  39. #define CC1101_WOREVT0 0x1F // Low INT8U Event 0 timeout
  40. #define CC1101_WORCTRL 0x20 // Wake On Radio control
  41. #define CC1101_FREND1 0x21 // Front end RX configuration
  42. #define CC1101_FREND0 0x22 // Front end TX configuration
  43. #define CC1101_FSCAL3 0x23 // Frequency synthesizer calibration
  44. #define CC1101_FSCAL2 0x24 // Frequency synthesizer calibration
  45. #define CC1101_FSCAL1 0x25 // Frequency synthesizer calibration
  46. #define CC1101_FSCAL0 0x26 // Frequency synthesizer calibration
  47. #define CC1101_RCCTRL1 0x27 // RC oscillator configuration
  48. #define CC1101_RCCTRL0 0x28 // RC oscillator configuration
  49. #define CC1101_FSTEST 0x29 // Frequency synthesizer calibration control
  50. #define CC1101_PTEST 0x2A // Production test
  51. #define CC1101_AGCTEST 0x2B // AGC test
  52. #define CC1101_TEST2 0x2C // Various test settings
  53. #define CC1101_TEST1 0x2D // Various test settings
  54. #define CC1101_TEST0 0x2E // Various test settings
  55. //*********************CC1101 Strobe commands *********************************
  56. #define CC1101_SRES 0x30 // Reset chip.
  57. // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
  58. // If in RX/TX: Go to a wait state where only the synthesizer is
  59. // running (for quick RX / TX turnaround).
  60. #define CC1101_SFSTXON 0x31
  61. #define CC1101_SXOFF 0x32 // Turn off crystal oscillator.
  62. // Calibrate frequency synthesizer and turn it off
  63. // (enables quick start).
  64. #define CC1101_SCAL 0x33
  65. // Enable RX. Perform calibration first if coming from IDLE and
  66. // MCSM0.FS_AUTOCAL=1.
  67. #define CC1101_SRX 0x34
  68. // In IDLE state: Enable TX. Perform calibration first if
  69. // MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
  70. // Only go to TX if channel is clear.
  71. #define CC1101_STX 0x35
  72. // Exit RX / TX, turn off frequency synthesizer and exit
  73. // Wake-On-Radio mode if applicable.
  74. #define CC1101_SIDLE 0x36
  75. #define CC1101_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
  76. #define CC1101_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
  77. #define CC1101_SPWD 0x39 // Enter power down mode when CSn goes high.
  78. #define CC1101_SFRX 0x3A // Flush the RX FIFO buffer.
  79. #define CC1101_SFTX 0x3B // Flush the TX FIFO buffer.
  80. #define CC1101_SWORRST 0x3C // Reset real time clock.
  81. // No operation. May be used to pad strobe commands to two
  82. // INT8Us for simpler software.
  83. #define CC1101_SNOP 0x3D
  84. //**************************CC1101 STATUS REGSITER ****************************
  85. //use burst read to access
  86. #define CC1101_PARTNUM 0x30
  87. #define CC1101_VERSION 0x31
  88. #define CC1101_FREQEST 0x32
  89. #define CC1101_LQI 0x33
  90. #define CC1101_RSSI 0x34
  91. #define CC1101_MARCSTATE 0x35
  92. #define CC1101_WORTIME1 0x36
  93. #define CC1101_WORTIME0 0x37
  94. #define CC1101_PKTSTATUS 0x38
  95. #define CC1101_VCO_VC_DAC 0x39
  96. #define CC1101_TXBYTES 0x3A
  97. #define CC1101_RXBYTES 0x3B
  98. #define CC1101_RCCTRL1_STATUS 0x3C
  99. #define CC1101_RCCTRL_STATUS 0x3D
  100. /****************************cc1101 status ***********************************/
  101. #define CC1101_STATUS_RX 0x0D
  102. #define CC1101_STATUS_TX 0x13
  103. //***********************CC1101 PATABLE,TXFIFO,RXFIFO**************************
  104. #define CC1101_PATABLE 0x3E
  105. #define CC1101_TXFIFO 0x3F
  106. #define CC1101_RXFIFO 0x3F
  107. //******************************* pins ****************************************
  108. // #define SCK_PIN 13
  109. // #define MISO_PIN 12
  110. // #define MOSI_PIN 11
  111. // #define SS_PIN 10
  112. // #define GDO0 8 //pin assignment
  113. // #define GDO2 9
  114. //*****************************CC1101 Config**********************************
  115. //no pa ramping, output power to 10dBm
  116. #define POWER 0xC0 //output power to maximum
  117. //modulation
  118. #define FSK2 0x00
  119. #define GFSK 0x10
  120. #define ASK 0x30
  121. #define FSK4 0x40
  122. #define MSK 0x70
  123. //******************************** class **************************************//
  124. class CC1101 {
  125. private:
  126. GpioPin* ss_pin;
  127. GpioPin miso_pin;
  128. GpioPin* miso_pin_record;
  129. GpioPin* gdo0_pin;
  130. GpioPin* gdo2_pin;
  131. private:
  132. void SpiMode(uint8_t config);
  133. uint8_t SpiTransfer(uint8_t value);
  134. void Reset(void);
  135. void SpiWriteBurstReg(uint8_t addr, uint8_t* buffer, uint8_t num);
  136. uint8_t SpiReadReg(uint8_t addr);
  137. void RegConfigSettings(void);
  138. public:
  139. CC1101(GpioPin* ss_pin);
  140. void SpiWriteReg(uint8_t addr, uint8_t value);
  141. bool SpiSetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t lsb);
  142. void SpiReadBurstReg(uint8_t addr, uint8_t* buffer, uint8_t num);
  143. void SpiInit(void);
  144. void SpiEnd(void);
  145. void SetMod(uint8_t mode);
  146. void SetFreq(uint8_t Freq2, uint8_t Freq1, uint8_t Freq0);
  147. uint8_t Init(void);
  148. void SpiStrobe(uint8_t strobe);
  149. uint8_t SpiReadStatus(uint8_t addr);
  150. void SetReceive(void);
  151. void SetTransmit(void);
  152. void SetChannel(int channel);
  153. bool setRxBandwidth(float bandwidth);
  154. bool setBitRate(float bitrate);
  155. };