api-hal-subghz.c 13 KB

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  1. #include "api-hal-subghz.h"
  2. #include <api-hal-gpio.h>
  3. #include <api-hal-spi.h>
  4. #include <api-hal-interrupt.h>
  5. #include <api-hal-resources.h>
  6. #include <furi.h>
  7. #include <cc1101.h>
  8. #include <stdio.h>
  9. static const uint8_t api_hal_subghz_preset_ook_async_regs[][2] = {
  10. /* Base setting */
  11. { CC1101_IOCFG0, 0x0D }, // GD0 as async serial data output/input
  12. { CC1101_MCSM0, 0x18 }, // Autocalibrate on idle to TRX, ~150us OSC guard time
  13. /* Async OOK Specific things */
  14. { CC1101_MDMCFG2, 0x30 }, // ASK/OOK, No preamble/sync
  15. { CC1101_PKTCTRL0, 0x32 }, // Async, no CRC, Infinite
  16. { CC1101_FREND0, 0x01 }, // OOK/ASK PATABLE
  17. /* End */
  18. { 0, 0 },
  19. };
  20. static const uint8_t api_hal_subghz_preset_ook_async_patable[8] = {
  21. 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  22. };
  23. static const uint8_t api_hal_subghz_preset_mp_regs[][2] = {
  24. { CC1101_IOCFG0, 0x0D },
  25. { CC1101_FIFOTHR, 0x07 },
  26. { CC1101_PKTCTRL0, 0x32 },
  27. //{ CC1101_FSCTRL1, 0x0E },
  28. { CC1101_FSCTRL1, 0x06 },
  29. { CC1101_FREQ2, 0x10 },
  30. { CC1101_FREQ1, 0xB0 },
  31. { CC1101_FREQ0, 0x7F },
  32. { CC1101_MDMCFG4, 0x17 },
  33. { CC1101_MDMCFG3, 0x32 },
  34. { CC1101_MDMCFG2, 0x30 }, //<---OOK/ASK
  35. { CC1101_MDMCFG1, 0x23 },
  36. { CC1101_MDMCFG0, 0xF8 },
  37. { CC1101_MCSM0, 0x18 },
  38. { CC1101_FOCCFG, 0x18 },
  39. { CC1101_AGCTRL2, 0x07 },
  40. { CC1101_AGCTRL1, 0x00 },
  41. { CC1101_AGCTRL0, 0x91 },
  42. { CC1101_WORCTRL, 0xFB },
  43. { CC1101_FREND1, 0xB6 },
  44. //{ CC1101_FREND0, 0x11 },
  45. { CC1101_FREND0, 0x01 },
  46. { CC1101_FSCAL3, 0xE9 },
  47. { CC1101_FSCAL2, 0x2A },
  48. { CC1101_FSCAL1, 0x00 },
  49. { CC1101_FSCAL0, 0x1F },
  50. { CC1101_TEST2, 0x88 },
  51. { CC1101_TEST1, 0x31 },
  52. { CC1101_TEST0, 0x09 },
  53. /* End */
  54. { 0, 0 },
  55. };
  56. static const uint8_t api_hal_subghz_preset_mp_patable[8] = {
  57. 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  58. };
  59. static const uint8_t api_hal_subghz_preset_2fsk_packet_regs[][2] = {
  60. /* Base setting */
  61. { CC1101_IOCFG0, 0x06 }, // GD0 as async serial data output/input
  62. { CC1101_MCSM0, 0x18 }, // Autocalibrate on idle to TRX, ~150us OSC guard time
  63. /* Magic */
  64. { CC1101_TEST2, 0x81},
  65. { CC1101_TEST1, 0x35},
  66. { CC1101_TEST0, 0x09},
  67. /* End */
  68. { 0, 0 },
  69. };
  70. static const uint8_t api_hal_subghz_preset_2fsk_packet_patable[8] = {
  71. 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  72. };
  73. void api_hal_subghz_init() {
  74. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  75. // Reset and shutdown
  76. cc1101_reset(device);
  77. // Prepare GD0 for power on self test
  78. hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
  79. // GD0 low
  80. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHW);
  81. while(hal_gpio_read(&gpio_cc1101_g0) != false);
  82. // GD0 high
  83. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
  84. while(hal_gpio_read(&gpio_cc1101_g0) != true);
  85. // Reset GD0 to floating state
  86. cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
  87. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  88. // RF switches
  89. hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
  90. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
  91. // Turn off oscillator
  92. cc1101_shutdown(device);
  93. api_hal_spi_device_return(device);
  94. }
  95. void api_hal_subghz_dump_state() {
  96. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  97. printf(
  98. "[api_hal_subghz] cc1101 chip %d, version %d\r\n",
  99. cc1101_get_partnumber(device),
  100. cc1101_get_version(device)
  101. );
  102. api_hal_spi_device_return(device);
  103. }
  104. void api_hal_subghz_load_preset(ApiHalSubGhzPreset preset) {
  105. if(preset == ApiHalSubGhzPresetOokAsync) {
  106. api_hal_subghz_load_registers(api_hal_subghz_preset_ook_async_regs);
  107. api_hal_subghz_load_patable(api_hal_subghz_preset_ook_async_patable);
  108. } else if(preset == ApiHalSubGhzPreset2FskPacket) {
  109. api_hal_subghz_load_registers(api_hal_subghz_preset_2fsk_packet_regs);
  110. api_hal_subghz_load_patable(api_hal_subghz_preset_2fsk_packet_patable);
  111. } else if(preset == ApiHalSubGhzPresetMP) {
  112. api_hal_subghz_load_registers(api_hal_subghz_preset_mp_regs);
  113. api_hal_subghz_load_patable(api_hal_subghz_preset_mp_patable);
  114. }
  115. }
  116. uint8_t api_hal_subghz_get_status() {
  117. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  118. CC1101StatusRaw st;
  119. st.status = cc1101_get_status(device);
  120. api_hal_spi_device_return(device);
  121. return st.status_raw;
  122. }
  123. void api_hal_subghz_load_registers(const uint8_t data[][2]) {
  124. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  125. cc1101_reset(device);
  126. uint32_t i = 0;
  127. while (data[i][0]) {
  128. cc1101_write_reg(device, data[i][0], data[i][1]);
  129. i++;
  130. }
  131. api_hal_spi_device_return(device);
  132. }
  133. void api_hal_subghz_load_patable(const uint8_t data[8]) {
  134. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  135. cc1101_set_pa_table(device, data);
  136. api_hal_spi_device_return(device);
  137. }
  138. void api_hal_subghz_write_packet(const uint8_t* data, uint8_t size) {
  139. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  140. cc1101_flush_tx(device);
  141. cc1101_write_fifo(device, data, size);
  142. api_hal_spi_device_return(device);
  143. }
  144. void api_hal_subghz_flush_rx() {
  145. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  146. cc1101_flush_rx(device);
  147. api_hal_spi_device_return(device);
  148. }
  149. void api_hal_subghz_read_packet(uint8_t* data, uint8_t* size) {
  150. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  151. cc1101_read_fifo(device, data, size);
  152. api_hal_spi_device_return(device);
  153. }
  154. void api_hal_subghz_shutdown() {
  155. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  156. // Reset and shutdown
  157. cc1101_shutdown(device);
  158. api_hal_spi_device_return(device);
  159. }
  160. void api_hal_subghz_reset() {
  161. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  162. cc1101_reset(device);
  163. api_hal_spi_device_return(device);
  164. }
  165. void api_hal_subghz_idle() {
  166. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  167. cc1101_switch_to_idle(device);
  168. api_hal_spi_device_return(device);
  169. }
  170. void api_hal_subghz_rx() {
  171. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  172. cc1101_switch_to_rx(device);
  173. api_hal_spi_device_return(device);
  174. }
  175. void api_hal_subghz_tx() {
  176. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  177. cc1101_switch_to_idle(device);
  178. cc1101_switch_to_tx(device);
  179. api_hal_spi_device_return(device);
  180. }
  181. float api_hal_subghz_get_rssi() {
  182. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  183. int32_t rssi_dec = cc1101_get_rssi(device);
  184. api_hal_spi_device_return(device);
  185. float rssi = rssi_dec;
  186. if(rssi_dec >= 128) {
  187. rssi = ((rssi - 256.0f) / 2.0f) - 74.0f;
  188. } else {
  189. rssi = (rssi / 2.0f) - 74.0f;
  190. }
  191. return rssi;
  192. }
  193. uint32_t api_hal_subghz_set_frequency_and_path(uint32_t value) {
  194. value = api_hal_subghz_set_frequency(value);
  195. if(value >= 300000000 && value <= 348000335) {
  196. api_hal_subghz_set_path(ApiHalSubGhzPath315);
  197. } else if(value >= 387000000 && value <= 464000000) {
  198. api_hal_subghz_set_path(ApiHalSubGhzPath433);
  199. } else if(value >= 779000000 && value <= 928000000) {
  200. api_hal_subghz_set_path(ApiHalSubGhzPath868);
  201. } else {
  202. furi_check(0);
  203. }
  204. return value;
  205. }
  206. uint32_t api_hal_subghz_set_frequency(uint32_t value) {
  207. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  208. // Compensate rounding
  209. if (value % cc1101_get_frequency_step(device) > (cc1101_get_frequency_step(device) / 2)) {
  210. value += cc1101_get_frequency_step(device);
  211. }
  212. uint32_t real_frequency = cc1101_set_frequency(device, value);
  213. cc1101_calibrate(device);
  214. api_hal_spi_device_return(device);
  215. return real_frequency;
  216. }
  217. void api_hal_subghz_set_path(ApiHalSubGhzPath path) {
  218. const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
  219. if (path == ApiHalSubGhzPath433) {
  220. hal_gpio_write(&gpio_rf_sw_0, 0);
  221. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
  222. } else if (path == ApiHalSubGhzPath315) {
  223. hal_gpio_write(&gpio_rf_sw_0, 1);
  224. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
  225. } else if (path == ApiHalSubGhzPath868) {
  226. hal_gpio_write(&gpio_rf_sw_0, 1);
  227. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
  228. } else if (path == ApiHalSubGhzPathIsolate) {
  229. hal_gpio_write(&gpio_rf_sw_0, 0);
  230. cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
  231. } else {
  232. furi_check(0);
  233. }
  234. api_hal_spi_device_return(device);
  235. }
  236. volatile uint32_t api_hal_subghz_capture_delta_duration = 0;
  237. volatile ApiHalSubGhzCaptureCallback api_hal_subghz_capture_callback = NULL;
  238. volatile void* api_hal_subghz_capture_callback_context = NULL;
  239. void api_hal_subghz_set_capture_callback(ApiHalSubGhzCaptureCallback callback, void* context) {
  240. api_hal_subghz_capture_callback = callback;
  241. api_hal_subghz_capture_callback_context = context;
  242. }
  243. static void api_hal_subghz_capture_ISR() {
  244. // Channel 1
  245. if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
  246. LL_TIM_ClearFlag_CC1(TIM2);
  247. api_hal_subghz_capture_delta_duration = LL_TIM_IC_GetCaptureCH1(TIM2);
  248. if (api_hal_subghz_capture_callback) {
  249. api_hal_subghz_capture_callback(
  250. ApiHalSubGhzCaptureLevelHigh,
  251. api_hal_subghz_capture_delta_duration,
  252. (void*)api_hal_subghz_capture_callback_context
  253. );
  254. }
  255. }
  256. // Channel 2
  257. if(LL_TIM_IsActiveFlag_CC2(TIM2)) {
  258. LL_TIM_ClearFlag_CC2(TIM2);
  259. if (api_hal_subghz_capture_callback) {
  260. api_hal_subghz_capture_callback(
  261. ApiHalSubGhzCaptureLevelLow,
  262. LL_TIM_IC_GetCaptureCH2(TIM2) - api_hal_subghz_capture_delta_duration,
  263. (void*)api_hal_subghz_capture_callback_context
  264. );
  265. }
  266. }
  267. }
  268. void api_hal_subghz_enable_capture() {
  269. /* Peripheral clock enable */
  270. LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
  271. LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
  272. hal_gpio_init_ex(&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
  273. // Timer: base
  274. LL_TIM_InitTypeDef TIM_InitStruct = {0};
  275. TIM_InitStruct.Prescaler = 64-1;
  276. TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
  277. TIM_InitStruct.Autoreload = 0xFFFFFFFF;
  278. TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
  279. LL_TIM_Init(TIM2, &TIM_InitStruct);
  280. // Timer: advanced and channel
  281. LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
  282. LL_TIM_DisableARRPreload(TIM2);
  283. LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
  284. LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
  285. LL_TIM_CC_DisableChannel(TIM2, LL_TIM_CHANNEL_CH2);
  286. LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV1);
  287. LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
  288. LL_TIM_DisableIT_TRIG(TIM2);
  289. LL_TIM_DisableDMAReq_TRIG(TIM2);
  290. LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
  291. LL_TIM_EnableMasterSlaveMode(TIM2);
  292. LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
  293. LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
  294. LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
  295. LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
  296. LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
  297. LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
  298. // ISR setup
  299. api_hal_interrupt_set_timer_isr(TIM2, api_hal_subghz_capture_ISR);
  300. NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),5, 0));
  301. NVIC_EnableIRQ(TIM2_IRQn);
  302. // Interrupts and channels
  303. LL_TIM_EnableIT_CC1(TIM2);
  304. LL_TIM_EnableIT_CC2(TIM2);
  305. LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
  306. LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
  307. // Start timer
  308. LL_TIM_SetCounter(TIM2, 0);
  309. LL_TIM_EnableCounter(TIM2);
  310. }
  311. void api_hal_subghz_disable_capture() {
  312. LL_TIM_DeInit(TIM2);
  313. api_hal_interrupt_set_timer_isr(TIM2, NULL);
  314. hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
  315. }