rfal_isoDep.c 122 KB

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  1. /******************************************************************************
  2. * \attention
  3. *
  4. * <h2><center>&copy; COPYRIGHT 2020 STMicroelectronics</center></h2>
  5. *
  6. * Licensed under ST MYLIBERTY SOFTWARE LICENSE AGREEMENT (the "License");
  7. * You may not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at:
  9. *
  10. * www.st.com/myliberty
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an "AS IS" BASIS,
  14. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
  15. * AND SPECIFICALLY DISCLAIMING THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT.
  17. * See the License for the specific language governing permissions and
  18. * limitations under the License.
  19. *
  20. ******************************************************************************/
  21. /*
  22. * PROJECT: NFCC firmware
  23. * LANGUAGE: ISO C99
  24. */
  25. /*! \file rfal_isoDep.c
  26. *
  27. * \author Gustavo Patricio
  28. *
  29. * \brief Implementation of ISO-DEP protocol
  30. *
  31. * This implementation was based on the following specs:
  32. * - ISO/IEC 14443-4 2nd Edition 2008-07-15
  33. * - NFC Forum Digital Protocol 1.1 2014-01-14
  34. *
  35. */
  36. /*
  37. ******************************************************************************
  38. * INCLUDES
  39. ******************************************************************************
  40. */
  41. #include "rfal_isoDep.h"
  42. #include "rfal_rf.h"
  43. #include "utils.h"
  44. /*
  45. ******************************************************************************
  46. * ENABLE SWITCH
  47. ******************************************************************************
  48. */
  49. #if RFAL_FEATURE_ISO_DEP
  50. #if(!RFAL_FEATURE_ISO_DEP_POLL && !RFAL_FEATURE_ISO_DEP_LISTEN)
  51. #error \
  52. " RFAL: Invalid ISO-DEP Configuration. Please select at least one mode: Poller and/or Listener. "
  53. #endif
  54. /* Check for valid I-Block length [RFAL_ISODEP_FSX_16 ; RFAL_ISODEP_FSX_4096]*/
  55. #if((RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN > 4096) || (RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN < 16))
  56. #error \
  57. " RFAL: Invalid ISO-DEP IBlock Max length. Please change RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN. "
  58. #endif
  59. /* Check for valid APDU length. */
  60. #if((RFAL_FEATURE_ISO_DEP_APDU_MAX_LEN < RFAL_FEATURE_ISO_DEP_IBLOCK_MAX_LEN))
  61. #error " RFAL: Invalid ISO-DEP APDU Max length. Please change RFAL_FEATURE_ISO_DEP_APDU_MAX_LEN. "
  62. #endif
  63. /*
  64. ******************************************************************************
  65. * DEFINES
  66. ******************************************************************************
  67. */
  68. #define ISODEP_CRC_LEN RFAL_CRC_LEN /*!< ISO1443 CRC Length */
  69. #define ISODEP_PCB_POS (0U) /*!< PCB position on message header*/
  70. #define ISODEP_SWTX_INF_POS (1U) /*!< INF position in a S-WTX */
  71. #define ISODEP_DID_POS (1U) /*!< DID position on message header*/
  72. #define ISODEP_SWTX_PARAM_LEN (1U) /*!< SWTX parameter length */
  73. #define ISODEP_DSL_MAX_LEN \
  74. (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN) /*!< Deselect Req/Res length */
  75. #define ISODEP_PCB_xBLOCK_MASK (0xC0U) /*!< Bit mask for Block type */
  76. #define ISODEP_PCB_IBLOCK (0x00U) /*!< Bit mask indicating a I-Block */
  77. #define ISODEP_PCB_RBLOCK (0x80U) /*!< Bit mask indicating a R-Block */
  78. #define ISODEP_PCB_SBLOCK (0xC0U) /*!< Bit mask indicating a S-Block */
  79. #define ISODEP_PCB_INVALID (0x40U) /*!< Bit mask of an Invalid PCB */
  80. #define ISODEP_HDR_MAX_LEN \
  81. (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN + \
  82. RFAL_ISODEP_NAD_LEN) /*!< Max header length (PCB + DID + NAD) */
  83. #define ISODEP_PCB_IB_VALID_MASK \
  84. (ISODEP_PCB_B6_BIT | ISODEP_PCB_B2_BIT) /*!< Bit mask for the MUST bits on I-Block */
  85. #define ISODEP_PCB_IB_VALID_VAL \
  86. (ISODEP_PCB_B2_BIT) /*!< Value for the MUST bits on I-Block */
  87. #define ISODEP_PCB_RB_VALID_MASK \
  88. (ISODEP_PCB_B6_BIT | ISODEP_PCB_B3_BIT | \
  89. ISODEP_PCB_B2_BIT) /*!< Bit mask for the MUST bits on R-Block */
  90. #define ISODEP_PCB_RB_VALID_VAL \
  91. (ISODEP_PCB_B6_BIT | ISODEP_PCB_B2_BIT) /*!< Value for the MUST bits on R-Block */
  92. #define ISODEP_PCB_SB_VALID_MASK \
  93. (ISODEP_PCB_B3_BIT | ISODEP_PCB_B2_BIT | \
  94. ISODEP_PCB_B1_BIT) /*!< Bit mask for the MUST bits on I-Block */
  95. #define ISODEP_PCB_SB_VALID_VAL \
  96. (ISODEP_PCB_B2_BIT) /*!< Value for the MUST bits on I-Block */
  97. #define ISODEP_PCB_B1_BIT \
  98. (0x01U) /*!< Bit mask for the RFU S Blocks */
  99. #define ISODEP_PCB_B2_BIT \
  100. (0x02U) /*!< Bit mask for the RFU bit2 in I,S,R Blocks */
  101. #define ISODEP_PCB_B3_BIT \
  102. (0x04U) /*!< Bit mask for the RFU bit3 in R Blocks */
  103. #define ISODEP_PCB_B6_BIT \
  104. (0x20U) /*!< Bit mask for the RFU bit2 in R Blocks */
  105. #define ISODEP_PCB_CHAINING_BIT \
  106. (0x10U) /*!< Bit mask for the chaining bit of an ISO DEP I-Block in PCB. */
  107. #define ISODEP_PCB_DID_BIT \
  108. (0x08U) /*!< Bit mask for the DID presence bit of an ISO DEP I,S,R Blocks PCB. */
  109. #define ISODEP_PCB_NAD_BIT \
  110. (0x04U) /*!< Bit mask for the NAD presence bit of an ISO DEP I,S,R Blocks in PCB */
  111. #define ISODEP_PCB_BN_MASK \
  112. (0x01U) /*!< Bit mask for the block number of an ISO DEP I,R Block in PCB */
  113. #define ISODEP_SWTX_PL_MASK \
  114. (0xC0U) /*!< Bit mask for the Power Level bits of the inf byte of an WTX request or response */
  115. #define ISODEP_SWTX_WTXM_MASK \
  116. (0x3FU) /*!< Bit mask for the WTXM bits of the inf byte of an WTX request or response */
  117. #define ISODEP_RBLOCK_INF_LEN (0U) /*!< INF length of R-Block Digital 1.1 15.1.3 */
  118. #define ISODEP_SDSL_INF_LEN (0U) /*!< INF length of S(DSL) Digital 1.1 15.1.3 */
  119. #define ISODEP_SWTX_INF_LEN (1U) /*!< INF length of S(WTX) Digital 1.1 15.2.2 */
  120. #define ISODEP_WTXM_MIN (1U) /*!< Minimum allowed value for the WTXM, Digital 1.0 13.2.2 */
  121. #define ISODEP_WTXM_MAX (59U) /*!< Maximum allowed value for the WTXM, Digital 1.0 13.2.2 */
  122. #define ISODEP_PCB_Sxx_MASK (0x30U) /*!< Bit mask for the S-Block type */
  123. #define ISODEP_PCB_DESELECT (0x00U) /*!< Bit mask for S-Block indicating Deselect */
  124. #define ISODEP_PCB_WTX (0x30U) /*!< Bit mask for S-Block indicating Waiting Time eXtension */
  125. #define ISODEP_PCB_Rx_MASK (0x10U) /*!< Bit mask for the R-Block type */
  126. #define ISODEP_PCB_ACK (0x00U) /*!< Bit mask for R-Block indicating ACK */
  127. #define ISODEP_PCB_NAK (0x10U) /*!< Bit mask for R-Block indicating NAK */
  128. /*! Maximum length of control message (no INF) */
  129. #define ISODEP_CONTROLMSG_BUF_LEN \
  130. (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN + RFAL_ISODEP_NAD_LEN + ISODEP_SWTX_PARAM_LEN)
  131. #define ISODEP_FWT_DEACTIVATION \
  132. (71680U) /*!< FWT used for DESELECT Digital 2.2 B10 ISO1444-4 7.2 & 8.1 */
  133. #define ISODEP_MAX_RERUNS (0x0FFFFFFFU) /*!< Maximum rerun retrys for a blocking protocol run*/
  134. #define ISODEP_PCBSBLOCK \
  135. (0x00U | ISODEP_PCB_SBLOCK | ISODEP_PCB_B2_BIT) /*!< PCB Value of a S-Block */
  136. #define ISODEP_PCB_SDSL \
  137. (ISODEP_PCBSBLOCK | ISODEP_PCB_DESELECT) /*!< PCB Value of a S-Block with DESELECT */
  138. #define ISODEP_PCB_SWTX \
  139. (ISODEP_PCBSBLOCK | ISODEP_PCB_WTX) /*!< PCB Value of a S-Block with WTX */
  140. #define ISODEP_PCB_SPARAMETERS \
  141. (ISODEP_PCB_SBLOCK | ISODEP_PCB_WTX) /*!< PCB Value of a S-Block with PARAMETERS */
  142. #define ISODEP_FWI_LIS_MAX_NFC \
  143. 8U /*!< FWT Listener Max FWIT4ATmax FWIBmax Digital 1.1 A6 & A3 */
  144. #define ISODEP_FWI_LIS_MAX_EMVCO \
  145. 7U /*!< FWT Listener Max FWIMAX EMVCo 2.6 A.5 */
  146. #define ISODEP_FWI_LIS_MAX \
  147. (uint8_t)( \
  148. (gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ? \
  149. ISODEP_FWI_LIS_MAX_EMVCO : \
  150. ISODEP_FWI_LIS_MAX_NFC) /*!< FWI Listener Max as NFC / EMVCo */
  151. #define ISODEP_FWT_LIS_MAX \
  152. rfalIsoDepFWI2FWT(ISODEP_FWI_LIS_MAX) /*!< FWT Listener Max */
  153. #define ISODEP_FWI_MIN_10 (1U) /*!< Minimum value for FWI Digital 1.0 11.6.2.17 */
  154. #define ISODEP_FWI_MIN_11 (0U) /*!< Default value for FWI Digital 1.1 13.6.2 */
  155. #define ISODEP_FWI_MAX (14U) /*!< Maximum value for FWI Digital 1.0 11.6.2.17 */
  156. #define ISODEP_SFGI_MIN (0U) /*!< Default value for FWI Digital 1.1 13.6.2.22 */
  157. #define ISODEP_SFGI_MAX (14U) /*!< Maximum value for FWI Digital 1.1 13.6.2.22 */
  158. #define RFAL_ISODEP_SPARAM_TVL_HDR_LEN (2U) /*!< S(PARAMETERS) TVL header length: Tag + Len */
  159. #define RFAL_ISODEP_SPARAM_HDR_LEN \
  160. (RFAL_ISODEP_PCB_LEN + \
  161. RFAL_ISODEP_SPARAM_TVL_HDR_LEN) /*!< S(PARAMETERS) header length: PCB + Tag + Len */
  162. /**********************************************************************************************************************/
  163. /**********************************************************************************************************************/
  164. #define RFAL_ISODEP_NO_PARAM (0U) /*!< No parameter flag for isoDepHandleControlMsg() */
  165. #define RFAL_ISODEP_CMD_RATS (0xE0U) /*!< RATS command Digital 1.1 13.6.1 */
  166. #define RFAL_ISODEP_ATS_MIN_LEN (1U) /*!< Minimum ATS length Digital 1.1 13.6.2 */
  167. #define RFAL_ISODEP_ATS_HDR_LEN (5U) /*!< ATS headerlength Digital 1.1 13.6.2 */
  168. #define RFAL_ISODEP_ATS_MAX_LEN \
  169. (RFAL_ISODEP_ATS_HDR_LEN + \
  170. RFAL_ISODEP_ATS_HB_MAX_LEN) /*!< Maximum ATS length Digital 1.1 13.6.2 */
  171. #define RFAL_ISODEP_ATS_T0_FSCI_MASK (0x0FU) /*!< ATS T0's FSCI mask Digital 1.1 13.6.2 */
  172. #define RFAL_ISODEP_ATS_TB_FWI_SHIFT (4U) /*!< ATS TB's FWI shift Digital 1.1 13.6.2 */
  173. #define RFAL_ISODEP_ATS_FWI_MASK (0x0FU) /*!< ATS TB's FWI shift Digital 1.1 13.6.2 */
  174. #define RFAL_ISODEP_ATS_TL_POS (0x00U) /*!< ATS TL's position Digital 1.1 13.6.2 */
  175. #define RFAL_ISODEP_PPS_SB (0xD0U) /*!< PPS REQ PPSS's SB value (no CID) ISO14443-4 5.3 */
  176. #define RFAL_ISODEP_PPS_MASK (0xF0U) /*!< PPS REQ PPSS's SB mask ISO14443-4 5.3 */
  177. #define RFAL_ISODEP_PPS_SB_DID_MASK \
  178. (0x0FU) /*!< PPS REQ PPSS's DID|CID mask ISO14443-4 5.3 */
  179. #define RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT \
  180. (0x11U) /*!< PPS REQ PPS0 indicating that PPS1 is present */
  181. #define RFAL_ISODEP_PPS_PPS1 (0x00U) /*!< PPS REQ PPS1 fixed value ISO14443-4 5.3 */
  182. #define RFAL_ISODEP_PPS_PPS1_DSI_SHIFT \
  183. (2U) /*!< PPS REQ PPS1 fixed value ISO14443-4 5.3 */
  184. #define RFAL_ISODEP_PPS_PPS1_DXI_MASK \
  185. (0x0FU) /*!< PPS REQ PPS1 fixed value ISO14443-4 5.3 */
  186. #define RFAL_ISODEP_PPS_RES_LEN (1U) /*!< PPS Response length ISO14443-4 5.4 */
  187. #define RFAL_ISODEP_PPS_STARTBYTE_POS \
  188. (0U) /*!< PPS REQ PPSS's byte position ISO14443-4 5.4 */
  189. #define RFAL_ISODEP_PPS_PPS0_POS (1U) /*!< PPS REQ PPS0's byte position ISO14443-4 5.4 */
  190. #define RFAL_ISODEP_PPS_PPS1_POS (2U) /*!< PPS REQ PPS1's byte position ISO14443-4 5.4 */
  191. #define RFAL_ISODEP_PPS0_VALID_MASK \
  192. (0xEFU) /*!< PPS REQ PPS0 valid coding mask ISO14443-4 5.4 */
  193. #define RFAL_ISODEP_CMD_ATTRIB (0x1DU) /*!< ATTRIB command Digital 1.1 14.6.1 */
  194. #define RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT \
  195. (6U) /*!< ATTRIB PARAM2 DSI shift Digital 1.1 14.6.1 */
  196. #define RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT \
  197. (4U) /*!< ATTRIB PARAM2 DRI shift Digital 1.1 14.6.1 */
  198. #define RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK \
  199. (0xF0U) /*!< ATTRIB PARAM2 DxI mask Digital 1.1 14.6.1 */
  200. #define RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK \
  201. (0x0FU) /*!< ATTRIB PARAM2 FSDI mask Digital 1.1 14.6.1 */
  202. #define RFAL_ISODEP_ATTRIB_PARAM4_DID_MASK \
  203. (0x0FU) /*!< ATTRIB PARAM4 DID mask Digital 1.1 14.6.1 */
  204. #define RFAL_ISODEP_ATTRIB_HDR_LEN (9U) /*!< ATTRIB REQ header length Digital 1.1 14.6.1 */
  205. #define RFAL_ISODEP_ATTRIB_RES_HDR_LEN \
  206. (1U) /*!< ATTRIB RES header length Digital 1.1 14.6.2 */
  207. #define RFAL_ISODEP_ATTRIB_RES_MBLIDID_POS \
  208. (0U) /*!< ATTRIB RES MBLI|DID position Digital 1.1 14.6.2 */
  209. #define RFAL_ISODEP_ATTRIB_RES_DID_MASK \
  210. (0x0FU) /*!< ATTRIB RES DID mask Digital 1.1 14.6.2 */
  211. #define RFAL_ISODEP_ATTRIB_RES_MBLI_MASK \
  212. (0x0FU) /*!< ATTRIB RES MBLI mask Digital 1.1 14.6.2 */
  213. #define RFAL_ISODEP_ATTRIB_RES_MBLI_SHIFT \
  214. (4U) /*!< ATTRIB RES MBLI shift Digital 1.1 14.6.2 */
  215. #define RFAL_ISODEP_DID_MASK (0x0FU) /*!< ISODEP's DID mask */
  216. #define RFAL_ISODEP_DID_00 (0U) /*!< ISODEP's DID value 0 */
  217. #define RFAL_ISODEP_FSDI_MAX_NFC (8U) /*!< Max FSDI value Digital 2.0 14.6.1.9 & B7 & B8 */
  218. #define RFAL_ISODEP_FSDI_MAX_NFC_21 \
  219. (0x0CU) /*!< Max FSDI value Digital 2.1 14.6.1.9 & Table 72 */
  220. #define RFAL_ISODEP_FSDI_MAX_EMV (0x0CU) /*!< Max FSDI value EMVCo 3.0 5.7.2.5 */
  221. #define RFAL_ISODEP_RATS_PARAM_FSDI_MASK \
  222. (0xF0U) /*!< Mask bits for FSDI in RATS */
  223. #define RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT \
  224. (4U) /*!< Shift for FSDI in RATS */
  225. #define RFAL_ISODEP_RATS_PARAM_DID_MASK \
  226. (0x0FU) /*!< Mask bits for DID in RATS */
  227. #define RFAL_ISODEP_ATS_TL_OFFSET \
  228. (0x00U) /*!< Offset of TL on ATS */
  229. #define RFAL_ISODEP_ATS_TA_OFFSET \
  230. (0x02U) /*!< Offset of TA if it is present on ATS */
  231. #define RFAL_ISODEP_ATS_TB_OFFSET \
  232. (0x03U) /*!< Offset of TB if both TA and TB is present on ATS */
  233. #define RFAL_ISODEP_ATS_TC_OFFSET \
  234. (0x04U) /*!< Offset of TC if both TA,TB & TC are present on ATS */
  235. #define RFAL_ISODEP_ATS_HIST_OFFSET \
  236. (0x05U) /*!< Offset of Historical Bytes if TA, TB & TC are present on ATS */
  237. #define RFAL_ISODEP_ATS_TC_ADV_FEAT \
  238. (0x10U) /*!< Bit mask indicating support for Advanced protocol features: DID & NAD */
  239. #define RFAL_ISODEP_ATS_TC_DID (0x02U) /*!< Bit mask indicating support for DID */
  240. #define RFAL_ISODEP_ATS_TC_NAD (0x01U) /*!< Bit mask indicating support for NAD */
  241. #define RFAL_ISODEP_PPS0_PPS1_PRESENT \
  242. (0x11U) /*!< PPS0 byte indicating that PPS1 is present */
  243. #define RFAL_ISODEP_PPS0_PPS1_NOT_PRESENT \
  244. (0x01U) /*!< PPS0 byte indicating that PPS1 is NOT present */
  245. #define RFAL_ISODEP_PPS1_DRI_MASK \
  246. (0x03U) /*!< PPS1 byte DRI mask bits */
  247. #define RFAL_ISODEP_PPS1_DSI_MASK \
  248. (0x0CU) /*!< PPS1 byte DSI mask bits */
  249. #define RFAL_ISODEP_PPS1_DSI_SHIFT \
  250. (2U) /*!< PPS1 byte DSI shift */
  251. #define RFAL_ISODEP_PPS1_DxI_MASK \
  252. (0x03U) /*!< PPS1 byte DSI/DRS mask bits */
  253. /*! Delta Time for polling during Activation (ATS) : 20ms Digital 1.0 11.7.1.1 & A.7 */
  254. #define RFAL_ISODEP_T4T_DTIME_POLL_10 rfalConvMsTo1fc(20)
  255. /*! Delta Time for polling during Activation (ATS) : 16.4ms Digital 1.1 13.8.1.1 & A.6
  256. * Use 16 ms as testcase T4AT_BI_10_03 sends a frame exactly at the border */
  257. #define RFAL_ISODEP_T4T_DTIME_POLL_11 216960U
  258. /*! Activation frame waiting time FWT(act) = 71680/fc (~5286us) Digital 1.1 13.8.1.1 & A.6 */
  259. #define RFAL_ISODEP_T4T_FWT_ACTIVATION (71680U + RFAL_ISODEP_T4T_DTIME_POLL_11)
  260. /*! Delta frame waiting time = 16/fc Digital 1.0 11.7.1.3 & A.7*/
  261. #define RFAL_ISODEP_DFWT_10 16U
  262. /*! Delta frame waiting time = 16/fc Digital 2.0 14.8.1.3 & B.7*/
  263. #define RFAL_ISODEP_DFWT_20 49152U
  264. /*
  265. ******************************************************************************
  266. * MACROS
  267. ******************************************************************************
  268. */
  269. #define isoDep_PCBisIBlock(pcb) \
  270. (((pcb) & (ISODEP_PCB_xBLOCK_MASK | ISODEP_PCB_IB_VALID_MASK)) == \
  271. (ISODEP_PCB_IBLOCK | ISODEP_PCB_IB_VALID_VAL)) /*!< Checks if pcb is a I-Block */
  272. #define isoDep_PCBisRBlock(pcb) \
  273. (((pcb) & (ISODEP_PCB_xBLOCK_MASK | ISODEP_PCB_RB_VALID_MASK)) == \
  274. (ISODEP_PCB_RBLOCK | ISODEP_PCB_RB_VALID_VAL)) /*!< Checks if pcb is a R-Block */
  275. #define isoDep_PCBisSBlock(pcb) \
  276. (((pcb) & (ISODEP_PCB_xBLOCK_MASK | ISODEP_PCB_SB_VALID_MASK)) == \
  277. (ISODEP_PCB_SBLOCK | ISODEP_PCB_SB_VALID_VAL)) /*!< Checks if pcb is a S-Block */
  278. #define isoDep_PCBisChaining(pcb) \
  279. (((pcb)&ISODEP_PCB_CHAINING_BIT) == \
  280. ISODEP_PCB_CHAINING_BIT) /*!< Checks if pcb is indicating chaining */
  281. #define isoDep_PCBisDeselect(pcb) \
  282. (((pcb)&ISODEP_PCB_Sxx_MASK) == \
  283. ISODEP_PCB_DESELECT) /*!< Checks if pcb is indicating DESELECT */
  284. #define isoDep_PCBisWTX(pcb) \
  285. (((pcb)&ISODEP_PCB_Sxx_MASK) == ISODEP_PCB_WTX) /*!< Checks if pcb is indicating WTX */
  286. #define isoDep_PCBisACK(pcb) \
  287. (((pcb)&ISODEP_PCB_Rx_MASK) == ISODEP_PCB_ACK) /*!< Checks if pcb is indicating ACK */
  288. #define isoDep_PCBisNAK(pcb) \
  289. (((pcb)&ISODEP_PCB_Rx_MASK) == ISODEP_PCB_NAK) /*!< Checks if pcb is indicating ACK */
  290. #define isoDep_PCBhasDID(pcb) \
  291. (((pcb)&ISODEP_PCB_DID_BIT) == ISODEP_PCB_DID_BIT) /*!< Checks if pcb is indicating DID */
  292. #define isoDep_PCBhasNAD(pcb) \
  293. (((pcb)&ISODEP_PCB_NAD_BIT) == ISODEP_PCB_NAD_BIT) /*!< Checks if pcb is indicating NAD */
  294. #define isoDep_PCBisIChaining(pcb) \
  295. (isoDep_PCBisIBlock(pcb) && \
  296. isoDep_PCBisChaining(pcb)) /*!< Checks if pcb is I-Block indicating chaining*/
  297. #define isoDep_PCBisSDeselect(pcb) \
  298. (isoDep_PCBisSBlock(pcb) && \
  299. isoDep_PCBisDeselect(pcb)) /*!< Checks if pcb is S-Block indicating DESELECT*/
  300. #define isoDep_PCBisSWTX(pcb) \
  301. (isoDep_PCBisSBlock(pcb) && \
  302. isoDep_PCBisWTX(pcb)) /*!< Checks if pcb is S-Block indicating WTX */
  303. #define isoDep_PCBisRACK(pcb) \
  304. (isoDep_PCBisRBlock(pcb) && \
  305. isoDep_PCBisACK(pcb)) /*!< Checks if pcb is R-Block indicating ACK */
  306. #define isoDep_PCBisRNAK(pcb) \
  307. (isoDep_PCBisRBlock(pcb) && \
  308. isoDep_PCBisNAK(pcb)) /*!< Checks if pcb is R-Block indicating NAK */
  309. #define isoDep_PCBIBlock(bn) \
  310. ((uint8_t)(0x00U | ISODEP_PCB_IBLOCK | ISODEP_PCB_B2_BIT | ((bn)&ISODEP_PCB_BN_MASK))) /*!< Returns an I-Block with the given block number (bn) */
  311. #define isoDep_PCBIBlockChaining(bn) \
  312. ((uint8_t)(isoDep_PCBIBlock(bn) | ISODEP_PCB_CHAINING_BIT)) /*!< Returns an I-Block with the given block number (bn) indicating chaining */
  313. #define isoDep_PCBRBlock(bn) \
  314. ((uint8_t)(0x00U | ISODEP_PCB_RBLOCK | ISODEP_PCB_B6_BIT | ISODEP_PCB_B2_BIT | ((bn)&ISODEP_PCB_BN_MASK))) /*!< Returns an R-Block with the given block number (bn) */
  315. #define isoDep_PCBRACK(bn) \
  316. ((uint8_t)(isoDep_PCBRBlock(bn) | ISODEP_PCB_ACK)) /*!< Returns an R-Block with the given block number (bn) indicating ACK */
  317. #define isoDep_PCBRNAK(bn) \
  318. ((uint8_t)(isoDep_PCBRBlock(bn) | ISODEP_PCB_NAK)) /*!< Returns an R-Block with the given block number (bn) indicating NAK */
  319. #define isoDep_GetBN(pcb) \
  320. ((uint8_t)((pcb)&ISODEP_PCB_BN_MASK)) /*!< Returns the block number (bn) from the given pcb */
  321. #define isoDep_GetWTXM(inf) \
  322. ((uint8_t)(( \
  323. inf)&ISODEP_SWTX_WTXM_MASK)) /*!< Returns the WTX value from the given inf byte */
  324. #define isoDep_isWTXMValid(wtxm) \
  325. (((wtxm) >= ISODEP_WTXM_MIN) && \
  326. ((wtxm) <= ISODEP_WTXM_MAX)) /*!< Checks if the given wtxm is valid */
  327. #define isoDep_WTXMListenerMax(fwt) \
  328. (MIN( \
  329. (uint8_t)(ISODEP_FWT_LIS_MAX / (fwt)), \
  330. ISODEP_WTXM_MAX)) /*!< Calculates the Max WTXM value for the given fwt as a Listener */
  331. #define isoDepCalcdSGFT(s) \
  332. (384U * ((uint32_t)1U \
  333. << (s))) /*!< Calculates the dSFGT with given SFGI Digital 1.1 13.8.2.1 & A.6*/
  334. #define isoDepCalcSGFT(s) \
  335. (4096U * ((uint32_t)1U \
  336. << (s))) /*!< Calculates the SFGT with given SFGI Digital 1.1 13.8.2 */
  337. #define isoDep_PCBNextBN(bn) \
  338. (((uint8_t)(bn) ^ 0x01U) & \
  339. ISODEP_PCB_BN_MASK) /*!< Returns the value of the next block number based on bn */
  340. #define isoDep_PCBPrevBN(bn) \
  341. isoDep_PCBNextBN(bn) /*!< Returns the value of the previous block number based on bn */
  342. #define isoDep_ToggleBN(bn) \
  343. ((bn) = \
  344. (((bn) ^ 0x01U) & \
  345. ISODEP_PCB_BN_MASK)) /*!< Toggles the block number value of the given bn */
  346. #define isoDep_WTXAdjust(v) \
  347. ((v) - ((v) >> 3)) /*!< Adjust WTX timer value to a percentage of the total, current 88% */
  348. /*! ISO 14443-4 7.5.6.2 & Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  349. #define isoDepReEnableRx(rxB, rxBL, rxL) \
  350. rfalTransceiveBlockingTx(NULL, 0, rxB, rxBL, rxL, RFAL_TXRX_FLAGS_DEFAULT, RFAL_FWT_NONE)
  351. /*! Macro used for the blocking methods */
  352. #define rfalIsoDepRunBlocking(e, fn) \
  353. do { \
  354. (e) = (fn); \
  355. rfalWorker(); \
  356. } while((e) == ERR_BUSY)
  357. #define isoDepTimerStart(timer, time_ms) \
  358. do { \
  359. platformTimerDestroy(timer); \
  360. (timer) = platformTimerCreate((uint16_t)(time_ms)); \
  361. } while(0) /*!< Configures and starts the WTX timer */
  362. #define isoDepTimerisExpired(timer) \
  363. platformTimerIsExpired(timer) /*!< Checks WTX timer has expired */
  364. #define isoDepTimerDestroy(timer) \
  365. platformTimerDestroy(timer) /*!< Destroys WTX timer */
  366. /*
  367. ******************************************************************************
  368. * LOCAL DATA TYPES
  369. ******************************************************************************
  370. */
  371. /*! Internal structure to be used in handling of S(PARAMETRS) only */
  372. typedef struct {
  373. uint8_t pcb; /*!< PCB byte */
  374. rfalIsoDepSParameter sParam; /*!< S(PARAMETERS) */
  375. } rfalIsoDepControlMsgSParam;
  376. /*! Enumeration of the possible control message types */
  377. typedef enum {
  378. ISODEP_R_ACK, /*!< R-ACK Acknowledge */
  379. ISODEP_R_NAK, /*!< R-NACK Negative acknowledge */
  380. ISODEP_S_WTX, /*!< S-WTX Waiting Time Extension */
  381. ISODEP_S_DSL /*!< S-DSL Deselect */
  382. } rfalIsoDepControlMsg;
  383. /*! Enumeration of the IsoDep roles */
  384. typedef enum {
  385. ISODEP_ROLE_PCD, /*!< Perform as Reader/PCD */
  386. ISODEP_ROLE_PICC /*!< Perform as Card/PICC */
  387. } rfalIsoDepRole;
  388. /*! ISO-DEP layer states */
  389. typedef enum {
  390. ISODEP_ST_IDLE, /*!< Idle State */
  391. ISODEP_ST_PCD_TX, /*!< PCD Transmission State */
  392. ISODEP_ST_PCD_RX, /*!< PCD Reception State */
  393. ISODEP_ST_PCD_WAIT_DSL, /*!< PCD Wait for DSL response */
  394. ISODEP_ST_PICC_ACT_ATS, /*!< PICC has replied to RATS (ATS) */
  395. ISODEP_ST_PICC_ACT_ATTRIB, /*!< PICC has replied to ATTRIB */
  396. ISODEP_ST_PICC_RX, /*!< PICC Reception State */
  397. ISODEP_ST_PICC_SWTX, /*!< PICC Waiting Time eXtension */
  398. ISODEP_ST_PICC_SDSL, /*!< PICC S(DSL) response ongoing */
  399. ISODEP_ST_PICC_TX, /*!< PICC Transmission State */
  400. ISODEP_ST_PCD_ACT_RATS, /*!< PCD activation (RATS) */
  401. ISODEP_ST_PCD_ACT_PPS, /*!< PCD activation (PPS) */
  402. } rfalIsoDepState;
  403. /*! Holds all ISO-DEP data(counters, buffers, ID, timeouts, frame size) */
  404. typedef struct {
  405. rfalIsoDepState state; /*!< ISO-DEP module state */
  406. rfalIsoDepRole role; /*!< Current ISO-DEP role */
  407. uint8_t blockNumber; /*!< Current block number */
  408. uint8_t did; /*!< Current DID */
  409. uint8_t nad; /*!< Current DID */
  410. uint8_t cntIRetrys; /*!< I-Block retry counter */
  411. uint8_t cntRRetrys; /*!< R-Block retry counter */
  412. uint8_t cntSDslRetrys; /*!< S(DESELECT) retry counter */
  413. uint8_t cntSWtxRetrys; /*!< Overall S(WTX) retry counter */
  414. uint8_t cntSWtxNack; /*!< R(NACK) answered with S(WTX) counter */
  415. uint32_t fwt; /*!< Current FWT (Frame Waiting Time) */
  416. uint32_t dFwt; /*!< Current delta FWT */
  417. uint16_t fsx; /*!< Current FSx FSC or FSD (max Frame size) */
  418. bool isTxChaining; /*!< Flag for chaining on Tx */
  419. bool isRxChaining; /*!< Flag for chaining on Rx */
  420. uint8_t* txBuf; /*!< Tx buffer pointer */
  421. uint8_t* rxBuf; /*!< Rx buffer pointer */
  422. uint16_t txBufLen; /*!< Tx buffer length */
  423. uint16_t rxBufLen; /*!< Rx buffer length */
  424. uint8_t txBufInfPos; /*!< Start of payload in txBuf */
  425. uint8_t rxBufInfPos; /*!< Start of payload in rxBuf */
  426. uint16_t ourFsx; /*!< Our current FSx FSC or FSD (Frame size) */
  427. uint8_t lastPCB; /*!< Last PCB sent */
  428. uint8_t lastWTXM; /*!< Last WTXM sent */
  429. uint8_t atsTA; /*!< TA on ATS */
  430. uint8_t hdrLen; /*!< Current ISO-DEP length */
  431. rfalBitRate txBR; /*!< Current Tx Bit Rate */
  432. rfalBitRate rxBR; /*!< Current Rx Bit Rate */
  433. uint16_t* rxLen; /*!< Output parameter ptr to Rx length */
  434. bool* rxChaining; /*!< Output parameter ptr to Rx chaining flag */
  435. uint32_t WTXTimer; /*!< Timer used for WTX */
  436. bool lastDID00; /*!< Last PCD block had DID flag (for DID = 0) */
  437. bool isTxPending; /*!< Flag pending Block while waiting WTX Ack */
  438. bool isWait4WTX; /*!< Flag for waiting WTX Ack */
  439. uint8_t maxRetriesI; /*!< Number of retries for a I-Block */
  440. uint8_t maxRetriesR; /*!< Number of retries for a R-Block */
  441. uint8_t maxRetriesSDSL; /*!< Number of retries for S(DESELECT) errors */
  442. uint8_t maxRetriesSWTX; /*!< Number of retries for S(WTX) errors */
  443. uint8_t maxRetriesSnWTX; /*!< Number of retries S(WTX) replied w NACK */
  444. uint8_t maxRetriesRATS; /*!< Number of retries for RATS */
  445. rfalComplianceMode compMode; /*!< Compliance mode */
  446. uint8_t ctrlBuf[ISODEP_CONTROLMSG_BUF_LEN]; /*!< Control msg buf */
  447. uint16_t ctrlRxLen; /*!< Control msg rcvd len */
  448. union { /* PRQA S 0750 # MISRA 19.2 - Members of the union will not be used concurrently, only one frame at a time */
  449. #if RFAL_FEATURE_NFCA
  450. rfalIsoDepRats ratsReq;
  451. rfalIsoDepPpsReq ppsReq;
  452. #endif /* RFAL_FEATURE_NFCA */
  453. #if RFAL_FEATURE_NFCB
  454. rfalIsoDepAttribCmd attribReq;
  455. #endif /* RFAL_FEATURE_NFCB */
  456. } actv; /*!< Activation buffer */
  457. uint8_t* rxLen8; /*!< Receive length (8-bit) */
  458. rfalIsoDepDevice* actvDev; /*!< Activation Device Info */
  459. rfalIsoDepListenActvParam actvParam; /*!< Listen Activation context */
  460. rfalIsoDepApduTxRxParam APDUParam; /*!< APDU TxRx params */
  461. uint16_t APDUTxPos; /*!< APDU Tx position */
  462. uint16_t APDURxPos; /*!< APDU Rx position */
  463. bool isAPDURxChaining; /*!< APDU Transceive chaining flag */
  464. } rfalIsoDep;
  465. /*
  466. ******************************************************************************
  467. * LOCAL VARIABLES
  468. ******************************************************************************
  469. */
  470. static rfalIsoDep gIsoDep; /*!< ISO-DEP Module instance */
  471. /*
  472. ******************************************************************************
  473. * LOCAL FUNCTION PROTOTYPES
  474. ******************************************************************************
  475. */
  476. static void isoDepClearCounters(void);
  477. static ReturnCode
  478. isoDepTx(uint8_t pcb, const uint8_t* txBuf, uint8_t* infBuf, uint16_t infLen, uint32_t fwt);
  479. static ReturnCode isoDepHandleControlMsg(rfalIsoDepControlMsg controlMsg, uint8_t param);
  480. static void rfalIsoDepApdu2IBLockParam(
  481. rfalIsoDepApduTxRxParam apduParam,
  482. rfalIsoDepTxRxParam* iBlockParam,
  483. uint16_t txPos,
  484. uint16_t rxPos);
  485. #if RFAL_FEATURE_ISO_DEP_POLL
  486. static ReturnCode isoDepDataExchangePCD(uint16_t* outActRxLen, bool* outIsChaining);
  487. static void rfalIsoDepCalcBitRate(
  488. rfalBitRate maxAllowedBR,
  489. uint8_t piccBRCapability,
  490. rfalBitRate* dsi,
  491. rfalBitRate* dri);
  492. static uint32_t rfalIsoDepSFGI2SFGT(uint8_t sfgi);
  493. #if RFAL_FEATURE_NFCA
  494. static ReturnCode
  495. rfalIsoDepStartRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts* ats, uint8_t* atsLen);
  496. static ReturnCode rfalIsoDepGetRATSStatus(void);
  497. static ReturnCode
  498. rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes* ppsRes);
  499. static ReturnCode rfalIsoDepGetPPSSTatus(void);
  500. #endif /* RFAL_FEATURE_NFCA */
  501. #if RFAL_FEATURE_NFCB
  502. static ReturnCode rfalIsoDepStartATTRIB(
  503. const uint8_t* nfcid0,
  504. uint8_t PARAM1,
  505. rfalBitRate DSI,
  506. rfalBitRate DRI,
  507. rfalIsoDepFSxI FSDI,
  508. uint8_t PARAM3,
  509. uint8_t DID,
  510. const uint8_t* HLInfo,
  511. uint8_t HLInfoLen,
  512. uint32_t fwt,
  513. rfalIsoDepAttribRes* attribRes,
  514. uint8_t* attribResLen);
  515. static ReturnCode rfalIsoDepGetATTRIBStatus(void);
  516. #endif /* RFAL_FEATURE_NFCB */
  517. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  518. #if RFAL_FEATURE_ISO_DEP_LISTEN
  519. static ReturnCode isoDepDataExchangePICC(void);
  520. static ReturnCode isoDepReSendControlMsg(void);
  521. #endif
  522. /*
  523. ******************************************************************************
  524. * LOCAL FUNCTIONS
  525. ******************************************************************************
  526. */
  527. /*******************************************************************************/
  528. static void isoDepClearCounters(void) {
  529. gIsoDep.cntIRetrys = 0;
  530. gIsoDep.cntRRetrys = 0;
  531. gIsoDep.cntSDslRetrys = 0;
  532. gIsoDep.cntSWtxRetrys = 0;
  533. gIsoDep.cntSWtxNack = 0;
  534. }
  535. /*******************************************************************************/
  536. static ReturnCode
  537. isoDepTx(uint8_t pcb, const uint8_t* txBuf, uint8_t* infBuf, uint16_t infLen, uint32_t fwt) {
  538. uint8_t* txBlock;
  539. uint16_t txBufLen;
  540. uint8_t computedPcb;
  541. rfalTransceiveContext ctx;
  542. txBlock = infBuf; /* Point to beginning of the INF, and go backwards */
  543. gIsoDep.lastPCB = pcb; /* Store the last PCB sent */
  544. if(infLen > 0U) {
  545. if(((uint32_t)infBuf - (uint32_t)txBuf) <
  546. gIsoDep.hdrLen) /* Check that we can fit the header in the given space */
  547. {
  548. return ERR_NOMEM;
  549. }
  550. }
  551. /*******************************************************************************/
  552. /* Compute optional PCB bits */
  553. computedPcb = pcb;
  554. if((gIsoDep.did != RFAL_ISODEP_NO_DID) ||
  555. ((gIsoDep.did == RFAL_ISODEP_DID_00) && gIsoDep.lastDID00)) {
  556. computedPcb |= ISODEP_PCB_DID_BIT;
  557. }
  558. if(gIsoDep.nad != RFAL_ISODEP_NO_NAD) {
  559. computedPcb |= ISODEP_PCB_NAD_BIT;
  560. }
  561. if((gIsoDep.isTxChaining) && (isoDep_PCBisIBlock(computedPcb))) {
  562. computedPcb |= ISODEP_PCB_CHAINING_BIT;
  563. }
  564. /*******************************************************************************/
  565. /* Compute Payload on the given txBuf, start by the PCB | DID | NAD | before INF */
  566. if(gIsoDep.nad != RFAL_ISODEP_NO_NAD) {
  567. *(--txBlock) = gIsoDep.nad; /* NAD is optional */
  568. }
  569. if((gIsoDep.did != RFAL_ISODEP_NO_DID) ||
  570. ((gIsoDep.did == RFAL_ISODEP_DID_00) && gIsoDep.lastDID00)) {
  571. *(--txBlock) = gIsoDep.did; /* DID is optional */
  572. }
  573. *(--txBlock) = computedPcb; /* PCB always present */
  574. txBufLen =
  575. (infLen +
  576. (uint16_t)((uint32_t)infBuf - (uint32_t)txBlock)); /* Calculate overall buffer size */
  577. if(txBufLen > (gIsoDep.fsx -
  578. ISODEP_CRC_LEN)) /* Check if msg length violates the maximum frame size FSC */
  579. {
  580. return ERR_NOTSUPP;
  581. }
  582. rfalCreateByteFlagsTxRxContext(
  583. ctx,
  584. txBlock,
  585. txBufLen,
  586. gIsoDep.rxBuf,
  587. gIsoDep.rxBufLen,
  588. gIsoDep.rxLen,
  589. RFAL_TXRX_FLAGS_DEFAULT,
  590. ((gIsoDep.role == ISODEP_ROLE_PICC) ? RFAL_FWT_NONE : fwt));
  591. return rfalStartTransceive(&ctx);
  592. }
  593. /*******************************************************************************/
  594. static ReturnCode isoDepHandleControlMsg(rfalIsoDepControlMsg controlMsg, uint8_t param) {
  595. uint8_t pcb;
  596. uint8_t infLen;
  597. uint32_t fwtTemp;
  598. infLen = 0;
  599. fwtTemp = (gIsoDep.fwt + gIsoDep.dFwt);
  600. ST_MEMSET(gIsoDep.ctrlBuf, 0x00, ISODEP_CONTROLMSG_BUF_LEN);
  601. switch(controlMsg) {
  602. /*******************************************************************************/
  603. case ISODEP_R_ACK:
  604. if(gIsoDep.cntRRetrys++ > gIsoDep.maxRetriesR) {
  605. return ERR_TIMEOUT; /* NFC Forum mandates timeout or transmission error depending on previous errors */
  606. }
  607. pcb = isoDep_PCBRACK(gIsoDep.blockNumber);
  608. break;
  609. /*******************************************************************************/
  610. case ISODEP_R_NAK:
  611. if((gIsoDep.cntRRetrys++ > gIsoDep.maxRetriesR) || /* Max R Block retries reached */
  612. (gIsoDep.cntSWtxNack >=
  613. gIsoDep
  614. .maxRetriesSnWTX)) /* Max number PICC is allowed to respond with S(WTX) to R(NAK) */
  615. {
  616. return ERR_TIMEOUT;
  617. }
  618. pcb = isoDep_PCBRNAK(gIsoDep.blockNumber);
  619. break;
  620. /*******************************************************************************/
  621. case ISODEP_S_WTX:
  622. if((gIsoDep.cntSWtxRetrys++ > gIsoDep.maxRetriesSWTX) &&
  623. (gIsoDep.maxRetriesSWTX != RFAL_ISODEP_MAX_WTX_RETRYS_ULTD)) {
  624. return ERR_PROTO;
  625. }
  626. /* Check if WTXM is valid */
  627. if(!isoDep_isWTXMValid(param)) {
  628. return ERR_PROTO;
  629. }
  630. if(gIsoDep.role == ISODEP_ROLE_PCD) {
  631. /* Calculate temp Wait Time eXtension */
  632. fwtTemp = (gIsoDep.fwt * param);
  633. fwtTemp = MIN(RFAL_ISODEP_MAX_FWT, fwtTemp);
  634. fwtTemp += gIsoDep.dFwt;
  635. }
  636. pcb = ISODEP_PCB_SWTX;
  637. gIsoDep.ctrlBuf[RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN + infLen++] = param;
  638. break;
  639. /*******************************************************************************/
  640. case ISODEP_S_DSL:
  641. if(gIsoDep.cntSDslRetrys++ > gIsoDep.maxRetriesSDSL) {
  642. return ERR_TIMEOUT; /* NFC Forum mandates timeout or transmission error depending on previous errors */
  643. }
  644. if(gIsoDep.role == ISODEP_ROLE_PCD) {
  645. /* Digital 1.0 - 13.2.7.3 Poller must wait fwtDEACTIVATION */
  646. fwtTemp = ISODEP_FWT_DEACTIVATION;
  647. gIsoDep.state = ISODEP_ST_PCD_WAIT_DSL;
  648. }
  649. pcb = ISODEP_PCB_SDSL;
  650. break;
  651. /*******************************************************************************/
  652. default:
  653. return ERR_INTERNAL;
  654. }
  655. return isoDepTx(
  656. pcb,
  657. gIsoDep.ctrlBuf,
  658. &gIsoDep.ctrlBuf[RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN],
  659. infLen,
  660. fwtTemp);
  661. }
  662. #if RFAL_FEATURE_ISO_DEP_LISTEN
  663. /*******************************************************************************/
  664. static ReturnCode isoDepReSendControlMsg(void) {
  665. if(isoDep_PCBisRACK(gIsoDep.lastPCB)) {
  666. return isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM);
  667. }
  668. if(isoDep_PCBisRNAK(gIsoDep.lastPCB)) {
  669. return isoDepHandleControlMsg(ISODEP_R_NAK, RFAL_ISODEP_NO_PARAM);
  670. }
  671. if(isoDep_PCBisSDeselect(gIsoDep.lastPCB)) {
  672. return isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM);
  673. }
  674. if(isoDep_PCBisSWTX(gIsoDep.lastPCB)) {
  675. return isoDepHandleControlMsg(ISODEP_S_WTX, gIsoDep.lastWTXM);
  676. }
  677. return ERR_WRONG_STATE;
  678. }
  679. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  680. /*
  681. ******************************************************************************
  682. * GLOBAL FUNCTIONS
  683. ******************************************************************************
  684. */
  685. /*******************************************************************************/
  686. void rfalIsoDepInitialize(void) {
  687. gIsoDep.state = ISODEP_ST_IDLE;
  688. gIsoDep.role = ISODEP_ROLE_PCD;
  689. gIsoDep.did = RFAL_ISODEP_NO_DID;
  690. gIsoDep.nad = RFAL_ISODEP_NO_NAD;
  691. gIsoDep.blockNumber = 0;
  692. gIsoDep.isTxChaining = false;
  693. gIsoDep.isRxChaining = false;
  694. gIsoDep.lastDID00 = false;
  695. gIsoDep.lastPCB = ISODEP_PCB_INVALID;
  696. gIsoDep.fsx = (uint16_t)RFAL_ISODEP_FSX_16;
  697. gIsoDep.ourFsx = (uint16_t)RFAL_ISODEP_FSX_16;
  698. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  699. gIsoDep.rxLen = NULL;
  700. gIsoDep.rxBuf = NULL;
  701. gIsoDep.rxBufInfPos = 0U;
  702. gIsoDep.txBufInfPos = 0U;
  703. gIsoDep.isTxPending = false;
  704. gIsoDep.isWait4WTX = false;
  705. gIsoDep.compMode = RFAL_COMPLIANCE_MODE_NFC;
  706. gIsoDep.maxRetriesR = RFAL_ISODEP_MAX_R_RETRYS;
  707. gIsoDep.maxRetriesI = RFAL_ISODEP_MAX_I_RETRYS;
  708. gIsoDep.maxRetriesSDSL = RFAL_ISODEP_MAX_DSL_RETRYS;
  709. gIsoDep.maxRetriesSWTX = RFAL_ISODEP_MAX_WTX_RETRYS;
  710. gIsoDep.maxRetriesSnWTX = RFAL_ISODEP_MAX_WTX_NACK_RETRYS;
  711. gIsoDep.maxRetriesRATS = RFAL_ISODEP_RATS_RETRIES;
  712. gIsoDep.APDURxPos = 0;
  713. gIsoDep.APDUTxPos = 0;
  714. gIsoDep.APDUParam.rxLen = NULL;
  715. gIsoDep.APDUParam.rxBuf = NULL;
  716. gIsoDep.APDUParam.txBuf = NULL;
  717. isoDepClearCounters();
  718. /* Destroy any ongoing WTX timer */
  719. isoDepTimerDestroy(gIsoDep.WTXTimer);
  720. gIsoDep.WTXTimer = 0U;
  721. }
  722. /*******************************************************************************/
  723. void rfalIsoDepInitializeWithParams(
  724. rfalComplianceMode compMode,
  725. uint8_t maxRetriesR,
  726. uint8_t maxRetriesSnWTX,
  727. uint8_t maxRetriesSWTX,
  728. uint8_t maxRetriesSDSL,
  729. uint8_t maxRetriesI,
  730. uint8_t maxRetriesRATS) {
  731. rfalIsoDepInitialize();
  732. gIsoDep.compMode = compMode;
  733. gIsoDep.maxRetriesR = maxRetriesR;
  734. gIsoDep.maxRetriesSnWTX = maxRetriesSnWTX;
  735. gIsoDep.maxRetriesSWTX = maxRetriesSWTX;
  736. gIsoDep.maxRetriesSDSL = maxRetriesSDSL;
  737. gIsoDep.maxRetriesI = maxRetriesI;
  738. gIsoDep.maxRetriesRATS = maxRetriesRATS;
  739. }
  740. #if RFAL_FEATURE_ISO_DEP_POLL
  741. /*******************************************************************************/
  742. static ReturnCode isoDepDataExchangePCD(uint16_t* outActRxLen, bool* outIsChaining) {
  743. ReturnCode ret;
  744. uint8_t rxPCB;
  745. /* Check out parameters */
  746. if((outActRxLen == NULL) || (outIsChaining == NULL)) {
  747. return ERR_PARAM;
  748. }
  749. *outIsChaining = false;
  750. /* Calculate header required and check if the buffers InfPositions are suitable */
  751. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  752. if(gIsoDep.did != RFAL_ISODEP_NO_DID) {
  753. gIsoDep.hdrLen += RFAL_ISODEP_DID_LEN;
  754. }
  755. if(gIsoDep.nad != RFAL_ISODEP_NO_NAD) {
  756. gIsoDep.hdrLen += RFAL_ISODEP_NAD_LEN;
  757. }
  758. /* Check if there is enough space before the infPos to append ISO-DEP headers on rx and tx */
  759. if((gIsoDep.rxBufInfPos < gIsoDep.hdrLen) || (gIsoDep.txBufInfPos < gIsoDep.hdrLen)) {
  760. return ERR_PARAM;
  761. }
  762. /*******************************************************************************/
  763. switch(gIsoDep.state) {
  764. /*******************************************************************************/
  765. case ISODEP_ST_IDLE:
  766. return ERR_NONE;
  767. /*******************************************************************************/
  768. case ISODEP_ST_PCD_TX:
  769. ret = isoDepTx(
  770. isoDep_PCBIBlock(gIsoDep.blockNumber),
  771. gIsoDep.txBuf,
  772. &gIsoDep.txBuf[gIsoDep.txBufInfPos],
  773. gIsoDep.txBufLen,
  774. (gIsoDep.fwt + gIsoDep.dFwt));
  775. switch(ret) {
  776. case ERR_NONE:
  777. gIsoDep.state = ISODEP_ST_PCD_RX;
  778. break;
  779. default:
  780. return ret;
  781. }
  782. /* fall through */
  783. /*******************************************************************************/
  784. case ISODEP_ST_PCD_WAIT_DSL: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  785. case ISODEP_ST_PCD_RX:
  786. ret = rfalGetTransceiveStatus();
  787. switch(ret) {
  788. /* Data rcvd with error or timeout -> Send R-NAK */
  789. case ERR_TIMEOUT:
  790. case ERR_CRC:
  791. case ERR_PAR:
  792. case ERR_FRAMING: /* added to handle test cases scenario TC_POL_NFCB_T4AT_BI_82_x_y & TC_POL_NFCB_T4BT_BI_82_x_y */
  793. case ERR_INCOMPLETE_BYTE: /* added to handle test cases scenario TC_POL_NFCB_T4AT_BI_82_x_y & TC_POL_NFCB_T4BT_BI_82_x_y */
  794. if(gIsoDep
  795. .isRxChaining) { /* Rule 5 - In PICC chaining when a invalid/timeout occurs -> R-ACK */
  796. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  797. } else if(
  798. gIsoDep.state ==
  799. ISODEP_ST_PCD_WAIT_DSL) { /* Rule 8 - If s-Deselect response fails MAY retransmit */
  800. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM));
  801. } else { /* Rule 4 - When a invalid block or timeout occurs -> R-NACK */
  802. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_NAK, RFAL_ISODEP_NO_PARAM));
  803. }
  804. return ERR_BUSY;
  805. case ERR_NONE:
  806. break;
  807. case ERR_BUSY:
  808. return ERR_BUSY; /* Debug purposes */
  809. default:
  810. return ret;
  811. }
  812. /*******************************************************************************/
  813. /* No error, process incoming msg */
  814. /*******************************************************************************/
  815. (*outActRxLen) = rfalConvBitsToBytes(*outActRxLen);
  816. /* Check rcvd msg length, cannot be less then the expected header */
  817. if(((*outActRxLen) < gIsoDep.hdrLen) || ((*outActRxLen) >= gIsoDep.ourFsx)) {
  818. return ERR_PROTO;
  819. }
  820. /* Grab rcvd PCB */
  821. rxPCB = gIsoDep.rxBuf[ISODEP_PCB_POS];
  822. /* EMVCo doesn't allow usage of for CID or NAD EMVCo 2.6 TAble 10.2 */
  823. if((gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) &&
  824. (isoDep_PCBhasDID(rxPCB) || isoDep_PCBhasNAD(rxPCB))) {
  825. return ERR_PROTO;
  826. }
  827. /* If we are expecting DID, check if PCB signals its presence and if device ID match*/
  828. if((gIsoDep.did != RFAL_ISODEP_NO_DID) &&
  829. (!isoDep_PCBhasDID(rxPCB) || (gIsoDep.did != gIsoDep.rxBuf[ISODEP_DID_POS]))) {
  830. return ERR_PROTO;
  831. }
  832. /*******************************************************************************/
  833. /* Process S-Block */
  834. /*******************************************************************************/
  835. if(isoDep_PCBisSBlock(rxPCB)) {
  836. /* Check if is a Wait Time eXtension */
  837. if(isoDep_PCBisSWTX(rxPCB)) {
  838. /* Check if PICC has requested S(WTX) as response to R(NAK) EMVCo 3.0 10.3.5.5 / Digital 2.0 16.2.6.5 */
  839. if(isoDep_PCBisRNAK(gIsoDep.lastPCB)) {
  840. gIsoDep.cntSWtxNack++; /* Count S(WTX) upon R(NAK) */
  841. gIsoDep.cntRRetrys = 0; /* Reset R-Block counter has PICC has responded */
  842. } else {
  843. gIsoDep.cntSWtxNack = 0; /* Reset R(NACK)->S(WTX) counter */
  844. }
  845. /* Rule 3 - respond to S-block: get 1st INF byte S(STW): Power + WTXM */
  846. EXIT_ON_ERR(
  847. ret,
  848. isoDepHandleControlMsg(
  849. ISODEP_S_WTX, isoDep_GetWTXM(gIsoDep.rxBuf[gIsoDep.hdrLen])));
  850. return ERR_BUSY;
  851. }
  852. /* Check if is a deselect response */
  853. if(isoDep_PCBisSDeselect(rxPCB)) {
  854. if(gIsoDep.state == ISODEP_ST_PCD_WAIT_DSL) {
  855. rfalIsoDepInitialize(); /* Session finished reInit vars */
  856. return ERR_NONE;
  857. }
  858. /* Deselect response not expected */
  859. /* fall through to PROTO error */
  860. }
  861. /* Unexpected S-Block */
  862. return ERR_PROTO;
  863. }
  864. /*******************************************************************************/
  865. /* Process R-Block */
  866. /*******************************************************************************/
  867. else if(isoDep_PCBisRBlock(rxPCB)) {
  868. if(isoDep_PCBisRACK(rxPCB)) /* Check if is a R-ACK */
  869. {
  870. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) /* Expected block number */
  871. {
  872. /* Rule B - ACK with expected bn -> Increment block number */
  873. gIsoDep.blockNumber = isoDep_PCBNextBN(gIsoDep.blockNumber);
  874. /* R-ACK only allowed when PCD chaining */
  875. if(!gIsoDep.isTxChaining) {
  876. return ERR_PROTO;
  877. }
  878. /* Rule 7 - Chaining transaction done, continue chaining */
  879. isoDepClearCounters();
  880. return ERR_NONE; /* This block has been transmitted */
  881. } else {
  882. /* Rule 6 - R-ACK with wrong block number retransmit */
  883. /* Digital 2.0 16.2.5.4 - Retransmit maximum two times */
  884. /* EMVCo 3.0 10.3.4.3 - PCD may re-transmit the last I-Block or report error */
  885. if(gIsoDep.cntIRetrys++ < gIsoDep.maxRetriesI) {
  886. gIsoDep.cntRRetrys = 0; /* Clear R counter only */
  887. gIsoDep.state = ISODEP_ST_PCD_TX;
  888. return ERR_BUSY;
  889. }
  890. return ERR_TIMEOUT; /* NFC Forum mandates timeout or transmission error depending on previous errors */
  891. }
  892. } else /* Unexcpected R-Block */
  893. {
  894. return ERR_PROTO;
  895. }
  896. }
  897. /*******************************************************************************/
  898. /* Process I-Block */
  899. /*******************************************************************************/
  900. else if(isoDep_PCBisIBlock(rxPCB)) {
  901. /*******************************************************************************/
  902. /* is PICC performing chaining */
  903. if(isoDep_PCBisChaining(rxPCB)) {
  904. gIsoDep.isRxChaining = true;
  905. *outIsChaining = true;
  906. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) {
  907. /* Rule B - ACK with correct block number -> Increase Block number */
  908. isoDep_ToggleBN(gIsoDep.blockNumber);
  909. isoDepClearCounters(); /* Clear counters in case R counter is already at max */
  910. /* Rule 2 - Send ACK */
  911. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  912. /* Received I-Block with chaining, send current data to DH */
  913. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  914. *outActRxLen -= gIsoDep.hdrLen;
  915. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*outActRxLen > 0U)) {
  916. ST_MEMMOVE(
  917. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  918. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  919. *outActRxLen);
  920. }
  921. isoDepClearCounters();
  922. return ERR_AGAIN; /* Send Again signalling to run again, but some chaining data has arrived */
  923. } else {
  924. /* Rule 5 - PICC chaining invalid I-Block -> R-ACK */
  925. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  926. }
  927. return ERR_BUSY;
  928. }
  929. gIsoDep.isRxChaining = false; /* clear PICC chaining flag */
  930. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) {
  931. /* Rule B - I-Block with correct block number -> Increase Block number */
  932. isoDep_ToggleBN(gIsoDep.blockNumber);
  933. /* I-Block transaction done successfully */
  934. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  935. *outActRxLen -= gIsoDep.hdrLen;
  936. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*outActRxLen > 0U)) {
  937. ST_MEMMOVE(
  938. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  939. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  940. *outActRxLen);
  941. }
  942. gIsoDep.state = ISODEP_ST_IDLE;
  943. isoDepClearCounters();
  944. return ERR_NONE;
  945. } else {
  946. if((gIsoDep.compMode != RFAL_COMPLIANCE_MODE_ISO)) {
  947. /* Invalid Block (not chaining) -> Raise error Digital 1.1 15.2.6.4 EMVCo 2.6 10.3.5.4 */
  948. return ERR_PROTO;
  949. }
  950. /* Rule 4 - Invalid Block -> R-NAK */
  951. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_NAK, RFAL_ISODEP_NO_PARAM));
  952. return ERR_BUSY;
  953. }
  954. } else /* not S/R/I - Block */
  955. {
  956. return ERR_PROTO;
  957. }
  958. /* fall through */
  959. /*******************************************************************************/
  960. default: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  961. /* MISRA 16.4: no empty default (comment will suffice) */
  962. break;
  963. }
  964. return ERR_INTERNAL;
  965. }
  966. /*******************************************************************************/
  967. ReturnCode rfalIsoDepDeselect(void) {
  968. ReturnCode ret;
  969. uint32_t cntRerun;
  970. bool dummyB;
  971. /*******************************************************************************/
  972. /* Using local static vars and static config to cope with a Deselect after *
  973. * RATS\ATTRIB without any I-Block exchanged */
  974. gIsoDep.rxLen = &gIsoDep.ctrlRxLen;
  975. gIsoDep.rxBuf = gIsoDep.ctrlBuf;
  976. gIsoDep.rxBufLen = ISODEP_CONTROLMSG_BUF_LEN - (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN);
  977. gIsoDep.rxBufInfPos = (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN);
  978. gIsoDep.txBufInfPos = (RFAL_ISODEP_PCB_LEN + RFAL_ISODEP_DID_LEN);
  979. /*******************************************************************************/
  980. /* The Deselect process is being done blocking, Digital 1.0 - 13.2.7.1 MUST wait response and retry*/
  981. /* Set the maximum reruns while we will wait for a response */
  982. cntRerun = ISODEP_MAX_RERUNS;
  983. /* Send DSL request and run protocol until get a response, error or "timeout" */
  984. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM));
  985. do {
  986. ret = isoDepDataExchangePCD(gIsoDep.rxLen, &dummyB);
  987. rfalWorker();
  988. } while(((cntRerun--) != 0U) && (ret == ERR_BUSY));
  989. rfalIsoDepInitialize();
  990. return ((cntRerun == 0U) ? ERR_TIMEOUT : ret);
  991. }
  992. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  993. /*******************************************************************************/
  994. uint32_t rfalIsoDepFWI2FWT(uint8_t fwi) {
  995. uint32_t result;
  996. uint8_t tmpFWI;
  997. tmpFWI = fwi;
  998. /* RFU values -> take the default value
  999. * Digital 1.0 11.6.2.17 FWI[1,14]
  1000. * Digital 1.1 7.6.2.22 FWI[0,14]
  1001. * EMVCo 2.6 Table A.5 FWI[0,14] */
  1002. if(tmpFWI > ISODEP_FWI_MAX) {
  1003. tmpFWI = RFAL_ISODEP_FWI_DEFAULT;
  1004. }
  1005. /* FWT = (256 x 16/fC) x 2^FWI => 2^(FWI+12) Digital 1.1 13.8.1 & 7.9.1 */
  1006. result = ((uint32_t)1U << (tmpFWI + 12U));
  1007. result = MIN(RFAL_ISODEP_MAX_FWT, result); /* Maximum Frame Waiting Time must be fulfilled */
  1008. return result;
  1009. }
  1010. /*******************************************************************************/
  1011. uint16_t rfalIsoDepFSxI2FSx(uint8_t FSxI) {
  1012. uint16_t fsx;
  1013. uint8_t fsi;
  1014. /* Enforce maximum FSxI/FSx allowed - NFC Forum and EMVCo differ */
  1015. fsi =
  1016. ((gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ? MIN(FSxI, RFAL_ISODEP_FSDI_MAX_EMV) :
  1017. MIN(FSxI, RFAL_ISODEP_FSDI_MAX_NFC));
  1018. switch(fsi) {
  1019. case(uint8_t)RFAL_ISODEP_FSXI_16:
  1020. fsx = (uint16_t)RFAL_ISODEP_FSX_16;
  1021. break;
  1022. case(uint8_t)RFAL_ISODEP_FSXI_24:
  1023. fsx = (uint16_t)RFAL_ISODEP_FSX_24;
  1024. break;
  1025. case(uint8_t)RFAL_ISODEP_FSXI_32:
  1026. fsx = (uint16_t)RFAL_ISODEP_FSX_32;
  1027. break;
  1028. case(uint8_t)RFAL_ISODEP_FSXI_40:
  1029. fsx = (uint16_t)RFAL_ISODEP_FSX_40;
  1030. break;
  1031. case(uint8_t)RFAL_ISODEP_FSXI_48:
  1032. fsx = (uint16_t)RFAL_ISODEP_FSX_48;
  1033. break;
  1034. case(uint8_t)RFAL_ISODEP_FSXI_64:
  1035. fsx = (uint16_t)RFAL_ISODEP_FSX_64;
  1036. break;
  1037. case(uint8_t)RFAL_ISODEP_FSXI_96:
  1038. fsx = (uint16_t)RFAL_ISODEP_FSX_96;
  1039. break;
  1040. case(uint8_t)RFAL_ISODEP_FSXI_128:
  1041. fsx = (uint16_t)RFAL_ISODEP_FSX_128;
  1042. break;
  1043. case(uint8_t)RFAL_ISODEP_FSXI_256:
  1044. fsx = (uint16_t)RFAL_ISODEP_FSX_256;
  1045. break;
  1046. case(uint8_t)RFAL_ISODEP_FSXI_512:
  1047. fsx = (uint16_t)RFAL_ISODEP_FSX_512;
  1048. break;
  1049. case(uint8_t)RFAL_ISODEP_FSXI_1024:
  1050. fsx = (uint16_t)RFAL_ISODEP_FSX_1024;
  1051. break;
  1052. case(uint8_t)RFAL_ISODEP_FSXI_2048:
  1053. fsx = (uint16_t)RFAL_ISODEP_FSX_2048;
  1054. break;
  1055. case(uint8_t)RFAL_ISODEP_FSXI_4096:
  1056. fsx = (uint16_t)RFAL_ISODEP_FSX_4096;
  1057. break;
  1058. default:
  1059. fsx = (uint16_t)RFAL_ISODEP_FSX_256;
  1060. break;
  1061. }
  1062. return fsx;
  1063. }
  1064. #if RFAL_FEATURE_ISO_DEP_LISTEN
  1065. /*******************************************************************************/
  1066. bool rfalIsoDepIsRats(const uint8_t* buf, uint8_t bufLen) {
  1067. if(buf != NULL) {
  1068. if((RFAL_ISODEP_CMD_RATS == (uint8_t)*buf) && (sizeof(rfalIsoDepRats) == bufLen)) {
  1069. return true;
  1070. }
  1071. }
  1072. return false;
  1073. }
  1074. /*******************************************************************************/
  1075. bool rfalIsoDepIsAttrib(const uint8_t* buf, uint8_t bufLen) {
  1076. if(buf != NULL) {
  1077. if((RFAL_ISODEP_CMD_ATTRIB == (uint8_t)*buf) &&
  1078. (RFAL_ISODEP_ATTRIB_REQ_MIN_LEN <= bufLen) &&
  1079. ((RFAL_ISODEP_ATTRIB_REQ_MIN_LEN + RFAL_ISODEP_ATTRIB_HLINFO_LEN) >= bufLen)) {
  1080. return true;
  1081. }
  1082. }
  1083. return false;
  1084. }
  1085. /*******************************************************************************/
  1086. ReturnCode rfalIsoDepListenStartActivation(
  1087. rfalIsoDepAtsParam* atsParam,
  1088. const rfalIsoDepAttribResParam* attribResParam,
  1089. const uint8_t* buf,
  1090. uint16_t bufLen,
  1091. rfalIsoDepListenActvParam actParam) {
  1092. uint8_t* txBuf;
  1093. uint8_t bufIt;
  1094. const uint8_t* buffer = buf;
  1095. /*******************************************************************************/
  1096. bufIt = 0;
  1097. txBuf =
  1098. (uint8_t*)actParam
  1099. .rxBuf; /* Use the rxBuf as TxBuf as well, the struct enforces a size enough MAX( NFCA_ATS_MAX_LEN, NFCB_ATTRIB_RES_MAX_LEN ) */
  1100. gIsoDep.txBR = RFAL_BR_106;
  1101. gIsoDep.rxBR = RFAL_BR_106;
  1102. /* Check for a valid buffer pointer */
  1103. if(buffer == NULL) {
  1104. return ERR_PARAM;
  1105. }
  1106. /*******************************************************************************/
  1107. if(*buffer == RFAL_ISODEP_CMD_RATS) {
  1108. /* Check ATS parameters */
  1109. if(atsParam == NULL) {
  1110. return ERR_PARAM;
  1111. }
  1112. /* If requested copy RATS to device info */
  1113. if(actParam.isoDepDev != NULL) {
  1114. ST_MEMCPY(
  1115. (uint8_t*)&actParam.isoDepDev->activation.A.Poller.RATS,
  1116. buffer,
  1117. sizeof(rfalIsoDepRats)); /* Copy RATS' CMD + PARAM */
  1118. }
  1119. /*******************************************************************************/
  1120. /* Process RATS */
  1121. buffer++;
  1122. gIsoDep.fsx = rfalIsoDepFSxI2FSx(
  1123. (((*buffer) & RFAL_ISODEP_RATS_PARAM_FSDI_MASK) >> RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT));
  1124. gIsoDep.did = (*buffer & RFAL_ISODEP_DID_MASK);
  1125. /*******************************************************************************/
  1126. /* Digital 1.1 13.6.1.8 - DID as to between 0 and 14 */
  1127. if(gIsoDep.did > RFAL_ISODEP_DID_MAX) {
  1128. return ERR_PROTO;
  1129. }
  1130. /* Check if we are configured to support DID */
  1131. if((gIsoDep.did != RFAL_ISODEP_DID_00) && (!atsParam->didSupport)) {
  1132. return ERR_NOTSUPP;
  1133. }
  1134. /*******************************************************************************/
  1135. /* Check RFAL supported bit rates */
  1136. if((!(RFAL_SUPPORT_BR_CE_A_212) &&
  1137. (((atsParam->ta & RFAL_ISODEP_ATS_TA_DPL_212) != 0U) ||
  1138. ((atsParam->ta & RFAL_ISODEP_ATS_TA_DLP_212) != 0U))) ||
  1139. (!(RFAL_SUPPORT_BR_CE_A_424) &&
  1140. (((atsParam->ta & RFAL_ISODEP_ATS_TA_DPL_424) != 0U) ||
  1141. ((atsParam->ta & RFAL_ISODEP_ATS_TA_DLP_424) != 0U))) ||
  1142. (!(RFAL_SUPPORT_BR_CE_A_848) &&
  1143. (((atsParam->ta & RFAL_ISODEP_ATS_TA_DPL_848) != 0U) ||
  1144. ((atsParam->ta & RFAL_ISODEP_ATS_TA_DLP_848) != 0U)))) {
  1145. return ERR_NOTSUPP;
  1146. }
  1147. /* Enforce proper FWI configuration */
  1148. if(atsParam->fwi > ISODEP_FWI_LIS_MAX) {
  1149. atsParam->fwi = ISODEP_FWI_LIS_MAX;
  1150. }
  1151. gIsoDep.atsTA = atsParam->ta;
  1152. gIsoDep.fwt = rfalIsoDepFWI2FWT(atsParam->fwi);
  1153. gIsoDep.ourFsx = rfalIsoDepFSxI2FSx(atsParam->fsci);
  1154. /* Ensure proper/maximum Historical Bytes length */
  1155. atsParam->hbLen = MIN(RFAL_ISODEP_ATS_HB_MAX_LEN, atsParam->hbLen);
  1156. /*******************************************************************************/
  1157. /* Compute ATS */
  1158. txBuf[bufIt++] = (RFAL_ISODEP_ATS_HIST_OFFSET + atsParam->hbLen); /* TL */
  1159. txBuf[bufIt++] =
  1160. ((RFAL_ISODEP_ATS_T0_TA_PRESENCE_MASK | RFAL_ISODEP_ATS_T0_TB_PRESENCE_MASK |
  1161. RFAL_ISODEP_ATS_T0_TC_PRESENCE_MASK) |
  1162. atsParam->fsci); /* T0 */
  1163. txBuf[bufIt++] = atsParam->ta; /* TA */
  1164. txBuf[bufIt++] =
  1165. ((atsParam->fwi << RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT) |
  1166. (atsParam->sfgi & RFAL_ISODEP_RATS_PARAM_FSDI_MASK)); /* TB */
  1167. txBuf[bufIt++] = (uint8_t)((atsParam->didSupport) ? RFAL_ISODEP_ATS_TC_DID : 0U); /* TC */
  1168. if(atsParam->hbLen > 0U) /* MISRA 21.18 */
  1169. {
  1170. ST_MEMCPY(&txBuf[bufIt], atsParam->hb, atsParam->hbLen); /* T1-Tk */
  1171. bufIt += atsParam->hbLen;
  1172. }
  1173. gIsoDep.state = ISODEP_ST_PICC_ACT_ATS;
  1174. }
  1175. /*******************************************************************************/
  1176. else if(*buffer == RFAL_ISODEP_CMD_ATTRIB) {
  1177. /* Check ATTRIB parameters */
  1178. if(attribResParam == NULL) {
  1179. return ERR_PARAM;
  1180. }
  1181. /* REMARK: ATTRIB handling */
  1182. NO_WARNING(attribResParam);
  1183. NO_WARNING(bufLen);
  1184. return ERR_NOT_IMPLEMENTED;
  1185. } else {
  1186. return ERR_PARAM;
  1187. }
  1188. gIsoDep.actvParam = actParam;
  1189. /*******************************************************************************/
  1190. /* If requested copy to ISO-DEP device info */
  1191. if(actParam.isoDepDev != NULL) {
  1192. actParam.isoDepDev->info.DID = gIsoDep.did;
  1193. actParam.isoDepDev->info.FSx = gIsoDep.fsx;
  1194. actParam.isoDepDev->info.FWT = gIsoDep.fwt;
  1195. actParam.isoDepDev->info.dFWT = 0;
  1196. actParam.isoDepDev->info.DSI = gIsoDep.txBR;
  1197. actParam.isoDepDev->info.DRI = gIsoDep.rxBR;
  1198. }
  1199. return rfalTransceiveBlockingTx(
  1200. txBuf,
  1201. bufIt,
  1202. (uint8_t*)actParam.rxBuf,
  1203. sizeof(rfalIsoDepBufFormat),
  1204. actParam.rxLen,
  1205. RFAL_TXRX_FLAGS_DEFAULT,
  1206. RFAL_FWT_NONE);
  1207. }
  1208. /*******************************************************************************/
  1209. ReturnCode rfalIsoDepListenGetActivationStatus(void) {
  1210. ReturnCode err;
  1211. uint8_t* txBuf;
  1212. uint8_t bufIt;
  1213. rfalBitRate dsi;
  1214. rfalBitRate dri;
  1215. /* Check if Activation is running */
  1216. if(gIsoDep.state < ISODEP_ST_PICC_ACT_ATS) {
  1217. return ERR_WRONG_STATE;
  1218. }
  1219. /* Check if Activation has finished already */
  1220. if(gIsoDep.state >= ISODEP_ST_PICC_RX) {
  1221. return ERR_NONE;
  1222. }
  1223. /*******************************************************************************/
  1224. /* Check for incoming msg */
  1225. err = rfalGetTransceiveStatus();
  1226. switch(err) {
  1227. /*******************************************************************************/
  1228. case ERR_NONE:
  1229. break;
  1230. /*******************************************************************************/
  1231. case ERR_LINK_LOSS:
  1232. case ERR_BUSY:
  1233. return err;
  1234. /*******************************************************************************/
  1235. case ERR_CRC:
  1236. case ERR_PAR:
  1237. case ERR_FRAMING:
  1238. /* ISO14443 4 5.6.2.2 2 If ATS has been replied upon a invalid block, PICC disables the PPS responses */
  1239. if(gIsoDep.state == ISODEP_ST_PICC_ACT_ATS) {
  1240. gIsoDep.state = ISODEP_ST_PICC_RX;
  1241. break;
  1242. }
  1243. /* fall through */
  1244. /*******************************************************************************/
  1245. default: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  1246. /* ReEnable the receiver and wait for another frame */
  1247. isoDepReEnableRx(
  1248. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1249. sizeof(rfalIsoDepBufFormat),
  1250. gIsoDep.actvParam.rxLen);
  1251. return ERR_BUSY;
  1252. }
  1253. txBuf =
  1254. (uint8_t*)gIsoDep.actvParam
  1255. .rxBuf; /* Use the rxBuf as TxBuf as well, the struct enforces a size enough MAX(NFCA_PPS_RES_LEN, ISODEP_DSL_MAX_LEN) */
  1256. dri = RFAL_BR_KEEP; /* The RFAL_BR_KEEP is used to check if PPS with BR change was requested */
  1257. dsi = RFAL_BR_KEEP; /* MISRA 9.1 */
  1258. bufIt = 0;
  1259. /*******************************************************************************/
  1260. gIsoDep.role = ISODEP_ROLE_PICC;
  1261. /*******************************************************************************/
  1262. if(gIsoDep.state == ISODEP_ST_PICC_ACT_ATS) {
  1263. /* Check for a PPS ISO 14443-4 5.3 */
  1264. if((((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_STARTBYTE_POS] &
  1265. RFAL_ISODEP_PPS_MASK) == RFAL_ISODEP_PPS_SB) {
  1266. /* ISO 14443-4 5.3.1 Check if the we are the addressed DID/CID */
  1267. /* ISO 14443-4 5.3.2 Check for a valid PPS0 */
  1268. if(((((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_STARTBYTE_POS] &
  1269. RFAL_ISODEP_DID_MASK) != gIsoDep.did) ||
  1270. ((((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS0_POS] &
  1271. RFAL_ISODEP_PPS0_VALID_MASK) != RFAL_ISODEP_PPS0_PPS1_NOT_PRESENT)) {
  1272. /* Invalid DID on PPS request or Invalid PPS0, reEnable the receiver and wait another frame */
  1273. isoDepReEnableRx(
  1274. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1275. sizeof(rfalIsoDepBufFormat),
  1276. gIsoDep.actvParam.rxLen);
  1277. return ERR_BUSY;
  1278. }
  1279. /*******************************************************************************/
  1280. /* Check PPS1 presence */
  1281. if(((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS0_POS] ==
  1282. RFAL_ISODEP_PPS0_PPS1_PRESENT) {
  1283. uint8_t newdri = ((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS1_POS] &
  1284. RFAL_ISODEP_PPS1_DxI_MASK; /* MISRA 10.8 */
  1285. uint8_t newdsi = (((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_PPS1_POS] >>
  1286. RFAL_ISODEP_PPS1_DSI_SHIFT) &
  1287. RFAL_ISODEP_PPS1_DxI_MASK; /* MISRA 10.8 */
  1288. /* PRQA S 4342 2 # MISRA 10.5 - Layout of enum rfalBitRate and above masks guarantee no invalid enum values to be created */
  1289. dri = (rfalBitRate)(newdri);
  1290. dsi = (rfalBitRate)(newdsi);
  1291. if((!(RFAL_SUPPORT_BR_CE_A_106) &&
  1292. ((dsi == RFAL_BR_106) || (dri == RFAL_BR_106))) ||
  1293. (!(RFAL_SUPPORT_BR_CE_A_212) &&
  1294. ((dsi == RFAL_BR_212) || (dri == RFAL_BR_212))) ||
  1295. (!(RFAL_SUPPORT_BR_CE_A_424) &&
  1296. ((dsi == RFAL_BR_424) || (dri == RFAL_BR_424))) ||
  1297. (!(RFAL_SUPPORT_BR_CE_A_848) &&
  1298. ((dsi == RFAL_BR_848) || (dri == RFAL_BR_848)))) {
  1299. return ERR_PROTO;
  1300. }
  1301. }
  1302. /*******************************************************************************/
  1303. /* Compute and send PPS RES / Ack */
  1304. txBuf[bufIt++] = ((uint8_t*)gIsoDep.actvParam.rxBuf)[RFAL_ISODEP_PPS_STARTBYTE_POS];
  1305. rfalTransceiveBlockingTx(
  1306. txBuf,
  1307. bufIt,
  1308. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1309. sizeof(rfalIsoDepBufFormat),
  1310. gIsoDep.actvParam.rxLen,
  1311. RFAL_TXRX_FLAGS_DEFAULT,
  1312. RFAL_FWT_NONE);
  1313. /*******************************************************************************/
  1314. /* Exchange the bit rates if requested */
  1315. if(dri != RFAL_BR_KEEP) {
  1316. rfalSetBitRate(
  1317. dsi,
  1318. dri); /* PRQA S 2880 # MISRA 2.1 - Unreachable code due to configuration option being set/unset above (RFAL_SUPPORT_BR_CE_A_xxx) */
  1319. gIsoDep.txBR = dsi; /* DSI codes the divisor from PICC to PCD */
  1320. gIsoDep.rxBR = dri; /* DRI codes the divisor from PCD to PICC */
  1321. if(gIsoDep.actvParam.isoDepDev != NULL) {
  1322. gIsoDep.actvParam.isoDepDev->info.DSI = dsi;
  1323. gIsoDep.actvParam.isoDepDev->info.DRI = dri;
  1324. }
  1325. }
  1326. }
  1327. /* Check for a S-Deselect is done on Data Exchange Activity */
  1328. }
  1329. /*******************************************************************************/
  1330. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  1331. gIsoDep.hdrLen +=
  1332. RFAL_ISODEP_DID_LEN; /* Always assume DID to be aligned with Digital 1.1 15.1.2 and ISO14443 4 5.6.3 #454 */
  1333. gIsoDep.hdrLen += (uint8_t)((gIsoDep.nad != RFAL_ISODEP_NO_NAD) ? RFAL_ISODEP_NAD_LEN : 0U);
  1334. /*******************************************************************************/
  1335. /* Rule C - The PICC block number shall be initialized to 1 at activation */
  1336. gIsoDep.blockNumber = 1;
  1337. /* Activation done, keep the rcvd data in, reMap the activation buffer to the global to be retrieved by the DEP method */
  1338. gIsoDep.rxBuf = (uint8_t*)gIsoDep.actvParam.rxBuf;
  1339. gIsoDep.rxBufLen = sizeof(rfalIsoDepBufFormat);
  1340. gIsoDep.rxBufInfPos =
  1341. (uint8_t)((uint32_t)gIsoDep.actvParam.rxBuf->inf - (uint32_t)gIsoDep.actvParam.rxBuf->prologue);
  1342. gIsoDep.rxLen = gIsoDep.actvParam.rxLen;
  1343. gIsoDep.rxChaining = gIsoDep.actvParam.isRxChaining;
  1344. gIsoDep.state = ISODEP_ST_PICC_RX;
  1345. return ERR_NONE;
  1346. }
  1347. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  1348. /*******************************************************************************/
  1349. uint16_t rfalIsoDepGetMaxInfLen(void) {
  1350. /* Check whether all parameters are valid, otherwise return minimum default value */
  1351. if((gIsoDep.fsx < (uint16_t)RFAL_ISODEP_FSX_16) ||
  1352. (gIsoDep.fsx > (uint16_t)RFAL_ISODEP_FSX_4096) || (gIsoDep.hdrLen > ISODEP_HDR_MAX_LEN)) {
  1353. uint16_t isodepFsx16 = (uint16_t)RFAL_ISODEP_FSX_16; /* MISRA 10.1 */
  1354. return (isodepFsx16 - RFAL_ISODEP_PCB_LEN - ISODEP_CRC_LEN);
  1355. }
  1356. return (gIsoDep.fsx - gIsoDep.hdrLen - ISODEP_CRC_LEN);
  1357. }
  1358. /*******************************************************************************/
  1359. ReturnCode rfalIsoDepStartTransceive(rfalIsoDepTxRxParam param) {
  1360. gIsoDep.txBuf = param.txBuf->prologue;
  1361. gIsoDep.txBufInfPos = (uint8_t)((uint32_t)param.txBuf->inf - (uint32_t)param.txBuf->prologue);
  1362. gIsoDep.txBufLen = param.txBufLen;
  1363. gIsoDep.isTxChaining = param.isTxChaining;
  1364. gIsoDep.rxBuf = param.rxBuf->prologue;
  1365. gIsoDep.rxBufInfPos = (uint8_t)((uint32_t)param.rxBuf->inf - (uint32_t)param.rxBuf->prologue);
  1366. gIsoDep.rxBufLen = sizeof(rfalIsoDepBufFormat);
  1367. gIsoDep.rxLen = param.rxLen;
  1368. gIsoDep.rxChaining = param.isRxChaining;
  1369. gIsoDep.fwt = param.FWT;
  1370. gIsoDep.dFwt = param.dFWT;
  1371. gIsoDep.fsx = param.FSx;
  1372. gIsoDep.did = param.DID;
  1373. /* Only change the FSx from activation if no to Keep */
  1374. gIsoDep.ourFsx = ((param.ourFSx != RFAL_ISODEP_FSX_KEEP) ? param.ourFSx : gIsoDep.ourFsx);
  1375. /* Clear inner control params for next dataExchange */
  1376. gIsoDep.isRxChaining = false;
  1377. isoDepClearCounters();
  1378. if(gIsoDep.role == ISODEP_ROLE_PICC) {
  1379. if(gIsoDep.txBufLen > 0U) {
  1380. /* Ensure that an RTOX Ack is not being expected at moment */
  1381. if(!gIsoDep.isWait4WTX) {
  1382. gIsoDep.state = ISODEP_ST_PICC_TX;
  1383. return ERR_NONE;
  1384. } else {
  1385. /* If RTOX Ack is expected, signal a pending Tx to be transmitted right after */
  1386. gIsoDep.isTxPending = true;
  1387. }
  1388. }
  1389. /* Digital 1.1 15.2.5.1 The first block SHALL be sent by the Reader/Writer */
  1390. gIsoDep.state = ISODEP_ST_PICC_RX;
  1391. return ERR_NONE;
  1392. }
  1393. gIsoDep.state = ISODEP_ST_PCD_TX;
  1394. return ERR_NONE;
  1395. }
  1396. /*******************************************************************************/
  1397. ReturnCode rfalIsoDepGetTransceiveStatus(void) {
  1398. if(gIsoDep.role == ISODEP_ROLE_PICC) {
  1399. #if RFAL_FEATURE_ISO_DEP_LISTEN
  1400. return isoDepDataExchangePICC();
  1401. #else
  1402. return ERR_NOTSUPP;
  1403. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  1404. } else {
  1405. #if RFAL_FEATURE_ISO_DEP_POLL
  1406. return isoDepDataExchangePCD(gIsoDep.rxLen, gIsoDep.rxChaining);
  1407. #else
  1408. return ERR_NOTSUPP;
  1409. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  1410. }
  1411. }
  1412. #if RFAL_FEATURE_ISO_DEP_LISTEN
  1413. /*******************************************************************************/
  1414. static ReturnCode isoDepDataExchangePICC(void) {
  1415. uint8_t rxPCB;
  1416. ReturnCode ret;
  1417. switch(gIsoDep.state) {
  1418. /*******************************************************************************/
  1419. case ISODEP_ST_IDLE:
  1420. return ERR_NONE;
  1421. /*******************************************************************************/
  1422. case ISODEP_ST_PICC_TX:
  1423. ret = isoDepTx(
  1424. isoDep_PCBIBlock(gIsoDep.blockNumber),
  1425. gIsoDep.txBuf,
  1426. &gIsoDep.txBuf[gIsoDep.txBufInfPos],
  1427. gIsoDep.txBufLen,
  1428. RFAL_FWT_NONE);
  1429. /* Clear pending Tx flag */
  1430. gIsoDep.isTxPending = false;
  1431. switch(ret) {
  1432. case ERR_NONE:
  1433. gIsoDep.state = ISODEP_ST_PICC_RX;
  1434. return ERR_BUSY;
  1435. default:
  1436. /* MISRA 16.4: no empty default statement (a comment being enough) */
  1437. break;
  1438. }
  1439. return ret;
  1440. /*******************************************************************************/
  1441. case ISODEP_ST_PICC_RX:
  1442. ret = rfalGetTransceiveStatus();
  1443. switch(ret) {
  1444. /*******************************************************************************/
  1445. /* Data rcvd with error or timeout -> mute */
  1446. case ERR_TIMEOUT:
  1447. case ERR_CRC:
  1448. case ERR_PAR:
  1449. case ERR_FRAMING:
  1450. /* Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  1451. isoDepReEnableRx((uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1452. return ERR_BUSY;
  1453. /*******************************************************************************/
  1454. case ERR_LINK_LOSS:
  1455. return ret; /* Debug purposes */
  1456. case ERR_BUSY:
  1457. return ret; /* Debug purposes */
  1458. /*******************************************************************************/
  1459. case ERR_NONE:
  1460. *gIsoDep.rxLen = rfalConvBitsToBytes(*gIsoDep.rxLen);
  1461. break;
  1462. /*******************************************************************************/
  1463. default:
  1464. return ret;
  1465. }
  1466. break;
  1467. /*******************************************************************************/
  1468. case ISODEP_ST_PICC_SWTX:
  1469. if(!isoDepTimerisExpired(gIsoDep.WTXTimer)) /* Do nothing until WTX timer has expired */
  1470. {
  1471. return ERR_BUSY;
  1472. }
  1473. /* Set waiting for WTX Ack Flag */
  1474. gIsoDep.isWait4WTX = true;
  1475. /* Digital 1.1 15.2.2.9 - Calculate the WTXM such that FWTtemp <= FWTmax */
  1476. gIsoDep.lastWTXM = (uint8_t)isoDep_WTXMListenerMax(gIsoDep.fwt);
  1477. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_WTX, gIsoDep.lastWTXM));
  1478. gIsoDep.state = ISODEP_ST_PICC_RX; /* Go back to Rx to process WTX ack */
  1479. return ERR_BUSY;
  1480. /*******************************************************************************/
  1481. case ISODEP_ST_PICC_SDSL:
  1482. if(rfalIsTransceiveInRx()) /* Wait until DSL response has been sent */
  1483. {
  1484. rfalIsoDepInitialize(); /* Session finished reInit vars */
  1485. return ERR_SLEEP_REQ; /* Notify Deselect request */
  1486. }
  1487. return ERR_BUSY;
  1488. /*******************************************************************************/
  1489. default:
  1490. return ERR_INTERNAL;
  1491. }
  1492. /* ISO 14443-4 7.5.6.2 CE SHALL NOT attempt error recovery -> clear counters */
  1493. isoDepClearCounters();
  1494. /*******************************************************************************/
  1495. /* No error, process incoming msg */
  1496. /*******************************************************************************/
  1497. /* Grab rcvd PCB */
  1498. rxPCB = gIsoDep.rxBuf[ISODEP_PCB_POS];
  1499. /*******************************************************************************/
  1500. /* When DID=0 PCD may or may not use DID, therefore check whether current PCD request
  1501. * has DID present to be reflected on max INF length #454 */
  1502. /* ReCalculate Header Length */
  1503. gIsoDep.hdrLen = RFAL_ISODEP_PCB_LEN;
  1504. gIsoDep.hdrLen += (uint8_t)((isoDep_PCBhasDID(rxPCB)) ? RFAL_ISODEP_DID_LEN : 0U);
  1505. gIsoDep.hdrLen += (uint8_t)((isoDep_PCBhasNAD(rxPCB)) ? RFAL_ISODEP_NAD_LEN : 0U);
  1506. /* Store whether last PCD block had DID. for PICC special handling of DID = 0 */
  1507. if(gIsoDep.did == RFAL_ISODEP_DID_00) {
  1508. gIsoDep.lastDID00 = ((isoDep_PCBhasDID(rxPCB)) ? true : false);
  1509. }
  1510. /*******************************************************************************/
  1511. /* Check rcvd msg length, cannot be less then the expected header OR *
  1512. * if the rcvd msg exceeds our announced frame size (FSD) */
  1513. if(((*gIsoDep.rxLen) < gIsoDep.hdrLen) ||
  1514. ((*gIsoDep.rxLen) > (gIsoDep.ourFsx - ISODEP_CRC_LEN))) {
  1515. isoDepReEnableRx(
  1516. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1517. sizeof(rfalIsoDepBufFormat),
  1518. gIsoDep.actvParam.rxLen);
  1519. return ERR_BUSY; /* ERR_PROTO Ignore this protocol request */
  1520. }
  1521. /* If we are expecting DID, check if PCB signals its presence and if device ID match OR
  1522. * If our DID=0 and DID is sent but with an incorrect value */
  1523. if(((gIsoDep.did != RFAL_ISODEP_DID_00) &&
  1524. (!isoDep_PCBhasDID(rxPCB) || (gIsoDep.did != gIsoDep.rxBuf[ISODEP_DID_POS]))) ||
  1525. ((gIsoDep.did == RFAL_ISODEP_DID_00) && isoDep_PCBhasDID(rxPCB) &&
  1526. (RFAL_ISODEP_DID_00 != gIsoDep.rxBuf[ISODEP_DID_POS]))) {
  1527. isoDepReEnableRx(
  1528. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1529. sizeof(rfalIsoDepBufFormat),
  1530. gIsoDep.actvParam.rxLen);
  1531. return ERR_BUSY; /* Ignore a wrong DID request */
  1532. }
  1533. /* If we aren't expecting NAD and it's received */
  1534. if((gIsoDep.nad == RFAL_ISODEP_NO_NAD) && isoDep_PCBhasNAD(rxPCB)) {
  1535. isoDepReEnableRx(
  1536. (uint8_t*)gIsoDep.actvParam.rxBuf,
  1537. sizeof(rfalIsoDepBufFormat),
  1538. gIsoDep.actvParam.rxLen);
  1539. return ERR_BUSY; /* Ignore a unexpected NAD request */
  1540. }
  1541. /*******************************************************************************/
  1542. /* Process S-Block */
  1543. /*******************************************************************************/
  1544. if(isoDep_PCBisSBlock(rxPCB)) {
  1545. /* Check if is a Wait Time eXtension */
  1546. if(isoDep_PCBisSWTX(rxPCB)) {
  1547. /* Check if we're expecting a S-WTX */
  1548. if(isoDep_PCBisWTX(gIsoDep.lastPCB)) {
  1549. /* Digital 1.1 15.2.2.11 S(WTX) Ack with different WTXM -> Protocol Error *
  1550. * Power level indication also should be set to 0 */
  1551. if((gIsoDep.rxBuf[gIsoDep.hdrLen] == gIsoDep.lastWTXM) &&
  1552. ((*gIsoDep.rxLen - gIsoDep.hdrLen) == ISODEP_SWTX_INF_LEN)) {
  1553. /* Clear waiting for RTOX Ack Flag */
  1554. gIsoDep.isWait4WTX = false;
  1555. /* Check if a Tx is already pending */
  1556. if(gIsoDep.isTxPending) {
  1557. /* Has a pending Tx, go immediately to TX */
  1558. gIsoDep.state = ISODEP_ST_PICC_TX;
  1559. return ERR_BUSY;
  1560. }
  1561. /* Set WTX timer */
  1562. isoDepTimerStart(
  1563. gIsoDep.WTXTimer,
  1564. isoDep_WTXAdjust((gIsoDep.lastWTXM * rfalConv1fcToMs(gIsoDep.fwt))));
  1565. gIsoDep.state = ISODEP_ST_PICC_SWTX;
  1566. return ERR_BUSY;
  1567. }
  1568. }
  1569. /* Unexpected/Incorrect S-WTX, fall into reRenable */
  1570. }
  1571. /* Check if is a Deselect request */
  1572. if(isoDep_PCBisSDeselect(rxPCB) &&
  1573. ((*gIsoDep.rxLen - gIsoDep.hdrLen) == ISODEP_SDSL_INF_LEN)) {
  1574. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_S_DSL, RFAL_ISODEP_NO_PARAM));
  1575. /* S-DSL transmission ongoing, wait until complete */
  1576. gIsoDep.state = ISODEP_ST_PICC_SDSL;
  1577. return ERR_BUSY;
  1578. }
  1579. /* Unexpected S-Block, fall into reRenable */
  1580. }
  1581. /*******************************************************************************/
  1582. /* Process R-Block */
  1583. /*******************************************************************************/
  1584. else if(isoDep_PCBisRBlock(rxPCB) && ((*gIsoDep.rxLen - gIsoDep.hdrLen) == ISODEP_RBLOCK_INF_LEN)) {
  1585. if(isoDep_PCBisRACK(rxPCB)) /* Check if is a R-ACK */
  1586. {
  1587. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) /* Check block number */
  1588. {
  1589. /* Rule 11 - R(ACK) with current bn -> re-transmit */
  1590. if(!isoDep_PCBisIBlock(gIsoDep.lastPCB)) {
  1591. isoDepReSendControlMsg();
  1592. } else {
  1593. gIsoDep.state = ISODEP_ST_PICC_TX;
  1594. }
  1595. return ERR_BUSY;
  1596. } else {
  1597. if(!gIsoDep.isTxChaining) {
  1598. /* Rule 13 violation R(ACK) without performing chaining */
  1599. isoDepReEnableRx(
  1600. (uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1601. return ERR_BUSY;
  1602. }
  1603. /* Rule E - R(ACK) with not current bn -> toogle bn */
  1604. isoDep_ToggleBN(gIsoDep.blockNumber);
  1605. /* This block has been transmitted and acknowledged, perform WTX until next data is provided */
  1606. /* Rule 9 - PICC is allowed to send an S(WTX) instead of an I-block or an R(ACK) */
  1607. isoDepTimerStart(gIsoDep.WTXTimer, isoDep_WTXAdjust(rfalConv1fcToMs(gIsoDep.fwt)));
  1608. gIsoDep.state = ISODEP_ST_PICC_SWTX;
  1609. /* Rule 13 - R(ACK) with not current bn -> continue chaining */
  1610. return ERR_NONE; /* This block has been transmitted */
  1611. }
  1612. } else if(isoDep_PCBisRNAK(rxPCB)) /* Check if is a R-NACK */
  1613. {
  1614. if(isoDep_GetBN(rxPCB) == gIsoDep.blockNumber) /* Check block number */
  1615. {
  1616. /* Rule 11 - R(NAK) with current bn -> re-transmit last x-Block */
  1617. if(!isoDep_PCBisIBlock(gIsoDep.lastPCB)) {
  1618. isoDepReSendControlMsg();
  1619. } else {
  1620. gIsoDep.state = ISODEP_ST_PICC_TX;
  1621. }
  1622. return ERR_BUSY;
  1623. } else {
  1624. /* Rule 12 - R(NAK) with not current bn -> R(ACK) */
  1625. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  1626. return ERR_BUSY;
  1627. }
  1628. } else {
  1629. /* MISRA 15.7 - Empty else */
  1630. }
  1631. /* Unexpected R-Block, fall into reRenable */
  1632. }
  1633. /*******************************************************************************/
  1634. /* Process I-Block */
  1635. /*******************************************************************************/
  1636. else if(isoDep_PCBisIBlock(rxPCB)) {
  1637. /* Rule D - When an I-block is received, the PICC shall toggle its block number before sending a block */
  1638. isoDep_ToggleBN(gIsoDep.blockNumber);
  1639. /*******************************************************************************/
  1640. /* Check if the block number is the one expected */
  1641. /* Check if PCD sent an I-Block instead ACK/NACK when we are chaining */
  1642. if((isoDep_GetBN(rxPCB) != gIsoDep.blockNumber) || (gIsoDep.isTxChaining)) {
  1643. /* Remain in the same Block Number */
  1644. isoDep_ToggleBN(gIsoDep.blockNumber);
  1645. /* ISO 14443-4 7.5.6.2 & Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  1646. isoDepReEnableRx((uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1647. return ERR_BUSY;
  1648. }
  1649. /*******************************************************************************/
  1650. /* is PCD performing chaining ? */
  1651. if(isoDep_PCBisChaining(rxPCB)) {
  1652. gIsoDep.isRxChaining = true;
  1653. *gIsoDep.rxChaining = true; /* Output Parameter*/
  1654. EXIT_ON_ERR(ret, isoDepHandleControlMsg(ISODEP_R_ACK, RFAL_ISODEP_NO_PARAM));
  1655. /* Received I-Block with chaining, send current data to DH */
  1656. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  1657. *gIsoDep.rxLen -= gIsoDep.hdrLen;
  1658. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*gIsoDep.rxLen > 0U)) {
  1659. ST_MEMMOVE(
  1660. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  1661. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  1662. *gIsoDep.rxLen);
  1663. }
  1664. return ERR_AGAIN; /* Send Again signalling to run again, but some chaining data has arrived*/
  1665. }
  1666. /*******************************************************************************/
  1667. /* PCD is not performing chaining */
  1668. gIsoDep.isRxChaining = false; /* clear PCD chaining flag */
  1669. *gIsoDep.rxChaining = false; /* Output Parameter */
  1670. /* remove ISO DEP header, check is necessary to move the INF data on the buffer */
  1671. *gIsoDep.rxLen -= gIsoDep.hdrLen;
  1672. if((gIsoDep.hdrLen != gIsoDep.rxBufInfPos) && (*gIsoDep.rxLen > 0U)) {
  1673. ST_MEMMOVE(
  1674. &gIsoDep.rxBuf[gIsoDep.rxBufInfPos],
  1675. &gIsoDep.rxBuf[gIsoDep.hdrLen],
  1676. *gIsoDep.rxLen);
  1677. }
  1678. /*******************************************************************************/
  1679. /* Reception done, send data back and start WTX timer */
  1680. isoDepTimerStart(gIsoDep.WTXTimer, isoDep_WTXAdjust(rfalConv1fcToMs(gIsoDep.fwt)));
  1681. gIsoDep.state = ISODEP_ST_PICC_SWTX;
  1682. return ERR_NONE;
  1683. } else {
  1684. /* MISRA 15.7 - Empty else */
  1685. }
  1686. /* Unexpected/Unknown Block */
  1687. /* ISO 14443-4 7.5.6.2 & Digital 1.1 - 15.2.6.2 The CE SHALL NOT attempt error recovery and remains in Rx mode upon Transmission or a Protocol Error */
  1688. isoDepReEnableRx((uint8_t*)gIsoDep.rxBuf, sizeof(rfalIsoDepBufFormat), gIsoDep.rxLen);
  1689. return ERR_BUSY;
  1690. }
  1691. #endif /* RFAL_FEATURE_ISO_DEP_LISTEN */
  1692. #if RFAL_FEATURE_ISO_DEP_POLL
  1693. #if RFAL_FEATURE_NFCA
  1694. /*******************************************************************************/
  1695. static ReturnCode
  1696. rfalIsoDepStartRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts* ats, uint8_t* atsLen) {
  1697. rfalTransceiveContext ctx;
  1698. if(ats == NULL) {
  1699. return ERR_PARAM;
  1700. }
  1701. gIsoDep.rxBuf = (uint8_t*)ats;
  1702. gIsoDep.rxLen8 = atsLen;
  1703. gIsoDep.did = DID;
  1704. /*******************************************************************************/
  1705. /* Compose RATS */
  1706. gIsoDep.actv.ratsReq.CMD = RFAL_ISODEP_CMD_RATS;
  1707. gIsoDep.actv.ratsReq.PARAM =
  1708. (((uint8_t)FSDI << RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT) & RFAL_ISODEP_RATS_PARAM_FSDI_MASK) |
  1709. (DID & RFAL_ISODEP_RATS_PARAM_DID_MASK);
  1710. rfalCreateByteFlagsTxRxContext(
  1711. ctx,
  1712. (uint8_t*)&gIsoDep.actv.ratsReq,
  1713. sizeof(rfalIsoDepRats),
  1714. (uint8_t*)ats,
  1715. sizeof(rfalIsoDepAts),
  1716. &gIsoDep.rxBufLen,
  1717. RFAL_TXRX_FLAGS_DEFAULT,
  1718. RFAL_ISODEP_T4T_FWT_ACTIVATION);
  1719. return rfalStartTransceive(&ctx);
  1720. }
  1721. /*******************************************************************************/
  1722. static ReturnCode rfalIsoDepGetRATSStatus(void) {
  1723. ReturnCode ret;
  1724. ret = rfalGetTransceiveStatus();
  1725. if(ret == ERR_NONE) {
  1726. gIsoDep.rxBufLen = rfalConvBitsToBytes(gIsoDep.rxBufLen);
  1727. /* Check for valid ATS length Digital 1.1 13.6.2.1 & 13.6.2.3 */
  1728. if((gIsoDep.rxBufLen < RFAL_ISODEP_ATS_MIN_LEN) ||
  1729. (gIsoDep.rxBufLen > RFAL_ISODEP_ATS_MAX_LEN) ||
  1730. (gIsoDep.rxBuf[RFAL_ISODEP_ATS_TL_POS] != gIsoDep.rxBufLen)) {
  1731. return ERR_PROTO;
  1732. }
  1733. /* Assign our FSx, in case the a Deselect is send without Transceive */
  1734. gIsoDep.ourFsx = rfalIsoDepFSxI2FSx(
  1735. (uint8_t)(gIsoDep.actv.ratsReq.PARAM >> RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT));
  1736. /* Check and assign if ATS length was requested (length also available on TL) */
  1737. if(gIsoDep.rxLen8 != NULL) {
  1738. *gIsoDep.rxLen8 = (uint8_t)gIsoDep.rxBufLen;
  1739. }
  1740. }
  1741. return ret;
  1742. }
  1743. /*******************************************************************************/
  1744. ReturnCode rfalIsoDepRATS(rfalIsoDepFSxI FSDI, uint8_t DID, rfalIsoDepAts* ats, uint8_t* atsLen) {
  1745. ReturnCode ret;
  1746. EXIT_ON_ERR(ret, rfalIsoDepStartRATS(FSDI, DID, ats, atsLen));
  1747. rfalIsoDepRunBlocking(ret, rfalIsoDepGetRATSStatus());
  1748. return ret;
  1749. }
  1750. /*******************************************************************************/
  1751. static ReturnCode
  1752. rfalIsoDepStartPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes* ppsRes) {
  1753. rfalTransceiveContext ctx;
  1754. if((ppsRes == NULL) || (DSI > RFAL_BR_848) || (DRI > RFAL_BR_848) ||
  1755. (DID > RFAL_ISODEP_DID_MAX)) {
  1756. return ERR_PARAM;
  1757. }
  1758. gIsoDep.rxBuf = (uint8_t*)ppsRes;
  1759. /*******************************************************************************/
  1760. /* Compose PPS Request */
  1761. gIsoDep.actv.ppsReq.PPSS = (RFAL_ISODEP_PPS_SB | (DID & RFAL_ISODEP_PPS_SB_DID_MASK));
  1762. gIsoDep.actv.ppsReq.PPS0 = RFAL_ISODEP_PPS_PPS0_PPS1_PRESENT;
  1763. gIsoDep.actv.ppsReq.PPS1 =
  1764. (RFAL_ISODEP_PPS_PPS1 |
  1765. ((((uint8_t)DSI << RFAL_ISODEP_PPS_PPS1_DSI_SHIFT) | (uint8_t)DRI) &
  1766. RFAL_ISODEP_PPS_PPS1_DXI_MASK));
  1767. rfalCreateByteFlagsTxRxContext(
  1768. ctx,
  1769. (uint8_t*)&gIsoDep.actv.ppsReq,
  1770. sizeof(rfalIsoDepPpsReq),
  1771. (uint8_t*)ppsRes,
  1772. sizeof(rfalIsoDepPpsRes),
  1773. &gIsoDep.rxBufLen,
  1774. RFAL_TXRX_FLAGS_DEFAULT,
  1775. RFAL_ISODEP_T4T_FWT_ACTIVATION);
  1776. return rfalStartTransceive(&ctx);
  1777. }
  1778. /*******************************************************************************/
  1779. static ReturnCode rfalIsoDepGetPPSSTatus(void) {
  1780. ReturnCode ret;
  1781. ret = rfalGetTransceiveStatus();
  1782. if(ret == ERR_NONE) {
  1783. gIsoDep.rxBufLen = rfalConvBitsToBytes(gIsoDep.rxBufLen);
  1784. /* Check for valid PPS Response */
  1785. if((gIsoDep.rxBufLen != RFAL_ISODEP_PPS_RES_LEN) ||
  1786. (*gIsoDep.rxBuf != gIsoDep.actv.ppsReq.PPSS)) {
  1787. return ERR_PROTO;
  1788. }
  1789. }
  1790. return ret;
  1791. }
  1792. /*******************************************************************************/
  1793. ReturnCode rfalIsoDepPPS(uint8_t DID, rfalBitRate DSI, rfalBitRate DRI, rfalIsoDepPpsRes* ppsRes) {
  1794. ReturnCode ret;
  1795. EXIT_ON_ERR(ret, rfalIsoDepStartPPS(DID, DSI, DRI, ppsRes));
  1796. rfalIsoDepRunBlocking(ret, rfalIsoDepGetPPSSTatus());
  1797. return ret;
  1798. }
  1799. #endif /* RFAL_FEATURE_NFCA */
  1800. #if RFAL_FEATURE_NFCB
  1801. static ReturnCode rfalIsoDepStartATTRIB(
  1802. const uint8_t* nfcid0,
  1803. uint8_t PARAM1,
  1804. rfalBitRate DSI,
  1805. rfalBitRate DRI,
  1806. rfalIsoDepFSxI FSDI,
  1807. uint8_t PARAM3,
  1808. uint8_t DID,
  1809. const uint8_t* HLInfo,
  1810. uint8_t HLInfoLen,
  1811. uint32_t fwt,
  1812. rfalIsoDepAttribRes* attribRes,
  1813. uint8_t* attribResLen) {
  1814. rfalTransceiveContext ctx;
  1815. if((attribRes == NULL) || (attribResLen == NULL) || (DSI > RFAL_BR_848) ||
  1816. (DRI > RFAL_BR_848) || (DID > RFAL_ISODEP_DID_MAX)) {
  1817. return ERR_NONE;
  1818. }
  1819. gIsoDep.rxBuf = (uint8_t*)attribRes;
  1820. gIsoDep.rxLen8 = attribResLen;
  1821. gIsoDep.did = DID;
  1822. /*******************************************************************************/
  1823. /* Compose ATTRIB command */
  1824. gIsoDep.actv.attribReq.cmd = RFAL_ISODEP_CMD_ATTRIB;
  1825. gIsoDep.actv.attribReq.Param.PARAM1 = PARAM1;
  1826. gIsoDep.actv.attribReq.Param.PARAM2 =
  1827. (((((uint8_t)DSI << RFAL_ISODEP_ATTRIB_PARAM2_DSI_SHIFT) |
  1828. ((uint8_t)DRI << RFAL_ISODEP_ATTRIB_PARAM2_DRI_SHIFT)) &
  1829. RFAL_ISODEP_ATTRIB_PARAM2_DXI_MASK) |
  1830. ((uint8_t)FSDI & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK));
  1831. gIsoDep.actv.attribReq.Param.PARAM3 = PARAM3;
  1832. gIsoDep.actv.attribReq.Param.PARAM4 = (DID & RFAL_ISODEP_ATTRIB_PARAM4_DID_MASK);
  1833. ST_MEMCPY(gIsoDep.actv.attribReq.nfcid0, nfcid0, RFAL_NFCB_NFCID0_LEN);
  1834. /* Append the Higher layer Info if provided */
  1835. if((HLInfo != NULL) && (HLInfoLen > 0U)) {
  1836. ST_MEMCPY(
  1837. gIsoDep.actv.attribReq.HLInfo, HLInfo, MIN(HLInfoLen, RFAL_ISODEP_ATTRIB_HLINFO_LEN));
  1838. }
  1839. rfalCreateByteFlagsTxRxContext(
  1840. ctx,
  1841. (uint8_t*)&gIsoDep.actv.attribReq,
  1842. (uint16_t)(RFAL_ISODEP_ATTRIB_HDR_LEN + MIN((uint16_t)HLInfoLen, RFAL_ISODEP_ATTRIB_HLINFO_LEN)),
  1843. (uint8_t*)gIsoDep.rxBuf,
  1844. sizeof(rfalIsoDepAttribRes),
  1845. &gIsoDep.rxBufLen,
  1846. RFAL_TXRX_FLAGS_DEFAULT,
  1847. fwt);
  1848. return rfalStartTransceive(&ctx);
  1849. }
  1850. /*******************************************************************************/
  1851. static ReturnCode rfalIsoDepGetATTRIBStatus(void) {
  1852. ReturnCode ret;
  1853. ret = rfalGetTransceiveStatus();
  1854. if(ret == ERR_NONE) {
  1855. gIsoDep.rxBufLen = rfalConvBitsToBytes(gIsoDep.rxBufLen);
  1856. /* Check a for valid ATTRIB Response Digital 1.1 15.6.2.1 */
  1857. if((gIsoDep.rxBufLen < RFAL_ISODEP_ATTRIB_RES_HDR_LEN) ||
  1858. ((gIsoDep.rxBuf[RFAL_ISODEP_ATTRIB_RES_MBLIDID_POS] &
  1859. RFAL_ISODEP_ATTRIB_RES_DID_MASK) != gIsoDep.did)) {
  1860. return ERR_PROTO;
  1861. }
  1862. if(gIsoDep.rxLen8 != NULL) {
  1863. *gIsoDep.rxLen8 = (uint8_t)gIsoDep.rxBufLen;
  1864. }
  1865. gIsoDep.ourFsx = rfalIsoDepFSxI2FSx(
  1866. (uint8_t)(gIsoDep.actv.attribReq.Param.PARAM2 & RFAL_ISODEP_ATTRIB_PARAM2_FSDI_MASK));
  1867. }
  1868. return ret;
  1869. }
  1870. /*******************************************************************************/
  1871. ReturnCode rfalIsoDepATTRIB(
  1872. const uint8_t* nfcid0,
  1873. uint8_t PARAM1,
  1874. rfalBitRate DSI,
  1875. rfalBitRate DRI,
  1876. rfalIsoDepFSxI FSDI,
  1877. uint8_t PARAM3,
  1878. uint8_t DID,
  1879. const uint8_t* HLInfo,
  1880. uint8_t HLInfoLen,
  1881. uint32_t fwt,
  1882. rfalIsoDepAttribRes* attribRes,
  1883. uint8_t* attribResLen) {
  1884. ReturnCode ret;
  1885. EXIT_ON_ERR(
  1886. ret,
  1887. rfalIsoDepStartATTRIB(
  1888. nfcid0,
  1889. PARAM1,
  1890. DSI,
  1891. DRI,
  1892. FSDI,
  1893. PARAM3,
  1894. DID,
  1895. HLInfo,
  1896. HLInfoLen,
  1897. fwt,
  1898. attribRes,
  1899. attribResLen));
  1900. rfalIsoDepRunBlocking(ret, rfalIsoDepGetATTRIBStatus());
  1901. return ret;
  1902. }
  1903. #endif /* RFAL_FEATURE_NFCB */
  1904. #if RFAL_FEATURE_NFCA
  1905. /*******************************************************************************/
  1906. ReturnCode rfalIsoDepPollAHandleActivation(
  1907. rfalIsoDepFSxI FSDI,
  1908. uint8_t DID,
  1909. rfalBitRate maxBR,
  1910. rfalIsoDepDevice* isoDepDev) {
  1911. ReturnCode ret;
  1912. EXIT_ON_ERR(ret, rfalIsoDepPollAStartActivation(FSDI, DID, maxBR, isoDepDev));
  1913. rfalIsoDepRunBlocking(ret, rfalIsoDepPollAGetActivationStatus());
  1914. return ret;
  1915. }
  1916. /*******************************************************************************/
  1917. ReturnCode rfalIsoDepPollAStartActivation(
  1918. rfalIsoDepFSxI FSDI,
  1919. uint8_t DID,
  1920. rfalBitRate maxBR,
  1921. rfalIsoDepDevice* isoDepDev) {
  1922. ReturnCode ret;
  1923. if(isoDepDev == NULL) {
  1924. return ERR_PARAM;
  1925. }
  1926. /* Enable EMD handling according Digital 1.1 4.1.1.1 ; EMVCo 2.6 4.9.2 */
  1927. rfalSetErrorHandling(RFAL_ERRORHANDLING_EMVCO);
  1928. /* Start RATS Transceive */
  1929. EXIT_ON_ERR(
  1930. ret,
  1931. rfalIsoDepStartRATS(
  1932. FSDI,
  1933. DID,
  1934. &isoDepDev->activation.A.Listener.ATS,
  1935. &isoDepDev->activation.A.Listener.ATSLen));
  1936. isoDepDev->info.DSI = maxBR;
  1937. gIsoDep.actvDev = isoDepDev;
  1938. gIsoDep.cntRRetrys = gIsoDep.maxRetriesRATS;
  1939. gIsoDep.state = ISODEP_ST_PCD_ACT_RATS;
  1940. return ret;
  1941. }
  1942. /*******************************************************************************/
  1943. ReturnCode rfalIsoDepPollAGetActivationStatus(void) {
  1944. ReturnCode ret;
  1945. uint8_t msgIt;
  1946. rfalBitRate maxBR;
  1947. switch(gIsoDep.state) {
  1948. /*******************************************************************************/
  1949. case ISODEP_ST_PCD_ACT_RATS:
  1950. ret = rfalIsoDepGetRATSStatus();
  1951. if(ret != ERR_BUSY) {
  1952. if(ret != ERR_NONE) {
  1953. /* EMVCo 2.6 9.6.1.1 & 9.6.1.2 If a timeout error is detected retransmit, on transmission error abort */
  1954. if((gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) && (ret != ERR_TIMEOUT)) {
  1955. break;
  1956. }
  1957. if(gIsoDep.cntRRetrys != 0U) {
  1958. /* Ensure FDT before retransmission (reuse RFAL GT timer) */
  1959. rfalSetGT(rfalGetFDTPoll());
  1960. rfalFieldOnAndStartGT();
  1961. /* Send RATS retransmission */ /* PRQA S 4342 1 # MISRA 10.5 - Layout of enum rfalIsoDepFSxI is guaranteed whithin 4bit range */
  1962. EXIT_ON_ERR(
  1963. ret,
  1964. rfalIsoDepStartRATS(
  1965. (rfalIsoDepFSxI)(uint8_t)(gIsoDep.actv.ratsReq.PARAM >> RFAL_ISODEP_RATS_PARAM_FSDI_SHIFT),
  1966. gIsoDep.did,
  1967. &gIsoDep.actvDev->activation.A.Listener.ATS,
  1968. &gIsoDep.actvDev->activation.A.Listener.ATSLen));
  1969. gIsoDep.cntRRetrys--;
  1970. ret = ERR_BUSY;
  1971. }
  1972. /* Switch between NFC Forum and ISO14443-4 behaviour #595
  1973. * ISO14443-4 5.6.1 If RATS fails, a Deactivation sequence should be performed as defined on clause 8
  1974. * Activity 1.1 9.6 Device Deactivation Activity is to be only performed when there's an active device */
  1975. else if(gIsoDep.compMode == RFAL_COMPLIANCE_MODE_ISO) {
  1976. rfalIsoDepDeselect();
  1977. } else {
  1978. /* MISRA 15.7 - Empty else */
  1979. }
  1980. } else /* ATS received */
  1981. {
  1982. maxBR = gIsoDep.actvDev->info.DSI; /* Retrieve requested max bitrate */
  1983. /*******************************************************************************/
  1984. /* Process ATS Response */
  1985. gIsoDep.actvDev->info.FWI =
  1986. RFAL_ISODEP_FWI_DEFAULT; /* Default value EMVCo 2.6 5.7.2.6 */
  1987. gIsoDep.actvDev->info.SFGI = 0U;
  1988. gIsoDep.actvDev->info.MBL = 0U;
  1989. gIsoDep.actvDev->info.DSI = RFAL_BR_106;
  1990. gIsoDep.actvDev->info.DRI = RFAL_BR_106;
  1991. gIsoDep.actvDev->info.FSxI = (uint8_t)
  1992. RFAL_ISODEP_FSXI_32; /* FSC default value is 32 bytes ISO14443-A 5.2.3 */
  1993. /*******************************************************************************/
  1994. /* Check for ATS optional fields */
  1995. if(gIsoDep.actvDev->activation.A.Listener.ATS.TL > RFAL_ISODEP_ATS_MIN_LEN) {
  1996. msgIt = RFAL_ISODEP_ATS_MIN_LEN;
  1997. /* Format byte T0 is optional, if present assign FSDI */
  1998. gIsoDep.actvDev->info.FSxI =
  1999. (gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2000. RFAL_ISODEP_ATS_T0_FSCI_MASK);
  2001. /* T0 has already been processed, always the same position */
  2002. msgIt++;
  2003. /* Check if TA is present */
  2004. if((gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2005. RFAL_ISODEP_ATS_T0_TA_PRESENCE_MASK) != 0U) {
  2006. rfalIsoDepCalcBitRate(
  2007. maxBR,
  2008. ((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++],
  2009. &gIsoDep.actvDev->info.DSI,
  2010. &gIsoDep.actvDev->info.DRI);
  2011. }
  2012. /* Check if TB is present */
  2013. if((gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2014. RFAL_ISODEP_ATS_T0_TB_PRESENCE_MASK) != 0U) {
  2015. gIsoDep.actvDev->info.SFGI =
  2016. ((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++];
  2017. gIsoDep.actvDev->info.FWI =
  2018. (uint8_t)((gIsoDep.actvDev->info.SFGI >> RFAL_ISODEP_ATS_TB_FWI_SHIFT) & RFAL_ISODEP_ATS_FWI_MASK);
  2019. gIsoDep.actvDev->info.SFGI &= RFAL_ISODEP_ATS_TB_SFGI_MASK;
  2020. }
  2021. /* Check if TC is present */
  2022. if((gIsoDep.actvDev->activation.A.Listener.ATS.T0 &
  2023. RFAL_ISODEP_ATS_T0_TC_PRESENCE_MASK) != 0U) {
  2024. /* Check for Protocol features support */
  2025. /* Advanced protocol features defined on Digital 1.0 Table 69, removed after */
  2026. gIsoDep.actvDev->info.supAdFt =
  2027. (((((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt] &
  2028. RFAL_ISODEP_ATS_TC_ADV_FEAT) != 0U) ?
  2029. true :
  2030. false);
  2031. gIsoDep.actvDev->info.supDID =
  2032. (((((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt] &
  2033. RFAL_ISODEP_ATS_TC_DID) != 0U) ?
  2034. true :
  2035. false);
  2036. gIsoDep.actvDev->info.supNAD =
  2037. (((((uint8_t*)&gIsoDep.actvDev->activation.A.Listener.ATS)[msgIt++] &
  2038. RFAL_ISODEP_ATS_TC_NAD) != 0U) ?
  2039. true :
  2040. false);
  2041. }
  2042. }
  2043. gIsoDep.actvDev->info.FSx = rfalIsoDepFSxI2FSx(gIsoDep.actvDev->info.FSxI);
  2044. gIsoDep.fsx = gIsoDep.actvDev->info.FSx;
  2045. gIsoDep.actvDev->info.SFGT =
  2046. rfalIsoDepSFGI2SFGT((uint8_t)gIsoDep.actvDev->info.SFGI);
  2047. /* Ensure SFGT before following frame (reuse RFAL GT timer) */
  2048. rfalSetGT(rfalConvMsTo1fc(gIsoDep.actvDev->info.SFGT));
  2049. rfalFieldOnAndStartGT();
  2050. gIsoDep.actvDev->info.FWT = rfalIsoDepFWI2FWT(gIsoDep.actvDev->info.FWI);
  2051. gIsoDep.actvDev->info.dFWT = RFAL_ISODEP_DFWT_20;
  2052. gIsoDep.actvDev->info.DID =
  2053. ((gIsoDep.actvDev->info.supDID) ? gIsoDep.did : RFAL_ISODEP_NO_DID);
  2054. gIsoDep.actvDev->info.NAD = RFAL_ISODEP_NO_NAD;
  2055. /*******************************************************************************/
  2056. /* If higher bit rates are supported by both devices, send PPS */
  2057. if((gIsoDep.actvDev->info.DSI != RFAL_BR_106) ||
  2058. (gIsoDep.actvDev->info.DRI != RFAL_BR_106)) {
  2059. /* Send PPS */ /* PRQA S 0310 1 # MISRA 11.3 - Intentional safe cast to avoiding buffer duplication */
  2060. EXIT_ON_ERR(
  2061. ret,
  2062. rfalIsoDepStartPPS(
  2063. gIsoDep.actvDev->info.DID,
  2064. gIsoDep.actvDev->info.DSI,
  2065. gIsoDep.actvDev->info.DRI,
  2066. (rfalIsoDepPpsRes*)&gIsoDep.ctrlBuf));
  2067. gIsoDep.state = ISODEP_ST_PCD_ACT_PPS;
  2068. return ERR_BUSY;
  2069. }
  2070. return ERR_NONE;
  2071. }
  2072. }
  2073. break;
  2074. /*******************************************************************************/
  2075. case ISODEP_ST_PCD_ACT_PPS:
  2076. ret = rfalIsoDepGetPPSSTatus();
  2077. if(ret != ERR_BUSY) {
  2078. /* Check whether PPS has been acknowledge */
  2079. if(ret == ERR_NONE) {
  2080. /* DSI code the divisor from PICC to PCD */
  2081. /* DRI code the divisor from PCD to PICC */
  2082. rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI);
  2083. } else {
  2084. /* If PPS has faled keep activation bit rate */
  2085. gIsoDep.actvDev->info.DSI = RFAL_BR_106;
  2086. gIsoDep.actvDev->info.DRI = RFAL_BR_106;
  2087. }
  2088. }
  2089. break;
  2090. /*******************************************************************************/
  2091. default:
  2092. ret = ERR_WRONG_STATE;
  2093. break;
  2094. }
  2095. return ret;
  2096. }
  2097. #endif /* RFAL_FEATURE_NFCA */
  2098. #if RFAL_FEATURE_NFCB
  2099. /*******************************************************************************/
  2100. ReturnCode rfalIsoDepPollBHandleActivation(
  2101. rfalIsoDepFSxI FSDI,
  2102. uint8_t DID,
  2103. rfalBitRate maxBR,
  2104. uint8_t PARAM1,
  2105. const rfalNfcbListenDevice* nfcbDev,
  2106. const uint8_t* HLInfo,
  2107. uint8_t HLInfoLen,
  2108. rfalIsoDepDevice* isoDepDev) {
  2109. ReturnCode ret;
  2110. EXIT_ON_ERR(
  2111. ret,
  2112. rfalIsoDepPollBStartActivation(
  2113. FSDI, DID, maxBR, PARAM1, nfcbDev, HLInfo, HLInfoLen, isoDepDev));
  2114. rfalIsoDepRunBlocking(ret, rfalIsoDepPollBGetActivationStatus());
  2115. return ret;
  2116. }
  2117. /*******************************************************************************/
  2118. ReturnCode rfalIsoDepPollBStartActivation(
  2119. rfalIsoDepFSxI FSDI,
  2120. uint8_t DID,
  2121. rfalBitRate maxBR,
  2122. uint8_t PARAM1,
  2123. const rfalNfcbListenDevice* nfcbDev,
  2124. const uint8_t* HLInfo,
  2125. uint8_t HLInfoLen,
  2126. rfalIsoDepDevice* isoDepDev) {
  2127. ReturnCode ret;
  2128. /***************************************************************************/
  2129. /* Initialize ISO-DEP Device with info from SENSB_RES */
  2130. isoDepDev->info.FWI =
  2131. ((nfcbDev->sensbRes.protInfo.FwiAdcFo >> RFAL_NFCB_SENSB_RES_FWI_SHIFT) &
  2132. RFAL_NFCB_SENSB_RES_FWI_MASK);
  2133. isoDepDev->info.FWT = rfalIsoDepFWI2FWT(isoDepDev->info.FWI);
  2134. isoDepDev->info.dFWT = RFAL_NFCB_DFWT;
  2135. isoDepDev->info.SFGI =
  2136. (((uint32_t)nfcbDev->sensbRes.protInfo.SFGI >> RFAL_NFCB_SENSB_RES_SFGI_SHIFT) &
  2137. RFAL_NFCB_SENSB_RES_SFGI_MASK);
  2138. isoDepDev->info.SFGT = rfalIsoDepSFGI2SFGT((uint8_t)isoDepDev->info.SFGI);
  2139. isoDepDev->info.FSxI =
  2140. ((nfcbDev->sensbRes.protInfo.FsciProType >> RFAL_NFCB_SENSB_RES_FSCI_SHIFT) &
  2141. RFAL_NFCB_SENSB_RES_FSCI_MASK);
  2142. isoDepDev->info.FSx = rfalIsoDepFSxI2FSx(isoDepDev->info.FSxI);
  2143. isoDepDev->info.DID = DID;
  2144. isoDepDev->info.supDID =
  2145. (((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_FO_DID_MASK) != 0U) ? true :
  2146. false);
  2147. isoDepDev->info.supNAD =
  2148. (((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_FO_NAD_MASK) != 0U) ? true :
  2149. false);
  2150. /* Check if DID requested is supported by PICC */
  2151. if((DID != RFAL_ISODEP_NO_DID) && (!isoDepDev->info.supDID)) {
  2152. return ERR_PARAM;
  2153. }
  2154. /* Enable EMD handling according Digital 2.1 4.1.1.1 ; EMVCo 3.0 4.9.2 */
  2155. rfalSetErrorHandling(RFAL_ERRORHANDLING_EMVCO);
  2156. /***************************************************************************/
  2157. /* Set FDT Poll to be used on upcoming communications */
  2158. if(gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) {
  2159. /* Disregard Minimum TR2 returned by PICC, always use FDTb MIN EMVCo 3.0 6.3.2.10 */
  2160. rfalSetFDTPoll(RFAL_FDT_POLL_NFCB_POLLER);
  2161. } else {
  2162. /* Apply minimum TR2 from SENSB_RES Digital 2.1 7.6.2.23 */
  2163. rfalSetFDTPoll(rfalNfcbTR2ToFDT(
  2164. ((nfcbDev->sensbRes.protInfo.FsciProType >> RFAL_NFCB_SENSB_RES_PROTO_TR2_SHIFT) &
  2165. RFAL_NFCB_SENSB_RES_PROTO_TR2_MASK)));
  2166. }
  2167. /* Calculate max Bit Rate */
  2168. rfalIsoDepCalcBitRate(
  2169. maxBR, nfcbDev->sensbRes.protInfo.BRC, &isoDepDev->info.DSI, &isoDepDev->info.DRI);
  2170. /***************************************************************************/
  2171. /* Send ATTRIB Command */
  2172. EXIT_ON_ERR(
  2173. ret,
  2174. rfalIsoDepStartATTRIB(
  2175. (const uint8_t*)&nfcbDev->sensbRes.nfcid0,
  2176. (((nfcbDev->sensbRes.protInfo.FwiAdcFo & RFAL_NFCB_SENSB_RES_ADC_ADV_FEATURE_MASK) !=
  2177. 0U) ?
  2178. PARAM1 :
  2179. RFAL_ISODEP_ATTRIB_REQ_PARAM1_DEFAULT),
  2180. isoDepDev->info.DSI,
  2181. isoDepDev->info.DRI,
  2182. FSDI,
  2183. (gIsoDep.compMode == RFAL_COMPLIANCE_MODE_EMV) ?
  2184. RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK :
  2185. (nfcbDev->sensbRes.protInfo.FsciProType &
  2186. ((RFAL_NFCB_SENSB_RES_PROTO_TR2_MASK << RFAL_NFCB_SENSB_RES_PROTO_TR2_SHIFT) |
  2187. RFAL_NFCB_SENSB_RES_PROTO_ISO_MASK)), /* EMVCo 2.6 6.4.1.9 */
  2188. DID,
  2189. HLInfo,
  2190. HLInfoLen,
  2191. (isoDepDev->info.FWT + isoDepDev->info.dFWT),
  2192. &isoDepDev->activation.B.Listener.ATTRIB_RES,
  2193. &isoDepDev->activation.B.Listener.ATTRIB_RESLen));
  2194. gIsoDep.actvDev = isoDepDev;
  2195. return ret;
  2196. }
  2197. /*******************************************************************************/
  2198. ReturnCode rfalIsoDepPollBGetActivationStatus(void) {
  2199. ReturnCode ret;
  2200. uint8_t mbli;
  2201. /***************************************************************************/
  2202. /* Process ATTRIB Response */
  2203. ret = rfalIsoDepGetATTRIBStatus();
  2204. if(ret != ERR_BUSY) {
  2205. if(ret == ERR_NONE) {
  2206. /* Digital 1.1 14.6.2.3 - Check if received DID match */
  2207. if((gIsoDep.actvDev->activation.B.Listener.ATTRIB_RES.mbliDid &
  2208. RFAL_ISODEP_ATTRIB_RES_DID_MASK) != gIsoDep.did) {
  2209. return ERR_PROTO;
  2210. }
  2211. /* Retrieve MBLI and calculate new FDS/MBL (Maximum Buffer Length) */
  2212. mbli =
  2213. ((gIsoDep.actvDev->activation.B.Listener.ATTRIB_RES.mbliDid >>
  2214. RFAL_ISODEP_ATTRIB_RES_MBLI_SHIFT) &
  2215. RFAL_ISODEP_ATTRIB_RES_MBLI_MASK);
  2216. if(mbli > 0U) {
  2217. /* Digital 1.1 14.6.2 Calculate Maximum Buffer Length MBL = FSC x 2^(MBLI-1) */
  2218. gIsoDep.actvDev->info.MBL =
  2219. (gIsoDep.actvDev->info.FSx * ((uint32_t)1U << (mbli - 1U)));
  2220. }
  2221. /* DSI code the divisor from PICC to PCD */
  2222. /* DRI code the divisor from PCD to PICC */
  2223. rfalSetBitRate(gIsoDep.actvDev->info.DRI, gIsoDep.actvDev->info.DSI);
  2224. /* REMARK: SoF EoF TR0 and TR1 are not passed on to RF layer */
  2225. /* Start the SFGT timer (reuse RFAL GT timer) */
  2226. rfalSetGT(rfalConvMsTo1fc(gIsoDep.actvDev->info.SFGT));
  2227. rfalFieldOnAndStartGT();
  2228. } else {
  2229. gIsoDep.actvDev->info.DSI = RFAL_BR_106;
  2230. gIsoDep.actvDev->info.DRI = RFAL_BR_106;
  2231. }
  2232. /*******************************************************************************/
  2233. /* Store already FS info, rfalIsoDepGetMaxInfLen() may be called before setting TxRx params */
  2234. gIsoDep.fsx = gIsoDep.actvDev->info.FSx;
  2235. }
  2236. return ret;
  2237. }
  2238. #endif /* RFAL_FEATURE_NFCB */
  2239. /*******************************************************************************/
  2240. ReturnCode rfalIsoDepPollHandleSParameters(
  2241. rfalIsoDepDevice* isoDepDev,
  2242. rfalBitRate maxTxBR,
  2243. rfalBitRate maxRxBR) {
  2244. uint8_t it;
  2245. uint8_t supPCD2PICC;
  2246. uint8_t supPICC2PCD;
  2247. uint8_t currenttxBR;
  2248. uint8_t currentrxBR;
  2249. rfalBitRate txBR;
  2250. rfalBitRate rxBR;
  2251. uint16_t rcvLen;
  2252. ReturnCode ret;
  2253. rfalIsoDepControlMsgSParam sParam;
  2254. if((isoDepDev == NULL) || (maxTxBR > RFAL_BR_13560) || (maxRxBR > RFAL_BR_13560)) {
  2255. return ERR_PARAM;
  2256. }
  2257. it = 0;
  2258. supPICC2PCD = 0x00;
  2259. supPCD2PICC = 0x00;
  2260. txBR = RFAL_BR_106;
  2261. rxBR = RFAL_BR_106;
  2262. sParam.pcb = ISODEP_PCB_SPARAMETERS;
  2263. /*******************************************************************************/
  2264. /* Send S(PARAMETERS) - Block Info */
  2265. sParam.sParam.tag = RFAL_ISODEP_SPARAM_TAG_BLOCKINFO;
  2266. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_BRREQ;
  2267. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_BRREQ_LEN;
  2268. sParam.sParam.length = it;
  2269. /* Send S(PARAMETERS). Use a fixed FWI of 4 ISO14443-4 2016 7.2 */
  2270. EXIT_ON_ERR(
  2271. ret,
  2272. rfalTransceiveBlockingTxRx(
  2273. (uint8_t*)&sParam,
  2274. (RFAL_ISODEP_SPARAM_HDR_LEN + (uint16_t)it),
  2275. (uint8_t*)&sParam,
  2276. sizeof(rfalIsoDepControlMsgSParam),
  2277. &rcvLen,
  2278. RFAL_TXRX_FLAGS_DEFAULT,
  2279. ISODEP_FWT_DEACTIVATION));
  2280. it = 0;
  2281. /*******************************************************************************/
  2282. /* Check S(PARAMETERS) response */
  2283. if((sParam.pcb != ISODEP_PCB_SPARAMETERS) ||
  2284. (sParam.sParam.tag != RFAL_ISODEP_SPARAM_TAG_BLOCKINFO) ||
  2285. (sParam.sParam.value[it] != RFAL_ISODEP_SPARAM_TAG_BRIND) ||
  2286. (rcvLen < RFAL_ISODEP_SPARAM_HDR_LEN) ||
  2287. (rcvLen != ((uint16_t)sParam.sParam.length + RFAL_ISODEP_SPARAM_HDR_LEN))) {
  2288. return ERR_PROTO;
  2289. }
  2290. /* Retrieve PICC's bit rate PICC capabilities */
  2291. for(it = 0; it < (rcvLen - (uint16_t)RFAL_ISODEP_SPARAM_TAG_LEN); it++) {
  2292. if((sParam.sParam.value[it] == RFAL_ISODEP_SPARAM_TAG_SUP_PCD2PICC) &&
  2293. (sParam.sParam.value[it + (uint16_t)RFAL_ISODEP_SPARAM_TAG_LEN] ==
  2294. RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN)) {
  2295. supPCD2PICC = sParam.sParam.value[it + RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN];
  2296. }
  2297. if((sParam.sParam.value[it] == RFAL_ISODEP_SPARAM_TAG_SUP_PICC2PCD) &&
  2298. (sParam.sParam.value[it + (uint16_t)RFAL_ISODEP_SPARAM_TAG_LEN] ==
  2299. RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN)) {
  2300. supPICC2PCD = sParam.sParam.value[it + RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN];
  2301. }
  2302. }
  2303. /*******************************************************************************/
  2304. /* Check if requested bit rates are supported by PICC */
  2305. if((supPICC2PCD == 0x00U) || (supPCD2PICC == 0x00U)) {
  2306. return ERR_PROTO;
  2307. }
  2308. for(it = 0; it <= (uint8_t)maxTxBR; it++) {
  2309. if((supPCD2PICC & (0x01U << it)) != 0U) {
  2310. txBR = (rfalBitRate)
  2311. it; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and above clamping of maxTxBR guarantee no invalid enum values to be created */
  2312. }
  2313. }
  2314. for(it = 0; it <= (uint8_t)maxRxBR; it++) {
  2315. if((supPICC2PCD & (0x01U << it)) != 0U) {
  2316. rxBR = (rfalBitRate)
  2317. it; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and above clamping of maxTxBR guarantee no invalid enum values to be created */
  2318. }
  2319. }
  2320. it = 0;
  2321. currenttxBR = (uint8_t)txBR;
  2322. currentrxBR = (uint8_t)rxBR;
  2323. /*******************************************************************************/
  2324. /* Send S(PARAMETERS) - Bit rates Activation */
  2325. sParam.sParam.tag = RFAL_ISODEP_SPARAM_TAG_BLOCKINFO;
  2326. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_BRACT;
  2327. sParam.sParam.value[it++] =
  2328. (RFAL_ISODEP_SPARAM_TVL_HDR_LEN + RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN +
  2329. RFAL_ISODEP_SPARAM_TVL_HDR_LEN + RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN);
  2330. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_SEL_PCD2PICC;
  2331. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_PCD2PICC_LEN;
  2332. sParam.sParam.value[it++] = ((uint8_t)0x01U << currenttxBR);
  2333. sParam.sParam.value[it++] = 0x00U;
  2334. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_SEL_PICC2PCD;
  2335. sParam.sParam.value[it++] = RFAL_ISODEP_SPARAM_TAG_PICC2PCD_LEN;
  2336. sParam.sParam.value[it++] = ((uint8_t)0x01U << currentrxBR);
  2337. sParam.sParam.value[it++] = 0x00U;
  2338. sParam.sParam.length = it;
  2339. EXIT_ON_ERR(
  2340. ret,
  2341. rfalTransceiveBlockingTxRx(
  2342. (uint8_t*)&sParam,
  2343. (RFAL_ISODEP_SPARAM_HDR_LEN + (uint16_t)it),
  2344. (uint8_t*)&sParam,
  2345. sizeof(rfalIsoDepControlMsgSParam),
  2346. &rcvLen,
  2347. RFAL_TXRX_FLAGS_DEFAULT,
  2348. (isoDepDev->info.FWT + isoDepDev->info.dFWT)));
  2349. it = 0;
  2350. /*******************************************************************************/
  2351. /* Check S(PARAMETERS) Acknowledge */
  2352. if((sParam.pcb != ISODEP_PCB_SPARAMETERS) ||
  2353. (sParam.sParam.tag != RFAL_ISODEP_SPARAM_TAG_BLOCKINFO) ||
  2354. (sParam.sParam.value[it] != RFAL_ISODEP_SPARAM_TAG_BRACK) ||
  2355. (rcvLen < RFAL_ISODEP_SPARAM_HDR_LEN)) {
  2356. return ERR_PROTO;
  2357. }
  2358. EXIT_ON_ERR(ret, rfalSetBitRate(txBR, rxBR));
  2359. isoDepDev->info.DRI = txBR;
  2360. isoDepDev->info.DSI = rxBR;
  2361. return ERR_NONE;
  2362. }
  2363. /*******************************************************************************/
  2364. static void rfalIsoDepCalcBitRate(
  2365. rfalBitRate maxAllowedBR,
  2366. uint8_t piccBRCapability,
  2367. rfalBitRate* dsi,
  2368. rfalBitRate* dri) {
  2369. uint8_t driMask;
  2370. uint8_t dsiMask;
  2371. int8_t i;
  2372. bool bitrateFound;
  2373. rfalBitRate curMaxBR;
  2374. curMaxBR = maxAllowedBR;
  2375. do {
  2376. bitrateFound = true;
  2377. (*dsi) = RFAL_BR_106;
  2378. (*dri) = RFAL_BR_106;
  2379. /* Digital 1.0 5.6.2.5 & 11.6.2.14: A received RFU value of b4 = 1b MUST be interpreted as if b7 to b1 ? 0000000b (only 106 kbits/s in both direction) */
  2380. if(((RFAL_ISODEP_BITRATE_RFU_MASK & piccBRCapability) != 0U) || (curMaxBR > RFAL_BR_848) ||
  2381. (curMaxBR == RFAL_BR_KEEP)) {
  2382. return;
  2383. }
  2384. /***************************************************************************/
  2385. /* Determine Listen->Poll bit rate */
  2386. dsiMask = (piccBRCapability & RFAL_ISODEP_BSI_MASK);
  2387. for(i = 2; i >= 0; i--) // Check supported bit rate from the highest
  2388. {
  2389. if(((dsiMask & (0x10U << (uint8_t)i)) != 0U) &&
  2390. (((uint8_t)i + 1U) <= (uint8_t)curMaxBR)) {
  2391. uint8_t newdsi = ((uint8_t)i) + 1U;
  2392. (*dsi) = (rfalBitRate)
  2393. newdsi; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and range of loop variable guarantee no invalid enum values to be created */
  2394. break;
  2395. }
  2396. }
  2397. /***************************************************************************/
  2398. /* Determine Poll->Listen bit rate */
  2399. driMask = (piccBRCapability & RFAL_ISODEP_BRI_MASK);
  2400. for(i = 2; i >= 0; i--) /* Check supported bit rate from the highest */
  2401. {
  2402. if(((driMask & (0x01U << (uint8_t)i)) != 0U) &&
  2403. (((uint8_t)i + 1U) <= (uint8_t)curMaxBR)) {
  2404. uint8_t newdri = ((uint8_t)i) + 1U;
  2405. (*dri) = (rfalBitRate)
  2406. newdri; /* PRQA S 4342 # MISRA 10.5 - Layout of enum rfalBitRate and range of loop variable guarantee no invalid enum values to be created */
  2407. break;
  2408. }
  2409. }
  2410. /***************************************************************************/
  2411. /* Check if different bit rate is supported */
  2412. /* Digital 1.0 Table 67: if b8=1b, then only the same bit rate divisor for both directions is supported */
  2413. if((piccBRCapability & RFAL_ISODEP_SAME_BITRATE_MASK) != 0U) {
  2414. (*dsi) = MIN((*dsi), (*dri));
  2415. (*dri) = (*dsi);
  2416. /* Check that the baudrate is supported */
  2417. if((RFAL_BR_106 != (*dsi)) &&
  2418. (!(((dsiMask & (0x10U << ((uint8_t)(*dsi) - 1U))) != 0U) &&
  2419. ((driMask & (0x01U << ((uint8_t)(*dri) - 1U))) != 0U)))) {
  2420. bitrateFound = false;
  2421. curMaxBR =
  2422. (*dsi); /* set allowed bitrate to be lowest and determine bit rate again */
  2423. }
  2424. }
  2425. } while(!(bitrateFound));
  2426. }
  2427. /*******************************************************************************/
  2428. static uint32_t rfalIsoDepSFGI2SFGT(uint8_t sfgi) {
  2429. uint32_t sfgt;
  2430. uint8_t tmpSFGI;
  2431. tmpSFGI = sfgi;
  2432. if(tmpSFGI > ISODEP_SFGI_MAX) {
  2433. tmpSFGI = ISODEP_SFGI_MIN;
  2434. }
  2435. if(tmpSFGI != ISODEP_SFGI_MIN) {
  2436. /* If sfgi != 0 wait SFGT + dSFGT Digital 1.1 13.8.2.1 */
  2437. sfgt = isoDepCalcSGFT(sfgi) + isoDepCalcdSGFT(sfgi);
  2438. }
  2439. /* Otherwise use FDTPoll min Digital 1.1 13.8.2.3*/
  2440. else {
  2441. sfgt = RFAL_FDT_POLL_NFCA_POLLER;
  2442. }
  2443. /* Convert carrier cycles to milli seconds */
  2444. return (rfalConv1fcToMs(sfgt) + 1U);
  2445. }
  2446. #endif /* RFAL_FEATURE_ISO_DEP_POLL */
  2447. /*******************************************************************************/
  2448. static void rfalIsoDepApdu2IBLockParam(
  2449. rfalIsoDepApduTxRxParam apduParam,
  2450. rfalIsoDepTxRxParam* iBlockParam,
  2451. uint16_t txPos,
  2452. uint16_t rxPos) {
  2453. NO_WARNING(rxPos); /* Keep this param for future use */
  2454. iBlockParam->DID = apduParam.DID;
  2455. iBlockParam->FSx = apduParam.FSx;
  2456. iBlockParam->ourFSx = apduParam.ourFSx;
  2457. iBlockParam->FWT = apduParam.FWT;
  2458. iBlockParam->dFWT = apduParam.dFWT;
  2459. if((apduParam.txBufLen - txPos) > rfalIsoDepGetMaxInfLen()) {
  2460. iBlockParam->isTxChaining = true;
  2461. iBlockParam->txBufLen = rfalIsoDepGetMaxInfLen();
  2462. } else {
  2463. iBlockParam->isTxChaining = false;
  2464. iBlockParam->txBufLen = (apduParam.txBufLen - txPos);
  2465. }
  2466. /* TxBuf is moved to the beginning for every I-Block */
  2467. iBlockParam->txBuf =
  2468. (rfalIsoDepBufFormat*)apduParam
  2469. .txBuf; /* PRQA S 0310 # MISRA 11.3 - Intentional safe cast to avoiding large buffer duplication */
  2470. iBlockParam->rxBuf =
  2471. apduParam
  2472. .tmpBuf; /* Simply using the apdu buffer is not possible because of current ACK handling */
  2473. iBlockParam->isRxChaining = &gIsoDep.isAPDURxChaining;
  2474. iBlockParam->rxLen = apduParam.rxLen;
  2475. }
  2476. /*******************************************************************************/
  2477. ReturnCode rfalIsoDepStartApduTransceive(rfalIsoDepApduTxRxParam param) {
  2478. rfalIsoDepTxRxParam txRxParam;
  2479. /* Initialize and store APDU context */
  2480. gIsoDep.APDUParam = param;
  2481. gIsoDep.APDUTxPos = 0;
  2482. gIsoDep.APDURxPos = 0;
  2483. /* Assign current FSx to calculate INF length (only change the FSx from activation if no to Keep) */
  2484. gIsoDep.ourFsx = ((param.ourFSx != RFAL_ISODEP_FSX_KEEP) ? param.ourFSx : gIsoDep.ourFsx);
  2485. gIsoDep.fsx = param.FSx;
  2486. /* Convert APDU TxRxParams to I-Block TxRxParams */
  2487. rfalIsoDepApdu2IBLockParam(
  2488. gIsoDep.APDUParam, &txRxParam, gIsoDep.APDUTxPos, gIsoDep.APDURxPos);
  2489. return rfalIsoDepStartTransceive(txRxParam);
  2490. }
  2491. /*******************************************************************************/
  2492. ReturnCode rfalIsoDepGetApduTransceiveStatus(void) {
  2493. ReturnCode ret;
  2494. rfalIsoDepTxRxParam txRxParam;
  2495. ret = rfalIsoDepGetTransceiveStatus();
  2496. switch(ret) {
  2497. /*******************************************************************************/
  2498. case ERR_NONE:
  2499. /* Check if we are still doing chaining on Tx */
  2500. if(gIsoDep.isTxChaining) {
  2501. /* Add already Tx bytes */
  2502. gIsoDep.APDUTxPos += gIsoDep.txBufLen;
  2503. /* Convert APDU TxRxParams to I-Block TxRxParams */
  2504. rfalIsoDepApdu2IBLockParam(
  2505. gIsoDep.APDUParam, &txRxParam, gIsoDep.APDUTxPos, gIsoDep.APDURxPos);
  2506. if(txRxParam.txBufLen > 0U) /* MISRA 21.18 */
  2507. {
  2508. /* Move next I-Block to beginning of APDU Tx buffer */
  2509. ST_MEMCPY(
  2510. gIsoDep.APDUParam.txBuf->apdu,
  2511. &gIsoDep.APDUParam.txBuf->apdu[gIsoDep.APDUTxPos],
  2512. txRxParam.txBufLen);
  2513. }
  2514. EXIT_ON_ERR(ret, rfalIsoDepStartTransceive(txRxParam));
  2515. return ERR_BUSY;
  2516. }
  2517. /* APDU TxRx is done */
  2518. /* fall through */
  2519. /*******************************************************************************/
  2520. case ERR_AGAIN: /* PRQA S 2003 # MISRA 16.3 - Intentional fall through */
  2521. /* Check if no APDU transceive has been started before (data from rfalIsoDepListenStartActivation) */
  2522. if(gIsoDep.APDUParam.rxLen == NULL) {
  2523. if(ret == ERR_AGAIN) {
  2524. /* In Listen mode first chained packet cannot be retrieved via APDU interface */
  2525. return ERR_NOTSUPP;
  2526. }
  2527. /* TxRx is complete and full data is already available */
  2528. return ERR_NONE;
  2529. }
  2530. if(*gIsoDep.APDUParam.rxLen > 0U) /* MISRA 21.18 */
  2531. {
  2532. /* Ensure that data in tmpBuf still fits into APDU buffer */
  2533. if((gIsoDep.APDURxPos + (*gIsoDep.APDUParam.rxLen)) >
  2534. (uint16_t)RFAL_FEATURE_ISO_DEP_APDU_MAX_LEN) {
  2535. return ERR_NOMEM;
  2536. }
  2537. /* Copy chained packet from tmp buffer to APDU buffer */
  2538. ST_MEMCPY(
  2539. &gIsoDep.APDUParam.rxBuf->apdu[gIsoDep.APDURxPos],
  2540. gIsoDep.APDUParam.tmpBuf->inf,
  2541. *gIsoDep.APDUParam.rxLen);
  2542. gIsoDep.APDURxPos += *gIsoDep.APDUParam.rxLen;
  2543. }
  2544. /* Update output param rxLen */
  2545. *gIsoDep.APDUParam.rxLen = gIsoDep.APDURxPos * 8;
  2546. /* Wait for following I-Block or APDU TxRx has finished */
  2547. return ((ret == ERR_AGAIN) ? ERR_BUSY : ERR_NONE);
  2548. /*******************************************************************************/
  2549. default:
  2550. /* MISRA 16.4: no empty default statement (a comment being enough) */
  2551. break;
  2552. }
  2553. return ret;
  2554. }
  2555. #endif /* RFAL_FEATURE_ISO_DEP */