emitinlinextensa.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352
  1. /*
  2. * This file is part of the MicroPython project, http://micropython.org/
  3. *
  4. * The MIT License (MIT)
  5. *
  6. * Copyright (c) 2013-2016 Damien P. George
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. * THE SOFTWARE.
  25. */
  26. #include <stdint.h>
  27. #include <stdio.h>
  28. #include <string.h>
  29. #include <stdarg.h>
  30. #include <assert.h>
  31. #include "py/emit.h"
  32. #include "py/asmxtensa.h"
  33. #if MICROPY_EMIT_INLINE_XTENSA
  34. struct _emit_inline_asm_t {
  35. asm_xtensa_t as;
  36. uint16_t pass;
  37. mp_obj_t *error_slot;
  38. mp_uint_t max_num_labels;
  39. qstr *label_lookup;
  40. };
  41. static void emit_inline_xtensa_error_msg(emit_inline_asm_t *emit, mp_rom_error_text_t msg) {
  42. *emit->error_slot = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg);
  43. }
  44. static void emit_inline_xtensa_error_exc(emit_inline_asm_t *emit, mp_obj_t exc) {
  45. *emit->error_slot = exc;
  46. }
  47. emit_inline_asm_t *emit_inline_xtensa_new(mp_uint_t max_num_labels) {
  48. emit_inline_asm_t *emit = m_new_obj(emit_inline_asm_t);
  49. memset(&emit->as, 0, sizeof(emit->as));
  50. mp_asm_base_init(&emit->as.base, max_num_labels);
  51. emit->max_num_labels = max_num_labels;
  52. emit->label_lookup = m_new(qstr, max_num_labels);
  53. return emit;
  54. }
  55. void emit_inline_xtensa_free(emit_inline_asm_t *emit) {
  56. m_del(qstr, emit->label_lookup, emit->max_num_labels);
  57. mp_asm_base_deinit(&emit->as.base, false);
  58. m_del_obj(emit_inline_asm_t, emit);
  59. }
  60. static void emit_inline_xtensa_start_pass(emit_inline_asm_t *emit, pass_kind_t pass, mp_obj_t *error_slot) {
  61. emit->pass = pass;
  62. emit->error_slot = error_slot;
  63. if (emit->pass == MP_PASS_CODE_SIZE) {
  64. memset(emit->label_lookup, 0, emit->max_num_labels * sizeof(qstr));
  65. }
  66. mp_asm_base_start_pass(&emit->as.base, pass == MP_PASS_EMIT ? MP_ASM_PASS_EMIT : MP_ASM_PASS_COMPUTE);
  67. asm_xtensa_entry(&emit->as, 0);
  68. }
  69. static void emit_inline_xtensa_end_pass(emit_inline_asm_t *emit, mp_uint_t type_sig) {
  70. asm_xtensa_exit(&emit->as);
  71. asm_xtensa_end_pass(&emit->as);
  72. }
  73. static mp_uint_t emit_inline_xtensa_count_params(emit_inline_asm_t *emit, mp_uint_t n_params, mp_parse_node_t *pn_params) {
  74. if (n_params > 4) {
  75. emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("can only have up to 4 parameters to Xtensa assembly"));
  76. return 0;
  77. }
  78. for (mp_uint_t i = 0; i < n_params; i++) {
  79. if (!MP_PARSE_NODE_IS_ID(pn_params[i])) {
  80. emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("parameters must be registers in sequence a2 to a5"));
  81. return 0;
  82. }
  83. const char *p = qstr_str(MP_PARSE_NODE_LEAF_ARG(pn_params[i]));
  84. if (!(strlen(p) == 2 && p[0] == 'a' && (mp_uint_t)p[1] == '2' + i)) {
  85. emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("parameters must be registers in sequence a2 to a5"));
  86. return 0;
  87. }
  88. }
  89. return n_params;
  90. }
  91. static bool emit_inline_xtensa_label(emit_inline_asm_t *emit, mp_uint_t label_num, qstr label_id) {
  92. assert(label_num < emit->max_num_labels);
  93. if (emit->pass == MP_PASS_CODE_SIZE) {
  94. // check for duplicate label on first pass
  95. for (uint i = 0; i < emit->max_num_labels; i++) {
  96. if (emit->label_lookup[i] == label_id) {
  97. return false;
  98. }
  99. }
  100. }
  101. emit->label_lookup[label_num] = label_id;
  102. mp_asm_base_label_assign(&emit->as.base, label_num);
  103. return true;
  104. }
  105. typedef struct _reg_name_t { byte reg;
  106. byte name[3];
  107. } reg_name_t;
  108. static const reg_name_t reg_name_table[] = {
  109. {0, "a0\0"},
  110. {1, "a1\0"},
  111. {2, "a2\0"},
  112. {3, "a3\0"},
  113. {4, "a4\0"},
  114. {5, "a5\0"},
  115. {6, "a6\0"},
  116. {7, "a7\0"},
  117. {8, "a8\0"},
  118. {9, "a9\0"},
  119. {10, "a10"},
  120. {11, "a11"},
  121. {12, "a12"},
  122. {13, "a13"},
  123. {14, "a14"},
  124. {15, "a15"},
  125. };
  126. // return empty string in case of error, so we can attempt to parse the string
  127. // without a special check if it was in fact a string
  128. static const char *get_arg_str(mp_parse_node_t pn) {
  129. if (MP_PARSE_NODE_IS_ID(pn)) {
  130. qstr qst = MP_PARSE_NODE_LEAF_ARG(pn);
  131. return qstr_str(qst);
  132. } else {
  133. return "";
  134. }
  135. }
  136. static mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
  137. const char *reg_str = get_arg_str(pn);
  138. for (mp_uint_t i = 0; i < MP_ARRAY_SIZE(reg_name_table); i++) {
  139. const reg_name_t *r = &reg_name_table[i];
  140. if (reg_str[0] == r->name[0]
  141. && reg_str[1] == r->name[1]
  142. && reg_str[2] == r->name[2]
  143. && (reg_str[2] == '\0' || reg_str[3] == '\0')) {
  144. return r->reg;
  145. }
  146. }
  147. emit_inline_xtensa_error_exc(emit,
  148. mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
  149. MP_ERROR_TEXT("'%s' expects a register"), op));
  150. return 0;
  151. }
  152. static uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, int min, int max) {
  153. mp_obj_t o;
  154. if (!mp_parse_node_get_int_maybe(pn, &o)) {
  155. emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects an integer"), op));
  156. return 0;
  157. }
  158. uint32_t i = mp_obj_get_int_truncated(o);
  159. if (min != max && ((int)i < min || (int)i > max)) {
  160. emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' integer %d isn't within range %d..%d"), op, i, min, max));
  161. return 0;
  162. }
  163. return i;
  164. }
  165. static int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
  166. if (!MP_PARSE_NODE_IS_ID(pn)) {
  167. emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects a label"), op));
  168. return 0;
  169. }
  170. qstr label_qstr = MP_PARSE_NODE_LEAF_ARG(pn);
  171. for (uint i = 0; i < emit->max_num_labels; i++) {
  172. if (emit->label_lookup[i] == label_qstr) {
  173. return i;
  174. }
  175. }
  176. // only need to have the labels on the last pass
  177. if (emit->pass == MP_PASS_EMIT) {
  178. emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("label '%q' not defined"), label_qstr));
  179. }
  180. return 0;
  181. }
  182. #define RRR (0)
  183. #define RRI8 (1)
  184. #define RRI8_B (2)
  185. typedef struct _opcode_table_3arg_t {
  186. uint16_t name; // actually a qstr, which should fit in 16 bits
  187. uint8_t type;
  188. uint8_t a0 : 4;
  189. uint8_t a1 : 4;
  190. } opcode_table_3arg_t;
  191. static const opcode_table_3arg_t opcode_table_3arg[] = {
  192. // arithmetic opcodes: reg, reg, reg
  193. {MP_QSTR_and_, RRR, 0, 1},
  194. {MP_QSTR_or_, RRR, 0, 2},
  195. {MP_QSTR_xor, RRR, 0, 3},
  196. {MP_QSTR_add, RRR, 0, 8},
  197. {MP_QSTR_sub, RRR, 0, 12},
  198. {MP_QSTR_mull, RRR, 2, 8},
  199. // load/store/addi opcodes: reg, reg, imm
  200. // upper nibble of type encodes the range of the immediate arg
  201. {MP_QSTR_l8ui, RRI8 | 0x10, 2, 0},
  202. {MP_QSTR_l16ui, RRI8 | 0x30, 2, 1},
  203. {MP_QSTR_l32i, RRI8 | 0x50, 2, 2},
  204. {MP_QSTR_s8i, RRI8 | 0x10, 2, 4},
  205. {MP_QSTR_s16i, RRI8 | 0x30, 2, 5},
  206. {MP_QSTR_s32i, RRI8 | 0x50, 2, 6},
  207. {MP_QSTR_l16si, RRI8 | 0x30, 2, 9},
  208. {MP_QSTR_addi, RRI8 | 0x00, 2, 12},
  209. // branch opcodes: reg, reg, label
  210. {MP_QSTR_ball, RRI8_B, ASM_XTENSA_CC_ALL, 0},
  211. {MP_QSTR_bany, RRI8_B, ASM_XTENSA_CC_ANY, 0},
  212. {MP_QSTR_bbc, RRI8_B, ASM_XTENSA_CC_BC, 0},
  213. {MP_QSTR_bbs, RRI8_B, ASM_XTENSA_CC_BS, 0},
  214. {MP_QSTR_beq, RRI8_B, ASM_XTENSA_CC_EQ, 0},
  215. {MP_QSTR_bge, RRI8_B, ASM_XTENSA_CC_GE, 0},
  216. {MP_QSTR_bgeu, RRI8_B, ASM_XTENSA_CC_GEU, 0},
  217. {MP_QSTR_blt, RRI8_B, ASM_XTENSA_CC_LT, 0},
  218. {MP_QSTR_bnall, RRI8_B, ASM_XTENSA_CC_NALL, 0},
  219. {MP_QSTR_bne, RRI8_B, ASM_XTENSA_CC_NE, 0},
  220. {MP_QSTR_bnone, RRI8_B, ASM_XTENSA_CC_NONE, 0},
  221. };
  222. static void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_args, mp_parse_node_t *pn_args) {
  223. size_t op_len;
  224. const char *op_str = (const char *)qstr_data(op, &op_len);
  225. if (n_args == 0) {
  226. if (op == MP_QSTR_ret_n) {
  227. asm_xtensa_op_ret_n(&emit->as);
  228. } else {
  229. goto unknown_op;
  230. }
  231. } else if (n_args == 1) {
  232. if (op == MP_QSTR_callx0) {
  233. uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
  234. asm_xtensa_op_callx0(&emit->as, r0);
  235. } else if (op == MP_QSTR_j) {
  236. int label = get_arg_label(emit, op_str, pn_args[0]);
  237. asm_xtensa_j_label(&emit->as, label);
  238. } else if (op == MP_QSTR_jx) {
  239. uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
  240. asm_xtensa_op_jx(&emit->as, r0);
  241. } else {
  242. goto unknown_op;
  243. }
  244. } else if (n_args == 2) {
  245. uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
  246. if (op == MP_QSTR_beqz) {
  247. int label = get_arg_label(emit, op_str, pn_args[1]);
  248. asm_xtensa_bccz_reg_label(&emit->as, ASM_XTENSA_CCZ_EQ, r0, label);
  249. } else if (op == MP_QSTR_bnez) {
  250. int label = get_arg_label(emit, op_str, pn_args[1]);
  251. asm_xtensa_bccz_reg_label(&emit->as, ASM_XTENSA_CCZ_NE, r0, label);
  252. } else if (op == MP_QSTR_mov || op == MP_QSTR_mov_n) {
  253. // we emit mov.n for both "mov" and "mov_n" opcodes
  254. uint r1 = get_arg_reg(emit, op_str, pn_args[1]);
  255. asm_xtensa_op_mov_n(&emit->as, r0, r1);
  256. } else if (op == MP_QSTR_movi) {
  257. // for convenience we emit l32r if the integer doesn't fit in movi
  258. uint32_t imm = get_arg_i(emit, op_str, pn_args[1], 0, 0);
  259. asm_xtensa_mov_reg_i32(&emit->as, r0, imm);
  260. } else {
  261. goto unknown_op;
  262. }
  263. } else if (n_args == 3) {
  264. // search table for 3 arg instructions
  265. for (uint i = 0; i < MP_ARRAY_SIZE(opcode_table_3arg); i++) {
  266. const opcode_table_3arg_t *o = &opcode_table_3arg[i];
  267. if (op == o->name) {
  268. uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
  269. uint r1 = get_arg_reg(emit, op_str, pn_args[1]);
  270. if (o->type == RRR) {
  271. uint r2 = get_arg_reg(emit, op_str, pn_args[2]);
  272. asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, o->a0, o->a1, r0, r1, r2));
  273. } else if (o->type == RRI8_B) {
  274. int label = get_arg_label(emit, op_str, pn_args[2]);
  275. asm_xtensa_bcc_reg_reg_label(&emit->as, o->a0, r0, r1, label);
  276. } else {
  277. int shift, min, max;
  278. if ((o->type & 0xf0) == 0) {
  279. shift = 0;
  280. min = -128;
  281. max = 127;
  282. } else {
  283. shift = (o->type & 0xf0) >> 5;
  284. min = 0;
  285. max = 0xff << shift;
  286. }
  287. uint32_t imm = get_arg_i(emit, op_str, pn_args[2], min, max);
  288. asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRI8(o->a0, o->a1, r1, r0, (imm >> shift) & 0xff));
  289. }
  290. return;
  291. }
  292. }
  293. goto unknown_op;
  294. } else {
  295. goto unknown_op;
  296. }
  297. return;
  298. unknown_op:
  299. emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("unsupported Xtensa instruction '%s' with %d arguments"), op_str, n_args));
  300. return;
  301. /*
  302. branch_not_in_range:
  303. emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("branch not in range"));
  304. return;
  305. */
  306. }
  307. const emit_inline_asm_method_table_t emit_inline_xtensa_method_table = {
  308. #if MICROPY_DYNAMIC_COMPILER
  309. emit_inline_xtensa_new,
  310. emit_inline_xtensa_free,
  311. #endif
  312. emit_inline_xtensa_start_pass,
  313. emit_inline_xtensa_end_pass,
  314. emit_inline_xtensa_count_params,
  315. emit_inline_xtensa_label,
  316. emit_inline_xtensa_op,
  317. };
  318. #endif // MICROPY_EMIT_INLINE_XTENSA