sd_spi_io.c 27 KB

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  1. #include "sd_spi_io.h"
  2. #include "sector_cache.h"
  3. #include <furi.h>
  4. #include <furi_hal.h>
  5. #include <furi/core/core_defines.h>
  6. // #define SD_SPI_DEBUG 1
  7. #define TAG "SdSpi"
  8. #ifdef SD_SPI_DEBUG
  9. #define sd_spi_debug(...) FURI_LOG_I(TAG, __VA_ARGS__)
  10. #else
  11. #define sd_spi_debug(...)
  12. #endif
  13. #define SD_CMD_LENGTH 6
  14. #define SD_DUMMY_BYTE 0xFF
  15. #define SD_ANSWER_RETRY_COUNT 8
  16. #define SD_IDLE_RETRY_COUNT 100
  17. #define FLAG_SET(x, y) (((x) & (y)) == (y))
  18. static bool sd_high_capacity = false;
  19. typedef enum {
  20. SdSpiDataResponceOK = 0x05,
  21. SdSpiDataResponceCRCError = 0x0B,
  22. SdSpiDataResponceWriteError = 0x0D,
  23. SdSpiDataResponceOtherError = 0xFF,
  24. } SdSpiDataResponce;
  25. typedef struct {
  26. uint8_t r1;
  27. uint8_t r2;
  28. uint8_t r3;
  29. uint8_t r4;
  30. uint8_t r5;
  31. } SdSpiCmdAnswer;
  32. typedef enum {
  33. SdSpiCmdAnswerTypeR1,
  34. SdSpiCmdAnswerTypeR1B,
  35. SdSpiCmdAnswerTypeR2,
  36. SdSpiCmdAnswerTypeR3,
  37. SdSpiCmdAnswerTypeR4R5,
  38. SdSpiCmdAnswerTypeR7,
  39. } SdSpiCmdAnswerType;
  40. /*
  41. SdSpiCmd and SdSpiToken use non-standard enum value names convention,
  42. because it is more convenient to look for documentation on a specific command.
  43. For example, to find out what the SD_CMD23_SET_BLOCK_COUNT command does, you need to look for
  44. SET_BLOCK_COUNT or CMD23 in the "Part 1 Physical Layer Simplified Specification".
  45. Do not use that naming convention in other places.
  46. */
  47. typedef enum {
  48. SD_CMD0_GO_IDLE_STATE = 0,
  49. SD_CMD1_SEND_OP_COND = 1,
  50. SD_CMD8_SEND_IF_COND = 8,
  51. SD_CMD9_SEND_CSD = 9,
  52. SD_CMD10_SEND_CID = 10,
  53. SD_CMD12_STOP_TRANSMISSION = 12,
  54. SD_CMD13_SEND_STATUS = 13,
  55. SD_CMD16_SET_BLOCKLEN = 16,
  56. SD_CMD17_READ_SINGLE_BLOCK = 17,
  57. SD_CMD18_READ_MULT_BLOCK = 18,
  58. SD_CMD23_SET_BLOCK_COUNT = 23,
  59. SD_CMD24_WRITE_SINGLE_BLOCK = 24,
  60. SD_CMD25_WRITE_MULT_BLOCK = 25,
  61. SD_CMD27_PROG_CSD = 27,
  62. SD_CMD28_SET_WRITE_PROT = 28,
  63. SD_CMD29_CLR_WRITE_PROT = 29,
  64. SD_CMD30_SEND_WRITE_PROT = 30,
  65. SD_CMD32_SD_ERASE_GRP_START = 32,
  66. SD_CMD33_SD_ERASE_GRP_END = 33,
  67. SD_CMD34_UNTAG_SECTOR = 34,
  68. SD_CMD35_ERASE_GRP_START = 35,
  69. SD_CMD36_ERASE_GRP_END = 36,
  70. SD_CMD37_UNTAG_ERASE_GROUP = 37,
  71. SD_CMD38_ERASE = 38,
  72. SD_CMD41_SD_APP_OP_COND = 41,
  73. SD_CMD55_APP_CMD = 55,
  74. SD_CMD58_READ_OCR = 58,
  75. } SdSpiCmd;
  76. /** Data tokens */
  77. typedef enum {
  78. SD_TOKEN_START_DATA_SINGLE_BLOCK_READ = 0xFE,
  79. SD_TOKEN_START_DATA_MULTIPLE_BLOCK_READ = 0xFE,
  80. SD_TOKEN_START_DATA_SINGLE_BLOCK_WRITE = 0xFE,
  81. SD_TOKEN_START_DATA_MULTIPLE_BLOCK_WRITE = 0xFC,
  82. SD_TOKEN_STOP_DATA_MULTIPLE_BLOCK_WRITE = 0xFD,
  83. } SdSpiToken;
  84. /** R1 answer value */
  85. typedef enum {
  86. SdSpi_R1_NO_ERROR = 0x00,
  87. SdSpi_R1_IN_IDLE_STATE = 0x01,
  88. SdSpi_R1_ERASE_RESET = 0x02,
  89. SdSpi_R1_ILLEGAL_COMMAND = 0x04,
  90. SdSpi_R1_COM_CRC_ERROR = 0x08,
  91. SdSpi_R1_ERASE_SEQUENCE_ERROR = 0x10,
  92. SdSpi_R1_ADDRESS_ERROR = 0x20,
  93. SdSpi_R1_PARAMETER_ERROR = 0x40,
  94. } SdSpiR1;
  95. /** R2 answer value */
  96. typedef enum {
  97. /* R2 answer value */
  98. SdSpi_R2_NO_ERROR = 0x00,
  99. SdSpi_R2_CARD_LOCKED = 0x01,
  100. SdSpi_R2_LOCKUNLOCK_ERROR = 0x02,
  101. SdSpi_R2_ERROR = 0x04,
  102. SdSpi_R2_CC_ERROR = 0x08,
  103. SdSpi_R2_CARD_ECC_FAILED = 0x10,
  104. SdSpi_R2_WP_VIOLATION = 0x20,
  105. SdSpi_R2_ERASE_PARAM = 0x40,
  106. SdSpi_R2_OUTOFRANGE = 0x80,
  107. } SdSpiR2;
  108. static inline void sd_spi_select_card() {
  109. furi_hal_gpio_write(furi_hal_sd_spi_handle->cs, false);
  110. furi_delay_us(10); // Entry guard time for some SD cards
  111. }
  112. static inline void sd_spi_deselect_card() {
  113. furi_delay_us(10); // Exit guard time for some SD cards
  114. furi_hal_gpio_write(furi_hal_sd_spi_handle->cs, true);
  115. }
  116. static void sd_spi_bus_to_ground() {
  117. furi_hal_gpio_init_ex(
  118. furi_hal_sd_spi_handle->miso,
  119. GpioModeOutputPushPull,
  120. GpioPullNo,
  121. GpioSpeedVeryHigh,
  122. GpioAltFnUnused);
  123. furi_hal_gpio_init_ex(
  124. furi_hal_sd_spi_handle->mosi,
  125. GpioModeOutputPushPull,
  126. GpioPullNo,
  127. GpioSpeedVeryHigh,
  128. GpioAltFnUnused);
  129. furi_hal_gpio_init_ex(
  130. furi_hal_sd_spi_handle->sck,
  131. GpioModeOutputPushPull,
  132. GpioPullNo,
  133. GpioSpeedVeryHigh,
  134. GpioAltFnUnused);
  135. sd_spi_select_card();
  136. furi_hal_gpio_write(furi_hal_sd_spi_handle->miso, false);
  137. furi_hal_gpio_write(furi_hal_sd_spi_handle->mosi, false);
  138. furi_hal_gpio_write(furi_hal_sd_spi_handle->sck, false);
  139. }
  140. static void sd_spi_bus_rise_up() {
  141. sd_spi_deselect_card();
  142. furi_hal_gpio_init_ex(
  143. furi_hal_sd_spi_handle->miso,
  144. GpioModeAltFunctionPushPull,
  145. GpioPullUp,
  146. GpioSpeedVeryHigh,
  147. GpioAltFn5SPI2);
  148. furi_hal_gpio_init_ex(
  149. furi_hal_sd_spi_handle->mosi,
  150. GpioModeAltFunctionPushPull,
  151. GpioPullUp,
  152. GpioSpeedVeryHigh,
  153. GpioAltFn5SPI2);
  154. furi_hal_gpio_init_ex(
  155. furi_hal_sd_spi_handle->sck,
  156. GpioModeAltFunctionPushPull,
  157. GpioPullUp,
  158. GpioSpeedVeryHigh,
  159. GpioAltFn5SPI2);
  160. }
  161. static inline uint8_t sd_spi_read_byte(void) {
  162. uint8_t responce;
  163. furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, NULL, &responce, 1, SD_TIMEOUT_MS));
  164. return responce;
  165. }
  166. static inline void sd_spi_write_byte(uint8_t data) {
  167. furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, &data, NULL, 1, SD_TIMEOUT_MS));
  168. }
  169. static inline uint8_t sd_spi_write_and_read_byte(uint8_t data) {
  170. uint8_t responce;
  171. furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, &data, &responce, 1, SD_TIMEOUT_MS));
  172. return responce;
  173. }
  174. static inline void sd_spi_write_bytes(uint8_t* data, uint32_t size) {
  175. furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, data, NULL, size, SD_TIMEOUT_MS));
  176. }
  177. static inline void sd_spi_read_bytes(uint8_t* data, uint32_t size) {
  178. furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, NULL, data, size, SD_TIMEOUT_MS));
  179. }
  180. static inline void sd_spi_write_bytes_dma(uint8_t* data, uint32_t size) {
  181. uint32_t timeout_mul = (size / 512) + 1;
  182. furi_check(furi_hal_spi_bus_trx_dma(
  183. furi_hal_sd_spi_handle, data, NULL, size, SD_TIMEOUT_MS * timeout_mul));
  184. }
  185. static inline void sd_spi_read_bytes_dma(uint8_t* data, uint32_t size) {
  186. uint32_t timeout_mul = (size / 512) + 1;
  187. furi_check(furi_hal_spi_bus_trx_dma(
  188. furi_hal_sd_spi_handle, NULL, data, size, SD_TIMEOUT_MS * timeout_mul));
  189. }
  190. static uint8_t sd_spi_wait_for_data_and_read(void) {
  191. uint8_t retry_count = SD_ANSWER_RETRY_COUNT;
  192. uint8_t responce;
  193. // Wait until we get a valid data
  194. do {
  195. responce = sd_spi_read_byte();
  196. retry_count--;
  197. } while((responce == SD_DUMMY_BYTE) && retry_count);
  198. return responce;
  199. }
  200. static SdSpiStatus sd_spi_wait_for_data(uint8_t data, uint32_t timeout_ms) {
  201. FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout_ms * 1000);
  202. uint8_t byte;
  203. do {
  204. byte = sd_spi_read_byte();
  205. if(furi_hal_cortex_timer_is_expired(timer)) {
  206. return SdSpiStatusTimeout;
  207. }
  208. } while((byte != data));
  209. return SdSpiStatusOK;
  210. }
  211. static inline void sd_spi_deselect_card_and_purge() {
  212. sd_spi_deselect_card();
  213. sd_spi_read_byte();
  214. }
  215. static inline void sd_spi_purge_crc() {
  216. sd_spi_read_byte();
  217. sd_spi_read_byte();
  218. }
  219. static SdSpiCmdAnswer
  220. sd_spi_send_cmd(SdSpiCmd cmd, uint32_t arg, uint8_t crc, SdSpiCmdAnswerType answer_type) {
  221. uint8_t frame[SD_CMD_LENGTH];
  222. SdSpiCmdAnswer cmd_answer = {
  223. .r1 = SD_DUMMY_BYTE,
  224. .r2 = SD_DUMMY_BYTE,
  225. .r3 = SD_DUMMY_BYTE,
  226. .r4 = SD_DUMMY_BYTE,
  227. .r5 = SD_DUMMY_BYTE,
  228. };
  229. // R1 Length = NCS(0)+ 6 Bytes command + NCR(min1 max8) + 1 Bytes answer + NEC(0) = 15bytes
  230. // R1b identical to R1 + Busy information
  231. // R2 Length = NCS(0)+ 6 Bytes command + NCR(min1 max8) + 2 Bytes answer + NEC(0) = 16bytes
  232. frame[0] = ((uint8_t)cmd | 0x40);
  233. frame[1] = (uint8_t)(arg >> 24);
  234. frame[2] = (uint8_t)(arg >> 16);
  235. frame[3] = (uint8_t)(arg >> 8);
  236. frame[4] = (uint8_t)(arg);
  237. frame[5] = (crc | 0x01);
  238. sd_spi_select_card();
  239. sd_spi_write_bytes(frame, sizeof(frame));
  240. switch(answer_type) {
  241. case SdSpiCmdAnswerTypeR1:
  242. cmd_answer.r1 = sd_spi_wait_for_data_and_read();
  243. break;
  244. case SdSpiCmdAnswerTypeR1B:
  245. // TODO: can be wrong, at least for SD_CMD12_STOP_TRANSMISSION you need to purge one byte before reading R1
  246. cmd_answer.r1 = sd_spi_wait_for_data_and_read();
  247. // In general this shenenigans seems suspicious, please double check SD specs if you are using SdSpiCmdAnswerTypeR1B
  248. // reassert card
  249. sd_spi_deselect_card();
  250. furi_delay_us(1000);
  251. sd_spi_deselect_card();
  252. // and wait for it to be ready
  253. while(sd_spi_read_byte() != 0xFF) {
  254. };
  255. break;
  256. case SdSpiCmdAnswerTypeR2:
  257. cmd_answer.r1 = sd_spi_wait_for_data_and_read();
  258. cmd_answer.r2 = sd_spi_read_byte();
  259. break;
  260. case SdSpiCmdAnswerTypeR3:
  261. case SdSpiCmdAnswerTypeR7:
  262. cmd_answer.r1 = sd_spi_wait_for_data_and_read();
  263. cmd_answer.r2 = sd_spi_read_byte();
  264. cmd_answer.r3 = sd_spi_read_byte();
  265. cmd_answer.r4 = sd_spi_read_byte();
  266. cmd_answer.r5 = sd_spi_read_byte();
  267. break;
  268. default:
  269. break;
  270. }
  271. return cmd_answer;
  272. }
  273. static SdSpiDataResponce sd_spi_get_data_response(uint32_t timeout_ms) {
  274. SdSpiDataResponce responce = sd_spi_read_byte();
  275. // read busy response byte
  276. sd_spi_read_byte();
  277. switch(responce & 0x1F) {
  278. case SdSpiDataResponceOK:
  279. // TODO: check timings
  280. sd_spi_deselect_card();
  281. sd_spi_select_card();
  282. // wait for 0xFF
  283. if(sd_spi_wait_for_data(0xFF, timeout_ms) == SdSpiStatusOK) {
  284. return SdSpiDataResponceOK;
  285. } else {
  286. return SdSpiDataResponceOtherError;
  287. }
  288. case SdSpiDataResponceCRCError:
  289. return SdSpiDataResponceCRCError;
  290. case SdSpiDataResponceWriteError:
  291. return SdSpiDataResponceWriteError;
  292. default:
  293. return SdSpiDataResponceOtherError;
  294. }
  295. }
  296. static SdSpiStatus sd_spi_init_spi_mode_v1(void) {
  297. SdSpiCmdAnswer response;
  298. uint8_t retry_count = 0;
  299. sd_spi_debug("Init SD card in SPI mode v1");
  300. do {
  301. retry_count++;
  302. // CMD55 (APP_CMD) before any ACMD command: R1 response (0x00: no errors)
  303. sd_spi_send_cmd(SD_CMD55_APP_CMD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  304. sd_spi_deselect_card_and_purge();
  305. // ACMD41 (SD_APP_OP_COND) to initialize SDHC or SDXC cards: R1 response (0x00: no errors)
  306. response = sd_spi_send_cmd(SD_CMD41_SD_APP_OP_COND, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  307. sd_spi_deselect_card_and_purge();
  308. if(retry_count >= SD_IDLE_RETRY_COUNT) {
  309. return SdSpiStatusError;
  310. }
  311. } while(response.r1 == SdSpi_R1_IN_IDLE_STATE);
  312. sd_spi_debug("Init SD card in SPI mode v1 done");
  313. return SdSpiStatusOK;
  314. }
  315. static SdSpiStatus sd_spi_init_spi_mode_v2(void) {
  316. SdSpiCmdAnswer response;
  317. uint8_t retry_count = 0;
  318. sd_spi_debug("Init SD card in SPI mode v2");
  319. do {
  320. retry_count++;
  321. // CMD55 (APP_CMD) before any ACMD command: R1 response (0x00: no errors)
  322. sd_spi_send_cmd(SD_CMD55_APP_CMD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  323. sd_spi_deselect_card_and_purge();
  324. // ACMD41 (APP_OP_COND) to initialize SDHC or SDXC cards: R1 response (0x00: no errors)
  325. response =
  326. sd_spi_send_cmd(SD_CMD41_SD_APP_OP_COND, 0x40000000, 0xFF, SdSpiCmdAnswerTypeR1);
  327. sd_spi_deselect_card_and_purge();
  328. if(retry_count >= SD_IDLE_RETRY_COUNT) {
  329. sd_spi_debug("ACMD41 failed");
  330. return SdSpiStatusError;
  331. }
  332. } while(response.r1 == SdSpi_R1_IN_IDLE_STATE);
  333. if(FLAG_SET(response.r1, SdSpi_R1_ILLEGAL_COMMAND)) {
  334. sd_spi_debug("ACMD41 is illegal command");
  335. retry_count = 0;
  336. do {
  337. retry_count++;
  338. // CMD55 (APP_CMD) before any ACMD command: R1 response (0x00: no errors)
  339. response = sd_spi_send_cmd(SD_CMD55_APP_CMD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  340. sd_spi_deselect_card_and_purge();
  341. if(response.r1 != SdSpi_R1_IN_IDLE_STATE) {
  342. sd_spi_debug("CMD55 failed");
  343. return SdSpiStatusError;
  344. }
  345. // ACMD41 (SD_APP_OP_COND) to initialize SDHC or SDXC cards: R1 response (0x00: no errors)
  346. response = sd_spi_send_cmd(SD_CMD41_SD_APP_OP_COND, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  347. sd_spi_deselect_card_and_purge();
  348. if(retry_count >= SD_IDLE_RETRY_COUNT) {
  349. sd_spi_debug("ACMD41 failed");
  350. return SdSpiStatusError;
  351. }
  352. } while(response.r1 == SdSpi_R1_IN_IDLE_STATE);
  353. }
  354. sd_spi_debug("Init SD card in SPI mode v2 done");
  355. return SdSpiStatusOK;
  356. }
  357. static SdSpiStatus sd_spi_init_spi_mode(void) {
  358. SdSpiCmdAnswer response;
  359. uint8_t retry_count;
  360. // CMD0 (GO_IDLE_STATE) to put SD in SPI mode and
  361. // wait for In Idle State Response (R1 Format) equal to 0x01
  362. retry_count = 0;
  363. do {
  364. retry_count++;
  365. response = sd_spi_send_cmd(SD_CMD0_GO_IDLE_STATE, 0, 0x95, SdSpiCmdAnswerTypeR1);
  366. sd_spi_deselect_card_and_purge();
  367. if(retry_count >= SD_IDLE_RETRY_COUNT) {
  368. sd_spi_debug("CMD0 failed");
  369. return SdSpiStatusError;
  370. }
  371. } while(response.r1 != SdSpi_R1_IN_IDLE_STATE);
  372. // CMD8 (SEND_IF_COND) to check the power supply status
  373. // and wait until response (R7 Format) equal to 0xAA and
  374. response = sd_spi_send_cmd(SD_CMD8_SEND_IF_COND, 0x1AA, 0x87, SdSpiCmdAnswerTypeR7);
  375. sd_spi_deselect_card_and_purge();
  376. if(FLAG_SET(response.r1, SdSpi_R1_ILLEGAL_COMMAND)) {
  377. if(sd_spi_init_spi_mode_v1() != SdSpiStatusOK) {
  378. sd_spi_debug("Init mode v1 failed");
  379. return SdSpiStatusError;
  380. }
  381. sd_high_capacity = 0;
  382. } else if(response.r1 == SdSpi_R1_IN_IDLE_STATE) {
  383. if(sd_spi_init_spi_mode_v2() != SdSpiStatusOK) {
  384. sd_spi_debug("Init mode v2 failed");
  385. return SdSpiStatusError;
  386. }
  387. // CMD58 (READ_OCR) to initialize SDHC or SDXC cards: R3 response
  388. response = sd_spi_send_cmd(SD_CMD58_READ_OCR, 0, 0xFF, SdSpiCmdAnswerTypeR3);
  389. sd_spi_deselect_card_and_purge();
  390. if(response.r1 != SdSpi_R1_NO_ERROR) {
  391. sd_spi_debug("CMD58 failed");
  392. return SdSpiStatusError;
  393. }
  394. sd_high_capacity = (response.r2 & 0x40) >> 6;
  395. } else {
  396. return SdSpiStatusError;
  397. }
  398. sd_spi_debug("SD card is %s", sd_high_capacity ? "SDHC or SDXC" : "SDSC");
  399. return SdSpiStatusOK;
  400. }
  401. static SdSpiStatus sd_spi_get_csd(SD_CSD* csd) {
  402. uint16_t counter = 0;
  403. uint8_t csd_data[16];
  404. SdSpiStatus ret = SdSpiStatusError;
  405. SdSpiCmdAnswer response;
  406. // CMD9 (SEND_CSD): R1 format (0x00 is no errors)
  407. response = sd_spi_send_cmd(SD_CMD9_SEND_CSD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  408. if(response.r1 == SdSpi_R1_NO_ERROR) {
  409. if(sd_spi_wait_for_data(SD_TOKEN_START_DATA_SINGLE_BLOCK_READ, SD_TIMEOUT_MS) ==
  410. SdSpiStatusOK) {
  411. // read CSD data
  412. for(counter = 0; counter < 16; counter++) {
  413. csd_data[counter] = sd_spi_read_byte();
  414. }
  415. sd_spi_purge_crc();
  416. /*************************************************************************
  417. CSD header decoding
  418. *************************************************************************/
  419. csd->CSDStruct = (csd_data[0] & 0xC0) >> 6;
  420. csd->Reserved1 = csd_data[0] & 0x3F;
  421. csd->TAAC = csd_data[1];
  422. csd->NSAC = csd_data[2];
  423. csd->MaxBusClkFrec = csd_data[3];
  424. csd->CardComdClasses = (csd_data[4] << 4) | ((csd_data[5] & 0xF0) >> 4);
  425. csd->RdBlockLen = csd_data[5] & 0x0F;
  426. csd->PartBlockRead = (csd_data[6] & 0x80) >> 7;
  427. csd->WrBlockMisalign = (csd_data[6] & 0x40) >> 6;
  428. csd->RdBlockMisalign = (csd_data[6] & 0x20) >> 5;
  429. csd->DSRImpl = (csd_data[6] & 0x10) >> 4;
  430. /*************************************************************************
  431. CSD v1/v2 decoding
  432. *************************************************************************/
  433. if(sd_high_capacity == 0) {
  434. csd->version.v1.Reserved1 = ((csd_data[6] & 0x0C) >> 2);
  435. csd->version.v1.DeviceSize = ((csd_data[6] & 0x03) << 10) | (csd_data[7] << 2) |
  436. ((csd_data[8] & 0xC0) >> 6);
  437. csd->version.v1.MaxRdCurrentVDDMin = (csd_data[8] & 0x38) >> 3;
  438. csd->version.v1.MaxRdCurrentVDDMax = (csd_data[8] & 0x07);
  439. csd->version.v1.MaxWrCurrentVDDMin = (csd_data[9] & 0xE0) >> 5;
  440. csd->version.v1.MaxWrCurrentVDDMax = (csd_data[9] & 0x1C) >> 2;
  441. csd->version.v1.DeviceSizeMul = ((csd_data[9] & 0x03) << 1) |
  442. ((csd_data[10] & 0x80) >> 7);
  443. } else {
  444. csd->version.v2.Reserved1 = ((csd_data[6] & 0x0F) << 2) |
  445. ((csd_data[7] & 0xC0) >> 6);
  446. csd->version.v2.DeviceSize = ((csd_data[7] & 0x3F) << 16) | (csd_data[8] << 8) |
  447. csd_data[9];
  448. csd->version.v2.Reserved2 = ((csd_data[10] & 0x80) >> 8);
  449. }
  450. csd->EraseSingleBlockEnable = (csd_data[10] & 0x40) >> 6;
  451. csd->EraseSectorSize = ((csd_data[10] & 0x3F) << 1) | ((csd_data[11] & 0x80) >> 7);
  452. csd->WrProtectGrSize = (csd_data[11] & 0x7F);
  453. csd->WrProtectGrEnable = (csd_data[12] & 0x80) >> 7;
  454. csd->Reserved2 = (csd_data[12] & 0x60) >> 5;
  455. csd->WrSpeedFact = (csd_data[12] & 0x1C) >> 2;
  456. csd->MaxWrBlockLen = ((csd_data[12] & 0x03) << 2) | ((csd_data[13] & 0xC0) >> 6);
  457. csd->WriteBlockPartial = (csd_data[13] & 0x20) >> 5;
  458. csd->Reserved3 = (csd_data[13] & 0x1F);
  459. csd->FileFormatGrouop = (csd_data[14] & 0x80) >> 7;
  460. csd->CopyFlag = (csd_data[14] & 0x40) >> 6;
  461. csd->PermWrProtect = (csd_data[14] & 0x20) >> 5;
  462. csd->TempWrProtect = (csd_data[14] & 0x10) >> 4;
  463. csd->FileFormat = (csd_data[14] & 0x0C) >> 2;
  464. csd->Reserved4 = (csd_data[14] & 0x03);
  465. csd->crc = (csd_data[15] & 0xFE) >> 1;
  466. csd->Reserved5 = (csd_data[15] & 0x01);
  467. ret = SdSpiStatusOK;
  468. }
  469. }
  470. sd_spi_deselect_card_and_purge();
  471. return ret;
  472. }
  473. static SdSpiStatus sd_spi_get_cid(SD_CID* Cid) {
  474. uint16_t counter = 0;
  475. uint8_t cid_data[16];
  476. SdSpiStatus ret = SdSpiStatusError;
  477. SdSpiCmdAnswer response;
  478. // CMD10 (SEND_CID): R1 format (0x00 is no errors)
  479. response = sd_spi_send_cmd(SD_CMD10_SEND_CID, 0, 0xFF, SdSpiCmdAnswerTypeR1);
  480. if(response.r1 == SdSpi_R1_NO_ERROR) {
  481. if(sd_spi_wait_for_data(SD_TOKEN_START_DATA_SINGLE_BLOCK_READ, SD_TIMEOUT_MS) ==
  482. SdSpiStatusOK) {
  483. // read CID data
  484. for(counter = 0; counter < 16; counter++) {
  485. cid_data[counter] = sd_spi_read_byte();
  486. }
  487. sd_spi_purge_crc();
  488. Cid->ManufacturerID = cid_data[0];
  489. memcpy(Cid->OEM_AppliID, cid_data + 1, 2);
  490. memcpy(Cid->ProdName, cid_data + 3, 5);
  491. Cid->ProdRev = cid_data[8];
  492. Cid->ProdSN = cid_data[9] << 24;
  493. Cid->ProdSN |= cid_data[10] << 16;
  494. Cid->ProdSN |= cid_data[11] << 8;
  495. Cid->ProdSN |= cid_data[12];
  496. Cid->Reserved1 = (cid_data[13] & 0xF0) >> 4;
  497. Cid->ManufactYear = (cid_data[13] & 0x0F) << 4;
  498. Cid->ManufactYear |= (cid_data[14] & 0xF0) >> 4;
  499. Cid->ManufactMonth = (cid_data[14] & 0x0F);
  500. Cid->CID_CRC = (cid_data[15] & 0xFE) >> 1;
  501. Cid->Reserved2 = 1;
  502. ret = SdSpiStatusOK;
  503. }
  504. }
  505. sd_spi_deselect_card_and_purge();
  506. return ret;
  507. }
  508. static SdSpiStatus
  509. sd_spi_cmd_read_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms) {
  510. uint32_t block_address = address;
  511. uint32_t offset = 0;
  512. // CMD16 (SET_BLOCKLEN): R1 response (0x00: no errors)
  513. SdSpiCmdAnswer response =
  514. sd_spi_send_cmd(SD_CMD16_SET_BLOCKLEN, SD_BLOCK_SIZE, 0xFF, SdSpiCmdAnswerTypeR1);
  515. sd_spi_deselect_card_and_purge();
  516. if(response.r1 != SdSpi_R1_NO_ERROR) {
  517. return SdSpiStatusError;
  518. }
  519. if(!sd_high_capacity) {
  520. block_address = address * SD_BLOCK_SIZE;
  521. }
  522. while(blocks--) {
  523. // CMD17 (READ_SINGLE_BLOCK): R1 response (0x00: no errors)
  524. response =
  525. sd_spi_send_cmd(SD_CMD17_READ_SINGLE_BLOCK, block_address, 0xFF, SdSpiCmdAnswerTypeR1);
  526. if(response.r1 != SdSpi_R1_NO_ERROR) {
  527. sd_spi_deselect_card_and_purge();
  528. return SdSpiStatusError;
  529. }
  530. // Wait for the data start token
  531. if(sd_spi_wait_for_data(SD_TOKEN_START_DATA_SINGLE_BLOCK_READ, timeout_ms) ==
  532. SdSpiStatusOK) {
  533. // Read the data block
  534. sd_spi_read_bytes_dma((uint8_t*)data + offset, SD_BLOCK_SIZE);
  535. sd_spi_purge_crc();
  536. // increase offset
  537. offset += SD_BLOCK_SIZE;
  538. // increase block address
  539. if(sd_high_capacity) {
  540. block_address += 1;
  541. } else {
  542. block_address += SD_BLOCK_SIZE;
  543. }
  544. } else {
  545. sd_spi_deselect_card_and_purge();
  546. return SdSpiStatusError;
  547. }
  548. sd_spi_deselect_card_and_purge();
  549. }
  550. return SdSpiStatusOK;
  551. }
  552. static SdSpiStatus sd_spi_cmd_write_blocks(
  553. uint32_t* data,
  554. uint32_t address,
  555. uint32_t blocks,
  556. uint32_t timeout_ms) {
  557. uint32_t block_address = address;
  558. uint32_t offset = 0;
  559. // CMD16 (SET_BLOCKLEN): R1 response (0x00: no errors)
  560. SdSpiCmdAnswer response =
  561. sd_spi_send_cmd(SD_CMD16_SET_BLOCKLEN, SD_BLOCK_SIZE, 0xFF, SdSpiCmdAnswerTypeR1);
  562. sd_spi_deselect_card_and_purge();
  563. if(response.r1 != SdSpi_R1_NO_ERROR) {
  564. return SdSpiStatusError;
  565. }
  566. if(!sd_high_capacity) {
  567. block_address = address * SD_BLOCK_SIZE;
  568. }
  569. while(blocks--) {
  570. // CMD24 (WRITE_SINGLE_BLOCK): R1 response (0x00: no errors)
  571. response = sd_spi_send_cmd(
  572. SD_CMD24_WRITE_SINGLE_BLOCK, block_address, 0xFF, SdSpiCmdAnswerTypeR1);
  573. if(response.r1 != SdSpi_R1_NO_ERROR) {
  574. sd_spi_deselect_card_and_purge();
  575. return SdSpiStatusError;
  576. }
  577. // Send dummy byte for NWR timing : one byte between CMD_WRITE and TOKEN
  578. // TODO: check bytes count
  579. sd_spi_write_byte(SD_DUMMY_BYTE);
  580. sd_spi_write_byte(SD_DUMMY_BYTE);
  581. // Send the data start token
  582. sd_spi_write_byte(SD_TOKEN_START_DATA_SINGLE_BLOCK_WRITE);
  583. sd_spi_write_bytes_dma((uint8_t*)data + offset, SD_BLOCK_SIZE);
  584. sd_spi_purge_crc();
  585. // Read data response
  586. SdSpiDataResponce data_responce = sd_spi_get_data_response(timeout_ms);
  587. sd_spi_deselect_card_and_purge();
  588. if(data_responce != SdSpiDataResponceOK) {
  589. return SdSpiStatusError;
  590. }
  591. // increase offset
  592. offset += SD_BLOCK_SIZE;
  593. // increase block address
  594. if(sd_high_capacity) {
  595. block_address += 1;
  596. } else {
  597. block_address += SD_BLOCK_SIZE;
  598. }
  599. }
  600. return SdSpiStatusOK;
  601. }
  602. uint8_t sd_max_mount_retry_count() {
  603. return 10;
  604. }
  605. SdSpiStatus sd_init(bool power_reset) {
  606. // Slow speed init
  607. furi_hal_spi_acquire(&furi_hal_spi_bus_handle_sd_slow);
  608. furi_hal_sd_spi_handle = &furi_hal_spi_bus_handle_sd_slow;
  609. // We reset card in spi_lock context, so it is safe to disturb spi bus
  610. if(power_reset) {
  611. sd_spi_debug("Power reset");
  612. // disable power and set low on all bus pins
  613. furi_hal_power_disable_external_3_3v();
  614. sd_spi_bus_to_ground();
  615. hal_sd_detect_set_low();
  616. furi_delay_ms(250);
  617. // reinit bus and enable power
  618. sd_spi_bus_rise_up();
  619. hal_sd_detect_init();
  620. furi_hal_power_enable_external_3_3v();
  621. furi_delay_ms(100);
  622. }
  623. SdSpiStatus status = SdSpiStatusError;
  624. // Send 80 dummy clocks with CS high
  625. sd_spi_deselect_card();
  626. for(uint8_t i = 0; i < 80; i++) {
  627. sd_spi_write_byte(SD_DUMMY_BYTE);
  628. }
  629. for(uint8_t i = 0; i < 128; i++) {
  630. status = sd_spi_init_spi_mode();
  631. if(status == SdSpiStatusOK) {
  632. // SD initialized and init to SPI mode properly
  633. sd_spi_debug("SD init OK after %d retries", i);
  634. break;
  635. }
  636. }
  637. furi_hal_sd_spi_handle = NULL;
  638. furi_hal_spi_release(&furi_hal_spi_bus_handle_sd_slow);
  639. // Init sector cache
  640. sector_cache_init();
  641. return status;
  642. }
  643. SdSpiStatus sd_get_card_state(void) {
  644. SdSpiCmdAnswer response;
  645. // Send CMD13 (SEND_STATUS) to get SD status
  646. response = sd_spi_send_cmd(SD_CMD13_SEND_STATUS, 0, 0xFF, SdSpiCmdAnswerTypeR2);
  647. sd_spi_deselect_card_and_purge();
  648. // Return status OK if response is valid
  649. if((response.r1 == SdSpi_R1_NO_ERROR) && (response.r2 == SdSpi_R2_NO_ERROR)) {
  650. return SdSpiStatusOK;
  651. }
  652. return SdSpiStatusError;
  653. }
  654. SdSpiStatus sd_get_card_info(SD_CardInfo* card_info) {
  655. SdSpiStatus status;
  656. status = sd_spi_get_csd(&(card_info->Csd));
  657. if(status != SdSpiStatusOK) {
  658. return status;
  659. }
  660. status = sd_spi_get_cid(&(card_info->Cid));
  661. if(status != SdSpiStatusOK) {
  662. return status;
  663. }
  664. if(sd_high_capacity == 1) {
  665. card_info->LogBlockSize = 512;
  666. card_info->CardBlockSize = 512;
  667. card_info->CardCapacity = ((uint64_t)card_info->Csd.version.v2.DeviceSize + 1UL) * 1024UL *
  668. (uint64_t)card_info->LogBlockSize;
  669. card_info->LogBlockNbr = (card_info->CardCapacity) / (card_info->LogBlockSize);
  670. } else {
  671. card_info->CardCapacity = (card_info->Csd.version.v1.DeviceSize + 1);
  672. card_info->CardCapacity *= (1UL << (card_info->Csd.version.v1.DeviceSizeMul + 2));
  673. card_info->LogBlockSize = 512;
  674. card_info->CardBlockSize = 1UL << (card_info->Csd.RdBlockLen);
  675. card_info->CardCapacity *= card_info->CardBlockSize;
  676. card_info->LogBlockNbr = (card_info->CardCapacity) / (card_info->LogBlockSize);
  677. }
  678. return status;
  679. }
  680. SdSpiStatus
  681. sd_read_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms) {
  682. SdSpiStatus status = sd_spi_cmd_read_blocks(data, address, blocks, timeout_ms);
  683. return status;
  684. }
  685. SdSpiStatus
  686. sd_write_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms) {
  687. SdSpiStatus status = sd_spi_cmd_write_blocks(data, address, blocks, timeout_ms);
  688. return status;
  689. }
  690. SdSpiStatus sd_get_cid(SD_CID* cid) {
  691. SdSpiStatus status;
  692. furi_hal_spi_acquire(&furi_hal_spi_bus_handle_sd_fast);
  693. furi_hal_sd_spi_handle = &furi_hal_spi_bus_handle_sd_fast;
  694. memset(cid, 0, sizeof(SD_CID));
  695. status = sd_spi_get_cid(cid);
  696. furi_hal_sd_spi_handle = NULL;
  697. furi_hal_spi_release(&furi_hal_spi_bus_handle_sd_fast);
  698. return status;
  699. }