lsm6dso_reg.h 94 KB

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  1. /*
  2. ******************************************************************************
  3. * @file lsm6dso_reg.h
  4. * @author Sensors Software Solution Team
  5. * @brief This file contains all the functions prototypes for the
  6. * lsm6dso_reg.c driver.
  7. ******************************************************************************
  8. * @attention
  9. *
  10. * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  11. * All rights reserved.</center></h2>
  12. *
  13. * This software component is licensed by ST under BSD 3-Clause license,
  14. * the "License"; You may not use this file except in compliance with the
  15. * License. You may obtain a copy of the License at:
  16. * opensource.org/licenses/BSD-3-Clause
  17. *
  18. ******************************************************************************
  19. */
  20. /* Define to prevent recursive inclusion -------------------------------------*/
  21. #ifndef LSM6DSO_REGS_H
  22. #define LSM6DSO_REGS_H
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26. /* Includes ------------------------------------------------------------------*/
  27. #include <stdint.h>
  28. #include <math.h>
  29. /** @addtogroup LSM6DSO
  30. * @{
  31. *
  32. */
  33. /** @defgroup STMicroelectronics sensors common types
  34. * @{
  35. *
  36. */
  37. #ifndef MEMS_SHARED_TYPES
  38. #define MEMS_SHARED_TYPES
  39. typedef struct{
  40. uint8_t bit0 : 1;
  41. uint8_t bit1 : 1;
  42. uint8_t bit2 : 1;
  43. uint8_t bit3 : 1;
  44. uint8_t bit4 : 1;
  45. uint8_t bit5 : 1;
  46. uint8_t bit6 : 1;
  47. uint8_t bit7 : 1;
  48. } bitwise_t;
  49. #define PROPERTY_DISABLE (0U)
  50. #define PROPERTY_ENABLE (1U)
  51. /** @addtogroup Interfaces_Functions
  52. * @brief This section provide a set of functions used to read and
  53. * write a generic register of the device.
  54. * MANDATORY: return 0 -> no Error.
  55. * @{
  56. *
  57. */
  58. typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
  59. typedef int32_t (*stmdev_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
  60. typedef struct {
  61. /** Component mandatory fields **/
  62. stmdev_write_ptr write_reg;
  63. stmdev_read_ptr read_reg;
  64. /** Customizable optional pointer **/
  65. void *handle;
  66. } stmdev_ctx_t;
  67. /**
  68. * @}
  69. *
  70. */
  71. #endif /* MEMS_SHARED_TYPES */
  72. #ifndef MEMS_UCF_SHARED_TYPES
  73. #define MEMS_UCF_SHARED_TYPES
  74. /** @defgroup Generic address-data structure definition
  75. * @brief This structure is useful to load a predefined configuration
  76. * of a sensor.
  77. * You can create a sensor configuration by your own or using
  78. * Unico / Unicleo tools available on STMicroelectronics
  79. * web site.
  80. *
  81. * @{
  82. *
  83. */
  84. typedef struct {
  85. uint8_t address;
  86. uint8_t data;
  87. } ucf_line_t;
  88. /**
  89. * @}
  90. *
  91. */
  92. #endif /* MEMS_UCF_SHARED_TYPES */
  93. /**
  94. * @}
  95. *
  96. */
  97. /** @defgroup LSM6DSO_Infos
  98. * @{
  99. *
  100. */
  101. /** I2C Device Address 8 bit format if SA0=0 -> D5 if SA0=1 -> D7 **/
  102. #define LSM6DSO_I2C_ADD_L 0xD5
  103. #define LSM6DSO_I2C_ADD_H 0xD7
  104. /** Device Identification (Who am I) **/
  105. #define LSM6DSO_ID 0x6C
  106. /**
  107. * @}
  108. *
  109. */
  110. #define LSM6DSO_FUNC_CFG_ACCESS 0x01U
  111. typedef struct {
  112. uint8_t not_used_01 : 6;
  113. uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */
  114. } lsm6dso_func_cfg_access_t;
  115. #define LSM6DSO_PIN_CTRL 0x02U
  116. typedef struct {
  117. uint8_t not_used_01 : 6;
  118. uint8_t sdo_pu_en : 1;
  119. uint8_t ois_pu_dis : 1;
  120. } lsm6dso_pin_ctrl_t;
  121. #define LSM6DSO_FIFO_CTRL1 0x07U
  122. typedef struct {
  123. uint8_t wtm : 8;
  124. } lsm6dso_fifo_ctrl1_t;
  125. #define LSM6DSO_FIFO_CTRL2 0x08U
  126. typedef struct {
  127. uint8_t wtm : 1;
  128. uint8_t uncoptr_rate : 2;
  129. uint8_t not_used_01 : 1;
  130. uint8_t odrchg_en : 1;
  131. uint8_t not_used_02 : 1;
  132. uint8_t fifo_compr_rt_en : 1;
  133. uint8_t stop_on_wtm : 1;
  134. } lsm6dso_fifo_ctrl2_t;
  135. #define LSM6DSO_FIFO_CTRL3 0x09U
  136. typedef struct {
  137. uint8_t bdr_xl : 4;
  138. uint8_t bdr_gy : 4;
  139. } lsm6dso_fifo_ctrl3_t;
  140. #define LSM6DSO_FIFO_CTRL4 0x0AU
  141. typedef struct {
  142. uint8_t fifo_mode : 3;
  143. uint8_t not_used_01 : 1;
  144. uint8_t odr_t_batch : 2;
  145. uint8_t odr_ts_batch : 2;
  146. } lsm6dso_fifo_ctrl4_t;
  147. #define LSM6DSO_COUNTER_BDR_REG1 0x0BU
  148. typedef struct {
  149. uint8_t cnt_bdr_th : 3;
  150. uint8_t not_used_01 : 2;
  151. uint8_t trig_counter_bdr : 1;
  152. uint8_t rst_counter_bdr : 1;
  153. uint8_t dataready_pulsed : 1;
  154. } lsm6dso_counter_bdr_reg1_t;
  155. #define LSM6DSO_COUNTER_BDR_REG2 0x0CU
  156. typedef struct {
  157. uint8_t cnt_bdr_th : 8;
  158. } lsm6dso_counter_bdr_reg2_t;
  159. #define LSM6DSO_INT1_CTRL 0x0D
  160. typedef struct {
  161. uint8_t int1_drdy_xl : 1;
  162. uint8_t int1_drdy_g : 1;
  163. uint8_t int1_boot : 1;
  164. uint8_t int1_fifo_th : 1;
  165. uint8_t int1_fifo_ovr : 1;
  166. uint8_t int1_fifo_full : 1;
  167. uint8_t int1_cnt_bdr : 1;
  168. uint8_t den_drdy_flag : 1;
  169. } lsm6dso_int1_ctrl_t;
  170. #define LSM6DSO_INT2_CTRL 0x0EU
  171. typedef struct {
  172. uint8_t int2_drdy_xl : 1;
  173. uint8_t int2_drdy_g : 1;
  174. uint8_t int2_drdy_temp : 1;
  175. uint8_t int2_fifo_th : 1;
  176. uint8_t int2_fifo_ovr : 1;
  177. uint8_t int2_fifo_full : 1;
  178. uint8_t int2_cnt_bdr : 1;
  179. uint8_t not_used_01 : 1;
  180. } lsm6dso_int2_ctrl_t;
  181. #define LSM6DSO_WHO_AM_I 0x0FU
  182. #define LSM6DSO_CTRL1_XL 0x10U
  183. typedef struct {
  184. uint8_t not_used_01 : 1;
  185. uint8_t lpf2_xl_en : 1;
  186. uint8_t fs_xl : 2;
  187. uint8_t odr_xl : 4;
  188. } lsm6dso_ctrl1_xl_t;
  189. #define LSM6DSO_CTRL2_G 0x11U
  190. typedef struct {
  191. uint8_t not_used_01 : 1;
  192. uint8_t fs_g : 3; /* fs_125 + fs_g */
  193. uint8_t odr_g : 4;
  194. } lsm6dso_ctrl2_g_t;
  195. #define LSM6DSO_CTRL3_C 0x12U
  196. typedef struct {
  197. uint8_t sw_reset : 1;
  198. uint8_t not_used_01 : 1;
  199. uint8_t if_inc : 1;
  200. uint8_t sim : 1;
  201. uint8_t pp_od : 1;
  202. uint8_t h_lactive : 1;
  203. uint8_t bdu : 1;
  204. uint8_t boot : 1;
  205. } lsm6dso_ctrl3_c_t;
  206. #define LSM6DSO_CTRL4_C 0x13U
  207. typedef struct {
  208. uint8_t not_used_01 : 1;
  209. uint8_t lpf1_sel_g : 1;
  210. uint8_t i2c_disable : 1;
  211. uint8_t drdy_mask : 1;
  212. uint8_t not_used_02 : 1;
  213. uint8_t int2_on_int1 : 1;
  214. uint8_t sleep_g : 1;
  215. uint8_t not_used_03 : 1;
  216. } lsm6dso_ctrl4_c_t;
  217. #define LSM6DSO_CTRL5_C 0x14U
  218. typedef struct {
  219. uint8_t st_xl : 2;
  220. uint8_t st_g : 2;
  221. uint8_t not_used_01 : 1;
  222. uint8_t rounding : 2;
  223. uint8_t xl_ulp_en : 1;
  224. } lsm6dso_ctrl5_c_t;
  225. #define LSM6DSO_CTRL6_C 0x15U
  226. typedef struct {
  227. uint8_t ftype : 3;
  228. uint8_t usr_off_w : 1;
  229. uint8_t xl_hm_mode : 1;
  230. uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */
  231. } lsm6dso_ctrl6_c_t;
  232. #define LSM6DSO_CTRL7_G 0x16U
  233. typedef struct {
  234. uint8_t ois_on : 1;
  235. uint8_t usr_off_on_out : 1;
  236. uint8_t ois_on_en : 1;
  237. uint8_t not_used_01 : 1;
  238. uint8_t hpm_g : 2;
  239. uint8_t hp_en_g : 1;
  240. uint8_t g_hm_mode : 1;
  241. } lsm6dso_ctrl7_g_t;
  242. #define LSM6DSO_CTRL8_XL 0x17U
  243. typedef struct {
  244. uint8_t low_pass_on_6d : 1;
  245. uint8_t xl_fs_mode : 1;
  246. uint8_t hp_slope_xl_en : 1;
  247. uint8_t fastsettl_mode_xl : 1;
  248. uint8_t hp_ref_mode_xl : 1;
  249. uint8_t hpcf_xl : 3;
  250. } lsm6dso_ctrl8_xl_t;
  251. #define LSM6DSO_CTRL9_XL 0x18U
  252. typedef struct {
  253. uint8_t not_used_01 : 1;
  254. uint8_t i3c_disable : 1;
  255. uint8_t den_lh : 1;
  256. uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
  257. uint8_t den_z : 1;
  258. uint8_t den_y : 1;
  259. uint8_t den_x : 1;
  260. } lsm6dso_ctrl9_xl_t;
  261. #define LSM6DSO_CTRL10_C 0x19U
  262. typedef struct {
  263. uint8_t not_used_01 : 5;
  264. uint8_t timestamp_en : 1;
  265. uint8_t not_used_02 : 2;
  266. } lsm6dso_ctrl10_c_t;
  267. #define LSM6DSO_ALL_INT_SRC 0x1AU
  268. typedef struct {
  269. uint8_t ff_ia : 1;
  270. uint8_t wu_ia : 1;
  271. uint8_t single_tap : 1;
  272. uint8_t double_tap : 1;
  273. uint8_t d6d_ia : 1;
  274. uint8_t sleep_change_ia : 1;
  275. uint8_t not_used_01 : 1;
  276. uint8_t timestamp_endcount : 1;
  277. } lsm6dso_all_int_src_t;
  278. #define LSM6DSO_WAKE_UP_SRC 0x1BU
  279. typedef struct {
  280. uint8_t z_wu : 1;
  281. uint8_t y_wu : 1;
  282. uint8_t x_wu : 1;
  283. uint8_t wu_ia : 1;
  284. uint8_t sleep_state : 1;
  285. uint8_t ff_ia : 1;
  286. uint8_t sleep_change_ia : 1;
  287. uint8_t not_used_01 : 1;
  288. } lsm6dso_wake_up_src_t;
  289. #define LSM6DSO_TAP_SRC 0x1CU
  290. typedef struct {
  291. uint8_t z_tap : 1;
  292. uint8_t y_tap : 1;
  293. uint8_t x_tap : 1;
  294. uint8_t tap_sign : 1;
  295. uint8_t double_tap : 1;
  296. uint8_t single_tap : 1;
  297. uint8_t tap_ia : 1;
  298. uint8_t not_used_02 : 1;
  299. } lsm6dso_tap_src_t;
  300. #define LSM6DSO_D6D_SRC 0x1DU
  301. typedef struct {
  302. uint8_t xl : 1;
  303. uint8_t xh : 1;
  304. uint8_t yl : 1;
  305. uint8_t yh : 1;
  306. uint8_t zl : 1;
  307. uint8_t zh : 1;
  308. uint8_t d6d_ia : 1;
  309. uint8_t den_drdy : 1;
  310. } lsm6dso_d6d_src_t;
  311. #define LSM6DSO_STATUS_REG 0x1EU
  312. typedef struct {
  313. uint8_t xlda : 1;
  314. uint8_t gda : 1;
  315. uint8_t tda : 1;
  316. uint8_t not_used_01 : 5;
  317. } lsm6dso_status_reg_t;
  318. #define LSM6DSO_STATUS_SPIAUX 0x1EU
  319. typedef struct {
  320. uint8_t xlda : 1;
  321. uint8_t gda : 1;
  322. uint8_t gyro_settling : 1;
  323. uint8_t not_used_01 : 5;
  324. } lsm6dso_status_spiaux_t;
  325. #define LSM6DSO_OUT_TEMP_L 0x20U
  326. #define LSM6DSO_OUT_TEMP_H 0x21U
  327. #define LSM6DSO_OUTX_L_G 0x22U
  328. #define LSM6DSO_OUTX_H_G 0x23U
  329. #define LSM6DSO_OUTY_L_G 0x24U
  330. #define LSM6DSO_OUTY_H_G 0x25U
  331. #define LSM6DSO_OUTZ_L_G 0x26U
  332. #define LSM6DSO_OUTZ_H_G 0x27U
  333. #define LSM6DSO_OUTX_L_A 0x28U
  334. #define LSM6DSO_OUTX_H_A 0x29U
  335. #define LSM6DSO_OUTY_L_A 0x2AU
  336. #define LSM6DSO_OUTY_H_A 0x2BU
  337. #define LSM6DSO_OUTZ_L_A 0x2CU
  338. #define LSM6DSO_OUTZ_H_A 0x2DU
  339. #define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE 0x35U
  340. typedef struct {
  341. uint8_t not_used_01 : 3;
  342. uint8_t is_step_det : 1;
  343. uint8_t is_tilt : 1;
  344. uint8_t is_sigmot : 1;
  345. uint8_t not_used_02 : 1;
  346. uint8_t is_fsm_lc : 1;
  347. } lsm6dso_emb_func_status_mainpage_t;
  348. #define LSM6DSO_FSM_STATUS_A_MAINPAGE 0x36U
  349. typedef struct {
  350. uint8_t is_fsm1 : 1;
  351. uint8_t is_fsm2 : 1;
  352. uint8_t is_fsm3 : 1;
  353. uint8_t is_fsm4 : 1;
  354. uint8_t is_fsm5 : 1;
  355. uint8_t is_fsm6 : 1;
  356. uint8_t is_fsm7 : 1;
  357. uint8_t is_fsm8 : 1;
  358. } lsm6dso_fsm_status_a_mainpage_t;
  359. #define LSM6DSO_FSM_STATUS_B_MAINPAGE 0x37U
  360. typedef struct {
  361. uint8_t IS_FSM9 : 1;
  362. uint8_t IS_FSM10 : 1;
  363. uint8_t IS_FSM11 : 1;
  364. uint8_t IS_FSM12 : 1;
  365. uint8_t IS_FSM13 : 1;
  366. uint8_t IS_FSM14 : 1;
  367. uint8_t IS_FSM15 : 1;
  368. uint8_t IS_FSM16 : 1;
  369. } lsm6dso_fsm_status_b_mainpage_t;
  370. #define LSM6DSO_STATUS_MASTER_MAINPAGE 0x39U
  371. typedef struct {
  372. uint8_t sens_hub_endop : 1;
  373. uint8_t not_used_01 : 2;
  374. uint8_t slave0_nack : 1;
  375. uint8_t slave1_nack : 1;
  376. uint8_t slave2_nack : 1;
  377. uint8_t slave3_nack : 1;
  378. uint8_t wr_once_done : 1;
  379. } lsm6dso_status_master_mainpage_t;
  380. #define LSM6DSO_FIFO_STATUS1 0x3AU
  381. typedef struct {
  382. uint8_t diff_fifo : 8;
  383. } lsm6dso_fifo_status1_t;
  384. #define LSM6DSO_FIFO_STATUS2 0x3B
  385. typedef struct {
  386. uint8_t diff_fifo : 2;
  387. uint8_t not_used_01 : 1;
  388. uint8_t over_run_latched : 1;
  389. uint8_t counter_bdr_ia : 1;
  390. uint8_t fifo_full_ia : 1;
  391. uint8_t fifo_ovr_ia : 1;
  392. uint8_t fifo_wtm_ia : 1;
  393. } lsm6dso_fifo_status2_t;
  394. #define LSM6DSO_TIMESTAMP0 0x40U
  395. #define LSM6DSO_TIMESTAMP1 0x41U
  396. #define LSM6DSO_TIMESTAMP2 0x42U
  397. #define LSM6DSO_TIMESTAMP3 0x43U
  398. #define LSM6DSO_TAP_CFG0 0x56U
  399. typedef struct {
  400. uint8_t lir : 1;
  401. uint8_t tap_z_en : 1;
  402. uint8_t tap_y_en : 1;
  403. uint8_t tap_x_en : 1;
  404. uint8_t slope_fds : 1;
  405. uint8_t sleep_status_on_int : 1;
  406. uint8_t int_clr_on_read : 1;
  407. uint8_t not_used_01 : 1;
  408. } lsm6dso_tap_cfg0_t;
  409. #define LSM6DSO_TAP_CFG1 0x57U
  410. typedef struct {
  411. uint8_t tap_ths_x : 5;
  412. uint8_t tap_priority : 3;
  413. } lsm6dso_tap_cfg1_t;
  414. #define LSM6DSO_TAP_CFG2 0x58U
  415. typedef struct {
  416. uint8_t tap_ths_y : 5;
  417. uint8_t inact_en : 2;
  418. uint8_t interrupts_enable : 1;
  419. } lsm6dso_tap_cfg2_t;
  420. #define LSM6DSO_TAP_THS_6D 0x59U
  421. typedef struct {
  422. uint8_t tap_ths_z : 5;
  423. uint8_t sixd_ths : 2;
  424. uint8_t d4d_en : 1;
  425. } lsm6dso_tap_ths_6d_t;
  426. #define LSM6DSO_INT_DUR2 0x5AU
  427. typedef struct {
  428. uint8_t shock : 2;
  429. uint8_t quiet : 2;
  430. uint8_t dur : 4;
  431. } lsm6dso_int_dur2_t;
  432. #define LSM6DSO_WAKE_UP_THS 0x5BU
  433. typedef struct {
  434. uint8_t wk_ths : 6;
  435. uint8_t usr_off_on_wu : 1;
  436. uint8_t single_double_tap : 1;
  437. } lsm6dso_wake_up_ths_t;
  438. #define LSM6DSO_WAKE_UP_DUR 0x5CU
  439. typedef struct {
  440. uint8_t sleep_dur : 4;
  441. uint8_t wake_ths_w : 1;
  442. uint8_t wake_dur : 2;
  443. uint8_t ff_dur : 1;
  444. } lsm6dso_wake_up_dur_t;
  445. #define LSM6DSO_FREE_FALL 0x5DU
  446. typedef struct {
  447. uint8_t ff_ths : 3;
  448. uint8_t ff_dur : 5;
  449. } lsm6dso_free_fall_t;
  450. #define LSM6DSO_MD1_CFG 0x5EU
  451. typedef struct {
  452. uint8_t int1_shub : 1;
  453. uint8_t int1_emb_func : 1;
  454. uint8_t int1_6d : 1;
  455. uint8_t int1_double_tap : 1;
  456. uint8_t int1_ff : 1;
  457. uint8_t int1_wu : 1;
  458. uint8_t int1_single_tap : 1;
  459. uint8_t int1_sleep_change : 1;
  460. } lsm6dso_md1_cfg_t;
  461. #define LSM6DSO_MD2_CFG 0x5FU
  462. typedef struct {
  463. uint8_t int2_timestamp : 1;
  464. uint8_t int2_emb_func : 1;
  465. uint8_t int2_6d : 1;
  466. uint8_t int2_double_tap : 1;
  467. uint8_t int2_ff : 1;
  468. uint8_t int2_wu : 1;
  469. uint8_t int2_single_tap : 1;
  470. uint8_t int2_sleep_change : 1;
  471. } lsm6dso_md2_cfg_t;
  472. #define LSM6DSO_I3C_BUS_AVB 0x62U
  473. typedef struct {
  474. uint8_t pd_dis_int1 : 1;
  475. uint8_t not_used_01 : 2;
  476. uint8_t i3c_bus_avb_sel : 2;
  477. uint8_t not_used_02 : 3;
  478. } lsm6dso_i3c_bus_avb_t;
  479. #define LSM6DSO_INTERNAL_FREQ_FINE 0x63U
  480. typedef struct {
  481. uint8_t freq_fine : 8;
  482. } lsm6dso_internal_freq_fine_t;
  483. #define LSM6DSO_INT_OIS 0x6FU
  484. typedef struct {
  485. uint8_t st_xl_ois : 2;
  486. uint8_t not_used_01 : 3;
  487. uint8_t den_lh_ois : 1;
  488. uint8_t lvl2_ois : 1;
  489. uint8_t int2_drdy_ois : 1;
  490. } lsm6dso_int_ois_t;
  491. #define LSM6DSO_CTRL1_OIS 0x70U
  492. typedef struct {
  493. uint8_t ois_en_spi2 : 1;
  494. uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
  495. uint8_t mode4_en : 1;
  496. uint8_t sim_ois : 1;
  497. uint8_t lvl1_ois : 1;
  498. uint8_t not_used_01 : 1;
  499. } lsm6dso_ctrl1_ois_t;
  500. #define LSM6DSO_CTRL2_OIS 0x71U
  501. typedef struct {
  502. uint8_t hp_en_ois : 1;
  503. uint8_t ftype_ois : 2;
  504. uint8_t not_used_01 : 1;
  505. uint8_t hpm_ois : 2;
  506. uint8_t not_used_02 : 2;
  507. } lsm6dso_ctrl2_ois_t;
  508. #define LSM6DSO_CTRL3_OIS 0x72U
  509. typedef struct {
  510. uint8_t st_ois_clampdis : 1;
  511. uint8_t st_ois : 2;
  512. uint8_t filter_xl_conf_ois : 3;
  513. uint8_t fs_xl_ois : 2;
  514. } lsm6dso_ctrl3_ois_t;
  515. #define LSM6DSO_X_OFS_USR 0x73U
  516. #define LSM6DSO_Y_OFS_USR 0x74U
  517. #define LSM6DSO_Z_OFS_USR 0x75U
  518. #define LSM6DSO_FIFO_DATA_OUT_TAG 0x78U
  519. typedef struct {
  520. uint8_t tag_parity : 1;
  521. uint8_t tag_cnt : 2;
  522. uint8_t tag_sensor : 5;
  523. } lsm6dso_fifo_data_out_tag_t;
  524. #define LSM6DSO_FIFO_DATA_OUT_X_L 0x79U
  525. #define LSM6DSO_FIFO_DATA_OUT_X_H 0x7AU
  526. #define LSM6DSO_FIFO_DATA_OUT_Y_L 0x7BU
  527. #define LSM6DSO_FIFO_DATA_OUT_Y_H 0x7CU
  528. #define LSM6DSO_FIFO_DATA_OUT_Z_L 0x7DU
  529. #define LSM6DSO_FIFO_DATA_OUT_Z_H 0x7EU
  530. #define LSM6DSO_PAGE_SEL 0x02U
  531. typedef struct {
  532. uint8_t not_used_01 : 4;
  533. uint8_t page_sel : 4;
  534. } lsm6dso_page_sel_t;
  535. #define LSM6DSO_EMB_FUNC_EN_A 0x04U
  536. typedef struct {
  537. uint8_t not_used_01 : 3;
  538. uint8_t pedo_en : 1;
  539. uint8_t tilt_en : 1;
  540. uint8_t sign_motion_en : 1;
  541. uint8_t not_used_02 : 2;
  542. } lsm6dso_emb_func_en_a_t;
  543. #define LSM6DSO_EMB_FUNC_EN_B 0x05U
  544. typedef struct {
  545. uint8_t fsm_en : 1;
  546. uint8_t not_used_01 : 2;
  547. uint8_t fifo_compr_en : 1;
  548. uint8_t pedo_adv_en : 1;
  549. uint8_t not_used_02 : 3;
  550. } lsm6dso_emb_func_en_b_t;
  551. #define LSM6DSO_PAGE_ADDRESS 0x08U
  552. typedef struct {
  553. uint8_t page_addr : 8;
  554. } lsm6dso_page_address_t;
  555. #define LSM6DSO_PAGE_VALUE 0x09U
  556. typedef struct {
  557. uint8_t page_value : 8;
  558. } lsm6dso_page_value_t;
  559. #define LSM6DSO_EMB_FUNC_INT1 0x0AU
  560. typedef struct {
  561. uint8_t not_used_01 : 3;
  562. uint8_t int1_step_detector : 1;
  563. uint8_t int1_tilt : 1;
  564. uint8_t int1_sig_mot : 1;
  565. uint8_t not_used_02 : 1;
  566. uint8_t int1_fsm_lc : 1;
  567. } lsm6dso_emb_func_int1_t;
  568. #define LSM6DSO_FSM_INT1_A 0x0BU
  569. typedef struct {
  570. uint8_t int1_fsm1 : 1;
  571. uint8_t int1_fsm2 : 1;
  572. uint8_t int1_fsm3 : 1;
  573. uint8_t int1_fsm4 : 1;
  574. uint8_t int1_fsm5 : 1;
  575. uint8_t int1_fsm6 : 1;
  576. uint8_t int1_fsm7 : 1;
  577. uint8_t int1_fsm8 : 1;
  578. } lsm6dso_fsm_int1_a_t;
  579. #define LSM6DSO_FSM_INT1_B 0x0CU
  580. typedef struct {
  581. uint8_t int1_fsm9 : 1;
  582. uint8_t int1_fsm10 : 1;
  583. uint8_t int1_fsm11 : 1;
  584. uint8_t int1_fsm12 : 1;
  585. uint8_t int1_fsm13 : 1;
  586. uint8_t int1_fsm14 : 1;
  587. uint8_t int1_fsm15 : 1;
  588. uint8_t int1_fsm16 : 1;
  589. } lsm6dso_fsm_int1_b_t;
  590. #define LSM6DSO_EMB_FUNC_INT2 0x0EU
  591. typedef struct {
  592. uint8_t not_used_01 : 3;
  593. uint8_t int2_step_detector : 1;
  594. uint8_t int2_tilt : 1;
  595. uint8_t int2_sig_mot : 1;
  596. uint8_t not_used_02 : 1;
  597. uint8_t int2_fsm_lc : 1;
  598. } lsm6dso_emb_func_int2_t;
  599. #define LSM6DSO_FSM_INT2_A 0x0FU
  600. typedef struct {
  601. uint8_t int2_fsm1 : 1;
  602. uint8_t int2_fsm2 : 1;
  603. uint8_t int2_fsm3 : 1;
  604. uint8_t int2_fsm4 : 1;
  605. uint8_t int2_fsm5 : 1;
  606. uint8_t int2_fsm6 : 1;
  607. uint8_t int2_fsm7 : 1;
  608. uint8_t int2_fsm8 : 1;
  609. } lsm6dso_fsm_int2_a_t;
  610. #define LSM6DSO_FSM_INT2_B 0x10U
  611. typedef struct {
  612. uint8_t int2_fsm9 : 1;
  613. uint8_t int2_fsm10 : 1;
  614. uint8_t int2_fsm11 : 1;
  615. uint8_t int2_fsm12 : 1;
  616. uint8_t int2_fsm13 : 1;
  617. uint8_t int2_fsm14 : 1;
  618. uint8_t int2_fsm15 : 1;
  619. uint8_t int2_fsm16 : 1;
  620. } lsm6dso_fsm_int2_b_t;
  621. #define LSM6DSO_EMB_FUNC_STATUS 0x12U
  622. typedef struct {
  623. uint8_t not_used_01 : 3;
  624. uint8_t is_step_det : 1;
  625. uint8_t is_tilt : 1;
  626. uint8_t is_sigmot : 1;
  627. uint8_t not_used_02 : 1;
  628. uint8_t is_fsm_lc : 1;
  629. } lsm6dso_emb_func_status_t;
  630. #define LSM6DSO_FSM_STATUS_A 0x13U
  631. typedef struct {
  632. uint8_t is_fsm1 : 1;
  633. uint8_t is_fsm2 : 1;
  634. uint8_t is_fsm3 : 1;
  635. uint8_t is_fsm4 : 1;
  636. uint8_t is_fsm5 : 1;
  637. uint8_t is_fsm6 : 1;
  638. uint8_t is_fsm7 : 1;
  639. uint8_t is_fsm8 : 1;
  640. } lsm6dso_fsm_status_a_t;
  641. #define LSM6DSO_FSM_STATUS_B 0x14U
  642. typedef struct {
  643. uint8_t is_fsm9 : 1;
  644. uint8_t is_fsm10 : 1;
  645. uint8_t is_fsm11 : 1;
  646. uint8_t is_fsm12 : 1;
  647. uint8_t is_fsm13 : 1;
  648. uint8_t is_fsm14 : 1;
  649. uint8_t is_fsm15 : 1;
  650. uint8_t is_fsm16 : 1;
  651. } lsm6dso_fsm_status_b_t;
  652. #define LSM6DSO_PAGE_RW 0x17U
  653. typedef struct {
  654. uint8_t not_used_01 : 5;
  655. uint8_t page_rw : 2; /* page_write + page_read */
  656. uint8_t emb_func_lir : 1;
  657. } lsm6dso_page_rw_t;
  658. #define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U
  659. typedef struct {
  660. uint8_t not_used_00 : 6;
  661. uint8_t pedo_fifo_en : 1;
  662. uint8_t not_used_01 : 1;
  663. } lsm6dso_emb_func_fifo_cfg_t;
  664. #define LSM6DSO_FSM_ENABLE_A 0x46U
  665. typedef struct {
  666. uint8_t fsm1_en : 1;
  667. uint8_t fsm2_en : 1;
  668. uint8_t fsm3_en : 1;
  669. uint8_t fsm4_en : 1;
  670. uint8_t fsm5_en : 1;
  671. uint8_t fsm6_en : 1;
  672. uint8_t fsm7_en : 1;
  673. uint8_t fsm8_en : 1;
  674. } lsm6dso_fsm_enable_a_t;
  675. #define LSM6DSO_FSM_ENABLE_B 0x47U
  676. typedef struct {
  677. uint8_t fsm9_en : 1;
  678. uint8_t fsm10_en : 1;
  679. uint8_t fsm11_en : 1;
  680. uint8_t fsm12_en : 1;
  681. uint8_t fsm13_en : 1;
  682. uint8_t fsm14_en : 1;
  683. uint8_t fsm15_en : 1;
  684. uint8_t fsm16_en : 1;
  685. } lsm6dso_fsm_enable_b_t;
  686. #define LSM6DSO_FSM_LONG_COUNTER_L 0x48U
  687. #define LSM6DSO_FSM_LONG_COUNTER_H 0x49U
  688. #define LSM6DSO_FSM_LONG_COUNTER_CLEAR 0x4AU
  689. typedef struct {
  690. uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */
  691. uint8_t not_used_01 : 6;
  692. } lsm6dso_fsm_long_counter_clear_t;
  693. #define LSM6DSO_FSM_OUTS1 0x4CU
  694. typedef struct {
  695. uint8_t n_v : 1;
  696. uint8_t p_v : 1;
  697. uint8_t n_z : 1;
  698. uint8_t p_z : 1;
  699. uint8_t n_y : 1;
  700. uint8_t p_y : 1;
  701. uint8_t n_x : 1;
  702. uint8_t p_x : 1;
  703. } lsm6dso_fsm_outs1_t;
  704. #define LSM6DSO_FSM_OUTS2 0x4DU
  705. typedef struct {
  706. uint8_t n_v : 1;
  707. uint8_t p_v : 1;
  708. uint8_t n_z : 1;
  709. uint8_t p_z : 1;
  710. uint8_t n_y : 1;
  711. uint8_t p_y : 1;
  712. uint8_t n_x : 1;
  713. uint8_t p_x : 1;
  714. } lsm6dso_fsm_outs2_t;
  715. #define LSM6DSO_FSM_OUTS3 0x4EU
  716. typedef struct {
  717. uint8_t n_v : 1;
  718. uint8_t p_v : 1;
  719. uint8_t n_z : 1;
  720. uint8_t p_z : 1;
  721. uint8_t n_y : 1;
  722. uint8_t p_y : 1;
  723. uint8_t n_x : 1;
  724. uint8_t p_x : 1;
  725. } lsm6dso_fsm_outs3_t;
  726. #define LSM6DSO_FSM_OUTS4 0x4FU
  727. typedef struct {
  728. uint8_t n_v : 1;
  729. uint8_t p_v : 1;
  730. uint8_t n_z : 1;
  731. uint8_t p_z : 1;
  732. uint8_t n_y : 1;
  733. uint8_t p_y : 1;
  734. uint8_t n_x : 1;
  735. uint8_t p_x : 1;
  736. } lsm6dso_fsm_outs4_t;
  737. #define LSM6DSO_FSM_OUTS5 0x50U
  738. typedef struct {
  739. uint8_t n_v : 1;
  740. uint8_t p_v : 1;
  741. uint8_t n_z : 1;
  742. uint8_t p_z : 1;
  743. uint8_t n_y : 1;
  744. uint8_t p_y : 1;
  745. uint8_t n_x : 1;
  746. uint8_t p_x : 1;
  747. } lsm6dso_fsm_outs5_t;
  748. #define LSM6DSO_FSM_OUTS6 0x51U
  749. typedef struct {
  750. uint8_t n_v : 1;
  751. uint8_t p_v : 1;
  752. uint8_t n_z : 1;
  753. uint8_t p_z : 1;
  754. uint8_t n_y : 1;
  755. uint8_t p_y : 1;
  756. uint8_t n_x : 1;
  757. uint8_t p_x : 1;
  758. } lsm6dso_fsm_outs6_t;
  759. #define LSM6DSO_FSM_OUTS7 0x52U
  760. typedef struct {
  761. uint8_t n_v : 1;
  762. uint8_t p_v : 1;
  763. uint8_t n_z : 1;
  764. uint8_t p_z : 1;
  765. uint8_t n_y : 1;
  766. uint8_t p_y : 1;
  767. uint8_t n_x : 1;
  768. uint8_t p_x : 1;
  769. } lsm6dso_fsm_outs7_t;
  770. #define LSM6DSO_FSM_OUTS8 0x53U
  771. typedef struct {
  772. uint8_t n_v : 1;
  773. uint8_t p_v : 1;
  774. uint8_t n_z : 1;
  775. uint8_t p_z : 1;
  776. uint8_t n_y : 1;
  777. uint8_t p_y : 1;
  778. uint8_t n_x : 1;
  779. uint8_t p_x : 1;
  780. } lsm6dso_fsm_outs8_t;
  781. #define LSM6DSO_FSM_OUTS9 0x54U
  782. typedef struct {
  783. uint8_t n_v : 1;
  784. uint8_t p_v : 1;
  785. uint8_t n_z : 1;
  786. uint8_t p_z : 1;
  787. uint8_t n_y : 1;
  788. uint8_t p_y : 1;
  789. uint8_t n_x : 1;
  790. uint8_t p_x : 1;
  791. } lsm6dso_fsm_outs9_t;
  792. #define LSM6DSO_FSM_OUTS10 0x55U
  793. typedef struct {
  794. uint8_t n_v : 1;
  795. uint8_t p_v : 1;
  796. uint8_t n_z : 1;
  797. uint8_t p_z : 1;
  798. uint8_t n_y : 1;
  799. uint8_t p_y : 1;
  800. uint8_t n_x : 1;
  801. uint8_t p_x : 1;
  802. } lsm6dso_fsm_outs10_t;
  803. #define LSM6DSO_FSM_OUTS11 0x56U
  804. typedef struct {
  805. uint8_t n_v : 1;
  806. uint8_t p_v : 1;
  807. uint8_t n_z : 1;
  808. uint8_t p_z : 1;
  809. uint8_t n_y : 1;
  810. uint8_t p_y : 1;
  811. uint8_t n_x : 1;
  812. uint8_t p_x : 1;
  813. } lsm6dso_fsm_outs11_t;
  814. #define LSM6DSO_FSM_OUTS12 0x57U
  815. typedef struct {
  816. uint8_t n_v : 1;
  817. uint8_t p_v : 1;
  818. uint8_t n_z : 1;
  819. uint8_t p_z : 1;
  820. uint8_t n_y : 1;
  821. uint8_t p_y : 1;
  822. uint8_t n_x : 1;
  823. uint8_t p_x : 1;
  824. } lsm6dso_fsm_outs12_t;
  825. #define LSM6DSO_FSM_OUTS13 0x58U
  826. typedef struct {
  827. uint8_t n_v : 1;
  828. uint8_t p_v : 1;
  829. uint8_t n_z : 1;
  830. uint8_t p_z : 1;
  831. uint8_t n_y : 1;
  832. uint8_t p_y : 1;
  833. uint8_t n_x : 1;
  834. uint8_t p_x : 1;
  835. } lsm6dso_fsm_outs13_t;
  836. #define LSM6DSO_FSM_OUTS14 0x59U
  837. typedef struct {
  838. uint8_t n_v : 1;
  839. uint8_t p_v : 1;
  840. uint8_t n_z : 1;
  841. uint8_t p_z : 1;
  842. uint8_t n_y : 1;
  843. uint8_t p_y : 1;
  844. uint8_t n_x : 1;
  845. uint8_t p_x : 1;
  846. } lsm6dso_fsm_outs14_t;
  847. #define LSM6DSO_FSM_OUTS15 0x5AU
  848. typedef struct {
  849. uint8_t n_v : 1;
  850. uint8_t p_v : 1;
  851. uint8_t n_z : 1;
  852. uint8_t p_z : 1;
  853. uint8_t n_y : 1;
  854. uint8_t p_y : 1;
  855. uint8_t n_x : 1;
  856. uint8_t p_x : 1;
  857. } lsm6dso_fsm_outs15_t;
  858. #define LSM6DSO_FSM_OUTS16 0x5BU
  859. typedef struct {
  860. uint8_t n_v : 1;
  861. uint8_t p_v : 1;
  862. uint8_t n_z : 1;
  863. uint8_t p_z : 1;
  864. uint8_t n_y : 1;
  865. uint8_t p_y : 1;
  866. uint8_t n_x : 1;
  867. uint8_t p_x : 1;
  868. } lsm6dso_fsm_outs16_t;
  869. #define LSM6DSO_EMB_FUNC_ODR_CFG_B 0x5FU
  870. typedef struct {
  871. uint8_t not_used_01 : 3;
  872. uint8_t fsm_odr : 2;
  873. uint8_t not_used_02 : 3;
  874. } lsm6dso_emb_func_odr_cfg_b_t;
  875. #define LSM6DSO_STEP_COUNTER_L 0x62U
  876. #define LSM6DSO_STEP_COUNTER_H 0x63U
  877. #define LSM6DSO_EMB_FUNC_SRC 0x64U
  878. typedef struct {
  879. uint8_t not_used_01 : 2;
  880. uint8_t stepcounter_bit_set : 1;
  881. uint8_t step_overflow : 1;
  882. uint8_t step_count_delta_ia : 1;
  883. uint8_t step_detected : 1;
  884. uint8_t not_used_02 : 1;
  885. uint8_t pedo_rst_step : 1;
  886. } lsm6dso_emb_func_src_t;
  887. #define LSM6DSO_EMB_FUNC_INIT_A 0x66U
  888. typedef struct {
  889. uint8_t not_used_01 : 3;
  890. uint8_t step_det_init : 1;
  891. uint8_t tilt_init : 1;
  892. uint8_t sig_mot_init : 1;
  893. uint8_t not_used_02 : 2;
  894. } lsm6dso_emb_func_init_a_t;
  895. #define LSM6DSO_EMB_FUNC_INIT_B 0x67U
  896. typedef struct {
  897. uint8_t fsm_init : 1;
  898. uint8_t not_used_01 : 2;
  899. uint8_t fifo_compr_init : 1;
  900. uint8_t not_used_02 : 4;
  901. } lsm6dso_emb_func_init_b_t;
  902. #define LSM6DSO_MAG_SENSITIVITY_L 0xBAU
  903. #define LSM6DSO_MAG_SENSITIVITY_H 0xBBU
  904. #define LSM6DSO_MAG_OFFX_L 0xC0U
  905. #define LSM6DSO_MAG_OFFX_H 0xC1U
  906. #define LSM6DSO_MAG_OFFY_L 0xC2U
  907. #define LSM6DSO_MAG_OFFY_H 0xC3U
  908. #define LSM6DSO_MAG_OFFZ_L 0xC4U
  909. #define LSM6DSO_MAG_OFFZ_H 0xC5U
  910. #define LSM6DSO_MAG_SI_XX_L 0xC6U
  911. #define LSM6DSO_MAG_SI_XX_H 0xC7U
  912. #define LSM6DSO_MAG_SI_XY_L 0xC8U
  913. #define LSM6DSO_MAG_SI_XY_H 0xC9U
  914. #define LSM6DSO_MAG_SI_XZ_L 0xCAU
  915. #define LSM6DSO_MAG_SI_XZ_H 0xCBU
  916. #define LSM6DSO_MAG_SI_YY_L 0xCCU
  917. #define LSM6DSO_MAG_SI_YY_H 0xCDU
  918. #define LSM6DSO_MAG_SI_YZ_L 0xCEU
  919. #define LSM6DSO_MAG_SI_YZ_H 0xCFU
  920. #define LSM6DSO_MAG_SI_ZZ_L 0xD0U
  921. #define LSM6DSO_MAG_SI_ZZ_H 0xD1U
  922. #define LSM6DSO_MAG_CFG_A 0xD4U
  923. typedef struct {
  924. uint8_t mag_z_axis : 3;
  925. uint8_t not_used_01 : 1;
  926. uint8_t mag_y_axis : 3;
  927. uint8_t not_used_02 : 1;
  928. } lsm6dso_mag_cfg_a_t;
  929. #define LSM6DSO_MAG_CFG_B 0xD5U
  930. typedef struct {
  931. uint8_t mag_x_axis : 3;
  932. uint8_t not_used_01 : 5;
  933. } lsm6dso_mag_cfg_b_t;
  934. #define LSM6DSO_FSM_LC_TIMEOUT_L 0x17AU
  935. #define LSM6DSO_FSM_LC_TIMEOUT_H 0x17BU
  936. #define LSM6DSO_FSM_PROGRAMS 0x17CU
  937. #define LSM6DSO_FSM_START_ADD_L 0x17EU
  938. #define LSM6DSO_FSM_START_ADD_H 0x17FU
  939. #define LSM6DSO_PEDO_CMD_REG 0x183U
  940. typedef struct {
  941. uint8_t ad_det_en : 1;
  942. uint8_t not_used_01 : 1;
  943. uint8_t fp_rejection_en : 1;
  944. uint8_t carry_count_en : 1;
  945. uint8_t not_used_02 : 4;
  946. } lsm6dso_pedo_cmd_reg_t;
  947. #define LSM6DSO_PEDO_DEB_STEPS_CONF 0x184U
  948. #define LSM6DSO_PEDO_SC_DELTAT_L 0x1D0U
  949. #define LSM6DSO_PEDO_SC_DELTAT_H 0x1D1U
  950. #define LSM6DSO_SENSOR_HUB_1 0x02U
  951. typedef struct {
  952. uint8_t bit0 : 1;
  953. uint8_t bit1 : 1;
  954. uint8_t bit2 : 1;
  955. uint8_t bit3 : 1;
  956. uint8_t bit4 : 1;
  957. uint8_t bit5 : 1;
  958. uint8_t bit6 : 1;
  959. uint8_t bit7 : 1;
  960. } lsm6dso_sensor_hub_1_t;
  961. #define LSM6DSO_SENSOR_HUB_2 0x03U
  962. typedef struct {
  963. uint8_t bit0 : 1;
  964. uint8_t bit1 : 1;
  965. uint8_t bit2 : 1;
  966. uint8_t bit3 : 1;
  967. uint8_t bit4 : 1;
  968. uint8_t bit5 : 1;
  969. uint8_t bit6 : 1;
  970. uint8_t bit7 : 1;
  971. } lsm6dso_sensor_hub_2_t;
  972. #define LSM6DSO_SENSOR_HUB_3 0x04U
  973. typedef struct {
  974. uint8_t bit0 : 1;
  975. uint8_t bit1 : 1;
  976. uint8_t bit2 : 1;
  977. uint8_t bit3 : 1;
  978. uint8_t bit4 : 1;
  979. uint8_t bit5 : 1;
  980. uint8_t bit6 : 1;
  981. uint8_t bit7 : 1;
  982. } lsm6dso_sensor_hub_3_t;
  983. #define LSM6DSO_SENSOR_HUB_4 0x05U
  984. typedef struct {
  985. uint8_t bit0 : 1;
  986. uint8_t bit1 : 1;
  987. uint8_t bit2 : 1;
  988. uint8_t bit3 : 1;
  989. uint8_t bit4 : 1;
  990. uint8_t bit5 : 1;
  991. uint8_t bit6 : 1;
  992. uint8_t bit7 : 1;
  993. } lsm6dso_sensor_hub_4_t;
  994. #define LSM6DSO_SENSOR_HUB_5 0x06U
  995. typedef struct {
  996. uint8_t bit0 : 1;
  997. uint8_t bit1 : 1;
  998. uint8_t bit2 : 1;
  999. uint8_t bit3 : 1;
  1000. uint8_t bit4 : 1;
  1001. uint8_t bit5 : 1;
  1002. uint8_t bit6 : 1;
  1003. uint8_t bit7 : 1;
  1004. } lsm6dso_sensor_hub_5_t;
  1005. #define LSM6DSO_SENSOR_HUB_6 0x07U
  1006. typedef struct {
  1007. uint8_t bit0 : 1;
  1008. uint8_t bit1 : 1;
  1009. uint8_t bit2 : 1;
  1010. uint8_t bit3 : 1;
  1011. uint8_t bit4 : 1;
  1012. uint8_t bit5 : 1;
  1013. uint8_t bit6 : 1;
  1014. uint8_t bit7 : 1;
  1015. } lsm6dso_sensor_hub_6_t;
  1016. #define LSM6DSO_SENSOR_HUB_7 0x08U
  1017. typedef struct {
  1018. uint8_t bit0 : 1;
  1019. uint8_t bit1 : 1;
  1020. uint8_t bit2 : 1;
  1021. uint8_t bit3 : 1;
  1022. uint8_t bit4 : 1;
  1023. uint8_t bit5 : 1;
  1024. uint8_t bit6 : 1;
  1025. uint8_t bit7 : 1;
  1026. } lsm6dso_sensor_hub_7_t;
  1027. #define LSM6DSO_SENSOR_HUB_8 0x09U
  1028. typedef struct {
  1029. uint8_t bit0 : 1;
  1030. uint8_t bit1 : 1;
  1031. uint8_t bit2 : 1;
  1032. uint8_t bit3 : 1;
  1033. uint8_t bit4 : 1;
  1034. uint8_t bit5 : 1;
  1035. uint8_t bit6 : 1;
  1036. uint8_t bit7 : 1;
  1037. } lsm6dso_sensor_hub_8_t;
  1038. #define LSM6DSO_SENSOR_HUB_9 0x0AU
  1039. typedef struct {
  1040. uint8_t bit0 : 1;
  1041. uint8_t bit1 : 1;
  1042. uint8_t bit2 : 1;
  1043. uint8_t bit3 : 1;
  1044. uint8_t bit4 : 1;
  1045. uint8_t bit5 : 1;
  1046. uint8_t bit6 : 1;
  1047. uint8_t bit7 : 1;
  1048. } lsm6dso_sensor_hub_9_t;
  1049. #define LSM6DSO_SENSOR_HUB_10 0x0BU
  1050. typedef struct {
  1051. uint8_t bit0 : 1;
  1052. uint8_t bit1 : 1;
  1053. uint8_t bit2 : 1;
  1054. uint8_t bit3 : 1;
  1055. uint8_t bit4 : 1;
  1056. uint8_t bit5 : 1;
  1057. uint8_t bit6 : 1;
  1058. uint8_t bit7 : 1;
  1059. } lsm6dso_sensor_hub_10_t;
  1060. #define LSM6DSO_SENSOR_HUB_11 0x0CU
  1061. typedef struct {
  1062. uint8_t bit0 : 1;
  1063. uint8_t bit1 : 1;
  1064. uint8_t bit2 : 1;
  1065. uint8_t bit3 : 1;
  1066. uint8_t bit4 : 1;
  1067. uint8_t bit5 : 1;
  1068. uint8_t bit6 : 1;
  1069. uint8_t bit7 : 1;
  1070. } lsm6dso_sensor_hub_11_t;
  1071. #define LSM6DSO_SENSOR_HUB_12 0x0DU
  1072. typedef struct {
  1073. uint8_t bit0 : 1;
  1074. uint8_t bit1 : 1;
  1075. uint8_t bit2 : 1;
  1076. uint8_t bit3 : 1;
  1077. uint8_t bit4 : 1;
  1078. uint8_t bit5 : 1;
  1079. uint8_t bit6 : 1;
  1080. uint8_t bit7 : 1;
  1081. } lsm6dso_sensor_hub_12_t;
  1082. #define LSM6DSO_SENSOR_HUB_13 0x0EU
  1083. typedef struct {
  1084. uint8_t bit0 : 1;
  1085. uint8_t bit1 : 1;
  1086. uint8_t bit2 : 1;
  1087. uint8_t bit3 : 1;
  1088. uint8_t bit4 : 1;
  1089. uint8_t bit5 : 1;
  1090. uint8_t bit6 : 1;
  1091. uint8_t bit7 : 1;
  1092. } lsm6dso_sensor_hub_13_t;
  1093. #define LSM6DSO_SENSOR_HUB_14 0x0FU
  1094. typedef struct {
  1095. uint8_t bit0 : 1;
  1096. uint8_t bit1 : 1;
  1097. uint8_t bit2 : 1;
  1098. uint8_t bit3 : 1;
  1099. uint8_t bit4 : 1;
  1100. uint8_t bit5 : 1;
  1101. uint8_t bit6 : 1;
  1102. uint8_t bit7 : 1;
  1103. } lsm6dso_sensor_hub_14_t;
  1104. #define LSM6DSO_SENSOR_HUB_15 0x10U
  1105. typedef struct {
  1106. uint8_t bit0 : 1;
  1107. uint8_t bit1 : 1;
  1108. uint8_t bit2 : 1;
  1109. uint8_t bit3 : 1;
  1110. uint8_t bit4 : 1;
  1111. uint8_t bit5 : 1;
  1112. uint8_t bit6 : 1;
  1113. uint8_t bit7 : 1;
  1114. } lsm6dso_sensor_hub_15_t;
  1115. #define LSM6DSO_SENSOR_HUB_16 0x11U
  1116. typedef struct {
  1117. uint8_t bit0 : 1;
  1118. uint8_t bit1 : 1;
  1119. uint8_t bit2 : 1;
  1120. uint8_t bit3 : 1;
  1121. uint8_t bit4 : 1;
  1122. uint8_t bit5 : 1;
  1123. uint8_t bit6 : 1;
  1124. uint8_t bit7 : 1;
  1125. } lsm6dso_sensor_hub_16_t;
  1126. #define LSM6DSO_SENSOR_HUB_17 0x12U
  1127. typedef struct {
  1128. uint8_t bit0 : 1;
  1129. uint8_t bit1 : 1;
  1130. uint8_t bit2 : 1;
  1131. uint8_t bit3 : 1;
  1132. uint8_t bit4 : 1;
  1133. uint8_t bit5 : 1;
  1134. uint8_t bit6 : 1;
  1135. uint8_t bit7 : 1;
  1136. } lsm6dso_sensor_hub_17_t;
  1137. #define LSM6DSO_SENSOR_HUB_18 0x13U
  1138. typedef struct {
  1139. uint8_t bit0 : 1;
  1140. uint8_t bit1 : 1;
  1141. uint8_t bit2 : 1;
  1142. uint8_t bit3 : 1;
  1143. uint8_t bit4 : 1;
  1144. uint8_t bit5 : 1;
  1145. uint8_t bit6 : 1;
  1146. uint8_t bit7 : 1;
  1147. } lsm6dso_sensor_hub_18_t;
  1148. #define LSM6DSO_MASTER_CONFIG 0x14U
  1149. typedef struct {
  1150. uint8_t aux_sens_on : 2;
  1151. uint8_t master_on : 1;
  1152. uint8_t shub_pu_en : 1;
  1153. uint8_t pass_through_mode : 1;
  1154. uint8_t start_config : 1;
  1155. uint8_t write_once : 1;
  1156. uint8_t rst_master_regs : 1;
  1157. } lsm6dso_master_config_t;
  1158. #define LSM6DSO_SLV0_ADD 0x15U
  1159. typedef struct {
  1160. uint8_t rw_0 : 1;
  1161. uint8_t slave0 : 7;
  1162. } lsm6dso_slv0_add_t;
  1163. #define LSM6DSO_SLV0_SUBADD 0x16U
  1164. typedef struct {
  1165. uint8_t slave0_reg : 8;
  1166. } lsm6dso_slv0_subadd_t;
  1167. #define LSM6DSO_SLV0_CONFIG 0x17U
  1168. typedef struct {
  1169. uint8_t slave0_numop : 3;
  1170. uint8_t batch_ext_sens_0_en : 1;
  1171. uint8_t not_used_01 : 2;
  1172. uint8_t shub_odr : 2;
  1173. } lsm6dso_slv0_config_t;
  1174. #define LSM6DSO_SLV1_ADD 0x18U
  1175. typedef struct {
  1176. uint8_t r_1 : 1;
  1177. uint8_t slave1_add : 7;
  1178. } lsm6dso_slv1_add_t;
  1179. #define LSM6DSO_SLV1_SUBADD 0x19U
  1180. typedef struct {
  1181. uint8_t slave1_reg : 8;
  1182. } lsm6dso_slv1_subadd_t;
  1183. #define LSM6DSO_SLV1_CONFIG 0x1AU
  1184. typedef struct {
  1185. uint8_t slave1_numop : 3;
  1186. uint8_t batch_ext_sens_1_en : 1;
  1187. uint8_t not_used_01 : 4;
  1188. } lsm6dso_slv1_config_t;
  1189. #define LSM6DSO_SLV2_ADD 0x1BU
  1190. typedef struct {
  1191. uint8_t r_2 : 1;
  1192. uint8_t slave2_add : 7;
  1193. } lsm6dso_slv2_add_t;
  1194. #define LSM6DSO_SLV2_SUBADD 0x1CU
  1195. typedef struct {
  1196. uint8_t slave2_reg : 8;
  1197. } lsm6dso_slv2_subadd_t;
  1198. #define LSM6DSO_SLV2_CONFIG 0x1DU
  1199. typedef struct {
  1200. uint8_t slave2_numop : 3;
  1201. uint8_t batch_ext_sens_2_en : 1;
  1202. uint8_t not_used_01 : 4;
  1203. } lsm6dso_slv2_config_t;
  1204. #define LSM6DSO_SLV3_ADD 0x1EU
  1205. typedef struct {
  1206. uint8_t r_3 : 1;
  1207. uint8_t slave3_add : 7;
  1208. } lsm6dso_slv3_add_t;
  1209. #define LSM6DSO_SLV3_SUBADD 0x1FU
  1210. typedef struct {
  1211. uint8_t slave3_reg : 8;
  1212. } lsm6dso_slv3_subadd_t;
  1213. #define LSM6DSO_SLV3_CONFIG 0x20U
  1214. typedef struct {
  1215. uint8_t slave3_numop : 3;
  1216. uint8_t batch_ext_sens_3_en : 1;
  1217. uint8_t not_used_01 : 4;
  1218. } lsm6dso_slv3_config_t;
  1219. #define LSM6DSO_DATAWRITE_SLV0 0x21U
  1220. typedef struct {
  1221. uint8_t slave0_dataw : 8;
  1222. } lsm6dso_datawrite_src_mode_sub_slv0_t;
  1223. #define LSM6DSO_STATUS_MASTER 0x22U
  1224. typedef struct {
  1225. uint8_t sens_hub_endop : 1;
  1226. uint8_t not_used_01 : 2;
  1227. uint8_t slave0_nack : 1;
  1228. uint8_t slave1_nack : 1;
  1229. uint8_t slave2_nack : 1;
  1230. uint8_t slave3_nack : 1;
  1231. uint8_t wr_once_done : 1;
  1232. } lsm6dso_status_master_t;
  1233. #define LSM6DSO_START_FSM_ADD 0x0400U
  1234. /**
  1235. * @defgroup LSM6DSO_Register_Union
  1236. * @brief This union group all the registers that has a bitfield
  1237. * description.
  1238. * This union is useful but not need by the driver.
  1239. *
  1240. * REMOVING this union you are compliant with:
  1241. * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
  1242. *
  1243. * @{
  1244. *
  1245. */
  1246. typedef union{
  1247. lsm6dso_func_cfg_access_t func_cfg_access;
  1248. lsm6dso_pin_ctrl_t pin_ctrl;
  1249. lsm6dso_fifo_ctrl1_t fifo_ctrl1;
  1250. lsm6dso_fifo_ctrl2_t fifo_ctrl2;
  1251. lsm6dso_fifo_ctrl3_t fifo_ctrl3;
  1252. lsm6dso_fifo_ctrl4_t fifo_ctrl4;
  1253. lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
  1254. lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
  1255. lsm6dso_int1_ctrl_t int1_ctrl;
  1256. lsm6dso_int2_ctrl_t int2_ctrl;
  1257. lsm6dso_ctrl1_xl_t ctrl1_xl;
  1258. lsm6dso_ctrl2_g_t ctrl2_g;
  1259. lsm6dso_ctrl3_c_t ctrl3_c;
  1260. lsm6dso_ctrl4_c_t ctrl4_c;
  1261. lsm6dso_ctrl5_c_t ctrl5_c;
  1262. lsm6dso_ctrl6_c_t ctrl6_c;
  1263. lsm6dso_ctrl7_g_t ctrl7_g;
  1264. lsm6dso_ctrl8_xl_t ctrl8_xl;
  1265. lsm6dso_ctrl9_xl_t ctrl9_xl;
  1266. lsm6dso_ctrl10_c_t ctrl10_c;
  1267. lsm6dso_all_int_src_t all_int_src;
  1268. lsm6dso_wake_up_src_t wake_up_src;
  1269. lsm6dso_tap_src_t tap_src;
  1270. lsm6dso_d6d_src_t d6d_src;
  1271. lsm6dso_status_reg_t status_reg;
  1272. lsm6dso_status_spiaux_t status_spiaux;
  1273. lsm6dso_fifo_status1_t fifo_status1;
  1274. lsm6dso_fifo_status2_t fifo_status2;
  1275. lsm6dso_tap_cfg0_t tap_cfg0;
  1276. lsm6dso_tap_cfg1_t tap_cfg1;
  1277. lsm6dso_tap_cfg2_t tap_cfg2;
  1278. lsm6dso_tap_ths_6d_t tap_ths_6d;
  1279. lsm6dso_int_dur2_t int_dur2;
  1280. lsm6dso_wake_up_ths_t wake_up_ths;
  1281. lsm6dso_wake_up_dur_t wake_up_dur;
  1282. lsm6dso_free_fall_t free_fall;
  1283. lsm6dso_md1_cfg_t md1_cfg;
  1284. lsm6dso_md2_cfg_t md2_cfg;
  1285. lsm6dso_i3c_bus_avb_t i3c_bus_avb;
  1286. lsm6dso_internal_freq_fine_t internal_freq_fine;
  1287. lsm6dso_int_ois_t int_ois;
  1288. lsm6dso_ctrl1_ois_t ctrl1_ois;
  1289. lsm6dso_ctrl2_ois_t ctrl2_ois;
  1290. lsm6dso_ctrl3_ois_t ctrl3_ois;
  1291. lsm6dso_fifo_data_out_tag_t fifo_data_out_tag;
  1292. lsm6dso_page_sel_t page_sel;
  1293. lsm6dso_emb_func_en_a_t emb_func_en_a;
  1294. lsm6dso_emb_func_en_b_t emb_func_en_b;
  1295. lsm6dso_page_address_t page_address;
  1296. lsm6dso_page_value_t page_value;
  1297. lsm6dso_emb_func_int1_t emb_func_int1;
  1298. lsm6dso_fsm_int1_a_t fsm_int1_a;
  1299. lsm6dso_fsm_int1_b_t fsm_int1_b;
  1300. lsm6dso_emb_func_int2_t emb_func_int2;
  1301. lsm6dso_fsm_int2_a_t fsm_int2_a;
  1302. lsm6dso_fsm_int2_b_t fsm_int2_b;
  1303. lsm6dso_emb_func_status_t emb_func_status;
  1304. lsm6dso_fsm_status_a_t fsm_status_a;
  1305. lsm6dso_fsm_status_b_t fsm_status_b;
  1306. lsm6dso_page_rw_t page_rw;
  1307. lsm6dso_emb_func_fifo_cfg_t emb_func_fifo_cfg;
  1308. lsm6dso_fsm_enable_a_t fsm_enable_a;
  1309. lsm6dso_fsm_enable_b_t fsm_enable_b;
  1310. lsm6dso_fsm_long_counter_clear_t fsm_long_counter_clear;
  1311. lsm6dso_fsm_outs1_t fsm_outs1;
  1312. lsm6dso_fsm_outs2_t fsm_outs2;
  1313. lsm6dso_fsm_outs3_t fsm_outs3;
  1314. lsm6dso_fsm_outs4_t fsm_outs4;
  1315. lsm6dso_fsm_outs5_t fsm_outs5;
  1316. lsm6dso_fsm_outs6_t fsm_outs6;
  1317. lsm6dso_fsm_outs7_t fsm_outs7;
  1318. lsm6dso_fsm_outs8_t fsm_outs8;
  1319. lsm6dso_fsm_outs9_t fsm_outs9;
  1320. lsm6dso_fsm_outs10_t fsm_outs10;
  1321. lsm6dso_fsm_outs11_t fsm_outs11;
  1322. lsm6dso_fsm_outs12_t fsm_outs12;
  1323. lsm6dso_fsm_outs13_t fsm_outs13;
  1324. lsm6dso_fsm_outs14_t fsm_outs14;
  1325. lsm6dso_fsm_outs15_t fsm_outs15;
  1326. lsm6dso_fsm_outs16_t fsm_outs16;
  1327. lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
  1328. lsm6dso_emb_func_src_t emb_func_src;
  1329. lsm6dso_emb_func_init_a_t emb_func_init_a;
  1330. lsm6dso_emb_func_init_b_t emb_func_init_b;
  1331. lsm6dso_mag_cfg_a_t mag_cfg_a;
  1332. lsm6dso_mag_cfg_b_t mag_cfg_b;
  1333. lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
  1334. lsm6dso_sensor_hub_1_t sensor_hub_1;
  1335. lsm6dso_sensor_hub_2_t sensor_hub_2;
  1336. lsm6dso_sensor_hub_3_t sensor_hub_3;
  1337. lsm6dso_sensor_hub_4_t sensor_hub_4;
  1338. lsm6dso_sensor_hub_5_t sensor_hub_5;
  1339. lsm6dso_sensor_hub_6_t sensor_hub_6;
  1340. lsm6dso_sensor_hub_7_t sensor_hub_7;
  1341. lsm6dso_sensor_hub_8_t sensor_hub_8;
  1342. lsm6dso_sensor_hub_9_t sensor_hub_9;
  1343. lsm6dso_sensor_hub_10_t sensor_hub_10;
  1344. lsm6dso_sensor_hub_11_t sensor_hub_11;
  1345. lsm6dso_sensor_hub_12_t sensor_hub_12;
  1346. lsm6dso_sensor_hub_13_t sensor_hub_13;
  1347. lsm6dso_sensor_hub_14_t sensor_hub_14;
  1348. lsm6dso_sensor_hub_15_t sensor_hub_15;
  1349. lsm6dso_sensor_hub_16_t sensor_hub_16;
  1350. lsm6dso_sensor_hub_17_t sensor_hub_17;
  1351. lsm6dso_sensor_hub_18_t sensor_hub_18;
  1352. lsm6dso_master_config_t master_config;
  1353. lsm6dso_slv0_add_t slv0_add;
  1354. lsm6dso_slv0_subadd_t slv0_subadd;
  1355. lsm6dso_slv0_config_t slv0_config;
  1356. lsm6dso_slv1_add_t slv1_add;
  1357. lsm6dso_slv1_subadd_t slv1_subadd;
  1358. lsm6dso_slv1_config_t slv1_config;
  1359. lsm6dso_slv2_add_t slv2_add;
  1360. lsm6dso_slv2_subadd_t slv2_subadd;
  1361. lsm6dso_slv2_config_t slv2_config;
  1362. lsm6dso_slv3_add_t slv3_add;
  1363. lsm6dso_slv3_subadd_t slv3_subadd;
  1364. lsm6dso_slv3_config_t slv3_config;
  1365. lsm6dso_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0;
  1366. lsm6dso_status_master_t status_master;
  1367. bitwise_t bitwise;
  1368. uint8_t byte;
  1369. } lsm6dso_reg_t;
  1370. /**
  1371. * @}
  1372. *
  1373. */
  1374. int32_t lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t* data,
  1375. uint16_t len);
  1376. int32_t lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t* data,
  1377. uint16_t len);
  1378. extern float_t lsm6dso_from_fs2_to_mg(int16_t lsb);
  1379. extern float_t lsm6dso_from_fs4_to_mg(int16_t lsb);
  1380. extern float_t lsm6dso_from_fs8_to_mg(int16_t lsb);
  1381. extern float_t lsm6dso_from_fs16_to_mg(int16_t lsb);
  1382. extern float_t lsm6dso_from_fs125_to_mdps(int16_t lsb);
  1383. extern float_t lsm6dso_from_fs500_to_mdps(int16_t lsb);
  1384. extern float_t lsm6dso_from_fs250_to_mdps(int16_t lsb);
  1385. extern float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb);
  1386. extern float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb);
  1387. extern float_t lsm6dso_from_lsb_to_celsius(int16_t lsb);
  1388. extern float_t lsm6dso_from_lsb_to_nsec(int16_t lsb);
  1389. typedef enum {
  1390. LSM6DSO_2g = 0,
  1391. LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */
  1392. LSM6DSO_4g = 2,
  1393. LSM6DSO_8g = 3,
  1394. } lsm6dso_fs_xl_t;
  1395. int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx, lsm6dso_fs_xl_t val);
  1396. int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx, lsm6dso_fs_xl_t *val);
  1397. typedef enum {
  1398. LSM6DSO_XL_ODR_OFF = 0,
  1399. LSM6DSO_XL_ODR_12Hz5 = 1,
  1400. LSM6DSO_XL_ODR_26Hz = 2,
  1401. LSM6DSO_XL_ODR_52Hz = 3,
  1402. LSM6DSO_XL_ODR_104Hz = 4,
  1403. LSM6DSO_XL_ODR_208Hz = 5,
  1404. LSM6DSO_XL_ODR_417Hz = 6,
  1405. LSM6DSO_XL_ODR_833Hz = 7,
  1406. LSM6DSO_XL_ODR_1667Hz = 8,
  1407. LSM6DSO_XL_ODR_3333Hz = 9,
  1408. LSM6DSO_XL_ODR_6667Hz = 10,
  1409. LSM6DSO_XL_ODR_1Hz6 = 11, /* (low power only) */
  1410. } lsm6dso_odr_xl_t;
  1411. int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx, lsm6dso_odr_xl_t val);
  1412. int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx, lsm6dso_odr_xl_t *val);
  1413. typedef enum {
  1414. LSM6DSO_250dps = 0,
  1415. LSM6DSO_125dps = 1,
  1416. LSM6DSO_500dps = 2,
  1417. LSM6DSO_1000dps = 4,
  1418. LSM6DSO_2000dps = 6,
  1419. } lsm6dso_fs_g_t;
  1420. int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx, lsm6dso_fs_g_t val);
  1421. int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx, lsm6dso_fs_g_t *val);
  1422. typedef enum {
  1423. LSM6DSO_GY_ODR_OFF = 0,
  1424. LSM6DSO_GY_ODR_12Hz5 = 1,
  1425. LSM6DSO_GY_ODR_26Hz = 2,
  1426. LSM6DSO_GY_ODR_52Hz = 3,
  1427. LSM6DSO_GY_ODR_104Hz = 4,
  1428. LSM6DSO_GY_ODR_208Hz = 5,
  1429. LSM6DSO_GY_ODR_417Hz = 6,
  1430. LSM6DSO_GY_ODR_833Hz = 7,
  1431. LSM6DSO_GY_ODR_1667Hz = 8,
  1432. LSM6DSO_GY_ODR_3333Hz = 9,
  1433. LSM6DSO_GY_ODR_6667Hz = 10,
  1434. } lsm6dso_odr_g_t;
  1435. int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx, lsm6dso_odr_g_t val);
  1436. int32_t lsm6dso_gy_data_rate_get(stmdev_ctx_t *ctx, lsm6dso_odr_g_t *val);
  1437. int32_t lsm6dso_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val);
  1438. int32_t lsm6dso_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val);
  1439. typedef enum {
  1440. LSM6DSO_LSb_1mg = 0,
  1441. LSM6DSO_LSb_16mg = 1,
  1442. } lsm6dso_usr_off_w_t;
  1443. int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
  1444. lsm6dso_usr_off_w_t val);
  1445. int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
  1446. lsm6dso_usr_off_w_t *val);
  1447. typedef enum {
  1448. LSM6DSO_HIGH_PERFORMANCE_MD = 0,
  1449. LSM6DSO_LOW_NORMAL_POWER_MD = 1,
  1450. LSM6DSO_ULTRA_LOW_POWER_MD = 2,
  1451. } lsm6dso_xl_hm_mode_t;
  1452. int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
  1453. lsm6dso_xl_hm_mode_t val);
  1454. int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
  1455. lsm6dso_xl_hm_mode_t *val);
  1456. typedef enum {
  1457. LSM6DSO_GY_HIGH_PERFORMANCE = 0,
  1458. LSM6DSO_GY_NORMAL = 1,
  1459. } lsm6dso_g_hm_mode_t;
  1460. int32_t lsm6dso_gy_power_mode_set(stmdev_ctx_t *ctx,
  1461. lsm6dso_g_hm_mode_t val);
  1462. int32_t lsm6dso_gy_power_mode_get(stmdev_ctx_t *ctx,
  1463. lsm6dso_g_hm_mode_t *val);
  1464. typedef struct {
  1465. lsm6dso_all_int_src_t all_int_src;
  1466. lsm6dso_wake_up_src_t wake_up_src;
  1467. lsm6dso_tap_src_t tap_src;
  1468. lsm6dso_d6d_src_t d6d_src;
  1469. lsm6dso_status_reg_t status_reg;
  1470. lsm6dso_emb_func_status_t emb_func_status;
  1471. lsm6dso_fsm_status_a_t fsm_status_a;
  1472. lsm6dso_fsm_status_b_t fsm_status_b;
  1473. } lsm6dso_all_sources_t;
  1474. int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
  1475. lsm6dso_all_sources_t *val);
  1476. int32_t lsm6dso_status_reg_get(stmdev_ctx_t *ctx,
  1477. lsm6dso_status_reg_t *val);
  1478. int32_t lsm6dso_xl_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val);
  1479. int32_t lsm6dso_gy_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val);
  1480. int32_t lsm6dso_temp_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val);
  1481. int32_t lsm6dso_xl_usr_offset_x_set(stmdev_ctx_t *ctx, uint8_t *buff);
  1482. int32_t lsm6dso_xl_usr_offset_x_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1483. int32_t lsm6dso_xl_usr_offset_y_set(stmdev_ctx_t *ctx, uint8_t *buff);
  1484. int32_t lsm6dso_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1485. int32_t lsm6dso_xl_usr_offset_z_set(stmdev_ctx_t *ctx, uint8_t *buff);
  1486. int32_t lsm6dso_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1487. int32_t lsm6dso_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val);
  1488. int32_t lsm6dso_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val);
  1489. int32_t lsm6dso_timestamp_rst(stmdev_ctx_t *ctx);
  1490. int32_t lsm6dso_timestamp_set(stmdev_ctx_t *ctx, uint8_t val);
  1491. int32_t lsm6dso_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val);
  1492. int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1493. typedef enum {
  1494. LSM6DSO_NO_ROUND = 0,
  1495. LSM6DSO_ROUND_XL = 1,
  1496. LSM6DSO_ROUND_GY = 2,
  1497. LSM6DSO_ROUND_GY_XL = 3,
  1498. } lsm6dso_rounding_t;
  1499. int32_t lsm6dso_rounding_mode_set(stmdev_ctx_t *ctx,
  1500. lsm6dso_rounding_t val);
  1501. int32_t lsm6dso_rounding_mode_get(stmdev_ctx_t *ctx,
  1502. lsm6dso_rounding_t *val);
  1503. int32_t lsm6dso_temperature_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1504. int32_t lsm6dso_angular_rate_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1505. int32_t lsm6dso_acceleration_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1506. int32_t lsm6dso_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1507. int32_t lsm6dso_number_of_steps_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1508. int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx);
  1509. int32_t lsm6dso_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val);
  1510. int32_t lsm6dso_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val);
  1511. typedef enum {
  1512. LSM6DSO_USER_BANK = 0,
  1513. LSM6DSO_SENSOR_HUB_BANK = 1,
  1514. LSM6DSO_EMBEDDED_FUNC_BANK = 2,
  1515. } lsm6dso_reg_access_t;
  1516. int32_t lsm6dso_mem_bank_set(stmdev_ctx_t *ctx, lsm6dso_reg_access_t val);
  1517. int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx, lsm6dso_reg_access_t *val);
  1518. int32_t lsm6dso_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address,
  1519. uint8_t *val);
  1520. int32_t lsm6dso_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
  1521. uint8_t *val);
  1522. int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
  1523. uint8_t *buf, uint8_t len);
  1524. int32_t lsm6dso_ln_pg_read(stmdev_ctx_t *ctx, uint16_t address,
  1525. uint8_t *val);
  1526. typedef enum {
  1527. LSM6DSO_DRDY_LATCHED = 0,
  1528. LSM6DSO_DRDY_PULSED = 1,
  1529. } lsm6dso_dataready_pulsed_t;
  1530. int32_t lsm6dso_data_ready_mode_set(stmdev_ctx_t *ctx,
  1531. lsm6dso_dataready_pulsed_t val);
  1532. int32_t lsm6dso_data_ready_mode_get(stmdev_ctx_t *ctx,
  1533. lsm6dso_dataready_pulsed_t *val);
  1534. int32_t lsm6dso_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff);
  1535. int32_t lsm6dso_reset_set(stmdev_ctx_t *ctx, uint8_t val);
  1536. int32_t lsm6dso_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
  1537. int32_t lsm6dso_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val);
  1538. int32_t lsm6dso_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val);
  1539. int32_t lsm6dso_boot_set(stmdev_ctx_t *ctx, uint8_t val);
  1540. int32_t lsm6dso_boot_get(stmdev_ctx_t *ctx, uint8_t *val);
  1541. typedef enum {
  1542. LSM6DSO_XL_ST_DISABLE = 0,
  1543. LSM6DSO_XL_ST_POSITIVE = 1,
  1544. LSM6DSO_XL_ST_NEGATIVE = 2,
  1545. } lsm6dso_st_xl_t;
  1546. int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx, lsm6dso_st_xl_t val);
  1547. int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx, lsm6dso_st_xl_t *val);
  1548. typedef enum {
  1549. LSM6DSO_GY_ST_DISABLE = 0,
  1550. LSM6DSO_GY_ST_POSITIVE = 1,
  1551. LSM6DSO_GY_ST_NEGATIVE = 3,
  1552. } lsm6dso_st_g_t;
  1553. int32_t lsm6dso_gy_self_test_set(stmdev_ctx_t *ctx, lsm6dso_st_g_t val);
  1554. int32_t lsm6dso_gy_self_test_get(stmdev_ctx_t *ctx, lsm6dso_st_g_t *val);
  1555. int32_t lsm6dso_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val);
  1556. int32_t lsm6dso_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val);
  1557. int32_t lsm6dso_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val);
  1558. int32_t lsm6dso_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val);
  1559. int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
  1560. uint8_t val);
  1561. int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
  1562. uint8_t *val);
  1563. typedef enum {
  1564. LSM6DSO_ULTRA_LIGHT = 0,
  1565. LSM6DSO_VERY_LIGHT = 1,
  1566. LSM6DSO_LIGHT = 2,
  1567. LSM6DSO_MEDIUM = 3,
  1568. LSM6DSO_STRONG = 4, /* not available for data rate > 1k670Hz */
  1569. LSM6DSO_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */
  1570. LSM6DSO_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */
  1571. LSM6DSO_XTREME = 7, /* not available for data rate > 1k670Hz */
  1572. } lsm6dso_ftype_t;
  1573. int32_t lsm6dso_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  1574. lsm6dso_ftype_t val);
  1575. int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  1576. lsm6dso_ftype_t *val);
  1577. int32_t lsm6dso_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val);
  1578. int32_t lsm6dso_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val);
  1579. typedef enum {
  1580. LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00,
  1581. LSM6DSO_SLOPE_ODR_DIV_4 = 0x10,
  1582. LSM6DSO_HP_ODR_DIV_10 = 0x11,
  1583. LSM6DSO_HP_ODR_DIV_20 = 0x12,
  1584. LSM6DSO_HP_ODR_DIV_45 = 0x13,
  1585. LSM6DSO_HP_ODR_DIV_100 = 0x14,
  1586. LSM6DSO_HP_ODR_DIV_200 = 0x15,
  1587. LSM6DSO_HP_ODR_DIV_400 = 0x16,
  1588. LSM6DSO_HP_ODR_DIV_800 = 0x17,
  1589. LSM6DSO_HP_REF_MD_ODR_DIV_10 = 0x31,
  1590. LSM6DSO_HP_REF_MD_ODR_DIV_20 = 0x32,
  1591. LSM6DSO_HP_REF_MD_ODR_DIV_45 = 0x33,
  1592. LSM6DSO_HP_REF_MD_ODR_DIV_100 = 0x34,
  1593. LSM6DSO_HP_REF_MD_ODR_DIV_200 = 0x35,
  1594. LSM6DSO_HP_REF_MD_ODR_DIV_400 = 0x36,
  1595. LSM6DSO_HP_REF_MD_ODR_DIV_800 = 0x37,
  1596. LSM6DSO_LP_ODR_DIV_10 = 0x01,
  1597. LSM6DSO_LP_ODR_DIV_20 = 0x02,
  1598. LSM6DSO_LP_ODR_DIV_45 = 0x03,
  1599. LSM6DSO_LP_ODR_DIV_100 = 0x04,
  1600. LSM6DSO_LP_ODR_DIV_200 = 0x05,
  1601. LSM6DSO_LP_ODR_DIV_400 = 0x06,
  1602. LSM6DSO_LP_ODR_DIV_800 = 0x07,
  1603. } lsm6dso_hp_slope_xl_en_t;
  1604. int32_t lsm6dso_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
  1605. lsm6dso_hp_slope_xl_en_t val);
  1606. int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
  1607. lsm6dso_hp_slope_xl_en_t *val);
  1608. int32_t lsm6dso_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val);
  1609. int32_t lsm6dso_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val);
  1610. typedef enum {
  1611. LSM6DSO_USE_SLOPE = 0,
  1612. LSM6DSO_USE_HPF = 1,
  1613. } lsm6dso_slope_fds_t;
  1614. int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
  1615. lsm6dso_slope_fds_t val);
  1616. int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
  1617. lsm6dso_slope_fds_t *val);
  1618. typedef enum {
  1619. LSM6DSO_HP_FILTER_NONE = 0x00,
  1620. LSM6DSO_HP_FILTER_16mHz = 0x80,
  1621. LSM6DSO_HP_FILTER_65mHz = 0x81,
  1622. LSM6DSO_HP_FILTER_260mHz = 0x82,
  1623. LSM6DSO_HP_FILTER_1Hz04 = 0x83,
  1624. } lsm6dso_hpm_g_t;
  1625. int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
  1626. lsm6dso_hpm_g_t val);
  1627. int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
  1628. lsm6dso_hpm_g_t *val);
  1629. typedef enum {
  1630. LSM6DSO_AUX_PULL_UP_DISC = 0,
  1631. LSM6DSO_AUX_PULL_UP_CONNECT = 1,
  1632. } lsm6dso_ois_pu_dis_t;
  1633. int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
  1634. lsm6dso_ois_pu_dis_t val);
  1635. int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
  1636. lsm6dso_ois_pu_dis_t *val);
  1637. typedef enum {
  1638. LSM6DSO_AUX_ON = 1,
  1639. LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0,
  1640. } lsm6dso_ois_on_t;
  1641. int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx, lsm6dso_ois_on_t val);
  1642. int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx, lsm6dso_ois_on_t *val);
  1643. typedef enum {
  1644. LSM6DSO_USE_SAME_XL_FS = 0,
  1645. LSM6DSO_USE_DIFFERENT_XL_FS = 1,
  1646. } lsm6dso_xl_fs_mode_t;
  1647. int32_t lsm6dso_aux_xl_fs_mode_set(stmdev_ctx_t *ctx,
  1648. lsm6dso_xl_fs_mode_t val);
  1649. int32_t lsm6dso_aux_xl_fs_mode_get(stmdev_ctx_t *ctx,
  1650. lsm6dso_xl_fs_mode_t *val);
  1651. int32_t lsm6dso_aux_status_reg_get(stmdev_ctx_t *ctx,
  1652. lsm6dso_status_spiaux_t *val);
  1653. int32_t lsm6dso_aux_xl_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val);
  1654. int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val);
  1655. int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx, uint8_t *val);
  1656. typedef enum {
  1657. LSM6DSO_AUX_XL_DISABLE = 0,
  1658. LSM6DSO_AUX_XL_POS = 1,
  1659. LSM6DSO_AUX_XL_NEG = 2,
  1660. } lsm6dso_st_xl_ois_t;
  1661. int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
  1662. lsm6dso_st_xl_ois_t val);
  1663. int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
  1664. lsm6dso_st_xl_ois_t *val);
  1665. typedef enum {
  1666. LSM6DSO_AUX_DEN_ACTIVE_LOW = 0,
  1667. LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1,
  1668. } lsm6dso_den_lh_ois_t;
  1669. int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
  1670. lsm6dso_den_lh_ois_t val);
  1671. int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
  1672. lsm6dso_den_lh_ois_t *val);
  1673. typedef enum {
  1674. LSM6DSO_AUX_DEN_DISABLE = 0,
  1675. LSM6DSO_AUX_DEN_LEVEL_LATCH = 3,
  1676. LSM6DSO_AUX_DEN_LEVEL_TRIG = 2,
  1677. } lsm6dso_lvl2_ois_t;
  1678. int32_t lsm6dso_aux_den_mode_set(stmdev_ctx_t *ctx, lsm6dso_lvl2_ois_t val);
  1679. int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx, lsm6dso_lvl2_ois_t *val);
  1680. int32_t lsm6dso_aux_drdy_on_int2_set(stmdev_ctx_t *ctx, uint8_t val);
  1681. int32_t lsm6dso_aux_drdy_on_int2_get(stmdev_ctx_t *ctx, uint8_t *val);
  1682. typedef enum {
  1683. LSM6DSO_AUX_DISABLE = 0,
  1684. LSM6DSO_MODE_3_GY = 1,
  1685. LSM6DSO_MODE_4_GY_XL = 3,
  1686. } lsm6dso_ois_en_spi2_t;
  1687. int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx, lsm6dso_ois_en_spi2_t val);
  1688. int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val);
  1689. typedef enum {
  1690. LSM6DSO_250dps_AUX = 0,
  1691. LSM6DSO_125dps_AUX = 1,
  1692. LSM6DSO_500dps_AUX = 2,
  1693. LSM6DSO_1000dps_AUX = 4,
  1694. LSM6DSO_2000dps_AUX = 6,
  1695. } lsm6dso_fs_g_ois_t;
  1696. int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
  1697. lsm6dso_fs_g_ois_t val);
  1698. int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
  1699. lsm6dso_fs_g_ois_t *val);
  1700. typedef enum {
  1701. LSM6DSO_AUX_SPI_4_WIRE = 0,
  1702. LSM6DSO_AUX_SPI_3_WIRE = 1,
  1703. } lsm6dso_sim_ois_t;
  1704. int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_ois_t val);
  1705. int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_ois_t *val);
  1706. typedef enum {
  1707. LSM6DSO_351Hz39 = 0,
  1708. LSM6DSO_236Hz63 = 1,
  1709. LSM6DSO_172Hz70 = 2,
  1710. LSM6DSO_937Hz91 = 3,
  1711. } lsm6dso_ftype_ois_t;
  1712. int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
  1713. lsm6dso_ftype_ois_t val);
  1714. int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
  1715. lsm6dso_ftype_ois_t *val);
  1716. typedef enum {
  1717. LSM6DSO_AUX_HP_DISABLE = 0x00,
  1718. LSM6DSO_AUX_HP_Hz016 = 0x10,
  1719. LSM6DSO_AUX_HP_Hz065 = 0x11,
  1720. LSM6DSO_AUX_HP_Hz260 = 0x12,
  1721. LSM6DSO_AUX_HP_1Hz040 = 0x13,
  1722. } lsm6dso_hpm_ois_t;
  1723. int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
  1724. lsm6dso_hpm_ois_t val);
  1725. int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
  1726. lsm6dso_hpm_ois_t *val);
  1727. typedef enum {
  1728. LSM6DSO_ENABLE_CLAMP = 0,
  1729. LSM6DSO_DISABLE_CLAMP = 1,
  1730. } lsm6dso_st_ois_clampdis_t;
  1731. int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
  1732. lsm6dso_st_ois_clampdis_t val);
  1733. int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
  1734. lsm6dso_st_ois_clampdis_t *val);
  1735. typedef enum {
  1736. LSM6DSO_AUX_GY_DISABLE = 0,
  1737. LSM6DSO_AUX_GY_POS = 1,
  1738. LSM6DSO_AUX_GY_NEG = 3,
  1739. } lsm6dso_st_ois_t;
  1740. int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
  1741. lsm6dso_st_ois_t val);
  1742. int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
  1743. lsm6dso_st_ois_t *val);
  1744. typedef enum {
  1745. LSM6DSO_289Hz = 0,
  1746. LSM6DSO_258Hz = 1,
  1747. LSM6DSO_120Hz = 2,
  1748. LSM6DSO_65Hz2 = 3,
  1749. LSM6DSO_33Hz2 = 4,
  1750. LSM6DSO_16Hz6 = 5,
  1751. LSM6DSO_8Hz30 = 6,
  1752. LSM6DSO_4Hz15 = 7,
  1753. } lsm6dso_filter_xl_conf_ois_t;
  1754. int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
  1755. lsm6dso_filter_xl_conf_ois_t val);
  1756. int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
  1757. lsm6dso_filter_xl_conf_ois_t *val);
  1758. typedef enum {
  1759. LSM6DSO_AUX_2g = 0,
  1760. LSM6DSO_AUX_16g = 1,
  1761. LSM6DSO_AUX_4g = 2,
  1762. LSM6DSO_AUX_8g = 3,
  1763. } lsm6dso_fs_xl_ois_t;
  1764. int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
  1765. lsm6dso_fs_xl_ois_t val);
  1766. int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
  1767. lsm6dso_fs_xl_ois_t *val);
  1768. typedef enum {
  1769. LSM6DSO_PULL_UP_DISC = 0,
  1770. LSM6DSO_PULL_UP_CONNECT = 1,
  1771. } lsm6dso_sdo_pu_en_t;
  1772. int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
  1773. lsm6dso_sdo_pu_en_t val);
  1774. int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
  1775. lsm6dso_sdo_pu_en_t *val);
  1776. typedef enum {
  1777. LSM6DSO_SPI_4_WIRE = 0,
  1778. LSM6DSO_SPI_3_WIRE = 1,
  1779. } lsm6dso_sim_t;
  1780. int32_t lsm6dso_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_t val);
  1781. int32_t lsm6dso_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_t *val);
  1782. typedef enum {
  1783. LSM6DSO_I2C_ENABLE = 0,
  1784. LSM6DSO_I2C_DISABLE = 1,
  1785. } lsm6dso_i2c_disable_t;
  1786. int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
  1787. lsm6dso_i2c_disable_t val);
  1788. int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
  1789. lsm6dso_i2c_disable_t *val);
  1790. typedef enum {
  1791. LSM6DSO_I3C_DISABLE = 0x80,
  1792. LSM6DSO_I3C_ENABLE_T_50us = 0x00,
  1793. LSM6DSO_I3C_ENABLE_T_2us = 0x01,
  1794. LSM6DSO_I3C_ENABLE_T_1ms = 0x02,
  1795. LSM6DSO_I3C_ENABLE_T_25ms = 0x03,
  1796. } lsm6dso_i3c_disable_t;
  1797. int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
  1798. lsm6dso_i3c_disable_t val);
  1799. int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
  1800. lsm6dso_i3c_disable_t *val);
  1801. typedef enum {
  1802. LSM6DSO_PULL_DOWN_DISC = 0,
  1803. LSM6DSO_PULL_DOWN_CONNECT = 1,
  1804. } lsm6dso_int1_pd_en_t;
  1805. int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
  1806. lsm6dso_int1_pd_en_t val);
  1807. int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
  1808. lsm6dso_int1_pd_en_t *val);
  1809. typedef struct {
  1810. lsm6dso_int1_ctrl_t int1_ctrl;
  1811. lsm6dso_md1_cfg_t md1_cfg;
  1812. lsm6dso_emb_func_int1_t emb_func_int1;
  1813. lsm6dso_fsm_int1_a_t fsm_int1_a;
  1814. lsm6dso_fsm_int1_b_t fsm_int1_b;
  1815. } lsm6dso_pin_int1_route_t;
  1816. int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
  1817. lsm6dso_pin_int1_route_t *val);
  1818. int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
  1819. lsm6dso_pin_int1_route_t *val);
  1820. typedef struct {
  1821. lsm6dso_int2_ctrl_t int2_ctrl;
  1822. lsm6dso_md2_cfg_t md2_cfg;
  1823. lsm6dso_emb_func_int2_t emb_func_int2;
  1824. lsm6dso_fsm_int2_a_t fsm_int2_a;
  1825. lsm6dso_fsm_int2_b_t fsm_int2_b;
  1826. } lsm6dso_pin_int2_route_t;
  1827. int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
  1828. lsm6dso_pin_int2_route_t *val);
  1829. int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
  1830. lsm6dso_pin_int2_route_t *val);
  1831. typedef enum {
  1832. LSM6DSO_PUSH_PULL = 0,
  1833. LSM6DSO_OPEN_DRAIN = 1,
  1834. } lsm6dso_pp_od_t;
  1835. int32_t lsm6dso_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_pp_od_t val);
  1836. int32_t lsm6dso_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_pp_od_t *val);
  1837. typedef enum {
  1838. LSM6DSO_ACTIVE_HIGH = 0,
  1839. LSM6DSO_ACTIVE_LOW = 1,
  1840. } lsm6dso_h_lactive_t;
  1841. int32_t lsm6dso_pin_polarity_set(stmdev_ctx_t *ctx,
  1842. lsm6dso_h_lactive_t val);
  1843. int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
  1844. lsm6dso_h_lactive_t *val);
  1845. int32_t lsm6dso_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val);
  1846. int32_t lsm6dso_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val);
  1847. typedef enum {
  1848. LSM6DSO_ALL_INT_PULSED = 0,
  1849. LSM6DSO_BASE_LATCHED_EMB_PULSED = 1,
  1850. LSM6DSO_BASE_PULSED_EMB_LATCHED = 2,
  1851. LSM6DSO_ALL_INT_LATCHED = 3,
  1852. } lsm6dso_lir_t;
  1853. int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx, lsm6dso_lir_t val);
  1854. int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx, lsm6dso_lir_t *val);
  1855. typedef enum {
  1856. LSM6DSO_LSb_FS_DIV_64 = 0,
  1857. LSM6DSO_LSb_FS_DIV_256 = 1,
  1858. } lsm6dso_wake_ths_w_t;
  1859. int32_t lsm6dso_wkup_ths_weight_set(stmdev_ctx_t *ctx,
  1860. lsm6dso_wake_ths_w_t val);
  1861. int32_t lsm6dso_wkup_ths_weight_get(stmdev_ctx_t *ctx,
  1862. lsm6dso_wake_ths_w_t *val);
  1863. int32_t lsm6dso_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val);
  1864. int32_t lsm6dso_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val);
  1865. int32_t lsm6dso_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx, uint8_t val);
  1866. int32_t lsm6dso_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx, uint8_t *val);
  1867. int32_t lsm6dso_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val);
  1868. int32_t lsm6dso_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
  1869. int32_t lsm6dso_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val);
  1870. int32_t lsm6dso_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
  1871. typedef enum {
  1872. LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0,
  1873. LSM6DSO_DRIVE_SLEEP_STATUS = 1,
  1874. } lsm6dso_sleep_status_on_int_t;
  1875. int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
  1876. lsm6dso_sleep_status_on_int_t val);
  1877. int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
  1878. lsm6dso_sleep_status_on_int_t *val);
  1879. typedef enum {
  1880. LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0,
  1881. LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1,
  1882. LSM6DSO_XL_12Hz5_GY_SLEEP = 2,
  1883. LSM6DSO_XL_12Hz5_GY_PD = 3,
  1884. } lsm6dso_inact_en_t;
  1885. int32_t lsm6dso_act_mode_set(stmdev_ctx_t *ctx, lsm6dso_inact_en_t val);
  1886. int32_t lsm6dso_act_mode_get(stmdev_ctx_t *ctx, lsm6dso_inact_en_t *val);
  1887. int32_t lsm6dso_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val);
  1888. int32_t lsm6dso_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
  1889. int32_t lsm6dso_tap_detection_on_z_set(stmdev_ctx_t *ctx, uint8_t val);
  1890. int32_t lsm6dso_tap_detection_on_z_get(stmdev_ctx_t *ctx, uint8_t *val);
  1891. int32_t lsm6dso_tap_detection_on_y_set(stmdev_ctx_t *ctx, uint8_t val);
  1892. int32_t lsm6dso_tap_detection_on_y_get(stmdev_ctx_t *ctx, uint8_t *val);
  1893. int32_t lsm6dso_tap_detection_on_x_set(stmdev_ctx_t *ctx, uint8_t val);
  1894. int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx, uint8_t *val);
  1895. int32_t lsm6dso_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val);
  1896. int32_t lsm6dso_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val);
  1897. typedef enum {
  1898. LSM6DSO_XYZ = 0,
  1899. LSM6DSO_YXZ = 1,
  1900. LSM6DSO_XZY = 2,
  1901. LSM6DSO_ZYX = 3,
  1902. LSM6DSO_YZX = 5,
  1903. LSM6DSO_ZXY = 6,
  1904. } lsm6dso_tap_priority_t;
  1905. int32_t lsm6dso_tap_axis_priority_set(stmdev_ctx_t *ctx,
  1906. lsm6dso_tap_priority_t val);
  1907. int32_t lsm6dso_tap_axis_priority_get(stmdev_ctx_t *ctx,
  1908. lsm6dso_tap_priority_t *val);
  1909. int32_t lsm6dso_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val);
  1910. int32_t lsm6dso_tap_threshold_y_get(stmdev_ctx_t *ctx, uint8_t *val);
  1911. int32_t lsm6dso_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val);
  1912. int32_t lsm6dso_tap_threshold_z_get(stmdev_ctx_t *ctx, uint8_t *val);
  1913. int32_t lsm6dso_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val);
  1914. int32_t lsm6dso_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val);
  1915. int32_t lsm6dso_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val);
  1916. int32_t lsm6dso_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val);
  1917. int32_t lsm6dso_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val);
  1918. int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
  1919. typedef enum {
  1920. LSM6DSO_ONLY_SINGLE = 0,
  1921. LSM6DSO_BOTH_SINGLE_DOUBLE = 1,
  1922. } lsm6dso_single_double_tap_t;
  1923. int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
  1924. lsm6dso_single_double_tap_t val);
  1925. int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
  1926. lsm6dso_single_double_tap_t *val);
  1927. typedef enum {
  1928. LSM6DSO_DEG_80 = 0,
  1929. LSM6DSO_DEG_70 = 1,
  1930. LSM6DSO_DEG_60 = 2,
  1931. LSM6DSO_DEG_50 = 3,
  1932. } lsm6dso_sixd_ths_t;
  1933. int32_t lsm6dso_6d_threshold_set(stmdev_ctx_t *ctx, lsm6dso_sixd_ths_t val);
  1934. int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx, lsm6dso_sixd_ths_t *val);
  1935. int32_t lsm6dso_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val);
  1936. int32_t lsm6dso_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
  1937. typedef enum {
  1938. LSM6DSO_FF_TSH_156mg = 0,
  1939. LSM6DSO_FF_TSH_219mg = 1,
  1940. LSM6DSO_FF_TSH_250mg = 2,
  1941. LSM6DSO_FF_TSH_312mg = 3,
  1942. LSM6DSO_FF_TSH_344mg = 4,
  1943. LSM6DSO_FF_TSH_406mg = 5,
  1944. LSM6DSO_FF_TSH_469mg = 6,
  1945. LSM6DSO_FF_TSH_500mg = 7,
  1946. } lsm6dso_ff_ths_t;
  1947. int32_t lsm6dso_ff_threshold_set(stmdev_ctx_t *ctx, lsm6dso_ff_ths_t val);
  1948. int32_t lsm6dso_ff_threshold_get(stmdev_ctx_t *ctx, lsm6dso_ff_ths_t *val);
  1949. int32_t lsm6dso_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val);
  1950. int32_t lsm6dso_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
  1951. int32_t lsm6dso_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val);
  1952. int32_t lsm6dso_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val);
  1953. int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx, uint8_t val);
  1954. int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx, uint8_t *val);
  1955. typedef enum {
  1956. LSM6DSO_CMP_DISABLE = 0x00,
  1957. LSM6DSO_CMP_ALWAYS = 0x04,
  1958. LSM6DSO_CMP_8_TO_1 = 0x05,
  1959. LSM6DSO_CMP_16_TO_1 = 0x06,
  1960. LSM6DSO_CMP_32_TO_1 = 0x07,
  1961. } lsm6dso_uncoptr_rate_t;
  1962. int32_t lsm6dso_compression_algo_set(stmdev_ctx_t *ctx,
  1963. lsm6dso_uncoptr_rate_t val);
  1964. int32_t lsm6dso_compression_algo_get(stmdev_ctx_t *ctx,
  1965. lsm6dso_uncoptr_rate_t *val);
  1966. int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
  1967. uint8_t val);
  1968. int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
  1969. uint8_t *val);
  1970. int32_t lsm6dso_compression_algo_real_time_set(stmdev_ctx_t *ctx,
  1971. uint8_t val);
  1972. int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
  1973. uint8_t *val);
  1974. int32_t lsm6dso_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val);
  1975. int32_t lsm6dso_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val);
  1976. typedef enum {
  1977. LSM6DSO_XL_NOT_BATCHED = 0,
  1978. LSM6DSO_XL_BATCHED_AT_12Hz5 = 1,
  1979. LSM6DSO_XL_BATCHED_AT_26Hz = 2,
  1980. LSM6DSO_XL_BATCHED_AT_52Hz = 3,
  1981. LSM6DSO_XL_BATCHED_AT_104Hz = 4,
  1982. LSM6DSO_XL_BATCHED_AT_208Hz = 5,
  1983. LSM6DSO_XL_BATCHED_AT_417Hz = 6,
  1984. LSM6DSO_XL_BATCHED_AT_833Hz = 7,
  1985. LSM6DSO_XL_BATCHED_AT_1667Hz = 8,
  1986. LSM6DSO_XL_BATCHED_AT_3333Hz = 9,
  1987. LSM6DSO_XL_BATCHED_AT_6667Hz = 10,
  1988. LSM6DSO_XL_BATCHED_AT_6Hz5 = 11,
  1989. } lsm6dso_bdr_xl_t;
  1990. int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx, lsm6dso_bdr_xl_t val);
  1991. int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx, lsm6dso_bdr_xl_t *val);
  1992. typedef enum {
  1993. LSM6DSO_GY_NOT_BATCHED = 0,
  1994. LSM6DSO_GY_BATCHED_AT_12Hz5 = 1,
  1995. LSM6DSO_GY_BATCHED_AT_26Hz = 2,
  1996. LSM6DSO_GY_BATCHED_AT_52Hz = 3,
  1997. LSM6DSO_GY_BATCHED_AT_104Hz = 4,
  1998. LSM6DSO_GY_BATCHED_AT_208Hz = 5,
  1999. LSM6DSO_GY_BATCHED_AT_417Hz = 6,
  2000. LSM6DSO_GY_BATCHED_AT_833Hz = 7,
  2001. LSM6DSO_GY_BATCHED_AT_1667Hz = 8,
  2002. LSM6DSO_GY_BATCHED_AT_3333Hz = 9,
  2003. LSM6DSO_GY_BATCHED_AT_6667Hz = 10,
  2004. LSM6DSO_GY_BATCHED_AT_6Hz5 = 11,
  2005. } lsm6dso_bdr_gy_t;
  2006. int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx, lsm6dso_bdr_gy_t val);
  2007. int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx, lsm6dso_bdr_gy_t *val);
  2008. typedef enum {
  2009. LSM6DSO_BYPASS_MODE = 0,
  2010. LSM6DSO_FIFO_MODE = 1,
  2011. LSM6DSO_STREAM_TO_FIFO_MODE = 3,
  2012. LSM6DSO_BYPASS_TO_STREAM_MODE = 4,
  2013. LSM6DSO_STREAM_MODE = 6,
  2014. LSM6DSO_BYPASS_TO_FIFO_MODE = 7,
  2015. } lsm6dso_fifo_mode_t;
  2016. int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx, lsm6dso_fifo_mode_t val);
  2017. int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx, lsm6dso_fifo_mode_t *val);
  2018. typedef enum {
  2019. LSM6DSO_TEMP_NOT_BATCHED = 0,
  2020. LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1,
  2021. LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2,
  2022. LSM6DSO_TEMP_BATCHED_AT_52Hz = 3,
  2023. } lsm6dso_odr_t_batch_t;
  2024. int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
  2025. lsm6dso_odr_t_batch_t val);
  2026. int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
  2027. lsm6dso_odr_t_batch_t *val);
  2028. typedef enum {
  2029. LSM6DSO_NO_DECIMATION = 0,
  2030. LSM6DSO_DEC_1 = 1,
  2031. LSM6DSO_DEC_8 = 2,
  2032. LSM6DSO_DEC_32 = 3,
  2033. } lsm6dso_odr_ts_batch_t;
  2034. int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
  2035. lsm6dso_odr_ts_batch_t val);
  2036. int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
  2037. lsm6dso_odr_ts_batch_t *val);
  2038. typedef enum {
  2039. LSM6DSO_XL_BATCH_EVENT = 0,
  2040. LSM6DSO_GYRO_BATCH_EVENT = 1,
  2041. } lsm6dso_trig_counter_bdr_t;
  2042. typedef enum {
  2043. LSM6DSO_GYRO_NC_TAG = 1,
  2044. LSM6DSO_XL_NC_TAG,
  2045. LSM6DSO_TEMPERATURE_TAG,
  2046. LSM6DSO_TIMESTAMP_TAG,
  2047. LSM6DSO_CFG_CHANGE_TAG,
  2048. LSM6DSO_XL_NC_T_2_TAG,
  2049. LSM6DSO_XL_NC_T_1_TAG,
  2050. LSM6DSO_XL_2XC_TAG,
  2051. LSM6DSO_XL_3XC_TAG,
  2052. LSM6DSO_GYRO_NC_T_2_TAG,
  2053. LSM6DSO_GYRO_NC_T_1_TAG,
  2054. LSM6DSO_GYRO_2XC_TAG,
  2055. LSM6DSO_GYRO_3XC_TAG,
  2056. LSM6DSO_SENSORHUB_SLAVE0_TAG,
  2057. LSM6DSO_SENSORHUB_SLAVE1_TAG,
  2058. LSM6DSO_SENSORHUB_SLAVE2_TAG,
  2059. LSM6DSO_SENSORHUB_SLAVE3_TAG,
  2060. LSM6DSO_STEP_CPUNTER_TAG,
  2061. LSM6DSO_GAME_ROTATION_TAG,
  2062. LSM6DSO_GEOMAG_ROTATION_TAG,
  2063. LSM6DSO_ROTATION_TAG,
  2064. LSM6DSO_SENSORHUB_NACK_TAG = 0x19,
  2065. } lsm6dso_fifo_tag_t;
  2066. int32_t lsm6dso_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
  2067. lsm6dso_trig_counter_bdr_t val);
  2068. int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
  2069. lsm6dso_trig_counter_bdr_t *val);
  2070. int32_t lsm6dso_rst_batch_counter_set(stmdev_ctx_t *ctx, uint8_t val);
  2071. int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val);
  2072. int32_t lsm6dso_batch_counter_threshold_set(stmdev_ctx_t *ctx,
  2073. uint16_t val);
  2074. int32_t lsm6dso_batch_counter_threshold_get(stmdev_ctx_t *ctx,
  2075. uint16_t *val);
  2076. int32_t lsm6dso_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val);
  2077. int32_t lsm6dso_fifo_status_get(stmdev_ctx_t *ctx,
  2078. lsm6dso_fifo_status2_t *val);
  2079. int32_t lsm6dso_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
  2080. int32_t lsm6dso_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
  2081. int32_t lsm6dso_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
  2082. int32_t lsm6dso_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
  2083. lsm6dso_fifo_tag_t *val);
  2084. int32_t lsm6dso_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val);
  2085. int32_t lsm6dso_fifo_pedo_batch_get(stmdev_ctx_t *ctx, uint8_t *val);
  2086. int32_t lsm6dso_sh_batch_slave_0_set(stmdev_ctx_t *ctx, uint8_t val);
  2087. int32_t lsm6dso_sh_batch_slave_0_get(stmdev_ctx_t *ctx, uint8_t *val);
  2088. int32_t lsm6dso_sh_batch_slave_1_set(stmdev_ctx_t *ctx, uint8_t val);
  2089. int32_t lsm6dso_sh_batch_slave_1_get(stmdev_ctx_t *ctx, uint8_t *val);
  2090. int32_t lsm6dso_sh_batch_slave_2_set(stmdev_ctx_t *ctx, uint8_t val);
  2091. int32_t lsm6dso_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val);
  2092. int32_t lsm6dso_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val);
  2093. int32_t lsm6dso_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val);
  2094. typedef enum {
  2095. LSM6DSO_DEN_DISABLE = 0,
  2096. LSM6DSO_LEVEL_FIFO = 6,
  2097. LSM6DSO_LEVEL_LETCHED = 3,
  2098. LSM6DSO_LEVEL_TRIGGER = 2,
  2099. LSM6DSO_EDGE_TRIGGER = 4,
  2100. } lsm6dso_den_mode_t;
  2101. int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx, lsm6dso_den_mode_t val);
  2102. int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx, lsm6dso_den_mode_t *val);
  2103. typedef enum {
  2104. LSM6DSO_DEN_ACT_LOW = 0,
  2105. LSM6DSO_DEN_ACT_HIGH = 1,
  2106. } lsm6dso_den_lh_t;
  2107. int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx, lsm6dso_den_lh_t val);
  2108. int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx, lsm6dso_den_lh_t *val);
  2109. typedef enum {
  2110. LSM6DSO_STAMP_IN_GY_DATA = 0,
  2111. LSM6DSO_STAMP_IN_XL_DATA = 1,
  2112. LSM6DSO_STAMP_IN_GY_XL_DATA = 2,
  2113. } lsm6dso_den_xl_g_t;
  2114. int32_t lsm6dso_den_enable_set(stmdev_ctx_t *ctx, lsm6dso_den_xl_g_t val);
  2115. int32_t lsm6dso_den_enable_get(stmdev_ctx_t *ctx, lsm6dso_den_xl_g_t *val);
  2116. int32_t lsm6dso_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val);
  2117. int32_t lsm6dso_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val);
  2118. int32_t lsm6dso_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val);
  2119. int32_t lsm6dso_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val);
  2120. int32_t lsm6dso_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val);
  2121. int32_t lsm6dso_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val);
  2122. typedef enum {
  2123. LSM6DSO_PEDO_DISABLE = 0x00,
  2124. LSM6DSO_PEDO_BASE_MODE = 0x01,
  2125. LSM6DSO_FALSE_STEP_REJ = 0x13,
  2126. LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x33,
  2127. } lsm6dso_pedo_md_t;
  2128. int32_t lsm6dso_pedo_sens_set(stmdev_ctx_t *ctx, lsm6dso_pedo_md_t val);
  2129. int32_t lsm6dso_pedo_sens_get(stmdev_ctx_t *ctx, lsm6dso_pedo_md_t *val);
  2130. int32_t lsm6dso_pedo_step_detect_get(stmdev_ctx_t *ctx, uint8_t *val);
  2131. int32_t lsm6dso_pedo_debounce_steps_set(stmdev_ctx_t *ctx,
  2132. uint8_t *buff);
  2133. int32_t lsm6dso_pedo_debounce_steps_get(stmdev_ctx_t *ctx,
  2134. uint8_t *buff);
  2135. int32_t lsm6dso_pedo_steps_period_set(stmdev_ctx_t *ctx, uint8_t *buff);
  2136. int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx, uint8_t *buff);
  2137. typedef enum {
  2138. LSM6DSO_EVERY_STEP = 0,
  2139. LSM6DSO_COUNT_OVERFLOW = 1,
  2140. } lsm6dso_carry_count_en_t;
  2141. int32_t lsm6dso_pedo_int_mode_set(stmdev_ctx_t *ctx,
  2142. lsm6dso_carry_count_en_t val);
  2143. int32_t lsm6dso_pedo_int_mode_get(stmdev_ctx_t *ctx,
  2144. lsm6dso_carry_count_en_t *val);
  2145. int32_t lsm6dso_motion_sens_set(stmdev_ctx_t *ctx, uint8_t val);
  2146. int32_t lsm6dso_motion_sens_get(stmdev_ctx_t *ctx, uint8_t *val);
  2147. int32_t lsm6dso_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
  2148. uint8_t *val);
  2149. int32_t lsm6dso_tilt_sens_set(stmdev_ctx_t *ctx, uint8_t val);
  2150. int32_t lsm6dso_tilt_sens_get(stmdev_ctx_t *ctx, uint8_t *val);
  2151. int32_t lsm6dso_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
  2152. uint8_t *val);
  2153. int32_t lsm6dso_mag_sensitivity_set(stmdev_ctx_t *ctx, uint8_t *buff);
  2154. int32_t lsm6dso_mag_sensitivity_get(stmdev_ctx_t *ctx, uint8_t *buff);
  2155. int32_t lsm6dso_mag_offset_set(stmdev_ctx_t *ctx, uint8_t *buff);
  2156. int32_t lsm6dso_mag_offset_get(stmdev_ctx_t *ctx, uint8_t *buff);
  2157. int32_t lsm6dso_mag_soft_iron_set(stmdev_ctx_t *ctx, uint8_t *buff);
  2158. int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, uint8_t *buff);
  2159. typedef enum {
  2160. LSM6DSO_Z_EQ_Y = 0,
  2161. LSM6DSO_Z_EQ_MIN_Y = 1,
  2162. LSM6DSO_Z_EQ_X = 2,
  2163. LSM6DSO_Z_EQ_MIN_X = 3,
  2164. LSM6DSO_Z_EQ_MIN_Z = 4,
  2165. LSM6DSO_Z_EQ_Z = 5,
  2166. } lsm6dso_mag_z_axis_t;
  2167. int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
  2168. lsm6dso_mag_z_axis_t val);
  2169. int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
  2170. lsm6dso_mag_z_axis_t *val);
  2171. typedef enum {
  2172. LSM6DSO_Y_EQ_Y = 0,
  2173. LSM6DSO_Y_EQ_MIN_Y = 1,
  2174. LSM6DSO_Y_EQ_X = 2,
  2175. LSM6DSO_Y_EQ_MIN_X = 3,
  2176. LSM6DSO_Y_EQ_MIN_Z = 4,
  2177. LSM6DSO_Y_EQ_Z = 5,
  2178. } lsm6dso_mag_y_axis_t;
  2179. int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
  2180. lsm6dso_mag_y_axis_t val);
  2181. int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
  2182. lsm6dso_mag_y_axis_t *val);
  2183. typedef enum {
  2184. LSM6DSO_X_EQ_Y = 0,
  2185. LSM6DSO_X_EQ_MIN_Y = 1,
  2186. LSM6DSO_X_EQ_X = 2,
  2187. LSM6DSO_X_EQ_MIN_X = 3,
  2188. LSM6DSO_X_EQ_MIN_Z = 4,
  2189. LSM6DSO_X_EQ_Z = 5,
  2190. } lsm6dso_mag_x_axis_t;
  2191. int32_t lsm6dso_mag_x_orient_set(stmdev_ctx_t *ctx,
  2192. lsm6dso_mag_x_axis_t val);
  2193. int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
  2194. lsm6dso_mag_x_axis_t *val);
  2195. int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
  2196. uint8_t *val);
  2197. int32_t lsm6dso_emb_fsm_en_set(stmdev_ctx_t *ctx, uint8_t val);
  2198. int32_t lsm6dso_emb_fsm_en_get(stmdev_ctx_t *ctx, uint8_t *val);
  2199. typedef struct {
  2200. lsm6dso_fsm_enable_a_t fsm_enable_a;
  2201. lsm6dso_fsm_enable_b_t fsm_enable_b;
  2202. } lsm6dso_emb_fsm_enable_t;
  2203. int32_t lsm6dso_fsm_enable_set(stmdev_ctx_t *ctx,
  2204. lsm6dso_emb_fsm_enable_t *val);
  2205. int32_t lsm6dso_fsm_enable_get(stmdev_ctx_t *ctx,
  2206. lsm6dso_emb_fsm_enable_t *val);
  2207. int32_t lsm6dso_long_cnt_set(stmdev_ctx_t *ctx, uint8_t *buff);
  2208. int32_t lsm6dso_long_cnt_get(stmdev_ctx_t *ctx, uint8_t *buff);
  2209. typedef enum {
  2210. LSM6DSO_LC_NORMAL = 0,
  2211. LSM6DSO_LC_CLEAR = 1,
  2212. LSM6DSO_LC_CLEAR_DONE = 2,
  2213. } lsm6dso_fsm_lc_clr_t;
  2214. int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx, lsm6dso_fsm_lc_clr_t val);
  2215. int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx, lsm6dso_fsm_lc_clr_t *val);
  2216. typedef struct {
  2217. lsm6dso_fsm_outs1_t fsm_outs1;
  2218. lsm6dso_fsm_outs2_t fsm_outs2;
  2219. lsm6dso_fsm_outs3_t fsm_outs3;
  2220. lsm6dso_fsm_outs4_t fsm_outs4;
  2221. lsm6dso_fsm_outs5_t fsm_outs5;
  2222. lsm6dso_fsm_outs6_t fsm_outs6;
  2223. lsm6dso_fsm_outs7_t fsm_outs7;
  2224. lsm6dso_fsm_outs8_t fsm_outs8;
  2225. lsm6dso_fsm_outs9_t fsm_outs9;
  2226. lsm6dso_fsm_outs10_t fsm_outs10;
  2227. lsm6dso_fsm_outs11_t fsm_outs11;
  2228. lsm6dso_fsm_outs12_t fsm_outs12;
  2229. lsm6dso_fsm_outs13_t fsm_outs13;
  2230. lsm6dso_fsm_outs14_t fsm_outs14;
  2231. lsm6dso_fsm_outs15_t fsm_outs15;
  2232. lsm6dso_fsm_outs16_t fsm_outs16;
  2233. } lsm6dso_fsm_out_t;
  2234. int32_t lsm6dso_fsm_out_get(stmdev_ctx_t *ctx, lsm6dso_fsm_out_t *val);
  2235. typedef enum {
  2236. LSM6DSO_ODR_FSM_12Hz5 = 0,
  2237. LSM6DSO_ODR_FSM_26Hz = 1,
  2238. LSM6DSO_ODR_FSM_52Hz = 2,
  2239. LSM6DSO_ODR_FSM_104Hz = 3,
  2240. } lsm6dso_fsm_odr_t;
  2241. int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx, lsm6dso_fsm_odr_t val);
  2242. int32_t lsm6dso_fsm_data_rate_get(stmdev_ctx_t *ctx, lsm6dso_fsm_odr_t *val);
  2243. int32_t lsm6dso_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val);
  2244. int32_t lsm6dso_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val);
  2245. int32_t lsm6dso_long_cnt_int_value_set(stmdev_ctx_t *ctx, uint16_t val);
  2246. int32_t lsm6dso_long_cnt_int_value_get(stmdev_ctx_t *ctx, uint16_t *val);
  2247. int32_t lsm6dso_fsm_number_of_programs_set(stmdev_ctx_t *ctx, uint8_t val);
  2248. int32_t lsm6dso_fsm_number_of_programs_get(stmdev_ctx_t *ctx, uint8_t *val);
  2249. int32_t lsm6dso_fsm_start_address_set(stmdev_ctx_t *ctx, uint16_t val);
  2250. int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx, uint16_t *val);
  2251. int32_t lsm6dso_sh_read_data_raw_get(stmdev_ctx_t *ctx, uint8_t *val,
  2252. uint8_t len);
  2253. typedef enum {
  2254. LSM6DSO_SLV_0 = 0,
  2255. LSM6DSO_SLV_0_1 = 1,
  2256. LSM6DSO_SLV_0_1_2 = 2,
  2257. LSM6DSO_SLV_0_1_2_3 = 3,
  2258. } lsm6dso_aux_sens_on_t;
  2259. int32_t lsm6dso_sh_slave_connected_set(stmdev_ctx_t *ctx,
  2260. lsm6dso_aux_sens_on_t val);
  2261. int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
  2262. lsm6dso_aux_sens_on_t *val);
  2263. int32_t lsm6dso_sh_master_set(stmdev_ctx_t *ctx, uint8_t val);
  2264. int32_t lsm6dso_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val);
  2265. typedef enum {
  2266. LSM6DSO_EXT_PULL_UP = 0,
  2267. LSM6DSO_INTERNAL_PULL_UP = 1,
  2268. } lsm6dso_shub_pu_en_t;
  2269. int32_t lsm6dso_sh_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_shub_pu_en_t val);
  2270. int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_shub_pu_en_t *val);
  2271. int32_t lsm6dso_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val);
  2272. int32_t lsm6dso_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val);
  2273. typedef enum {
  2274. LSM6DSO_EXT_ON_INT2_PIN = 0,
  2275. LSM6DSO_XL_GY_DRDY = 1,
  2276. } lsm6dso_start_config_t;
  2277. int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
  2278. lsm6dso_start_config_t val);
  2279. int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
  2280. lsm6dso_start_config_t *val);
  2281. typedef enum {
  2282. LSM6DSO_EACH_SH_CYCLE = 0,
  2283. LSM6DSO_ONLY_FIRST_CYCLE = 1,
  2284. } lsm6dso_write_once_t;
  2285. int32_t lsm6dso_sh_write_mode_set(stmdev_ctx_t *ctx,
  2286. lsm6dso_write_once_t val);
  2287. int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
  2288. lsm6dso_write_once_t *val);
  2289. int32_t lsm6dso_sh_reset_set(stmdev_ctx_t *ctx);
  2290. int32_t lsm6dso_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
  2291. typedef enum {
  2292. LSM6DSO_SH_ODR_104Hz = 0,
  2293. LSM6DSO_SH_ODR_52Hz = 1,
  2294. LSM6DSO_SH_ODR_26Hz = 2,
  2295. LSM6DSO_SH_ODR_13Hz = 3,
  2296. } lsm6dso_shub_odr_t;
  2297. int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx, lsm6dso_shub_odr_t val);
  2298. int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx, lsm6dso_shub_odr_t *val);
  2299. typedef struct{
  2300. uint8_t slv0_add;
  2301. uint8_t slv0_subadd;
  2302. uint8_t slv0_data;
  2303. } lsm6dso_sh_cfg_write_t;
  2304. int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx, lsm6dso_sh_cfg_write_t *val);
  2305. typedef struct{
  2306. uint8_t slv_add;
  2307. uint8_t slv_subadd;
  2308. uint8_t slv_len;
  2309. } lsm6dso_sh_cfg_read_t;
  2310. int32_t lsm6dso_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
  2311. lsm6dso_sh_cfg_read_t *val);
  2312. int32_t lsm6dso_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
  2313. lsm6dso_sh_cfg_read_t *val);
  2314. int32_t lsm6dso_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
  2315. lsm6dso_sh_cfg_read_t *val);
  2316. int32_t lsm6dso_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
  2317. lsm6dso_sh_cfg_read_t *val);
  2318. int32_t lsm6dso_sh_status_get(stmdev_ctx_t *ctx,
  2319. lsm6dso_status_master_t *val);
  2320. /**
  2321. * @}
  2322. *
  2323. */
  2324. #ifdef __cplusplus
  2325. }
  2326. #endif
  2327. #endif /*LSM6DSO_DRIVER_H */
  2328. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/