bq25896.c 3.4 KB

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  1. #include <bq25896.h>
  2. #include <bq25896_reg.h>
  3. #include <api-hal.h>
  4. uint8_t bit_reverse(uint8_t b) {
  5. b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
  6. b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
  7. b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
  8. return b;
  9. }
  10. bool bq25896_read(uint8_t address, uint8_t* data, size_t size) {
  11. bool ret;
  12. with_api_hal_i2c(bool, &ret, (){
  13. if (HAL_I2C_Master_Transmit(&POWER_I2C, BQ25896_ADDRESS, &address, 1, 2000) != HAL_OK) {
  14. return false;
  15. }
  16. if (HAL_I2C_Master_Receive(&POWER_I2C, BQ25896_ADDRESS, data, size, 2000) != HAL_OK) {
  17. return false;
  18. }
  19. return true;
  20. });
  21. return ret;
  22. }
  23. bool bq25896_read_reg(uint8_t address, uint8_t* data) {
  24. bq25896_read(address, data, 1);
  25. return true;
  26. }
  27. bool bq25896_write_reg(uint8_t address, uint8_t* data) {
  28. uint8_t buffer[2] = { address, *data };
  29. bool ret;
  30. with_api_hal_i2c(bool, &ret, (){
  31. if (HAL_I2C_Master_Transmit(&POWER_I2C, BQ25896_ADDRESS, buffer, 2, 2000) != HAL_OK) {
  32. return false;
  33. }
  34. return true;
  35. });
  36. return ret;
  37. }
  38. typedef struct {
  39. REG00 r00;
  40. REG01 r01;
  41. REG02 r02;
  42. REG03 r03;
  43. REG04 r04;
  44. REG05 r05;
  45. REG06 r06;
  46. REG07 r07;
  47. REG08 r08;
  48. REG09 r09;
  49. REG0A r0A;
  50. REG0B r0B;
  51. REG0C r0C;
  52. REG0D r0D;
  53. REG0E r0E;
  54. REG0F r0F;
  55. REG10 r10;
  56. REG11 r11;
  57. REG12 r12;
  58. REG13 r13;
  59. REG14 r14;
  60. } bq25896_regs_t;
  61. static bq25896_regs_t bq25896_regs;
  62. void bq25896_init() {
  63. bq25896_regs.r14.REG_RST = 1;
  64. bq25896_write_reg(0x14, (uint8_t*)&bq25896_regs.r14);
  65. // Readout all registers
  66. bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
  67. // Poll ADC forever
  68. bq25896_regs.r02.CONV_START = 1;
  69. bq25896_regs.r02.CONV_RATE = 1;
  70. bq25896_write_reg(0x02, (uint8_t*)&bq25896_regs.r02);
  71. bq25896_regs.r07.WATCHDOG = WatchdogDisable;
  72. bq25896_write_reg(0x07, (uint8_t*)&bq25896_regs.r07);
  73. bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
  74. }
  75. void bq25896_poweroff() {
  76. bq25896_regs.r09.BATFET_DIS=1;
  77. bq25896_write_reg(0x09, (uint8_t*)&bq25896_regs.r09);
  78. }
  79. bool bq25896_is_charging() {
  80. bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
  81. bq25896_read_reg(0x0B, (uint8_t*)&bq25896_regs.r0B);
  82. return bq25896_regs.r0B.CHRG_STAT != ChrgStatNo;
  83. }
  84. void bq25896_enable_otg() {
  85. bq25896_regs.r03.OTG_CONFIG = 1;
  86. bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
  87. }
  88. void bq25896_disable_otg() {
  89. bq25896_regs.r03.OTG_CONFIG = 0;
  90. bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
  91. }
  92. uint16_t bq25896_get_vbus_voltage() {
  93. bq25896_read_reg(0x11, (uint8_t*)&bq25896_regs.r11);
  94. if (bq25896_regs.r11.VBUS_GD) {
  95. return (uint16_t)bq25896_regs.r11.VBUSV * 100 + 2600;
  96. } else {
  97. return 0;
  98. }
  99. }
  100. uint16_t bq25896_get_vsys_voltage() {
  101. bq25896_read_reg(0x0F, (uint8_t*)&bq25896_regs.r0F);
  102. return (uint16_t)bq25896_regs.r0F.SYSV * 20 + 2304;
  103. }
  104. uint16_t bq25896_get_vbat_voltage() {
  105. bq25896_read_reg(0x0E, (uint8_t*)&bq25896_regs.r0E);
  106. return (uint16_t)bq25896_regs.r0E.BATV * 20 + 2304;
  107. }
  108. uint16_t bq25896_get_vbat_current() {
  109. bq25896_read_reg(0x12, (uint8_t*)&bq25896_regs.r12);
  110. return (uint16_t)bq25896_regs.r12.ICHGR * 50;
  111. }
  112. uint32_t bq25896_get_ntc_mpct() {
  113. bq25896_read_reg(0x10, (uint8_t*)&bq25896_regs.r10);
  114. return (uint32_t)bq25896_regs.r10.TSPCT * 465+21000;
  115. }