app_conf.h 15 KB

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  1. #pragma once
  2. #include "hw_conf.h"
  3. #include "hw_if.h"
  4. #include <interface/patterns/ble_thread/hw.h>
  5. #include <ble/core/ble_bufsize.h>
  6. #define CFG_TX_POWER (0x19) /* +0dBm */
  7. #define CFG_IDENTITY_ADDRESS GAP_PUBLIC_ADDR
  8. /**
  9. * Define Advertising parameters
  10. */
  11. #define CFG_ADV_BD_ADDRESS (0x7257acd87a6c)
  12. #define CFG_FAST_CONN_ADV_INTERVAL_MIN (0x80) /**< 80ms */
  13. #define CFG_FAST_CONN_ADV_INTERVAL_MAX (0xa0) /**< 100ms */
  14. #define CFG_LP_CONN_ADV_INTERVAL_MIN (0x640) /**< 1s */
  15. #define CFG_LP_CONN_ADV_INTERVAL_MAX (0xfa0) /**< 2.5s */
  16. /**
  17. * Define IO Authentication
  18. */
  19. #define CFG_BONDING_MODE (1)
  20. #define CFG_FIXED_PIN (111111)
  21. #define CFG_USED_FIXED_PIN (1)
  22. #define CFG_ENCRYPTION_KEY_SIZE_MAX (16)
  23. #define CFG_ENCRYPTION_KEY_SIZE_MIN (8)
  24. /**
  25. * Define IO capabilities
  26. */
  27. #define CFG_IO_CAPABILITY_DISPLAY_ONLY (0x00)
  28. #define CFG_IO_CAPABILITY_DISPLAY_YES_NO (0x01)
  29. #define CFG_IO_CAPABILITY_KEYBOARD_ONLY (0x02)
  30. #define CFG_IO_CAPABILITY_NO_INPUT_NO_OUTPUT (0x03)
  31. #define CFG_IO_CAPABILITY_KEYBOARD_DISPLAY (0x04)
  32. #define CFG_IO_CAPABILITY CFG_IO_CAPABILITY_DISPLAY_YES_NO
  33. /**
  34. * Define MITM modes
  35. */
  36. #define CFG_MITM_PROTECTION_NOT_REQUIRED (0x00)
  37. #define CFG_MITM_PROTECTION_REQUIRED (0x01)
  38. #define CFG_MITM_PROTECTION CFG_MITM_PROTECTION_REQUIRED
  39. /**
  40. * Define Secure Connections Support
  41. */
  42. #define CFG_SECURE_NOT_SUPPORTED (0x00)
  43. #define CFG_SECURE_OPTIONAL (0x01)
  44. #define CFG_SECURE_MANDATORY (0x02)
  45. #define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL
  46. /**
  47. * Define Keypress Notification Support
  48. */
  49. #define CFG_KEYPRESS_NOT_SUPPORTED (0x00)
  50. #define CFG_KEYPRESS_SUPPORTED (0x01)
  51. #define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED
  52. /**
  53. * Numeric Comparison Answers
  54. */
  55. #define YES (0x01)
  56. #define NO (0x00)
  57. /**
  58. * Device name configuration for Generic Access Service
  59. */
  60. #define CFG_GAP_DEVICE_NAME "TEMPLATE"
  61. #define CFG_GAP_DEVICE_NAME_LENGTH (8)
  62. /**
  63. * Define PHY
  64. */
  65. #define ALL_PHYS_PREFERENCE 0x00
  66. #define RX_2M_PREFERRED 0x02
  67. #define TX_2M_PREFERRED 0x02
  68. #define TX_1M 0x01
  69. #define TX_2M 0x02
  70. #define RX_1M 0x01
  71. #define RX_2M 0x02
  72. /**
  73. * Identity root key used to derive LTK and CSRK
  74. */
  75. #define CFG_BLE_IRK \
  76. { \
  77. 0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, \
  78. 0xf0 \
  79. }
  80. /**
  81. * Encryption root key used to derive LTK and CSRK
  82. */
  83. #define CFG_BLE_ERK \
  84. { \
  85. 0xfe, 0xdc, 0xba, 0x09, 0x87, 0x65, 0x43, 0x21, 0xfe, 0xdc, 0xba, 0x09, 0x87, 0x65, 0x43, \
  86. 0x21 \
  87. }
  88. /* USER CODE BEGIN Generic_Parameters */
  89. /**
  90. * SMPS supply
  91. * SMPS not used when Set to 0
  92. * SMPS used when Set to 1
  93. */
  94. #define CFG_USE_SMPS 1
  95. /* USER CODE END Generic_Parameters */
  96. /**< specific parameters */
  97. /*****************************************************/
  98. /**
  99. * AD Element - Group B Feature
  100. */
  101. /* LSB - Second Byte */
  102. #define CFG_FEATURE_OTA_REBOOT (0x20)
  103. /******************************************************************************
  104. * BLE Stack
  105. ******************************************************************************/
  106. /**
  107. * Maximum number of simultaneous connections that the device will support.
  108. * Valid values are from 1 to 8
  109. */
  110. #define CFG_BLE_NUM_LINK 1
  111. /**
  112. * Maximum number of Services that can be stored in the GATT database.
  113. * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
  114. */
  115. #define CFG_BLE_NUM_GATT_SERVICES 8
  116. /**
  117. * Maximum number of Attributes
  118. * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services)
  119. * that can be stored in the GATT database.
  120. * Note that certain characteristics and relative descriptors are added automatically during device initialization
  121. * so this parameters should be 9 plus the number of user Attributes
  122. */
  123. #define CFG_BLE_NUM_GATT_ATTRIBUTES 68
  124. /**
  125. * Maximum supported ATT_MTU size
  126. */
  127. #define CFG_BLE_MAX_ATT_MTU (256 + 128 + 16 + 8 + 4 + 2)
  128. /**
  129. * Size of the storage area for Attribute values
  130. * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute:
  131. * - attribute value length
  132. * - 5, if UUID is 16 bit; 19, if UUID is 128 bit
  133. * - 2, if server configuration descriptor is used
  134. * - 2*DTM_NUM_LINK, if client configuration descriptor is used
  135. * - 2, if extended properties is used
  136. * The total amount of memory needed is the sum of the above quantities for each attribute.
  137. */
  138. #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
  139. /**
  140. * Prepare Write List size in terms of number of packet
  141. */
  142. #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
  143. /**
  144. * Number of allocated memory blocks
  145. */
  146. #define CFG_BLE_MBLOCK_COUNT \
  147. (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
  148. /**
  149. * Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
  150. */
  151. #define CFG_BLE_DATA_LENGTH_EXTENSION 1
  152. /**
  153. * Sleep clock accuracy in Slave mode (ppm value)
  154. */
  155. #define CFG_BLE_SLAVE_SCA 500
  156. /**
  157. * Sleep clock accuracy in Master mode
  158. * 0 : 251 ppm to 500 ppm
  159. * 1 : 151 ppm to 250 ppm
  160. * 2 : 101 ppm to 150 ppm
  161. * 3 : 76 ppm to 100 ppm
  162. * 4 : 51 ppm to 75 ppm
  163. * 5 : 31 ppm to 50 ppm
  164. * 6 : 21 ppm to 30 ppm
  165. * 7 : 0 ppm to 20 ppm
  166. */
  167. #define CFG_BLE_MASTER_SCA 0
  168. /**
  169. * Source for the low speed clock for RF wake-up
  170. * 1 : external high speed crystal HSE/32/32
  171. * 0 : external low speed crystal ( no calibration )
  172. */
  173. #define CFG_BLE_LSE_SOURCE 0
  174. /**
  175. * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
  176. */
  177. #define CFG_BLE_HSE_STARTUP_TIME 0x148
  178. /**
  179. * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us)
  180. */
  181. #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF)
  182. /**
  183. * Viterbi Mode
  184. * 1 : enabled
  185. * 0 : disabled
  186. */
  187. #define CFG_BLE_VITERBI_MODE 1
  188. /**
  189. * BLE stack Options flags to be configured with:
  190. * - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY
  191. * - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST
  192. * - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC
  193. * - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC
  194. * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO
  195. * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW
  196. * - SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV
  197. * - SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV
  198. * - SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2
  199. * - SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2
  200. * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1
  201. * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3
  202. * which are used to set following configuration bits:
  203. * (bit 0): 1: LL only
  204. * 0: LL + host
  205. * (bit 1): 1: no service change desc.
  206. * 0: with service change desc.
  207. * (bit 2): 1: device name Read-Only
  208. * 0: device name R/W
  209. * (bit 3): 1: extended advertizing supported [NOT SUPPORTED]
  210. * 0: extended advertizing not supported [NOT SUPPORTED]
  211. * (bit 4): 1: CS Algo #2 supported
  212. * 0: CS Algo #2 not supported
  213. * (bit 7): 1: LE Power Class 1
  214. * 0: LE Power Class 2-3
  215. * other bits: reserved (shall be set to 0)
  216. */
  217. #define CFG_BLE_OPTIONS \
  218. (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | \
  219. SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV | \
  220. SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3)
  221. /**
  222. * Queue length of BLE Event
  223. * This parameter defines the number of asynchronous events that can be stored in the HCI layer before
  224. * being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
  225. * is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
  226. * enough to store all asynchronous events received in between.
  227. * When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
  228. * between the HCI command and its event.
  229. * This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
  230. * the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
  231. * for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
  232. * to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
  233. */
  234. #define CFG_TLBLE_EVT_QUEUE_LENGTH 5
  235. /**
  236. * This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
  237. * allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
  238. * It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
  239. * never be used)
  240. * With the current wireless firmware implementation, this parameter shall be kept to 255
  241. *
  242. */
  243. #define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE \
  244. 255 /**< Set to 255 with the memory manager and the mailbox */
  245. #define TL_BLE_EVENT_FRAME_SIZE (TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE)
  246. /******************************************************************************
  247. * UART interfaces
  248. ******************************************************************************/
  249. /**
  250. * Select UART interfaces
  251. */
  252. #define CFG_DEBUG_TRACE_UART hw_uart1
  253. #define CFG_CONSOLE_MENU 0
  254. /******************************************************************************
  255. * Low Power
  256. ******************************************************************************/
  257. /**
  258. * When set to 1, the low power mode is enable
  259. * When set to 0, the device stays in RUN mode
  260. */
  261. #define CFG_LPM_SUPPORTED 1
  262. /******************************************************************************
  263. * Timer Server
  264. ******************************************************************************/
  265. /**
  266. * CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer.
  267. * The lower is the value, the better is the power consumption and the accuracy of the timerserver
  268. * The higher is the value, the finest is the granularity
  269. *
  270. * CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput
  271. * clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
  272. * the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
  273. *
  274. * CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
  275. * When the 1Hz calendar clock is required, it shall be sets according to other settings
  276. * When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
  277. *
  278. * CFG_RTCCLK_DIVIDER_CONF:
  279. * Shall be set to either 0,2,4,8,16
  280. * When set to either 2,4,8,16, the 1Hhz calendar is supported
  281. * When set to 0, the user sets its own configuration
  282. *
  283. * The following settings are computed with LSI as input to the RTC
  284. */
  285. #define CFG_RTCCLK_DIVIDER_CONF 0
  286. #if(CFG_RTCCLK_DIVIDER_CONF == 0)
  287. /**
  288. * Custom configuration
  289. * It does not support 1Hz calendar
  290. * It divides the RTC CLK by 16
  291. */
  292. #define CFG_RTCCLK_DIV (16)
  293. #define CFG_RTC_WUCKSEL_DIVIDER (0)
  294. #define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
  295. #define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
  296. #else
  297. #if(CFG_RTCCLK_DIVIDER_CONF == 2)
  298. /**
  299. * It divides the RTC CLK by 2
  300. */
  301. #define CFG_RTC_WUCKSEL_DIVIDER (3)
  302. #endif
  303. #if(CFG_RTCCLK_DIVIDER_CONF == 4)
  304. /**
  305. * It divides the RTC CLK by 4
  306. */
  307. #define CFG_RTC_WUCKSEL_DIVIDER (2)
  308. #endif
  309. #if(CFG_RTCCLK_DIVIDER_CONF == 8)
  310. /**
  311. * It divides the RTC CLK by 8
  312. */
  313. #define CFG_RTC_WUCKSEL_DIVIDER (1)
  314. #endif
  315. #if(CFG_RTCCLK_DIVIDER_CONF == 16)
  316. /**
  317. * It divides the RTC CLK by 16
  318. */
  319. #define CFG_RTC_WUCKSEL_DIVIDER (0)
  320. #endif
  321. #define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF
  322. #define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
  323. #define CFG_RTC_SYNCH_PRESCALER (DIVR(LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER + 1)) - 1)
  324. #endif
  325. /** tick timer value in us */
  326. #define CFG_TS_TICK_VAL DIVR((CFG_RTCCLK_DIV * 1000000), LSE_VALUE)
  327. typedef enum {
  328. CFG_TIM_PROC_ID_ISR,
  329. /* USER CODE BEGIN CFG_TimProcID_t */
  330. /* USER CODE END CFG_TimProcID_t */
  331. } CFG_TimProcID_t;
  332. /******************************************************************************
  333. * Debug
  334. ******************************************************************************/
  335. /**
  336. * When set, this resets some hw resources to set the device in the same state than the power up
  337. * The FW resets only register that may prevent the FW to run properly
  338. *
  339. * This shall be set to 0 in a final product
  340. *
  341. */
  342. #define CFG_HW_RESET_BY_FW 0
  343. /**
  344. * keep debugger enabled while in any low power mode when set to 1
  345. * should be set to 0 in production
  346. */
  347. #define CFG_DEBUGGER_SUPPORTED 1
  348. /**
  349. * When set to 1, the traces are enabled in the BLE services
  350. */
  351. #define CFG_DEBUG_BLE_TRACE 0
  352. /**
  353. * Enable or Disable traces in application
  354. */
  355. #define CFG_DEBUG_APP_TRACE 0
  356. #if(CFG_DEBUG_APP_TRACE != 0)
  357. #define APP_DBG_MSG PRINT_MESG_DBG
  358. #else
  359. #define APP_DBG_MSG PRINT_NO_MESG
  360. #endif
  361. #if((CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0))
  362. #define CFG_DEBUG_TRACE 1
  363. #endif
  364. #if(CFG_DEBUG_TRACE != 0)
  365. #undef CFG_LPM_SUPPORTED
  366. #undef CFG_DEBUGGER_SUPPORTED
  367. #define CFG_LPM_SUPPORTED 0
  368. #define CFG_DEBUGGER_SUPPORTED 1
  369. #endif
  370. /**
  371. * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
  372. * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
  373. *
  374. * When both are set to 0, no trace are output
  375. * When both are set to 1, CFG_DEBUG_TRACE_FULL is selected
  376. */
  377. #define CFG_DEBUG_TRACE_LIGHT 0
  378. #define CFG_DEBUG_TRACE_FULL 0
  379. #if((CFG_DEBUG_TRACE != 0) && (CFG_DEBUG_TRACE_LIGHT == 0) && (CFG_DEBUG_TRACE_FULL == 0))
  380. #undef CFG_DEBUG_TRACE_FULL
  381. #undef CFG_DEBUG_TRACE_LIGHT
  382. #define CFG_DEBUG_TRACE_FULL 0
  383. #define CFG_DEBUG_TRACE_LIGHT 1
  384. #endif
  385. #if(CFG_DEBUG_TRACE == 0)
  386. #undef CFG_DEBUG_TRACE_FULL
  387. #undef CFG_DEBUG_TRACE_LIGHT
  388. #define CFG_DEBUG_TRACE_FULL 0
  389. #define CFG_DEBUG_TRACE_LIGHT 0
  390. #endif
  391. /**
  392. * When not set, the traces is looping on sending the trace over UART
  393. */
  394. #define DBG_TRACE_USE_CIRCULAR_QUEUE 0
  395. /**
  396. * max buffer Size to queue data traces and max data trace allowed.
  397. * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
  398. */
  399. #define DBG_TRACE_MSG_QUEUE_SIZE 4096
  400. #define MAX_DBG_TRACE_MSG_SIZE 1024
  401. #define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE
  402. #define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR