avr_isp.c 13 KB

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  1. #include "avr_isp.h"
  2. #include "../lib/driver/avr_isp_prog_cmd.h"
  3. #include "../lib/driver/avr_isp_spi_sw.h"
  4. #include <furi.h>
  5. #define AVR_ISP_PROG_TX_RX_BUF_SIZE 320
  6. #define TAG "AvrIsp"
  7. struct AvrIsp {
  8. AvrIspSpiSw* spi;
  9. bool pmode;
  10. AvrIspCallback callback;
  11. void* context;
  12. };
  13. AvrIsp* avr_isp_alloc(void) {
  14. AvrIsp* instance = malloc(sizeof(AvrIsp));
  15. return instance;
  16. }
  17. void avr_isp_free(AvrIsp* instance) {
  18. furi_assert(instance);
  19. if(instance->spi) avr_isp_end_pmode(instance);
  20. free(instance);
  21. }
  22. void avr_isp_set_tx_callback(AvrIsp* instance, AvrIspCallback callback, void* context) {
  23. furi_assert(instance);
  24. furi_assert(context);
  25. instance->callback = callback;
  26. instance->context = context;
  27. }
  28. uint8_t avr_isp_spi_transaction(
  29. AvrIsp* instance,
  30. uint8_t cmd,
  31. uint8_t addr_hi,
  32. uint8_t addr_lo,
  33. uint8_t data) {
  34. furi_assert(instance);
  35. avr_isp_spi_sw_txrx(instance->spi, cmd);
  36. avr_isp_spi_sw_txrx(instance->spi, addr_hi);
  37. avr_isp_spi_sw_txrx(instance->spi, addr_lo);
  38. return avr_isp_spi_sw_txrx(instance->spi, data);
  39. }
  40. static bool avr_isp_set_pmode(AvrIsp* instance, uint8_t a, uint8_t b, uint8_t c, uint8_t d) {
  41. furi_assert(instance);
  42. uint8_t res = 0;
  43. avr_isp_spi_sw_txrx(instance->spi, a);
  44. avr_isp_spi_sw_txrx(instance->spi, b);
  45. res = avr_isp_spi_sw_txrx(instance->spi, c);
  46. avr_isp_spi_sw_txrx(instance->spi, d);
  47. return res == 0x53;
  48. }
  49. void avr_isp_end_pmode(AvrIsp* instance) {
  50. furi_assert(instance);
  51. if(instance->pmode) {
  52. avr_isp_spi_sw_res_set(instance->spi, true);
  53. // We're about to take the target out of reset
  54. // so configure SPI pins as input
  55. if(instance->spi) avr_isp_spi_sw_free(instance->spi);
  56. instance->spi = NULL;
  57. }
  58. instance->pmode = false;
  59. }
  60. static bool avr_isp_start_pmode(AvrIsp* instance, AvrIspSpiSwSpeed spi_speed) {
  61. furi_assert(instance);
  62. // Reset target before driving PIN_SCK or PIN_MOSI
  63. // SPI.begin() will configure SS as output,
  64. // so SPI master mode is selected.
  65. // We have defined RESET as pin 10,
  66. // which for many arduino's is not the SS pin.
  67. // So we have to configure RESET as output here,
  68. // (reset_target() first sets the correct level)
  69. if(instance->spi) avr_isp_spi_sw_free(instance->spi);
  70. instance->spi = avr_isp_spi_sw_init(spi_speed);
  71. avr_isp_spi_sw_res_set(instance->spi, false);
  72. // See avr datasheets, chapter "SERIAL_PRG Programming Algorithm":
  73. // Pulse RESET after PIN_SCK is low:
  74. avr_isp_spi_sw_sck_set(instance->spi, false);
  75. // discharge PIN_SCK, value arbitrally chosen
  76. furi_delay_ms(20);
  77. avr_isp_spi_sw_res_set(instance->spi, true);
  78. // Pulse must be minimum 2 target CPU speed cycles
  79. // so 100 usec is ok for CPU speeds above 20KHz
  80. furi_delay_ms(1);
  81. avr_isp_spi_sw_res_set(instance->spi, false);
  82. // Send the enable programming command:
  83. // datasheet: must be > 20 msec
  84. furi_delay_ms(50);
  85. if(avr_isp_set_pmode(instance, AVR_ISP_SET_PMODE)) {
  86. instance->pmode = true;
  87. return true;
  88. }
  89. return false;
  90. }
  91. bool avr_isp_auto_set_spi_speed_start_pmode(AvrIsp* instance) {
  92. furi_assert(instance);
  93. AvrIspSpiSwSpeed spi_speed[] = {
  94. AvrIspSpiSwSpeed1Mhz,
  95. AvrIspSpiSwSpeed400Khz,
  96. AvrIspSpiSwSpeed250Khz,
  97. AvrIspSpiSwSpeed125Khz,
  98. AvrIspSpiSwSpeed60Khz,
  99. AvrIspSpiSwSpeed40Khz,
  100. AvrIspSpiSwSpeed20Khz,
  101. AvrIspSpiSwSpeed10Khz,
  102. AvrIspSpiSwSpeed5Khz,
  103. AvrIspSpiSwSpeed1Khz,
  104. };
  105. for(uint8_t i = 0; i < COUNT_OF(spi_speed); i++) {
  106. if(avr_isp_start_pmode(instance, spi_speed[i])) {
  107. AvrIspSignature sig = avr_isp_read_signature(instance);
  108. AvrIspSignature sig_examination = avr_isp_read_signature(instance); //-V656
  109. uint8_t y = 0;
  110. while(y < 8) {
  111. if(memcmp((uint8_t*)&sig, (uint8_t*)&sig_examination, sizeof(AvrIspSignature)) !=
  112. 0)
  113. break;
  114. sig_examination = avr_isp_read_signature(instance);
  115. y++;
  116. }
  117. if(y == 8) {
  118. if(spi_speed[i] > AvrIspSpiSwSpeed1Mhz) {
  119. if(i < (COUNT_OF(spi_speed) - 1)) {
  120. avr_isp_end_pmode(instance);
  121. i++;
  122. return avr_isp_start_pmode(instance, spi_speed[i]);
  123. }
  124. }
  125. return true;
  126. }
  127. }
  128. }
  129. return false;
  130. }
  131. static void avr_isp_commit(AvrIsp* instance, uint16_t addr, uint8_t data) {
  132. furi_assert(instance);
  133. avr_isp_spi_transaction(instance, AVR_ISP_COMMIT(addr));
  134. /* polling flash */
  135. if(data == 0xFF) {
  136. furi_delay_ms(5);
  137. } else {
  138. /* polling flash */
  139. uint32_t starttime = furi_get_tick();
  140. while((furi_get_tick() - starttime) < 30) {
  141. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FLASH_HI(addr)) != 0xFF) {
  142. break;
  143. };
  144. }
  145. }
  146. }
  147. static uint16_t avr_isp_current_page(AvrIsp* instance, uint32_t addr, uint16_t page_size) {
  148. furi_assert(instance);
  149. uint16_t page = 0;
  150. switch(page_size) {
  151. case 32:
  152. page = addr & 0xFFFFFFF0;
  153. break;
  154. case 64:
  155. page = addr & 0xFFFFFFE0;
  156. break;
  157. case 128:
  158. page = addr & 0xFFFFFFC0;
  159. break;
  160. case 256:
  161. page = addr & 0xFFFFFF80;
  162. break;
  163. default:
  164. page = addr;
  165. break;
  166. }
  167. return page;
  168. }
  169. static bool avr_isp_flash_write_pages(
  170. AvrIsp* instance,
  171. uint16_t addr,
  172. uint16_t page_size,
  173. uint8_t* data,
  174. uint32_t data_size) {
  175. furi_assert(instance);
  176. size_t x = 0;
  177. uint16_t page = avr_isp_current_page(instance, addr, page_size);
  178. while(x < data_size) {
  179. if(page != avr_isp_current_page(instance, addr, page_size)) {
  180. avr_isp_commit(instance, page, data[x - 1]);
  181. page = avr_isp_current_page(instance, addr, page_size);
  182. }
  183. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FLASH_LO(addr, data[x++]));
  184. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FLASH_HI(addr, data[x++]));
  185. addr++;
  186. }
  187. avr_isp_commit(instance, page, data[x - 1]);
  188. return true;
  189. }
  190. bool avr_isp_erase_chip(AvrIsp* instance) {
  191. furi_assert(instance);
  192. bool ret = false;
  193. if(!instance->pmode) avr_isp_auto_set_spi_speed_start_pmode(instance);
  194. if(instance->pmode) {
  195. avr_isp_spi_transaction(instance, AVR_ISP_ERASE_CHIP);
  196. furi_delay_ms(100);
  197. avr_isp_end_pmode(instance);
  198. ret = true;
  199. }
  200. return ret;
  201. }
  202. static bool
  203. avr_isp_eeprom_write(AvrIsp* instance, uint16_t addr, uint8_t* data, uint32_t data_size) {
  204. furi_assert(instance);
  205. for(uint16_t i = 0; i < data_size; i++) {
  206. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_EEPROM(addr, data[i]));
  207. furi_delay_ms(10);
  208. addr++;
  209. }
  210. return true;
  211. }
  212. bool avr_isp_write_page(
  213. AvrIsp* instance,
  214. uint32_t mem_type,
  215. uint32_t mem_size,
  216. uint16_t addr,
  217. uint16_t page_size,
  218. uint8_t* data,
  219. uint32_t data_size) {
  220. furi_assert(instance);
  221. bool ret = false;
  222. switch(mem_type) {
  223. case STK_SET_FLASH_TYPE:
  224. if((addr + data_size / 2) <= mem_size) {
  225. ret = avr_isp_flash_write_pages(instance, addr, page_size, data, data_size);
  226. }
  227. break;
  228. case STK_SET_EEPROM_TYPE:
  229. if((addr + data_size) <= mem_size) {
  230. ret = avr_isp_eeprom_write(instance, addr, data, data_size);
  231. }
  232. break;
  233. default:
  234. furi_crash(TAG " Incorrect mem type.");
  235. break;
  236. }
  237. return ret;
  238. }
  239. static bool avr_isp_flash_read_page(
  240. AvrIsp* instance,
  241. uint16_t addr,
  242. uint16_t page_size,
  243. uint8_t* data,
  244. uint32_t data_size) {
  245. furi_assert(instance);
  246. if(page_size > data_size) return false;
  247. for(uint16_t i = 0; i < page_size; i += 2) {
  248. data[i] = avr_isp_spi_transaction(instance, AVR_ISP_READ_FLASH_LO(addr));
  249. data[i + 1] = avr_isp_spi_transaction(instance, AVR_ISP_READ_FLASH_HI(addr));
  250. addr++;
  251. }
  252. return true;
  253. }
  254. static bool avr_isp_eeprom_read_page(
  255. AvrIsp* instance,
  256. uint16_t addr,
  257. uint16_t page_size,
  258. uint8_t* data,
  259. uint32_t data_size) {
  260. furi_assert(instance);
  261. if(page_size > data_size) return false;
  262. for(uint16_t i = 0; i < page_size; i++) {
  263. data[i] = avr_isp_spi_transaction(instance, AVR_ISP_READ_EEPROM(addr));
  264. addr++;
  265. }
  266. return true;
  267. }
  268. bool avr_isp_read_page(
  269. AvrIsp* instance,
  270. uint32_t mem_type,
  271. uint16_t addr,
  272. uint16_t page_size,
  273. uint8_t* data,
  274. uint32_t data_size) {
  275. furi_assert(instance);
  276. bool res = false;
  277. if(mem_type == STK_SET_FLASH_TYPE)
  278. res = avr_isp_flash_read_page(instance, addr, page_size, data, data_size);
  279. if(mem_type == STK_SET_EEPROM_TYPE)
  280. res = avr_isp_eeprom_read_page(instance, addr, page_size, data, data_size);
  281. return res;
  282. }
  283. AvrIspSignature avr_isp_read_signature(AvrIsp* instance) {
  284. furi_assert(instance);
  285. AvrIspSignature signature;
  286. signature.vendor = avr_isp_spi_transaction(instance, AVR_ISP_READ_VENDOR);
  287. signature.part_family = avr_isp_spi_transaction(instance, AVR_ISP_READ_PART_FAMILY);
  288. signature.part_number = avr_isp_spi_transaction(instance, AVR_ISP_READ_PART_NUMBER);
  289. return signature;
  290. }
  291. uint8_t avr_isp_read_lock_byte(AvrIsp* instance) {
  292. furi_assert(instance);
  293. uint8_t data = 0;
  294. uint32_t starttime = furi_get_tick();
  295. while((furi_get_tick() - starttime) < 300) {
  296. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_LOCK_BYTE);
  297. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_LOCK_BYTE) == data) {
  298. break;
  299. };
  300. data = 0x00;
  301. }
  302. return data;
  303. }
  304. bool avr_isp_write_lock_byte(AvrIsp* instance, uint8_t lock) {
  305. furi_assert(instance);
  306. bool ret = false;
  307. if(avr_isp_read_lock_byte(instance) == lock) {
  308. ret = true;
  309. } else {
  310. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_LOCK_BYTE(lock));
  311. /* polling lock byte */
  312. uint32_t starttime = furi_get_tick();
  313. while((furi_get_tick() - starttime) < 30) {
  314. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_LOCK_BYTE) == lock) {
  315. ret = true;
  316. break;
  317. };
  318. }
  319. }
  320. return ret;
  321. }
  322. uint8_t avr_isp_read_fuse_low(AvrIsp* instance) {
  323. furi_assert(instance);
  324. uint8_t data = 0;
  325. uint32_t starttime = furi_get_tick();
  326. while((furi_get_tick() - starttime) < 300) {
  327. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_LOW);
  328. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_LOW) == data) {
  329. break;
  330. };
  331. data = 0x00;
  332. }
  333. return data;
  334. }
  335. bool avr_isp_write_fuse_low(AvrIsp* instance, uint8_t lfuse) {
  336. furi_assert(instance);
  337. bool ret = false;
  338. if(avr_isp_read_fuse_low(instance) == lfuse) {
  339. ret = true;
  340. } else {
  341. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FUSE_LOW(lfuse));
  342. /* polling fuse */
  343. uint32_t starttime = furi_get_tick();
  344. while((furi_get_tick() - starttime) < 30) {
  345. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_LOW) == lfuse) {
  346. ret = true;
  347. break;
  348. };
  349. }
  350. }
  351. return ret;
  352. }
  353. uint8_t avr_isp_read_fuse_high(AvrIsp* instance) {
  354. furi_assert(instance);
  355. uint8_t data = 0;
  356. uint32_t starttime = furi_get_tick();
  357. while((furi_get_tick() - starttime) < 300) {
  358. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_HIGH);
  359. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_HIGH) == data) {
  360. break;
  361. };
  362. data = 0x00;
  363. }
  364. return data;
  365. }
  366. bool avr_isp_write_fuse_high(AvrIsp* instance, uint8_t hfuse) {
  367. furi_assert(instance);
  368. bool ret = false;
  369. if(avr_isp_read_fuse_high(instance) == hfuse) {
  370. ret = true;
  371. } else {
  372. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FUSE_HIGH(hfuse));
  373. /* polling fuse */
  374. uint32_t starttime = furi_get_tick();
  375. while((furi_get_tick() - starttime) < 30) {
  376. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_HIGH) == hfuse) {
  377. ret = true;
  378. break;
  379. };
  380. }
  381. }
  382. return ret;
  383. }
  384. uint8_t avr_isp_read_fuse_extended(AvrIsp* instance) {
  385. furi_assert(instance);
  386. uint8_t data = 0;
  387. uint32_t starttime = furi_get_tick();
  388. while((furi_get_tick() - starttime) < 300) {
  389. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_EXTENDED);
  390. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_EXTENDED) == data) {
  391. break;
  392. };
  393. data = 0x00;
  394. }
  395. return data;
  396. }
  397. bool avr_isp_write_fuse_extended(AvrIsp* instance, uint8_t efuse) {
  398. furi_assert(instance);
  399. bool ret = false;
  400. if(avr_isp_read_fuse_extended(instance) == efuse) {
  401. ret = true;
  402. } else {
  403. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FUSE_EXTENDED(efuse));
  404. /* polling fuse */
  405. uint32_t starttime = furi_get_tick();
  406. while((furi_get_tick() - starttime) < 30) {
  407. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_EXTENDED) == efuse) {
  408. ret = true;
  409. break;
  410. };
  411. }
  412. }
  413. return ret;
  414. }
  415. void avr_isp_write_extended_addr(AvrIsp* instance, uint8_t extended_addr) {
  416. furi_assert(instance);
  417. avr_isp_spi_transaction(instance, AVR_ISP_EXTENDED_ADDR(extended_addr));
  418. furi_delay_ms(10);
  419. }