avr_isp.c 14 KB

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  1. #include "avr_isp.h"
  2. #include "../lib/driver/avr_isp_prog_cmd.h"
  3. #include "../lib/driver/avr_isp_spi_sw.h"
  4. #include <furi.h>
  5. #define AVR_ISP_PROG_TX_RX_BUF_SIZE 320
  6. #define TAG "AvrIsp"
  7. struct AvrIsp {
  8. AvrIspSpiSw* spi;
  9. bool pmode;
  10. AvrIspCallback callback;
  11. void* context;
  12. };
  13. AvrIsp* avr_isp_alloc(void) {
  14. AvrIsp* instance = malloc(sizeof(AvrIsp));
  15. return instance;
  16. }
  17. void avr_isp_free(AvrIsp* instance) {
  18. furi_assert(instance);
  19. if(instance->spi) avr_isp_end_pmode(instance);
  20. free(instance);
  21. }
  22. void avr_isp_set_tx_callback(AvrIsp* instance, AvrIspCallback callback, void* context) {
  23. furi_assert(instance);
  24. furi_assert(context);
  25. instance->callback = callback;
  26. instance->context = context;
  27. }
  28. uint8_t avr_isp_spi_transaction(
  29. AvrIsp* instance,
  30. uint8_t cmd,
  31. uint8_t addr_hi,
  32. uint8_t addr_lo,
  33. uint8_t data) {
  34. furi_assert(instance);
  35. avr_isp_spi_sw_txrx(instance->spi, cmd);
  36. avr_isp_spi_sw_txrx(instance->spi, addr_hi);
  37. avr_isp_spi_sw_txrx(instance->spi, addr_lo);
  38. return avr_isp_spi_sw_txrx(instance->spi, data);
  39. }
  40. static bool avr_isp_set_pmode(AvrIsp* instance, uint8_t a, uint8_t b, uint8_t c, uint8_t d) {
  41. furi_assert(instance);
  42. uint8_t res = 0;
  43. avr_isp_spi_sw_txrx(instance->spi, a);
  44. avr_isp_spi_sw_txrx(instance->spi, b);
  45. res = avr_isp_spi_sw_txrx(instance->spi, c);
  46. avr_isp_spi_sw_txrx(instance->spi, d);
  47. return res == 0x53;
  48. }
  49. void avr_isp_end_pmode(AvrIsp* instance) {
  50. furi_assert(instance);
  51. if(instance->pmode) {
  52. avr_isp_spi_sw_res_set(instance->spi, true);
  53. // We're about to take the target out of reset
  54. // so configure SPI pins as input
  55. if(instance->spi) avr_isp_spi_sw_free(instance->spi);
  56. instance->spi = NULL;
  57. }
  58. instance->pmode = false;
  59. }
  60. static bool avr_isp_start_pmode(AvrIsp* instance, AvrIspSpiSwSpeed spi_speed) {
  61. furi_assert(instance);
  62. // Reset target before driving PIN_SCK or PIN_MOSI
  63. // SPI.begin() will configure SS as output,
  64. // so SPI master mode is selected.
  65. // We have defined RESET as pin 10,
  66. // which for many arduino's is not the SS pin.
  67. // So we have to configure RESET as output here,
  68. // (reset_target() first sets the correct level)
  69. if(instance->spi) avr_isp_spi_sw_free(instance->spi);
  70. instance->spi = avr_isp_spi_sw_init(spi_speed);
  71. avr_isp_spi_sw_res_set(instance->spi, false);
  72. // See avr datasheets, chapter "SERIAL_PRG Programming Algorithm":
  73. // Pulse RESET after PIN_SCK is low:
  74. avr_isp_spi_sw_sck_set(instance->spi, false);
  75. // discharge PIN_SCK, value arbitrally chosen
  76. furi_delay_ms(20);
  77. avr_isp_spi_sw_res_set(instance->spi, true);
  78. // Pulse must be minimum 2 target CPU speed cycles
  79. // so 100 usec is ok for CPU speeds above 20KHz
  80. furi_delay_ms(1);
  81. avr_isp_spi_sw_res_set(instance->spi, false);
  82. // Send the enable programming command:
  83. // datasheet: must be > 20 msec
  84. furi_delay_ms(50);
  85. if(avr_isp_set_pmode(instance, AVR_ISP_SET_PMODE)) {
  86. instance->pmode = true;
  87. return true;
  88. }
  89. return false;
  90. }
  91. bool avr_isp_auto_set_spi_speed_start_pmode(AvrIsp* instance) {
  92. furi_assert(instance);
  93. AvrIspSpiSwSpeed spi_speed[] = {
  94. AvrIspSpiSwSpeed1Mhz,
  95. AvrIspSpiSwSpeed400Khz,
  96. AvrIspSpiSwSpeed250Khz,
  97. AvrIspSpiSwSpeed125Khz,
  98. AvrIspSpiSwSpeed60Khz,
  99. AvrIspSpiSwSpeed40Khz,
  100. AvrIspSpiSwSpeed20Khz,
  101. AvrIspSpiSwSpeed10Khz,
  102. AvrIspSpiSwSpeed5Khz,
  103. AvrIspSpiSwSpeed1Khz,
  104. };
  105. for(uint8_t i = 0; i < COUNT_OF(spi_speed); i++) {
  106. if(avr_isp_start_pmode(instance, spi_speed[i])) {
  107. AvrIspSignature sig = avr_isp_read_signature(instance);
  108. AvrIspSignature sig_examination = avr_isp_read_signature(instance); //-V656
  109. uint8_t y = 0;
  110. while(y < 8) {
  111. if(memcmp((uint8_t*)&sig, (uint8_t*)&sig_examination, sizeof(AvrIspSignature)) !=
  112. 0)
  113. break;
  114. sig_examination = avr_isp_read_signature(instance);
  115. y++;
  116. }
  117. if(y == 8) {
  118. if(spi_speed[i] > AvrIspSpiSwSpeed1Mhz) {
  119. if(i < (COUNT_OF(spi_speed) - 1)) {
  120. avr_isp_end_pmode(instance);
  121. i++;
  122. return avr_isp_start_pmode(instance, spi_speed[i]);
  123. }
  124. }
  125. return true;
  126. }
  127. }
  128. }
  129. if(instance->spi) {
  130. avr_isp_spi_sw_free(instance->spi);
  131. instance->spi = NULL;
  132. }
  133. return false;
  134. }
  135. static void avr_isp_commit(AvrIsp* instance, uint16_t addr, uint8_t data) {
  136. furi_assert(instance);
  137. avr_isp_spi_transaction(instance, AVR_ISP_COMMIT(addr));
  138. /* polling flash */
  139. if(data == 0xFF) {
  140. furi_delay_ms(5);
  141. } else {
  142. /* polling flash */
  143. uint32_t starttime = furi_get_tick();
  144. while((furi_get_tick() - starttime) < 30) {
  145. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FLASH_HI(addr)) != 0xFF) {
  146. break;
  147. };
  148. }
  149. }
  150. }
  151. static uint16_t avr_isp_current_page(AvrIsp* instance, uint32_t addr, uint16_t page_size) {
  152. furi_assert(instance);
  153. uint16_t page = 0;
  154. switch(page_size) {
  155. case 32:
  156. page = addr & 0xFFFFFFF0;
  157. break;
  158. case 64:
  159. page = addr & 0xFFFFFFE0;
  160. break;
  161. case 128:
  162. page = addr & 0xFFFFFFC0;
  163. break;
  164. case 256:
  165. page = addr & 0xFFFFFF80;
  166. break;
  167. default:
  168. page = addr;
  169. break;
  170. }
  171. return page;
  172. }
  173. static bool avr_isp_flash_write_pages(
  174. AvrIsp* instance,
  175. uint16_t addr,
  176. uint16_t page_size,
  177. uint8_t* data,
  178. uint32_t data_size) {
  179. furi_assert(instance);
  180. size_t x = 0;
  181. uint16_t page = avr_isp_current_page(instance, addr, page_size);
  182. while(x < data_size) {
  183. if(page != avr_isp_current_page(instance, addr, page_size)) {
  184. avr_isp_commit(instance, page, data[x - 1]);
  185. page = avr_isp_current_page(instance, addr, page_size);
  186. }
  187. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FLASH_LO(addr, data[x++]));
  188. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FLASH_HI(addr, data[x++]));
  189. addr++;
  190. }
  191. avr_isp_commit(instance, page, data[x - 1]);
  192. return true;
  193. }
  194. bool avr_isp_erase_chip(AvrIsp* instance) {
  195. furi_assert(instance);
  196. bool ret = false;
  197. if(!instance->pmode) avr_isp_auto_set_spi_speed_start_pmode(instance);
  198. if(instance->pmode) {
  199. avr_isp_spi_transaction(instance, AVR_ISP_ERASE_CHIP);
  200. furi_delay_ms(100);
  201. avr_isp_end_pmode(instance);
  202. ret = true;
  203. }
  204. return ret;
  205. }
  206. static bool
  207. avr_isp_eeprom_write(AvrIsp* instance, uint16_t addr, uint8_t* data, uint32_t data_size) {
  208. furi_assert(instance);
  209. for(uint16_t i = 0; i < data_size; i++) {
  210. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_EEPROM(addr, data[i]));
  211. furi_delay_ms(10);
  212. addr++;
  213. }
  214. return true;
  215. }
  216. bool avr_isp_write_page(
  217. AvrIsp* instance,
  218. uint32_t mem_type,
  219. uint32_t mem_size,
  220. uint16_t addr,
  221. uint16_t page_size,
  222. uint8_t* data,
  223. uint32_t data_size) {
  224. furi_assert(instance);
  225. bool ret = false;
  226. switch(mem_type) {
  227. case STK_SET_FLASH_TYPE:
  228. if((addr + data_size / 2) <= mem_size) {
  229. ret = avr_isp_flash_write_pages(instance, addr, page_size, data, data_size);
  230. }
  231. break;
  232. case STK_SET_EEPROM_TYPE:
  233. if((addr + data_size) <= mem_size) {
  234. ret = avr_isp_eeprom_write(instance, addr, data, data_size);
  235. }
  236. break;
  237. default:
  238. furi_crash(TAG " Incorrect mem type.");
  239. break;
  240. }
  241. return ret;
  242. }
  243. static bool avr_isp_flash_read_page(
  244. AvrIsp* instance,
  245. uint16_t addr,
  246. uint16_t page_size,
  247. uint8_t* data,
  248. uint32_t data_size) {
  249. furi_assert(instance);
  250. if(page_size > data_size) return false;
  251. for(uint16_t i = 0; i < page_size; i += 2) {
  252. data[i] = avr_isp_spi_transaction(instance, AVR_ISP_READ_FLASH_LO(addr));
  253. data[i + 1] = avr_isp_spi_transaction(instance, AVR_ISP_READ_FLASH_HI(addr));
  254. addr++;
  255. }
  256. return true;
  257. }
  258. static bool avr_isp_eeprom_read_page(
  259. AvrIsp* instance,
  260. uint16_t addr,
  261. uint16_t page_size,
  262. uint8_t* data,
  263. uint32_t data_size) {
  264. furi_assert(instance);
  265. if(page_size > data_size) return false;
  266. for(uint16_t i = 0; i < page_size; i++) {
  267. data[i] = avr_isp_spi_transaction(instance, AVR_ISP_READ_EEPROM(addr));
  268. addr++;
  269. }
  270. return true;
  271. }
  272. bool avr_isp_read_page(
  273. AvrIsp* instance,
  274. uint32_t mem_type,
  275. uint16_t addr,
  276. uint16_t page_size,
  277. uint8_t* data,
  278. uint32_t data_size) {
  279. furi_assert(instance);
  280. bool res = false;
  281. if(mem_type == STK_SET_FLASH_TYPE)
  282. res = avr_isp_flash_read_page(instance, addr, page_size, data, data_size);
  283. if(mem_type == STK_SET_EEPROM_TYPE)
  284. res = avr_isp_eeprom_read_page(instance, addr, page_size, data, data_size);
  285. return res;
  286. }
  287. AvrIspSignature avr_isp_read_signature(AvrIsp* instance) {
  288. furi_assert(instance);
  289. AvrIspSignature signature;
  290. signature.vendor = avr_isp_spi_transaction(instance, AVR_ISP_READ_VENDOR);
  291. signature.part_family = avr_isp_spi_transaction(instance, AVR_ISP_READ_PART_FAMILY);
  292. signature.part_number = avr_isp_spi_transaction(instance, AVR_ISP_READ_PART_NUMBER);
  293. return signature;
  294. }
  295. uint8_t avr_isp_read_lock_byte(AvrIsp* instance) {
  296. furi_assert(instance);
  297. uint8_t data = 0;
  298. uint32_t starttime = furi_get_tick();
  299. while((furi_get_tick() - starttime) < 300) {
  300. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_LOCK_BYTE);
  301. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_LOCK_BYTE) == data) {
  302. break;
  303. };
  304. data = 0x00;
  305. }
  306. return data;
  307. }
  308. bool avr_isp_write_lock_byte(AvrIsp* instance, uint8_t lock) {
  309. furi_assert(instance);
  310. bool ret = false;
  311. if(avr_isp_read_lock_byte(instance) == lock) {
  312. ret = true;
  313. } else {
  314. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_LOCK_BYTE(lock));
  315. /* polling lock byte */
  316. uint32_t starttime = furi_get_tick();
  317. while((furi_get_tick() - starttime) < 30) {
  318. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_LOCK_BYTE) == lock) {
  319. ret = true;
  320. break;
  321. };
  322. }
  323. }
  324. return ret;
  325. }
  326. uint8_t avr_isp_read_fuse_low(AvrIsp* instance) {
  327. furi_assert(instance);
  328. uint8_t data = 0;
  329. uint32_t starttime = furi_get_tick();
  330. while((furi_get_tick() - starttime) < 300) {
  331. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_LOW);
  332. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_LOW) == data) {
  333. break;
  334. };
  335. data = 0x00;
  336. }
  337. return data;
  338. }
  339. bool avr_isp_write_fuse_low(AvrIsp* instance, uint8_t lfuse) {
  340. furi_assert(instance);
  341. bool ret = false;
  342. if(avr_isp_read_fuse_low(instance) == lfuse) {
  343. ret = true;
  344. } else {
  345. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FUSE_LOW(lfuse));
  346. /* polling fuse */
  347. uint32_t starttime = furi_get_tick();
  348. while((furi_get_tick() - starttime) < 30) {
  349. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_LOW) == lfuse) {
  350. ret = true;
  351. break;
  352. };
  353. }
  354. }
  355. return ret;
  356. }
  357. uint8_t avr_isp_read_fuse_high(AvrIsp* instance) {
  358. furi_assert(instance);
  359. uint8_t data = 0;
  360. uint32_t starttime = furi_get_tick();
  361. while((furi_get_tick() - starttime) < 300) {
  362. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_HIGH);
  363. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_HIGH) == data) {
  364. break;
  365. };
  366. data = 0x00;
  367. }
  368. return data;
  369. }
  370. bool avr_isp_write_fuse_high(AvrIsp* instance, uint8_t hfuse) {
  371. furi_assert(instance);
  372. bool ret = false;
  373. if(avr_isp_read_fuse_high(instance) == hfuse) {
  374. ret = true;
  375. } else {
  376. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FUSE_HIGH(hfuse));
  377. /* polling fuse */
  378. uint32_t starttime = furi_get_tick();
  379. while((furi_get_tick() - starttime) < 30) {
  380. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_HIGH) == hfuse) {
  381. ret = true;
  382. break;
  383. };
  384. }
  385. }
  386. return ret;
  387. }
  388. uint8_t avr_isp_read_fuse_extended(AvrIsp* instance) {
  389. furi_assert(instance);
  390. uint8_t data = 0;
  391. uint32_t starttime = furi_get_tick();
  392. while((furi_get_tick() - starttime) < 300) {
  393. data = avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_EXTENDED);
  394. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_EXTENDED) == data) {
  395. break;
  396. };
  397. data = 0x00;
  398. }
  399. return data;
  400. }
  401. bool avr_isp_write_fuse_extended(AvrIsp* instance, uint8_t efuse) {
  402. furi_assert(instance);
  403. bool ret = false;
  404. if(avr_isp_read_fuse_extended(instance) == efuse) {
  405. ret = true;
  406. } else {
  407. avr_isp_spi_transaction(instance, AVR_ISP_WRITE_FUSE_EXTENDED(efuse));
  408. /* polling fuse */
  409. uint32_t starttime = furi_get_tick();
  410. while((furi_get_tick() - starttime) < 30) {
  411. if(avr_isp_spi_transaction(instance, AVR_ISP_READ_FUSE_EXTENDED) == efuse) {
  412. ret = true;
  413. break;
  414. };
  415. }
  416. }
  417. return ret;
  418. }
  419. void avr_isp_write_extended_addr(AvrIsp* instance, uint8_t extended_addr) {
  420. furi_assert(instance);
  421. avr_isp_spi_transaction(instance, AVR_ISP_EXTENDED_ADDR(extended_addr));
  422. furi_delay_ms(10);
  423. }