MX 2 лет назад
Родитель
Сommit
f2e470b7cb
88 измененных файлов с 1821 добавлено и 4064 удалено
  1. 4 1
      ReadMe.md
  2. 2 2
      application.fam
  3. 5 0
      docs/changelog.md
  4. 3 2
      esp_flasher_app.c
  5. 1 1
      esp_flasher_app.h
  6. 1 0
      esp_flasher_app_i.h
  7. 9 9
      esp_flasher_worker.c
  8. 0 366
      lib/esp-serial-flasher/CMakeCache.txt
  9. 0 76
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CMakeCCompiler.cmake
  10. 0 88
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake
  11. BIN
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin
  12. BIN
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin
  13. 0 15
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CMakeSystem.cmake
  14. 0 671
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c
  15. BIN
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CompilerIdC/a.out
  16. 0 660
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp
  17. BIN
      lib/esp-serial-flasher/CMakeFiles/3.16.3/CompilerIdCXX/a.out
  18. 0 463
      lib/esp-serial-flasher/CMakeFiles/CMakeOutput.log
  19. 0 1
      lib/esp-serial-flasher/CMakeFiles/cmake.check_cache
  20. 28 2
      lib/esp-serial-flasher/CMakeLists.txt
  21. 4 0
      lib/esp-serial-flasher/Kconfig
  22. 16 7
      lib/esp-serial-flasher/README.md
  23. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32/bootloader.bin
  24. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32/hello-world.bin
  25. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32/hello_world.bin
  26. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C2/bootloader.bin
  27. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C2/hello_world.bin
  28. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C2/partition-table.bin
  29. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C3/bootloader.bin
  30. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C3/hello_world.bin
  31. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C3/partition-table.bin
  32. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C6/bootloader.bin
  33. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C6/hello_world.bin
  34. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C6/partition-table.bin
  35. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_H2/bootloader.bin
  36. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_H2/hello_world.bin
  37. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S2/bootloader.bin
  38. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S2/hello-world.bin
  39. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S2/hello_world.bin
  40. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S3/bootloader.bin
  41. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S3/hello_world.bin
  42. BIN
      lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S3/partition-table.bin
  43. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32/app.bin
  44. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_C2/app.bin
  45. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_C3/app.bin
  46. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_C6/app.bin
  47. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_H2/app.bin
  48. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_S2/app.bin
  49. BIN
      lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_S3/app.bin
  50. 1 1
      lib/esp-serial-flasher/examples/binaries/RAM_APP/source/CMakeLists.txt
  51. 1 0
      lib/esp-serial-flasher/examples/binaries/RAM_APP/source/sdkconfig.defaults
  52. 81 1
      lib/esp-serial-flasher/examples/common/example_common.c
  53. 1 1
      lib/esp-serial-flasher/examples/esp32_example/partitions.csv
  54. 33 26
      lib/esp-serial-flasher/examples/stm32_example/CMakeLists.txt
  55. 73 0
      lib/esp-serial-flasher/examples/stm32_example/Core/Inc/main.h
  56. 515 0
      lib/esp-serial-flasher/examples/stm32_example/Core/Inc/stm32h7xx_hal_conf.h
  57. 66 0
      lib/esp-serial-flasher/examples/stm32_example/Core/Inc/stm32h7xx_it.h
  58. 15 1
      lib/esp-serial-flasher/examples/stm32_example/Core/Src/libc_compat.c
  59. 352 0
      lib/esp-serial-flasher/examples/stm32_example/Core/Src/main.c
  60. 209 0
      lib/esp-serial-flasher/examples/stm32_example/Core/Src/stm32h7xx_hal_msp.c
  61. 14 15
      lib/esp-serial-flasher/examples/stm32_example/Core/Src/stm32h7xx_it.c
  62. 0 50
      lib/esp-serial-flasher/examples/stm32_example/Inc/main.h
  63. 0 443
      lib/esp-serial-flasher/examples/stm32_example/Inc/stm32f4xx_hal_conf.h
  64. 0 42
      lib/esp-serial-flasher/examples/stm32_example/Inc/stm32f4xx_it.h
  65. 10 17
      lib/esp-serial-flasher/examples/stm32_example/README.md
  66. 0 189
      lib/esp-serial-flasher/examples/stm32_example/Src/main.c
  67. 0 109
      lib/esp-serial-flasher/examples/stm32_example/Src/stm32f4xx_hal_msp.c
  68. 0 727
      lib/esp-serial-flasher/examples/stm32_example/Src/system_stm32f4xx.c
  69. 192 0
      lib/esp-serial-flasher/examples/stm32_example/stm32_flasher.ioc
  70. 17 15
      lib/esp-serial-flasher/examples/zephyr_example/README.md
  71. 1 1
      lib/esp-serial-flasher/examples/zephyr_example/boards/esp32_devkitc_wroom.overlay
  72. 34 0
      lib/esp-serial-flasher/examples/zephyr_example/boards/esp32_devkitc_wrover.overlay
  73. 3 1
      lib/esp-serial-flasher/examples/zephyr_example/sample.yaml
  74. 4 4
      lib/esp-serial-flasher/examples/zephyr_example/src/main.c
  75. 1 1
      lib/esp-serial-flasher/idf_component.yml
  76. 3 17
      lib/esp-serial-flasher/include/esp_loader.h
  77. 2 2
      lib/esp-serial-flasher/port/esp32_port.c
  78. 23 0
      lib/esp-serial-flasher/port/stm32_port.h
  79. 1 1
      lib/esp-serial-flasher/port/zephyr_port.c
  80. 18 4
      lib/esp-serial-flasher/src/esp_loader.c
  81. 36 2
      lib/esp-serial-flasher/src/esp_targets.c
  82. 5 5
      lib/esp-serial-flasher/src/protocol_common.c
  83. 7 1
      lib/esp-serial-flasher/src/protocol_uart.c
  84. 0 20
      lib/esp-serial-flasher/submodules/CMakeLists.txt
  85. 1 0
      lib/esp-serial-flasher/test/CMakeLists.txt
  86. 10 2
      lib/esp-serial-flasher/test/test.cpp
  87. 6 0
      lib/esp-serial-flasher/zephyr/CMakeLists.txt
  88. 13 2
      scenes/esp_flasher_scene_browse.c

+ 4 - 1
ReadMe.md

@@ -52,7 +52,10 @@ For app feedback, bugs, and feature requests, please [create an issue here](http
 
 
 You can find me (0xchocolate) on discord as @cococode.
 You can find me (0xchocolate) on discord as @cococode.
 
 
-If you'd like to donate to the app development effort:  
+If you'd like to donate to the app development effort:
+
+[![ko-fi](https://ko-fi.com/img/githubbutton_sm.svg)](https://ko-fi.com/O4O1R7X6K)
+
 **ETH**: `0xf32A1F0CD6122C97d8953183E53cB889cc087C9b`  
 **ETH**: `0xf32A1F0CD6122C97d8953183E53cB889cc087C9b`  
 **BTC**: `bc1qtw7s25cwdkuaups22yna8sttfxn0usm2f35wc3`
 **BTC**: `bc1qtw7s25cwdkuaups22yna8sttfxn0usm2f35wc3`
 
 

+ 2 - 2
application.fam

@@ -1,7 +1,7 @@
 App(
 App(
     appid="esp_flasher",
     appid="esp_flasher",
     name="ESP Flasher",
     name="ESP Flasher",
-    fap_version=(1,3),
+    fap_version=(1,4),
     apptype=FlipperAppType.EXTERNAL,
     apptype=FlipperAppType.EXTERNAL,
     entry_point="esp_flasher_app",
     entry_point="esp_flasher_app",
     requires=["gui"],
     requires=["gui"],
@@ -22,7 +22,7 @@ App(
                     "src/slip.c"
                     "src/slip.c"
                 ],
                 ],
                 cincludes=["lib/esp-serial-flasher/private_include"],
                 cincludes=["lib/esp-serial-flasher/private_include"],
-                cdefines=["SERIAL_FLASHER_INTERFACE_UART=1", "MD5_ENABLED=1"],
+                cdefines=["SERIAL_FLASHER_INTERFACE_UART=1", "MD5_ENABLED=1", "SERIAL_FLASHER_WRITE_BLOCK_RETRIES=10"],
             ),
             ),
         ],
         ],
     cdefines=["SERIAL_FLASHER_INTERFACE_UART=1"],
     cdefines=["SERIAL_FLASHER_INTERFACE_UART=1"],

+ 5 - 0
docs/changelog.md

@@ -1,3 +1,8 @@
+## v1.4
+
+Turbo mode (gotta go fast)! The app now supports flashing as fast as possible (921600 baud with built-in retries). In my testing, this sped up a 1:37min flash to 23 seconds. Now we can't go back to the slow way!
+
+
 ## v1.3
 ## v1.3
 
 
 No functionality changes. Fixed the build by removing deprecated API calls that weren't needed.
 No functionality changes. Fixed the build by removing deprecated API calls that weren't needed.

+ 3 - 2
esp_flasher_app.c

@@ -69,6 +69,8 @@ EspFlasherApp* esp_flasher_app_alloc() {
     app->reset = false;
     app->reset = false;
     app->boot = false;
     app->boot = false;
 
 
+    app->turbospeed = false;
+
     scene_manager_next_scene(app->scene_manager, EspFlasherSceneStart);
     scene_manager_next_scene(app->scene_manager, EspFlasherSceneStart);
 
 
     return app;
     return app;
@@ -116,7 +118,6 @@ int32_t esp_flasher_app(void* p) {
     UNUSED(p);
     UNUSED(p);
 
 
     uint8_t attempts = 0;
     uint8_t attempts = 0;
-    bool otg_was_enabled = furi_hal_power_is_otg_enabled();
     while(!furi_hal_power_is_otg_enabled() && attempts++ < 5) {
     while(!furi_hal_power_is_otg_enabled() && attempts++ < 5) {
         furi_hal_power_enable_otg();
         furi_hal_power_enable_otg();
         furi_delay_ms(10);
         furi_delay_ms(10);
@@ -133,7 +134,7 @@ int32_t esp_flasher_app(void* p) {
 
 
     esp_flasher_app_free(esp_flasher_app);
     esp_flasher_app_free(esp_flasher_app);
 
 
-    if(furi_hal_power_is_otg_enabled() && !otg_was_enabled) {
+    if(furi_hal_power_is_otg_enabled()) {
         furi_hal_power_disable_otg();
         furi_hal_power_disable_otg();
     }
     }
 
 

+ 1 - 1
esp_flasher_app.h

@@ -4,7 +4,7 @@
 extern "C" {
 extern "C" {
 #endif
 #endif
 
 
-#define ESP_FLASHER_APP_VERSION "v1.3"
+#define ESP_FLASHER_APP_VERSION "v1.4"
 
 
 typedef struct EspFlasherApp EspFlasherApp;
 typedef struct EspFlasherApp EspFlasherApp;
 
 

+ 1 - 0
esp_flasher_app_i.h

@@ -62,6 +62,7 @@ struct EspFlasherApp {
     Submenu* submenu;
     Submenu* submenu;
 
 
     EspFlasherUart* uart;
     EspFlasherUart* uart;
+    bool turbospeed;
 
 
     bool reset;
     bool reset;
     bool boot;
     bool boot;

+ 9 - 9
esp_flasher_worker.c

@@ -227,11 +227,10 @@ static int32_t esp_flasher_flash_bin(void* context) {
         loader_port_debug_print(err_msg);
         loader_port_debug_print(err_msg);
     }
     }
 
 
-#if 0 // still getting packet drops with this
     // higher BR
     // higher BR
-    if(!err) {
+    if(!err && app->turbospeed) {
         loader_port_debug_print("Increasing speed for faster flash\n");
         loader_port_debug_print("Increasing speed for faster flash\n");
-        err = esp_loader_change_transmission_rate(230400);
+        err = esp_loader_change_transmission_rate(921600);
         if (err != ESP_LOADER_SUCCESS) {
         if (err != ESP_LOADER_SUCCESS) {
             char err_msg[256];
             char err_msg[256];
             snprintf(
             snprintf(
@@ -241,9 +240,8 @@ static int32_t esp_flasher_flash_bin(void* context) {
                 err);
                 err);
             loader_port_debug_print(err_msg);
             loader_port_debug_print(err_msg);
         }
         }
-        furi_hal_uart_set_br(FuriHalUartIdUSART1, 230400);
+        furi_hal_uart_set_br(FuriHalUartIdUSART1, 921600);
     }
     }
-#endif
 
 
     if(!err) {
     if(!err) {
         loader_port_debug_print("Connected\n");
         loader_port_debug_print("Connected\n");
@@ -251,10 +249,12 @@ static int32_t esp_flasher_flash_bin(void* context) {
             _flash_all_files(app);
             _flash_all_files(app);
         }
         }
         app->switch_fw = SwitchNotSet;
         app->switch_fw = SwitchNotSet;
-#if 0
-        loader_port_debug_print("Restoring transmission rate\n");
-        furi_hal_uart_set_br(FuriHalUartIdUSART1, 115200);
-#endif
+
+        if (app->turbospeed) {
+            loader_port_debug_print("Restoring transmission rate\n");
+            furi_hal_uart_set_br(FuriHalUartIdUSART1, 115200);
+        }
+
         loader_port_debug_print(
         loader_port_debug_print(
             "Done flashing. Please reset the board manually if it doesn't auto-reset.\n");
             "Done flashing. Please reset the board manually if it doesn't auto-reset.\n");
 
 

+ 0 - 366
lib/esp-serial-flasher/CMakeCache.txt

@@ -1,366 +0,0 @@
-# This is the CMakeCache file.
-# For build in directory: /home/cococode/flipperzero-firmware/lib/esp-serial-flasher
-# It was generated by CMake: /usr/bin/cmake
-# You can edit this file to change values found and used by cmake.
-# If you do not want to change any of the values, simply exit the editor.
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-CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE
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-# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__     & 0xFFFF)
-
-#elif defined(__BORLANDC__)
-# define COMPILER_ID "Borland"
-  /* __BORLANDC__ = 0xVRR */
-# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
-# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
-
-#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
-# define COMPILER_ID "Watcom"
-   /* __WATCOMC__ = VVRR */
-# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
-# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
-# if (__WATCOMC__ % 10) > 0
-#  define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
-# endif
-
-#elif defined(__WATCOMC__)
-# define COMPILER_ID "OpenWatcom"
-   /* __WATCOMC__ = VVRP + 1100 */
-# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
-# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
-# if (__WATCOMC__ % 10) > 0
-#  define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
-# endif
-
-#elif defined(__SUNPRO_C)
-# define COMPILER_ID "SunPro"
-# if __SUNPRO_C >= 0x5100
-   /* __SUNPRO_C = 0xVRRP */
-#  define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12)
-#  define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF)
-#  define COMPILER_VERSION_PATCH HEX(__SUNPRO_C    & 0xF)
-# else
-   /* __SUNPRO_CC = 0xVRP */
-#  define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8)
-#  define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF)
-#  define COMPILER_VERSION_PATCH HEX(__SUNPRO_C    & 0xF)
-# endif
-
-#elif defined(__HP_cc)
-# define COMPILER_ID "HP"
-  /* __HP_cc = VVRRPP */
-# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000)
-# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100)
-# define COMPILER_VERSION_PATCH DEC(__HP_cc     % 100)
-
-#elif defined(__DECC)
-# define COMPILER_ID "Compaq"
-  /* __DECC_VER = VVRRTPPPP */
-# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000)
-# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000  % 100)
-# define COMPILER_VERSION_PATCH DEC(__DECC_VER         % 10000)
-
-#elif defined(__IBMC__) && defined(__COMPILER_VER__)
-# define COMPILER_ID "zOS"
-  /* __IBMC__ = VRP */
-# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
-# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
-# define COMPILER_VERSION_PATCH DEC(__IBMC__    % 10)
-
-#elif defined(__ibmxl__) && defined(__clang__)
-# define COMPILER_ID "XLClang"
-# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
-# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
-# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
-# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
-
-
-#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800
-# define COMPILER_ID "XL"
-  /* __IBMC__ = VRP */
-# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
-# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
-# define COMPILER_VERSION_PATCH DEC(__IBMC__    % 10)
-
-#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800
-# define COMPILER_ID "VisualAge"
-  /* __IBMC__ = VRP */
-# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
-# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
-# define COMPILER_VERSION_PATCH DEC(__IBMC__    % 10)
-
-#elif defined(__PGI)
-# define COMPILER_ID "PGI"
-# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
-# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
-# if defined(__PGIC_PATCHLEVEL__)
-#  define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
-# endif
-
-#elif defined(_CRAYC)
-# define COMPILER_ID "Cray"
-# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
-# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
-
-#elif defined(__TI_COMPILER_VERSION__)
-# define COMPILER_ID "TI"
-  /* __TI_COMPILER_VERSION__ = VVVRRRPPP */
-# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
-# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000   % 1000)
-# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__        % 1000)
-
-#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version)
-# define COMPILER_ID "Fujitsu"
-
-#elif defined(__ghs__)
-# define COMPILER_ID "GHS"
-/* __GHS_VERSION_NUMBER = VVVVRP */
-# ifdef __GHS_VERSION_NUMBER
-# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
-# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
-# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER      % 10)
-# endif
-
-#elif defined(__TINYC__)
-# define COMPILER_ID "TinyCC"
-
-#elif defined(__BCC__)
-# define COMPILER_ID "Bruce"
-
-#elif defined(__SCO_VERSION__)
-# define COMPILER_ID "SCO"
-
-#elif defined(__ARMCC_VERSION) && !defined(__clang__)
-# define COMPILER_ID "ARMCC"
-#if __ARMCC_VERSION >= 1000000
-  /* __ARMCC_VERSION = VRRPPPP */
-  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
-  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
-  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION     % 10000)
-#else
-  /* __ARMCC_VERSION = VRPPPP */
-  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
-  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
-  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION    % 10000)
-#endif
-
-
-#elif defined(__clang__) && defined(__apple_build_version__)
-# define COMPILER_ID "AppleClang"
-# if defined(_MSC_VER)
-#  define SIMULATE_ID "MSVC"
-# endif
-# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
-# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
-# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
-# if defined(_MSC_VER)
-   /* _MSC_VER = VVRR */
-#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
-#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
-# endif
-# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
-
-#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
-# define COMPILER_ID "ARMClang"
-  # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
-  # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
-  # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION     % 10000)
-# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
-
-#elif defined(__clang__)
-# define COMPILER_ID "Clang"
-# if defined(_MSC_VER)
-#  define SIMULATE_ID "MSVC"
-# endif
-# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
-# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
-# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
-# if defined(_MSC_VER)
-   /* _MSC_VER = VVRR */
-#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
-#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
-# endif
-
-#elif defined(__GNUC__)
-# define COMPILER_ID "GNU"
-# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
-# if defined(__GNUC_MINOR__)
-#  define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
-# endif
-# if defined(__GNUC_PATCHLEVEL__)
-#  define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
-# endif
-
-#elif defined(_MSC_VER)
-# define COMPILER_ID "MSVC"
-  /* _MSC_VER = VVRR */
-# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
-# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
-# if defined(_MSC_FULL_VER)
-#  if _MSC_VER >= 1400
-    /* _MSC_FULL_VER = VVRRPPPPP */
-#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
-#  else
-    /* _MSC_FULL_VER = VVRRPPPP */
-#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
-#  endif
-# endif
-# if defined(_MSC_BUILD)
-#  define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
-# endif
-
-#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__)
-# define COMPILER_ID "ADSP"
-#if defined(__VISUALDSPVERSION__)
-  /* __VISUALDSPVERSION__ = 0xVVRRPP00 */
-# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24)
-# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF)
-# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8  & 0xFF)
-#endif
-
-#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
-# define COMPILER_ID "IAR"
-# if defined(__VER__) && defined(__ICCARM__)
-#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
-#  define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
-#  define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
-#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
-# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__))
-#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
-#  define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
-#  define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
-#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
-# endif
-
-#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC)
-# define COMPILER_ID "SDCC"
-# if defined(__SDCC_VERSION_MAJOR)
-#  define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR)
-#  define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR)
-#  define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH)
-# else
-  /* SDCC = VRP */
-#  define COMPILER_VERSION_MAJOR DEC(SDCC/100)
-#  define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10)
-#  define COMPILER_VERSION_PATCH DEC(SDCC    % 10)
-# endif
-
-
-/* These compilers are either not known or too old to define an
-  identification macro.  Try to identify the platform and guess that
-  it is the native compiler.  */
-#elif defined(__hpux) || defined(__hpua)
-# define COMPILER_ID "HP"
-
-#else /* unknown compiler */
-# define COMPILER_ID ""
-#endif
-
-/* Construct the string literal in pieces to prevent the source from
-   getting matched.  Store it in a pointer rather than an array
-   because some compilers will just produce instructions to fill the
-   array rather than assigning a pointer to a static array.  */
-char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
-#ifdef SIMULATE_ID
-char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
-#endif
-
-#ifdef __QNXNTO__
-char const* qnxnto = "INFO" ":" "qnxnto[]";
-#endif
-
-#if defined(__CRAYXE) || defined(__CRAYXC)
-char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
-#endif
-
-#define STRINGIFY_HELPER(X) #X
-#define STRINGIFY(X) STRINGIFY_HELPER(X)
-
-/* Identify known platforms by name.  */
-#if defined(__linux) || defined(__linux__) || defined(linux)
-# define PLATFORM_ID "Linux"
-
-#elif defined(__CYGWIN__)
-# define PLATFORM_ID "Cygwin"
-
-#elif defined(__MINGW32__)
-# define PLATFORM_ID "MinGW"
-
-#elif defined(__APPLE__)
-# define PLATFORM_ID "Darwin"
-
-#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
-# define PLATFORM_ID "Windows"
-
-#elif defined(__FreeBSD__) || defined(__FreeBSD)
-# define PLATFORM_ID "FreeBSD"
-
-#elif defined(__NetBSD__) || defined(__NetBSD)
-# define PLATFORM_ID "NetBSD"
-
-#elif defined(__OpenBSD__) || defined(__OPENBSD)
-# define PLATFORM_ID "OpenBSD"
-
-#elif defined(__sun) || defined(sun)
-# define PLATFORM_ID "SunOS"
-
-#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
-# define PLATFORM_ID "AIX"
-
-#elif defined(__hpux) || defined(__hpux__)
-# define PLATFORM_ID "HP-UX"
-
-#elif defined(__HAIKU__)
-# define PLATFORM_ID "Haiku"
-
-#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
-# define PLATFORM_ID "BeOS"
-
-#elif defined(__QNX__) || defined(__QNXNTO__)
-# define PLATFORM_ID "QNX"
-
-#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
-# define PLATFORM_ID "Tru64"
-
-#elif defined(__riscos) || defined(__riscos__)
-# define PLATFORM_ID "RISCos"
-
-#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
-# define PLATFORM_ID "SINIX"
-
-#elif defined(__UNIX_SV__)
-# define PLATFORM_ID "UNIX_SV"
-
-#elif defined(__bsdos__)
-# define PLATFORM_ID "BSDOS"
-
-#elif defined(_MPRAS) || defined(MPRAS)
-# define PLATFORM_ID "MP-RAS"
-
-#elif defined(__osf) || defined(__osf__)
-# define PLATFORM_ID "OSF1"
-
-#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
-# define PLATFORM_ID "SCO_SV"
-
-#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
-# define PLATFORM_ID "ULTRIX"
-
-#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
-# define PLATFORM_ID "Xenix"
-
-#elif defined(__WATCOMC__)
-# if defined(__LINUX__)
-#  define PLATFORM_ID "Linux"
-
-# elif defined(__DOS__)
-#  define PLATFORM_ID "DOS"
-
-# elif defined(__OS2__)
-#  define PLATFORM_ID "OS2"
-
-# elif defined(__WINDOWS__)
-#  define PLATFORM_ID "Windows3x"
-
-# else /* unknown platform */
-#  define PLATFORM_ID
-# endif
-
-#elif defined(__INTEGRITY)
-# if defined(INT_178B)
-#  define PLATFORM_ID "Integrity178"
-
-# else /* regular Integrity */
-#  define PLATFORM_ID "Integrity"
-# endif
-
-#else /* unknown platform */
-# define PLATFORM_ID
-
-#endif
-
-/* For windows compilers MSVC and Intel we can determine
-   the architecture of the compiler being used.  This is because
-   the compilers do not have flags that can change the architecture,
-   but rather depend on which compiler is being used
-*/
-#if defined(_WIN32) && defined(_MSC_VER)
-# if defined(_M_IA64)
-#  define ARCHITECTURE_ID "IA64"
-
-# elif defined(_M_X64) || defined(_M_AMD64)
-#  define ARCHITECTURE_ID "x64"
-
-# elif defined(_M_IX86)
-#  define ARCHITECTURE_ID "X86"
-
-# elif defined(_M_ARM64)
-#  define ARCHITECTURE_ID "ARM64"
-
-# elif defined(_M_ARM)
-#  if _M_ARM == 4
-#   define ARCHITECTURE_ID "ARMV4I"
-#  elif _M_ARM == 5
-#   define ARCHITECTURE_ID "ARMV5I"
-#  else
-#   define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
-#  endif
-
-# elif defined(_M_MIPS)
-#  define ARCHITECTURE_ID "MIPS"
-
-# elif defined(_M_SH)
-#  define ARCHITECTURE_ID "SHx"
-
-# else /* unknown architecture */
-#  define ARCHITECTURE_ID ""
-# endif
-
-#elif defined(__WATCOMC__)
-# if defined(_M_I86)
-#  define ARCHITECTURE_ID "I86"
-
-# elif defined(_M_IX86)
-#  define ARCHITECTURE_ID "X86"
-
-# else /* unknown architecture */
-#  define ARCHITECTURE_ID ""
-# endif
-
-#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
-# if defined(__ICCARM__)
-#  define ARCHITECTURE_ID "ARM"
-
-# elif defined(__ICCRX__)
-#  define ARCHITECTURE_ID "RX"
-
-# elif defined(__ICCRH850__)
-#  define ARCHITECTURE_ID "RH850"
-
-# elif defined(__ICCRL78__)
-#  define ARCHITECTURE_ID "RL78"
-
-# elif defined(__ICCRISCV__)
-#  define ARCHITECTURE_ID "RISCV"
-
-# elif defined(__ICCAVR__)
-#  define ARCHITECTURE_ID "AVR"
-
-# elif defined(__ICC430__)
-#  define ARCHITECTURE_ID "MSP430"
-
-# elif defined(__ICCV850__)
-#  define ARCHITECTURE_ID "V850"
-
-# elif defined(__ICC8051__)
-#  define ARCHITECTURE_ID "8051"
-
-# else /* unknown architecture */
-#  define ARCHITECTURE_ID ""
-# endif
-
-#elif defined(__ghs__)
-# if defined(__PPC64__)
-#  define ARCHITECTURE_ID "PPC64"
-
-# elif defined(__ppc__)
-#  define ARCHITECTURE_ID "PPC"
-
-# elif defined(__ARM__)
-#  define ARCHITECTURE_ID "ARM"
-
-# elif defined(__x86_64__)
-#  define ARCHITECTURE_ID "x64"
-
-# elif defined(__i386__)
-#  define ARCHITECTURE_ID "X86"
-
-# else /* unknown architecture */
-#  define ARCHITECTURE_ID ""
-# endif
-#else
-#  define ARCHITECTURE_ID
-#endif
-
-/* Convert integer to decimal digit literals.  */
-#define DEC(n)                   \
-  ('0' + (((n) / 10000000)%10)), \
-  ('0' + (((n) / 1000000)%10)),  \
-  ('0' + (((n) / 100000)%10)),   \
-  ('0' + (((n) / 10000)%10)),    \
-  ('0' + (((n) / 1000)%10)),     \
-  ('0' + (((n) / 100)%10)),      \
-  ('0' + (((n) / 10)%10)),       \
-  ('0' +  ((n) % 10))
-
-/* Convert integer to hex digit literals.  */
-#define HEX(n)             \
-  ('0' + ((n)>>28 & 0xF)), \
-  ('0' + ((n)>>24 & 0xF)), \
-  ('0' + ((n)>>20 & 0xF)), \
-  ('0' + ((n)>>16 & 0xF)), \
-  ('0' + ((n)>>12 & 0xF)), \
-  ('0' + ((n)>>8  & 0xF)), \
-  ('0' + ((n)>>4  & 0xF)), \
-  ('0' + ((n)     & 0xF))
-
-/* Construct a string literal encoding the version number components. */
-#ifdef COMPILER_VERSION_MAJOR
-char const info_version[] = {
-  'I', 'N', 'F', 'O', ':',
-  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[',
-  COMPILER_VERSION_MAJOR,
-# ifdef COMPILER_VERSION_MINOR
-  '.', COMPILER_VERSION_MINOR,
-#  ifdef COMPILER_VERSION_PATCH
-   '.', COMPILER_VERSION_PATCH,
-#   ifdef COMPILER_VERSION_TWEAK
-    '.', COMPILER_VERSION_TWEAK,
-#   endif
-#  endif
-# endif
-  ']','\0'};
-#endif
-
-/* Construct a string literal encoding the internal version number. */
-#ifdef COMPILER_VERSION_INTERNAL
-char const info_version_internal[] = {
-  'I', 'N', 'F', 'O', ':',
-  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_',
-  'i','n','t','e','r','n','a','l','[',
-  COMPILER_VERSION_INTERNAL,']','\0'};
-#endif
-
-/* Construct a string literal encoding the version number components. */
-#ifdef SIMULATE_VERSION_MAJOR
-char const info_simulate_version[] = {
-  'I', 'N', 'F', 'O', ':',
-  's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
-  SIMULATE_VERSION_MAJOR,
-# ifdef SIMULATE_VERSION_MINOR
-  '.', SIMULATE_VERSION_MINOR,
-#  ifdef SIMULATE_VERSION_PATCH
-   '.', SIMULATE_VERSION_PATCH,
-#   ifdef SIMULATE_VERSION_TWEAK
-    '.', SIMULATE_VERSION_TWEAK,
-#   endif
-#  endif
-# endif
-  ']','\0'};
-#endif
-
-/* Construct the string literal in pieces to prevent the source from
-   getting matched.  Store it in a pointer rather than an array
-   because some compilers will just produce instructions to fill the
-   array rather than assigning a pointer to a static array.  */
-char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]";
-char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]";
-
-
-
-
-#if !defined(__STDC__)
-# if (defined(_MSC_VER) && !defined(__clang__)) \
-  || (defined(__ibmxl__) || defined(__IBMC__))
-#  define C_DIALECT "90"
-# else
-#  define C_DIALECT
-# endif
-#elif __STDC_VERSION__ >= 201000L
-# define C_DIALECT "11"
-#elif __STDC_VERSION__ >= 199901L
-# define C_DIALECT "99"
-#else
-# define C_DIALECT "90"
-#endif
-const char* info_language_dialect_default =
-  "INFO" ":" "dialect_default[" C_DIALECT "]";
-
-/*--------------------------------------------------------------------------*/
-
-#ifdef ID_VOID_MAIN
-void main() {}
-#else
-# if defined(__CLASSIC_C__)
-int main(argc, argv) int argc; char *argv[];
-# else
-int main(int argc, char* argv[])
-# endif
-{
-  int require = 0;
-  require += info_compiler[argc];
-  require += info_platform[argc];
-  require += info_arch[argc];
-#ifdef COMPILER_VERSION_MAJOR
-  require += info_version[argc];
-#endif
-#ifdef COMPILER_VERSION_INTERNAL
-  require += info_version_internal[argc];
-#endif
-#ifdef SIMULATE_ID
-  require += info_simulate[argc];
-#endif
-#ifdef SIMULATE_VERSION_MAJOR
-  require += info_simulate_version[argc];
-#endif
-#if defined(__CRAYXE) || defined(__CRAYXC)
-  require += info_cray[argc];
-#endif
-  require += info_language_dialect_default[argc];
-  (void)argv;
-  return require;
-}
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lib/esp-serial-flasher/CMakeFiles/3.16.3/CompilerIdC/a.out


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+ 0 - 1
lib/esp-serial-flasher/CMakeFiles/cmake.check_cache

@@ -1 +0,0 @@
-# This file is generated by cmake for dependency checking of the CMakeCache.txt file

+ 28 - 2
lib/esp-serial-flasher/CMakeLists.txt

@@ -64,7 +64,16 @@ else()
     target_include_directories(flasher PUBLIC include port PRIVATE private_include)
     target_include_directories(flasher PUBLIC include port PRIVATE private_include)
 
 
     if(PORT STREQUAL "STM32")
     if(PORT STREQUAL "STM32")
-        target_link_libraries(flasher PUBLIC stm_cube)
+        stm32_get_chip_info(${STM32_CHIP} FAMILY DEVICE_FAMILY DEVICE DEVICE_CODE)
+        if(DEFINED CORE_USED)
+            string(APPEND DEVICE_FAMILY ::${CORE_USED})
+            string(APPEND DEVICE_CODE ::${CORE_USED})
+        endif()
+        target_link_libraries(flasher PRIVATE
+            HAL::STM32::${DEVICE_FAMILY}::GPIO
+            HAL::STM32::${DEVICE_FAMILY}::UART
+            CMSIS::STM32::${DEVICE_CODE}
+        )
         target_sources(flasher PRIVATE port/stm32_port.c)
         target_sources(flasher PRIVATE port/stm32_port.c)
     elseif(PORT STREQUAL "RASPBERRY_PI")
     elseif(PORT STREQUAL "RASPBERRY_PI")
         find_library(pigpio_LIB pigpio)
         find_library(pigpio_LIB pigpio)
@@ -116,4 +125,21 @@ else()
             SERIAL_FLASHER_BOOT_HOLD_TIME_MS=50
             SERIAL_FLASHER_BOOT_HOLD_TIME_MS=50
         )
         )
     endif()
     endif()
-endif()
+endif()
+
+if (DEFINED CONFIG_SERIAL_FLASHER_WRITE_BLOCK_RETRIES)
+    target_compile_definitions(${target}
+    PUBLIC
+        SERIAL_FLASHER_WRITE_BLOCK_RETRIES=${CONFIG_SERIAL_FLASHER_WRITE_BLOCK_RETRIES}
+    )
+elseif (DEFINED SERIAL_FLASHER_WRITE_BLOCK_RETRIES)
+    target_compile_definitions(${target}
+    PUBLIC
+        SERIAL_FLASHER_WRITE_BLOCK_RETRIES=${SERIAL_FLASHER_WRITE_BLOCK_RETRIES}
+    )
+else()
+    target_compile_definitions(${target}
+    PUBLIC
+        SERIAL_FLASHER_WRITE_BLOCK_RETRIES=3
+    )
+endif()

+ 4 - 0
lib/esp-serial-flasher/Kconfig

@@ -31,4 +31,8 @@ menu "ESP serial flasher"
         bool "Enable debug tracing output (only transfer data tracing is supported at the time)"
         bool "Enable debug tracing output (only transfer data tracing is supported at the time)"
         default n
         default n
 
 
+    config SERIAL_FLASHER_WRITE_BLOCK_RETRIES
+        int "Number of retries when writing blocks either to target flash or RAM"
+        default 3
+
 endmenu
 endmenu

+ 16 - 7
lib/esp-serial-flasher/README.md

@@ -21,6 +21,7 @@ Supported **target** microcontrollers:
 - ESP32-C3
 - ESP32-C3
 - ESP32-C2
 - ESP32-C2
 - ESP32-H2
 - ESP32-H2
+- ESP32-C6
 
 
 Supported hardware interfaces:
 Supported hardware interfaces:
 - UART
 - UART
@@ -68,6 +69,12 @@ If enabled, `esp-serial-flasher` is capable of verifying flash integrity after w
 Default: Enabled
 Default: Enabled
 > Warning: As ROM bootloader of the ESP8266 does not support MD5_CHECK, this option has to be disabled!
 > Warning: As ROM bootloader of the ESP8266 does not support MD5_CHECK, this option has to be disabled!
 
 
+* `SERIAL_FLASHER_WRITE_BLOCK_RETRIES`
+
+This configures the amount of retries for writing blocks either to target flash or RAM.
+
+Default: 3
+
 * `SERIAL_FLASHER_RESET_HOLD_TIME_MS`
 * `SERIAL_FLASHER_RESET_HOLD_TIME_MS`
 
 
 This is the time for which the reset pin is asserted when doing a hard reset in milliseconds.
 This is the time for which the reset pin is asserted when doing a hard reset in milliseconds.
@@ -102,24 +109,26 @@ git submodule update --init
 
 
 In addition to configuration parameters mentioned above, following definitions has to be set:
 In addition to configuration parameters mentioned above, following definitions has to be set:
 
 
-- TOOLCHAIN_PREFIX: path to arm toolchain (i.e /home/user/gcc-arm-none-eabi-9-2019-q4-major)
-- STM32Cube_DIR: path to STM32 Cube libraries (i.e /home/user/STM32Cube/Repository/STM32Cube_FW_F4_V1.25.0)
+- STM32_TOOLCHAIN_PATH: path to arm toolchain (i.e /home/user/gcc-arm-none-eabi-9-2019-q4-major)
+- STM32_CUBE_<CHIP_FAMILY>_PATH: path to STM32 Cube libraries (i.e /home/user/STM32Cube/Repository/STM32Cube_FW_F4_V1.25.0)
 - STM32_CHIP: name of STM32 for which project should be compiled (i.e STM32F407VG)
 - STM32_CHIP: name of STM32 for which project should be compiled (i.e STM32F407VG)
+- CORE_USED: core used on multicore devices (i.e. M7 or M4 on some STM32H7 chips)
 - PORT: STM32
 - PORT: STM32
 
 
 This can be achieved by passing definitions to the command line, such as:
 This can be achieved by passing definitions to the command line, such as:
 
 
 ```
 ```
-cmake -DTOOLCHAIN_PREFIX="/path_to_toolchain" -DSTM32Cube_DIR="path_to_stm32Cube" -DSTM32_CHIP="STM32F407VG" -DPORT="STM32" .. && cmake --build .
+cmake -DSTM32_TOOLCHAIN_PATH="path_to_toolchain" -DSTM32_CUBE_<CHIP_FAMILY>_PATH="path_to_cube_libraries" -DSTM32_CHIP="STM32F407VG" -DPORT="STM32" .. && cmake --build .
 ```
 ```
 
 
 Alternatively, those variables can be set in the top level `cmake` directory:
 Alternatively, those variables can be set in the top level `cmake` directory:
 
 
 ```
 ```
-set(TOOLCHAIN_PREFIX    path_to_toolchain)
-set(STM32Cube_DIR       path_to_stm32_HAL)
-set(STM32_CHIP          STM32F407VG)
-set(PORT                STM32)
+set(STM32_TOOLCHAIN_PATH path_to_toolchain)
+set(STM32_CUBE_H7_PATH path_to_cube_libraries)
+set(STM32_CHIP STM32H743VI)
+set(CORE_USED M7)
+set(PORT STM32)
 ```
 ```
 
 
 ### Zephyr support
 ### Zephyr support

BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32/hello-world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C2/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C2/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C2/partition-table.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C3/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C3/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C3/partition-table.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C6/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C6/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_C6/partition-table.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_H2/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_H2/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S2/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S2/hello-world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S2/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S3/bootloader.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S3/hello_world.bin


BIN
lib/esp-serial-flasher/examples/binaries/Hello-world/ESP32_S3/partition-table.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32/app.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_C2/app.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_C3/app.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_C6/app.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_H2/app.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_S2/app.bin


BIN
lib/esp-serial-flasher/examples/binaries/RAM_APP/ESP32_S3/app.bin


+ 1 - 1
lib/esp-serial-flasher/examples/binaries/RAM_APP/source/CMakeLists.txt

@@ -11,5 +11,5 @@ project(hello_world)
 # This generates a binary file from the elf, as the RAM build doesn't do that automatically
 # This generates a binary file from the elf, as the RAM build doesn't do that automatically
 add_custom_command(TARGET ${PROJECT_NAME}.elf
 add_custom_command(TARGET ${PROJECT_NAME}.elf
     POST_BUILD
     POST_BUILD
-    COMMAND esptool.py elf2image --output app.bin ${PROJECT_NAME}.elf
+    COMMAND esptool.py --chip ${IDF_TARGET} elf2image --output app.bin ${PROJECT_NAME}.elf
 )
 )

+ 1 - 0
lib/esp-serial-flasher/examples/binaries/RAM_APP/source/sdkconfig.defaults

@@ -2,6 +2,7 @@
 # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration
 # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration
 #
 #
 CONFIG_APP_BUILD_TYPE_ELF_RAM=y
 CONFIG_APP_BUILD_TYPE_ELF_RAM=y
+CONFIG_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_APP_NO_BLOBS=y
 CONFIG_APP_NO_BLOBS=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
 CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
 CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y

+ 81 - 1
lib/esp-serial-flasher/examples/common/example_common.c

@@ -46,6 +46,15 @@ extern const uint32_t ESP32_S2_hello_world_bin_size;
 extern const uint8_t  ESP32_S2_partition_table_bin[];
 extern const uint8_t  ESP32_S2_partition_table_bin[];
 extern const uint32_t ESP32_S2_partition_table_bin_size;
 extern const uint32_t ESP32_S2_partition_table_bin_size;
 
 
+extern const uint8_t  ESP32_S3_bootloader_bin[];
+extern const uint32_t ESP32_S3_bootloader_bin_size;
+extern const uint8_t  ESP32_S3_hello_world_bin[];
+extern const uint32_t ESP32_S3_hello_world_bin_size;
+extern const uint8_t  ESP32_S3_partition_table_bin[];
+extern const uint32_t ESP32_S3_partition_table_bin_size;
+
+
+
 extern const uint8_t  ESP8266_bootloader_bin[];
 extern const uint8_t  ESP8266_bootloader_bin[];
 extern const uint32_t ESP8266_bootloader_bin_size;
 extern const uint32_t ESP8266_bootloader_bin_size;
 extern const uint8_t  ESP8266_hello_world_bin[];
 extern const uint8_t  ESP8266_hello_world_bin[];
@@ -67,6 +76,27 @@ extern const uint32_t ESP32_H2_hello_world_bin_size;
 extern const uint8_t  ESP32_H2_partition_table_bin[];
 extern const uint8_t  ESP32_H2_partition_table_bin[];
 extern const uint32_t ESP32_H2_partition_table_bin_size;
 extern const uint32_t ESP32_H2_partition_table_bin_size;
 
 
+extern const uint8_t  ESP32_C2_bootloader_bin[];
+extern const uint32_t ESP32_C2_bootloader_bin_size;
+extern const uint8_t  ESP32_C2_hello_world_bin[];
+extern const uint32_t ESP32_C2_hello_world_bin_size;
+extern const uint8_t  ESP32_C2_partition_table_bin[];
+extern const uint32_t ESP32_C2_partition_table_bin_size;
+
+extern const uint8_t  ESP32_C3_bootloader_bin[];
+extern const uint32_t ESP32_C3_bootloader_bin_size;
+extern const uint8_t  ESP32_C3_hello_world_bin[];
+extern const uint32_t ESP32_C3_hello_world_bin_size;
+extern const uint8_t  ESP32_C3_partition_table_bin[];
+extern const uint32_t ESP32_C3_partition_table_bin_size;
+
+extern const uint8_t  ESP32_C6_bootloader_bin[];
+extern const uint32_t ESP32_C6_bootloader_bin_size;
+extern const uint8_t  ESP32_C6_hello_world_bin[];
+extern const uint32_t ESP32_C6_hello_world_bin_size;
+extern const uint8_t  ESP32_C6_partition_table_bin[];
+extern const uint32_t ESP32_C6_partition_table_bin_size;
+
 void get_example_binaries(target_chip_t target, example_binaries_t *bins)
 void get_example_binaries(target_chip_t target, example_binaries_t *bins)
 {
 {
     if (target == ESP8266_CHIP) {
     if (target == ESP8266_CHIP) {
@@ -119,7 +149,49 @@ void get_example_binaries(target_chip_t target, example_binaries_t *bins)
         bins->app.data  = ESP32_H2_hello_world_bin;
         bins->app.data  = ESP32_H2_hello_world_bin;
         bins->app.size  = ESP32_H2_hello_world_bin_size;
         bins->app.size  = ESP32_H2_hello_world_bin_size;
         bins->app.addr  = APPLICATION_ADDRESS;
         bins->app.addr  = APPLICATION_ADDRESS;
-    }else {
+    } else if (target == ESP32C2_CHIP){
+        bins->boot.data = ESP32_C2_bootloader_bin;
+        bins->boot.size = ESP32_C2_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_C2_partition_table_bin;
+        bins->part.size = ESP32_C2_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_C2_hello_world_bin;
+        bins->app.size  = ESP32_C2_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32C3_CHIP){
+        bins->boot.data = ESP32_C3_bootloader_bin;
+        bins->boot.size = ESP32_C3_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_C3_partition_table_bin;
+        bins->part.size = ESP32_C3_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_C3_hello_world_bin;
+        bins->app.size  = ESP32_C3_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    } else if (target == ESP32C6_CHIP){
+        bins->boot.data = ESP32_C6_bootloader_bin;
+        bins->boot.size = ESP32_C6_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_C6_partition_table_bin;
+        bins->part.size = ESP32_C6_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_C6_hello_world_bin;
+        bins->app.size  = ESP32_C6_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+
+    } else if (target == ESP32S3_CHIP){
+        bins->boot.data = ESP32_S3_bootloader_bin;
+        bins->boot.size = ESP32_S3_bootloader_bin_size;
+        bins->boot.addr = BOOTLOADER_ADDRESS_V1;
+        bins->part.data = ESP32_S3_partition_table_bin;
+        bins->part.size = ESP32_S3_partition_table_bin_size;
+        bins->part.addr = PARTITION_ADDRESS;
+        bins->app.data  = ESP32_S3_hello_world_bin;
+        bins->app.size  = ESP32_S3_hello_world_bin_size;
+        bins->app.addr  = APPLICATION_ADDRESS;
+    }
+    else {
         abort();
         abort();
     }
     }
 }
 }
@@ -137,6 +209,9 @@ extern const uint8_t  ESP32_H4_app_bin[];
 extern const uint32_t ESP32_H4_app_bin_size;
 extern const uint32_t ESP32_H4_app_bin_size;
 extern const uint8_t  ESP32_S3_app_bin[];
 extern const uint8_t  ESP32_S3_app_bin[];
 extern const uint32_t ESP32_S3_app_bin_size;
 extern const uint32_t ESP32_S3_app_bin_size;
+extern const uint8_t  ESP32_C6_app_bin[];
+extern const uint32_t ESP32_C6_app_bin_size;
+
 void get_example_ram_app_binary(target_chip_t target, example_ram_app_binary_t *bin)
 void get_example_ram_app_binary(target_chip_t target, example_ram_app_binary_t *bin)
 {
 {
     switch (target) {
     switch (target) {
@@ -170,6 +245,11 @@ void get_example_ram_app_binary(target_chip_t target, example_ram_app_binary_t *
             bin->ram_app.size = ESP32_S3_app_bin_size;
             bin->ram_app.size = ESP32_S3_app_bin_size;
             break;
             break;
         }
         }
+        case ESP32C6_CHIP: {
+            bin->ram_app.data = ESP32_C6_app_bin;
+            bin->ram_app.size = ESP32_C6_app_bin_size;
+            break;
+        }
         default: {
         default: {
             abort();
             abort();
         }
         }

+ 1 - 1
lib/esp-serial-flasher/examples/esp32_example/partitions.csv

@@ -1,4 +1,4 @@
 # Name,   Type, SubType, Offset,  Size, Flags
 # Name,   Type, SubType, Offset,  Size, Flags
 nvs,      data, nvs,     ,        0x6000,
 nvs,      data, nvs,     ,        0x6000,
 phy_init, data, phy,     ,        0x1000,
 phy_init, data, phy,     ,        0x1000,
-factory,  app,  factory, ,        1500K,
+factory,  app,  factory, ,        1920K,

+ 33 - 26
lib/esp-serial-flasher/examples/stm32_example/CMakeLists.txt

@@ -1,39 +1,46 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.16)
 
 
-include(${CMAKE_CURRENT_LIST_DIR}/../common/bin2array.cmake)
+set(FLASHER_DIR ${CMAKE_CURRENT_LIST_DIR}/../..)
+set(CMAKE_TOOLCHAIN_FILE ${FLASHER_DIR}/submodules/stm32-cmake/cmake/stm32_gcc.cmake)
 
 
-set(TOOLCHAIN_PREFIX / CACHE PATH "Path to arm toolchain")
-set(STM32Cube_DIR / CACHE PATH "Path to STM32 hal library")
+project(stm32_flasher C ASM)
 
 
-set(FLASHER_DIR          ${CMAKE_CURRENT_LIST_DIR}/../..)
-set(CMAKE_TOOLCHAIN_FILE ${FLASHER_DIR}/submodules/stm32-cmake/cmake/gcc_stm32.cmake)
-set(STM32_CHIP           STM32F407VG)
-set(PORT                 STM32)
+find_package(CMSIS COMPONENTS STM32H7_M7 REQUIRED)
+find_package(HAL COMPONENTS STM32H7_M7 PWR RCC GPIO UART CORTEX REQUIRED)
 
 
-project(stm32_flasher)
-    
-enable_language(ASM)
+include_directories(${CMAKE_CURRENT_SOURCE_DIR} Core/Inc)
 
 
-create_resources(${CMAKE_CURRENT_LIST_DIR}/../binaries/Hello-world Src/binaries.c)
+include(${CMAKE_CURRENT_LIST_DIR}/../common/bin2array.cmake)
+create_resources(${CMAKE_CURRENT_LIST_DIR}/../binaries/Hello-world Core/Src/binaries.c)
 
 
-include_directories(${CMAKE_CURRENT_SOURCE_DIR} Inc)
- 
 add_executable(${CMAKE_PROJECT_NAME} 
 add_executable(${CMAKE_PROJECT_NAME} 
     ../common/example_common.c
     ../common/example_common.c
-    Src/main.c
-    Src/stm32f4xx_hal_msp.c
-    Src/stm32f4xx_it.c
-    Src/libc_compat.c
-    Src/binaries.c)
+    Core/Src/main.c
+    Core/Src/stm32h7xx_hal_msp.c
+    Core/Src/stm32h7xx_it.c
+    Core/Src/libc_compat.c
+    Core/Src/binaries.c
+)
 
 
 target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE ../common)
 target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE ../common)
 
 
-add_subdirectory(${FLASHER_DIR}/submodules ${CMAKE_BINARY_DIR}/submodules)
+set(PORT STM32)
+set(STM32_CHIP STM32H743VI)
+set(CORE_USED M7)
 add_subdirectory(${FLASHER_DIR} ${CMAKE_BINARY_DIR}/flasher)
 add_subdirectory(${FLASHER_DIR} ${CMAKE_BINARY_DIR}/flasher)
 
 
-target_link_libraries(${CMAKE_PROJECT_NAME} PRIVATE stm_cube flasher)
- 
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME})
-
-add_custom_target(BuildBinary ALL)
-add_dependencies(BuildBinary ${CMAKE_PROJECT_NAME}.bin)
+target_link_libraries(${CMAKE_PROJECT_NAME}
+PRIVATE
+    HAL::STM32::H7::M7::PWREx
+    HAL::STM32::H7::M7::RCCEx
+    HAL::STM32::H7::M7::GPIO
+    HAL::STM32::H7::M7::UARTEx
+    HAL::STM32::H7::M7::CORTEX
+    CMSIS::STM32::H743VI::M7
+    STM32::Nano
+    flasher
+)
+
+stm32_print_size_of_target(${CMAKE_PROJECT_NAME})
+stm32_generate_binary_file(${CMAKE_PROJECT_NAME})
+stm32_generate_hex_file(${CMAKE_PROJECT_NAME})

+ 73 - 0
lib/esp-serial-flasher/examples/stm32_example/Core/Inc/main.h

@@ -0,0 +1,73 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define TARGET_IO0_Pin GPIO_PIN_12
+#define TARGET_IO0_GPIO_Port GPIOB
+#define TARGET_RESET_Pin GPIO_PIN_13
+#define TARGET_RESET_GPIO_Port GPIOB
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

+ 515 - 0
lib/esp-serial-flasher/examples/stm32_example/Core/Inc/stm32h7xx_hal_conf.h

@@ -0,0 +1,515 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7xx_HAL_CONF_H
+#define STM32H7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+
+  /* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_FMAC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_COMP_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_DCMI_MODULE_ENABLED   */
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_ETH_LEGACY_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_OTFDEC_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HRTIM_MODULE_ENABLED   */
+/* #define HAL_HSEM_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_OPAMP_MODULE_ENABLED   */
+/* #define HAL_OSPI_MODULE_ENABLED   */
+/* #define HAL_OSPI_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_LTDC_MODULE_ENABLED   */
+/* #define HAL_QSPI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED   */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_SWPMI_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_DFSDM_MODULE_ENABLED   */
+/* #define HAL_DSI_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_MDIOS_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_DTS_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_MDMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_HSEM_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100UL)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal  oscillator (CSI) default value.
+  *        This value is the default CSI value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    (4000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* CSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (64000000UL) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    (32768UL) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+#if !defined  (LSI_VALUE)
+  #define LSI_VALUE  (32000UL)              /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    12288000UL /*!< Value of the External clock in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    (3300UL) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (15UL) /*!< tick interrupt priority */
+#define  USE_RTOS                     0
+#define  USE_SD_TRANSCEIVER           0U               /*!< use uSD Transceiver */
+#define  USE_SPI_CRC	              0U               /*!< use CRC in SPI */
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
+#define  USE_HAL_COMP_REGISTER_CALLBACKS    0U /* COMP register callback disabled    */
+#define  USE_HAL_CORDIC_REGISTER_CALLBACKS  0U /* CORDIC register callback disabled  */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS    0U /* CRYP register callback disabled    */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS     0U /* DAC register callback disabled     */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS    0U /* DCMI register callback disabled    */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS   0U /* DFSDM register callback disabled   */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS   0U /* DMA2D register callback disabled   */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS     0U /* DSI register callback disabled     */
+#define  USE_HAL_DTS_REGISTER_CALLBACKS     0U /* DTS register callback disabled     */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS     0U /* ETH register callback disabled     */
+#define  USE_HAL_FDCAN_REGISTER_CALLBACKS   0U /* FDCAN register callback disabled   */
+#define  USE_HAL_FMAC_REGISTER_CALLBACKS    0U /* FMAC register callback disabled  */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS    0U /* NAND register callback disabled    */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS     0U /* NOR register callback disabled     */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS   0U /* SDRAM register callback disabled   */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS    0U /* SRAM register callback disabled    */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS    0U /* HASH register callback disabled    */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS     0U /* HCD register callback disabled     */
+#define  USE_HAL_GFXMMU_REGISTER_CALLBACKS  0U /* GFXMMU register callback disabled  */
+#define  USE_HAL_HRTIM_REGISTER_CALLBACKS   0U /* HRTIM register callback disabled   */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS     0U /* I2C register callback disabled     */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS     0U /* I2S register callback disabled     */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS    0U /* IRDA register callback disabled    */
+#define  USE_HAL_JPEG_REGISTER_CALLBACKS    0U /* JPEG register callback disabled    */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS   0U /* LPTIM register callback disabled   */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS    0U /* LTDC register callback disabled    */
+#define  USE_HAL_MDIOS_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS     0U /* MMC register callback disabled     */
+#define  USE_HAL_OPAMP_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
+#define  USE_HAL_OSPI_REGISTER_CALLBACKS    0U /* OSPI register callback disabled    */
+#define  USE_HAL_OTFDEC_REGISTER_CALLBACKS  0U /* OTFDEC register callback disabled  */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS     0U /* PCD register callback disabled     */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS    0U /* QSPI register callback disabled    */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS     0U /* RNG register callback disabled     */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS     0U /* RTC register callback disabled     */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS     0U /* SAI register callback disabled     */
+#define  USE_HAL_SD_REGISTER_CALLBACKS      0U /* SD register callback disabled      */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS   0U /* SMBUS register callback disabled   */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS     0U /* SPI register callback disabled     */
+#define  USE_HAL_SWPMI_REGISTER_CALLBACKS   0U /* SWPMI register callback disabled   */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS     0U /* TIM register callback disabled     */
+#define  USE_HAL_UART_REGISTER_CALLBACKS    0U /* UART register callback disabled    */
+#define  USE_HAL_USART_REGISTER_CALLBACKS   0U /* USART register callback disabled   */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS    0U /* WWDG register callback disabled    */
+
+/* ########################### Ethernet Configuration ######################### */
+#define ETH_TX_DESC_CNT         4U  /* number of Ethernet Tx DMA descriptors */
+#define ETH_RX_DESC_CNT         4U  /* number of Ethernet Rx DMA descriptors */
+
+#define ETH_MAC_ADDR0    (0x02UL)
+#define ETH_MAC_ADDR1    (0x00UL)
+#define ETH_MAC_ADDR2    (0x00UL)
+#define ETH_MAC_ADDR3    (0x00UL)
+#define ETH_MAC_ADDR4    (0x00UL)
+#define ETH_MAC_ADDR5    (0x00UL)
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_MDMA_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdma.h"
+#endif /* HAL_MDMA_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32h7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+  #include "stm32h7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+  #include "stm32h7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+ #include "stm32h7xx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
+  #include "stm32h7xx_hal_eth_legacy.h"
+#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32h7xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7xx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32h7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+  #include "stm32h7xx_hal_fmac.h"
+#endif /* HAL_FMAC_MODULE_ENABLED */
+
+#ifdef HAL_HRTIM_MODULE_ENABLED
+  #include "stm32h7xx_hal_hrtim.h"
+#endif /* HAL_HRTIM_MODULE_ENABLED */
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+  #include "stm32h7xx_hal_hsem.h"
+#endif /* HAL_HSEM_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32h7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32h7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32h7xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32h7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32h7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32h7xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_OTFDEC_MODULE_ENABLED
+#include "stm32h7xx_hal_otfdec.h"
+#endif /* HAL_OTFDEC_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+ #include "stm32h7xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32h7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+ #include "stm32h7xx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32h7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32h7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32h7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32h7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+ #include "stm32h7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32h7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32h7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+ #include "stm32h7xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32h7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32h7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32h7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32h7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32h7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32h7xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32h7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32h7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7xx_HAL_CONF_H */

+ 66 - 0
lib/esp-serial-flasher/examples/stm32_example/Core/Inc/stm32h7xx_it.h

@@ -0,0 +1,66 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7xx_IT_H
+#define __STM32H7xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7xx_IT_H */

+ 15 - 1
lib/esp-serial-flasher/examples/stm32_example/Src/libc_compat.c → lib/esp-serial-flasher/examples/stm32_example/Core/Src/libc_compat.c

@@ -13,14 +13,28 @@
 #include <sys/unistd.h>
 #include <sys/unistd.h>
 #include <sys/time.h>
 #include <sys/time.h>
 
 
-#if defined STM32F1
+#if defined STM32C0
+# include <stm32c0xx_hal.h>
+#elif defined STM32F0
+# include <stm32f0xx_hal.h>
+#elif defined STM32F1
 # include <stm32f1xx_hal.h>
 # include <stm32f1xx_hal.h>
 #elif defined STM32F2
 #elif defined STM32F2
 # include <stm32f2xx_hal.h>
 # include <stm32f2xx_hal.h>
+#elif defined STM32F3
+# include <stm32f3xx_hal.h>
 #elif defined STM32F4
 #elif defined STM32F4
 # include <stm32f4xx_hal.h>
 # include <stm32f4xx_hal.h>
+#elif defined STM32F7
+# include <stm32f7xx_hal.h>
 #elif defined STM32G0
 #elif defined STM32G0
 # include <stm32g0xx_hal.h>
 # include <stm32g0xx_hal.h>
+#elif defined STM32G4
+# include <stm32g4xx_hal.h>
+#elif defined STM32H5
+#include <stm32h5xx_hal.h>
+#elif defined STM32H7
+#include <stm32h7xx_hal.h>
 #endif
 #endif
 
 
 extern uint32_t __get_MSP(void);
 extern uint32_t __get_MSP(void);

+ 352 - 0
lib/esp-serial-flasher/examples/stm32_example/Core/Src/main.c

@@ -0,0 +1,352 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <sys/param.h>
+#include "stm32_port.h"
+#include "esp_loader.h"
+#include "example_common.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define HIGHER_BAUDRATE 230400
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+UART_HandleTypeDef huart1;
+UART_HandleTypeDef huart2;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_USART2_UART_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+  example_binaries_t bin;
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_USART1_UART_Init();
+  MX_USART2_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  loader_stm32_config_t config = {
+      .huart = &huart1,
+      .port_io0 = TARGET_IO0_GPIO_Port,
+      .pin_num_io0 = TARGET_IO0_Pin,
+      .port_rst = TARGET_RESET_GPIO_Port,
+      .pin_num_rst = TARGET_RESET_Pin,
+  };
+
+  loader_port_stm32_init(&config);
+    
+  if (connect_to_target(HIGHER_BAUDRATE) == ESP_LOADER_SUCCESS) {
+        
+    get_example_binaries(esp_loader_get_target(), &bin);
+
+    flash_binary(bin.boot.data, bin.boot.size, bin.boot.addr);
+    flash_binary(bin.part.data, bin.part.size, bin.part.addr);
+    flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
+  }
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Supply configuration update enable
+  */
+  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 15;
+  RCC_OscInitStruct.PLL.PLLP = 2;
+  RCC_OscInitStruct.PLL.PLLQ = 2;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
+  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+  * @brief USART2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART2_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART2_Init 0 */
+
+  /* USER CODE END USART2_Init 0 */
+
+  /* USER CODE BEGIN USART2_Init 1 */
+
+  /* USER CODE END USART2_Init 1 */
+  huart2.Instance = USART2;
+  huart2.Init.BaudRate = 115200;
+  huart2.Init.WordLength = UART_WORDLENGTH_8B;
+  huart2.Init.StopBits = UART_STOPBITS_1;
+  huart2.Init.Parity = UART_PARITY_NONE;
+  huart2.Init.Mode = UART_MODE_TX_RX;
+  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+  if (HAL_UART_Init(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART2_Init 2 */
+
+  /* USER CODE END USART2_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, TARGET_IO0_Pin|TARGET_RESET_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : TARGET_IO0_Pin TARGET_RESET_Pin */
+  GPIO_InitStruct.Pin = TARGET_IO0_Pin|TARGET_RESET_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */

+ 209 - 0
lib/esp-serial-flasher/examples/stm32_example/Core/Src/stm32h7xx_hal_msp.c

@@ -0,0 +1,209 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7xx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+
+  /* System interrupt init*/
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+* @brief UART MSP Initialization
+* This function configures the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspInit 0 */
+
+  /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PB14     ------> USART1_TX
+    PB15     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN USART1_MspInit 1 */
+
+  /* USER CODE END USART1_MspInit 1 */
+  }
+  else if(huart->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspInit 0 */
+
+  /* USER CODE END USART2_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
+    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART2_CLK_ENABLE();
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART2 GPIO Configuration
+    PA2     ------> USART2_TX
+    PA3     ------> USART2_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN USART2_MspInit 1 */
+
+  /* USER CODE END USART2_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief UART MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param huart: UART handle pointer
+* @retval None
+*/
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==USART1)
+  {
+  /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+  /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PB14     ------> USART1_TX
+    PB15     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14|GPIO_PIN_15);
+
+  /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+  /* USER CODE END USART1_MspDeInit 1 */
+  }
+  else if(huart->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspDeInit 0 */
+
+  /* USER CODE END USART2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART2_CLK_DISABLE();
+
+    /**USART2 GPIO Configuration
+    PA2     ------> USART2_TX
+    PA3     ------> USART2_RX
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
+
+  /* USER CODE BEGIN USART2_MspDeInit 1 */
+
+  /* USER CODE END USART2_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

+ 14 - 15
lib/esp-serial-flasher/examples/stm32_example/Src/stm32f4xx_it.c → lib/esp-serial-flasher/examples/stm32_example/Core/Src/stm32h7xx_it.c

@@ -1,18 +1,17 @@
 /* USER CODE BEGIN Header */
 /* USER CODE BEGIN Header */
 /**
 /**
   ******************************************************************************
   ******************************************************************************
-  * @file    stm32f4xx_it.c
+  * @file    stm32h7xx_it.c
   * @brief   Interrupt Service Routines.
   * @brief   Interrupt Service Routines.
   ******************************************************************************
   ******************************************************************************
   * @attention
   * @attention
   *
   *
-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
   *
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   *
   ******************************************************************************
   ******************************************************************************
   */
   */
@@ -20,10 +19,9 @@
 
 
 /* Includes ------------------------------------------------------------------*/
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
 #include "main.h"
-#include "stm32f4xx_it.h"
+#include "stm32h7xx_it.h"
 /* Private includes ----------------------------------------------------------*/
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 /* USER CODE BEGIN Includes */
-#include <stdio.h>
 /* USER CODE END Includes */
 /* USER CODE END Includes */
 
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private typedef -----------------------------------------------------------*/
@@ -33,7 +31,7 @@
 
 
 /* Private define ------------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /* USER CODE BEGIN PD */
 /* USER CODE BEGIN PD */
- 
+
 /* USER CODE END PD */
 /* USER CODE END PD */
 
 
 /* Private macro -------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
@@ -63,7 +61,7 @@
 /* USER CODE END EV */
 /* USER CODE END EV */
 
 
 /******************************************************************************/
 /******************************************************************************/
-/*           Cortex-M4 Processor Interruption and Exception Handlers          */ 
+/*           Cortex Processor Interruption and Exception Handlers          */
 /******************************************************************************/
 /******************************************************************************/
 /**
 /**
   * @brief This function handles Non maskable interrupt.
   * @brief This function handles Non maskable interrupt.
@@ -74,7 +72,9 @@ void NMI_Handler(void)
 
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
-
+  while (1)
+  {
+  }
   /* USER CODE END NonMaskableInt_IRQn 1 */
   /* USER CODE END NonMaskableInt_IRQn 1 */
 }
 }
 
 
@@ -192,13 +192,12 @@ void SysTick_Handler(void)
 }
 }
 
 
 /******************************************************************************/
 /******************************************************************************/
-/* STM32F4xx Peripheral Interrupt Handlers                                    */
+/* STM32H7xx Peripheral Interrupt Handlers                                    */
 /* Add here the Interrupt Handlers for the used peripherals.                  */
 /* Add here the Interrupt Handlers for the used peripherals.                  */
 /* For the available peripheral interrupt handler names,                      */
 /* For the available peripheral interrupt handler names,                      */
-/* please refer to the startup file (startup_stm32f4xx.s).                    */
+/* please refer to the startup file (startup_stm32h7xx.s).                    */
 /******************************************************************************/
 /******************************************************************************/
 
 
 /* USER CODE BEGIN 1 */
 /* USER CODE BEGIN 1 */
 
 
 /* USER CODE END 1 */
 /* USER CODE END 1 */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 50
lib/esp-serial-flasher/examples/stm32_example/Inc/main.h

@@ -1,50 +0,0 @@
-/**
-  ******************************************************************************
-  * @file           : main.h
-  * @brief          : Header for main.c file.
-  *                   This file contains the common defines of the application.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-#ifndef __MAIN_H
-#define __MAIN_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "stm32f4xx_hal.h"
-
-void Error_Handler(void);
-
-#define GREEN_LED_Pin GPIO_PIN_12
-#define GREEN_LED_GPIO_Port GPIOD
-#define ORANGE_LED_Pin GPIO_PIN_13
-#define ORANGE_LED_GPIO_Port GPIOD
-#define RED_LED_Pin GPIO_PIN_14
-#define RED_LED_GPIO_Port GPIOD
-#define BLUE_LED_Pin GPIO_PIN_15
-#define BLUE_LED_GPIO_Port GPIOD
-#define TARGET_RST_Pin GPIO_PIN_4
-#define TARGET_RST_GPIO_Port GPIOB
-#define TARGET_IO0_Pin GPIO_PIN_5
-#define TARGET_IO0_GPIO_Port GPIOB
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MAIN_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 443
lib/esp-serial-flasher/examples/stm32_example/Inc/stm32f4xx_hal_conf.h

@@ -1,443 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration template file. 
-  *          This file should be copied to the application folder and renamed
-  *          to stm32f4xx_hal_conf.h.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver 
-  */
-#define HAL_MODULE_ENABLED  
-
-  /* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED   */
-/* #define HAL_DMA2D_MODULE_ENABLED   */
-/* #define HAL_ETH_MODULE_ENABLED   */
-/* #define HAL_NAND_MODULE_ENABLED   */
-/* #define HAL_NOR_MODULE_ENABLED   */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED   */
-/* #define HAL_SDRAM_MODULE_ENABLED   */
-/* #define HAL_HASH_MODULE_ENABLED   */
-/* #define HAL_I2C_MODULE_ENABLED   */
-/* #define HAL_I2S_MODULE_ENABLED   */
-/* #define HAL_IWDG_MODULE_ENABLED   */
-/* #define HAL_LTDC_MODULE_ENABLED   */
-/* #define HAL_RNG_MODULE_ENABLED   */
-/* #define HAL_RTC_MODULE_ENABLED   */
-/* #define HAL_SAI_MODULE_ENABLED   */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_MMC_MODULE_ENABLED   */
-/* #define HAL_SPI_MODULE_ENABLED   */
-/* #define HAL_TIM_MODULE_ENABLED   */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED   */
-/* #define HAL_IRDA_MODULE_ENABLED   */
-/* #define HAL_SMARTCARD_MODULE_ENABLED   */
-/* #define HAL_SMBUS_MODULE_ENABLED   */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-/* #define HAL_PCD_MODULE_ENABLED   */
-/* #define HAL_HCD_MODULE_ENABLED   */
-/* #define HAL_DSI_MODULE_ENABLED   */
-/* #define HAL_QSPI_MODULE_ENABLED   */
-/* #define HAL_QSPI_MODULE_ENABLED   */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED   */
-/* #define HAL_DFSDM_MODULE_ENABLED   */
-/* #define HAL_LPTIM_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_EXTI_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
-  */
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */           
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */            
-#define  USE_RTOS                     0U     
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */   
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848_PHY_ADDRESS Address*/ 
-#define DP83848_PHY_ADDRESS           0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
- 
-#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
-  
-/* Section 4: Extended PHY Registers */
-#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     0U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file 
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-   
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
-#include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
- 
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-   
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-   
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */    
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
- 
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 42
lib/esp-serial-flasher/examples/stm32_example/Inc/stm32f4xx_it.h

@@ -1,42 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_it.h
-  * @brief   This file contains the headers of the interrupt handlers.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
- ******************************************************************************
-  */
-
-#ifndef __STM32F4xx_IT_H
-#define __STM32F4xx_IT_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void MemManage_Handler(void);
-void BusFault_Handler(void);
-void UsageFault_Handler(void);
-void SVC_Handler(void);
-void DebugMon_Handler(void);
-void PendSV_Handler(void);
-void SysTick_Handler(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_IT_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 10 - 17
lib/esp-serial-flasher/examples/stm32_example/README.md

@@ -2,7 +2,7 @@
 
 
 ## Overview
 ## Overview
 
 
-Example demonstrates how to flash ESP32 from another STM32 (host MCU) using esp_serial_flash component API. STM32F4-Discovery board is used in this example, as STM32F407VG has FLASH memory large enough to fit the whole hello-world example of ESP32. Binaries to be flashed from host MCU to ESP32 can be found in `binaries` directory and converted into C-arrays during build process. USART1 is dedicated for communication with ESP32, whereas, USART2 can be used for debug purposes by attaching UART-to-USB bridge.
+Example demonstrates how to flash ESP32 from another STM32 (host MCU) using esp_serial_flash component API. WeActStudio [MiniSTM32H7xx](https://github.com/WeActStudio/MiniSTM32H7xx) board is used in this example, as STM32H743VIT has FLASH memory large enough to fit all the example binaries to be flashed from host MCU to ESP32 which can be found in `binaries` directory and converted into C-arrays during build process. USART1 is dedicated for communication with ESP32, whereas, USART2 can be used for debug purposes by attaching UART-to-USB bridge.
 
 
 Following steps are performed in order to re-program target's memory:
 Following steps are performed in order to re-program target's memory:
 
 
@@ -15,7 +15,7 @@ Note: In addition, to steps mentioned above, `esp_loader_change_transmission_rat
 
 
 ## Hardware Required
 ## Hardware Required
 
 
-* STM32F4-Discovery board. 
+* WeActStudio [MiniSTM32H7xx](https://github.com/WeActStudio/MiniSTM32H7xx) board with the STM32H743VIT chip
 * A development board with ESP32 SoC (e.g. ESP-WROVER-KIT, ESP32-DevKitC, etc.).
 * A development board with ESP32 SoC (e.g. ESP-WROVER-KIT, ESP32-DevKitC, etc.).
 * One or two USB cables for power supply and programming.
 * One or two USB cables for power supply and programming.
 
 
@@ -25,12 +25,12 @@ Table below shows connection between STM32 and ESP32.
 
 
 | STM32 (host) | ESP32 (slave) |
 | STM32 (host) | ESP32 (slave) |
 |:------------:|:-------------:|
 |:------------:|:-------------:|
-|    PB5       |      IO0      |
-|    PB4       |      RST      |
-|    PB6       |      RX0      |
-|    PB7       |      TX0      |
+|    PB12      |      IO0      |
+|    PB13      |      RST      |
+|    PB14      |      RX0      |
+|    PB15      |      TX0      |
 
 
-Optionally, UART-to-USB bridge can be connected to PD5(RX) and PD6(TX) for debug purposes.
+Optionally, UART-to-USB bridge can be connected to PA3(RX) and PA2(TX) for debug purposes.
 
 
 ## Build and flash
 ## Build and flash
 
 
@@ -42,18 +42,11 @@ mkdir build && cd build
 ```
 ```
 Run cmake (with appropriate parameters) and build: 
 Run cmake (with appropriate parameters) and build: 
 ```
 ```
-cmake -DTOOLCHAIN_PREFIX="/path_to_toolchain" -DSTM32Cube_DIR="path_to_stm32Cube" -DSTM32_CHIP="STM32F407VG" -DPORT="STM32" .. && cmake --build .
+cmake -DSTM32_TOOLCHAIN_PATH="path_to_toolchain" -DSTM32_CUBE_H7_PATH="path_to_cube_libraries" .. && cmake --build .
 ```
 ```
 
 
-Binaries to be flashed are placed in separate folder (binaries.c) for each possible target and converted to C-array. Without explicitly enabling MD5 check, flash integrity verification is disabled by default.
+Binaries to be flashed are placed in separate folder (binaries.c) for each possible target and converted to C-array. Flash integrity verification is enabled by default.
 
 
 For more details regarding to esp_serial_flasher configuration and STM32 support, please refer to top level [README.md](../../README.md).
 For more details regarding to esp_serial_flasher configuration and STM32 support, please refer to top level [README.md](../../README.md).
 
 
-Note: CMake 3.13 or later is required.
-
-## STM32CubeMx configuration
-
-Following configuration was used to generate STM32 `cmake` based project:
-* Project tab: Toolchain/IDE - Other toolchain (GPDSC)
-* Code Generator tab: Add necessary files as reference in the toolchain project configuration file
-
+> Note: CMake 3.16 or later is required.

+ 0 - 189
lib/esp-serial-flasher/examples/stm32_example/Src/main.c

@@ -1,189 +0,0 @@
-/**
-  ******************************************************************************
-  * @file           : main.c
-  * @brief          : Main program body
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-#include "main.h"
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <sys/param.h>
-#include "stm32_port.h"
-#include "esp_loader.h"
-#include "example_common.h"
-
-UART_HandleTypeDef huart1;
-UART_HandleTypeDef huart2;
-
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-static void MX_USART1_UART_Init(void);
-static void MX_USART2_UART_Init(void);
-
-#define HIGHER_BAUDRATE 230400
-
-
-
-int main(void)
-{
-    example_binaries_t bin;
-
-    HAL_Init();
-    SystemClock_Config();
-    MX_GPIO_Init();
-    MX_USART1_UART_Init();
-    MX_USART2_UART_Init();
-
-    loader_stm32_config_t config = {
-        .huart = &huart1,
-        .port_io0 = GPIOB,
-        .pin_num_io0 = TARGET_IO0_Pin,
-        .port_rst = GPIOB,
-        .pin_num_rst = TARGET_RST_Pin,
-    };
-
-    loader_port_stm32_init(&config);
-    
-    if (connect_to_target(HIGHER_BAUDRATE) == ESP_LOADER_SUCCESS) {
-        
-        get_example_binaries(esp_loader_get_target(), &bin);
-
-        flash_binary(bin.boot.data, bin.boot.size, bin.boot.addr);
-        flash_binary(bin.part.data, bin.part.size, bin.part.addr);
-        flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
-    }
-
-    while (1) { }
-}
-
-
-void SystemClock_Config(void)
-{
-    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
-    /** Configure the main internal regulator output voltage
-    */
-    __HAL_RCC_PWR_CLK_ENABLE();
-    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-    /** Initializes the CPU, AHB and APB busses clocks
-    */
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
-    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
-    RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
-        Error_Handler();
-    }
-    /** Initializes the CPU, AHB and APB busses clocks
-    */
-    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
-                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
-    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
-        Error_Handler();
-    }
-}
-
-static void MX_USART1_UART_Init(void)
-{
-    huart1.Instance = USART1;
-    huart1.Init.BaudRate = 115200;
-    huart1.Init.WordLength = UART_WORDLENGTH_8B;
-    huart1.Init.StopBits = UART_STOPBITS_1;
-    huart1.Init.Parity = UART_PARITY_NONE;
-    huart1.Init.Mode = UART_MODE_TX_RX;
-    huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-    huart1.Init.OverSampling = UART_OVERSAMPLING_16;
-    if (HAL_UART_Init(&huart1) != HAL_OK) {
-        Error_Handler();
-    }
-}
-
-static void MX_USART2_UART_Init(void)
-{
-    huart2.Instance = USART2;
-    huart2.Init.BaudRate = 115200;
-    huart2.Init.WordLength = UART_WORDLENGTH_8B;
-    huart2.Init.StopBits = UART_STOPBITS_1;
-    huart2.Init.Parity = UART_PARITY_NONE;
-    huart2.Init.Mode = UART_MODE_TX_RX;
-    huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-    huart2.Init.OverSampling = UART_OVERSAMPLING_16;
-    if (HAL_UART_Init(&huart2) != HAL_OK) {
-        Error_Handler();
-    }
-}
-
-static void MX_GPIO_Init(void)
-{
-    GPIO_InitTypeDef GPIO_InitStruct = {0};
-
-    /* GPIO Ports Clock Enable */
-    __HAL_RCC_GPIOD_CLK_ENABLE();
-    __HAL_RCC_GPIOB_CLK_ENABLE();
-
-    /*Configure GPIO pin Output Level */
-    HAL_GPIO_WritePin(GPIOD, GREEN_LED_Pin | ORANGE_LED_Pin | RED_LED_Pin | BLUE_LED_Pin, GPIO_PIN_RESET);
-
-    /*Configure GPIO pin Output Level */
-    HAL_GPIO_WritePin(GPIOB, TARGET_RST_Pin | TARGET_IO0_Pin, GPIO_PIN_RESET);
-
-    /*Configure GPIO pins : GREEN_LED_Pin ORANGE_LED_Pin RED_LED_Pin BLUE_LED_Pin */
-    GPIO_InitStruct.Pin = GREEN_LED_Pin | ORANGE_LED_Pin | RED_LED_Pin | BLUE_LED_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-
-    /*Configure GPIO pins : PB4 PB5 */
-    GPIO_InitStruct.Pin = TARGET_RST_Pin | TARGET_IO0_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-}
-
-/**
-  * @brief  This function is executed in case of error occurrence.
-  * @retval None
-  */
-void Error_Handler(void)
-{
-    /* User can add his own implementation to report the HAL error return state */
-}
-
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
-void assert_failed(uint8_t *file, uint32_t line)
-{
-    /* User can add his own implementation to report the file name and line number,
-       tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-}
-#endif /* USE_FULL_ASSERT */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 109
lib/esp-serial-flasher/examples/stm32_example/Src/stm32f4xx_hal_msp.c

@@ -1,109 +0,0 @@
-/**
-  ******************************************************************************
-  * File Name          : stm32f4xx_hal_msp.c
-  * Description        : This file provides code for the MSP Initialization 
-  *                      and de-Initialization codes.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-#include "main.h"
-
-void HAL_MspInit(void)
-{
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
-  __HAL_RCC_PWR_CLK_ENABLE();
-}
-
-/**
-* @brief UART MSP Initialization
-* This function configures the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspInit(UART_HandleTypeDef* huart)
-{
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(huart->Instance==USART1)
-  {
-    /* Peripheral clock enable */
-    __HAL_RCC_USART1_CLK_ENABLE();
-  
-    __HAL_RCC_GPIOB_CLK_ENABLE();
-    /**USART1 GPIO Configuration    
-    PB6     ------> USART1_TX
-    PB7     ------> USART1_RX 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  }
-  else if(huart->Instance==USART2)
-  {
-    /* Peripheral clock enable */
-    __HAL_RCC_USART2_CLK_ENABLE();
-  
-    __HAL_RCC_GPIOD_CLK_ENABLE();
-    /**USART2 GPIO Configuration    
-    PD5     ------> USART2_TX
-    PD6     ------> USART2_RX 
-    */
-    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
-    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-  }
-
-}
-
-/**
-* @brief UART MSP De-Initialization
-* This function freeze the hardware resources used in this example
-* @param huart: UART handle pointer
-* @retval None
-*/
-void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
-{
-  if(huart->Instance==USART1)
-  {
-    /* Peripheral clock disable */
-    __HAL_RCC_USART1_CLK_DISABLE();
-  
-    /**USART1 GPIO Configuration    
-    PB6     ------> USART1_TX
-    PB7     ------> USART1_RX 
-    */
-    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
-
-  }
-  else if(huart->Instance==USART2)
-  {
-    /* Peripheral clock disable */
-    __HAL_RCC_USART2_CLK_DISABLE();
-  
-    /**USART2 GPIO Configuration    
-    PD5     ------> USART2_TX
-    PD6     ------> USART2_RX 
-    */
-    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
-  }
-
-}
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 727
lib/esp-serial-flasher/examples/stm32_example/Src/system_stm32f4xx.c

@@ -1,727 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32f4xx.c
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
-  *
-  *   This file provides two functions and one global variable to be called from 
-  *   user application:
-  *      - SystemInit(): This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32f4xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f4xx_system
-  * @{
-  */  
-  
-/** @addtogroup STM32F4xx_System_Private_Includes
-  * @{
-  */
-
-
-#include "stm32f4xx.h"
-
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Defines
-  * @{
-  */
-
-/************************* Miscellaneous Configuration ************************/
-/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
-/* #define DATA_IN_ExtSRAM */
-#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
-          STM32F412Zx || STM32F412Vx */
- 
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/* #define DATA_IN_ExtSDRAM */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
-          STM32F479xx */
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
-                                   This value must be a multiple of 0x200. */
-/******************************************************************************/
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Variables
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-uint32_t SystemCoreClock = 16000000;
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
-  * @{
-  */
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
-  static void SystemInit_ExtMemCtl(void); 
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system
-  *         Initialize the FPU setting, vector table location and External memory 
-  *         configuration.
-  * @param  None
-  * @retval None
-  */
-void SystemInit(void)
-{
-  /* FPU settings ------------------------------------------------------------*/
-  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
-  #endif
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
-  SystemInit_ExtMemCtl(); 
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-
-  /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-}
-
-/**
-   * @brief  Update SystemCoreClock variable according to Clock Register Values.
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
-  *             16 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
-  *              depends on the application requirements), user has to ensure that HSE_VALUE
-  *              is same as the real frequency of the crystal used. Otherwise, this function
-  *              may have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  *     
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate(void)
-{
-  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
-  
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-
-  switch (tmp)
-  {
-    case 0x00:  /* HSI used as system clock source */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x04:  /* HSE used as system clock source */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x08:  /* PLL used as system clock source */
-
-      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
-         SYSCLK = PLL_VCO / PLL_P
-         */    
-      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
-      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
-      
-      if (pllsource != 0)
-      {
-        /* HSE used as PLL clock source */
-        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-      }
-      else
-      {
-        /* HSI used as PLL clock source */
-        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-      }
-
-      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
-      SystemCoreClock = pllvco/pllp;
-      break;
-    default:
-      SystemCoreClock = HSI_VALUE;
-      break;
-  }
-  /* Compute HCLK frequency --------------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
-  /* HCLK frequency */
-  SystemCoreClock >>= tmp;
-}
-
-#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx)
-/**
-  * @brief  Setup the external memory controller.
-  *         Called in startup_stm32f4xx.s before jump to main.
-  *         This function configures the external memories (SRAM/SDRAM)
-  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
-  * @param  None
-  * @retval None
-  */
-void SystemInit_ExtMemCtl(void)
-{
-  __IO uint32_t tmp = 0x00;
-
-  register uint32_t tmpreg = 0, timeout = 0xFFFF;
-  register __IO uint32_t index;
-
-  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
-  RCC->AHB1ENR |= 0x000001F8;
-
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
-  
-  /* Connect PDx pins to FMC Alternate function */
-  GPIOD->AFR[0]  = 0x00CCC0CC;
-  GPIOD->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PDx pins in Alternate function mode */  
-  GPIOD->MODER   = 0xAAAA0A8A;
-  /* Configure PDx pins speed to 100 MHz */  
-  GPIOD->OSPEEDR = 0xFFFF0FCF;
-  /* Configure PDx pins Output type to push-pull */  
-  GPIOD->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PDx pins */ 
-  GPIOD->PUPDR   = 0x00000000;
-
-  /* Connect PEx pins to FMC Alternate function */
-  GPIOE->AFR[0]  = 0xC00CC0CC;
-  GPIOE->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PEx pins in Alternate function mode */ 
-  GPIOE->MODER   = 0xAAAA828A;
-  /* Configure PEx pins speed to 100 MHz */ 
-  GPIOE->OSPEEDR = 0xFFFFC3CF;
-  /* Configure PEx pins Output type to push-pull */  
-  GPIOE->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PEx pins */ 
-  GPIOE->PUPDR   = 0x00000000;
-  
-  /* Connect PFx pins to FMC Alternate function */
-  GPIOF->AFR[0]  = 0xCCCCCCCC;
-  GPIOF->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PFx pins in Alternate function mode */   
-  GPIOF->MODER   = 0xAA800AAA;
-  /* Configure PFx pins speed to 50 MHz */ 
-  GPIOF->OSPEEDR = 0xAA800AAA;
-  /* Configure PFx pins Output type to push-pull */  
-  GPIOF->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PFx pins */ 
-  GPIOF->PUPDR   = 0x00000000;
-
-  /* Connect PGx pins to FMC Alternate function */
-  GPIOG->AFR[0]  = 0xCCCCCCCC;
-  GPIOG->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PGx pins in Alternate function mode */ 
-  GPIOG->MODER   = 0xAAAAAAAA;
-  /* Configure PGx pins speed to 50 MHz */ 
-  GPIOG->OSPEEDR = 0xAAAAAAAA;
-  /* Configure PGx pins Output type to push-pull */  
-  GPIOG->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PGx pins */ 
-  GPIOG->PUPDR   = 0x00000000;
-  
-  /* Connect PHx pins to FMC Alternate function */
-  GPIOH->AFR[0]  = 0x00C0CC00;
-  GPIOH->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PHx pins in Alternate function mode */ 
-  GPIOH->MODER   = 0xAAAA08A0;
-  /* Configure PHx pins speed to 50 MHz */ 
-  GPIOH->OSPEEDR = 0xAAAA08A0;
-  /* Configure PHx pins Output type to push-pull */  
-  GPIOH->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PHx pins */ 
-  GPIOH->PUPDR   = 0x00000000;
-  
-  /* Connect PIx pins to FMC Alternate function */
-  GPIOI->AFR[0]  = 0xCCCCCCCC;
-  GPIOI->AFR[1]  = 0x00000CC0;
-  /* Configure PIx pins in Alternate function mode */ 
-  GPIOI->MODER   = 0x0028AAAA;
-  /* Configure PIx pins speed to 50 MHz */ 
-  GPIOI->OSPEEDR = 0x0028AAAA;
-  /* Configure PIx pins Output type to push-pull */  
-  GPIOI->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PIx pins */ 
-  GPIOI->PUPDR   = 0x00000000;
-  
-/*-- FMC Configuration -------------------------------------------------------*/
-  /* Enable the FMC interface clock */
-  RCC->AHB3ENR |= 0x00000001;
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-
-  FMC_Bank5_6->SDCR[0] = 0x000019E4;
-  FMC_Bank5_6->SDTR[0] = 0x01115351;      
-  
-  /* SDRAM initialization sequence */
-  /* Clock enable command */
-  FMC_Bank5_6->SDCMR = 0x00000011; 
-  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  }
-
-  /* Delay */
-  for (index = 0; index<1000; index++);
-  
-  /* PALL command */
-  FMC_Bank5_6->SDCMR = 0x00000012;           
-  timeout = 0xFFFF;
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  }
-  
-  /* Auto refresh command */
-  FMC_Bank5_6->SDCMR = 0x00000073;
-  timeout = 0xFFFF;
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  }
- 
-  /* MRD register program */
-  FMC_Bank5_6->SDCMR = 0x00046014;
-  timeout = 0xFFFF;
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  } 
-  
-  /* Set refresh count */
-  tmpreg = FMC_Bank5_6->SDRTR;
-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
-  
-  /* Disable write protection */
-  tmpreg = FMC_Bank5_6->SDCR[0]; 
-  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
-  /* Configure and enable Bank1_SRAM2 */
-  FMC_Bank1->BTCR[2]  = 0x00001011;
-  FMC_Bank1->BTCR[3]  = 0x00000201;
-  FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
-#if defined(STM32F469xx) || defined(STM32F479xx)
-  /* Configure and enable Bank1_SRAM2 */
-  FMC_Bank1->BTCR[2]  = 0x00001091;
-  FMC_Bank1->BTCR[3]  = 0x00110212;
-  FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F469xx || STM32F479xx */
-
-  (void)(tmp); 
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
-/**
-  * @brief  Setup the external memory controller.
-  *         Called in startup_stm32f4xx.s before jump to main.
-  *         This function configures the external memories (SRAM/SDRAM)
-  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
-  * @param  None
-  * @retval None
-  */
-void SystemInit_ExtMemCtl(void)
-{
-  __IO uint32_t tmp = 0x00;
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#if defined (DATA_IN_ExtSDRAM)
-  register uint32_t tmpreg = 0, timeout = 0xFFFF;
-  register __IO uint32_t index;
-
-#if defined(STM32F446xx)
-  /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
-      clock */
-  RCC->AHB1ENR |= 0x0000007D;
-#else
-  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface 
-      clock */
-  RCC->AHB1ENR |= 0x000001F8;
-#endif /* STM32F446xx */  
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
-  
-#if defined(STM32F446xx)
-  /* Connect PAx pins to FMC Alternate function */
-  GPIOA->AFR[0]  |= 0xC0000000;
-  GPIOA->AFR[1]  |= 0x00000000;
-  /* Configure PDx pins in Alternate function mode */
-  GPIOA->MODER   |= 0x00008000;
-  /* Configure PDx pins speed to 50 MHz */
-  GPIOA->OSPEEDR |= 0x00008000;
-  /* Configure PDx pins Output type to push-pull */
-  GPIOA->OTYPER  |= 0x00000000;
-  /* No pull-up, pull-down for PDx pins */
-  GPIOA->PUPDR   |= 0x00000000;
-
-  /* Connect PCx pins to FMC Alternate function */
-  GPIOC->AFR[0]  |= 0x00CC0000;
-  GPIOC->AFR[1]  |= 0x00000000;
-  /* Configure PDx pins in Alternate function mode */
-  GPIOC->MODER   |= 0x00000A00;
-  /* Configure PDx pins speed to 50 MHz */
-  GPIOC->OSPEEDR |= 0x00000A00;
-  /* Configure PDx pins Output type to push-pull */
-  GPIOC->OTYPER  |= 0x00000000;
-  /* No pull-up, pull-down for PDx pins */
-  GPIOC->PUPDR   |= 0x00000000;
-#endif /* STM32F446xx */
-
-  /* Connect PDx pins to FMC Alternate function */
-  GPIOD->AFR[0]  = 0x000000CC;
-  GPIOD->AFR[1]  = 0xCC000CCC;
-  /* Configure PDx pins in Alternate function mode */  
-  GPIOD->MODER   = 0xA02A000A;
-  /* Configure PDx pins speed to 50 MHz */  
-  GPIOD->OSPEEDR = 0xA02A000A;
-  /* Configure PDx pins Output type to push-pull */  
-  GPIOD->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PDx pins */ 
-  GPIOD->PUPDR   = 0x00000000;
-
-  /* Connect PEx pins to FMC Alternate function */
-  GPIOE->AFR[0]  = 0xC00000CC;
-  GPIOE->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PEx pins in Alternate function mode */ 
-  GPIOE->MODER   = 0xAAAA800A;
-  /* Configure PEx pins speed to 50 MHz */ 
-  GPIOE->OSPEEDR = 0xAAAA800A;
-  /* Configure PEx pins Output type to push-pull */  
-  GPIOE->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PEx pins */ 
-  GPIOE->PUPDR   = 0x00000000;
-
-  /* Connect PFx pins to FMC Alternate function */
-  GPIOF->AFR[0]  = 0xCCCCCCCC;
-  GPIOF->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PFx pins in Alternate function mode */   
-  GPIOF->MODER   = 0xAA800AAA;
-  /* Configure PFx pins speed to 50 MHz */ 
-  GPIOF->OSPEEDR = 0xAA800AAA;
-  /* Configure PFx pins Output type to push-pull */  
-  GPIOF->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PFx pins */ 
-  GPIOF->PUPDR   = 0x00000000;
-
-  /* Connect PGx pins to FMC Alternate function */
-  GPIOG->AFR[0]  = 0xCCCCCCCC;
-  GPIOG->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PGx pins in Alternate function mode */ 
-  GPIOG->MODER   = 0xAAAAAAAA;
-  /* Configure PGx pins speed to 50 MHz */ 
-  GPIOG->OSPEEDR = 0xAAAAAAAA;
-  /* Configure PGx pins Output type to push-pull */  
-  GPIOG->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PGx pins */ 
-  GPIOG->PUPDR   = 0x00000000;
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx)  
-  /* Connect PHx pins to FMC Alternate function */
-  GPIOH->AFR[0]  = 0x00C0CC00;
-  GPIOH->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PHx pins in Alternate function mode */ 
-  GPIOH->MODER   = 0xAAAA08A0;
-  /* Configure PHx pins speed to 50 MHz */ 
-  GPIOH->OSPEEDR = 0xAAAA08A0;
-  /* Configure PHx pins Output type to push-pull */  
-  GPIOH->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PHx pins */ 
-  GPIOH->PUPDR   = 0x00000000;
-  
-  /* Connect PIx pins to FMC Alternate function */
-  GPIOI->AFR[0]  = 0xCCCCCCCC;
-  GPIOI->AFR[1]  = 0x00000CC0;
-  /* Configure PIx pins in Alternate function mode */ 
-  GPIOI->MODER   = 0x0028AAAA;
-  /* Configure PIx pins speed to 50 MHz */ 
-  GPIOI->OSPEEDR = 0x0028AAAA;
-  /* Configure PIx pins Output type to push-pull */  
-  GPIOI->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PIx pins */ 
-  GPIOI->PUPDR   = 0x00000000;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-  
-/*-- FMC Configuration -------------------------------------------------------*/
-  /* Enable the FMC interface clock */
-  RCC->AHB3ENR |= 0x00000001;
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-
-  /* Configure and enable SDRAM bank1 */
-#if defined(STM32F446xx)
-  FMC_Bank5_6->SDCR[0] = 0x00001954;
-#else  
-  FMC_Bank5_6->SDCR[0] = 0x000019E4;
-#endif /* STM32F446xx */
-  FMC_Bank5_6->SDTR[0] = 0x01115351;      
-  
-  /* SDRAM initialization sequence */
-  /* Clock enable command */
-  FMC_Bank5_6->SDCMR = 0x00000011; 
-  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  }
-
-  /* Delay */
-  for (index = 0; index<1000; index++);
-  
-  /* PALL command */
-  FMC_Bank5_6->SDCMR = 0x00000012;           
-  timeout = 0xFFFF;
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  }
-  
-  /* Auto refresh command */
-#if defined(STM32F446xx)
-  FMC_Bank5_6->SDCMR = 0x000000F3;
-#else  
-  FMC_Bank5_6->SDCMR = 0x00000073;
-#endif /* STM32F446xx */
-  timeout = 0xFFFF;
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  }
- 
-  /* MRD register program */
-#if defined(STM32F446xx)
-  FMC_Bank5_6->SDCMR = 0x00044014;
-#else  
-  FMC_Bank5_6->SDCMR = 0x00046014;
-#endif /* STM32F446xx */
-  timeout = 0xFFFF;
-  while((tmpreg != 0) && (timeout-- > 0))
-  {
-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
-  } 
-  
-  /* Set refresh count */
-  tmpreg = FMC_Bank5_6->SDRTR;
-#if defined(STM32F446xx)
-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
-#else    
-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
-#endif /* STM32F446xx */
-  
-  /* Disable write protection */
-  tmpreg = FMC_Bank5_6->SDCR[0]; 
-  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-#endif /* DATA_IN_ExtSDRAM */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
-
-#if defined(DATA_IN_ExtSRAM)
-/*-- GPIOs Configuration -----------------------------------------------------*/
-   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
-  RCC->AHB1ENR   |= 0x00000078;
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
-  
-  /* Connect PDx pins to FMC Alternate function */
-  GPIOD->AFR[0]  = 0x00CCC0CC;
-  GPIOD->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PDx pins in Alternate function mode */  
-  GPIOD->MODER   = 0xAAAA0A8A;
-  /* Configure PDx pins speed to 100 MHz */  
-  GPIOD->OSPEEDR = 0xFFFF0FCF;
-  /* Configure PDx pins Output type to push-pull */  
-  GPIOD->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PDx pins */ 
-  GPIOD->PUPDR   = 0x00000000;
-
-  /* Connect PEx pins to FMC Alternate function */
-  GPIOE->AFR[0]  = 0xC00CC0CC;
-  GPIOE->AFR[1]  = 0xCCCCCCCC;
-  /* Configure PEx pins in Alternate function mode */ 
-  GPIOE->MODER   = 0xAAAA828A;
-  /* Configure PEx pins speed to 100 MHz */ 
-  GPIOE->OSPEEDR = 0xFFFFC3CF;
-  /* Configure PEx pins Output type to push-pull */  
-  GPIOE->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PEx pins */ 
-  GPIOE->PUPDR   = 0x00000000;
-
-  /* Connect PFx pins to FMC Alternate function */
-  GPIOF->AFR[0]  = 0x00CCCCCC;
-  GPIOF->AFR[1]  = 0xCCCC0000;
-  /* Configure PFx pins in Alternate function mode */   
-  GPIOF->MODER   = 0xAA000AAA;
-  /* Configure PFx pins speed to 100 MHz */ 
-  GPIOF->OSPEEDR = 0xFF000FFF;
-  /* Configure PFx pins Output type to push-pull */  
-  GPIOF->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PFx pins */ 
-  GPIOF->PUPDR   = 0x00000000;
-
-  /* Connect PGx pins to FMC Alternate function */
-  GPIOG->AFR[0]  = 0x00CCCCCC;
-  GPIOG->AFR[1]  = 0x000000C0;
-  /* Configure PGx pins in Alternate function mode */ 
-  GPIOG->MODER   = 0x00085AAA;
-  /* Configure PGx pins speed to 100 MHz */ 
-  GPIOG->OSPEEDR = 0x000CAFFF;
-  /* Configure PGx pins Output type to push-pull */  
-  GPIOG->OTYPER  = 0x00000000;
-  /* No pull-up, pull-down for PGx pins */ 
-  GPIOG->PUPDR   = 0x00000000;
-  
-/*-- FMC/FSMC Configuration --------------------------------------------------*/
-  /* Enable the FMC/FSMC interface clock */
-  RCC->AHB3ENR         |= 0x00000001;
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-  /* Configure and enable Bank1_SRAM2 */
-  FMC_Bank1->BTCR[2]  = 0x00001011;
-  FMC_Bank1->BTCR[3]  = 0x00000201;
-  FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
-#if defined(STM32F469xx) || defined(STM32F479xx)
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-  /* Configure and enable Bank1_SRAM2 */
-  FMC_Bank1->BTCR[2]  = 0x00001091;
-  FMC_Bank1->BTCR[3]  = 0x00110212;
-  FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F469xx || STM32F479xx */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
-   || defined(STM32F412Zx) || defined(STM32F412Vx)
-  /* Delay after an RCC peripheral clock enabling */
-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
-  /* Configure and enable Bank1_SRAM2 */
-  FSMC_Bank1->BTCR[2]  = 0x00001011;
-  FSMC_Bank1->BTCR[3]  = 0x00000201;
-  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
-
-#endif /* DATA_IN_ExtSRAM */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
-          STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx  */ 
-  (void)(tmp); 
-}
-#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 192 - 0
lib/esp-serial-flasher/examples/stm32_example/stm32_flasher.ioc

@@ -0,0 +1,192 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=[]
+CAD.pinconfig=Project naming
+CAD.provider=
+CORTEX_M7.CPU_DCache=Disabled
+CORTEX_M7.CPU_ICache=Disabled
+CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache,default_mode_Activation
+CORTEX_M7.default_mode_Activation=0
+File.Version=6
+GPIO.groupedBy=Group By Peripherals
+KeepUserPlacement=false
+Mcu.CPN=STM32H743VIT6
+Mcu.Family=STM32H7
+Mcu.IP0=CORTEX_M7
+Mcu.IP1=DEBUG
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=USART1
+Mcu.IP6=USART2
+Mcu.IPNb=7
+Mcu.Name=STM32H743VITx
+Mcu.Package=LQFP100
+Mcu.Pin0=PA2
+Mcu.Pin1=PA3
+Mcu.Pin2=PB12
+Mcu.Pin3=PB13
+Mcu.Pin4=PB14
+Mcu.Pin5=PB15
+Mcu.Pin6=PA13 (JTMS/SWDIO)
+Mcu.Pin7=PA14 (JTCK/SWCLK)
+Mcu.Pin8=VP_SYS_VS_Systick
+Mcu.PinsNb=9
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32H743VITx
+MxCube.Version=6.9.2
+MxDb.Version=DB.6.0.92
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA13\ (JTMS/SWDIO).Mode=Serial_Wire
+PA13\ (JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
+PA14\ (JTCK/SWCLK).Mode=Serial_Wire
+PA14\ (JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PB12.GPIOParameters=GPIO_Label
+PB12.GPIO_Label=TARGET_IO0
+PB12.Locked=true
+PB12.Signal=GPIO_Output
+PB13.GPIOParameters=GPIO_Label
+PB13.GPIO_Label=TARGET_RESET
+PB13.Locked=true
+PB13.Signal=GPIO_Output
+PB14.Mode=Asynchronous
+PB14.Signal=USART1_TX
+PB15.Mode=Asynchronous
+PB15.Signal=USART1_RX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32H743VITx
+ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.1
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=true
+ProjectManager.HeapSize=0x000
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=1
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=stm32_flasher.ioc
+ProjectManager.ProjectName=stm32_flasher
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=Makefile
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+RCC.ADCFreq_Value=129000000
+RCC.AHB12Freq_Value=120000000
+RCC.AHB4Freq_Value=120000000
+RCC.APB1Freq_Value=60000000
+RCC.APB2Freq_Value=60000000
+RCC.APB3Freq_Value=60000000
+RCC.APB4Freq_Value=60000000
+RCC.AXIClockFreq_Value=120000000
+RCC.CECFreq_Value=32000
+RCC.CKPERFreq_Value=64000000
+RCC.CortexFreq_Value=120000000
+RCC.CpuClockFreq_Value=120000000
+RCC.D1CPREFreq_Value=120000000
+RCC.D1PPRE=RCC_APB3_DIV2
+RCC.D2PPRE1=RCC_APB1_DIV2
+RCC.D2PPRE2=RCC_APB2_DIV2
+RCC.D3PPRE=RCC_APB4_DIV2
+RCC.DFSDMACLkFreq_Value=120000000
+RCC.DFSDMFreq_Value=60000000
+RCC.DIVM1=4
+RCC.DIVN1=15
+RCC.DIVP1Freq_Value=120000000
+RCC.DIVP2Freq_Value=129000000
+RCC.DIVP3Freq_Value=129000000
+RCC.DIVQ1Freq_Value=120000000
+RCC.DIVQ2Freq_Value=129000000
+RCC.DIVQ3Freq_Value=129000000
+RCC.DIVR1Freq_Value=120000000
+RCC.DIVR2Freq_Value=129000000
+RCC.DIVR3Freq_Value=129000000
+RCC.FDCANFreq_Value=120000000
+RCC.FMCFreq_Value=120000000
+RCC.FamilyName=M
+RCC.HCLK3ClockFreq_Value=120000000
+RCC.HCLKFreq_Value=120000000
+RCC.HRTIMFreq_Value=120000000
+RCC.HSE_VALUE=25000000
+RCC.I2C123Freq_Value=60000000
+RCC.I2C4Freq_Value=60000000
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PWR_Regulator_Voltage_Scale,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.LPTIM1Freq_Value=60000000
+RCC.LPTIM2Freq_Value=60000000
+RCC.LPTIM345Freq_Value=60000000
+RCC.LPUART1Freq_Value=60000000
+RCC.LTDCFreq_Value=129000000
+RCC.MCO1PinFreq_Value=64000000
+RCC.MCO2PinFreq_Value=120000000
+RCC.PLL2FRACN=0
+RCC.PLL3FRACN=0
+RCC.PLLFRACN=0
+RCC.PWR_Regulator_Voltage_Scale=PWR_REGULATOR_VOLTAGE_SCALE1
+RCC.QSPIFreq_Value=120000000
+RCC.RNGFreq_Value=48000000
+RCC.RTCFreq_Value=32000
+RCC.SAI1Freq_Value=120000000
+RCC.SAI23Freq_Value=120000000
+RCC.SAI4AFreq_Value=120000000
+RCC.SAI4BFreq_Value=120000000
+RCC.SDMMCFreq_Value=120000000
+RCC.SPDIFRXFreq_Value=120000000
+RCC.SPI123Freq_Value=120000000
+RCC.SPI45Freq_Value=60000000
+RCC.SPI6Freq_Value=60000000
+RCC.SWPMI1Freq_Value=60000000
+RCC.SYSCLKFreq_VALUE=120000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.Tim1OutputFreq_Value=120000000
+RCC.Tim2OutputFreq_Value=120000000
+RCC.TraceFreq_Value=120000000
+RCC.USART16Freq_Value=60000000
+RCC.USART234578Freq_Value=60000000
+RCC.USBFreq_Value=120000000
+RCC.VCO1OutputFreq_Value=240000000
+RCC.VCO2OutputFreq_Value=258000000
+RCC.VCO3OutputFreq_Value=258000000
+RCC.VCOInput1Freq_Value=16000000
+RCC.VCOInput2Freq_Value=2000000
+RCC.VCOInput3Freq_Value=2000000
+USART1.FIFOMode=FIFOMODE_DISABLE
+USART1.IPParameters=VirtualMode-Asynchronous,TXFIFOThreshold,RXFIFOThreshold,FIFOMode
+USART1.RXFIFOThreshold=RXFIFO_THRESHOLD_1EIGHTHFULL
+USART1.TXFIFOThreshold=TXFIFO_THRESHOLD_1EIGHTHFULL
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART2.IPParameters=VirtualMode-Asynchronous,TXFIFOThreshold,RXFIFOThreshold,OneBitSampling
+USART2.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE
+USART2.RXFIFOThreshold=RXFIFO_THRESHOLD_1EIGHTHFULL
+USART2.TXFIFOThreshold=TXFIFO_THRESHOLD_1EIGHTHFULL
+USART2.VirtualMode-Asynchronous=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom

+ 17 - 15
lib/esp-serial-flasher/examples/zephyr_example/README.md

@@ -2,8 +2,8 @@
 
 
 ## Overview
 ## Overview
 
 
-This sample code demonstrates how to flash ESP32/ESP32-S2/ESP8266 from another (host) MCU using
-esp_serial_flash component API. In this case, ESP32 is also used as host MCU.
+This sample code demonstrates how to flash an Espressif SoC from another (host) MCU using
+esp_serial_flash component API. In this case, the ESP32 is used as host MCU.
 Binaries to be flashed from host MCU to another Espressif SoC can be found in `binaries` folder
 Binaries to be flashed from host MCU to another Espressif SoC can be found in `binaries` folder
 and are converted into C-array during build process.
 and are converted into C-array during build process.
 
 
@@ -11,7 +11,7 @@ Following steps are performed in order to re-program target's memory:
 
 
 1. Peripherals are initialized (GPIO for BOOT and EN pins and UART).
 1. Peripherals are initialized (GPIO for BOOT and EN pins and UART).
 2. UART1 (can be changed) through which new binary will be transfered is initialized.
 2. UART1 (can be changed) through which new binary will be transfered is initialized.
-3. Host puts slave device into boot mode tries to connect by calling `esp_loader_connect()`.
+3. Host puts target device into boot mode tries to connect by calling `esp_loader_connect()`.
 4. Binary file is opened and its size is acquired, as it has to be known before flashing.
 4. Binary file is opened and its size is acquired, as it has to be known before flashing.
 5. Then `esp_loader_flash_start()` is called to enter flashing mode and erase amount of memory to be flashed.
 5. Then `esp_loader_flash_start()` is called to enter flashing mode and erase amount of memory to be flashed.
 6. `esp_loader_flash_write()` function is called repeatedly until the whole binary image is transfered.
 6. `esp_loader_flash_write()` function is called repeatedly until the whole binary image is transfered.
@@ -23,31 +23,33 @@ phase, and can be changed before calling `esp_loader_connect`, if necessary.
 
 
 ## Hardware Required
 ## Hardware Required
 
 
-* Two development boards with ESP32 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.).
+* Any supported Espressif SoC board for the target
+* An ESP32-DevKitC board for the host
 * One or two USB cables for power supply and programming.
 * One or two USB cables for power supply and programming.
 
 
 ## Hardware connection
 ## Hardware connection
 
 
-Table below shows connection between two ESP32 devices.
+Table below shows connection between the two devices:
 
 
-| ESP32 (host) | ESP32 (slave) |
-|:------------:|:-------------:|
-|    IO4       |      IO0      |
-|    IO2       |     RESET     |
-|    IO9       |      TX0      |
-|    IO10      |      RX0      |
-
-Note: interconnection is the same for all three targets (slaves).
+| ESP32 (host) | Espressif SoC (target) |
+|:------------:|:----------------------:|
+|    IO4       |           IO0          |
+|    IO2       |          RESET         |
+|    IO9       |           TX0          |
+|    IO10      |           RX0          |
 
 
 ## Build and flash
 ## Build and flash
 
 
-To run the example, type the following command:
+To run the example, type the following commands:
 
 
 ```c
 ```c
-west build -p -b esp32
+west init
+west update
+west build -p -b <supported board>
 west flash
 west flash
 west espressif monitor
 west espressif monitor
 ```
 ```
+>**Note:** You can find the supported boards in the boards folder.
 
 
 (To exit the serial monitor, type ``ctrl-c``.)
 (To exit the serial monitor, type ``ctrl-c``.)
 
 

+ 1 - 1
lib/esp-serial-flasher/examples/zephyr_example/boards/esp32.overlay → lib/esp-serial-flasher/examples/zephyr_example/boards/esp32_devkitc_wroom.overlay

@@ -12,7 +12,7 @@
 	aliases {
 	aliases {
 		en = &en_button;
 		en = &en_button;
 		boot = &boot_button;
 		boot = &boot_button;
-		uart1 = &uart1;
+		uart = &uart1;
 	};
 	};
 
 
 	gpio_keys {
 	gpio_keys {

+ 34 - 0
lib/esp-serial-flasher/examples/zephyr_example/boards/esp32_devkitc_wrover.overlay

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+#include <dt-bindings/pinctrl/esp32-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
+
+/ {
+	aliases {
+		en = &en_button;
+		boot = &boot_button;
+		uart = &uart1;
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		en_button: en_button {
+			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_HIGH)>;
+		};
+		boot_button: boot_button {
+			gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_HIGH)>;
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};

+ 3 - 1
lib/esp-serial-flasher/examples/zephyr_example/sample.yaml

@@ -3,5 +3,7 @@ sample:
   name: zephyr_flasher
   name: zephyr_flasher
 tests:
 tests:
   sample.esp_flasher.zephyr_example:
   sample.esp_flasher.zephyr_example:
-    platform_allow: esp32
+    platform_allow:
+      - esp32_devkitc_wroom
+      - esp32_devkitc_wrover
     tags: esp32
     tags: esp32

+ 4 - 4
lib/esp-serial-flasher/examples/zephyr_example/src/main.c

@@ -25,13 +25,13 @@
 #define DEFAULT_BAUDRATE 115200
 #define DEFAULT_BAUDRATE 115200
 
 
 /* Get UART DTS entry used as flash interface */
 /* Get UART DTS entry used as flash interface */
-static const struct device *esp_uart_dev = DEVICE_DT_GET(DT_ALIAS(uart1));
+static const struct device *esp_uart_dev = DEVICE_DT_GET(DT_ALIAS(uart));
 /* Get GPIO pin connected to the ESP's enable pin. */
 /* Get GPIO pin connected to the ESP's enable pin. */
 static const struct gpio_dt_spec esp_enable_spec = GPIO_DT_SPEC_GET(DT_ALIAS(en), gpios);
 static const struct gpio_dt_spec esp_enable_spec = GPIO_DT_SPEC_GET(DT_ALIAS(en), gpios);
 /* Get GPIO pin  connected to the ESP's boot pin. */
 /* Get GPIO pin  connected to the ESP's boot pin. */
 static const struct gpio_dt_spec esp_boot_spec = GPIO_DT_SPEC_GET(DT_ALIAS(boot), gpios);
 static const struct gpio_dt_spec esp_boot_spec = GPIO_DT_SPEC_GET(DT_ALIAS(boot), gpios);
 
 
-void main(void)
+int main(void)
 {
 {
 	example_binaries_t bin;
 	example_binaries_t bin;
 
 
@@ -75,7 +75,7 @@ void main(void)
 		flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
 		flash_binary(bin.app.data,  bin.app.size,  bin.app.addr);
 	}
 	}
 
 
-	loader_port_change_transmission_rate(DEFAULT_BAUDRATE);
+	esp_loader_reset_target();
 
 
-	loader_port_reset_target();
+	return 0;
 }
 }

+ 1 - 1
lib/esp-serial-flasher/idf_component.yml

@@ -1,3 +1,3 @@
-version: "0.2.0"
+version: "0.5.0"
 description: Serial flasher component provides portable library for flashing or loading ram loadble app to Espressif SoCs from other host microcontroller
 description: Serial flasher component provides portable library for flashing or loading ram loadble app to Espressif SoCs from other host microcontroller
 url: https://github.com/espressif/esp-serial-flasher
 url: https://github.com/espressif/esp-serial-flasher

+ 3 - 17
lib/esp-serial-flasher/include/esp_loader.h

@@ -64,8 +64,9 @@ typedef enum {
     ESP32C2_CHIP = 5,
     ESP32C2_CHIP = 5,
     ESP32H4_CHIP = 6,
     ESP32H4_CHIP = 6,
     ESP32H2_CHIP = 7,
     ESP32H2_CHIP = 7,
-    ESP_MAX_CHIP = 8,
-    ESP_UNKNOWN_CHIP = 8
+    ESP32C6_CHIP = 8,
+    ESP_MAX_CHIP = 9,
+    ESP_UNKNOWN_CHIP = 9
 } target_chip_t;
 } target_chip_t;
 
 
 /**
 /**
@@ -88,21 +89,6 @@ typedef struct {
     uint8_t *data;
     uint8_t *data;
 } esp_loader_bin_segment_t;
 } esp_loader_bin_segment_t;
 
 
-/**
- * @brief SPI pin configuration arguments
- */
-typedef union {
-    struct {
-        uint32_t pin_clk: 6;
-        uint32_t pin_q:   6;
-        uint32_t pin_d:   6;
-        uint32_t pin_cs:  6;
-        uint32_t pin_hd:  6;
-        uint32_t zero:    2;
-    };
-    uint32_t val;
-} esp_loader_spi_config_t;
-
 /**
 /**
  * @brief Connection arguments
  * @brief Connection arguments
  */
  */

+ 2 - 2
lib/esp-serial-flasher/port/esp32_port.c

@@ -96,7 +96,7 @@ void loader_port_esp32_deinit(void)
 esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_t timeout)
 esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_t timeout)
 {
 {
     uart_write_bytes(s_uart_port, (const char *)data, size);
     uart_write_bytes(s_uart_port, (const char *)data, size);
-    esp_err_t err = uart_wait_tx_done(s_uart_port, timeout);
+    esp_err_t err = uart_wait_tx_done(s_uart_port, pdMS_TO_TICKS(timeout));
 
 
     if (err == ESP_OK) {
     if (err == ESP_OK) {
 #ifdef SERIAL_FLASHER_DEBUG_TRACE
 #ifdef SERIAL_FLASHER_DEBUG_TRACE
@@ -113,7 +113,7 @@ esp_loader_error_t loader_port_write(const uint8_t *data, uint16_t size, uint32_
 
 
 esp_loader_error_t loader_port_read(uint8_t *data, uint16_t size, uint32_t timeout)
 esp_loader_error_t loader_port_read(uint8_t *data, uint16_t size, uint32_t timeout)
 {
 {
-    int read = uart_read_bytes(s_uart_port, data, size, timeout);
+    int read = uart_read_bytes(s_uart_port, data, size, pdMS_TO_TICKS(timeout));
 
 
     if (read < 0) {
     if (read < 0) {
         return ESP_LOADER_ERROR_FAIL;
         return ESP_LOADER_ERROR_FAIL;

+ 23 - 0
lib/esp-serial-flasher/port/stm32_port.h

@@ -17,7 +17,30 @@
 
 
 #include <stdint.h>
 #include <stdint.h>
 #include "esp_loader_io.h"
 #include "esp_loader_io.h"
+
+#if defined STM32C0
+#include "stm32c0xx_hal.h"
+#elif defined STM32F0
+#include "stm32f0xx_hal.h"
+#elif defined STM32F1
+#include "stm32f1xx_hal.h"
+#elif defined STM32F2
+#include "stm32f2xx_hal.h"
+#elif defined STM32F3
+#include "stm32f3xx_hal.h"
+#elif defined STM32F4
 #include "stm32f4xx_hal.h"
 #include "stm32f4xx_hal.h"
+#elif defined STM32F7
+#include "stm32f7xx_hal.h"
+#elif defined STM32G0
+#include "stm32g0xx_hal.h"
+#elif defined STM32G4
+#include "stm32g4xx_hal.h"
+#elif defined STM32H5
+#include "stm32h5xx_hal.h"
+#elif defined STM32H7
+#include "stm32h7xx_hal.h"
+#endif
 
 
 #ifdef __cplusplus
 #ifdef __cplusplus
 extern "C" {
 extern "C" {

+ 1 - 1
lib/esp-serial-flasher/port/zephyr_port.c

@@ -139,7 +139,7 @@ static uint64_t s_time_end;
 
 
 void loader_port_start_timer(uint32_t ms)
 void loader_port_start_timer(uint32_t ms)
 {
 {
-    s_time_end = sys_clock_timeout_end_calc(Z_TIMEOUT_MS(ms));
+    s_time_end = sys_timepoint_calc(Z_TIMEOUT_MS(ms)).tick;
 }
 }
 
 
 uint32_t loader_port_remaining_time(void)
 uint32_t loader_port_remaining_time(void)

+ 18 - 4
lib/esp-serial-flasher/src/esp_loader.c

@@ -292,9 +292,15 @@ esp_loader_error_t esp_loader_flash_write(void *payload, uint32_t size)
 
 
     md5_update(payload, (size + 3) & ~3);
     md5_update(payload, (size + 3) & ~3);
 
 
-    loader_port_start_timer(DEFAULT_TIMEOUT);
+    unsigned int attempt = 0;
+    esp_loader_error_t result = ESP_LOADER_ERROR_FAIL;
+    do {
+        loader_port_start_timer(DEFAULT_TIMEOUT);
+        result = loader_flash_data_cmd(data, s_flash_write_size);
+        attempt++;
+    } while (result != ESP_LOADER_SUCCESS && attempt < SERIAL_FLASHER_WRITE_BLOCK_RETRIES);
 
 
-    return loader_flash_data_cmd(data, s_flash_write_size);
+    return result;
 }
 }
 
 
 
 
@@ -317,8 +323,16 @@ esp_loader_error_t esp_loader_mem_start(uint32_t offset, uint32_t size, uint32_t
 esp_loader_error_t esp_loader_mem_write(const void *payload, uint32_t size)
 esp_loader_error_t esp_loader_mem_write(const void *payload, uint32_t size)
 {
 {
     const uint8_t *data = (const uint8_t *)payload;
     const uint8_t *data = (const uint8_t *)payload;
-    loader_port_start_timer(timeout_per_mb(size, LOAD_RAM_TIMEOUT_PER_MB));
-    return loader_mem_data_cmd(data, size);
+    
+    unsigned int attempt = 0;
+    esp_loader_error_t result = ESP_LOADER_ERROR_FAIL;
+    do {
+        loader_port_start_timer(timeout_per_mb(size, LOAD_RAM_TIMEOUT_PER_MB));
+        result = loader_mem_data_cmd(data, size);
+        attempt++;
+    } while (result != ESP_LOADER_SUCCESS && attempt < SERIAL_FLASHER_WRITE_BLOCK_RETRIES);
+    
+    return result;
 }
 }
 
 
 
 

+ 36 - 2
lib/esp-serial-flasher/src/esp_targets.c

@@ -33,11 +33,13 @@ typedef struct {
 
 
 #define ESP8266_SPI_REG_BASE 0x60000200
 #define ESP8266_SPI_REG_BASE 0x60000200
 #define ESP32S2_SPI_REG_BASE 0x3f402000
 #define ESP32S2_SPI_REG_BASE 0x3f402000
+#define ESP32C6_SPI_REG_BASE 0x60003000
 #define ESP32xx_SPI_REG_BASE 0x60002000
 #define ESP32xx_SPI_REG_BASE 0x60002000
 #define ESP32_SPI_REG_BASE   0x3ff42000
 #define ESP32_SPI_REG_BASE   0x3ff42000
 
 
 static esp_loader_error_t spi_config_esp32(uint32_t efuse_base, uint32_t *spi_config);
 static esp_loader_error_t spi_config_esp32(uint32_t efuse_base, uint32_t *spi_config);
 static esp_loader_error_t spi_config_esp32xx(uint32_t efuse_base, uint32_t *spi_config);
 static esp_loader_error_t spi_config_esp32xx(uint32_t efuse_base, uint32_t *spi_config);
+static esp_loader_error_t spi_config_unsupported(uint32_t efuse_base, uint32_t *spi_config);
 
 
 static const esp_target_t esp_target[ESP_MAX_CHIP] = {
 static const esp_target_t esp_target[ESP_MAX_CHIP] = {
 
 
@@ -55,6 +57,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0,            // Not used
         .efuse_base = 0,            // Not used
         .chip_magic_value  = { 0xfff0c101, 0 },
         .chip_magic_value  = { 0xfff0c101, 0 },
         .read_spi_config = NULL,    // Not used
         .read_spi_config = NULL,    // Not used
+        .encryption_in_begin_flash_cmd = false,
     },
     },
 
 
     // ESP32
     // ESP32
@@ -71,6 +74,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x3ff5A000,
         .efuse_base = 0x3ff5A000,
         .chip_magic_value  = { 0x00f01d83, 0 },
         .chip_magic_value  = { 0x00f01d83, 0 },
         .read_spi_config = spi_config_esp32,
         .read_spi_config = spi_config_esp32,
+        .encryption_in_begin_flash_cmd = false,
     },
     },
 
 
     // ESP32S2
     // ESP32S2
@@ -87,6 +91,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x3f41A000,
         .efuse_base = 0x3f41A000,
         .chip_magic_value  = { 0x000007c6, 0 },
         .chip_magic_value  = { 0x000007c6, 0 },
         .read_spi_config = spi_config_esp32xx,
         .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
     },
     },
 
 
     // ESP32C3
     // ESP32C3
@@ -103,6 +108,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x60008800,
         .efuse_base = 0x60008800,
         .chip_magic_value = { 0x6921506f, 0x1b31506f },
         .chip_magic_value = { 0x6921506f, 0x1b31506f },
         .read_spi_config = spi_config_esp32xx,
         .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
     },
     },
 
 
     // ESP32S3
     // ESP32S3
@@ -119,6 +125,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x60007000,
         .efuse_base = 0x60007000,
         .chip_magic_value = { 0x00000009, 0 },
         .chip_magic_value = { 0x00000009, 0 },
         .read_spi_config = spi_config_esp32xx,
         .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
     },
     },
 
 
     // ESP32C2
     // ESP32C2
@@ -135,6 +142,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x60008800,
         .efuse_base = 0x60008800,
         .chip_magic_value = { 0x6f51306f, 0x7c41a06f },
         .chip_magic_value = { 0x6f51306f, 0x7c41a06f },
         .read_spi_config = spi_config_esp32xx,
         .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
     },
     },
     // ESP32H4
     // ESP32H4
     {
     {
@@ -150,6 +158,7 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x6001A000,
         .efuse_base = 0x6001A000,
         .chip_magic_value = {0xca26cc22, 0x6881b06f}, // ESP32H4-BETA1, ESP32H4-BETA2
         .chip_magic_value = {0xca26cc22, 0x6881b06f}, // ESP32H4-BETA1, ESP32H4-BETA2
         .read_spi_config = spi_config_esp32xx,
         .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
     },
     },
     // ESP32H2
     // ESP32H2
     {
     {
@@ -165,6 +174,23 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
         .efuse_base = 0x6001A000,
         .efuse_base = 0x6001A000,
         .chip_magic_value = {0xd7b73e80, 0},
         .chip_magic_value = {0xd7b73e80, 0},
         .read_spi_config = spi_config_esp32xx,
         .read_spi_config = spi_config_esp32xx,
+        .encryption_in_begin_flash_cmd = true,
+    },
+    // ESP32C6
+    {
+        .regs = {
+            .cmd  = ESP32C6_SPI_REG_BASE + 0x00,
+            .usr  = ESP32C6_SPI_REG_BASE + 0x18,
+            .usr1 = ESP32C6_SPI_REG_BASE + 0x1c,
+            .usr2 = ESP32C6_SPI_REG_BASE + 0x20,
+            .w0   = ESP32C6_SPI_REG_BASE + 0x58,
+            .mosi_dlen = ESP32C6_SPI_REG_BASE + 0x24,
+            .miso_dlen = ESP32C6_SPI_REG_BASE + 0x28,
+        },
+        .efuse_base = 0x600B0800,
+        .chip_magic_value = { 0x2CE0806F, 0 },
+        .read_spi_config = spi_config_unsupported,
+        .encryption_in_begin_flash_cmd = true,
     },
     },
 };
 };
 
 
@@ -257,7 +283,15 @@ static esp_loader_error_t spi_config_esp32xx(uint32_t efuse_base, uint32_t *spi_
     return ESP_LOADER_SUCCESS;
     return ESP_LOADER_SUCCESS;
 }
 }
 
 
-bool encryption_in_begin_flash_cmd(target_chip_t target)
+// Some newer chips like the esp32c6 do not support configurable SPI
+static esp_loader_error_t spi_config_unsupported(uint32_t efuse_base, uint32_t *spi_config)
+{
+    (void)(efuse_base); // UNUSED param
+    *spi_config = 0;
+    return ESP_LOADER_SUCCESS;
+}
+
+bool encryption_in_begin_flash_cmd(const target_chip_t target)
 {
 {
-    return target == ESP32_CHIP || target == ESP8266_CHIP;
+    return esp_target[target].encryption_in_begin_flash_cmd;
 }
 }

+ 5 - 5
lib/esp-serial-flasher/src/protocol_common.c

@@ -59,13 +59,11 @@ esp_loader_error_t loader_flash_begin_cmd(uint32_t offset,
                                           uint32_t blocks_to_write,
                                           uint32_t blocks_to_write,
                                           bool encryption)
                                           bool encryption)
 {
 {
-    uint32_t encryption_size = encryption ? sizeof(uint32_t) : 0;
-
     flash_begin_command_t flash_begin_cmd = {
     flash_begin_command_t flash_begin_cmd = {
         .common = {
         .common = {
             .direction = WRITE_DIRECTION,
             .direction = WRITE_DIRECTION,
             .command = FLASH_BEGIN,
             .command = FLASH_BEGIN,
-            .size = CMD_SIZE(flash_begin_cmd) - encryption_size,
+            .size = CMD_SIZE(flash_begin_cmd) - (encryption ? 0 : sizeof(uint32_t)),
             .checksum = 0
             .checksum = 0
         },
         },
         .erase_size = erase_size,
         .erase_size = erase_size,
@@ -77,7 +75,9 @@ esp_loader_error_t loader_flash_begin_cmd(uint32_t offset,
 
 
     s_sequence_number = 0;
     s_sequence_number = 0;
 
 
-    return send_cmd(&flash_begin_cmd, sizeof(flash_begin_cmd) - encryption_size, NULL);
+    return send_cmd(&flash_begin_cmd,
+                    sizeof(flash_begin_cmd) - (encryption ? 0 : sizeof(uint32_t)),
+                    NULL);
 }
 }
 
 
 
 
@@ -297,5 +297,5 @@ esp_loader_error_t loader_spi_parameters(uint32_t total_size)
 
 
 __attribute__ ((weak)) void loader_port_debug_print(const char *str)
 __attribute__ ((weak)) void loader_port_debug_print(const char *str)
 {
 {
- (void)(str);
+    (void) str;
 }
 }

+ 7 - 1
lib/esp-serial-flasher/src/protocol_uart.c

@@ -51,7 +51,13 @@ esp_loader_error_t send_cmd(const void *cmd_data, uint32_t size, uint32_t *reg_v
     RETURN_ON_ERROR( SLIP_send((const uint8_t *)cmd_data, size) );
     RETURN_ON_ERROR( SLIP_send((const uint8_t *)cmd_data, size) );
     RETURN_ON_ERROR( SLIP_send_delimiter() );
     RETURN_ON_ERROR( SLIP_send_delimiter() );
 
 
-    return check_response(command, reg_value, &response, sizeof(response));
+    const uint8_t response_cnt = command == SYNC ? 8 : 1;
+    
+    for (uint8_t recv_cnt = 0; recv_cnt < response_cnt; recv_cnt++) {
+        RETURN_ON_ERROR(check_response(command, reg_value, &response, sizeof(response)));
+    }
+
+    return ESP_LOADER_SUCCESS;
 }
 }
 
 
 
 

+ 0 - 20
lib/esp-serial-flasher/submodules/CMakeLists.txt

@@ -1,20 +0,0 @@
-
-cmake_minimum_required(VERSION 3.13)
-
-set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/stm32-cmake/cmake/gcc_stm32.cmake)
-set(CMAKE_MODULE_PATH    ${CMAKE_CURRENT_LIST_DIR}/stm32-cmake/cmake)
-
-find_package(CMSIS REQUIRED)
-find_package(STM32HAL COMPONENTS gpio tim uart REQUIRED)
-
-add_library(stm_cube_impl ${CMSIS_SOURCES} ${STM32HAL_SOURCES})
-target_include_directories(stm_cube_impl PUBLIC ${CMSIS_INCLUDE_DIRS} ${STM32HAL_INCLUDE_DIR})
-stm32_set_target_properties(stm_cube_impl)
-
-# stm_cube target is made to propagate properties of stm_cube_impl, as stm32_set_target_properties 
-# sets properties privately for given target. This eliminates need to call stm32_set_target_properties
-# on every target that links against STM32HAL.
-add_library(stm_cube INTERFACE)
-target_link_libraries(stm_cube INTERFACE stm_cube_impl)
-target_compile_definitions(stm_cube INTERFACE $<TARGET_PROPERTY:stm_cube_impl,COMPILE_DEFINITIONS>)
-target_link_options(stm_cube INTERFACE -T${CMAKE_CURRENT_BINARY_DIR}/stm_cube_impl_flash.ld)

+ 1 - 0
lib/esp-serial-flasher/test/CMakeLists.txt

@@ -26,4 +26,5 @@ target_compile_definitions(${PROJECT_NAME} PRIVATE
 	MD5_ENABLED=1
 	MD5_ENABLED=1
 	SERIAL_FLASHER_INTERFACE_UART
 	SERIAL_FLASHER_INTERFACE_UART
 	SERIAL_FLASHER_DEBUG_TRACE
 	SERIAL_FLASHER_DEBUG_TRACE
+	SERIAL_FLASHER_WRITE_BLOCK_RETRIES=1
 )
 )

+ 10 - 2
lib/esp-serial-flasher/test/test.cpp

@@ -119,6 +119,7 @@ map<target_chip_t, uint32_t> chip_magic_value = {
     {ESP32S3_CHIP,  0x00000009},
     {ESP32S3_CHIP,  0x00000009},
     {ESP32H4_CHIP,  0xca26cc22},
     {ESP32H4_CHIP,  0xca26cc22},
     {ESP32H2_CHIP,  0xd7b73e80},
     {ESP32H2_CHIP,  0xd7b73e80},
+    {ESP32C6_CHIP,  0x2ce0806f},
 };
 };
 
 
 void queue_connect_response(target_chip_t target = ESP32_CHIP, uint32_t magic_value = 0)
 void queue_connect_response(target_chip_t target = ESP32_CHIP, uint32_t magic_value = 0)
@@ -127,7 +128,11 @@ void queue_connect_response(target_chip_t target = ESP32_CHIP, uint32_t magic_va
     auto magic_value_response = read_reg_response;
     auto magic_value_response = read_reg_response;
     magic_value_response.data.common.value = magic_value ? magic_value : chip_magic_value[target];
     magic_value_response.data.common.value = magic_value ? magic_value : chip_magic_value[target];
     clear_buffers();
     clear_buffers();
-    queue_response(sync_response);
+
+    for (uint8_t resp = 0; resp < 8; resp++) {
+        queue_response(sync_response);
+    }
+    
     queue_response(magic_value_response);
     queue_response(magic_value_response);
 
 
     if (target == ESP8266_CHIP) {
     if (target == ESP8266_CHIP) {
@@ -322,7 +327,10 @@ TEST_CASE( "Sync command is constructed correctly" )
     };
     };
 
 
     clear_buffers();
     clear_buffers();
-    queue_response(sync_response);
+    
+    for (uint8_t resp = 0; resp < 8; resp++) {
+        queue_response(sync_response);
+    }
 
 
     REQUIRE_SUCCESS( loader_sync_cmd() );
     REQUIRE_SUCCESS( loader_sync_cmd() );
 
 

+ 6 - 0
lib/esp-serial-flasher/zephyr/CMakeLists.txt

@@ -27,4 +27,10 @@ if (CONFIG_ESP_SERIAL_FLASHER)
     if(DEFINED MD5_ENABLED OR CONFIG_SERIAL_FLASHER_MD5_ENABLED)
     if(DEFINED MD5_ENABLED OR CONFIG_SERIAL_FLASHER_MD5_ENABLED)
         target_compile_definitions(esp_flasher INTERFACE -DMD5_ENABLED=1)
         target_compile_definitions(esp_flasher INTERFACE -DMD5_ENABLED=1)
     endif()
     endif()
+
+    target_compile_definitions(esp_flasher
+    INTERFACE
+        SERIAL_FLASHER_WRITE_BLOCK_RETRIES=${CONFIG_SERIAL_FLASHER_WRITE_BLOCK_RETRIES}
+    )
+
 endif()
 endif()

+ 13 - 2
scenes/esp_flasher_scene_browse.c

@@ -11,6 +11,7 @@ enum SubmenuIndex {
     SubmenuIndexAppB,
     SubmenuIndexAppB,
     SubmenuIndexCustom,
     SubmenuIndexCustom,
     SubmenuIndexFlash,
     SubmenuIndexFlash,
+    SubmenuIndexFlashTurbo,
 };
 };
 
 
 static void esp_flasher_scene_browse_callback(void* context, uint32_t index) {
 static void esp_flasher_scene_browse_callback(void* context, uint32_t index) {
@@ -147,6 +148,8 @@ static void esp_flasher_scene_browse_callback(void* context, uint32_t index) {
         view_dispatcher_send_custom_event(app->view_dispatcher, EspFlasherEventRefreshSubmenu);
         view_dispatcher_send_custom_event(app->view_dispatcher, EspFlasherEventRefreshSubmenu);
         break;
         break;
     case SubmenuIndexFlash:
     case SubmenuIndexFlash:
+    case SubmenuIndexFlashTurbo:
+        app->turbospeed = (index == SubmenuIndexFlashTurbo); // faster baudrate toggle
         // count how many options are selected
         // count how many options are selected
         app->num_selected_flash_options = 0;
         app->num_selected_flash_options = 0;
         for(bool* option = &app->selected_flash_options[SelectedFlashBoot];
         for(bool* option = &app->selected_flash_options[SelectedFlashBoot];
@@ -177,8 +180,10 @@ static void esp_flasher_scene_browse_callback(void* context, uint32_t index) {
 #define STR_APP_A "FirmwareA(" TOSTRING(ESP_ADDR_APP_A) ")"
 #define STR_APP_A "FirmwareA(" TOSTRING(ESP_ADDR_APP_A) ")"
 #define STR_APP_B "FirmwareB(" TOSTRING(ESP_ADDR_APP_B) ")"
 #define STR_APP_B "FirmwareB(" TOSTRING(ESP_ADDR_APP_B) ")"
 #define STR_CUSTOM "Custom"
 #define STR_CUSTOM "Custom"
-#define STR_FLASH_S3 "[>] FLASH (ESP32-S3)"
-#define STR_FLASH "[>] FLASH"
+#define STR_FLASH_S3 "[>] FLASH - slow (S3)"
+#define STR_FLASH "[>] FLASH - slow"
+#define STR_FLASH_TURBO_S3 "[>] FLASH - fast (S3)"
+#define STR_FLASH_TURBO "[>] FLASH - fast"
 static void _refresh_submenu(EspFlasherApp* app) {
 static void _refresh_submenu(EspFlasherApp* app) {
     Submenu* submenu = app->submenu;
     Submenu* submenu = app->submenu;
 
 
@@ -246,6 +251,12 @@ static void _refresh_submenu(EspFlasherApp* app) {
     // TODO: custom addr
     // TODO: custom addr
     //submenu_add_item(
     //submenu_add_item(
     //    submenu, app->selected_flash_options[SelectedFlashCustom] ? STR_SELECT " " STR_CUSTOM : STR_UNSELECT " " STR_CUSTOM, SubmenuIndexCustom, esp_flasher_scene_browse_callback, app);
     //    submenu, app->selected_flash_options[SelectedFlashCustom] ? STR_SELECT " " STR_CUSTOM : STR_UNSELECT " " STR_CUSTOM, SubmenuIndexCustom, esp_flasher_scene_browse_callback, app);
+    submenu_add_item(
+        submenu,
+        app->selected_flash_options[SelectedFlashS3Mode] ? STR_FLASH_TURBO_S3 : STR_FLASH_TURBO,
+        SubmenuIndexFlashTurbo,
+        esp_flasher_scene_browse_callback,
+        app);
     submenu_add_item(
     submenu_add_item(
         submenu,
         submenu,
         app->selected_flash_options[SelectedFlashS3Mode] ? STR_FLASH_S3 : STR_FLASH,
         app->selected_flash_options[SelectedFlashS3Mode] ? STR_FLASH_S3 : STR_FLASH,