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@@ -0,0 +1,263 @@
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+#pragma once
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+
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+#include <stdbool.h>
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+#include <stdint.h>
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+
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+#if BITS_BIG_ENDIAN == 1
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+#error Bit structures defined in this file is not portable to BE
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+#endif
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+
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+#define BQ25896_ADDRESS 0xD6
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+
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+typedef struct {
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+ uint8_t IINLIM:6; // Input Current Limit, mA, offset: +100mA
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+ bool EN_ILIM:1; // Enable ILIM Pin
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+ bool EN_HIZ:1; // Enable HIZ Mode
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+} REG00;
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+
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+#define IILIM_1600 (1<<5)
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+#define IILIM_800 (1<<4)
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+#define IILIM_400 (1<<3)
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+#define IILIM_200 (1<<2)
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+#define IILIM_100 (1<<1)
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+#define IILIM_50 (1<<0)
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+
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+typedef struct {
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+ uint8_t VINDPM_OS:5; // Input Voltage Limit Offset, mV
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+ bool BCOLD:1; // Boost Mode Cold Temperature Monitor Threshold
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+ uint8_t BHOT:2; // Boost Mode Hot Temperature Monitor Threshold
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+} REG01;
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+
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+#define VINDPM_OS_1600 (1<<4)
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+#define VINDPM_OS_800 (1<<3)
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+#define VINDPM_OS_400 (1<<2)
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+#define VINDPM_OS_200 (1<<1)
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+#define VINDPM_OS_100 (1<<0)
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+
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+
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+typedef struct {
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+ bool AUTO_DPDM_EN:1; // Automatic Input Detection Enable
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+ bool FORCE_DPDM:1; // Force Input Detection
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+ uint8_t RES:2; // Reserved
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+ bool ICO_EN:1; // Input Current Optimizer (ICO) Enable
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+ bool BOOST_FREQ:1; // Boost Mode Frequency Selection
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+ bool CONV_RATE:1; // ADC Conversion Rate Selection
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+ bool CONV_START:1; // ADC Conversion Start Control
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+} REG02;
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+
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+
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+typedef struct {
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+ bool MIN_VBAT_SEL:1; // Minimum Battery Voltage (falling) to exit boost mode
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+ uint8_t SYS_MIN:3; // Minimum System Voltage Limit, mV, offset: +3000mV
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+ bool CHG_CONFIG:1; // Charge Enable Configuration
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+ bool OTG_CONFIG:1; // Boost (OTG) Mode Configuration
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+ bool WD_RST:1; // I2C Watchdog Timer Reset
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+ bool BAT_LOADEN:1; // Battery Load (IBATLOAD) Enable
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+} REG03;
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+
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+#define SYS_MIN_400 (1<<2)
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+#define SYS_MIN_200 (1<<1)
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+#define SYS_MIN_100 (1<<0)
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+
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+typedef struct {
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+ uint8_t ICHG:7; // Fast Charge Current Limit, mA
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+ bool EN_PUMPX:1; // Current pulse control Enable
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+} REG04;
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+
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+#define ICHG_4096 (1<<6)
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+#define ICHG_2048 (1<<5)
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+#define ICHG_1024 (1<<4)
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+#define ICHG_512 (1<<3)
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+#define ICHG_256 (1<<2)
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+#define ICHG_128 (1<<1)
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+#define ICHG_64 (1<<0)
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+
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+typedef struct {
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+ uint8_t ITERM:4; // Termination Current Limit, offset: +64mA
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+ uint8_t IPRECHG:4; // Precharge Current Limit, offset: +64mA
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+} REG05;
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+
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+#define IPRETERM_512 (1<<3)
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+#define IPRETERM_256 (1<<2)
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+#define IPRETERM_128 (1<<1)
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+#define IPRETERM_64 (1<<0)
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+
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+typedef struct {
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+ bool VRECHG:1; // Battery Recharge Threshold Offset
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+ bool BATLOWV:1; // Battery Precharge to Fast Charge Threshold
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+ uint8_t VREG:6; // Charge Voltage Limit, offset: +3840mV
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+} REG06;
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+
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+#define VREG_512 (1<<5)
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+#define VREG_256 (1<<4)
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+#define VREG_128 (1<<3)
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+#define VREG_64 (1<<2)
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+#define VREG_32 (1<<1)
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+#define VREG_16 (1<<0)
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+
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+typedef struct {
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+ bool JEITA_ISET:1; // JEITA Low Temperature Current Setting
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+ uint8_t CHG_TIMER:2; // Fast Charge Timer Setting
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+ bool EN_TIMER:1; // Charging Safety Timer Enable
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+ uint8_t WATCHDOG:2; // I2C Watchdog Timer Setting
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+ bool STAT_DIS:1; // STAT Pin Disable
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+ bool EN_TERM:1; // Charging Termination Enable
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+} REG07;
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+
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+#define WATCHDOG_DIS (0b00)
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+#define WATCHDOG_40 (0b01)
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+#define WATCHDOG_80 (0b10)
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+#define WATCHDOG_160 (0b11)
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+
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+#define CHG_TIMER_5 (0b00)
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+#define CHG_TIMER_8 (0b01)
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+#define CHG_TIMER_12 (0b10)
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+#define CHG_TIMER_20 (0b11)
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+
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+typedef struct {
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+ uint8_t TREG:2; // Thermal Regulation Threshold
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+ uint8_t VCLAMP:3; // IR Compensation Voltage Clamp
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+ uint8_t BAT_COMP:3; // IR Compensation Resistor Setting
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+} REG08;
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+
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+#define BAT_COMP_80 (1<<2)
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+#define BAT_COMP_40 (1<<1)
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+#define BAT_COMP_20 (1<<0)
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+
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+#define VCLAMP_128 (1<<2)
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+#define VCLAMP_64 (1<<1)
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+#define VCLAMP_32 (1<<0)
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+
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+#define TREG_60 (0b00)
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+#define TREG_80 (0b01)
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+#define TREG_100 (0b10)
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+#define TREG_120 (0b11)
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+
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+typedef struct {
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+ bool PUMPX_DN:1; // Current pulse control voltage down enable
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+ bool PUMPX_UP:1; // Current pulse control voltage up enable
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+ bool BATFET_RST_EN:1; // BATFET full system reset enable
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+ bool BATFET_DLY:1; // BATFET turn off delay control
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+ bool JEITA_VSET:1; // JEITA High Temperature Voltage Setting
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+ bool BATFET_DIS:1; // Force BATFET off to enable ship mode
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+ bool TMR2X_EN:1; // Safety Timer Setting during DPM or Thermal Regulation
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+ bool FORCE_ICO:1; // Force Start Input Current Optimizer
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+} REG09;
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+
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+typedef struct {
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+ uint8_t BOOST_LIM:3; // Boost Mode Current Limit
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+ bool PFM_OTG_DIS:1; // PFM mode allowed in boost mode
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+ uint8_t BOOSTV:4; // Boost Mode Voltage Regulation, offset: +4550mV
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+} REG0A;
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+
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+#define BOOSTV_512 (1<<3)
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+#define BOOSTV_256 (1<<2)
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+#define BOOSTV_128 (1<<1)
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+#define BOOSTV_64 (1<<0)
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+
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+#define BOOST_LIM_500 (0b000)
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+#define BOOST_LIM_750 (0b001)
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+#define BOOST_LIM_1200 (0b010)
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+#define BOOST_LIM_1400 (0b011)
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+#define BOOST_LIM_1650 (0b100)
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+#define BOOST_LIM_1875 (0b101)
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+#define BOOST_LIM_2150 (0b110)
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+#define BOOST_LIM_RSVD (0b111)
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+
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+
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+typedef enum {
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+ VBusStatNo = 0b000,
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+ VBusStatUSB = 0b001,
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+ VBusStatExternal = 0b010,
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+ VBusStatOTG = 0b111,
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+} VBusStat;
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+
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+typedef enum {
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+ ChrgStatNo = 0b00,
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+ ChrgStatPre = 0b01,
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+ ChrgStatFast = 0b10,
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+ ChrgStatDone = 0b11,
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+} ChrgStat;
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+
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+typedef struct {
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+ bool VSYS_STAT:1; // VSYS Regulation Status
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+ bool RES:1; // Reserved: Always reads 1
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+ bool PG_STAT:1; // Power Good Status
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+ ChrgStat CHRG_STAT:2; // Charging Status
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+ VBusStat VBUS_STAT:3; // VBUS Status register
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+} REG0B;
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+
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+typedef enum {
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+ ChrgFaultNO = 0b00,
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+ ChrgFaultIN = 0b01,
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+ ChrgFaultTH = 0b10,
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+ ChrgFaultTIM = 0b11,
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+} ChrgFault;
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+
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+typedef enum {
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+ NtcFaultNo = 0b000,
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+ NtcFaultWarm = 0b010,
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+ NtcFaultCool = 0b011,
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+ NtcFaultCold = 0b101,
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+ NtcFaultHot = 0b110,
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+} NtcFault;
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+
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+typedef struct {
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+ NtcFault NTC_FAULT:3; // NTC Fault Status
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+ bool BAT_FAULT:1; // Battery Fault Status
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+ ChrgFault CHRG_FAULT:2; // Charge Fault Status
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+ bool BOOST_FAULT:1; // Boost Mode Fault Status
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+ bool WATCHDOG_FAULT:1; // Watchdog Fault Status
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+} REG0C;
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+
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+typedef struct {
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+ uint8_t VINDPM:7; // Absolute VINDPM Threshold, offset: +2600mV
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+ bool FORCE_VINDPM:1; // VINDPM Threshold Setting Method
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+} REG0D;
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+
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+#define VINDPM_6400 (1<<6)
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+#define VINDPM_3200 (1<<5)
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+#define VINDPM_1600 (1<<4)
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+#define VINDPM_800 (1<<3)
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+#define VINDPM_400 (1<<2)
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+#define VINDPM_200 (1<<1)
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+#define VINDPM_100 (1<<0)
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+
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+typedef struct {
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+ uint8_t BATV:7; // ADC conversion of Battery Voltage (VBAT), offset: +2304mV
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+ bool THERM_STAT:1; // Thermal Regulation Status
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+} REG0E;
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+
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+typedef struct {
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+ uint8_t SYSV:7; // ADDC conversion of System Voltage (VSYS), offset: +2304mV
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+ uint8_t RES:1; // Reserved: Always reads 0
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+} REG0F;
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+
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+typedef struct {
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+ uint8_t TSPCT:7; // ADC conversion of TS Voltage (TS) as percentage of REGN, offset: +21%
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+ uint8_t RES:1; // Reserved: Always reads 0
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+} REG10;
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+
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+typedef struct {
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+ uint8_t VBUSV:7; // ADC conversion of VBUS voltage (VBUS), offset: +2600mV
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+ bool VBUS_GD:1; // VBUS Good Status
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+} REG11;
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+
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+typedef struct {
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+ uint8_t ICHGR:7; // ADC conversion of Charge Current (IBAT) when VBAT > VBATSHORT
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+ uint8_t RES:1; // Reserved: Always reads 0
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+} REG12;
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+
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+typedef struct {
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+ uint8_t IDPM_LIM:6; // Input Current Limit in effect while Input Current Optimizer (ICO) is enabled, offset: 100mA (default)
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+ bool IDPM_STAT:1; // IINDPM Status
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+ bool VDPM_STAT:1; // VINDPM Status
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+} REG13;
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+
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+typedef struct {
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+ uint8_t DEV_REV:2; // Device Revision
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+ bool TS_PROFILE:1; // Temperature Profile
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+ uint8_t PN:3; // Device Configuration
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+ bool ICO_OPTIMIZED:1; // Input Current Optimizer (ICO) Status
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+ bool REG_RST:1; // Register Reset
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+} REG14;
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