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@@ -75,7 +75,10 @@ void furi_hal_clock_init() {
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LL_EXTI_LINE_18); /* Why? Because that's why. See RM0434, Table 61. CPU1 vector table. */
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LL_EXTI_EnableRisingTrig_0_31(LL_EXTI_LINE_18);
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LL_RCC_EnableIT_LSECSS();
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- LL_RCC_LSE_EnableCSS();
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+ /* ES0394, extended case of 2.2.2 */
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+ if(!LL_RCC_IsActiveFlag_BORRST()) {
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+ LL_RCC_LSE_EnableCSS();
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+ }
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_2, 8, LL_RCC_PLLR_DIV_2);
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