upd airmouse

README.md

@@ -1,4 +1,7 @@
-# Flipper Air Mouse
+[!["Buy Me A Coffee"](https://www.buymeacoffee.com/assets/img/custom_images/orange_img.png)](https://www.buymeacoffee.com/ginkage)
+[![paypal](https://www.paypalobjects.com/en_GB/i/btn/btn_donate_LG.gif)](https://www.paypal.com/cgi-bin/webscr?cmd=_s-xclick&hosted_button_id=LF9S5WAF6E4VA)
+
+# BMI Air Mouse
 
 ## Brief
 
@@ -24,10 +27,24 @@ Using it is really simple:
 
 See early prototype [in action](https://www.youtube.com/watch?v=DdxAmmsYfMA).
 
+## How?
+
+ * Clone this repository with `git clone --recurse-submodules` to include the driver implementations.
+ * Build the project using `ufbt`
+
 ## Hardware
 
 The custom module is using Bosch BMI160 accelerometer/gyroscope chip connected via I2C.
 
+Note: in fact, some other IMU chips are also supported.
+It's detected via the first found I2C Address.
+
+|   Chip   | Expected I2C Address |
+|:--------:|:--------------------:|
+|  BMI160  |         0x69         |
+| LSM6DS3  |         0x6A         |
+| LSM6DSO  |         0x6B         |
+
 Take a look into the [schematic](https://github.com/ginkage/FlippAirMouse/tree/main/schematic) folder for Gerber, BOM and CPL files, so you can order directly from JLCPCB.
 
 Original idea:
@@ -46,15 +63,6 @@ Reality:
 
 The code is based on the original Bosch [driver](https://github.com/BoschSensortec/BMI160_driver/) and an orientation tracking implementation from the Google [Cardboard](https://github.com/googlevr/cardboard/tree/master/sdk/sensors) project
 
-If you're familiar with Flipper applications, start in the [firmware](https://github.com/flipperdevices/flipperzero-firmware) checkout folder and do the following:
-```
-cd applications/plugins
-git clone https://github.com/ginkage/FlippAirMouse
-cd ../..
-./fbt fap_air_mouse
-```
-If you're not familiar with those, just grab a `fap` file from Releases.
-
 ## License
 
 TL;DR: Use the code however you want, give credit where it's due, no warranty of any kind is provided.

air_mouse.c

@@ -91,7 +91,7 @@ AirMouse* air_mouse_app_alloc() {
     view_dispatcher_add_view(
         app->view_dispatcher, AirMouseViewSubmenu, submenu_get_view(app->submenu));
 
-    // Dialog view
+    // Dialog views
     app->dialog = dialog_ex_alloc();
     dialog_ex_set_result_callback(app->dialog, air_mouse_dialog_callback);
     dialog_ex_set_context(app->dialog, app);
@@ -102,6 +102,14 @@ AirMouse* air_mouse_app_alloc() {
     view_dispatcher_add_view(
         app->view_dispatcher, AirMouseViewExitConfirm, dialog_ex_get_view(app->dialog));
 
+    app->error_dialog = dialog_ex_alloc();
+    dialog_ex_set_header(app->error_dialog, "Failed to init IMU", 63, 0, AlignCenter, AlignTop);
+    dialog_ex_set_text(
+        app->error_dialog, "Please connect sensor module", 63, 30, AlignCenter, AlignTop);
+    view_set_previous_callback(dialog_ex_get_view(app->error_dialog), air_mouse_exit);
+    view_dispatcher_add_view(
+        app->view_dispatcher, AirMouseViewError, dialog_ex_get_view(app->error_dialog));
+
     // Bluetooth view
     app->bt_mouse = bt_mouse_alloc(app->view_dispatcher);
     view_set_previous_callback(bt_mouse_get_view(app->bt_mouse), air_mouse_exit_confirm_view);
@@ -135,6 +143,8 @@ void air_mouse_app_free(AirMouse* app) {
     submenu_free(app->submenu);
     view_dispatcher_remove_view(app->view_dispatcher, AirMouseViewExitConfirm);
     dialog_ex_free(app->dialog);
+    view_dispatcher_remove_view(app->view_dispatcher, AirMouseViewError);
+    dialog_ex_free(app->error_dialog);
     view_dispatcher_remove_view(app->view_dispatcher, AirMouseViewBtMouse);
     bt_mouse_free(app->bt_mouse);
     view_dispatcher_remove_view(app->view_dispatcher, AirMouseViewUsbMouse);
@@ -156,8 +166,7 @@ int32_t air_mouse_app(void* p) {
 
     AirMouse* app = air_mouse_app_alloc();
     if(!imu_begin()) {
-        air_mouse_app_free(app);
-        return -1;
+        view_dispatcher_switch_to_view(app->view_dispatcher, AirMouseViewError);
     }
 
     view_dispatcher_run(app->view_dispatcher);

air_mouse.h

@@ -15,6 +15,7 @@ typedef struct {
     ViewDispatcher* view_dispatcher;
     Submenu* submenu;
     DialogEx* dialog;
+    DialogEx* error_dialog;
     BtMouse* bt_mouse;
     UsbMouse* usb_mouse;
     Calibration* calibration;
@@ -27,4 +28,5 @@ typedef enum {
     AirMouseViewUsbMouse,
     AirMouseViewCalibration,
     AirMouseViewExitConfirm,
+    AirMouseViewError,
 } AirMouseView;

application.fam

@@ -1,12 +1,31 @@
 App(
     appid="air_mouse",
-    name="[BMI160] Air Mouse",
+    name="[BMI/LSM] Air Mouse",
     apptype=FlipperAppType.EXTERNAL,
     entry_point="air_mouse_app",
     stack_size=10 * 1024,
     fap_category="GPIO",
     fap_icon="mouse_10px.png",
-    fap_version="1.1",
+    fap_version="1.2",
     fap_libs=["ble_profile"],
     sources=["*.c", "*.cc"],
+    fap_private_libs=[
+        Lib(
+            name="bmi160-api",
+            cflags=["-Wno-error"],
+            sources=[
+                "bmi160.c",
+                "bmi160.h",
+                "bmi160_defs.h",
+            ],
+        ),
+        Lib(
+            name="lsm6ds3tr-api",
+            cflags=["-Wno-error"],
+        ),
+        Lib(
+            name="lsm6dso-api",
+            cflags=["-Wno-error"],
+        ),
+    ],
 )

lib/bmi160-api/LICENSE

@@ -0,0 +1,30 @@
+Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
+
+BSD-3-Clause
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its
+    contributors may be used to endorse or promote products derived from
+    this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.

lib/bmi160-api/README.md

@@ -0,0 +1,42 @@
+# BMI160 Sensor API
+
+### Sensor overview
+
+The small, low power BMI160 is a low noise 16-bit IMU designed for mobile applications such as AR or indoor navigation, providing highly accurate sensor data and real-time sensor data. The low current consumption of BMI160 enables always-on applications in battery-driven devices. This sensor features a configurable on-chip interrupt engine which provides motion-based gesture recognition and context awareness as always-on background functions.
+
+### Target Application
+- Augmented reality and immersive gaming
+- Indoor navigation
+- 3D-scanning / indoor mapping
+- Advanced gesture recognition
+- Immersive gaming
+- 9-axis motion detection
+- Air mouse applications and pointers
+- Pedometer / step counting
+- Advanced system power management for mobile applications
+- Optical image stabilization of camera modules
+- Free-fall detection and warranty logging
+
+### Features
+- Any-motion detection (accelerometer)
+- Significant motion detection (accelerometer)
+- Step detector (accelerometer)
+- Tap sensing (accelerometer)
+- Orientation recognition (accelerometer)
+- Flat detection (accelerometer)
+- Low-G / Free-fall detection (accelerometer)
+- High-G detection (accelerometer)
+- Slow-motion alert / No-motion interrupt (accelerometer)
+- Data ready detection (accelerometer, gyroscope and external sensors)
+- PMU trigger (gyroscope)
+- FIFO interrupts ((accelerometer, gyroscope and external sensors)
+
+### Important links
+
+- [BMI160 product page](https://www.bosch-sensortec.com/products/motion-sensors/imus/bmi160/)
+- [BMI160 datasheet](https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmi160-ds000.pdf)
+- [BMI160 shuttle board flyer](https://www.bosch-sensortec.com/media/boschsensortec/downloads/shuttle_board_flyer/bst-dhw-fl022.pdf)
+- [Community support page](https://community.bosch-sensortec.com)
+
+---
+#### Copyright (C) 2020 Bosch Sensortec GmbH

lib/bmi160-api/bmi160.c

@@ -0,0 +1,6428 @@
+/**
+* Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
+*
+* BSD-3-Clause
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*
+* 2. Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in the
+*    documentation and/or other materials provided with the distribution.
+*
+* 3. Neither the name of the copyright holder nor the names of its
+*    contributors may be used to endorse or promote products derived from
+*    this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+* @file       bmi160.c
+* @date       2021-10-05
+* @version    v3.9.2
+*
+*/
+
+#include "bmi160.h"
+
+/* Below look up table follows the enum bmi160_int_types.
+ * Hence any change should match to the enum bmi160_int_types
+ */
+const uint8_t int_mask_lookup_table[13] = {
+    BMI160_INT1_SLOPE_MASK, BMI160_INT1_SLOPE_MASK, BMI160_INT2_LOW_STEP_DETECT_MASK, BMI160_INT1_DOUBLE_TAP_MASK,
+    BMI160_INT1_SINGLE_TAP_MASK, BMI160_INT1_ORIENT_MASK, BMI160_INT1_FLAT_MASK, BMI160_INT1_HIGH_G_MASK,
+    BMI160_INT1_LOW_G_MASK, BMI160_INT1_NO_MOTION_MASK, BMI160_INT2_DATA_READY_MASK, BMI160_INT2_FIFO_FULL_MASK,
+    BMI160_INT2_FIFO_WM_MASK
+};
+
+/*********************************************************************/
+/* Static function declarations */
+
+/*!
+ * @brief This API configures the pins to fire the
+ * interrupt signal when it occurs
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_intr_pin_config(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the any-motion interrupt of the sensor.
+ * This interrupt occurs when accel values exceeds preset threshold
+ * for a certain period of time.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_any_motion_int(struct bmi160_int_settg *int_config, struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets tap interrupts.Interrupt is fired when
+ * tap movements happen.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_tap_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the data ready interrupt for both accel and gyro.
+ * This interrupt occurs when new accel and gyro data come.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_gyro_data_ready_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the significant motion interrupt of the sensor.This
+ * interrupt occurs when there is change in user location.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_sig_motion_int(struct bmi160_int_settg *int_config, struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the no motion/slow motion interrupt of the sensor.
+ * Slow motion is similar to any motion interrupt.No motion interrupt
+ * occurs when slope bet. two accel values falls below preset threshold
+ * for preset duration.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_no_motion_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the step detection interrupt.This interrupt
+ * occurs when the single step causes accel values to go above
+ * preset threshold.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_step_detect_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the orientation interrupt of the sensor.This
+ * interrupt occurs when there is orientation change in the sensor
+ * with respect to gravitational field vector g.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_orientation_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the flat interrupt of the sensor.This interrupt
+ * occurs in case of flat orientation
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_flat_detect_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the low-g interrupt of the sensor.This interrupt
+ * occurs during free-fall.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_low_g_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the high-g interrupt of the sensor.The interrupt
+ * occurs if the absolute value of acceleration data of any enabled axis
+ * exceeds the programmed threshold and the sign of the value does not
+ * change for a preset duration.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_high_g_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the default configuration parameters of accel & gyro.
+ * Also maintain the previous state of configurations.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static void default_param_settg(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API is used to validate the device structure pointer for
+ * null conditions.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t null_ptr_check(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API set the accel configuration.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_conf(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API gets the accel configuration.
+ *
+ * @param[out] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t get_accel_conf(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API check the accel configuration.
+ *
+ * @param[in] data        : Pointer to store the updated accel config.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t check_accel_config(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the accel odr.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_accel_odr(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the accel bandwidth.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_accel_bw(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the accel range.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_accel_range(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API checks the invalid settings for ODR & Bw for Accel and Gyro.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t check_invalid_settg(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API set the gyro configuration.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_gyro_conf(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API get the gyro configuration.
+ *
+ * @param[out] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t get_gyro_conf(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API check the gyro configuration.
+ *
+ * @param[in] data        : Pointer to store the updated gyro config.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t check_gyro_config(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the gyro odr.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_gyro_odr(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the gyro bandwidth.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_gyro_bw(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the gyro range.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_gyro_range(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the accel power mode.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_accel_pwr(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API process the undersampling setting of Accel.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t process_under_sampling(uint8_t *data, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API sets the gyro power mode.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error.
+ */
+static int8_t set_gyro_pwr(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API reads accel data along with sensor time if time is requested
+ * by user. Kindly refer the user guide(README.md) for more info.
+ *
+ * @param[in] len    : len to read no of bytes
+ * @param[out] accel    : Structure pointer to store accel data
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t get_accel_data(uint8_t len, struct bmi160_sensor_data *accel, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API reads accel data along with sensor time if time is requested
+ * by user. Kindly refer the user guide(README.md) for more info.
+ *
+ * @param[in] len    : len to read no of bytes
+ * @param[out] gyro    : Structure pointer to store accel data
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t get_gyro_data(uint8_t len, struct bmi160_sensor_data *gyro, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API reads accel and gyro data along with sensor time
+ * if time is requested by user.
+ * Kindly refer the user guide(README.md) for more info.
+ *
+ * @param[in] len    : len to read no of bytes
+ * @param[out] accel    : Structure pointer to store accel data
+ * @param[out] gyro    : Structure pointer to store accel data
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t get_accel_gyro_data(uint8_t len,
+                                  struct bmi160_sensor_data *accel,
+                                  struct bmi160_sensor_data *gyro,
+                                  const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the any-motion interrupt for accel.
+ *
+ * @param[in] any_motion_int_cfg   : Structure instance of
+ *                   bmi160_acc_any_mot_int_cfg.
+ * @param[in] dev          : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_accel_any_motion_int(const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                          struct bmi160_dev *dev);
+
+/*!
+ * @brief This API disable the sig-motion interrupt.
+ *
+ * @param[in] dev   : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t disable_sig_motion_int(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for any-motion interrupt.
+ *
+ * @param[in] any_motion_int_cfg  : Structure instance of
+ *                  bmi160_acc_any_mot_int_cfg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_any_motion_src(const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                    const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the duration and threshold of
+ * any-motion interrupt.
+ *
+ * @param[in] any_motion_int_cfg  : Structure instance of
+ *                  bmi160_acc_any_mot_int_cfg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_any_dur_threshold(const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                       const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure necessary setting of any-motion interrupt.
+ *
+ * @param[in] int_config       : Structure instance of bmi160_int_settg.
+ * @param[in] any_motion_int_cfg   : Structure instance of
+ *                   bmi160_acc_any_mot_int_cfg.
+ * @param[in] dev          : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_any_motion_int_settg(const struct bmi160_int_settg *int_config,
+                                          const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                          const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enable the data ready interrupt.
+ *
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_data_ready_int(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the no motion/slow motion interrupt.
+ *
+ * @param[in] no_mot_int_cfg    : Structure instance of
+ *                bmi160_acc_no_motion_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_no_motion_int(const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                   const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the interrupt PIN setting for
+ * no motion/slow motion interrupt.
+ *
+ * @param[in] int_config    : structure instance of bmi160_int_settg.
+ * @param[in] no_mot_int_cfg    : Structure instance of
+ *                bmi160_acc_no_motion_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_no_motion_int_settg(const struct bmi160_int_settg *int_config,
+                                         const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                         const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the source of interrupt for no motion.
+ *
+ * @param[in] no_mot_int_cfg    : Structure instance of
+ *                bmi160_acc_no_motion_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_no_motion_data_src(const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                        const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the duration and threshold of
+ * no motion/slow motion interrupt along with selection of no/slow motion.
+ *
+ * @param[in] no_mot_int_cfg    : Structure instance of
+ *                bmi160_acc_no_motion_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_no_motion_dur_thr(const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                       const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the sig-motion motion interrupt.
+ *
+ * @param[in] sig_mot_int_cfg   : Structure instance of
+ *                bmi160_acc_sig_mot_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_sig_motion_int(const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg, struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the interrupt PIN setting for
+ * significant motion interrupt.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] sig_mot_int_cfg   : Structure instance of
+ *                bmi160_acc_sig_mot_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_sig_motion_int_settg(const struct bmi160_int_settg *int_config,
+                                          const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg,
+                                          const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for sig motion interrupt.
+ *
+ * @param[in] sig_mot_int_cfg   : Structure instance of
+ *                bmi160_acc_sig_mot_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_sig_motion_data_src(const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg,
+                                         const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the threshold, skip and proof time of
+ * sig motion interrupt.
+ *
+ * @param[in] sig_mot_int_cfg   : Structure instance of
+ *                bmi160_acc_sig_mot_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_sig_dur_threshold(const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg,
+                                       const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the step detector interrupt.
+ *
+ * @param[in] step_detect_int_cfg   : Structure instance of
+ *                    bmi160_acc_step_detect_int_cfg.
+ * @param[in] dev           : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_step_detect_int(const struct bmi160_acc_step_detect_int_cfg *step_detect_int_cfg,
+                                     const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the step detector parameter.
+ *
+ * @param[in] step_detect_int_cfg   : Structure instance of
+ *                    bmi160_acc_step_detect_int_cfg.
+ * @param[in] dev           : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_step_detect(const struct bmi160_acc_step_detect_int_cfg *step_detect_int_cfg,
+                                 const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the single/double tap interrupt.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_tap_int(const struct bmi160_int_settg *int_config,
+                             const struct bmi160_acc_tap_int_cfg *tap_int_cfg,
+                             const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the interrupt PIN setting for
+ * tap interrupt.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] tap_int_cfg   : Structure instance of bmi160_acc_tap_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_tap_int_settg(const struct bmi160_int_settg *int_config,
+                                   const struct bmi160_acc_tap_int_cfg *tap_int_cfg,
+                                   const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for tap interrupt.
+ *
+ * @param[in] tap_int_cfg   : Structure instance of bmi160_acc_tap_int_cfg.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_tap_data_src(const struct bmi160_acc_tap_int_cfg *tap_int_cfg, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the  parameters of tap interrupt.
+ * Threshold, quite, shock, and duration.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] tap_int_cfg   : Structure instance of bmi160_acc_tap_int_cfg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_tap_param(const struct bmi160_int_settg *int_config,
+                               const struct bmi160_acc_tap_int_cfg *tap_int_cfg,
+                               const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enable the external mode configuration.
+ *
+ * @param[in] dev   : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_sec_if(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the ODR of the auxiliary sensor.
+ *
+ * @param[in] dev   : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_aux_odr(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API maps the actual burst read length set by user.
+ *
+ * @param[in] len   : Pointer to store the read length.
+ * @param[in] dev   : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t map_read_len(uint16_t *len, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the settings of auxiliary sensor.
+ *
+ * @param[in] dev   : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_aux_settg(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API extract the read data from auxiliary sensor.
+ *
+ * @param[in] map_len     : burst read value.
+ * @param[in] reg_addr    : Address of register to read.
+ * @param[in] aux_data    : Pointer to store the read data.
+ * @param[in] len     : length to read the data.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success / -ve value -> Error
+ */
+static int8_t extract_aux_read(uint16_t map_len,
+                               uint8_t reg_addr,
+                               uint8_t *aux_data,
+                               uint16_t len,
+                               const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the orient interrupt.
+ *
+ * @param[in] orient_int_cfg : Structure instance of bmi160_acc_orient_int_cfg.
+ * @param[in] dev        : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_orient_int(const struct bmi160_acc_orient_int_cfg *orient_int_cfg, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the necessary setting of orientation interrupt.
+ *
+ * @param[in] orient_int_cfg : Structure instance of bmi160_acc_orient_int_cfg.
+ * @param[in] dev        : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_orient_int_settg(const struct bmi160_acc_orient_int_cfg *orient_int_cfg,
+                                      const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the flat interrupt.
+ *
+ * @param[in] flat_int  : Structure instance of bmi160_acc_flat_detect_int_cfg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_flat_int(const struct bmi160_acc_flat_detect_int_cfg *flat_int, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the necessary setting of flat interrupt.
+ *
+ * @param[in] flat_int  : Structure instance of bmi160_acc_flat_detect_int_cfg.
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_flat_int_settg(const struct bmi160_acc_flat_detect_int_cfg *flat_int,
+                                    const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the Low-g interrupt.
+ *
+ * @param[in] low_g_int : Structure instance of bmi160_acc_low_g_int_cfg.
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_low_g_int(const struct bmi160_acc_low_g_int_cfg *low_g_int, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter) for low-g interrupt.
+ *
+ * @param[in] low_g_int : Structure instance of bmi160_acc_low_g_int_cfg.
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_low_g_data_src(const struct bmi160_acc_low_g_int_cfg *low_g_int, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the necessary setting of low-g interrupt.
+ *
+ * @param[in] low_g_int : Structure instance of bmi160_acc_low_g_int_cfg.
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_low_g_int_settg(const struct bmi160_acc_low_g_int_cfg *low_g_int, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the high-g interrupt.
+ *
+ * @param[in] high_g_int_cfg : Structure instance of bmi160_acc_high_g_int_cfg.
+ * @param[in] dev        : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_high_g_int(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for high-g interrupt.
+ *
+ * @param[in] high_g_int_cfg : Structure instance of bmi160_acc_high_g_int_cfg.
+ * @param[in] dev        : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_high_g_data_src(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg,
+                                     const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the necessary setting of high-g interrupt.
+ *
+ * @param[in] high_g_int_cfg : Structure instance of bmi160_acc_high_g_int_cfg.
+ * @param[in] dev        : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_high_g_int_settg(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg,
+                                      const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the behavioural setting of interrupt pin.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_int_out_ctrl(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API configure the mode(input enable, latch or non-latch) of interrupt pin.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t config_int_latch(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API performs the self test for accelerometer of BMI160
+ *
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t perform_accel_self_test(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables to perform the accel self test by setting proper
+ * configurations to facilitate accel self test
+ *
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_accel_self_test(struct bmi160_dev *dev);
+
+/*!
+ * @brief This API performs accel self test with positive excitation
+ *
+ * @param[in] accel_pos : Structure pointer to store accel data
+ *                        for positive excitation
+ * @param[in] dev   : structure instance of bmi160_dev
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t accel_self_test_positive_excitation(struct bmi160_sensor_data *accel_pos, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API performs accel self test with negative excitation
+ *
+ * @param[in] accel_neg : Structure pointer to store accel data
+ *                        for negative excitation
+ * @param[in] dev   : structure instance of bmi160_dev
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t accel_self_test_negative_excitation(struct bmi160_sensor_data *accel_neg, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API validates the accel self test results
+ *
+ * @param[in] accel_pos : Structure pointer to store accel data
+ *                        for positive excitation
+ * @param[in] accel_neg : Structure pointer to store accel data
+ *                        for negative excitation
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error / +ve value -> Self test fail
+ */
+static int8_t validate_accel_self_test(const struct bmi160_sensor_data *accel_pos,
+                                       const struct bmi160_sensor_data *accel_neg);
+
+/*!
+ * @brief This API performs the self test for gyroscope of BMI160
+ *
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t perform_gyro_self_test(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API enables the self test bit to trigger self test for gyro
+ *
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_gyro_self_test(const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API validates the self test results of gyro
+ *
+ * @param[in] dev   : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t validate_gyro_self_test(const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API sets FIFO full interrupt of the sensor.This interrupt
+ *  occurs when the FIFO is full and the next full data sample would cause
+ *  a FIFO overflow, which may delete the old samples.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t set_fifo_full_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This enable the FIFO full interrupt engine.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_fifo_full_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API sets FIFO watermark interrupt of the sensor.The FIFO
+ *  watermark interrupt is fired, when the FIFO fill level is above a fifo
+ *  watermark.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t set_fifo_watermark_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This enable the FIFO watermark interrupt engine.
+ *
+ * @param[in] int_config    : Structure instance of bmi160_int_settg.
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t enable_fifo_wtm_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ * @brief This API is used to reset the FIFO related configurations
+ *  in the fifo_frame structure.
+ *
+ * @param[in] dev       : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static void reset_fifo_data_structure(const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to read number of bytes filled
+ *  currently in FIFO buffer.
+ *
+ *  @param[in] bytes_to_read  : Number of bytes available in FIFO at the
+ *                              instant which is obtained from FIFO counter.
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success / -ve value -> Error.
+ *  @retval Any non zero value -> Fail
+ *
+ */
+static int8_t get_fifo_byte_counter(uint16_t *bytes_to_read, struct bmi160_dev const *dev);
+
+/*!
+ *  @brief This API is used to compute the number of bytes of accel FIFO data
+ *  which is to be parsed in header-less mode
+ *
+ *  @param[out] data_index        : The start index for parsing data
+ *  @param[out] data_read_length  : Number of bytes to be parsed
+ *  @param[in]  acc_frame_count   : Number of accelerometer frames to be read
+ *  @param[in]  dev               : Structure instance of bmi160_dev.
+ *
+ */
+static void get_accel_len_to_parse(uint16_t *data_index,
+                                   uint16_t *data_read_length,
+                                   const uint8_t *acc_frame_count,
+                                   const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the accelerometer data from the
+ *  FIFO data in both header mode and header-less mode.
+ *  It updates the idx value which is used to store the index of
+ *  the current data byte which is parsed.
+ *
+ *  @param[in,out] acc      : structure instance of sensor data
+ *  @param[in,out] idx      : Index value of number of bytes parsed
+ *  @param[in,out] acc_idx  : Index value of accelerometer data
+ *                                (x,y,z axes) frames parsed
+ *  @param[in] frame_info       : It consists of either fifo_data_enable
+ *                                parameter in header-less mode or
+ *                                frame header data in header mode
+ *  @param[in] dev      : structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_accel_frame(struct bmi160_sensor_data *acc,
+                               uint16_t *idx,
+                               uint8_t *acc_idx,
+                               uint8_t frame_info,
+                               const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the accelerometer data from the
+ *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
+ *
+ * @param[in,out] accel_data        : structure instance of sensor data
+ * @param[in,out] data_start_index  : Index value of number of bytes parsed
+ * @param[in] dev           : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_accel_data(struct bmi160_sensor_data *accel_data,
+                              uint16_t data_start_index,
+                              const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the accelerometer data from the
+ *  FIFO data in header mode.
+ *
+ *  @param[in,out] accel_data    : Structure instance of sensor data
+ *  @param[in,out] accel_length  : Number of accelerometer frames
+ *  @param[in] dev               : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void extract_accel_header_mode(struct bmi160_sensor_data *accel_data,
+                                      uint8_t *accel_length,
+                                      const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API computes the number of bytes of gyro FIFO data
+ *  which is to be parsed in header-less mode
+ *
+ *  @param[out] data_index       : The start index for parsing data
+ *  @param[out] data_read_length : No of bytes to be parsed from FIFO buffer
+ *  @param[in] gyro_frame_count  : Number of Gyro data frames to be read
+ *  @param[in] dev               : Structure instance of bmi160_dev.
+ */
+static void get_gyro_len_to_parse(uint16_t *data_index,
+                                  uint16_t *data_read_length,
+                                  const uint8_t *gyro_frame_count,
+                                  const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the gyroscope's data from the
+ *  FIFO data in both header mode and header-less mode.
+ *  It updates the idx value which is used to store the index of
+ *  the current data byte which is parsed.
+ *
+ *  @param[in,out] gyro     : structure instance of sensor data
+ *  @param[in,out] idx      : Index value of number of bytes parsed
+ *  @param[in,out] gyro_idx : Index value of gyro data
+ *                                (x,y,z axes) frames parsed
+ *  @param[in] frame_info       : It consists of either fifo_data_enable
+ *                                parameter in header-less mode or
+ *                                frame header data in header mode
+ *  @param[in] dev      : structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_gyro_frame(struct bmi160_sensor_data *gyro,
+                              uint16_t *idx,
+                              uint8_t *gyro_idx,
+                              uint8_t frame_info,
+                              const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the gyro data from the
+ *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
+ *
+ *  @param[in,out] gyro_data         : structure instance of sensor data
+ *  @param[in,out] data_start_index  : Index value of number of bytes parsed
+ *  @param[in] dev           : structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_gyro_data(struct bmi160_sensor_data *gyro_data,
+                             uint16_t data_start_index,
+                             const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the gyro data from the
+ *  FIFO data in header mode.
+ *
+ *  @param[in,out] gyro_data     : Structure instance of sensor data
+ *  @param[in,out] gyro_length   : Number of gyro frames
+ *  @param[in] dev               : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void extract_gyro_header_mode(struct bmi160_sensor_data *gyro_data,
+                                     uint8_t *gyro_length,
+                                     const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API computes the number of bytes of aux FIFO data
+ *  which is to be parsed in header-less mode
+ *
+ *  @param[out] data_index       : The start index for parsing data
+ *  @param[out] data_read_length : No of bytes to be parsed from FIFO buffer
+ *  @param[in] aux_frame_count   : Number of Aux data frames to be read
+ *  @param[in] dev               : Structure instance of bmi160_dev.
+ */
+static void get_aux_len_to_parse(uint16_t *data_index,
+                                 uint16_t *data_read_length,
+                                 const uint8_t *aux_frame_count,
+                                 const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the aux's data from the
+ *  FIFO data in both header mode and header-less mode.
+ *  It updates the idx value which is used to store the index of
+ *  the current data byte which is parsed
+ *
+ *  @param[in,out] aux_data : structure instance of sensor data
+ *  @param[in,out] idx      : Index value of number of bytes parsed
+ *  @param[in,out] aux_index    : Index value of gyro data
+ *                                (x,y,z axes) frames parsed
+ *  @param[in] frame_info       : It consists of either fifo_data_enable
+ *                                parameter in header-less mode or
+ *                                frame header data in header mode
+ *  @param[in] dev      : structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_aux_frame(struct bmi160_aux_data *aux_data,
+                             uint16_t *idx,
+                             uint8_t *aux_index,
+                             uint8_t frame_info,
+                             const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the aux data from the
+ *  FIFO data and store it in the instance of the structure bmi160_aux_data.
+ *
+ * @param[in,out] aux_data      : structure instance of sensor data
+ * @param[in,out] data_start_index  : Index value of number of bytes parsed
+ * @param[in] dev           : structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_aux_data(struct bmi160_aux_data *aux_data, uint16_t data_start_index, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse the aux data from the
+ *  FIFO data in header mode.
+ *
+ *  @param[in,out] aux_data     : Structure instance of sensor data
+ *  @param[in,out] aux_length   : Number of aux frames
+ *  @param[in] dev              : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void extract_aux_header_mode(struct bmi160_aux_data *aux_data, uint8_t *aux_length,
+                                    const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API checks the presence of non-valid frames in the read fifo data.
+ *
+ *  @param[in,out] data_index    : The index of the current data to
+ *                                be parsed from fifo data
+ *  @param[in] dev               : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void check_frame_validity(uint16_t *data_index, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to move the data index ahead of the
+ *  current_frame_length parameter when unnecessary FIFO data appears while
+ *  extracting the user specified data.
+ *
+ *  @param[in,out] data_index       : Index of the FIFO data which
+ *                                  is to be moved ahead of the
+ *                                  current_frame_length
+ *  @param[in] current_frame_length : Number of bytes in a particular frame
+ *  @param[in] dev                  : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void move_next_frame(uint16_t *data_index, uint8_t current_frame_length, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse and store the sensor time from the
+ *  FIFO data in the structure instance dev.
+ *
+ *  @param[in,out] data_index : Index of the FIFO data which
+ *                              has the sensor time.
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_sensortime_frame(uint16_t *data_index, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to parse and store the skipped_frame_count from
+ *  the FIFO data in the structure instance dev.
+ *
+ *  @param[in,out] data_index   : Index of the FIFO data which
+ *                                    has the skipped frame count.
+ *  @param[in] dev              : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static void unpack_skipped_frame(uint16_t *data_index, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to get the FOC status from the sensor
+ *
+ *  @param[in,out] foc_status   : Result of FOC status.
+ *  @param[in] dev              : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t get_foc_status(uint8_t *foc_status, struct bmi160_dev const *dev);
+
+/*!
+ *  @brief This API is used to configure the offset enable bits in the sensor
+ *
+ *  @param[in,out] foc_conf   : Structure instance of bmi160_foc_conf which
+ *                                   has the FOC and offset configurations
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t configure_offset_enable(const struct bmi160_foc_conf *foc_conf, struct bmi160_dev const *dev);
+
+/*!
+ *  @brief This API is used to trigger the FOC in the sensor
+ *
+ *  @param[in,out] offset     : Structure instance of bmi160_offsets which
+ *                              reads and stores the offset values after FOC
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t trigger_foc(struct bmi160_offsets *offset, struct bmi160_dev const *dev);
+
+/*!
+ *  @brief This API is used to map/unmap the Dataready(Accel & Gyro), FIFO full
+ *  and FIFO watermark interrupt
+ *
+ *  @param[in] int_config     : Structure instance of bmi160_int_settg which
+ *                              stores the interrupt type and interrupt channel
+ *              configurations to map/unmap the interrupt pins
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t map_hardware_interrupt(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*!
+ *  @brief This API is used to map/unmap the Any/Sig motion, Step det/Low-g,
+ *  Double tap, Single tap, Orientation, Flat, High-G, Nomotion interrupt pins.
+ *
+ *  @param[in] int_config     : Structure instance of bmi160_int_settg which
+ *                              stores the interrupt type and interrupt channel
+ *              configurations to map/unmap the interrupt pins
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval zero -> Success  / -ve value -> Error
+ */
+static int8_t map_feature_interrupt(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev);
+
+/*********************** User function definitions ****************************/
+
+/*!
+ * @brief This API reads the data from the given register address
+ * of sensor.
+ */
+int8_t bmi160_get_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->read == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else if (len == 0)
+    {
+        rslt = BMI160_E_READ_WRITE_LENGTH_INVALID;
+    }
+    else
+    {
+        /* Configuring reg_addr for SPI Interface */
+        if (dev->intf == BMI160_SPI_INTF)
+        {
+            reg_addr = (reg_addr | BMI160_SPI_RD_MASK);
+        }
+
+        rslt = dev->read(dev->id, reg_addr, data, len);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API writes the given data to the register address
+ * of sensor.
+ */
+int8_t bmi160_set_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+    uint8_t count = 0;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->write == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else if (len == 0)
+    {
+        rslt = BMI160_E_READ_WRITE_LENGTH_INVALID;
+    }
+    else
+    {
+        /* Configuring reg_addr for SPI Interface */
+        if (dev->intf == BMI160_SPI_INTF)
+        {
+            reg_addr = (reg_addr & BMI160_SPI_WR_MASK);
+        }
+
+        if ((dev->prev_accel_cfg.power == BMI160_ACCEL_NORMAL_MODE) ||
+            (dev->prev_gyro_cfg.power == BMI160_GYRO_NORMAL_MODE))
+        {
+            rslt = dev->write(dev->id, reg_addr, data, len);
+
+            /* Kindly refer bmi160 data sheet section 3.2.4 */
+            dev->delay_ms(1);
+
+        }
+        else
+        {
+            /*Burst write is not allowed in
+             * suspend & low power mode */
+            for (; count < len; count++)
+            {
+                rslt = dev->write(dev->id, reg_addr, &data[count], 1);
+                reg_addr++;
+
+                /* Kindly refer bmi160 data sheet section 3.2.4 */
+                dev->delay_ms(1);
+
+            }
+        }
+
+        if (rslt != BMI160_OK)
+        {
+            rslt = BMI160_E_COM_FAIL;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API is the entry point for sensor.It performs
+ *  the selection of I2C/SPI read mechanism according to the
+ *  selected interface and reads the chip-id of bmi160 sensor.
+ */
+int8_t bmi160_init(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data;
+    uint8_t try = 3;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+
+    /* Dummy read of 0x7F register to enable SPI Interface
+     * if SPI is used */
+    if ((rslt == BMI160_OK) && (dev->intf == BMI160_SPI_INTF))
+    {
+        rslt = bmi160_get_regs(BMI160_SPI_COMM_TEST_ADDR, &data, 1, dev);
+    }
+
+    if (rslt == BMI160_OK)
+    {
+        /* Assign chip id as zero */
+        dev->chip_id = 0;
+
+        while ((try--) && (dev->chip_id != BMI160_CHIP_ID))
+        {
+            /* Read chip_id */
+            rslt = bmi160_get_regs(BMI160_CHIP_ID_ADDR, &dev->chip_id, 1, dev);
+        }
+
+        if ((rslt == BMI160_OK) && (dev->chip_id == BMI160_CHIP_ID))
+        {
+            dev->any_sig_sel = BMI160_BOTH_ANY_SIG_MOTION_DISABLED;
+
+            /* Soft reset */
+            rslt = bmi160_soft_reset(dev);
+        }
+        else
+        {
+            rslt = BMI160_E_DEV_NOT_FOUND;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API resets and restarts the device.
+ * All register values are overwritten with default parameters.
+ */
+int8_t bmi160_soft_reset(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = BMI160_SOFT_RESET_CMD;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Reset the device */
+        rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &data, 1, dev);
+        dev->delay_ms(BMI160_SOFT_RESET_DELAY_MS);
+        if ((rslt == BMI160_OK) && (dev->intf == BMI160_SPI_INTF))
+        {
+            /* Dummy read of 0x7F register to enable SPI Interface
+             * if SPI is used */
+            rslt = bmi160_get_regs(BMI160_SPI_COMM_TEST_ADDR, &data, 1, dev);
+        }
+
+        if (rslt == BMI160_OK)
+        {
+            /* Update the default parameters */
+            default_param_settg(dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configures the power mode, range and bandwidth
+ * of sensor.
+ */
+int8_t bmi160_set_sens_conf(struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = set_accel_conf(dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = set_gyro_conf(dev);
+            if (rslt == BMI160_OK)
+            {
+                /* write power mode for accel and gyro */
+                rslt = bmi160_set_power_mode(dev);
+                if (rslt == BMI160_OK)
+                {
+                    rslt = check_invalid_settg(dev);
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API gets accel and gyro configurations.
+ */
+int8_t bmi160_get_sens_conf(struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = get_accel_conf(dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = get_gyro_conf(dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the power mode of the sensor.
+ */
+int8_t bmi160_set_power_mode(struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = set_accel_pwr(dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = set_gyro_pwr(dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API gets the power mode of the sensor.
+ */
+int8_t bmi160_get_power_mode(struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t power_mode = 0;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_get_regs(BMI160_PMU_STATUS_ADDR, &power_mode, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Power mode of the accel, gyro sensor is obtained */
+            dev->gyro_cfg.power = BMI160_GET_BITS(power_mode, BMI160_GYRO_POWER_MODE);
+            dev->accel_cfg.power = BMI160_GET_BITS(power_mode, BMI160_ACCEL_POWER_MODE);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads sensor data, stores it in
+ * the bmi160_sensor_data structure pointer passed by the user.
+ */
+int8_t bmi160_get_sensor_data(uint8_t select_sensor,
+                              struct bmi160_sensor_data *accel,
+                              struct bmi160_sensor_data *gyro,
+                              const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+    uint8_t time_sel;
+    uint8_t sen_sel;
+    uint8_t len = 0;
+
+    /*Extract the sensor  and time select information*/
+    sen_sel = select_sensor & BMI160_SEN_SEL_MASK;
+    time_sel = ((sen_sel & BMI160_TIME_SEL) >> 2);
+    sen_sel = sen_sel & (BMI160_ACCEL_SEL | BMI160_GYRO_SEL);
+    if (time_sel == 1)
+    {
+        len = 3;
+    }
+
+    /* Null-pointer check */
+    if (dev != NULL)
+    {
+        switch (sen_sel)
+        {
+            case BMI160_ACCEL_ONLY:
+
+                /* Null-pointer check */
+                if (accel == NULL)
+                {
+                    rslt = BMI160_E_NULL_PTR;
+                }
+                else
+                {
+                    rslt = get_accel_data(len, accel, dev);
+                }
+
+                break;
+            case BMI160_GYRO_ONLY:
+
+                /* Null-pointer check */
+                if (gyro == NULL)
+                {
+                    rslt = BMI160_E_NULL_PTR;
+                }
+                else
+                {
+                    rslt = get_gyro_data(len, gyro, dev);
+                }
+
+                break;
+            case BMI160_BOTH_ACCEL_AND_GYRO:
+
+                /* Null-pointer check */
+                if ((gyro == NULL) || (accel == NULL))
+                {
+                    rslt = BMI160_E_NULL_PTR;
+                }
+                else
+                {
+                    rslt = get_accel_gyro_data(len, accel, gyro, dev);
+                }
+
+                break;
+            default:
+                rslt = BMI160_E_INVALID_INPUT;
+                break;
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configures the necessary interrupt based on
+ *  the user settings in the bmi160_int_settg structure instance.
+ */
+int8_t bmi160_set_int_config(struct bmi160_int_settg *int_config, struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    switch (int_config->int_type)
+    {
+        case BMI160_ACC_ANY_MOTION_INT:
+
+            /*Any-motion  interrupt*/
+            rslt = set_accel_any_motion_int(int_config, dev);
+            break;
+        case BMI160_ACC_SIG_MOTION_INT:
+
+            /* Significant motion interrupt */
+            rslt = set_accel_sig_motion_int(int_config, dev);
+            break;
+        case BMI160_ACC_SLOW_NO_MOTION_INT:
+
+            /* Slow or no motion interrupt */
+            rslt = set_accel_no_motion_int(int_config, dev);
+            break;
+        case BMI160_ACC_DOUBLE_TAP_INT:
+        case BMI160_ACC_SINGLE_TAP_INT:
+
+            /* Double tap and single tap Interrupt */
+            rslt = set_accel_tap_int(int_config, dev);
+            break;
+        case BMI160_STEP_DETECT_INT:
+
+            /* Step detector interrupt */
+            rslt = set_accel_step_detect_int(int_config, dev);
+            break;
+        case BMI160_ACC_ORIENT_INT:
+
+            /* Orientation interrupt */
+            rslt = set_accel_orientation_int(int_config, dev);
+            break;
+        case BMI160_ACC_FLAT_INT:
+
+            /* Flat detection interrupt */
+            rslt = set_accel_flat_detect_int(int_config, dev);
+            break;
+        case BMI160_ACC_LOW_G_INT:
+
+            /* Low-g interrupt */
+            rslt = set_accel_low_g_int(int_config, dev);
+            break;
+        case BMI160_ACC_HIGH_G_INT:
+
+            /* High-g interrupt */
+            rslt = set_accel_high_g_int(int_config, dev);
+            break;
+        case BMI160_ACC_GYRO_DATA_RDY_INT:
+
+            /* Data ready interrupt */
+            rslt = set_accel_gyro_data_ready_int(int_config, dev);
+            break;
+        case BMI160_ACC_GYRO_FIFO_FULL_INT:
+
+            /* Fifo full interrupt */
+            rslt = set_fifo_full_int(int_config, dev);
+            break;
+        case BMI160_ACC_GYRO_FIFO_WATERMARK_INT:
+
+            /* Fifo water-mark interrupt */
+            rslt = set_fifo_watermark_int(int_config, dev);
+            break;
+        case BMI160_FIFO_TAG_INT_PIN:
+
+            /* Fifo tagging feature support */
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            break;
+        default:
+            break;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables or disable the step counter feature.
+ * 1 - enable step counter (0 - disable)
+ */
+int8_t bmi160_set_step_counter(uint8_t step_cnt_enable, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_get_regs(BMI160_INT_STEP_CONFIG_1_ADDR, &data, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            if (step_cnt_enable == BMI160_ENABLE)
+            {
+                data |= (uint8_t)(step_cnt_enable << 3);
+            }
+            else
+            {
+                data &= ~BMI160_STEP_COUNT_EN_BIT_MASK;
+            }
+
+            rslt = bmi160_set_regs(BMI160_INT_STEP_CONFIG_1_ADDR, &data, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads the step counter value.
+ */
+int8_t bmi160_read_step_counter(uint16_t *step_val, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[2] = { 0, 0 };
+    uint16_t msb = 0;
+    uint8_t lsb = 0;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_get_regs(BMI160_INT_STEP_CNT_0_ADDR, data, 2, dev);
+        if (rslt == BMI160_OK)
+        {
+            lsb = data[0];
+            msb = data[1] << 8;
+            *step_val = msb | lsb;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads the mention no of byte of data from the given
+ * register address of auxiliary sensor.
+ */
+int8_t bmi160_aux_read(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+    uint16_t map_len = 0;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->read == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        if (dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE)
+        {
+            rslt = map_read_len(&map_len, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = extract_aux_read(map_len, reg_addr, aux_data, len, dev);
+            }
+        }
+        else
+        {
+            rslt = BMI160_E_INVALID_INPUT;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API writes the mention no of byte of data to the given
+ * register address of auxiliary sensor.
+ */
+int8_t bmi160_aux_write(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+    uint8_t count = 0;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->write == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        for (; count < len; count++)
+        {
+            /* set data to write */
+            rslt = bmi160_set_regs(BMI160_AUX_IF_4_ADDR, aux_data, 1, dev);
+            dev->delay_ms(BMI160_AUX_COM_DELAY);
+            if (rslt == BMI160_OK)
+            {
+                /* set address to write */
+                rslt = bmi160_set_regs(BMI160_AUX_IF_3_ADDR, &reg_addr, 1, dev);
+                dev->delay_ms(BMI160_AUX_COM_DELAY);
+                if (rslt == BMI160_OK && (count < len - 1))
+                {
+                    aux_data++;
+                    reg_addr++;
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API initialize the auxiliary sensor
+ * in order to access it.
+ */
+int8_t bmi160_aux_init(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        if (dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE)
+        {
+            /* Configures the auxiliary sensor interface settings */
+            rslt = config_aux_settg(dev);
+        }
+        else
+        {
+            rslt = BMI160_E_INVALID_INPUT;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API is used to setup the auxiliary sensor of bmi160 in auto mode
+ * Thus enabling the auto update of 8 bytes of data from auxiliary sensor
+ * to BMI160 register address 0x04 to 0x0B
+ */
+int8_t bmi160_set_aux_auto_mode(uint8_t *data_addr, struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        if (dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE)
+        {
+            /* Write the aux. address to read in 0x4D of BMI160*/
+            rslt = bmi160_set_regs(BMI160_AUX_IF_2_ADDR, data_addr, 1, dev);
+            dev->delay_ms(BMI160_AUX_COM_DELAY);
+            if (rslt == BMI160_OK)
+            {
+                /* Configure the polling ODR for
+                 * auxiliary sensor */
+                rslt = config_aux_odr(dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* Disable the aux. manual mode, i.e aux.
+                     * sensor is in auto-mode (data-mode) */
+                    dev->aux_cfg.manual_enable = BMI160_DISABLE;
+                    rslt = bmi160_config_aux_mode(dev);
+
+                    /*  Auxiliary sensor data is obtained
+                     * in auto mode from this point */
+                }
+            }
+        }
+        else
+        {
+            rslt = BMI160_E_INVALID_INPUT;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configures the 0x4C register and settings like
+ * Auxiliary sensor manual enable/ disable and aux burst read length.
+ */
+int8_t bmi160_config_aux_mode(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t aux_if[2] = { (uint8_t)(dev->aux_cfg.aux_i2c_addr * 2), 0 };
+
+    rslt = bmi160_get_regs(BMI160_AUX_IF_1_ADDR, &aux_if[1], 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* update the Auxiliary interface to manual/auto mode */
+        aux_if[1] = BMI160_SET_BITS(aux_if[1], BMI160_MANUAL_MODE_EN, dev->aux_cfg.manual_enable);
+
+        /* update the burst read length defined by user */
+        aux_if[1] = BMI160_SET_BITS_POS_0(aux_if[1], BMI160_AUX_READ_BURST, dev->aux_cfg.aux_rd_burst_len);
+
+        /* Set the secondary interface address and manual mode
+         * along with burst read length */
+        rslt = bmi160_set_regs(BMI160_AUX_IF_0_ADDR, &aux_if[0], 2, dev);
+        dev->delay_ms(BMI160_AUX_COM_DELAY);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API is used to read the raw uncompensated auxiliary sensor
+ * data of 8 bytes from BMI160 register address 0x04 to 0x0B
+ */
+int8_t bmi160_read_aux_data_auto_mode(uint8_t *aux_data, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        if ((dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE) && (dev->aux_cfg.manual_enable == BMI160_DISABLE))
+        {
+            /* Read the aux. sensor's raw data */
+            rslt = bmi160_get_regs(BMI160_AUX_DATA_ADDR, aux_data, 8, dev);
+        }
+        else
+        {
+            rslt = BMI160_E_INVALID_INPUT;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This is used to perform self test of accel/gyro of the BMI160 sensor
+ */
+int8_t bmi160_perform_self_test(uint8_t select_sensor, struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    int8_t self_test_rslt = 0;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+
+        /* Proceed if null check is fine */
+        switch (select_sensor)
+        {
+            case BMI160_ACCEL_ONLY:
+                rslt = perform_accel_self_test(dev);
+                break;
+            case BMI160_GYRO_ONLY:
+
+                /* Set the power mode as normal mode */
+                dev->gyro_cfg.power = BMI160_GYRO_NORMAL_MODE;
+                rslt = bmi160_set_power_mode(dev);
+
+                /* Perform gyro self test */
+                if (rslt == BMI160_OK)
+                {
+                    /* Perform gyro self test */
+                    rslt = perform_gyro_self_test(dev);
+                }
+
+                break;
+            default:
+                rslt = BMI160_E_INVALID_INPUT;
+                break;
+        }
+
+        /* Check to ensure bus error does not occur */
+        if (rslt >= BMI160_OK)
+        {
+            /* Store the status of self test result */
+            self_test_rslt = rslt;
+
+            /* Perform soft reset */
+            rslt = bmi160_soft_reset(dev);
+
+        }
+
+        /* Check to ensure bus operations are success */
+        if (rslt == BMI160_OK)
+        {
+            /* Restore self_test_rslt as return value */
+            rslt = self_test_rslt;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads the data from fifo buffer.
+ */
+int8_t bmi160_get_fifo_data(struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+    uint16_t bytes_to_read = 0;
+    uint16_t user_fifo_len = 0;
+
+    /* check the bmi160 structure as NULL*/
+    if ((dev == NULL) || (dev->fifo->data == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        reset_fifo_data_structure(dev);
+
+        /* get current FIFO fill-level*/
+        rslt = get_fifo_byte_counter(&bytes_to_read, dev);
+        if (rslt == BMI160_OK)
+        {
+            user_fifo_len = dev->fifo->length;
+            if ((dev->fifo->length > bytes_to_read))
+            {
+                /* Handling the case where user requests
+                 * more data than available in FIFO */
+                dev->fifo->length = bytes_to_read;
+            }
+
+            if ((dev->fifo->fifo_time_enable == BMI160_FIFO_TIME_ENABLE) &&
+                (bytes_to_read + BMI160_FIFO_BYTES_OVERREAD <= user_fifo_len))
+            {
+                /* Handling case of sensor time availability*/
+                dev->fifo->length = dev->fifo->length + BMI160_FIFO_BYTES_OVERREAD;
+            }
+
+            /* read only the filled bytes in the FIFO Buffer */
+            rslt = bmi160_get_regs(BMI160_FIFO_DATA_ADDR, dev->fifo->data, dev->fifo->length, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API writes fifo_flush command to command register.This
+ *  action clears all data in the Fifo without changing fifo configuration
+ *  settings
+ */
+int8_t bmi160_set_fifo_flush(const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t data = BMI160_FIFO_FLUSH_VALUE;
+    uint8_t reg_addr = BMI160_COMMAND_REG_ADDR;
+
+    /* Check the bmi160_dev structure for NULL address*/
+    if (dev == NULL)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the FIFO configuration in the sensor.
+ */
+int8_t bmi160_set_fifo_config(uint8_t config, uint8_t enable, struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+    uint8_t data = 0;
+    uint8_t reg_addr = BMI160_FIFO_CONFIG_1_ADDR;
+    uint8_t fifo_config = config & BMI160_FIFO_CONFIG_1_MASK;
+
+    /* Check the bmi160_dev structure for NULL address*/
+    if (dev == NULL)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_get_regs(reg_addr, &data, BMI160_ONE, dev);
+        if (rslt == BMI160_OK)
+        {
+            if (fifo_config > 0)
+            {
+                if (enable == BMI160_ENABLE)
+                {
+                    data = data | fifo_config;
+                }
+                else
+                {
+                    data = data & (~fifo_config);
+                }
+            }
+
+            /* write fifo frame content configuration*/
+            rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* read fifo frame content configuration*/
+                rslt = bmi160_get_regs(reg_addr, &data, BMI160_ONE, dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* extract fifo header enabled status */
+                    dev->fifo->fifo_header_enable = data & BMI160_FIFO_HEAD_ENABLE;
+
+                    /* extract accel/gyr/aux. data enabled status */
+                    dev->fifo->fifo_data_enable = data & BMI160_FIFO_M_G_A_ENABLE;
+
+                    /* extract fifo sensor time enabled status */
+                    dev->fifo->fifo_time_enable = data & BMI160_FIFO_TIME_ENABLE;
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*! @brief This API is used to configure the down sampling ratios of
+ *  the accel and gyro data for FIFO.Also, it configures filtered or
+ *  pre-filtered data for accel and gyro.
+ *
+ */
+int8_t bmi160_set_fifo_down(uint8_t fifo_down, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t data = 0;
+    uint8_t reg_addr = BMI160_FIFO_DOWN_ADDR;
+
+    /* Check the bmi160_dev structure for NULL address*/
+    if (dev == NULL)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_get_regs(reg_addr, &data, BMI160_ONE, dev);
+        if (rslt == BMI160_OK)
+        {
+            data = data | fifo_down;
+            rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API sets the FIFO watermark level in the sensor.
+ *
+ */
+int8_t bmi160_set_fifo_wm(uint8_t fifo_wm, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t data = fifo_wm;
+    uint8_t reg_addr = BMI160_FIFO_CONFIG_0_ADDR;
+
+    /* Check the bmi160_dev structure for NULL address*/
+    if (dev == NULL)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API parses and extracts the accelerometer frames from
+ *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
+ *  the "accel_data" structure instance.
+ */
+int8_t bmi160_extract_accel(struct bmi160_sensor_data *accel_data, uint8_t *accel_length, struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+    uint16_t data_index = 0;
+    uint16_t data_read_length = 0;
+    uint8_t accel_index = 0;
+    uint8_t fifo_data_enable = 0;
+
+    if (dev == NULL || dev->fifo == NULL || dev->fifo->data == NULL)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Parsing the FIFO data in header-less mode */
+        if (dev->fifo->fifo_header_enable == 0)
+        {
+            /* Number of bytes to be parsed from FIFO */
+            get_accel_len_to_parse(&data_index, &data_read_length, accel_length, dev);
+            for (; data_index < data_read_length;)
+            {
+                /*Check for the availability of next two bytes of FIFO data */
+                check_frame_validity(&data_index, dev);
+                fifo_data_enable = dev->fifo->fifo_data_enable;
+                unpack_accel_frame(accel_data, &data_index, &accel_index, fifo_data_enable, dev);
+            }
+
+            /* update number of accel data read*/
+            *accel_length = accel_index;
+
+            /*update the accel byte index*/
+            dev->fifo->accel_byte_start_idx = data_index;
+        }
+        else
+        {
+            /* Parsing the FIFO data in header mode */
+            extract_accel_header_mode(accel_data, accel_length, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API parses and extracts the gyro frames from
+ *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
+ *  the "gyro_data" structure instance.
+ */
+int8_t bmi160_extract_gyro(struct bmi160_sensor_data *gyro_data, uint8_t *gyro_length, struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+    uint16_t data_index = 0;
+    uint16_t data_read_length = 0;
+    uint8_t gyro_index = 0;
+    uint8_t fifo_data_enable = 0;
+
+    if (dev == NULL || dev->fifo->data == NULL)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Parsing the FIFO data in header-less mode */
+        if (dev->fifo->fifo_header_enable == 0)
+        {
+            /* Number of bytes to be parsed from FIFO */
+            get_gyro_len_to_parse(&data_index, &data_read_length, gyro_length, dev);
+            for (; data_index < data_read_length;)
+            {
+                /*Check for the availability of next two bytes of FIFO data */
+                check_frame_validity(&data_index, dev);
+                fifo_data_enable = dev->fifo->fifo_data_enable;
+                unpack_gyro_frame(gyro_data, &data_index, &gyro_index, fifo_data_enable, dev);
+            }
+
+            /* update number of gyro data read */
+            *gyro_length = gyro_index;
+
+            /* update the gyro byte index */
+            dev->fifo->gyro_byte_start_idx = data_index;
+        }
+        else
+        {
+            /* Parsing the FIFO data in header mode */
+            extract_gyro_header_mode(gyro_data, gyro_length, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API parses and extracts the aux frames from
+ *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
+ *  the "aux_data" structure instance.
+ */
+int8_t bmi160_extract_aux(struct bmi160_aux_data *aux_data, uint8_t *aux_len, struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+    uint16_t data_index = 0;
+    uint16_t data_read_length = 0;
+    uint8_t aux_index = 0;
+    uint8_t fifo_data_enable = 0;
+
+    if ((dev == NULL) || (dev->fifo->data == NULL) || (aux_data == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Parsing the FIFO data in header-less mode */
+        if (dev->fifo->fifo_header_enable == 0)
+        {
+            /* Number of bytes to be parsed from FIFO */
+            get_aux_len_to_parse(&data_index, &data_read_length, aux_len, dev);
+            for (; data_index < data_read_length;)
+            {
+                /* Check for the availability of next two
+                 * bytes of FIFO data */
+                check_frame_validity(&data_index, dev);
+                fifo_data_enable = dev->fifo->fifo_data_enable;
+                unpack_aux_frame(aux_data, &data_index, &aux_index, fifo_data_enable, dev);
+            }
+
+            /* update number of aux data read */
+            *aux_len = aux_index;
+
+            /* update the aux byte index */
+            dev->fifo->aux_byte_start_idx = data_index;
+        }
+        else
+        {
+            /* Parsing the FIFO data in header mode */
+            extract_aux_header_mode(aux_data, aux_len, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API starts the FOC of accel and gyro
+ *
+ *  @note FOC should not be used in low-power mode of sensor
+ *
+ *  @note Accel FOC targets values of +1g , 0g , -1g
+ *  Gyro FOC always targets value of 0 dps
+ */
+int8_t bmi160_start_foc(const struct bmi160_foc_conf *foc_conf,
+                        struct bmi160_offsets *offset,
+                        struct bmi160_dev const *dev)
+{
+    int8_t rslt;
+    uint8_t data;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Set the offset enable bits */
+        rslt = configure_offset_enable(foc_conf, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Read the FOC config from the sensor */
+            rslt = bmi160_get_regs(BMI160_FOC_CONF_ADDR, &data, 1, dev);
+
+            /* Set the FOC config for gyro */
+            data = BMI160_SET_BITS(data, BMI160_GYRO_FOC_EN, foc_conf->foc_gyr_en);
+
+            /* Set the FOC config for accel xyz axes */
+            data = BMI160_SET_BITS(data, BMI160_ACCEL_FOC_X_CONF, foc_conf->foc_acc_x);
+            data = BMI160_SET_BITS(data, BMI160_ACCEL_FOC_Y_CONF, foc_conf->foc_acc_y);
+            data = BMI160_SET_BITS_POS_0(data, BMI160_ACCEL_FOC_Z_CONF, foc_conf->foc_acc_z);
+            if (rslt == BMI160_OK)
+            {
+                /* Set the FOC config in the sensor */
+                rslt = bmi160_set_regs(BMI160_FOC_CONF_ADDR, &data, 1, dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* Procedure to trigger
+                     * FOC and check status */
+                    rslt = trigger_foc(offset, dev);
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API reads and stores the offset values of accel and gyro
+ */
+int8_t bmi160_get_offsets(struct bmi160_offsets *offset, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[7];
+    uint8_t lsb, msb;
+    int16_t offset_msb, offset_lsb;
+    int16_t offset_data;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Read the FOC config from the sensor */
+        rslt = bmi160_get_regs(BMI160_OFFSET_ADDR, data, 7, dev);
+
+        /* Accel offsets */
+        offset->off_acc_x = (int8_t)data[0];
+        offset->off_acc_y = (int8_t)data[1];
+        offset->off_acc_z = (int8_t)data[2];
+
+        /* Gyro x-axis offset */
+        lsb = data[3];
+        msb = BMI160_GET_BITS_POS_0(data[6], BMI160_GYRO_OFFSET_X);
+        offset_msb = (int16_t)(msb << 14);
+        offset_lsb = lsb << 6;
+        offset_data = offset_msb | offset_lsb;
+
+        /* Divide by 64 to get the Right shift by 6 value */
+        offset->off_gyro_x = (int16_t)(offset_data / 64);
+
+        /* Gyro y-axis offset */
+        lsb = data[4];
+        msb = BMI160_GET_BITS(data[6], BMI160_GYRO_OFFSET_Y);
+        offset_msb = (int16_t)(msb << 14);
+        offset_lsb = lsb << 6;
+        offset_data = offset_msb | offset_lsb;
+
+        /* Divide by 64 to get the Right shift by 6 value */
+        offset->off_gyro_y = (int16_t)(offset_data / 64);
+
+        /* Gyro z-axis offset */
+        lsb = data[5];
+        msb = BMI160_GET_BITS(data[6], BMI160_GYRO_OFFSET_Z);
+        offset_msb = (int16_t)(msb << 14);
+        offset_lsb = lsb << 6;
+        offset_data = offset_msb | offset_lsb;
+
+        /* Divide by 64 to get the Right shift by 6 value */
+        offset->off_gyro_z = (int16_t)(offset_data / 64);
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API writes the offset values of accel and gyro to
+ *  the sensor but these values will be reset on POR or soft reset.
+ */
+int8_t bmi160_set_offsets(const struct bmi160_foc_conf *foc_conf,
+                          const struct bmi160_offsets *offset,
+                          struct bmi160_dev const *dev)
+{
+    int8_t rslt;
+    uint8_t data[7];
+    uint8_t x_msb, y_msb, z_msb;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Update the accel offset */
+        data[0] = (uint8_t)offset->off_acc_x;
+        data[1] = (uint8_t)offset->off_acc_y;
+        data[2] = (uint8_t)offset->off_acc_z;
+
+        /* Update the LSB of gyro offset */
+        data[3] = BMI160_GET_LSB(offset->off_gyro_x);
+        data[4] = BMI160_GET_LSB(offset->off_gyro_y);
+        data[5] = BMI160_GET_LSB(offset->off_gyro_z);
+
+        /* Update the MSB of gyro offset */
+        x_msb = BMI160_GET_BITS(offset->off_gyro_x, BMI160_GYRO_OFFSET);
+        y_msb = BMI160_GET_BITS(offset->off_gyro_y, BMI160_GYRO_OFFSET);
+        z_msb = BMI160_GET_BITS(offset->off_gyro_z, BMI160_GYRO_OFFSET);
+        data[6] = (uint8_t)(z_msb << 4 | y_msb << 2 | x_msb);
+
+        /* Set the offset enable/disable for gyro and accel */
+        data[6] = BMI160_SET_BITS(data[6], BMI160_GYRO_OFFSET_EN, foc_conf->gyro_off_en);
+        data[6] = BMI160_SET_BITS(data[6], BMI160_ACCEL_OFFSET_EN, foc_conf->acc_off_en);
+
+        /* Set the offset config and values in the sensor */
+        rslt = bmi160_set_regs(BMI160_OFFSET_ADDR, data, 7, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API writes the image registers values to NVM which is
+ *  stored even after POR or soft reset
+ */
+int8_t bmi160_update_nvm(struct bmi160_dev const *dev)
+{
+    int8_t rslt;
+    uint8_t data;
+    uint8_t cmd = BMI160_NVM_BACKUP_EN;
+
+    /* Read the nvm_prog_en configuration */
+    rslt = bmi160_get_regs(BMI160_CONF_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        data = BMI160_SET_BITS(data, BMI160_NVM_UPDATE, 1);
+
+        /* Set the nvm_prog_en bit in the sensor */
+        rslt = bmi160_set_regs(BMI160_CONF_ADDR, &data, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Update NVM */
+            rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &cmd, 1, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* Check for NVM ready status */
+                rslt = bmi160_get_regs(BMI160_STATUS_ADDR, &data, 1, dev);
+                if (rslt == BMI160_OK)
+                {
+                    data = BMI160_GET_BITS(data, BMI160_NVM_STATUS);
+                    if (data != BMI160_ENABLE)
+                    {
+                        /* Delay to update NVM */
+                        dev->delay_ms(25);
+                    }
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API gets the interrupt status from the sensor.
+ */
+int8_t bmi160_get_int_status(enum bmi160_int_status_sel int_status_sel,
+                             union bmi160_int_status *int_status,
+                             struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+
+    /* To get the status of all interrupts */
+    if (int_status_sel == BMI160_INT_STATUS_ALL)
+    {
+        rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR, &int_status->data[0], 4, dev);
+    }
+    else
+    {
+        if (int_status_sel & BMI160_INT_STATUS_0)
+        {
+            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR, &int_status->data[0], 1, dev);
+        }
+
+        if (int_status_sel & BMI160_INT_STATUS_1)
+        {
+            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR + 1, &int_status->data[1], 1, dev);
+        }
+
+        if (int_status_sel & BMI160_INT_STATUS_2)
+        {
+            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR + 2, &int_status->data[2], 1, dev);
+        }
+
+        if (int_status_sel & BMI160_INT_STATUS_3)
+        {
+            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR + 3, &int_status->data[3], 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*********************** Local function definitions ***************************/
+
+/*!
+ * @brief This API sets the any-motion interrupt of the sensor.
+ * This interrupt occurs when accel values exceeds preset threshold
+ * for a certain period of time.
+ */
+static int8_t set_accel_any_motion_int(struct bmi160_int_settg *int_config, struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg = &(int_config->int_type_cfg.acc_any_motion_int);
+        rslt = enable_accel_any_motion_int(any_motion_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = config_any_motion_int_settg(int_config, any_motion_int_cfg, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets tap interrupts.Interrupt is fired when
+ * tap movements happen.
+ */
+static int8_t set_accel_tap_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_tap_int_cfg *tap_int_cfg = &(int_config->int_type_cfg.acc_tap_int);
+        rslt = enable_tap_int(int_config, tap_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = config_tap_int_settg(int_config, tap_int_cfg, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the data ready interrupt for both accel and gyro.
+ * This interrupt occurs when new accel and gyro data comes.
+ */
+static int8_t set_accel_gyro_data_ready_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        rslt = enable_data_ready_int(dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = map_hardware_interrupt(int_config, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the significant motion interrupt of the sensor.This
+ * interrupt occurs when there is change in user location.
+ */
+static int8_t set_accel_sig_motion_int(struct bmi160_int_settg *int_config, struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg = &(int_config->int_type_cfg.acc_sig_motion_int);
+        rslt = enable_sig_motion_int(sig_mot_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = config_sig_motion_int_settg(int_config, sig_mot_int_cfg, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the no motion/slow motion interrupt of the sensor.
+ * Slow motion is similar to any motion interrupt.No motion interrupt
+ * occurs when slope bet. two accel values falls below preset threshold
+ * for preset duration.
+ */
+static int8_t set_accel_no_motion_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg = &(int_config->int_type_cfg.acc_no_motion_int);
+        rslt = enable_no_motion_int(no_mot_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure the INT PIN settings*/
+            rslt = config_no_motion_int_settg(int_config, no_mot_int_cfg, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the step detection interrupt.This interrupt
+ * occurs when the single step causes accel values to go above
+ * preset threshold.
+ */
+static int8_t set_accel_step_detect_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_step_detect_int_cfg *step_detect_int_cfg = &(int_config->int_type_cfg.acc_step_detect_int);
+        rslt = enable_step_detect_int(step_detect_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = map_feature_interrupt(int_config, dev);
+                if (rslt == BMI160_OK)
+                {
+                    rslt = config_step_detect(step_detect_int_cfg, dev);
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the orientation interrupt of the sensor.This
+ * interrupt occurs when there is orientation change in the sensor
+ * with respect to gravitational field vector g.
+ */
+static int8_t set_accel_orientation_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_orient_int_cfg *orient_int_cfg = &(int_config->int_type_cfg.acc_orient_int);
+        rslt = enable_orient_int(orient_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* map INT pin to orient interrupt */
+                rslt = map_feature_interrupt(int_config, dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* configure the
+                     * orientation setting*/
+                    rslt = config_orient_int_settg(orient_int_cfg, dev);
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the flat interrupt of the sensor.This interrupt
+ * occurs in case of flat orientation
+ */
+static int8_t set_accel_flat_detect_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_flat_detect_int_cfg *flat_detect_int = &(int_config->int_type_cfg.acc_flat_int);
+
+        /* enable the flat interrupt */
+        rslt = enable_flat_int(flat_detect_int, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* map INT pin to flat interrupt */
+                rslt = map_feature_interrupt(int_config, dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* configure the flat setting*/
+                    rslt = config_flat_int_settg(flat_detect_int, dev);
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the low-g interrupt of the sensor.This interrupt
+ * occurs during free-fall.
+ */
+static int8_t set_accel_low_g_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_low_g_int_cfg *low_g_int = &(int_config->int_type_cfg.acc_low_g_int);
+
+        /* Enable the low-g interrupt*/
+        rslt = enable_low_g_int(low_g_int, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* Map INT pin to low-g interrupt */
+                rslt = map_feature_interrupt(int_config, dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* configure the data source
+                     * for low-g interrupt*/
+                    rslt = config_low_g_data_src(low_g_int, dev);
+                    if (rslt == BMI160_OK)
+                    {
+                        rslt = config_low_g_int_settg(low_g_int, dev);
+                    }
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the high-g interrupt of the sensor.The interrupt
+ * occurs if the absolute value of acceleration data of any enabled axis
+ * exceeds the programmed threshold and the sign of the value does not
+ * change for a preset duration.
+ */
+static int8_t set_accel_high_g_int(struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if ((rslt != BMI160_OK) || (int_config == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* updating the interrupt structure to local structure */
+        struct bmi160_acc_high_g_int_cfg *high_g_int_cfg = &(int_config->int_type_cfg.acc_high_g_int);
+
+        /* Enable the high-g interrupt */
+        rslt = enable_high_g_int(high_g_int_cfg, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* Map INT pin to high-g interrupt */
+                rslt = map_feature_interrupt(int_config, dev);
+                if (rslt == BMI160_OK)
+                {
+                    /* configure the data source
+                     * for high-g interrupt*/
+                    rslt = config_high_g_data_src(high_g_int_cfg, dev);
+                    if (rslt == BMI160_OK)
+                    {
+                        rslt = config_high_g_int_settg(high_g_int_cfg, dev);
+                    }
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configures the pins to fire the
+ * interrupt signal when it occurs.
+ */
+static int8_t set_intr_pin_config(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* configure the behavioural settings of interrupt pin */
+    rslt = config_int_out_ctrl(int_config, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = config_int_latch(int_config, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This internal API is used to validate the device structure pointer for
+ * null conditions.
+ */
+static int8_t null_ptr_check(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    if ((dev == NULL) || (dev->read == NULL) || (dev->write == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Device structure is fine */
+        rslt = BMI160_OK;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the default configuration parameters of accel & gyro.
+ * Also maintain the previous state of configurations.
+ */
+static void default_param_settg(struct bmi160_dev *dev)
+{
+    /* Initializing accel and gyro params with
+     * default values */
+    dev->accel_cfg.bw = BMI160_ACCEL_BW_NORMAL_AVG4;
+    dev->accel_cfg.odr = BMI160_ACCEL_ODR_100HZ;
+    dev->accel_cfg.power = BMI160_ACCEL_SUSPEND_MODE;
+    dev->accel_cfg.range = BMI160_ACCEL_RANGE_2G;
+    dev->gyro_cfg.bw = BMI160_GYRO_BW_NORMAL_MODE;
+    dev->gyro_cfg.odr = BMI160_GYRO_ODR_100HZ;
+    dev->gyro_cfg.power = BMI160_GYRO_SUSPEND_MODE;
+    dev->gyro_cfg.range = BMI160_GYRO_RANGE_2000_DPS;
+
+    /* To maintain the previous state of accel configuration */
+    dev->prev_accel_cfg = dev->accel_cfg;
+
+    /* To maintain the previous state of gyro configuration */
+    dev->prev_gyro_cfg = dev->gyro_cfg;
+}
+
+/*!
+ * @brief This API set the accel configuration.
+ */
+static int8_t set_accel_conf(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[2] = { 0 };
+
+    rslt = check_accel_config(data, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Write output data rate and bandwidth */
+        rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, &data[0], 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            dev->prev_accel_cfg.odr = dev->accel_cfg.odr;
+            dev->prev_accel_cfg.bw = dev->accel_cfg.bw;
+
+            /* write accel range */
+            rslt = bmi160_set_regs(BMI160_ACCEL_RANGE_ADDR, &data[1], 1, dev);
+            if (rslt == BMI160_OK)
+            {
+                dev->prev_accel_cfg.range = dev->accel_cfg.range;
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API gets the accel configuration.
+ */
+static int8_t get_accel_conf(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[2] = { 0 };
+
+    /* Get accel configurations */
+    rslt = bmi160_get_regs(BMI160_ACCEL_CONFIG_ADDR, data, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        dev->accel_cfg.odr = (data[0] & BMI160_ACCEL_ODR_MASK);
+        dev->accel_cfg.bw = (data[0] & BMI160_ACCEL_BW_MASK) >> BMI160_ACCEL_BW_POS;
+        dev->accel_cfg.range = (data[1] & BMI160_ACCEL_RANGE_MASK);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API check the accel configuration.
+ */
+static int8_t check_accel_config(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* read accel Output data rate and bandwidth */
+    rslt = bmi160_get_regs(BMI160_ACCEL_CONFIG_ADDR, data, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = process_accel_odr(&data[0], dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = process_accel_bw(&data[0], dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = process_accel_range(&data[1], dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the accel odr.
+ */
+static int8_t process_accel_odr(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t temp = 0;
+    uint8_t odr = 0;
+
+    if (dev->accel_cfg.odr <= BMI160_ACCEL_ODR_1600HZ)
+    {
+        if (dev->accel_cfg.odr != dev->prev_accel_cfg.odr)
+        {
+            odr = (uint8_t)dev->accel_cfg.odr;
+            temp = *data & ~BMI160_ACCEL_ODR_MASK;
+
+            /* Adding output data rate */
+            *data = temp | (odr & BMI160_ACCEL_ODR_MASK);
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_OUT_OF_RANGE;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the accel bandwidth.
+ */
+static int8_t process_accel_bw(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t temp = 0;
+    uint8_t bw = 0;
+
+    if (dev->accel_cfg.bw <= BMI160_ACCEL_BW_RES_AVG128)
+    {
+        if (dev->accel_cfg.bw != dev->prev_accel_cfg.bw)
+        {
+            bw = (uint8_t)dev->accel_cfg.bw;
+            temp = *data & ~BMI160_ACCEL_BW_MASK;
+
+            /* Adding bandwidth */
+            *data = temp | ((bw << 4) & BMI160_ACCEL_BW_MASK);
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_OUT_OF_RANGE;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the accel range.
+ */
+static int8_t process_accel_range(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t temp = 0;
+    uint8_t range = 0;
+
+    if (dev->accel_cfg.range <= BMI160_ACCEL_RANGE_16G)
+    {
+        if (dev->accel_cfg.range != dev->prev_accel_cfg.range)
+        {
+            range = (uint8_t)dev->accel_cfg.range;
+            temp = *data & ~BMI160_ACCEL_RANGE_MASK;
+
+            /* Adding range */
+            *data = temp | (range & BMI160_ACCEL_RANGE_MASK);
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_OUT_OF_RANGE;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API checks the invalid settings for ODR & Bw for
+ * Accel and Gyro.
+ */
+static int8_t check_invalid_settg(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+
+    /* read the error reg */
+    rslt = bmi160_get_regs(BMI160_ERROR_REG_ADDR, &data, 1, dev);
+    data = data >> 1;
+    data = data & BMI160_ERR_REG_MASK;
+    if (data == 1)
+    {
+        rslt = BMI160_E_ACCEL_ODR_BW_INVALID;
+    }
+    else if (data == 2)
+    {
+        rslt = BMI160_E_GYRO_ODR_BW_INVALID;
+    }
+    else if (data == 3)
+    {
+        rslt = BMI160_E_LWP_PRE_FLTR_INT_INVALID;
+    }
+    else if (data == 7)
+    {
+        rslt = BMI160_E_LWP_PRE_FLTR_INVALID;
+    }
+
+    return rslt;
+}
+static int8_t set_gyro_conf(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[2] = { 0 };
+
+    rslt = check_gyro_config(data, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Write output data rate and bandwidth */
+        rslt = bmi160_set_regs(BMI160_GYRO_CONFIG_ADDR, &data[0], 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            dev->prev_gyro_cfg.odr = dev->gyro_cfg.odr;
+            dev->prev_gyro_cfg.bw = dev->gyro_cfg.bw;
+
+            /* Write gyro range */
+            rslt = bmi160_set_regs(BMI160_GYRO_RANGE_ADDR, &data[1], 1, dev);
+            if (rslt == BMI160_OK)
+            {
+                dev->prev_gyro_cfg.range = dev->gyro_cfg.range;
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API gets the gyro configuration.
+ */
+static int8_t get_gyro_conf(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[2] = { 0 };
+
+    /* Get accel configurations */
+    rslt = bmi160_get_regs(BMI160_GYRO_CONFIG_ADDR, data, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        dev->gyro_cfg.odr = (data[0] & BMI160_GYRO_ODR_MASK);
+        dev->gyro_cfg.bw = (data[0] & BMI160_GYRO_BW_MASK) >> BMI160_GYRO_BW_POS;
+        dev->gyro_cfg.range = (data[1] & BMI160_GYRO_RANGE_MASK);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API check the gyro configuration.
+ */
+static int8_t check_gyro_config(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* read gyro Output data rate and bandwidth */
+    rslt = bmi160_get_regs(BMI160_GYRO_CONFIG_ADDR, data, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = process_gyro_odr(&data[0], dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = process_gyro_bw(&data[0], dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = process_gyro_range(&data[1], dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the gyro odr.
+ */
+static int8_t process_gyro_odr(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t temp = 0;
+    uint8_t odr = 0;
+
+    if (dev->gyro_cfg.odr <= BMI160_GYRO_ODR_3200HZ)
+    {
+        if (dev->gyro_cfg.odr != dev->prev_gyro_cfg.odr)
+        {
+            odr = (uint8_t)dev->gyro_cfg.odr;
+            temp = (*data & ~BMI160_GYRO_ODR_MASK);
+
+            /* Adding output data rate */
+            *data = temp | (odr & BMI160_GYRO_ODR_MASK);
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_OUT_OF_RANGE;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the gyro bandwidth.
+ */
+static int8_t process_gyro_bw(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t temp = 0;
+    uint8_t bw = 0;
+
+    if (dev->gyro_cfg.bw <= BMI160_GYRO_BW_NORMAL_MODE)
+    {
+        bw = (uint8_t)dev->gyro_cfg.bw;
+        temp = *data & ~BMI160_GYRO_BW_MASK;
+
+        /* Adding bandwidth */
+        *data = temp | ((bw << 4) & BMI160_GYRO_BW_MASK);
+    }
+    else
+    {
+        rslt = BMI160_E_OUT_OF_RANGE;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the gyro range.
+ */
+static int8_t process_gyro_range(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t temp = 0;
+    uint8_t range = 0;
+
+    if (dev->gyro_cfg.range <= BMI160_GYRO_RANGE_125_DPS)
+    {
+        if (dev->gyro_cfg.range != dev->prev_gyro_cfg.range)
+        {
+            range = (uint8_t)dev->gyro_cfg.range;
+            temp = *data & ~BMI160_GYRO_RANGE_MASK;
+
+            /* Adding range */
+            *data = temp | (range & BMI160_GYRO_RANGE_MASK);
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_OUT_OF_RANGE;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the accel power.
+ */
+static int8_t set_accel_pwr(struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+    uint8_t data = 0;
+
+    if ((dev->accel_cfg.power >= BMI160_ACCEL_SUSPEND_MODE) && (dev->accel_cfg.power <= BMI160_ACCEL_LOWPOWER_MODE))
+    {
+        if (dev->accel_cfg.power != dev->prev_accel_cfg.power)
+        {
+            rslt = process_under_sampling(&data, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* Write accel power */
+                rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &dev->accel_cfg.power, 1, dev);
+
+                /* Add delay of 3.8 ms - refer data sheet table 24*/
+                if (dev->prev_accel_cfg.power == BMI160_ACCEL_SUSPEND_MODE)
+                {
+                    dev->delay_ms(BMI160_ACCEL_DELAY_MS);
+                }
+
+                dev->prev_accel_cfg.power = dev->accel_cfg.power;
+            }
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_INVALID_CONFIG;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API process the undersampling setting of Accel.
+ */
+static int8_t process_under_sampling(uint8_t *data, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t pre_filter[2] = { 0 };
+
+    rslt = bmi160_get_regs(BMI160_ACCEL_CONFIG_ADDR, data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        if (dev->accel_cfg.power == BMI160_ACCEL_LOWPOWER_MODE)
+        {
+            temp = *data & ~BMI160_ACCEL_UNDERSAMPLING_MASK;
+
+            /* Set under-sampling parameter */
+            *data = temp | ((1 << 7) & BMI160_ACCEL_UNDERSAMPLING_MASK);
+
+            /* Write data */
+            rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, data, 1, dev);
+
+            /* Disable the pre-filter data in low power mode */
+            if (rslt == BMI160_OK)
+            {
+                /* Disable the Pre-filter data*/
+                rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, pre_filter, 2, dev);
+            }
+        }
+        else if (*data & BMI160_ACCEL_UNDERSAMPLING_MASK)
+        {
+            temp = *data & ~BMI160_ACCEL_UNDERSAMPLING_MASK;
+
+            /* Disable under-sampling parameter if already enabled */
+            *data = temp;
+
+            /* Write data */
+            rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, data, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API sets the gyro power mode.
+ */
+static int8_t set_gyro_pwr(struct bmi160_dev *dev)
+{
+    int8_t rslt = 0;
+
+    if ((dev->gyro_cfg.power == BMI160_GYRO_SUSPEND_MODE) || (dev->gyro_cfg.power == BMI160_GYRO_NORMAL_MODE) ||
+        (dev->gyro_cfg.power == BMI160_GYRO_FASTSTARTUP_MODE))
+    {
+        if (dev->gyro_cfg.power != dev->prev_gyro_cfg.power)
+        {
+            /* Write gyro power */
+            rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &dev->gyro_cfg.power, 1, dev);
+            if (dev->prev_gyro_cfg.power == BMI160_GYRO_SUSPEND_MODE)
+            {
+                /* Delay of 80 ms - datasheet Table 24 */
+                dev->delay_ms(BMI160_GYRO_DELAY_MS);
+            }
+            else if ((dev->prev_gyro_cfg.power == BMI160_GYRO_FASTSTARTUP_MODE) &&
+                     (dev->gyro_cfg.power == BMI160_GYRO_NORMAL_MODE))
+            {
+                /* This delay is required for transition from
+                 * fast-startup mode to normal mode - datasheet Table 3 */
+                dev->delay_ms(10);
+            }
+            else
+            {
+                /* do nothing */
+            }
+
+            dev->prev_gyro_cfg.power = dev->gyro_cfg.power;
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_INVALID_CONFIG;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads accel data along with sensor time if time is requested
+ * by user. Kindly refer the user guide(README.md) for more info.
+ */
+static int8_t get_accel_data(uint8_t len, struct bmi160_sensor_data *accel, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t idx = 0;
+    uint8_t data_array[9] = { 0 };
+    uint8_t time_0 = 0;
+    uint16_t time_1 = 0;
+    uint32_t time_2 = 0;
+    uint8_t lsb;
+    uint8_t msb;
+    int16_t msblsb;
+
+    /* read accel sensor data along with time if requested */
+    rslt = bmi160_get_regs(BMI160_ACCEL_DATA_ADDR, data_array, 6 + len, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Accel Data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        accel->x = msblsb; /* Data in X axis */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        accel->y = msblsb; /* Data in Y axis */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        accel->z = msblsb; /* Data in Z axis */
+        if (len == 3)
+        {
+            time_0 = data_array[idx++];
+            time_1 = (uint16_t)(data_array[idx++] << 8);
+            time_2 = (uint32_t)(data_array[idx++] << 16);
+            accel->sensortime = (uint32_t)(time_2 | time_1 | time_0);
+        }
+        else
+        {
+            accel->sensortime = 0;
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_COM_FAIL;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads accel data along with sensor time if time is requested
+ * by user. Kindly refer the user guide(README.md) for more info.
+ */
+static int8_t get_gyro_data(uint8_t len, struct bmi160_sensor_data *gyro, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t idx = 0;
+    uint8_t data_array[15] = { 0 };
+    uint8_t time_0 = 0;
+    uint16_t time_1 = 0;
+    uint32_t time_2 = 0;
+    uint8_t lsb;
+    uint8_t msb;
+    int16_t msblsb;
+
+    if (len == 0)
+    {
+        /* read gyro data only */
+        rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 6, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Gyro Data */
+            lsb = data_array[idx++];
+            msb = data_array[idx++];
+            msblsb = (int16_t)((msb << 8) | lsb);
+            gyro->x = msblsb; /* Data in X axis */
+            lsb = data_array[idx++];
+            msb = data_array[idx++];
+            msblsb = (int16_t)((msb << 8) | lsb);
+            gyro->y = msblsb; /* Data in Y axis */
+            lsb = data_array[idx++];
+            msb = data_array[idx++];
+            msblsb = (int16_t)((msb << 8) | lsb);
+            gyro->z = msblsb; /* Data in Z axis */
+            gyro->sensortime = 0;
+        }
+        else
+        {
+            rslt = BMI160_E_COM_FAIL;
+        }
+    }
+    else
+    {
+        /* read gyro sensor data along with time */
+        rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 12 + len, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Gyro Data */
+            lsb = data_array[idx++];
+            msb = data_array[idx++];
+            msblsb = (int16_t)((msb << 8) | lsb);
+            gyro->x = msblsb; /* gyro X axis data */
+            lsb = data_array[idx++];
+            msb = data_array[idx++];
+            msblsb = (int16_t)((msb << 8) | lsb);
+            gyro->y = msblsb; /* gyro Y axis data */
+            lsb = data_array[idx++];
+            msb = data_array[idx++];
+            msblsb = (int16_t)((msb << 8) | lsb);
+            gyro->z = msblsb; /* gyro Z axis data */
+            idx = idx + 6;
+            time_0 = data_array[idx++];
+            time_1 = (uint16_t)(data_array[idx++] << 8);
+            time_2 = (uint32_t)(data_array[idx++] << 16);
+            gyro->sensortime = (uint32_t)(time_2 | time_1 | time_0);
+        }
+        else
+        {
+            rslt = BMI160_E_COM_FAIL;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API reads accel and gyro data along with sensor time
+ * if time is requested by user.
+ *  Kindly refer the user guide(README.md) for more info.
+ */
+static int8_t get_accel_gyro_data(uint8_t len,
+                                  struct bmi160_sensor_data *accel,
+                                  struct bmi160_sensor_data *gyro,
+                                  const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t idx = 0;
+    uint8_t data_array[15] = { 0 };
+    uint8_t time_0 = 0;
+    uint16_t time_1 = 0;
+    uint32_t time_2 = 0;
+    uint8_t lsb;
+    uint8_t msb;
+    int16_t msblsb;
+
+    /* read both accel and gyro sensor data
+     * along with time if requested */
+    rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 12 + len, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Gyro Data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        gyro->x = msblsb; /* gyro X axis data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        gyro->y = msblsb; /* gyro Y axis data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        gyro->z = msblsb; /* gyro Z axis data */
+        /* Accel Data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        accel->x = (int16_t)msblsb; /* accel X axis data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        accel->y = (int16_t)msblsb; /* accel Y axis data */
+        lsb = data_array[idx++];
+        msb = data_array[idx++];
+        msblsb = (int16_t)((msb << 8) | lsb);
+        accel->z = (int16_t)msblsb; /* accel Z axis data */
+        if (len == 3)
+        {
+            time_0 = data_array[idx++];
+            time_1 = (uint16_t)(data_array[idx++] << 8);
+            time_2 = (uint32_t)(data_array[idx++] << 16);
+            accel->sensortime = (uint32_t)(time_2 | time_1 | time_0);
+            gyro->sensortime = (uint32_t)(time_2 | time_1 | time_0);
+        }
+        else
+        {
+            accel->sensortime = 0;
+            gyro->sensortime = 0;
+        }
+    }
+    else
+    {
+        rslt = BMI160_E_COM_FAIL;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the any-motion interrupt for accel.
+ */
+static int8_t enable_accel_any_motion_int(const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                          struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable any motion x, any motion y, any motion z
+     * in Int Enable 0 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        if (any_motion_int_cfg->anymotion_en == BMI160_ENABLE)
+        {
+            temp = data & ~BMI160_ANY_MOTION_X_INT_EN_MASK;
+
+            /* Adding Any_motion x axis */
+            data = temp | (any_motion_int_cfg->anymotion_x & BMI160_ANY_MOTION_X_INT_EN_MASK);
+            temp = data & ~BMI160_ANY_MOTION_Y_INT_EN_MASK;
+
+            /* Adding Any_motion y axis */
+            data = temp | ((any_motion_int_cfg->anymotion_y << 1) & BMI160_ANY_MOTION_Y_INT_EN_MASK);
+            temp = data & ~BMI160_ANY_MOTION_Z_INT_EN_MASK;
+
+            /* Adding Any_motion z axis */
+            data = temp | ((any_motion_int_cfg->anymotion_z << 2) & BMI160_ANY_MOTION_Z_INT_EN_MASK);
+
+            /* any-motion feature selected*/
+            dev->any_sig_sel = BMI160_ANY_MOTION_ENABLED;
+        }
+        else
+        {
+            data = data & ~BMI160_ANY_MOTION_ALL_INT_EN_MASK;
+
+            /* neither any-motion feature nor sig-motion selected */
+            dev->any_sig_sel = BMI160_BOTH_ANY_SIG_MOTION_DISABLED;
+        }
+
+        /* write data to Int Enable 0 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API disable the sig-motion interrupt.
+ */
+static int8_t disable_sig_motion_int(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Disabling Significant motion interrupt if enabled */
+    rslt = bmi160_get_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = (data & BMI160_SIG_MOTION_SEL_MASK);
+        if (temp)
+        {
+            temp = data & ~BMI160_SIG_MOTION_SEL_MASK;
+            data = temp;
+
+            /* Write data to register */
+            rslt = bmi160_set_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API is used to map/unmap the Any/Sig motion, Step det/Low-g,
+ *  Double tap, Single tap, Orientation, Flat, High-G, Nomotion interrupt pins.
+ */
+static int8_t map_feature_interrupt(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data[3] = { 0, 0, 0 };
+    uint8_t temp[3] = { 0, 0, 0 };
+
+    rslt = bmi160_get_regs(BMI160_INT_MAP_0_ADDR, data, 3, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp[0] = data[0] & ~int_mask_lookup_table[int_config->int_type];
+        temp[2] = data[2] & ~int_mask_lookup_table[int_config->int_type];
+        switch (int_config->int_channel)
+        {
+            case BMI160_INT_CHANNEL_NONE:
+                data[0] = temp[0];
+                data[2] = temp[2];
+                break;
+            case BMI160_INT_CHANNEL_1:
+                data[0] = temp[0] | int_mask_lookup_table[int_config->int_type];
+                data[2] = temp[2];
+                break;
+            case BMI160_INT_CHANNEL_2:
+                data[2] = temp[2] | int_mask_lookup_table[int_config->int_type];
+                data[0] = temp[0];
+                break;
+            case BMI160_INT_CHANNEL_BOTH:
+                data[0] = temp[0] | int_mask_lookup_table[int_config->int_type];
+                data[2] = temp[2] | int_mask_lookup_table[int_config->int_type];
+                break;
+            default:
+                rslt = BMI160_E_OUT_OF_RANGE;
+        }
+        if (rslt == BMI160_OK)
+        {
+            rslt = bmi160_set_regs(BMI160_INT_MAP_0_ADDR, data, 3, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API is used to map/unmap the Dataready(Accel & Gyro), FIFO full
+ *  and FIFO watermark interrupt.
+ */
+static int8_t map_hardware_interrupt(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    rslt = bmi160_get_regs(BMI160_INT_MAP_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~int_mask_lookup_table[int_config->int_type];
+        temp = temp & ~((uint8_t)(int_mask_lookup_table[int_config->int_type] << 4));
+        switch (int_config->int_channel)
+        {
+            case BMI160_INT_CHANNEL_NONE:
+                data = temp;
+                break;
+            case BMI160_INT_CHANNEL_1:
+                data = temp | (uint8_t)((int_mask_lookup_table[int_config->int_type]) << 4);
+                break;
+            case BMI160_INT_CHANNEL_2:
+                data = temp | int_mask_lookup_table[int_config->int_type];
+                break;
+            case BMI160_INT_CHANNEL_BOTH:
+                data = temp | int_mask_lookup_table[int_config->int_type];
+                data = data | (uint8_t)((int_mask_lookup_table[int_config->int_type]) << 4);
+                break;
+            default:
+                rslt = BMI160_E_OUT_OF_RANGE;
+        }
+        if (rslt == BMI160_OK)
+        {
+            rslt = bmi160_set_regs(BMI160_INT_MAP_1_ADDR, &data, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for any-motion interrupt.
+ */
+static int8_t config_any_motion_src(const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                    const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Configure Int data 1 register to add source of interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_MOTION_SRC_INT_MASK;
+        data = temp | ((any_motion_int_cfg->anymotion_data_src << 7) & BMI160_MOTION_SRC_INT_MASK);
+
+        /* Write data to DATA 1 address */
+        rslt = bmi160_set_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the duration and threshold of
+ * any-motion interrupt.
+ */
+static int8_t config_any_dur_threshold(const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                       const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+    uint8_t data_array[2] = { 0 };
+    uint8_t dur;
+
+    /* Configure Int Motion 0 register */
+    rslt = bmi160_get_regs(BMI160_INT_MOTION_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* slope duration */
+        dur = (uint8_t)any_motion_int_cfg->anymotion_dur;
+        temp = data & ~BMI160_SLOPE_INT_DUR_MASK;
+        data = temp | (dur & BMI160_MOTION_SRC_INT_MASK);
+        data_array[0] = data;
+
+        /* add slope threshold */
+        data_array[1] = any_motion_int_cfg->anymotion_thr;
+
+        /* INT MOTION 0 and INT MOTION 1 address lie consecutively,
+         * hence writing data to respective registers at one go */
+
+        /* Writing to Int_motion 0 and
+         * Int_motion 1 Address simultaneously */
+        rslt = bmi160_set_regs(BMI160_INT_MOTION_0_ADDR, data_array, 2, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure necessary setting of any-motion interrupt.
+ */
+static int8_t config_any_motion_int_settg(const struct bmi160_int_settg *int_config,
+                                          const struct bmi160_acc_any_mot_int_cfg *any_motion_int_cfg,
+                                          const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Configure Interrupt pins */
+    rslt = set_intr_pin_config(int_config, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = disable_sig_motion_int(dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = map_feature_interrupt(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = config_any_motion_src(any_motion_int_cfg, dev);
+                if (rslt == BMI160_OK)
+                {
+                    rslt = config_any_dur_threshold(any_motion_int_cfg, dev);
+                }
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enable the data ready interrupt.
+ */
+static int8_t enable_data_ready_int(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable data ready interrupt in Int Enable 1 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_DATA_RDY_INT_EN_MASK;
+        data = temp | ((1 << 4) & BMI160_DATA_RDY_INT_EN_MASK);
+
+        /* Writing data to INT ENABLE 1 Address */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the no motion/slow motion interrupt.
+ */
+static int8_t enable_no_motion_int(const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                   const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable no motion x, no motion y, no motion z
+     * in Int Enable 2 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        if (no_mot_int_cfg->no_motion_x == 1)
+        {
+            temp = data & ~BMI160_NO_MOTION_X_INT_EN_MASK;
+
+            /* Adding No_motion x axis */
+            data = temp | (1 & BMI160_NO_MOTION_X_INT_EN_MASK);
+        }
+
+        if (no_mot_int_cfg->no_motion_y == 1)
+        {
+            temp = data & ~BMI160_NO_MOTION_Y_INT_EN_MASK;
+
+            /* Adding No_motion x axis */
+            data = temp | ((1 << 1) & BMI160_NO_MOTION_Y_INT_EN_MASK);
+        }
+
+        if (no_mot_int_cfg->no_motion_z == 1)
+        {
+            temp = data & ~BMI160_NO_MOTION_Z_INT_EN_MASK;
+
+            /* Adding No_motion x axis */
+            data = temp | ((1 << 2) & BMI160_NO_MOTION_Z_INT_EN_MASK);
+        }
+
+        /* write data to Int Enable 2 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the interrupt PIN setting for
+ * no motion/slow motion interrupt.
+ */
+static int8_t config_no_motion_int_settg(const struct bmi160_int_settg *int_config,
+                                         const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                         const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Configure Interrupt pins */
+    rslt = set_intr_pin_config(int_config, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = map_feature_interrupt(int_config, dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = config_no_motion_data_src(no_mot_int_cfg, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = config_no_motion_dur_thr(no_mot_int_cfg, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the source of interrupt for no motion.
+ */
+static int8_t config_no_motion_data_src(const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                        const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Configure Int data 1 register to add source of interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_MOTION_SRC_INT_MASK;
+        data = temp | ((no_mot_int_cfg->no_motion_src << 7) & BMI160_MOTION_SRC_INT_MASK);
+
+        /* Write data to DATA 1 address */
+        rslt = bmi160_set_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the duration and threshold of
+ * no motion/slow motion interrupt along with selection of no/slow motion.
+ */
+static int8_t config_no_motion_dur_thr(const struct bmi160_acc_no_motion_int_cfg *no_mot_int_cfg,
+                                       const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+    uint8_t temp_1 = 0;
+    uint8_t reg_addr;
+    uint8_t data_array[2] = { 0 };
+
+    /* Configuring INT_MOTION register */
+    reg_addr = BMI160_INT_MOTION_0_ADDR;
+    rslt = bmi160_get_regs(reg_addr, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_NO_MOTION_INT_DUR_MASK;
+
+        /* Adding no_motion duration */
+        data = temp | ((no_mot_int_cfg->no_motion_dur << 2) & BMI160_NO_MOTION_INT_DUR_MASK);
+
+        /* Write data to NO_MOTION 0 address */
+        rslt = bmi160_set_regs(reg_addr, &data, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            reg_addr = BMI160_INT_MOTION_3_ADDR;
+            rslt = bmi160_get_regs(reg_addr, &data, 1, dev);
+            if (rslt == BMI160_OK)
+            {
+                temp = data & ~BMI160_NO_MOTION_SEL_BIT_MASK;
+
+                /* Adding no_motion_sel bit */
+                temp_1 = (no_mot_int_cfg->no_motion_sel & BMI160_NO_MOTION_SEL_BIT_MASK);
+                data = (temp | temp_1);
+                data_array[1] = data;
+
+                /* Adding no motion threshold */
+                data_array[0] = no_mot_int_cfg->no_motion_thres;
+                reg_addr = BMI160_INT_MOTION_2_ADDR;
+
+                /* writing data to INT_MOTION 2 and INT_MOTION 3
+                 * address simultaneously */
+                rslt = bmi160_set_regs(reg_addr, data_array, 2, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the sig-motion motion interrupt.
+ */
+static int8_t enable_sig_motion_int(const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg, struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* For significant motion,enable any motion x,any motion y,
+     * any motion z in Int Enable 0 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        if (sig_mot_int_cfg->sig_en == BMI160_ENABLE)
+        {
+            temp = data & ~BMI160_SIG_MOTION_INT_EN_MASK;
+            data = temp | (7 & BMI160_SIG_MOTION_INT_EN_MASK);
+
+            /* sig-motion feature selected*/
+            dev->any_sig_sel = BMI160_SIG_MOTION_ENABLED;
+        }
+        else
+        {
+            data = data & ~BMI160_SIG_MOTION_INT_EN_MASK;
+
+            /* neither any-motion feature nor sig-motion selected */
+            dev->any_sig_sel = BMI160_BOTH_ANY_SIG_MOTION_DISABLED;
+        }
+
+        /* write data to Int Enable 0 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the interrupt PIN setting for
+ * significant motion interrupt.
+ */
+static int8_t config_sig_motion_int_settg(const struct bmi160_int_settg *int_config,
+                                          const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg,
+                                          const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Configure Interrupt pins */
+    rslt = set_intr_pin_config(int_config, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = map_feature_interrupt(int_config, dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = config_sig_motion_data_src(sig_mot_int_cfg, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = config_sig_dur_threshold(sig_mot_int_cfg, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for sig motion interrupt.
+ */
+static int8_t config_sig_motion_data_src(const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg,
+                                         const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Configure Int data 1 register to add source of interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_MOTION_SRC_INT_MASK;
+        data = temp | ((sig_mot_int_cfg->sig_data_src << 7) & BMI160_MOTION_SRC_INT_MASK);
+
+        /* Write data to DATA 1 address */
+        rslt = bmi160_set_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the threshold, skip and proof time of
+ * sig motion interrupt.
+ */
+static int8_t config_sig_dur_threshold(const struct bmi160_acc_sig_mot_int_cfg *sig_mot_int_cfg,
+                                       const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data;
+    uint8_t temp = 0;
+
+    /* Configuring INT_MOTION registers */
+
+    /* Write significant motion threshold.
+     * This threshold is same as any motion threshold */
+    data = sig_mot_int_cfg->sig_mot_thres;
+
+    /* Write data to INT_MOTION 1 address */
+    rslt = bmi160_set_regs(BMI160_INT_MOTION_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = bmi160_get_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            temp = data & ~BMI160_SIG_MOTION_SKIP_MASK;
+
+            /* adding skip time of sig_motion interrupt*/
+            data = temp | ((sig_mot_int_cfg->sig_mot_skip << 2) & BMI160_SIG_MOTION_SKIP_MASK);
+            temp = data & ~BMI160_SIG_MOTION_PROOF_MASK;
+
+            /* adding proof time of sig_motion interrupt */
+            data = temp | ((sig_mot_int_cfg->sig_mot_proof << 4) & BMI160_SIG_MOTION_PROOF_MASK);
+
+            /* configure the int_sig_mot_sel bit to select
+             * significant motion interrupt */
+            temp = data & ~BMI160_SIG_MOTION_SEL_MASK;
+            data = temp | ((sig_mot_int_cfg->sig_en << 1) & BMI160_SIG_MOTION_SEL_MASK);
+            rslt = bmi160_set_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the step detector interrupt.
+ */
+static int8_t enable_step_detect_int(const struct bmi160_acc_step_detect_int_cfg *step_detect_int_cfg,
+                                     const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable data ready interrupt in Int Enable 2 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_STEP_DETECT_INT_EN_MASK;
+        data = temp | ((step_detect_int_cfg->step_detector_en << 3) & BMI160_STEP_DETECT_INT_EN_MASK);
+
+        /* Writing data to INT ENABLE 2 Address */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the step detector parameter.
+ */
+static int8_t config_step_detect(const struct bmi160_acc_step_detect_int_cfg *step_detect_int_cfg,
+                                 const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t data_array[2] = { 0 };
+
+    if (step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_NORMAL)
+    {
+        /* Normal mode setting */
+        data_array[0] = 0x15;
+        data_array[1] = 0x03;
+    }
+    else if (step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_SENSITIVE)
+    {
+        /* Sensitive mode setting */
+        data_array[0] = 0x2D;
+        data_array[1] = 0x00;
+    }
+    else if (step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_ROBUST)
+    {
+        /* Robust mode setting */
+        data_array[0] = 0x1D;
+        data_array[1] = 0x07;
+    }
+    else if (step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_USER_DEFINE)
+    {
+        /* Non recommended User defined setting */
+        /* Configuring STEP_CONFIG register */
+        rslt = bmi160_get_regs(BMI160_INT_STEP_CONFIG_0_ADDR, &data_array[0], 2, dev);
+        if (rslt == BMI160_OK)
+        {
+            temp = data_array[0] & ~BMI160_STEP_DETECT_MIN_THRES_MASK;
+
+            /* Adding min_threshold */
+            data_array[0] = temp | ((step_detect_int_cfg->min_threshold << 3) & BMI160_STEP_DETECT_MIN_THRES_MASK);
+            temp = data_array[0] & ~BMI160_STEP_DETECT_STEPTIME_MIN_MASK;
+
+            /* Adding steptime_min */
+            data_array[0] = temp | ((step_detect_int_cfg->steptime_min) & BMI160_STEP_DETECT_STEPTIME_MIN_MASK);
+            temp = data_array[1] & ~BMI160_STEP_MIN_BUF_MASK;
+
+            /* Adding steptime_min */
+            data_array[1] = temp | ((step_detect_int_cfg->step_min_buf) & BMI160_STEP_MIN_BUF_MASK);
+        }
+    }
+
+    /* Write data to STEP_CONFIG register */
+    rslt = bmi160_set_regs(BMI160_INT_STEP_CONFIG_0_ADDR, data_array, 2, dev);
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the single/double tap interrupt.
+ */
+static int8_t enable_tap_int(const struct bmi160_int_settg *int_config,
+                             const struct bmi160_acc_tap_int_cfg *tap_int_cfg,
+                             const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable single tap or double tap interrupt in Int Enable 0 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        if (int_config->int_type == BMI160_ACC_SINGLE_TAP_INT)
+        {
+            temp = data & ~BMI160_SINGLE_TAP_INT_EN_MASK;
+            data = temp | ((tap_int_cfg->tap_en << 5) & BMI160_SINGLE_TAP_INT_EN_MASK);
+        }
+        else
+        {
+            temp = data & ~BMI160_DOUBLE_TAP_INT_EN_MASK;
+            data = temp | ((tap_int_cfg->tap_en << 4) & BMI160_DOUBLE_TAP_INT_EN_MASK);
+        }
+
+        /* Write to Enable 0 Address */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the interrupt PIN setting for
+ * tap interrupt.
+ */
+static int8_t config_tap_int_settg(const struct bmi160_int_settg *int_config,
+                                   const struct bmi160_acc_tap_int_cfg *tap_int_cfg,
+                                   const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Configure Interrupt pins */
+    rslt = set_intr_pin_config(int_config, dev);
+    if (rslt == BMI160_OK)
+    {
+        rslt = map_feature_interrupt(int_config, dev);
+        if (rslt == BMI160_OK)
+        {
+            rslt = config_tap_data_src(tap_int_cfg, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = config_tap_param(int_config, tap_int_cfg, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for tap interrupt.
+ */
+static int8_t config_tap_data_src(const struct bmi160_acc_tap_int_cfg *tap_int_cfg, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Configure Int data 0 register to add source of interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_TAP_SRC_INT_MASK;
+        data = temp | ((tap_int_cfg->tap_data_src << 3) & BMI160_TAP_SRC_INT_MASK);
+
+        /* Write data to Data 0 address */
+        rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the  parameters of tap interrupt.
+ * Threshold, quite, shock, and duration.
+ */
+static int8_t config_tap_param(const struct bmi160_int_settg *int_config,
+                               const struct bmi160_acc_tap_int_cfg *tap_int_cfg,
+                               const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t data = 0;
+    uint8_t data_array[2] = { 0 };
+    uint8_t count = 0;
+    uint8_t dur, shock, quiet, thres;
+
+    /* Configure tap 0 register for tap shock,tap quiet duration
+     * in case of single tap interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_TAP_0_ADDR, data_array, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        data = data_array[count];
+        if (int_config->int_type == BMI160_ACC_DOUBLE_TAP_INT)
+        {
+            dur = (uint8_t)tap_int_cfg->tap_dur;
+            temp = (data & ~BMI160_TAP_DUR_MASK);
+
+            /* Add tap duration data in case of
+             * double tap interrupt */
+            data = temp | (dur & BMI160_TAP_DUR_MASK);
+        }
+
+        shock = (uint8_t)tap_int_cfg->tap_shock;
+        temp = data & ~BMI160_TAP_SHOCK_DUR_MASK;
+        data = temp | ((shock << 6) & BMI160_TAP_SHOCK_DUR_MASK);
+        quiet = (uint8_t)tap_int_cfg->tap_quiet;
+        temp = data & ~BMI160_TAP_QUIET_DUR_MASK;
+        data = temp | ((quiet << 7) & BMI160_TAP_QUIET_DUR_MASK);
+        data_array[count++] = data;
+        data = data_array[count];
+        thres = (uint8_t)tap_int_cfg->tap_thr;
+        temp = data & ~BMI160_TAP_THRES_MASK;
+        data = temp | (thres & BMI160_TAP_THRES_MASK);
+        data_array[count++] = data;
+
+        /* TAP 0 and TAP 1 address lie consecutively,
+         * hence writing data to respective registers at one go */
+
+        /* Writing to Tap 0 and Tap 1 Address simultaneously */
+        rslt = bmi160_set_regs(BMI160_INT_TAP_0_ADDR, data_array, count, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the secondary interface.
+ */
+static int8_t config_sec_if(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t if_conf = 0;
+    uint8_t cmd = BMI160_AUX_NORMAL_MODE;
+
+    /* set the aux power mode to normal*/
+    rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &cmd, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* 0.5ms delay - refer datasheet table 24*/
+        dev->delay_ms(1);
+        rslt = bmi160_get_regs(BMI160_IF_CONF_ADDR, &if_conf, 1, dev);
+        if_conf |= (uint8_t)(1 << 5);
+        if (rslt == BMI160_OK)
+        {
+            /*enable the secondary interface also*/
+            rslt = bmi160_set_regs(BMI160_IF_CONF_ADDR, &if_conf, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the ODR of the auxiliary sensor.
+ */
+static int8_t config_aux_odr(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t aux_odr;
+
+    rslt = bmi160_get_regs(BMI160_AUX_ODR_ADDR, &aux_odr, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        aux_odr = (uint8_t)(dev->aux_cfg.aux_odr);
+
+        /* Set the secondary interface ODR
+         * i.e polling rate of secondary sensor */
+        rslt = bmi160_set_regs(BMI160_AUX_ODR_ADDR, &aux_odr, 1, dev);
+        dev->delay_ms(BMI160_AUX_COM_DELAY);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API maps the actual burst read length set by user.
+ */
+static int8_t map_read_len(uint16_t *len, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    switch (dev->aux_cfg.aux_rd_burst_len)
+    {
+        case BMI160_AUX_READ_LEN_0:
+            *len = 1;
+            break;
+        case BMI160_AUX_READ_LEN_1:
+            *len = 2;
+            break;
+        case BMI160_AUX_READ_LEN_2:
+            *len = 6;
+            break;
+        case BMI160_AUX_READ_LEN_3:
+            *len = 8;
+            break;
+        default:
+            rslt = BMI160_E_INVALID_INPUT;
+            break;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the settings of auxiliary sensor.
+ */
+static int8_t config_aux_settg(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    rslt = config_sec_if(dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Configures the auxiliary interface settings */
+        rslt = bmi160_config_aux_mode(dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API extract the read data from auxiliary sensor.
+ */
+static int8_t extract_aux_read(uint16_t map_len,
+                               uint8_t reg_addr,
+                               uint8_t *aux_data,
+                               uint16_t len,
+                               const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+    uint8_t data[8] = { 0, };
+    uint8_t read_addr = BMI160_AUX_DATA_ADDR;
+    uint8_t count = 0;
+    uint8_t read_count;
+    uint8_t read_len = (uint8_t)map_len;
+
+    for (; count < len;)
+    {
+        /* set address to read */
+        rslt = bmi160_set_regs(BMI160_AUX_IF_2_ADDR, &reg_addr, 1, dev);
+        dev->delay_ms(BMI160_AUX_COM_DELAY);
+        if (rslt == BMI160_OK)
+        {
+            rslt = bmi160_get_regs(read_addr, data, map_len, dev);
+            if (rslt == BMI160_OK)
+            {
+                read_count = 0;
+
+                /* if read len is less the burst read len
+                 * mention by user*/
+                if (len < map_len)
+                {
+                    read_len = (uint8_t)len;
+                }
+                else if ((len - count) < map_len)
+                {
+                    read_len = (uint8_t)(len - count);
+                }
+
+                for (; read_count < read_len; read_count++)
+                {
+                    aux_data[count + read_count] = data[read_count];
+                }
+
+                reg_addr += (uint8_t)map_len;
+                count += (uint8_t)map_len;
+            }
+            else
+            {
+                rslt = BMI160_E_COM_FAIL;
+                break;
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the orient interrupt.
+ */
+static int8_t enable_orient_int(const struct bmi160_acc_orient_int_cfg *orient_int_cfg, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable data ready interrupt in Int Enable 0 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_ORIENT_INT_EN_MASK;
+        data = temp | ((orient_int_cfg->orient_en << 6) & BMI160_ORIENT_INT_EN_MASK);
+
+        /* write data to Int Enable 0 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the necessary setting of orientation interrupt.
+ */
+static int8_t config_orient_int_settg(const struct bmi160_acc_orient_int_cfg *orient_int_cfg,
+                                      const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+    uint8_t data_array[2] = { 0, 0 };
+
+    /* Configuring INT_ORIENT registers */
+    rslt = bmi160_get_regs(BMI160_INT_ORIENT_0_ADDR, data_array, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        data = data_array[0];
+        temp = data & ~BMI160_ORIENT_MODE_MASK;
+
+        /* Adding Orientation mode */
+        data = temp | ((orient_int_cfg->orient_mode) & BMI160_ORIENT_MODE_MASK);
+        temp = data & ~BMI160_ORIENT_BLOCK_MASK;
+
+        /* Adding Orientation blocking */
+        data = temp | ((orient_int_cfg->orient_blocking << 2) & BMI160_ORIENT_BLOCK_MASK);
+        temp = data & ~BMI160_ORIENT_HYST_MASK;
+
+        /* Adding Orientation hysteresis */
+        data = temp | ((orient_int_cfg->orient_hyst << 4) & BMI160_ORIENT_HYST_MASK);
+        data_array[0] = data;
+        data = data_array[1];
+        temp = data & ~BMI160_ORIENT_THETA_MASK;
+
+        /* Adding Orientation threshold */
+        data = temp | ((orient_int_cfg->orient_theta) & BMI160_ORIENT_THETA_MASK);
+        temp = data & ~BMI160_ORIENT_UD_ENABLE;
+
+        /* Adding Orient_ud_en */
+        data = temp | ((orient_int_cfg->orient_ud_en << 6) & BMI160_ORIENT_UD_ENABLE);
+        temp = data & ~BMI160_AXES_EN_MASK;
+
+        /* Adding axes_en */
+        data = temp | ((orient_int_cfg->axes_ex << 7) & BMI160_AXES_EN_MASK);
+        data_array[1] = data;
+
+        /* Writing data to INT_ORIENT 0 and INT_ORIENT 1
+         * registers simultaneously */
+        rslt = bmi160_set_regs(BMI160_INT_ORIENT_0_ADDR, data_array, 2, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the flat interrupt.
+ */
+static int8_t enable_flat_int(const struct bmi160_acc_flat_detect_int_cfg *flat_int, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable flat interrupt in Int Enable 0 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_FLAT_INT_EN_MASK;
+        data = temp | ((flat_int->flat_en << 7) & BMI160_FLAT_INT_EN_MASK);
+
+        /* write data to Int Enable 0 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the necessary setting of flat interrupt.
+ */
+static int8_t config_flat_int_settg(const struct bmi160_acc_flat_detect_int_cfg *flat_int, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+    uint8_t data_array[2] = { 0, 0 };
+
+    /* Configuring INT_FLAT register */
+    rslt = bmi160_get_regs(BMI160_INT_FLAT_0_ADDR, data_array, 2, dev);
+    if (rslt == BMI160_OK)
+    {
+        data = data_array[0];
+        temp = data & ~BMI160_FLAT_THRES_MASK;
+
+        /* Adding flat theta */
+        data = temp | ((flat_int->flat_theta) & BMI160_FLAT_THRES_MASK);
+        data_array[0] = data;
+        data = data_array[1];
+        temp = data & ~BMI160_FLAT_HOLD_TIME_MASK;
+
+        /* Adding flat hold time */
+        data = temp | ((flat_int->flat_hold_time << 4) & BMI160_FLAT_HOLD_TIME_MASK);
+        temp = data & ~BMI160_FLAT_HYST_MASK;
+
+        /* Adding flat hysteresis */
+        data = temp | ((flat_int->flat_hy) & BMI160_FLAT_HYST_MASK);
+        data_array[1] = data;
+
+        /* Writing data to INT_FLAT 0 and INT_FLAT 1
+         * registers simultaneously */
+        rslt = bmi160_set_regs(BMI160_INT_FLAT_0_ADDR, data_array, 2, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the Low-g interrupt.
+ */
+static int8_t enable_low_g_int(const struct bmi160_acc_low_g_int_cfg *low_g_int, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable low-g interrupt in Int Enable 1 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_LOW_G_INT_EN_MASK;
+        data = temp | ((low_g_int->low_en << 3) & BMI160_LOW_G_INT_EN_MASK);
+
+        /* write data to Int Enable 0 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for low-g interrupt.
+ */
+static int8_t config_low_g_data_src(const struct bmi160_acc_low_g_int_cfg *low_g_int, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Configure Int data 0 register to add source of interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_LOW_HIGH_SRC_INT_MASK;
+        data = temp | ((low_g_int->low_data_src << 7) & BMI160_LOW_HIGH_SRC_INT_MASK);
+
+        /* Write data to Data 0 address */
+        rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the necessary setting of low-g interrupt.
+ */
+static int8_t config_low_g_int_settg(const struct bmi160_acc_low_g_int_cfg *low_g_int, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t data_array[3] = { 0, 0, 0 };
+
+    /* Configuring INT_LOWHIGH register for low-g interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_LOWHIGH_2_ADDR, &data_array[2], 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data_array[2] & ~BMI160_LOW_G_HYST_MASK;
+
+        /* Adding low-g hysteresis */
+        data_array[2] = temp | (low_g_int->low_hyst & BMI160_LOW_G_HYST_MASK);
+        temp = data_array[2] & ~BMI160_LOW_G_LOW_MODE_MASK;
+
+        /* Adding low-mode */
+        data_array[2] = temp | ((low_g_int->low_mode << 2) & BMI160_LOW_G_LOW_MODE_MASK);
+
+        /* Adding low-g threshold */
+        data_array[1] = low_g_int->low_thres;
+
+        /* Adding low-g interrupt delay */
+        data_array[0] = low_g_int->low_dur;
+
+        /* Writing data to INT_LOWHIGH 0,1,2 registers simultaneously*/
+        rslt = bmi160_set_regs(BMI160_INT_LOWHIGH_0_ADDR, data_array, 3, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the high-g interrupt.
+ */
+static int8_t enable_high_g_int(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Enable low-g interrupt in Int Enable 1 register */
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Adding high-g X-axis */
+        temp = data & ~BMI160_HIGH_G_X_INT_EN_MASK;
+        data = temp | (high_g_int_cfg->high_g_x & BMI160_HIGH_G_X_INT_EN_MASK);
+
+        /* Adding high-g Y-axis */
+        temp = data & ~BMI160_HIGH_G_Y_INT_EN_MASK;
+        data = temp | ((high_g_int_cfg->high_g_y << 1) & BMI160_HIGH_G_Y_INT_EN_MASK);
+
+        /* Adding high-g Z-axis */
+        temp = data & ~BMI160_HIGH_G_Z_INT_EN_MASK;
+        data = temp | ((high_g_int_cfg->high_g_z << 2) & BMI160_HIGH_G_Z_INT_EN_MASK);
+
+        /* write data to Int Enable 0 register */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the source of data(filter & pre-filter)
+ * for high-g interrupt.
+ */
+static int8_t config_high_g_data_src(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg,
+                                     const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+    uint8_t temp = 0;
+
+    /* Configure Int data 0 register to add source of interrupt */
+    rslt = bmi160_get_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data & ~BMI160_LOW_HIGH_SRC_INT_MASK;
+        data = temp | ((high_g_int_cfg->high_data_src << 7) & BMI160_LOW_HIGH_SRC_INT_MASK);
+
+        /* Write data to Data 0 address */
+        rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the necessary setting of high-g interrupt.
+ */
+static int8_t config_high_g_int_settg(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg,
+                                      const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t data_array[3] = { 0, 0, 0 };
+
+    rslt = bmi160_get_regs(BMI160_INT_LOWHIGH_2_ADDR, &data_array[0], 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        temp = data_array[0] & ~BMI160_HIGH_G_HYST_MASK;
+
+        /* Adding high-g hysteresis */
+        data_array[0] = temp | ((high_g_int_cfg->high_hy << 6) & BMI160_HIGH_G_HYST_MASK);
+
+        /* Adding high-g duration */
+        data_array[1] = high_g_int_cfg->high_dur;
+
+        /* Adding high-g threshold */
+        data_array[2] = high_g_int_cfg->high_thres;
+        rslt = bmi160_set_regs(BMI160_INT_LOWHIGH_2_ADDR, data_array, 3, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the behavioural setting of interrupt pin.
+ */
+static int8_t config_int_out_ctrl(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t data = 0;
+
+    /* Configuration of output interrupt signals on pins INT1 and INT2 are
+     * done in BMI160_INT_OUT_CTRL_ADDR register*/
+    rslt = bmi160_get_regs(BMI160_INT_OUT_CTRL_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* updating the interrupt pin structure to local structure */
+        const struct bmi160_int_pin_settg *intr_pin_sett = &(int_config->int_pin_settg);
+
+        /* Configuring channel 1 */
+        if (int_config->int_channel == BMI160_INT_CHANNEL_1)
+        {
+            /* Output enable */
+            temp = data & ~BMI160_INT1_OUTPUT_EN_MASK;
+            data = temp | ((intr_pin_sett->output_en << 3) & BMI160_INT1_OUTPUT_EN_MASK);
+
+            /* Output mode */
+            temp = data & ~BMI160_INT1_OUTPUT_MODE_MASK;
+            data = temp | ((intr_pin_sett->output_mode << 2) & BMI160_INT1_OUTPUT_MODE_MASK);
+
+            /* Output type */
+            temp = data & ~BMI160_INT1_OUTPUT_TYPE_MASK;
+            data = temp | ((intr_pin_sett->output_type << 1) & BMI160_INT1_OUTPUT_TYPE_MASK);
+
+            /* edge control */
+            temp = data & ~BMI160_INT1_EDGE_CTRL_MASK;
+            data = temp | ((intr_pin_sett->edge_ctrl) & BMI160_INT1_EDGE_CTRL_MASK);
+        }
+        else
+        {
+            /* Configuring channel 2 */
+            /* Output enable */
+            temp = data & ~BMI160_INT2_OUTPUT_EN_MASK;
+            data = temp | ((intr_pin_sett->output_en << 7) & BMI160_INT2_OUTPUT_EN_MASK);
+
+            /* Output mode */
+            temp = data & ~BMI160_INT2_OUTPUT_MODE_MASK;
+            data = temp | ((intr_pin_sett->output_mode << 6) & BMI160_INT2_OUTPUT_MODE_MASK);
+
+            /* Output type */
+            temp = data & ~BMI160_INT2_OUTPUT_TYPE_MASK;
+            data = temp | ((intr_pin_sett->output_type << 5) & BMI160_INT2_OUTPUT_TYPE_MASK);
+
+            /* edge control */
+            temp = data & ~BMI160_INT2_EDGE_CTRL_MASK;
+            data = temp | ((intr_pin_sett->edge_ctrl << 4) & BMI160_INT2_EDGE_CTRL_MASK);
+        }
+
+        rslt = bmi160_set_regs(BMI160_INT_OUT_CTRL_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API configure the mode(input enable, latch or non-latch) of interrupt pin.
+ */
+static int8_t config_int_latch(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t temp = 0;
+    uint8_t data = 0;
+
+    /* Configuration of latch on pins INT1 and INT2 are done in
+     * BMI160_INT_LATCH_ADDR register*/
+    rslt = bmi160_get_regs(BMI160_INT_LATCH_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* updating the interrupt pin structure to local structure */
+        const struct bmi160_int_pin_settg *intr_pin_sett = &(int_config->int_pin_settg);
+        if (int_config->int_channel == BMI160_INT_CHANNEL_1)
+        {
+            /* Configuring channel 1 */
+            /* Input enable */
+            temp = data & ~BMI160_INT1_INPUT_EN_MASK;
+            data = temp | ((intr_pin_sett->input_en << 4) & BMI160_INT1_INPUT_EN_MASK);
+        }
+        else
+        {
+            /* Configuring channel 2 */
+            /* Input enable */
+            temp = data & ~BMI160_INT2_INPUT_EN_MASK;
+            data = temp | ((intr_pin_sett->input_en << 5) & BMI160_INT2_INPUT_EN_MASK);
+        }
+
+        /* In case of latch interrupt,update the latch duration */
+
+        /* Latching holds the interrupt for the amount of latch
+         * duration time */
+        temp = data & ~BMI160_INT_LATCH_MASK;
+        data = temp | (intr_pin_sett->latch_dur & BMI160_INT_LATCH_MASK);
+
+        /* OUT_CTRL_INT and LATCH_INT address lie consecutively,
+         * hence writing data to respective registers at one go */
+        rslt = bmi160_set_regs(BMI160_INT_LATCH_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API performs the self test for accelerometer of BMI160
+ */
+static int8_t perform_accel_self_test(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    struct bmi160_sensor_data accel_pos, accel_neg;
+
+    /* Enable Gyro self test bit */
+    rslt = enable_accel_self_test(dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Perform accel self test with positive excitation */
+        rslt = accel_self_test_positive_excitation(&accel_pos, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Perform accel self test with negative excitation */
+            rslt = accel_self_test_negative_excitation(&accel_neg, dev);
+            if (rslt == BMI160_OK)
+            {
+                /* Validate the self test result */
+                rslt = validate_accel_self_test(&accel_pos, &accel_neg);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables to perform the accel self test by setting proper
+ * configurations to facilitate accel self test
+ */
+static int8_t enable_accel_self_test(struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t reg_data;
+
+    /* Set the Accel power mode as normal mode */
+    dev->accel_cfg.power = BMI160_ACCEL_NORMAL_MODE;
+
+    /* Set the sensor range configuration as 8G */
+    dev->accel_cfg.range = BMI160_ACCEL_RANGE_8G;
+    rslt = bmi160_set_sens_conf(dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Accel configurations are set to facilitate self test
+         * acc_odr - 1600Hz ; acc_bwp = 2 ; acc_us = 0 */
+        reg_data = BMI160_ACCEL_SELF_TEST_CONFIG;
+        rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, &reg_data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API performs accel self test with positive excitation
+ */
+static int8_t accel_self_test_positive_excitation(struct bmi160_sensor_data *accel_pos, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t reg_data;
+
+    /* Enable accel self test with positive self-test excitation
+     * and with amplitude of deflection set as high */
+    reg_data = BMI160_ACCEL_SELF_TEST_POSITIVE_EN;
+    rslt = bmi160_set_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Read the data after a delay of 50ms - refer datasheet  2.8.1 accel self test*/
+        dev->delay_ms(BMI160_ACCEL_SELF_TEST_DELAY);
+        rslt = bmi160_get_sensor_data(BMI160_ACCEL_ONLY, accel_pos, NULL, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API performs accel self test with negative excitation
+ */
+static int8_t accel_self_test_negative_excitation(struct bmi160_sensor_data *accel_neg, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t reg_data;
+
+    /* Enable accel self test with negative self-test excitation
+     * and with amplitude of deflection set as high */
+    reg_data = BMI160_ACCEL_SELF_TEST_NEGATIVE_EN;
+    rslt = bmi160_set_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Read the data after a delay of 50ms */
+        dev->delay_ms(BMI160_ACCEL_SELF_TEST_DELAY);
+        rslt = bmi160_get_sensor_data(BMI160_ACCEL_ONLY, accel_neg, NULL, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API validates the accel self test results
+ */
+static int8_t validate_accel_self_test(const struct bmi160_sensor_data *accel_pos,
+                                       const struct bmi160_sensor_data *accel_neg)
+{
+    int8_t rslt;
+
+    /* Validate the results of self test */
+    if (((accel_neg->x - accel_pos->x) > BMI160_ACCEL_SELF_TEST_LIMIT) &&
+        ((accel_neg->y - accel_pos->y) > BMI160_ACCEL_SELF_TEST_LIMIT) &&
+        ((accel_neg->z - accel_pos->z) > BMI160_ACCEL_SELF_TEST_LIMIT))
+    {
+        /* Self test pass condition */
+        rslt = BMI160_OK;
+    }
+    else
+    {
+        rslt = BMI160_W_ACCEl_SELF_TEST_FAIL;
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API performs the self test for gyroscope of BMI160
+ */
+static int8_t perform_gyro_self_test(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+
+    /* Enable Gyro self test bit */
+    rslt = enable_gyro_self_test(dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Validate the gyro self test a delay of 50ms */
+        dev->delay_ms(50);
+
+        /* Validate the gyro self test results */
+        rslt = validate_gyro_self_test(dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API enables the self test bit to trigger self test for Gyro
+ */
+static int8_t enable_gyro_self_test(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t reg_data;
+
+    /* Enable the Gyro self test bit to trigger the self test */
+    rslt = bmi160_get_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        reg_data = BMI160_SET_BITS(reg_data, BMI160_GYRO_SELF_TEST, 1);
+        rslt = bmi160_set_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Delay to enable gyro self test */
+            dev->delay_ms(15);
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This API validates the self test results of Gyro
+ */
+static int8_t validate_gyro_self_test(const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t reg_data;
+
+    /* Validate the Gyro self test result */
+    rslt = bmi160_get_regs(BMI160_STATUS_ADDR, &reg_data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+
+        reg_data = BMI160_GET_BITS(reg_data, BMI160_GYRO_SELF_TEST_STATUS);
+        if (reg_data == BMI160_ENABLE)
+        {
+            /* Gyro self test success case */
+            rslt = BMI160_OK;
+        }
+        else
+        {
+            rslt = BMI160_W_GYRO_SELF_TEST_FAIL;
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API sets FIFO full interrupt of the sensor.This interrupt
+ *  occurs when the FIFO is full and the next full data sample would cause
+ *  a FIFO overflow, which may delete the old samples.
+ */
+static int8_t set_fifo_full_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    /* Null-pointer check */
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /*enable the fifo full interrupt */
+        rslt = enable_fifo_full_int(int_config, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = map_hardware_interrupt(int_config, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This enable the FIFO full interrupt engine.
+ */
+static int8_t enable_fifo_full_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        data = BMI160_SET_BITS(data, BMI160_FIFO_FULL_INT, int_config->fifo_full_int_en);
+
+        /* Writing data to INT ENABLE 1 Address */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API sets FIFO watermark interrupt of the sensor.The FIFO
+ *  watermark interrupt is fired, when the FIFO fill level is above a fifo
+ *  watermark.
+ */
+static int8_t set_fifo_watermark_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt = BMI160_OK;
+
+    if ((dev == NULL) || (dev->delay_ms == NULL))
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Enable fifo-watermark interrupt in Int Enable 1 register */
+        rslt = enable_fifo_wtm_int(int_config, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Configure Interrupt pins */
+            rslt = set_intr_pin_config(int_config, dev);
+            if (rslt == BMI160_OK)
+            {
+                rslt = map_hardware_interrupt(int_config, dev);
+            }
+        }
+    }
+
+    return rslt;
+}
+
+/*!
+ * @brief This enable the FIFO watermark interrupt engine.
+ */
+static int8_t enable_fifo_wtm_int(const struct bmi160_int_settg *int_config, const struct bmi160_dev *dev)
+{
+    int8_t rslt;
+    uint8_t data = 0;
+
+    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        data = BMI160_SET_BITS(data, BMI160_FIFO_WTM_INT, int_config->fifo_wtm_int_en);
+
+        /* Writing data to INT ENABLE 1 Address */
+        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API is used to reset the FIFO related configurations
+ *  in the fifo_frame structure.
+ */
+static void reset_fifo_data_structure(const struct bmi160_dev *dev)
+{
+    /*Prepare for next FIFO read by resetting FIFO's
+     * internal data structures*/
+    dev->fifo->accel_byte_start_idx = 0;
+    dev->fifo->gyro_byte_start_idx = 0;
+    dev->fifo->aux_byte_start_idx = 0;
+    dev->fifo->sensor_time = 0;
+    dev->fifo->skipped_frame_count = 0;
+}
+
+/*!
+ *  @brief This API is used to read fifo_byte_counter value (i.e)
+ *  current fill-level in Fifo buffer.
+ */
+static int8_t get_fifo_byte_counter(uint16_t *bytes_to_read, struct bmi160_dev const *dev)
+{
+    int8_t rslt = 0;
+    uint8_t data[2];
+    uint8_t addr = BMI160_FIFO_LENGTH_ADDR;
+
+    rslt |= bmi160_get_regs(addr, data, 2, dev);
+    data[1] = data[1] & BMI160_FIFO_BYTE_COUNTER_MASK;
+
+    /* Available data in FIFO is stored in bytes_to_read*/
+    *bytes_to_read = (((uint16_t)data[1] << 8) | ((uint16_t)data[0]));
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API is used to compute the number of bytes of accel FIFO data
+ *  which is to be parsed in header-less mode
+ */
+static void get_accel_len_to_parse(uint16_t *data_index,
+                                   uint16_t *data_read_length,
+                                   const uint8_t *acc_frame_count,
+                                   const struct bmi160_dev *dev)
+{
+    /* Data start index */
+    *data_index = dev->fifo->accel_byte_start_idx;
+    if (dev->fifo->fifo_data_enable == BMI160_FIFO_A_ENABLE)
+    {
+        *data_read_length = (*acc_frame_count) * BMI160_FIFO_A_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_G_A_ENABLE)
+    {
+        *data_read_length = (*acc_frame_count) * BMI160_FIFO_GA_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_A_ENABLE)
+    {
+        *data_read_length = (*acc_frame_count) * BMI160_FIFO_MA_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_A_ENABLE)
+    {
+        *data_read_length = (*acc_frame_count) * BMI160_FIFO_MGA_LENGTH;
+    }
+    else
+    {
+        /* When accel is not enabled ,there will be no accel data.
+         * so we update the data index as complete */
+        *data_index = dev->fifo->length;
+    }
+
+    if (*data_read_length > dev->fifo->length)
+    {
+        /* Handling the case where more data is requested
+         * than that is available*/
+        *data_read_length = dev->fifo->length;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse the accelerometer data from the
+ *  FIFO data in both header mode and header-less mode.
+ *  It updates the idx value which is used to store the index of
+ *  the current data byte which is parsed.
+ */
+static void unpack_accel_frame(struct bmi160_sensor_data *acc,
+                               uint16_t *idx,
+                               uint8_t *acc_idx,
+                               uint8_t frame_info,
+                               const struct bmi160_dev *dev)
+{
+    switch (frame_info)
+    {
+        case BMI160_FIFO_HEAD_A:
+        case BMI160_FIFO_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_A_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into the structure instance "acc" */
+            unpack_accel_data(&acc[*acc_idx], *idx, dev);
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_A_LENGTH;
+            (*acc_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_G_A:
+        case BMI160_FIFO_G_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_GA_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into structure instance "acc"*/
+            unpack_accel_data(&acc[*acc_idx], *idx + BMI160_FIFO_G_LENGTH, dev);
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_GA_LENGTH;
+            (*acc_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_M_A:
+        case BMI160_FIFO_M_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_MA_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into structure instance "acc"*/
+            unpack_accel_data(&acc[*acc_idx], *idx + BMI160_FIFO_M_LENGTH, dev);
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_MA_LENGTH;
+            (*acc_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_M_G_A:
+        case BMI160_FIFO_M_G_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_MGA_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into structure instance "acc"*/
+            unpack_accel_data(&acc[*acc_idx], *idx + BMI160_FIFO_MG_LENGTH, dev);
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_MGA_LENGTH;
+            (*acc_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_M:
+        case BMI160_FIFO_M_ENABLE:
+            (*idx) = (*idx) + BMI160_FIFO_M_LENGTH;
+            break;
+        case BMI160_FIFO_HEAD_G:
+        case BMI160_FIFO_G_ENABLE:
+            (*idx) = (*idx) + BMI160_FIFO_G_LENGTH;
+            break;
+        case BMI160_FIFO_HEAD_M_G:
+        case BMI160_FIFO_M_G_ENABLE:
+            (*idx) = (*idx) + BMI160_FIFO_MG_LENGTH;
+            break;
+        default:
+            break;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse the accelerometer data from the
+ *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
+ */
+static void unpack_accel_data(struct bmi160_sensor_data *accel_data,
+                              uint16_t data_start_index,
+                              const struct bmi160_dev *dev)
+{
+    uint16_t data_lsb;
+    uint16_t data_msb;
+
+    /* Accel raw x data */
+    data_lsb = dev->fifo->data[data_start_index++];
+    data_msb = dev->fifo->data[data_start_index++];
+    accel_data->x = (int16_t)((data_msb << 8) | data_lsb);
+
+    /* Accel raw y data */
+    data_lsb = dev->fifo->data[data_start_index++];
+    data_msb = dev->fifo->data[data_start_index++];
+    accel_data->y = (int16_t)((data_msb << 8) | data_lsb);
+
+    /* Accel raw z data */
+    data_lsb = dev->fifo->data[data_start_index++];
+    data_msb = dev->fifo->data[data_start_index++];
+    accel_data->z = (int16_t)((data_msb << 8) | data_lsb);
+}
+
+/*!
+ *  @brief This API is used to parse the accelerometer data from the
+ *  FIFO data in header mode.
+ */
+static void extract_accel_header_mode(struct bmi160_sensor_data *accel_data,
+                                      uint8_t *accel_length,
+                                      const struct bmi160_dev *dev)
+{
+    uint8_t frame_header = 0;
+    uint16_t data_index;
+    uint8_t accel_index = 0;
+
+    for (data_index = dev->fifo->accel_byte_start_idx; data_index < dev->fifo->length;)
+    {
+        /* extracting Frame header */
+        frame_header = (dev->fifo->data[data_index] & BMI160_FIFO_TAG_INTR_MASK);
+
+        /*Index is moved to next byte where the data is starting*/
+        data_index++;
+        switch (frame_header)
+        {
+            /* Accel frame */
+            case BMI160_FIFO_HEAD_A:
+            case BMI160_FIFO_HEAD_M_A:
+            case BMI160_FIFO_HEAD_G_A:
+            case BMI160_FIFO_HEAD_M_G_A:
+                unpack_accel_frame(accel_data, &data_index, &accel_index, frame_header, dev);
+                break;
+            case BMI160_FIFO_HEAD_M:
+                move_next_frame(&data_index, BMI160_FIFO_M_LENGTH, dev);
+                break;
+            case BMI160_FIFO_HEAD_G:
+                move_next_frame(&data_index, BMI160_FIFO_G_LENGTH, dev);
+                break;
+            case BMI160_FIFO_HEAD_M_G:
+                move_next_frame(&data_index, BMI160_FIFO_MG_LENGTH, dev);
+                break;
+
+            /* Sensor time frame */
+            case BMI160_FIFO_HEAD_SENSOR_TIME:
+                unpack_sensortime_frame(&data_index, dev);
+                break;
+
+            /* Skip frame */
+            case BMI160_FIFO_HEAD_SKIP_FRAME:
+                unpack_skipped_frame(&data_index, dev);
+                break;
+
+            /* Input config frame */
+            case BMI160_FIFO_HEAD_INPUT_CONFIG:
+                move_next_frame(&data_index, 1, dev);
+                break;
+            case BMI160_FIFO_HEAD_OVER_READ:
+
+                /* Update the data index as complete in case of Over read */
+                data_index = dev->fifo->length;
+                break;
+            default:
+                break;
+        }
+        if (*accel_length == accel_index)
+        {
+            /* Number of frames to read completed */
+            break;
+        }
+    }
+
+    /*Update number of accel data read*/
+    *accel_length = accel_index;
+
+    /*Update the accel frame index*/
+    dev->fifo->accel_byte_start_idx = data_index;
+}
+
+/*!
+ *  @brief This API computes the number of bytes of gyro FIFO data
+ *  which is to be parsed in header-less mode
+ */
+static void get_gyro_len_to_parse(uint16_t *data_index,
+                                  uint16_t *data_read_length,
+                                  const uint8_t *gyro_frame_count,
+                                  const struct bmi160_dev *dev)
+{
+    /* Data start index */
+    *data_index = dev->fifo->gyro_byte_start_idx;
+    if (dev->fifo->fifo_data_enable == BMI160_FIFO_G_ENABLE)
+    {
+        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_G_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_G_A_ENABLE)
+    {
+        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_GA_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_ENABLE)
+    {
+        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_MG_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_A_ENABLE)
+    {
+        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_MGA_LENGTH;
+    }
+    else
+    {
+        /* When gyro is not enabled ,there will be no gyro data.
+         * so we update the data index as complete */
+        *data_index = dev->fifo->length;
+    }
+
+    if (*data_read_length > dev->fifo->length)
+    {
+        /* Handling the case where more data is requested
+         * than that is available*/
+        *data_read_length = dev->fifo->length;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse the gyroscope's data from the
+ *  FIFO data in both header mode and header-less mode.
+ *  It updates the idx value which is used to store the index of
+ *  the current data byte which is parsed.
+ */
+static void unpack_gyro_frame(struct bmi160_sensor_data *gyro,
+                              uint16_t *idx,
+                              uint8_t *gyro_idx,
+                              uint8_t frame_info,
+                              const struct bmi160_dev *dev)
+{
+    switch (frame_info)
+    {
+        case BMI160_FIFO_HEAD_G:
+        case BMI160_FIFO_G_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_G_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into structure instance "gyro"*/
+            unpack_gyro_data(&gyro[*gyro_idx], *idx, dev);
+
+            /*Move the data index*/
+            (*idx) = (*idx) + BMI160_FIFO_G_LENGTH;
+            (*gyro_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_G_A:
+        case BMI160_FIFO_G_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_GA_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /* Unpack the data array into structure instance "gyro" */
+            unpack_gyro_data(&gyro[*gyro_idx], *idx, dev);
+
+            /* Move the data index */
+            *idx = *idx + BMI160_FIFO_GA_LENGTH;
+            (*gyro_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_M_G_A:
+        case BMI160_FIFO_M_G_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_MGA_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into structure instance "gyro"*/
+            unpack_gyro_data(&gyro[*gyro_idx], *idx + BMI160_FIFO_M_LENGTH, dev);
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_MGA_LENGTH;
+            (*gyro_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_M_A:
+        case BMI160_FIFO_M_A_ENABLE:
+
+            /* Move the data index */
+            *idx = *idx + BMI160_FIFO_MA_LENGTH;
+            break;
+        case BMI160_FIFO_HEAD_M:
+        case BMI160_FIFO_M_ENABLE:
+            (*idx) = (*idx) + BMI160_FIFO_M_LENGTH;
+            break;
+        case BMI160_FIFO_HEAD_M_G:
+        case BMI160_FIFO_M_G_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_MG_LENGTH) > dev->fifo->length)
+            {
+                /*Update the data index as complete*/
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /*Unpack the data array into structure instance "gyro"*/
+            unpack_gyro_data(&gyro[*gyro_idx], *idx + BMI160_FIFO_M_LENGTH, dev);
+
+            /*Move the data index*/
+            (*idx) = (*idx) + BMI160_FIFO_MG_LENGTH;
+            (*gyro_idx)++;
+            break;
+        case BMI160_FIFO_HEAD_A:
+        case BMI160_FIFO_A_ENABLE:
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_A_LENGTH;
+            break;
+        default:
+            break;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse the gyro data from the
+ *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
+ */
+static void unpack_gyro_data(struct bmi160_sensor_data *gyro_data,
+                             uint16_t data_start_index,
+                             const struct bmi160_dev *dev)
+{
+    uint16_t data_lsb;
+    uint16_t data_msb;
+
+    /* Gyro raw x data */
+    data_lsb = dev->fifo->data[data_start_index++];
+    data_msb = dev->fifo->data[data_start_index++];
+    gyro_data->x = (int16_t)((data_msb << 8) | data_lsb);
+
+    /* Gyro raw y data */
+    data_lsb = dev->fifo->data[data_start_index++];
+    data_msb = dev->fifo->data[data_start_index++];
+    gyro_data->y = (int16_t)((data_msb << 8) | data_lsb);
+
+    /* Gyro raw z data */
+    data_lsb = dev->fifo->data[data_start_index++];
+    data_msb = dev->fifo->data[data_start_index++];
+    gyro_data->z = (int16_t)((data_msb << 8) | data_lsb);
+}
+
+/*!
+ *  @brief This API is used to parse the gyro data from the
+ *  FIFO data in header mode.
+ */
+static void extract_gyro_header_mode(struct bmi160_sensor_data *gyro_data,
+                                     uint8_t *gyro_length,
+                                     const struct bmi160_dev *dev)
+{
+    uint8_t frame_header = 0;
+    uint16_t data_index;
+    uint8_t gyro_index = 0;
+
+    for (data_index = dev->fifo->gyro_byte_start_idx; data_index < dev->fifo->length;)
+    {
+        /* extracting Frame header */
+        frame_header = (dev->fifo->data[data_index] & BMI160_FIFO_TAG_INTR_MASK);
+
+        /*Index is moved to next byte where the data is starting*/
+        data_index++;
+        switch (frame_header)
+        {
+            /* GYRO frame */
+            case BMI160_FIFO_HEAD_G:
+            case BMI160_FIFO_HEAD_G_A:
+            case BMI160_FIFO_HEAD_M_G:
+            case BMI160_FIFO_HEAD_M_G_A:
+                unpack_gyro_frame(gyro_data, &data_index, &gyro_index, frame_header, dev);
+                break;
+            case BMI160_FIFO_HEAD_A:
+                move_next_frame(&data_index, BMI160_FIFO_A_LENGTH, dev);
+                break;
+            case BMI160_FIFO_HEAD_M:
+                move_next_frame(&data_index, BMI160_FIFO_M_LENGTH, dev);
+                break;
+            case BMI160_FIFO_HEAD_M_A:
+                move_next_frame(&data_index, BMI160_FIFO_M_LENGTH, dev);
+                break;
+
+            /* Sensor time frame */
+            case BMI160_FIFO_HEAD_SENSOR_TIME:
+                unpack_sensortime_frame(&data_index, dev);
+                break;
+
+            /* Skip frame */
+            case BMI160_FIFO_HEAD_SKIP_FRAME:
+                unpack_skipped_frame(&data_index, dev);
+                break;
+
+            /* Input config frame */
+            case BMI160_FIFO_HEAD_INPUT_CONFIG:
+                move_next_frame(&data_index, 1, dev);
+                break;
+            case BMI160_FIFO_HEAD_OVER_READ:
+
+                /* Update the data index as complete in case of over read */
+                data_index = dev->fifo->length;
+                break;
+            default:
+                break;
+        }
+        if (*gyro_length == gyro_index)
+        {
+            /*Number of frames to read completed*/
+            break;
+        }
+    }
+
+    /*Update number of gyro data read*/
+    *gyro_length = gyro_index;
+
+    /*Update the gyro frame index*/
+    dev->fifo->gyro_byte_start_idx = data_index;
+}
+
+/*!
+ *  @brief This API computes the number of bytes of aux FIFO data
+ *  which is to be parsed in header-less mode
+ */
+static void get_aux_len_to_parse(uint16_t *data_index,
+                                 uint16_t *data_read_length,
+                                 const uint8_t *aux_frame_count,
+                                 const struct bmi160_dev *dev)
+{
+    /* Data start index */
+    *data_index = dev->fifo->gyro_byte_start_idx;
+    if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_ENABLE)
+    {
+        *data_read_length = (*aux_frame_count) * BMI160_FIFO_M_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_A_ENABLE)
+    {
+        *data_read_length = (*aux_frame_count) * BMI160_FIFO_MA_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_ENABLE)
+    {
+        *data_read_length = (*aux_frame_count) * BMI160_FIFO_MG_LENGTH;
+    }
+    else if (dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_A_ENABLE)
+    {
+        *data_read_length = (*aux_frame_count) * BMI160_FIFO_MGA_LENGTH;
+    }
+    else
+    {
+        /* When aux is not enabled ,there will be no aux data.
+         * so we update the data index as complete */
+        *data_index = dev->fifo->length;
+    }
+
+    if (*data_read_length > dev->fifo->length)
+    {
+        /* Handling the case where more data is requested
+         * than that is available */
+        *data_read_length = dev->fifo->length;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse the aux's data from the
+ *  FIFO data in both header mode and header-less mode.
+ *  It updates the idx value which is used to store the index of
+ *  the current data byte which is parsed
+ */
+static void unpack_aux_frame(struct bmi160_aux_data *aux_data,
+                             uint16_t *idx,
+                             uint8_t *aux_index,
+                             uint8_t frame_info,
+                             const struct bmi160_dev *dev)
+{
+    switch (frame_info)
+    {
+        case BMI160_FIFO_HEAD_M:
+        case BMI160_FIFO_M_ENABLE:
+
+            /* Partial read, then skip the data */
+            if ((*idx + BMI160_FIFO_M_LENGTH) > dev->fifo->length)
+            {
+                /* Update the data index as complete */
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /* Unpack the data array into structure instance */
+            unpack_aux_data(&aux_data[*aux_index], *idx, dev);
+
+            /* Move the data index */
+            *idx = *idx + BMI160_FIFO_M_LENGTH;
+            (*aux_index)++;
+            break;
+        case BMI160_FIFO_HEAD_M_A:
+        case BMI160_FIFO_M_A_ENABLE:
+
+            /* Partial read, then skip the data */
+            if ((*idx + BMI160_FIFO_MA_LENGTH) > dev->fifo->length)
+            {
+                /* Update the data index as complete */
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /* Unpack the data array into structure instance */
+            unpack_aux_data(&aux_data[*aux_index], *idx, dev);
+
+            /* Move the data index */
+            *idx = *idx + BMI160_FIFO_MA_LENGTH;
+            (*aux_index)++;
+            break;
+        case BMI160_FIFO_HEAD_M_G:
+        case BMI160_FIFO_M_G_ENABLE:
+
+            /* Partial read, then skip the data */
+            if ((*idx + BMI160_FIFO_MG_LENGTH) > dev->fifo->length)
+            {
+                /* Update the data index as complete */
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /* Unpack the data array into structure instance */
+            unpack_aux_data(&aux_data[*aux_index], *idx, dev);
+
+            /* Move the data index */
+            (*idx) = (*idx) + BMI160_FIFO_MG_LENGTH;
+            (*aux_index)++;
+            break;
+        case BMI160_FIFO_HEAD_M_G_A:
+        case BMI160_FIFO_M_G_A_ENABLE:
+
+            /*Partial read, then skip the data*/
+            if ((*idx + BMI160_FIFO_MGA_LENGTH) > dev->fifo->length)
+            {
+                /* Update the data index as complete */
+                *idx = dev->fifo->length;
+                break;
+            }
+
+            /* Unpack the data array into structure instance */
+            unpack_aux_data(&aux_data[*aux_index], *idx, dev);
+
+            /*Move the data index*/
+            *idx = *idx + BMI160_FIFO_MGA_LENGTH;
+            (*aux_index)++;
+            break;
+        case BMI160_FIFO_HEAD_G:
+        case BMI160_FIFO_G_ENABLE:
+
+            /* Move the data index */
+            (*idx) = (*idx) + BMI160_FIFO_G_LENGTH;
+            break;
+        case BMI160_FIFO_HEAD_G_A:
+        case BMI160_FIFO_G_A_ENABLE:
+
+            /* Move the data index */
+            *idx = *idx + BMI160_FIFO_GA_LENGTH;
+            break;
+        case BMI160_FIFO_HEAD_A:
+        case BMI160_FIFO_A_ENABLE:
+
+            /* Move the data index */
+            *idx = *idx + BMI160_FIFO_A_LENGTH;
+            break;
+        default:
+            break;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse the aux data from the
+ *  FIFO data and store it in the instance of the structure bmi160_aux_data.
+ */
+static void unpack_aux_data(struct bmi160_aux_data *aux_data, uint16_t data_start_index, const struct bmi160_dev *dev)
+{
+    /* Aux data bytes */
+    aux_data->data[0] = dev->fifo->data[data_start_index++];
+    aux_data->data[1] = dev->fifo->data[data_start_index++];
+    aux_data->data[2] = dev->fifo->data[data_start_index++];
+    aux_data->data[3] = dev->fifo->data[data_start_index++];
+    aux_data->data[4] = dev->fifo->data[data_start_index++];
+    aux_data->data[5] = dev->fifo->data[data_start_index++];
+    aux_data->data[6] = dev->fifo->data[data_start_index++];
+    aux_data->data[7] = dev->fifo->data[data_start_index++];
+}
+
+/*!
+ *  @brief This API is used to parse the aux data from the
+ *  FIFO data in header mode.
+ */
+static void extract_aux_header_mode(struct bmi160_aux_data *aux_data, uint8_t *aux_length, const struct bmi160_dev *dev)
+{
+    uint8_t frame_header = 0;
+    uint16_t data_index;
+    uint8_t aux_index = 0;
+
+    for (data_index = dev->fifo->aux_byte_start_idx; data_index < dev->fifo->length;)
+    {
+        /* extracting Frame header */
+        frame_header = (dev->fifo->data[data_index] & BMI160_FIFO_TAG_INTR_MASK);
+
+        /*Index is moved to next byte where the data is starting*/
+        data_index++;
+        switch (frame_header)
+        {
+            /* Aux frame */
+            case BMI160_FIFO_HEAD_M:
+            case BMI160_FIFO_HEAD_M_A:
+            case BMI160_FIFO_HEAD_M_G:
+            case BMI160_FIFO_HEAD_M_G_A:
+                unpack_aux_frame(aux_data, &data_index, &aux_index, frame_header, dev);
+                break;
+            case BMI160_FIFO_HEAD_G:
+                move_next_frame(&data_index, BMI160_FIFO_G_LENGTH, dev);
+                break;
+            case BMI160_FIFO_HEAD_G_A:
+                move_next_frame(&data_index, BMI160_FIFO_GA_LENGTH, dev);
+                break;
+            case BMI160_FIFO_HEAD_A:
+                move_next_frame(&data_index, BMI160_FIFO_A_LENGTH, dev);
+                break;
+
+            /* Sensor time frame */
+            case BMI160_FIFO_HEAD_SENSOR_TIME:
+                unpack_sensortime_frame(&data_index, dev);
+                break;
+
+            /* Skip frame */
+            case BMI160_FIFO_HEAD_SKIP_FRAME:
+                unpack_skipped_frame(&data_index, dev);
+                break;
+
+            /* Input config frame */
+            case BMI160_FIFO_HEAD_INPUT_CONFIG:
+                move_next_frame(&data_index, 1, dev);
+                break;
+            case BMI160_FIFO_HEAD_OVER_READ:
+
+                /* Update the data index as complete in case
+                 * of over read */
+                data_index = dev->fifo->length;
+                break;
+            default:
+
+                /* Update the data index as complete in case of
+                 * getting other headers like 0x00 */
+                data_index = dev->fifo->length;
+                break;
+        }
+        if (*aux_length == aux_index)
+        {
+            /*Number of frames to read completed*/
+            break;
+        }
+    }
+
+    /* Update number of aux data read */
+    *aux_length = aux_index;
+
+    /* Update the aux frame index */
+    dev->fifo->aux_byte_start_idx = data_index;
+}
+
+/*!
+ *  @brief This API checks the presence of non-valid frames in the read fifo data.
+ */
+static void check_frame_validity(uint16_t *data_index, const struct bmi160_dev *dev)
+{
+    if ((*data_index + 2) < dev->fifo->length)
+    {
+        /* Check if FIFO is empty */
+        if ((dev->fifo->data[*data_index] == FIFO_CONFIG_MSB_CHECK) &&
+            (dev->fifo->data[*data_index + 1] == FIFO_CONFIG_LSB_CHECK))
+        {
+            /*Update the data index as complete*/
+            *data_index = dev->fifo->length;
+        }
+    }
+}
+
+/*!
+ *  @brief This API is used to move the data index ahead of the
+ *  current_frame_length parameter when unnecessary FIFO data appears while
+ *  extracting the user specified data.
+ */
+static void move_next_frame(uint16_t *data_index, uint8_t current_frame_length, const struct bmi160_dev *dev)
+{
+    /*Partial read, then move the data index to last data*/
+    if ((*data_index + current_frame_length) > dev->fifo->length)
+    {
+        /*Update the data index as complete*/
+        *data_index = dev->fifo->length;
+    }
+    else
+    {
+        /*Move the data index to next frame*/
+        *data_index = *data_index + current_frame_length;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse and store the sensor time from the
+ *  FIFO data in the structure instance dev.
+ */
+static void unpack_sensortime_frame(uint16_t *data_index, const struct bmi160_dev *dev)
+{
+    uint32_t sensor_time_byte3 = 0;
+    uint16_t sensor_time_byte2 = 0;
+    uint8_t sensor_time_byte1 = 0;
+
+    /*Partial read, then move the data index to last data*/
+    if ((*data_index + BMI160_SENSOR_TIME_LENGTH) > dev->fifo->length)
+    {
+        /*Update the data index as complete*/
+        *data_index = dev->fifo->length;
+    }
+    else
+    {
+        sensor_time_byte3 = dev->fifo->data[(*data_index) + BMI160_SENSOR_TIME_MSB_BYTE] << 16;
+        sensor_time_byte2 = dev->fifo->data[(*data_index) + BMI160_SENSOR_TIME_XLSB_BYTE] << 8;
+        sensor_time_byte1 = dev->fifo->data[(*data_index)];
+
+        /* Sensor time */
+        dev->fifo->sensor_time = (uint32_t)(sensor_time_byte3 | sensor_time_byte2 | sensor_time_byte1);
+        *data_index = (*data_index) + BMI160_SENSOR_TIME_LENGTH;
+    }
+}
+
+/*!
+ *  @brief This API is used to parse and store the skipped_frame_count from
+ *  the FIFO data in the structure instance dev.
+ */
+static void unpack_skipped_frame(uint16_t *data_index, const struct bmi160_dev *dev)
+{
+    /*Partial read, then move the data index to last data*/
+    if (*data_index >= dev->fifo->length)
+    {
+        /*Update the data index as complete*/
+        *data_index = dev->fifo->length;
+    }
+    else
+    {
+        dev->fifo->skipped_frame_count = dev->fifo->data[*data_index];
+
+        /*Move the data index*/
+        *data_index = (*data_index) + 1;
+    }
+}
+
+/*!
+ *  @brief This API is used to get the FOC status from the sensor
+ */
+static int8_t get_foc_status(uint8_t *foc_status, struct bmi160_dev const *dev)
+{
+    int8_t rslt;
+    uint8_t data;
+
+    /* Read the FOC status from sensor */
+    rslt = bmi160_get_regs(BMI160_STATUS_ADDR, &data, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Get the foc_status bit */
+        *foc_status = BMI160_GET_BITS(data, BMI160_FOC_STATUS);
+    }
+
+    return rslt;
+}
+
+/*!
+ *  @brief This API is used to configure the offset enable bits in the sensor
+ */
+static int8_t configure_offset_enable(const struct bmi160_foc_conf *foc_conf, struct bmi160_dev const *dev)
+{
+    int8_t rslt;
+    uint8_t data;
+
+    /* Null-pointer check */
+    rslt = null_ptr_check(dev);
+    if (rslt != BMI160_OK)
+    {
+        rslt = BMI160_E_NULL_PTR;
+    }
+    else
+    {
+        /* Read the FOC config from the sensor */
+        rslt = bmi160_get_regs(BMI160_OFFSET_CONF_ADDR, &data, 1, dev);
+        if (rslt == BMI160_OK)
+        {
+            /* Set the offset enable/disable for gyro */
+            data = BMI160_SET_BITS(data, BMI160_GYRO_OFFSET_EN, foc_conf->gyro_off_en);
+
+            /* Set the offset enable/disable for accel */
+            data = BMI160_SET_BITS(data, BMI160_ACCEL_OFFSET_EN, foc_conf->acc_off_en);
+
+            /* Set the offset config in the sensor */
+            rslt = bmi160_set_regs(BMI160_OFFSET_CONF_ADDR, &data, 1, dev);
+        }
+    }
+
+    return rslt;
+}
+
+static int8_t trigger_foc(struct bmi160_offsets *offset, struct bmi160_dev const *dev)
+{
+    int8_t rslt;
+    uint8_t foc_status = BMI160_ENABLE;
+    uint8_t cmd = BMI160_START_FOC_CMD;
+    uint8_t timeout = 0;
+    uint8_t data_array[20];
+
+    /* Start the FOC process */
+    rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &cmd, 1, dev);
+    if (rslt == BMI160_OK)
+    {
+        /* Check the FOC status*/
+        rslt = get_foc_status(&foc_status, dev);
+
+        if ((rslt != BMI160_OK) || (foc_status != BMI160_ENABLE))
+        {
+            while ((foc_status != BMI160_ENABLE) && (timeout < 11))
+            {
+                /* Maximum time of 250ms is given in 10
+                 * steps of 25ms each - 250ms refer datasheet 2.9.1 */
+                dev->delay_ms(25);
+
+                /* Check the FOC status*/
+                rslt = get_foc_status(&foc_status, dev);
+                timeout++;
+            }
+
+            if ((rslt == BMI160_OK) && (foc_status == BMI160_ENABLE))
+            {
+                /* Get offset values from sensor */
+                rslt = bmi160_get_offsets(offset, dev);
+            }
+            else
+            {
+                /* FOC failure case */
+                rslt = BMI160_E_FOC_FAILURE;
+            }
+        }
+
+        if (rslt == BMI160_OK)
+        {
+            /* Read registers 0x04-0x17 */
+            rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 20, dev);
+        }
+    }
+
+    return rslt;
+}

tracking/imu/bmi160.h → lib/bmi160-api/bmi160.h

@@ -1,992 +1,969 @@
-/**
-* Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
-*
-* BSD-3-Clause
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-*    notice, this list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright
-*    notice, this list of conditions and the following disclaimer in the
-*    documentation and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its
-*    contributors may be used to endorse or promote products derived from
-*    this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
-* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-*
-* @file       bmi160.h
-* @date       2021-10-05
-* @version    v3.9.2
-*
-*/
-
-/*!
- * @defgroup bmi160 BMI160
- */
-
-#ifndef BMI160_H_
-#define BMI160_H_
-
-/*************************** C++ guard macro *****************************/
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "bmi160_defs.h"
-#ifdef __KERNEL__
-#include <bmi160_math.h>
-#else
-#include <math.h>
-#include <string.h>
-#include <stdlib.h>
-#endif
-
-/*********************** User function prototypes ************************/
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiInit Initialization
- * @brief Initialize the sensor and device structure
- */
-
-/*!
- * \ingroup bmi160ApiInit
- * \page bmi160_api_bmi160_init bmi160_init
- * \code
- * int8_t bmi160_init(struct bmi160_dev *dev);
- * \endcode
- * @details This API is the entry point for sensor.It performs
- *  the selection of I2C/SPI read mechanism according to the
- *  selected interface and reads the chip-id of bmi160 sensor.
- *
- *  @param[in,out] dev : Structure instance of bmi160_dev
- *  @note : Refer user guide for detailed info.
- *
- *  @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_init(struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiRegs Registers
- * @brief Read data from the given register address of sensor
- */
-
-/*!
- * \ingroup bmi160ApiRegs
- * \page bmi160_api_bmi160_get_regs bmi160_get_regs
- * \code
- * int8_t bmi160_get_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev);
- * \endcode
- * @details This API reads the data from the given register address of sensor.
- *
- * @param[in] reg_addr  : Register address from where the data to be read
- * @param[out] data     : Pointer to data buffer to store the read data.
- * @param[in] len       : No of bytes of data to be read.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @note For most of the registers auto address increment applies, with the
- * exception of a few special registers, which trap the address. For e.g.,
- * Register address - 0x24(BMI160_FIFO_DATA_ADDR)
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t
-    bmi160_get_regs(uint8_t reg_addr, uint8_t* data, uint16_t len, const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiRegs
- * \page bmi160_api_bmi160_set_regs bmi160_set_regs
- * \code
- * int8_t bmi160_set_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev);
- * \endcode
- * @details This API writes the given data to the register address
- * of sensor.
- *
- * @param[in] reg_addr  : Register address from where the data to be written.
- * @param[in] data      : Pointer to data buffer which is to be written
- * in the sensor.
- * @param[in] len       : No of bytes of data to write..
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t
-    bmi160_set_regs(uint8_t reg_addr, uint8_t* data, uint16_t len, const struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiSoftreset Soft reset
- * @brief Perform soft reset of the sensor
- */
-
-/*!
- * \ingroup bmi160ApiSoftreset
- * \page bmi160_api_bmi160_soft_reset bmi160_soft_reset
- * \code
- * int8_t bmi160_soft_reset(struct bmi160_dev *dev);
- * \endcode
- * @details This API resets and restarts the device.
- * All register values are overwritten with default parameters.
- *
- * @param[in] dev  : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_soft_reset(struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiConfig Configuration
- * @brief Configuration of the sensor
- */
-
-/*!
- * \ingroup bmi160ApiConfig
- * \page bmi160_api_bmi160_set_sens_conf bmi160_set_sens_conf
- * \code
- * int8_t bmi160_set_sens_conf(struct bmi160_dev *dev);
- * \endcode
- * @details This API configures the power mode, range and bandwidth
- * of sensor.
- *
- * @param[in] dev    : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_set_sens_conf(struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiConfig
- * \page bmi160_api_bmi160_get_sens_conf bmi160_get_sens_conf
- * \code
- * int8_t bmi160_get_sens_conf(struct bmi160_dev *dev);
- * \endcode
- * @details This API gets accel and gyro configurations.
- *
- * @param[out] dev    : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_get_sens_conf(struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiPowermode Power mode
- * @brief Set / Get power mode of the sensor
- */
-
-/*!
- * \ingroup bmi160ApiPowermode
- * \page bmi160_api_bmi160_set_power_mode bmi160_set_power_mode
- * \code
- * int8_t bmi160_set_power_mode(struct bmi160_dev *dev);
- * \endcode
- * @details This API sets the power mode of the sensor.
- *
- * @param[in] dev  : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_set_power_mode(struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiPowermode
- * \page bmi160_api_bmi160_get_power_mode bmi160_get_power_mode
- * \code
- * int8_t bmi160_get_power_mode(struct bmi160_dev *dev);
- * \endcode
- * @details This API gets the power mode of the sensor.
- *
- * @param[in] dev         : Structure instance of bmi160_dev
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_get_power_mode(struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiData Sensor Data
- * @brief Read sensor data
- */
-
-/*!
- * \ingroup bmi160ApiData
- * \page bmi160_api_bmi160_get_sensor_data bmi160_get_sensor_data
- * \code
- * int8_t bmi160_get_sensor_data(uint8_t select_sensor,
- *                             struct bmi160_sensor_data *accel,
- *                             struct bmi160_sensor_data *gyro,
- *                             const struct bmi160_dev *dev);
- *
- * \endcode
- * @details This API reads sensor data, stores it in
- * the bmi160_sensor_data structure pointer passed by the user.
- * The user can ask for accel data ,gyro data or both sensor
- * data using bmi160_select_sensor enum
- *
- * @param[in] select_sensor    : enum to choose accel,gyro or both sensor data
- * @param[out] accel    : Structure pointer to store accel data
- * @param[out] gyro     : Structure pointer to store gyro data
- * @param[in] dev       : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_get_sensor_data(
-    uint8_t select_sensor,
-    struct bmi160_sensor_data* accel,
-    struct bmi160_sensor_data* gyro,
-    const struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiInt Interrupt configuration
- * @brief Set interrupt configuration of the sensor
- */
-
-/*!
- * \ingroup bmi160ApiInt
- * \page bmi160_api_bmi160_set_int_config bmi160_set_int_config
- * \code
- * int8_t bmi160_set_int_config(struct bmi160_int_settg *int_config, struct bmi160_dev *dev);
- * \endcode
- * @details This API configures the necessary interrupt based on
- *  the user settings in the bmi160_int_settg structure instance.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_set_int_config(struct bmi160_int_settg* int_config, struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiStepC Step counter
- * @brief Step counter operations
- */
-
-/*!
- * \ingroup bmi160ApiStepC
- * \page bmi160_api_bmi160_set_step_counter bmi160_set_step_counter
- * \code
- * int8_t bmi160_set_step_counter(uint8_t step_cnt_enable, const struct bmi160_dev *dev);
- * \endcode
- * @details This API enables the step counter feature.
- *
- * @param[in] step_cnt_enable   : value to enable or disable
- * @param[in] dev       : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_set_step_counter(uint8_t step_cnt_enable, const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiStepC
- * \page bmi160_api_bmi160_read_step_counter bmi160_read_step_counter
- * \code
- * int8_t bmi160_read_step_counter(uint16_t *step_val, const struct bmi160_dev *dev);
- * \endcode
- * @details This API reads the step counter value.
- *
- * @param[in] step_val    : Pointer to store the step counter value.
- * @param[in] dev         : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_read_step_counter(uint16_t* step_val, const struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiAux Auxiliary sensor
- * @brief Auxiliary sensor operations
- */
-
-/*!
- * \ingroup bmi160ApiAux
- * \page bmi160_api_bmi160_aux_read bmi160_aux_read
- * \code
- * int8_t bmi160_aux_read(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev);
- * \endcode
- * @details This API reads the mention no of byte of data from the given
- * register address of auxiliary sensor.
- *
- * @param[in] reg_addr    : Address of register to read.
- * @param[in] aux_data    : Pointer to store the read data.
- * @param[in] len     : No of bytes to read.
- * @param[in] dev         : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_aux_read(
-    uint8_t reg_addr,
-    uint8_t* aux_data,
-    uint16_t len,
-    const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiAux
- * \page bmi160_api_bmi160_aux_write bmi160_aux_write
- * \code
- * int8_t bmi160_aux_write(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev);
- * \endcode
- * @details This API writes the mention no of byte of data to the given
- * register address of auxiliary sensor.
- *
- * @param[in] reg_addr    : Address of register to write.
- * @param[in] aux_data    : Pointer to write data.
- * @param[in] len     : No of bytes to write.
- * @param[in] dev         : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_aux_write(
-    uint8_t reg_addr,
-    uint8_t* aux_data,
-    uint16_t len,
-    const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiAux
- * \page bmi160_api_bmi160_aux_init bmi160_aux_init
- * \code
- * int8_t bmi160_aux_init(const struct bmi160_dev *dev);
- * \endcode
- * @details This API initialize the auxiliary sensor
- * in order to access it.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_aux_init(const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiAux
- * \page bmi160_api_bmi160_set_aux_auto_mode bmi160_set_aux_auto_mode
- * \code
- * int8_t bmi160_set_aux_auto_mode(uint8_t *data_addr, struct bmi160_dev *dev);
- * \endcode
- * @details This API is used to setup the auxiliary sensor of bmi160 in auto mode
- * Thus enabling the auto update of 8 bytes of data from auxiliary sensor
- * to BMI160 register address 0x04 to 0x0B
- *
- * @param[in] data_addr    : Starting address of aux. sensor's data register
- *                           (BMI160 registers 0x04 to 0x0B will be updated
- *                           with 8 bytes of data from auxiliary sensor
- *                           starting from this register address.)
- * @param[in] dev      : Structure instance of bmi160_dev.
- *
- * @note : Set the value of auxiliary polling rate by setting
- *         dev->aux_cfg.aux_odr to the required value from the table
- *         before calling this API
- *
- *@verbatim
- *   dev->aux_cfg.aux_odr  |   Auxiliary ODR (Hz)
- *  -----------------------|-----------------------
- *  BMI160_AUX_ODR_0_78HZ  |        25/32
- *  BMI160_AUX_ODR_1_56HZ  |        25/16
- *  BMI160_AUX_ODR_3_12HZ  |        25/8
- *  BMI160_AUX_ODR_6_25HZ  |        25/4
- *  BMI160_AUX_ODR_12_5HZ  |        25/2
- *  BMI160_AUX_ODR_25HZ    |        25
- *  BMI160_AUX_ODR_50HZ    |        50
- *  BMI160_AUX_ODR_100HZ   |        100
- *  BMI160_AUX_ODR_200HZ   |        200
- *  BMI160_AUX_ODR_400HZ   |        400
- *  BMI160_AUX_ODR_800HZ   |        800
- *@endverbatim
- *
- * @note : Other values of  dev->aux_cfg.aux_odr are reserved and not for use
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_set_aux_auto_mode(uint8_t* data_addr, struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiAux
- * \page bmi160_api_bmi160_config_aux_mode bmi160_config_aux_mode
- * \code
- * int8_t bmi160_config_aux_mode(const struct bmi160_dev *dev);
- * \endcode
- * @details This API configures the 0x4C register and settings like
- * Auxiliary sensor manual enable/ disable and aux burst read length.
- *
- * @param[in] dev    : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_config_aux_mode(const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiAux
- * \page bmi160_api_bmi160_read_aux_data_auto_mode bmi160_read_aux_data_auto_mode
- * \code
- * int8_t bmi160_read_aux_data_auto_mode(uint8_t *aux_data, const struct bmi160_dev *dev);
- * \endcode
- * @details This API is used to read the raw uncompensated auxiliary sensor
- * data of 8 bytes from BMI160 register address 0x04 to 0x0B
- *
- * @param[in] aux_data       : Pointer to user array of length 8 bytes
- *                             Ensure that the aux_data array is of
- *                             length 8 bytes
- * @param[in] dev        : Structure instance of bmi160_dev
- *
- * @retval zero -> Success  / -ve value -> Error
- * @retval Zero Success
- * @retval Negative Error
- */
-int8_t bmi160_read_aux_data_auto_mode(uint8_t* aux_data, const struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiSelfTest Self test
- * @brief Perform self test of the sensor
- */
-
-/*!
- * \ingroup bmi160ApiSelfTest
- * \page bmi160_api_bmi160_perform_self_test bmi160_perform_self_test
- * \code
- * int8_t bmi160_perform_self_test(uint8_t select_sensor, struct bmi160_dev *dev);
- * \endcode
- * @details This is used to perform self test of accel/gyro of the BMI160 sensor
- *
- * @param[in] select_sensor  : enum to choose accel or gyro for self test
- * @param[in] dev            : Structure instance of bmi160_dev
- *
- * @note self test can be performed either for accel/gyro at any instant.
- *
- *@verbatim
- *     value of select_sensor       |  Inference
- *----------------------------------|--------------------------------
- *   BMI160_ACCEL_ONLY              | Accel self test enabled
- *   BMI160_GYRO_ONLY               | Gyro self test enabled
- *   BMI160_BOTH_ACCEL_AND_GYRO     | NOT TO BE USED
- *@endverbatim
- *
- * @note The return value of this API gives us the result of self test.
- *
- * @note Performing self test does soft reset of the sensor, User can
- * set the desired settings after performing the self test.
- *
- * @return Result of API execution status
- * @retval  BMI160_OK                       Self test success
- * @retval  BMI160_W_GYRO_SELF_TEST_FAIL    Gyro self test fail
- * @retval  BMI160_W_ACCEl_SELF_TEST_FAIL   Accel self test fail
- */
-int8_t bmi160_perform_self_test(uint8_t select_sensor, struct bmi160_dev* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiFIFO FIFO
- * @brief FIFO operations of the sensor
- */
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_get_fifo_data bmi160_get_fifo_data
- * \code
- * int8_t bmi160_get_fifo_data(struct bmi160_dev const *dev);
- * \endcode
- * @details This API reads data from the fifo buffer.
- *
- *  @note User has to allocate the FIFO buffer along with
- *  corresponding fifo length from his side before calling this API
- *  as mentioned in the readme.md
- *
- *  @note User must specify the number of bytes to read from the FIFO in
- *  dev->fifo->length , It will be updated by the number of bytes actually
- *  read from FIFO after calling this API
- *
- *  @param[in] dev     : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval Zero Success
- *  @retval Negative Error
- */
-int8_t bmi160_get_fifo_data(struct bmi160_dev const* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_set_fifo_flush bmi160_set_fifo_flush
- * \code
- * int8_t bmi160_set_fifo_flush(const struct bmi160_dev *dev);
- * \endcode
- * @details This API writes fifo_flush command to command register.This
- *  action clears all data in the Fifo without changing fifo configuration
- *  settings.
- *
- *  @param[in] dev     : Structure instance of bmi160_dev
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_set_fifo_flush(const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_set_fifo_config bmi160_set_fifo_config
- * \code
- * int8_t bmi160_set_fifo_config(uint8_t config, uint8_t enable, struct bmi160_dev const *dev);
- * \endcode
- * @details This API sets the FIFO configuration in the sensor.
- *
- *  @param[in] config : variable used to specify the FIFO
- *  configurations which are to be enabled or disabled in the sensor.
- *
- *  @note : User can set either set one or more or all FIFO configurations
- *  by ORing the below mentioned macros.
- *
- *@verbatim
- *      config                  |   Value
- *      ------------------------|---------------------------
- *      BMI160_FIFO_TIME        |   0x02
- *      BMI160_FIFO_TAG_INT2    |   0x04
- *      BMI160_FIFO_TAG_INT1    |   0x08
- *      BMI160_FIFO_HEADER      |   0x10
- *      BMI160_FIFO_AUX         |   0x20
- *      BMI160_FIFO_ACCEL       |   0x40
- *      BMI160_FIFO_GYRO        |   0x80
- *@endverbatim
- *
- *  @param[in] enable : Parameter used to enable or disable the above
- *  FIFO configuration
- *  @param[in] dev : Structure instance of bmi160_dev.
- *
- *  @return status of bus communication result
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_set_fifo_config(uint8_t config, uint8_t enable, struct bmi160_dev const* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_set_fifo_down bmi160_set_fifo_down
- * \code
- * int8_t bmi160_set_fifo_down(uint8_t fifo_down, const struct bmi160_dev *dev);
- * \endcode
- * @details This API is used to configure the down sampling ratios of
- *  the accel and gyro data for FIFO.Also, it configures filtered or
- *  pre-filtered data for the fifo for accel and gyro.
- *
- *  @param[in] fifo_down : variable used to specify the FIFO down
- *  configurations which are to be enabled or disabled in the sensor.
- *
- *  @note The user must select one among the following macros to
- *  select down-sampling ratio for accel
- *
- *@verbatim
- *      config                               |   Value
- *      -------------------------------------|---------------------------
- *      BMI160_ACCEL_FIFO_DOWN_ZERO          |   0x00
- *      BMI160_ACCEL_FIFO_DOWN_ONE           |   0x10
- *      BMI160_ACCEL_FIFO_DOWN_TWO           |   0x20
- *      BMI160_ACCEL_FIFO_DOWN_THREE         |   0x30
- *      BMI160_ACCEL_FIFO_DOWN_FOUR          |   0x40
- *      BMI160_ACCEL_FIFO_DOWN_FIVE          |   0x50
- *      BMI160_ACCEL_FIFO_DOWN_SIX           |   0x60
- *      BMI160_ACCEL_FIFO_DOWN_SEVEN         |   0x70
- *@endverbatim
- *
- *  @note The user must select one among the following macros to
- *  select down-sampling ratio for gyro
- *
- *@verbatim
- *      config                               |   Value
- *      -------------------------------------|---------------------------
- *      BMI160_GYRO_FIFO_DOWN_ZERO           |   0x00
- *      BMI160_GYRO_FIFO_DOWN_ONE            |   0x01
- *      BMI160_GYRO_FIFO_DOWN_TWO            |   0x02
- *      BMI160_GYRO_FIFO_DOWN_THREE          |   0x03
- *      BMI160_GYRO_FIFO_DOWN_FOUR           |   0x04
- *      BMI160_GYRO_FIFO_DOWN_FIVE           |   0x05
- *      BMI160_GYRO_FIFO_DOWN_SIX            |   0x06
- *      BMI160_GYRO_FIFO_DOWN_SEVEN          |   0x07
- *@endverbatim
- *
- *  @note The user can enable filtered accel data by the following macro
- *
- *@verbatim
- *      config                               |   Value
- *      -------------------------------------|---------------------------
- *      BMI160_ACCEL_FIFO_FILT_EN            |   0x80
- *@endverbatim
- *
- *  @note The user can enable filtered gyro data by the following macro
- *
- *@verbatim
- *      config                               |   Value
- *      -------------------------------------|---------------------------
- *      BMI160_GYRO_FIFO_FILT_EN             |   0x08
- *@endverbatim
- *
- *  @note : By ORing the above mentioned macros, the user can select
- *  the required FIFO down config settings
- *
- *  @param[in] dev : Structure instance of bmi160_dev.
- *
- *  @return status of bus communication result
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_set_fifo_down(uint8_t fifo_down, const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_set_fifo_wm bmi160_set_fifo_wm
- * \code
- * int8_t bmi160_set_fifo_wm(uint8_t fifo_wm, const struct bmi160_dev *dev);
- * \endcode
- * @details This API sets the FIFO watermark level in the sensor.
- *
- *  @note The FIFO watermark is issued when the FIFO fill level is
- *  equal or above the watermark level and units of watermark is 4 bytes.
- *
- *  @param[in]  fifo_wm        : Variable used to set the FIFO water mark level
- *  @param[in]  dev            : Structure instance of bmi160_dev
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_set_fifo_wm(uint8_t fifo_wm, const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_extract_accel bmi160_extract_accel
- * \code
- * int8_t bmi160_extract_accel(struct bmi160_sensor_data *accel_data, uint8_t *accel_length, struct bmi160_dev const
- **dev);
- * \endcode
- * @details This API parses and extracts the accelerometer frames from
- *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
- *  the "accel_data" structure instance.
- *
- *  @note The bmi160_extract_accel API should be called only after
- *  reading the FIFO data by calling the bmi160_get_fifo_data() API.
- *
- *  @param[out] accel_data    : Structure instance of bmi160_sensor_data
- *                              where the accelerometer data in FIFO is stored.
- *  @param[in,out] accel_length  : Number of valid accelerometer frames
- *                              (x,y,z axes data) read out from fifo.
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @note accel_length is updated with the number of valid accelerometer
- *  frames extracted from fifo (1 accel frame   = 6 bytes) at the end of
- *  execution of this API.
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_extract_accel(
-    struct bmi160_sensor_data* accel_data,
-    uint8_t* accel_length,
-    struct bmi160_dev const* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_extract_gyro bmi160_extract_gyro
- * \code
- * int8_t bmi160_extract_gyro(struct bmi160_sensor_data *gyro_data, uint8_t *gyro_length, struct bmi160_dev const *dev);
- * \endcode
- * @details This API parses and extracts the gyro frames from
- *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
- *  the "gyro_data" structure instance.
- *
- *  @note The bmi160_extract_gyro API should be called only after
- *  reading the FIFO data by calling the bmi160_get_fifo_data() API.
- *
- *  @param[out] gyro_data    : Structure instance of bmi160_sensor_data
- *                             where the gyro data in FIFO is stored.
- *  @param[in,out] gyro_length  : Number of valid gyro frames
- *                             (x,y,z axes data) read out from fifo.
- *  @param[in] dev           : Structure instance of bmi160_dev.
- *
- *  @note gyro_length is updated with the number of valid gyro
- *  frames extracted from fifo (1 gyro frame   = 6 bytes) at the end of
- *  execution of this API.
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_extract_gyro(
-    struct bmi160_sensor_data* gyro_data,
-    uint8_t* gyro_length,
-    struct bmi160_dev const* dev);
-
-/*!
- * \ingroup bmi160ApiFIFO
- * \page bmi160_api_bmi160_extract_aux bmi160_extract_aux
- * \code
- * int8_t bmi160_extract_aux(struct bmi160_aux_data *aux_data, uint8_t *aux_len, struct bmi160_dev const *dev);
- * \endcode
- * @details This API parses and extracts the aux frames from
- *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
- *  the bmi160_aux_data structure instance.
- *
- *  @note The bmi160_extract_aux API should be called only after
- *  reading the FIFO data by calling the bmi160_get_fifo_data() API.
- *
- *  @param[out] aux_data    : Structure instance of bmi160_aux_data
- *                            where the aux data in FIFO is stored.
- *  @param[in,out] aux_len  : Number of valid aux frames (8bytes)
- *                            read out from FIFO.
- *  @param[in] dev          : Structure instance of bmi160_dev.
- *
- *  @note aux_len is updated with the number of valid aux
- *  frames extracted from fifo (1 aux frame = 8 bytes) at the end of
- *  execution of this API.
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- *
- */
-int8_t bmi160_extract_aux(
-    struct bmi160_aux_data* aux_data,
-    uint8_t* aux_len,
-    struct bmi160_dev const* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiFOC FOC
- * @brief Start FOC of accel and gyro sensors
- */
-
-/*!
- * \ingroup bmi160ApiFOC
- * \page bmi160_api_bmi160_start_foc bmi160_start_foc
- * \code
- * int8_t bmi160_start_foc(const struct bmi160_foc_conf *foc_conf,
- * \endcode
- * @details This API starts the FOC of accel and gyro
- *
- *  @note FOC should not be used in low-power mode of sensor
- *
- *  @note Accel FOC targets values of +1g , 0g , -1g
- *  Gyro FOC always targets value of 0 dps
- *
- *  @param[in] foc_conf    : Structure instance of bmi160_foc_conf which
- *                                   has the FOC configuration
- *  @param[in,out] offset  : Structure instance to store Offset
- *                                   values read from sensor
- *  @param[in] dev         : Structure instance of bmi160_dev.
- *
- *  @note Pre-requisites for triggering FOC in accel , Set the following,
- *   Enable the acc_off_en
- *       Ex :  foc_conf.acc_off_en = BMI160_ENABLE;
- *
- *   Set the desired target values of FOC to each axes (x,y,z) by using the
- *   following macros
- *       - BMI160_FOC_ACCEL_DISABLED
- *       - BMI160_FOC_ACCEL_POSITIVE_G
- *       - BMI160_FOC_ACCEL_NEGATIVE_G
- *       - BMI160_FOC_ACCEL_0G
- *
- *   Ex : foc_conf.foc_acc_x  = BMI160_FOC_ACCEL_0G;
- *        foc_conf.foc_acc_y  = BMI160_FOC_ACCEL_0G;
- *        foc_conf.foc_acc_z  = BMI160_FOC_ACCEL_POSITIVE_G;
- *
- *  @note Pre-requisites for triggering FOC in gyro ,
- *  Set the following parameters,
- *
- *   Ex : foc_conf.foc_gyr_en = BMI160_ENABLE;
- *        foc_conf.gyro_off_en = BMI160_ENABLE;
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- */
-int8_t bmi160_start_foc(
-    const struct bmi160_foc_conf* foc_conf,
-    struct bmi160_offsets* offset,
-    struct bmi160_dev const* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiOffsets Offsets
- * @brief Set / Get offset values of accel and gyro sensors
- */
-
-/*!
- * \ingroup bmi160ApiOffsets
- * \page bmi160_api_bmi160_get_offsets bmi160_get_offsets
- * \code
- * int8_t bmi160_get_offsets(struct bmi160_offsets *offset, const struct bmi160_dev *dev);
- * \endcode
- * @details This API reads and stores the offset values of accel and gyro
- *
- *  @param[in,out] offset : Structure instance of bmi160_offsets in which
- *                          the offset values are read and stored
- *  @param[in] dev        : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- */
-int8_t bmi160_get_offsets(struct bmi160_offsets* offset, const struct bmi160_dev* dev);
-
-/*!
- * \ingroup bmi160ApiOffsets
- * \page bmi160_api_bmi160_set_offsets bmi160_set_offsets
- * \code
- * int8_t bmi160_set_offsets(const struct bmi160_foc_conf *foc_conf,
- *                         const struct bmi160_offsets *offset,
- *                         struct bmi160_dev const *dev);
- * \endcode
- * @details This API writes the offset values of accel and gyro to
- *  the sensor but these values will be reset on POR or soft reset.
- *
- *  @param[in] foc_conf    : Structure instance of bmi160_foc_conf which
- *                                   has the FOC configuration
- *  @param[in] offset      : Structure instance in which user updates offset
- *                            values which are to be written in the sensor
- *  @param[in] dev         : Structure instance of bmi160_dev.
- *
- *  @note Offsets can be set by user like offset->off_acc_x = 10;
- *  where 1LSB = 3.9mg and for gyro 1LSB = 0.061degrees/second
- *
- * @note BMI160 offset values for xyz axes of accel should be within range of
- *  BMI160_ACCEL_MIN_OFFSET (-128) to BMI160_ACCEL_MAX_OFFSET (127)
- *
- * @note BMI160 offset values for xyz axes of gyro should be within range of
- *  BMI160_GYRO_MIN_OFFSET (-512) to BMI160_GYRO_MAX_OFFSET (511)
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- */
-int8_t bmi160_set_offsets(
-    const struct bmi160_foc_conf* foc_conf,
-    const struct bmi160_offsets* offset,
-    struct bmi160_dev const* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiNVM NVM
- * @brief Write image registers values to NVM
- */
-
-/*!
- * \ingroup bmi160ApiNVM
- * \page bmi160_api_bmi160_update_nvm bmi160_update_nvm
- * \code
- * int8_t bmi160_update_nvm(struct bmi160_dev const *dev);
- * \endcode
- * @details This API writes the image registers values to NVM which is
- *  stored even after POR or soft reset
- *
- *  @param[in] dev         : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- */
-int8_t bmi160_update_nvm(struct bmi160_dev const* dev);
-
-/**
- * \ingroup bmi160
- * \defgroup bmi160ApiInts Interrupt status
- * @brief Read interrupt status from the sensor
- */
-
-/*!
- * \ingroup bmi160ApiInts
- * \page bmi160_api_bmi160_get_int_status bmi160_get_int_status
- * \code
- * int8_t bmi160_get_int_status(enum bmi160_int_status_sel int_status_sel,
- *                            union bmi160_int_status *int_status,
- *                            struct bmi160_dev const *dev);
- * \endcode
- * @details This API gets the interrupt status from the sensor.
- *
- *  @param[in] int_status_sel       : Enum variable to select either individual or all the
- *  interrupt status bits.
- *  @param[in] int_status           : pointer variable to get the interrupt status
- *  from the sensor.
- *  param[in] dev                   : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval 0 -> Success
- *  @retval Any non zero value -> Fail
- */
-int8_t bmi160_get_int_status(
-    enum bmi160_int_status_sel int_status_sel,
-    union bmi160_int_status* int_status,
-    struct bmi160_dev const* dev);
-
-/*************************** C++ guard macro *****************************/
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* BMI160_H_ */
+/**
+* Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
+*
+* BSD-3-Clause
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*
+* 2. Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in the
+*    documentation and/or other materials provided with the distribution.
+*
+* 3. Neither the name of the copyright holder nor the names of its
+*    contributors may be used to endorse or promote products derived from
+*    this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+* @file       bmi160.h
+* @date       2021-10-05
+* @version    v3.9.2
+*
+*/
+
+/*!
+ * @defgroup bmi160 BMI160
+ */
+
+#ifndef BMI160_H_
+#define BMI160_H_
+
+/*************************** C++ guard macro *****************************/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bmi160_defs.h"
+#ifdef __KERNEL__
+#include <bmi160_math.h>
+#else
+#include <math.h>
+#include <string.h>
+#include <stdlib.h>
+#endif
+
+/*********************** User function prototypes ************************/
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiInit Initialization
+ * @brief Initialize the sensor and device structure
+ */
+
+/*!
+ * \ingroup bmi160ApiInit
+ * \page bmi160_api_bmi160_init bmi160_init
+ * \code
+ * int8_t bmi160_init(struct bmi160_dev *dev);
+ * \endcode
+ * @details This API is the entry point for sensor.It performs
+ *  the selection of I2C/SPI read mechanism according to the
+ *  selected interface and reads the chip-id of bmi160 sensor.
+ *
+ *  @param[in,out] dev : Structure instance of bmi160_dev
+ *  @note : Refer user guide for detailed info.
+ *
+ *  @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_init(struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiRegs Registers
+ * @brief Read data from the given register address of sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiRegs
+ * \page bmi160_api_bmi160_get_regs bmi160_get_regs
+ * \code
+ * int8_t bmi160_get_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API reads the data from the given register address of sensor.
+ *
+ * @param[in] reg_addr  : Register address from where the data to be read
+ * @param[out] data     : Pointer to data buffer to store the read data.
+ * @param[in] len       : No of bytes of data to be read.
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @note For most of the registers auto address increment applies, with the
+ * exception of a few special registers, which trap the address. For e.g.,
+ * Register address - 0x24(BMI160_FIFO_DATA_ADDR)
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_get_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiRegs
+ * \page bmi160_api_bmi160_set_regs bmi160_set_regs
+ * \code
+ * int8_t bmi160_set_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API writes the given data to the register address
+ * of sensor.
+ *
+ * @param[in] reg_addr  : Register address from where the data to be written.
+ * @param[in] data      : Pointer to data buffer which is to be written
+ * in the sensor.
+ * @param[in] len       : No of bytes of data to write..
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_set_regs(uint8_t reg_addr, uint8_t *data, uint16_t len, const struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiSoftreset Soft reset
+ * @brief Perform soft reset of the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiSoftreset
+ * \page bmi160_api_bmi160_soft_reset bmi160_soft_reset
+ * \code
+ * int8_t bmi160_soft_reset(struct bmi160_dev *dev);
+ * \endcode
+ * @details This API resets and restarts the device.
+ * All register values are overwritten with default parameters.
+ *
+ * @param[in] dev  : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_soft_reset(struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiConfig Configuration
+ * @brief Configuration of the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiConfig
+ * \page bmi160_api_bmi160_set_sens_conf bmi160_set_sens_conf
+ * \code
+ * int8_t bmi160_set_sens_conf(struct bmi160_dev *dev);
+ * \endcode
+ * @details This API configures the power mode, range and bandwidth
+ * of sensor.
+ *
+ * @param[in] dev    : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_set_sens_conf(struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiConfig
+ * \page bmi160_api_bmi160_get_sens_conf bmi160_get_sens_conf
+ * \code
+ * int8_t bmi160_get_sens_conf(struct bmi160_dev *dev);
+ * \endcode
+ * @details This API gets accel and gyro configurations.
+ *
+ * @param[out] dev    : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_get_sens_conf(struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiPowermode Power mode
+ * @brief Set / Get power mode of the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiPowermode
+ * \page bmi160_api_bmi160_set_power_mode bmi160_set_power_mode
+ * \code
+ * int8_t bmi160_set_power_mode(struct bmi160_dev *dev);
+ * \endcode
+ * @details This API sets the power mode of the sensor.
+ *
+ * @param[in] dev  : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_set_power_mode(struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiPowermode
+ * \page bmi160_api_bmi160_get_power_mode bmi160_get_power_mode
+ * \code
+ * int8_t bmi160_get_power_mode(struct bmi160_dev *dev);
+ * \endcode
+ * @details This API gets the power mode of the sensor.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_get_power_mode(struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiData Sensor Data
+ * @brief Read sensor data
+ */
+
+/*!
+ * \ingroup bmi160ApiData
+ * \page bmi160_api_bmi160_get_sensor_data bmi160_get_sensor_data
+ * \code
+ * int8_t bmi160_get_sensor_data(uint8_t select_sensor,
+ *                             struct bmi160_sensor_data *accel,
+ *                             struct bmi160_sensor_data *gyro,
+ *                             const struct bmi160_dev *dev);
+ *
+ * \endcode
+ * @details This API reads sensor data, stores it in
+ * the bmi160_sensor_data structure pointer passed by the user.
+ * The user can ask for accel data ,gyro data or both sensor
+ * data using bmi160_select_sensor enum
+ *
+ * @param[in] select_sensor    : enum to choose accel,gyro or both sensor data
+ * @param[out] accel    : Structure pointer to store accel data
+ * @param[out] gyro     : Structure pointer to store gyro data
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_get_sensor_data(uint8_t select_sensor,
+                              struct bmi160_sensor_data *accel,
+                              struct bmi160_sensor_data *gyro,
+                              const struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiInt Interrupt configuration
+ * @brief Set interrupt configuration of the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiInt
+ * \page bmi160_api_bmi160_set_int_config bmi160_set_int_config
+ * \code
+ * int8_t bmi160_set_int_config(struct bmi160_int_settg *int_config, struct bmi160_dev *dev);
+ * \endcode
+ * @details This API configures the necessary interrupt based on
+ *  the user settings in the bmi160_int_settg structure instance.
+ *
+ * @param[in] int_config  : Structure instance of bmi160_int_settg.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_set_int_config(struct bmi160_int_settg *int_config, struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiStepC Step counter
+ * @brief Step counter operations
+ */
+
+/*!
+ * \ingroup bmi160ApiStepC
+ * \page bmi160_api_bmi160_set_step_counter bmi160_set_step_counter
+ * \code
+ * int8_t bmi160_set_step_counter(uint8_t step_cnt_enable, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API enables the step counter feature.
+ *
+ * @param[in] step_cnt_enable   : value to enable or disable
+ * @param[in] dev       : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_set_step_counter(uint8_t step_cnt_enable, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiStepC
+ * \page bmi160_api_bmi160_read_step_counter bmi160_read_step_counter
+ * \code
+ * int8_t bmi160_read_step_counter(uint16_t *step_val, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API reads the step counter value.
+ *
+ * @param[in] step_val    : Pointer to store the step counter value.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_read_step_counter(uint16_t *step_val, const struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiAux Auxiliary sensor
+ * @brief Auxiliary sensor operations
+ */
+
+/*!
+ * \ingroup bmi160ApiAux
+ * \page bmi160_api_bmi160_aux_read bmi160_aux_read
+ * \code
+ * int8_t bmi160_aux_read(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API reads the mention no of byte of data from the given
+ * register address of auxiliary sensor.
+ *
+ * @param[in] reg_addr    : Address of register to read.
+ * @param[in] aux_data    : Pointer to store the read data.
+ * @param[in] len     : No of bytes to read.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_aux_read(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiAux
+ * \page bmi160_api_bmi160_aux_write bmi160_aux_write
+ * \code
+ * int8_t bmi160_aux_write(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API writes the mention no of byte of data to the given
+ * register address of auxiliary sensor.
+ *
+ * @param[in] reg_addr    : Address of register to write.
+ * @param[in] aux_data    : Pointer to write data.
+ * @param[in] len     : No of bytes to write.
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_aux_write(uint8_t reg_addr, uint8_t *aux_data, uint16_t len, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiAux
+ * \page bmi160_api_bmi160_aux_init bmi160_aux_init
+ * \code
+ * int8_t bmi160_aux_init(const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API initialize the auxiliary sensor
+ * in order to access it.
+ *
+ * @param[in] dev         : Structure instance of bmi160_dev.
+ * @note : Refer user guide for detailed info.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_aux_init(const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiAux
+ * \page bmi160_api_bmi160_set_aux_auto_mode bmi160_set_aux_auto_mode
+ * \code
+ * int8_t bmi160_set_aux_auto_mode(uint8_t *data_addr, struct bmi160_dev *dev);
+ * \endcode
+ * @details This API is used to setup the auxiliary sensor of bmi160 in auto mode
+ * Thus enabling the auto update of 8 bytes of data from auxiliary sensor
+ * to BMI160 register address 0x04 to 0x0B
+ *
+ * @param[in] data_addr    : Starting address of aux. sensor's data register
+ *                           (BMI160 registers 0x04 to 0x0B will be updated
+ *                           with 8 bytes of data from auxiliary sensor
+ *                           starting from this register address.)
+ * @param[in] dev      : Structure instance of bmi160_dev.
+ *
+ * @note : Set the value of auxiliary polling rate by setting
+ *         dev->aux_cfg.aux_odr to the required value from the table
+ *         before calling this API
+ *
+ *@verbatim
+ *   dev->aux_cfg.aux_odr  |   Auxiliary ODR (Hz)
+ *  -----------------------|-----------------------
+ *  BMI160_AUX_ODR_0_78HZ  |        25/32
+ *  BMI160_AUX_ODR_1_56HZ  |        25/16
+ *  BMI160_AUX_ODR_3_12HZ  |        25/8
+ *  BMI160_AUX_ODR_6_25HZ  |        25/4
+ *  BMI160_AUX_ODR_12_5HZ  |        25/2
+ *  BMI160_AUX_ODR_25HZ    |        25
+ *  BMI160_AUX_ODR_50HZ    |        50
+ *  BMI160_AUX_ODR_100HZ   |        100
+ *  BMI160_AUX_ODR_200HZ   |        200
+ *  BMI160_AUX_ODR_400HZ   |        400
+ *  BMI160_AUX_ODR_800HZ   |        800
+ *@endverbatim
+ *
+ * @note : Other values of  dev->aux_cfg.aux_odr are reserved and not for use
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_set_aux_auto_mode(uint8_t *data_addr, struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiAux
+ * \page bmi160_api_bmi160_config_aux_mode bmi160_config_aux_mode
+ * \code
+ * int8_t bmi160_config_aux_mode(const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API configures the 0x4C register and settings like
+ * Auxiliary sensor manual enable/ disable and aux burst read length.
+ *
+ * @param[in] dev    : Structure instance of bmi160_dev.
+ *
+ * @return Result of API execution status
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_config_aux_mode(const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiAux
+ * \page bmi160_api_bmi160_read_aux_data_auto_mode bmi160_read_aux_data_auto_mode
+ * \code
+ * int8_t bmi160_read_aux_data_auto_mode(uint8_t *aux_data, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API is used to read the raw uncompensated auxiliary sensor
+ * data of 8 bytes from BMI160 register address 0x04 to 0x0B
+ *
+ * @param[in] aux_data       : Pointer to user array of length 8 bytes
+ *                             Ensure that the aux_data array is of
+ *                             length 8 bytes
+ * @param[in] dev        : Structure instance of bmi160_dev
+ *
+ * @retval zero -> Success  / -ve value -> Error
+ * @retval Zero Success
+ * @retval Negative Error
+ */
+int8_t bmi160_read_aux_data_auto_mode(uint8_t *aux_data, const struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiSelfTest Self test
+ * @brief Perform self test of the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiSelfTest
+ * \page bmi160_api_bmi160_perform_self_test bmi160_perform_self_test
+ * \code
+ * int8_t bmi160_perform_self_test(uint8_t select_sensor, struct bmi160_dev *dev);
+ * \endcode
+ * @details This is used to perform self test of accel/gyro of the BMI160 sensor
+ *
+ * @param[in] select_sensor  : enum to choose accel or gyro for self test
+ * @param[in] dev            : Structure instance of bmi160_dev
+ *
+ * @note self test can be performed either for accel/gyro at any instant.
+ *
+ *@verbatim
+ *     value of select_sensor       |  Inference
+ *----------------------------------|--------------------------------
+ *   BMI160_ACCEL_ONLY              | Accel self test enabled
+ *   BMI160_GYRO_ONLY               | Gyro self test enabled
+ *   BMI160_BOTH_ACCEL_AND_GYRO     | NOT TO BE USED
+ *@endverbatim
+ *
+ * @note The return value of this API gives us the result of self test.
+ *
+ * @note Performing self test does soft reset of the sensor, User can
+ * set the desired settings after performing the self test.
+ *
+ * @return Result of API execution status
+ * @retval  BMI160_OK                       Self test success
+ * @retval  BMI160_W_GYRO_SELF_TEST_FAIL    Gyro self test fail
+ * @retval  BMI160_W_ACCEl_SELF_TEST_FAIL   Accel self test fail
+ */
+int8_t bmi160_perform_self_test(uint8_t select_sensor, struct bmi160_dev *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiFIFO FIFO
+ * @brief FIFO operations of the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_get_fifo_data bmi160_get_fifo_data
+ * \code
+ * int8_t bmi160_get_fifo_data(struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API reads data from the fifo buffer.
+ *
+ *  @note User has to allocate the FIFO buffer along with
+ *  corresponding fifo length from his side before calling this API
+ *  as mentioned in the readme.md
+ *
+ *  @note User must specify the number of bytes to read from the FIFO in
+ *  dev->fifo->length , It will be updated by the number of bytes actually
+ *  read from FIFO after calling this API
+ *
+ *  @param[in] dev     : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval Zero Success
+ *  @retval Negative Error
+ */
+int8_t bmi160_get_fifo_data(struct bmi160_dev const *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_set_fifo_flush bmi160_set_fifo_flush
+ * \code
+ * int8_t bmi160_set_fifo_flush(const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API writes fifo_flush command to command register.This
+ *  action clears all data in the Fifo without changing fifo configuration
+ *  settings.
+ *
+ *  @param[in] dev     : Structure instance of bmi160_dev
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_set_fifo_flush(const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_set_fifo_config bmi160_set_fifo_config
+ * \code
+ * int8_t bmi160_set_fifo_config(uint8_t config, uint8_t enable, struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API sets the FIFO configuration in the sensor.
+ *
+ *  @param[in] config : variable used to specify the FIFO
+ *  configurations which are to be enabled or disabled in the sensor.
+ *
+ *  @note : User can set either set one or more or all FIFO configurations
+ *  by ORing the below mentioned macros.
+ *
+ *@verbatim
+ *      config                  |   Value
+ *      ------------------------|---------------------------
+ *      BMI160_FIFO_TIME        |   0x02
+ *      BMI160_FIFO_TAG_INT2    |   0x04
+ *      BMI160_FIFO_TAG_INT1    |   0x08
+ *      BMI160_FIFO_HEADER      |   0x10
+ *      BMI160_FIFO_AUX         |   0x20
+ *      BMI160_FIFO_ACCEL       |   0x40
+ *      BMI160_FIFO_GYRO        |   0x80
+ *@endverbatim
+ *
+ *  @param[in] enable : Parameter used to enable or disable the above
+ *  FIFO configuration
+ *  @param[in] dev : Structure instance of bmi160_dev.
+ *
+ *  @return status of bus communication result
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_set_fifo_config(uint8_t config, uint8_t enable, struct bmi160_dev const *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_set_fifo_down bmi160_set_fifo_down
+ * \code
+ * int8_t bmi160_set_fifo_down(uint8_t fifo_down, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API is used to configure the down sampling ratios of
+ *  the accel and gyro data for FIFO.Also, it configures filtered or
+ *  pre-filtered data for the fifo for accel and gyro.
+ *
+ *  @param[in] fifo_down : variable used to specify the FIFO down
+ *  configurations which are to be enabled or disabled in the sensor.
+ *
+ *  @note The user must select one among the following macros to
+ *  select down-sampling ratio for accel
+ *
+ *@verbatim
+ *      config                               |   Value
+ *      -------------------------------------|---------------------------
+ *      BMI160_ACCEL_FIFO_DOWN_ZERO          |   0x00
+ *      BMI160_ACCEL_FIFO_DOWN_ONE           |   0x10
+ *      BMI160_ACCEL_FIFO_DOWN_TWO           |   0x20
+ *      BMI160_ACCEL_FIFO_DOWN_THREE         |   0x30
+ *      BMI160_ACCEL_FIFO_DOWN_FOUR          |   0x40
+ *      BMI160_ACCEL_FIFO_DOWN_FIVE          |   0x50
+ *      BMI160_ACCEL_FIFO_DOWN_SIX           |   0x60
+ *      BMI160_ACCEL_FIFO_DOWN_SEVEN         |   0x70
+ *@endverbatim
+ *
+ *  @note The user must select one among the following macros to
+ *  select down-sampling ratio for gyro
+ *
+ *@verbatim
+ *      config                               |   Value
+ *      -------------------------------------|---------------------------
+ *      BMI160_GYRO_FIFO_DOWN_ZERO           |   0x00
+ *      BMI160_GYRO_FIFO_DOWN_ONE            |   0x01
+ *      BMI160_GYRO_FIFO_DOWN_TWO            |   0x02
+ *      BMI160_GYRO_FIFO_DOWN_THREE          |   0x03
+ *      BMI160_GYRO_FIFO_DOWN_FOUR           |   0x04
+ *      BMI160_GYRO_FIFO_DOWN_FIVE           |   0x05
+ *      BMI160_GYRO_FIFO_DOWN_SIX            |   0x06
+ *      BMI160_GYRO_FIFO_DOWN_SEVEN          |   0x07
+ *@endverbatim
+ *
+ *  @note The user can enable filtered accel data by the following macro
+ *
+ *@verbatim
+ *      config                               |   Value
+ *      -------------------------------------|---------------------------
+ *      BMI160_ACCEL_FIFO_FILT_EN            |   0x80
+ *@endverbatim
+ *
+ *  @note The user can enable filtered gyro data by the following macro
+ *
+ *@verbatim
+ *      config                               |   Value
+ *      -------------------------------------|---------------------------
+ *      BMI160_GYRO_FIFO_FILT_EN             |   0x08
+ *@endverbatim
+ *
+ *  @note : By ORing the above mentioned macros, the user can select
+ *  the required FIFO down config settings
+ *
+ *  @param[in] dev : Structure instance of bmi160_dev.
+ *
+ *  @return status of bus communication result
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_set_fifo_down(uint8_t fifo_down, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_set_fifo_wm bmi160_set_fifo_wm
+ * \code
+ * int8_t bmi160_set_fifo_wm(uint8_t fifo_wm, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API sets the FIFO watermark level in the sensor.
+ *
+ *  @note The FIFO watermark is issued when the FIFO fill level is
+ *  equal or above the watermark level and units of watermark is 4 bytes.
+ *
+ *  @param[in]  fifo_wm        : Variable used to set the FIFO water mark level
+ *  @param[in]  dev            : Structure instance of bmi160_dev
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_set_fifo_wm(uint8_t fifo_wm, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_extract_accel bmi160_extract_accel
+ * \code
+ * int8_t bmi160_extract_accel(struct bmi160_sensor_data *accel_data, uint8_t *accel_length, struct bmi160_dev const
+ **dev);
+ * \endcode
+ * @details This API parses and extracts the accelerometer frames from
+ *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
+ *  the "accel_data" structure instance.
+ *
+ *  @note The bmi160_extract_accel API should be called only after
+ *  reading the FIFO data by calling the bmi160_get_fifo_data() API.
+ *
+ *  @param[out] accel_data    : Structure instance of bmi160_sensor_data
+ *                              where the accelerometer data in FIFO is stored.
+ *  @param[in,out] accel_length  : Number of valid accelerometer frames
+ *                              (x,y,z axes data) read out from fifo.
+ *  @param[in] dev            : Structure instance of bmi160_dev.
+ *
+ *  @note accel_length is updated with the number of valid accelerometer
+ *  frames extracted from fifo (1 accel frame   = 6 bytes) at the end of
+ *  execution of this API.
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_extract_accel(struct bmi160_sensor_data *accel_data, uint8_t *accel_length, struct bmi160_dev const *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_extract_gyro bmi160_extract_gyro
+ * \code
+ * int8_t bmi160_extract_gyro(struct bmi160_sensor_data *gyro_data, uint8_t *gyro_length, struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API parses and extracts the gyro frames from
+ *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
+ *  the "gyro_data" structure instance.
+ *
+ *  @note The bmi160_extract_gyro API should be called only after
+ *  reading the FIFO data by calling the bmi160_get_fifo_data() API.
+ *
+ *  @param[out] gyro_data    : Structure instance of bmi160_sensor_data
+ *                             where the gyro data in FIFO is stored.
+ *  @param[in,out] gyro_length  : Number of valid gyro frames
+ *                             (x,y,z axes data) read out from fifo.
+ *  @param[in] dev           : Structure instance of bmi160_dev.
+ *
+ *  @note gyro_length is updated with the number of valid gyro
+ *  frames extracted from fifo (1 gyro frame   = 6 bytes) at the end of
+ *  execution of this API.
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_extract_gyro(struct bmi160_sensor_data *gyro_data, uint8_t *gyro_length, struct bmi160_dev const *dev);
+
+/*!
+ * \ingroup bmi160ApiFIFO
+ * \page bmi160_api_bmi160_extract_aux bmi160_extract_aux
+ * \code
+ * int8_t bmi160_extract_aux(struct bmi160_aux_data *aux_data, uint8_t *aux_len, struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API parses and extracts the aux frames from
+ *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
+ *  the bmi160_aux_data structure instance.
+ *
+ *  @note The bmi160_extract_aux API should be called only after
+ *  reading the FIFO data by calling the bmi160_get_fifo_data() API.
+ *
+ *  @param[out] aux_data    : Structure instance of bmi160_aux_data
+ *                            where the aux data in FIFO is stored.
+ *  @param[in,out] aux_len  : Number of valid aux frames (8bytes)
+ *                            read out from FIFO.
+ *  @param[in] dev          : Structure instance of bmi160_dev.
+ *
+ *  @note aux_len is updated with the number of valid aux
+ *  frames extracted from fifo (1 aux frame = 8 bytes) at the end of
+ *  execution of this API.
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ *
+ */
+int8_t bmi160_extract_aux(struct bmi160_aux_data *aux_data, uint8_t *aux_len, struct bmi160_dev const *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiFOC FOC
+ * @brief Start FOC of accel and gyro sensors
+ */
+
+/*!
+ * \ingroup bmi160ApiFOC
+ * \page bmi160_api_bmi160_start_foc bmi160_start_foc
+ * \code
+ * int8_t bmi160_start_foc(const struct bmi160_foc_conf *foc_conf,
+ * \endcode
+ * @details This API starts the FOC of accel and gyro
+ *
+ *  @note FOC should not be used in low-power mode of sensor
+ *
+ *  @note Accel FOC targets values of +1g , 0g , -1g
+ *  Gyro FOC always targets value of 0 dps
+ *
+ *  @param[in] foc_conf    : Structure instance of bmi160_foc_conf which
+ *                                   has the FOC configuration
+ *  @param[in,out] offset  : Structure instance to store Offset
+ *                                   values read from sensor
+ *  @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ *  @note Pre-requisites for triggering FOC in accel , Set the following,
+ *   Enable the acc_off_en
+ *       Ex :  foc_conf.acc_off_en = BMI160_ENABLE;
+ *
+ *   Set the desired target values of FOC to each axes (x,y,z) by using the
+ *   following macros
+ *       - BMI160_FOC_ACCEL_DISABLED
+ *       - BMI160_FOC_ACCEL_POSITIVE_G
+ *       - BMI160_FOC_ACCEL_NEGATIVE_G
+ *       - BMI160_FOC_ACCEL_0G
+ *
+ *   Ex : foc_conf.foc_acc_x  = BMI160_FOC_ACCEL_0G;
+ *        foc_conf.foc_acc_y  = BMI160_FOC_ACCEL_0G;
+ *        foc_conf.foc_acc_z  = BMI160_FOC_ACCEL_POSITIVE_G;
+ *
+ *  @note Pre-requisites for triggering FOC in gyro ,
+ *  Set the following parameters,
+ *
+ *   Ex : foc_conf.foc_gyr_en = BMI160_ENABLE;
+ *        foc_conf.gyro_off_en = BMI160_ENABLE;
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ */
+int8_t bmi160_start_foc(const struct bmi160_foc_conf *foc_conf,
+                        struct bmi160_offsets *offset,
+                        struct bmi160_dev const *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiOffsets Offsets
+ * @brief Set / Get offset values of accel and gyro sensors
+ */
+
+/*!
+ * \ingroup bmi160ApiOffsets
+ * \page bmi160_api_bmi160_get_offsets bmi160_get_offsets
+ * \code
+ * int8_t bmi160_get_offsets(struct bmi160_offsets *offset, const struct bmi160_dev *dev);
+ * \endcode
+ * @details This API reads and stores the offset values of accel and gyro
+ *
+ *  @param[in,out] offset : Structure instance of bmi160_offsets in which
+ *                          the offset values are read and stored
+ *  @param[in] dev        : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ */
+int8_t bmi160_get_offsets(struct bmi160_offsets *offset, const struct bmi160_dev *dev);
+
+/*!
+ * \ingroup bmi160ApiOffsets
+ * \page bmi160_api_bmi160_set_offsets bmi160_set_offsets
+ * \code
+ * int8_t bmi160_set_offsets(const struct bmi160_foc_conf *foc_conf,
+ *                         const struct bmi160_offsets *offset,
+ *                         struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API writes the offset values of accel and gyro to
+ *  the sensor but these values will be reset on POR or soft reset.
+ *
+ *  @param[in] foc_conf    : Structure instance of bmi160_foc_conf which
+ *                                   has the FOC configuration
+ *  @param[in] offset      : Structure instance in which user updates offset
+ *                            values which are to be written in the sensor
+ *  @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ *  @note Offsets can be set by user like offset->off_acc_x = 10;
+ *  where 1LSB = 3.9mg and for gyro 1LSB = 0.061degrees/second
+ *
+ * @note BMI160 offset values for xyz axes of accel should be within range of
+ *  BMI160_ACCEL_MIN_OFFSET (-128) to BMI160_ACCEL_MAX_OFFSET (127)
+ *
+ * @note BMI160 offset values for xyz axes of gyro should be within range of
+ *  BMI160_GYRO_MIN_OFFSET (-512) to BMI160_GYRO_MAX_OFFSET (511)
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ */
+int8_t bmi160_set_offsets(const struct bmi160_foc_conf *foc_conf,
+                          const struct bmi160_offsets *offset,
+                          struct bmi160_dev const *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiNVM NVM
+ * @brief Write image registers values to NVM
+ */
+
+/*!
+ * \ingroup bmi160ApiNVM
+ * \page bmi160_api_bmi160_update_nvm bmi160_update_nvm
+ * \code
+ * int8_t bmi160_update_nvm(struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API writes the image registers values to NVM which is
+ *  stored even after POR or soft reset
+ *
+ *  @param[in] dev         : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ */
+int8_t bmi160_update_nvm(struct bmi160_dev const *dev);
+
+/**
+ * \ingroup bmi160
+ * \defgroup bmi160ApiInts Interrupt status
+ * @brief Read interrupt status from the sensor
+ */
+
+/*!
+ * \ingroup bmi160ApiInts
+ * \page bmi160_api_bmi160_get_int_status bmi160_get_int_status
+ * \code
+ * int8_t bmi160_get_int_status(enum bmi160_int_status_sel int_status_sel,
+ *                            union bmi160_int_status *int_status,
+ *                            struct bmi160_dev const *dev);
+ * \endcode
+ * @details This API gets the interrupt status from the sensor.
+ *
+ *  @param[in] int_status_sel       : Enum variable to select either individual or all the
+ *  interrupt status bits.
+ *  @param[in] int_status           : pointer variable to get the interrupt status
+ *  from the sensor.
+ *  param[in] dev                   : Structure instance of bmi160_dev.
+ *
+ *  @return Result of API execution status
+ *  @retval 0 -> Success
+ *  @retval Any non zero value -> Fail
+ */
+int8_t bmi160_get_int_status(enum bmi160_int_status_sel int_status_sel,
+                             union bmi160_int_status *int_status,
+                             struct bmi160_dev const *dev);
+
+/*************************** C++ guard macro *****************************/
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BMI160_H_ */

lib/bmi160-api/bmi160_defs.h

@@ -0,0 +1,1647 @@
+/**
+* Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
+*
+* BSD-3-Clause
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+*    notice, this list of conditions and the following disclaimer.
+*
+* 2. Redistributions in binary form must reproduce the above copyright
+*    notice, this list of conditions and the following disclaimer in the
+*    documentation and/or other materials provided with the distribution.
+*
+* 3. Neither the name of the copyright holder nor the names of its
+*    contributors may be used to endorse or promote products derived from
+*    this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+* @file       bmi160_defs.h
+* @date       2021-10-05
+* @version    v3.9.2
+*
+*/
+
+#ifndef BMI160_DEFS_H_
+#define BMI160_DEFS_H_
+
+/*************************** C types headers *****************************/
+#ifdef __KERNEL__
+#include <linux/types.h>
+#include <linux/kernel.h>
+#else
+#include <stdint.h>
+#include <stddef.h>
+#endif
+
+/*************************** Common macros   *****************************/
+
+#if !defined(UINT8_C) && !defined(INT8_C)
+#define INT8_C(x)                                 S8_C(x)
+#define UINT8_C(x)                                U8_C(x)
+#endif
+
+#if !defined(UINT16_C) && !defined(INT16_C)
+#define INT16_C(x)                                S16_C(x)
+#define UINT16_C(x)                               U16_C(x)
+#endif
+
+#if !defined(INT32_C) && !defined(UINT32_C)
+#define INT32_C(x)                                S32_C(x)
+#define UINT32_C(x)                               U32_C(x)
+#endif
+
+#if !defined(INT64_C) && !defined(UINT64_C)
+#define INT64_C(x)                                S64_C(x)
+#define UINT64_C(x)                               U64_C(x)
+#endif
+
+/**@}*/
+/**\name C standard macros */
+#ifndef NULL
+#ifdef __cplusplus
+#define NULL                                      0
+#else
+#define NULL                                      ((void *) 0)
+#endif
+#endif
+
+/*************************** Sensor macros   *****************************/
+/* Test for an endian machine */
+#ifndef __ORDER_LITTLE_ENDIAN__
+#define __ORDER_LITTLE_ENDIAN__                   0
+#endif
+
+#ifndef __BYTE_ORDER__
+#define __BYTE_ORDER__                            __ORDER_LITTLE_ENDIAN__
+#endif
+
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+#ifndef LITTLE_ENDIAN
+#define LITTLE_ENDIAN                             1
+#endif
+#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#ifndef BIG_ENDIAN
+#define BIG_ENDIAN                                1
+#endif
+#else
+#error "Code does not support Endian format of the processor"
+#endif
+
+/** Mask definitions */
+#define BMI160_ACCEL_BW_MASK                      UINT8_C(0x70)
+#define BMI160_ACCEL_ODR_MASK                     UINT8_C(0x0F)
+#define BMI160_ACCEL_UNDERSAMPLING_MASK           UINT8_C(0x80)
+#define BMI160_ACCEL_RANGE_MASK                   UINT8_C(0x0F)
+#define BMI160_GYRO_BW_MASK                       UINT8_C(0x30)
+#define BMI160_GYRO_ODR_MASK                      UINT8_C(0x0F)
+#define BMI160_GYRO_RANGE_MASK                    UINT8_C(0x07)
+
+#define BMI160_ACCEL_BW_POS                       UINT8_C(4)
+#define BMI160_GYRO_BW_POS                        UINT8_C(4)
+
+/** Mask definitions for INT_EN registers */
+#define BMI160_ANY_MOTION_X_INT_EN_MASK           UINT8_C(0x01)
+#define BMI160_HIGH_G_X_INT_EN_MASK               UINT8_C(0x01)
+#define BMI160_NO_MOTION_X_INT_EN_MASK            UINT8_C(0x01)
+#define BMI160_ANY_MOTION_Y_INT_EN_MASK           UINT8_C(0x02)
+#define BMI160_HIGH_G_Y_INT_EN_MASK               UINT8_C(0x02)
+#define BMI160_NO_MOTION_Y_INT_EN_MASK            UINT8_C(0x02)
+#define BMI160_ANY_MOTION_Z_INT_EN_MASK           UINT8_C(0x04)
+#define BMI160_HIGH_G_Z_INT_EN_MASK               UINT8_C(0x04)
+#define BMI160_NO_MOTION_Z_INT_EN_MASK            UINT8_C(0x04)
+#define BMI160_SIG_MOTION_INT_EN_MASK             UINT8_C(0x07)
+#define BMI160_ANY_MOTION_ALL_INT_EN_MASK         UINT8_C(0x07)
+#define BMI160_STEP_DETECT_INT_EN_MASK            UINT8_C(0x08)
+#define BMI160_DOUBLE_TAP_INT_EN_MASK             UINT8_C(0x10)
+#define BMI160_SINGLE_TAP_INT_EN_MASK             UINT8_C(0x20)
+#define BMI160_FIFO_FULL_INT_EN_MASK              UINT8_C(0x20)
+#define BMI160_ORIENT_INT_EN_MASK                 UINT8_C(0x40)
+#define BMI160_FIFO_WATERMARK_INT_EN_MASK         UINT8_C(0x40)
+#define BMI160_LOW_G_INT_EN_MASK                  UINT8_C(0x08)
+#define BMI160_STEP_DETECT_EN_MASK                UINT8_C(0x08)
+#define BMI160_FLAT_INT_EN_MASK                   UINT8_C(0x80)
+#define BMI160_DATA_RDY_INT_EN_MASK               UINT8_C(0x10)
+
+/** PMU status Macros */
+#define BMI160_AUX_PMU_SUSPEND                    UINT8_C(0x00)
+#define BMI160_AUX_PMU_NORMAL                     UINT8_C(0x01)
+#define BMI160_AUX_PMU_LOW_POWER                  UINT8_C(0x02)
+
+#define BMI160_GYRO_PMU_SUSPEND                   UINT8_C(0x00)
+#define BMI160_GYRO_PMU_NORMAL                    UINT8_C(0x01)
+#define BMI160_GYRO_PMU_FSU                       UINT8_C(0x03)
+
+#define BMI160_ACCEL_PMU_SUSPEND                  UINT8_C(0x00)
+#define BMI160_ACCEL_PMU_NORMAL                   UINT8_C(0x01)
+#define BMI160_ACCEL_PMU_LOW_POWER                UINT8_C(0x02)
+
+/** Mask definitions for INT_OUT_CTRL register */
+#define BMI160_INT1_EDGE_CTRL_MASK                UINT8_C(0x01)
+#define BMI160_INT1_OUTPUT_MODE_MASK              UINT8_C(0x04)
+#define BMI160_INT1_OUTPUT_TYPE_MASK              UINT8_C(0x02)
+#define BMI160_INT1_OUTPUT_EN_MASK                UINT8_C(0x08)
+#define BMI160_INT2_EDGE_CTRL_MASK                UINT8_C(0x10)
+#define BMI160_INT2_OUTPUT_MODE_MASK              UINT8_C(0x40)
+#define BMI160_INT2_OUTPUT_TYPE_MASK              UINT8_C(0x20)
+#define BMI160_INT2_OUTPUT_EN_MASK                UINT8_C(0x80)
+
+/** Mask definitions for INT_LATCH register */
+#define BMI160_INT1_INPUT_EN_MASK                 UINT8_C(0x10)
+#define BMI160_INT2_INPUT_EN_MASK                 UINT8_C(0x20)
+#define BMI160_INT_LATCH_MASK                     UINT8_C(0x0F)
+
+/** Mask definitions for INT_MAP register */
+#define BMI160_INT1_LOW_G_MASK                    UINT8_C(0x01)
+#define BMI160_INT1_HIGH_G_MASK                   UINT8_C(0x02)
+#define BMI160_INT1_SLOPE_MASK                    UINT8_C(0x04)
+#define BMI160_INT1_NO_MOTION_MASK                UINT8_C(0x08)
+#define BMI160_INT1_DOUBLE_TAP_MASK               UINT8_C(0x10)
+#define BMI160_INT1_SINGLE_TAP_MASK               UINT8_C(0x20)
+#define BMI160_INT1_FIFO_FULL_MASK                UINT8_C(0x20)
+#define BMI160_INT1_FIFO_WM_MASK                  UINT8_C(0x40)
+#define BMI160_INT1_ORIENT_MASK                   UINT8_C(0x40)
+#define BMI160_INT1_FLAT_MASK                     UINT8_C(0x80)
+#define BMI160_INT1_DATA_READY_MASK               UINT8_C(0x80)
+#define BMI160_INT2_LOW_G_MASK                    UINT8_C(0x01)
+#define BMI160_INT1_LOW_STEP_DETECT_MASK          UINT8_C(0x01)
+#define BMI160_INT2_LOW_STEP_DETECT_MASK          UINT8_C(0x01)
+#define BMI160_INT2_HIGH_G_MASK                   UINT8_C(0x02)
+#define BMI160_INT2_FIFO_FULL_MASK                UINT8_C(0x02)
+#define BMI160_INT2_FIFO_WM_MASK                  UINT8_C(0x04)
+#define BMI160_INT2_SLOPE_MASK                    UINT8_C(0x04)
+#define BMI160_INT2_DATA_READY_MASK               UINT8_C(0x08)
+#define BMI160_INT2_NO_MOTION_MASK                UINT8_C(0x08)
+#define BMI160_INT2_DOUBLE_TAP_MASK               UINT8_C(0x10)
+#define BMI160_INT2_SINGLE_TAP_MASK               UINT8_C(0x20)
+#define BMI160_INT2_ORIENT_MASK                   UINT8_C(0x40)
+#define BMI160_INT2_FLAT_MASK                     UINT8_C(0x80)
+
+/** Mask definitions for INT_DATA register */
+#define BMI160_TAP_SRC_INT_MASK                   UINT8_C(0x08)
+#define BMI160_LOW_HIGH_SRC_INT_MASK              UINT8_C(0x80)
+#define BMI160_MOTION_SRC_INT_MASK                UINT8_C(0x80)
+
+/** Mask definitions for INT_MOTION register */
+#define BMI160_SLOPE_INT_DUR_MASK                 UINT8_C(0x03)
+#define BMI160_NO_MOTION_INT_DUR_MASK             UINT8_C(0xFC)
+#define BMI160_NO_MOTION_SEL_BIT_MASK             UINT8_C(0x01)
+
+/** Mask definitions for INT_TAP register */
+#define BMI160_TAP_DUR_MASK                       UINT8_C(0x07)
+#define BMI160_TAP_SHOCK_DUR_MASK                 UINT8_C(0x40)
+#define BMI160_TAP_QUIET_DUR_MASK                 UINT8_C(0x80)
+#define BMI160_TAP_THRES_MASK                     UINT8_C(0x1F)
+
+/** Mask definitions for INT_FLAT register */
+#define BMI160_FLAT_THRES_MASK                    UINT8_C(0x3F)
+#define BMI160_FLAT_HOLD_TIME_MASK                UINT8_C(0x30)
+#define BMI160_FLAT_HYST_MASK                     UINT8_C(0x07)
+
+/** Mask definitions for INT_LOWHIGH register */
+#define BMI160_LOW_G_HYST_MASK                    UINT8_C(0x03)
+#define BMI160_LOW_G_LOW_MODE_MASK                UINT8_C(0x04)
+#define BMI160_HIGH_G_HYST_MASK                   UINT8_C(0xC0)
+
+/** Mask definitions for INT_SIG_MOTION register */
+#define BMI160_SIG_MOTION_SEL_MASK                UINT8_C(0x02)
+#define BMI160_SIG_MOTION_SKIP_MASK               UINT8_C(0x0C)
+#define BMI160_SIG_MOTION_PROOF_MASK              UINT8_C(0x30)
+
+/** Mask definitions for INT_ORIENT register */
+#define BMI160_ORIENT_MODE_MASK                   UINT8_C(0x03)
+#define BMI160_ORIENT_BLOCK_MASK                  UINT8_C(0x0C)
+#define BMI160_ORIENT_HYST_MASK                   UINT8_C(0xF0)
+#define BMI160_ORIENT_THETA_MASK                  UINT8_C(0x3F)
+#define BMI160_ORIENT_UD_ENABLE                   UINT8_C(0x40)
+#define BMI160_AXES_EN_MASK                       UINT8_C(0x80)
+
+/** Mask definitions for FIFO_CONFIG register */
+#define BMI160_FIFO_GYRO                          UINT8_C(0x80)
+#define BMI160_FIFO_ACCEL                         UINT8_C(0x40)
+#define BMI160_FIFO_AUX                           UINT8_C(0x20)
+#define BMI160_FIFO_TAG_INT1                      UINT8_C(0x08)
+#define BMI160_FIFO_TAG_INT2                      UINT8_C(0x04)
+#define BMI160_FIFO_TIME                          UINT8_C(0x02)
+#define BMI160_FIFO_HEADER                        UINT8_C(0x10)
+#define BMI160_FIFO_CONFIG_1_MASK                 UINT8_C(0xFE)
+
+/** Mask definitions for STEP_CONF register */
+#define BMI160_STEP_COUNT_EN_BIT_MASK             UINT8_C(0x08)
+#define BMI160_STEP_DETECT_MIN_THRES_MASK         UINT8_C(0x18)
+#define BMI160_STEP_DETECT_STEPTIME_MIN_MASK      UINT8_C(0x07)
+#define BMI160_STEP_MIN_BUF_MASK                  UINT8_C(0x07)
+
+/** Mask definition for FIFO Header Data Tag */
+#define BMI160_FIFO_TAG_INTR_MASK                 UINT8_C(0xFC)
+
+/** Fifo byte counter mask definitions */
+#define BMI160_FIFO_BYTE_COUNTER_MASK             UINT8_C(0x07)
+
+/** Enable/disable bit value */
+#define BMI160_ENABLE                             UINT8_C(0x01)
+#define BMI160_DISABLE                            UINT8_C(0x00)
+
+/** Latch Duration */
+#define BMI160_LATCH_DUR_NONE                     UINT8_C(0x00)
+#define BMI160_LATCH_DUR_312_5_MICRO_SEC          UINT8_C(0x01)
+#define BMI160_LATCH_DUR_625_MICRO_SEC            UINT8_C(0x02)
+#define BMI160_LATCH_DUR_1_25_MILLI_SEC           UINT8_C(0x03)
+#define BMI160_LATCH_DUR_2_5_MILLI_SEC            UINT8_C(0x04)
+#define BMI160_LATCH_DUR_5_MILLI_SEC              UINT8_C(0x05)
+#define BMI160_LATCH_DUR_10_MILLI_SEC             UINT8_C(0x06)
+#define BMI160_LATCH_DUR_20_MILLI_SEC             UINT8_C(0x07)
+#define BMI160_LATCH_DUR_40_MILLI_SEC             UINT8_C(0x08)
+#define BMI160_LATCH_DUR_80_MILLI_SEC             UINT8_C(0x09)
+#define BMI160_LATCH_DUR_160_MILLI_SEC            UINT8_C(0x0A)
+#define BMI160_LATCH_DUR_320_MILLI_SEC            UINT8_C(0x0B)
+#define BMI160_LATCH_DUR_640_MILLI_SEC            UINT8_C(0x0C)
+#define BMI160_LATCH_DUR_1_28_SEC                 UINT8_C(0x0D)
+#define BMI160_LATCH_DUR_2_56_SEC                 UINT8_C(0x0E)
+#define BMI160_LATCHED                            UINT8_C(0x0F)
+
+/** BMI160 Register map */
+#define BMI160_CHIP_ID_ADDR                       UINT8_C(0x00)
+#define BMI160_ERROR_REG_ADDR                     UINT8_C(0x02)
+#define BMI160_PMU_STATUS_ADDR                    UINT8_C(0x03)
+#define BMI160_AUX_DATA_ADDR                      UINT8_C(0x04)
+#define BMI160_GYRO_DATA_ADDR                     UINT8_C(0x0C)
+#define BMI160_ACCEL_DATA_ADDR                    UINT8_C(0x12)
+#define BMI160_STATUS_ADDR                        UINT8_C(0x1B)
+#define BMI160_INT_STATUS_ADDR                    UINT8_C(0x1C)
+#define BMI160_FIFO_LENGTH_ADDR                   UINT8_C(0x22)
+#define BMI160_FIFO_DATA_ADDR                     UINT8_C(0x24)
+#define BMI160_ACCEL_CONFIG_ADDR                  UINT8_C(0x40)
+#define BMI160_ACCEL_RANGE_ADDR                   UINT8_C(0x41)
+#define BMI160_GYRO_CONFIG_ADDR                   UINT8_C(0x42)
+#define BMI160_GYRO_RANGE_ADDR                    UINT8_C(0x43)
+#define BMI160_AUX_ODR_ADDR                       UINT8_C(0x44)
+#define BMI160_FIFO_DOWN_ADDR                     UINT8_C(0x45)
+#define BMI160_FIFO_CONFIG_0_ADDR                 UINT8_C(0x46)
+#define BMI160_FIFO_CONFIG_1_ADDR                 UINT8_C(0x47)
+#define BMI160_AUX_IF_0_ADDR                      UINT8_C(0x4B)
+#define BMI160_AUX_IF_1_ADDR                      UINT8_C(0x4C)
+#define BMI160_AUX_IF_2_ADDR                      UINT8_C(0x4D)
+#define BMI160_AUX_IF_3_ADDR                      UINT8_C(0x4E)
+#define BMI160_AUX_IF_4_ADDR                      UINT8_C(0x4F)
+#define BMI160_INT_ENABLE_0_ADDR                  UINT8_C(0x50)
+#define BMI160_INT_ENABLE_1_ADDR                  UINT8_C(0x51)
+#define BMI160_INT_ENABLE_2_ADDR                  UINT8_C(0x52)
+#define BMI160_INT_OUT_CTRL_ADDR                  UINT8_C(0x53)
+#define BMI160_INT_LATCH_ADDR                     UINT8_C(0x54)
+#define BMI160_INT_MAP_0_ADDR                     UINT8_C(0x55)
+#define BMI160_INT_MAP_1_ADDR                     UINT8_C(0x56)
+#define BMI160_INT_MAP_2_ADDR                     UINT8_C(0x57)
+#define BMI160_INT_DATA_0_ADDR                    UINT8_C(0x58)
+#define BMI160_INT_DATA_1_ADDR                    UINT8_C(0x59)
+#define BMI160_INT_LOWHIGH_0_ADDR                 UINT8_C(0x5A)
+#define BMI160_INT_LOWHIGH_1_ADDR                 UINT8_C(0x5B)
+#define BMI160_INT_LOWHIGH_2_ADDR                 UINT8_C(0x5C)
+#define BMI160_INT_LOWHIGH_3_ADDR                 UINT8_C(0x5D)
+#define BMI160_INT_LOWHIGH_4_ADDR                 UINT8_C(0x5E)
+#define BMI160_INT_MOTION_0_ADDR                  UINT8_C(0x5F)
+#define BMI160_INT_MOTION_1_ADDR                  UINT8_C(0x60)
+#define BMI160_INT_MOTION_2_ADDR                  UINT8_C(0x61)
+#define BMI160_INT_MOTION_3_ADDR                  UINT8_C(0x62)
+#define BMI160_INT_TAP_0_ADDR                     UINT8_C(0x63)
+#define BMI160_INT_TAP_1_ADDR                     UINT8_C(0x64)
+#define BMI160_INT_ORIENT_0_ADDR                  UINT8_C(0x65)
+#define BMI160_INT_ORIENT_1_ADDR                  UINT8_C(0x66)
+#define BMI160_INT_FLAT_0_ADDR                    UINT8_C(0x67)
+#define BMI160_INT_FLAT_1_ADDR                    UINT8_C(0x68)
+#define BMI160_FOC_CONF_ADDR                      UINT8_C(0x69)
+#define BMI160_CONF_ADDR                          UINT8_C(0x6A)
+
+#define BMI160_IF_CONF_ADDR                       UINT8_C(0x6B)
+#define BMI160_SELF_TEST_ADDR                     UINT8_C(0x6D)
+#define BMI160_OFFSET_ADDR                        UINT8_C(0x71)
+#define BMI160_OFFSET_CONF_ADDR                   UINT8_C(0x77)
+#define BMI160_INT_STEP_CNT_0_ADDR                UINT8_C(0x78)
+#define BMI160_INT_STEP_CONFIG_0_ADDR             UINT8_C(0x7A)
+#define BMI160_INT_STEP_CONFIG_1_ADDR             UINT8_C(0x7B)
+#define BMI160_COMMAND_REG_ADDR                   UINT8_C(0x7E)
+#define BMI160_SPI_COMM_TEST_ADDR                 UINT8_C(0x7F)
+#define BMI160_INTL_PULLUP_CONF_ADDR              UINT8_C(0x85)
+
+/** Error code definitions */
+#define BMI160_OK                                 INT8_C(0)
+#define BMI160_E_NULL_PTR                         INT8_C(-1)
+#define BMI160_E_COM_FAIL                         INT8_C(-2)
+#define BMI160_E_DEV_NOT_FOUND                    INT8_C(-3)
+#define BMI160_E_OUT_OF_RANGE                     INT8_C(-4)
+#define BMI160_E_INVALID_INPUT                    INT8_C(-5)
+#define BMI160_E_ACCEL_ODR_BW_INVALID             INT8_C(-6)
+#define BMI160_E_GYRO_ODR_BW_INVALID              INT8_C(-7)
+#define BMI160_E_LWP_PRE_FLTR_INT_INVALID         INT8_C(-8)
+#define BMI160_E_LWP_PRE_FLTR_INVALID             INT8_C(-9)
+#define BMI160_E_AUX_NOT_FOUND                    INT8_C(-10)
+#define BMI160_E_FOC_FAILURE                      INT8_C(-11)
+#define BMI160_E_READ_WRITE_LENGTH_INVALID        INT8_C(-12)
+#define BMI160_E_INVALID_CONFIG                   INT8_C(-13)
+
+/**\name API warning codes */
+#define BMI160_W_GYRO_SELF_TEST_FAIL              INT8_C(1)
+#define BMI160_W_ACCEl_SELF_TEST_FAIL             INT8_C(2)
+
+/** BMI160 unique chip identifier */
+#define BMI160_CHIP_ID                            UINT8_C(0xD1)
+
+/** Soft reset command */
+#define BMI160_SOFT_RESET_CMD                     UINT8_C(0xb6)
+#define BMI160_SOFT_RESET_DELAY_MS                UINT8_C(1)
+
+/** Start FOC command */
+#define BMI160_START_FOC_CMD                      UINT8_C(0x03)
+
+/** NVM backup enabling command */
+#define BMI160_NVM_BACKUP_EN                      UINT8_C(0xA0)
+
+/* Delay in ms settings */
+#define BMI160_ACCEL_DELAY_MS                     UINT8_C(5)
+#define BMI160_GYRO_DELAY_MS                      UINT8_C(80)
+#define BMI160_ONE_MS_DELAY                       UINT8_C(1)
+#define BMI160_AUX_COM_DELAY                      UINT8_C(10)
+#define BMI160_GYRO_SELF_TEST_DELAY               UINT8_C(20)
+#define BMI160_ACCEL_SELF_TEST_DELAY              UINT8_C(50)
+
+/** Self test configurations */
+#define BMI160_ACCEL_SELF_TEST_CONFIG             UINT8_C(0x2C)
+#define BMI160_ACCEL_SELF_TEST_POSITIVE_EN        UINT8_C(0x0D)
+#define BMI160_ACCEL_SELF_TEST_NEGATIVE_EN        UINT8_C(0x09)
+#define BMI160_ACCEL_SELF_TEST_LIMIT              UINT16_C(8192)
+
+/** Power mode settings */
+/* Accel power mode */
+#define BMI160_ACCEL_NORMAL_MODE                  UINT8_C(0x11)
+#define BMI160_ACCEL_LOWPOWER_MODE                UINT8_C(0x12)
+#define BMI160_ACCEL_SUSPEND_MODE                 UINT8_C(0x10)
+
+/* Gyro power mode */
+#define BMI160_GYRO_SUSPEND_MODE                  UINT8_C(0x14)
+#define BMI160_GYRO_NORMAL_MODE                   UINT8_C(0x15)
+#define BMI160_GYRO_FASTSTARTUP_MODE              UINT8_C(0x17)
+
+/* Aux power mode */
+#define BMI160_AUX_SUSPEND_MODE                   UINT8_C(0x18)
+#define BMI160_AUX_NORMAL_MODE                    UINT8_C(0x19)
+#define BMI160_AUX_LOWPOWER_MODE                  UINT8_C(0x1A)
+
+/** Range settings */
+/* Accel Range */
+#define BMI160_ACCEL_RANGE_2G                     UINT8_C(0x03)
+#define BMI160_ACCEL_RANGE_4G                     UINT8_C(0x05)
+#define BMI160_ACCEL_RANGE_8G                     UINT8_C(0x08)
+#define BMI160_ACCEL_RANGE_16G                    UINT8_C(0x0C)
+
+/* Gyro Range */
+#define BMI160_GYRO_RANGE_2000_DPS                UINT8_C(0x00)
+#define BMI160_GYRO_RANGE_1000_DPS                UINT8_C(0x01)
+#define BMI160_GYRO_RANGE_500_DPS                 UINT8_C(0x02)
+#define BMI160_GYRO_RANGE_250_DPS                 UINT8_C(0x03)
+#define BMI160_GYRO_RANGE_125_DPS                 UINT8_C(0x04)
+
+/** Bandwidth settings */
+/* Accel Bandwidth */
+#define BMI160_ACCEL_BW_OSR4_AVG1                 UINT8_C(0x00)
+#define BMI160_ACCEL_BW_OSR2_AVG2                 UINT8_C(0x01)
+#define BMI160_ACCEL_BW_NORMAL_AVG4               UINT8_C(0x02)
+#define BMI160_ACCEL_BW_RES_AVG8                  UINT8_C(0x03)
+#define BMI160_ACCEL_BW_RES_AVG16                 UINT8_C(0x04)
+#define BMI160_ACCEL_BW_RES_AVG32                 UINT8_C(0x05)
+#define BMI160_ACCEL_BW_RES_AVG64                 UINT8_C(0x06)
+#define BMI160_ACCEL_BW_RES_AVG128                UINT8_C(0x07)
+
+#define BMI160_GYRO_BW_OSR4_MODE                  UINT8_C(0x00)
+#define BMI160_GYRO_BW_OSR2_MODE                  UINT8_C(0x01)
+#define BMI160_GYRO_BW_NORMAL_MODE                UINT8_C(0x02)
+
+/* Output Data Rate settings */
+/* Accel Output data rate */
+#define BMI160_ACCEL_ODR_RESERVED                 UINT8_C(0x00)
+#define BMI160_ACCEL_ODR_0_78HZ                   UINT8_C(0x01)
+#define BMI160_ACCEL_ODR_1_56HZ                   UINT8_C(0x02)
+#define BMI160_ACCEL_ODR_3_12HZ                   UINT8_C(0x03)
+#define BMI160_ACCEL_ODR_6_25HZ                   UINT8_C(0x04)
+#define BMI160_ACCEL_ODR_12_5HZ                   UINT8_C(0x05)
+#define BMI160_ACCEL_ODR_25HZ                     UINT8_C(0x06)
+#define BMI160_ACCEL_ODR_50HZ                     UINT8_C(0x07)
+#define BMI160_ACCEL_ODR_100HZ                    UINT8_C(0x08)
+#define BMI160_ACCEL_ODR_200HZ                    UINT8_C(0x09)
+#define BMI160_ACCEL_ODR_400HZ                    UINT8_C(0x0A)
+#define BMI160_ACCEL_ODR_800HZ                    UINT8_C(0x0B)
+#define BMI160_ACCEL_ODR_1600HZ                   UINT8_C(0x0C)
+#define BMI160_ACCEL_ODR_RESERVED0                UINT8_C(0x0D)
+#define BMI160_ACCEL_ODR_RESERVED1                UINT8_C(0x0E)
+#define BMI160_ACCEL_ODR_RESERVED2                UINT8_C(0x0F)
+
+/* Gyro Output data rate */
+#define BMI160_GYRO_ODR_RESERVED                  UINT8_C(0x00)
+#define BMI160_GYRO_ODR_25HZ                      UINT8_C(0x06)
+#define BMI160_GYRO_ODR_50HZ                      UINT8_C(0x07)
+#define BMI160_GYRO_ODR_100HZ                     UINT8_C(0x08)
+#define BMI160_GYRO_ODR_200HZ                     UINT8_C(0x09)
+#define BMI160_GYRO_ODR_400HZ                     UINT8_C(0x0A)
+#define BMI160_GYRO_ODR_800HZ                     UINT8_C(0x0B)
+#define BMI160_GYRO_ODR_1600HZ                    UINT8_C(0x0C)
+#define BMI160_GYRO_ODR_3200HZ                    UINT8_C(0x0D)
+
+/* Auxiliary sensor Output data rate */
+#define BMI160_AUX_ODR_RESERVED                   UINT8_C(0x00)
+#define BMI160_AUX_ODR_0_78HZ                     UINT8_C(0x01)
+#define BMI160_AUX_ODR_1_56HZ                     UINT8_C(0x02)
+#define BMI160_AUX_ODR_3_12HZ                     UINT8_C(0x03)
+#define BMI160_AUX_ODR_6_25HZ                     UINT8_C(0x04)
+#define BMI160_AUX_ODR_12_5HZ                     UINT8_C(0x05)
+#define BMI160_AUX_ODR_25HZ                       UINT8_C(0x06)
+#define BMI160_AUX_ODR_50HZ                       UINT8_C(0x07)
+#define BMI160_AUX_ODR_100HZ                      UINT8_C(0x08)
+#define BMI160_AUX_ODR_200HZ                      UINT8_C(0x09)
+#define BMI160_AUX_ODR_400HZ                      UINT8_C(0x0A)
+#define BMI160_AUX_ODR_800HZ                      UINT8_C(0x0B)
+
+/** FIFO_CONFIG Definitions */
+#define BMI160_FIFO_TIME_ENABLE                   UINT8_C(0x02)
+#define BMI160_FIFO_TAG_INT2_ENABLE               UINT8_C(0x04)
+#define BMI160_FIFO_TAG_INT1_ENABLE               UINT8_C(0x08)
+#define BMI160_FIFO_HEAD_ENABLE                   UINT8_C(0x10)
+#define BMI160_FIFO_M_ENABLE                      UINT8_C(0x20)
+#define BMI160_FIFO_A_ENABLE                      UINT8_C(0x40)
+#define BMI160_FIFO_M_A_ENABLE                    UINT8_C(0x60)
+#define BMI160_FIFO_G_ENABLE                      UINT8_C(0x80)
+#define BMI160_FIFO_M_G_ENABLE                    UINT8_C(0xA0)
+#define BMI160_FIFO_G_A_ENABLE                    UINT8_C(0xC0)
+#define BMI160_FIFO_M_G_A_ENABLE                  UINT8_C(0xE0)
+
+/* Macro to specify the number of bytes over-read from the
+ * FIFO in order to get the sensor time at the end of FIFO */
+#ifndef BMI160_FIFO_BYTES_OVERREAD
+#define BMI160_FIFO_BYTES_OVERREAD                UINT8_C(25)
+#endif
+
+/* Accel, gyro and aux. sensor length and also their combined
+ * length definitions in FIFO */
+#define BMI160_FIFO_G_LENGTH                      UINT8_C(6)
+#define BMI160_FIFO_A_LENGTH                      UINT8_C(6)
+#define BMI160_FIFO_M_LENGTH                      UINT8_C(8)
+#define BMI160_FIFO_GA_LENGTH                     UINT8_C(12)
+#define BMI160_FIFO_MA_LENGTH                     UINT8_C(14)
+#define BMI160_FIFO_MG_LENGTH                     UINT8_C(14)
+#define BMI160_FIFO_MGA_LENGTH                    UINT8_C(20)
+
+/** FIFO Header Data definitions */
+#define BMI160_FIFO_HEAD_SKIP_FRAME               UINT8_C(0x40)
+#define BMI160_FIFO_HEAD_SENSOR_TIME              UINT8_C(0x44)
+#define BMI160_FIFO_HEAD_INPUT_CONFIG             UINT8_C(0x48)
+#define BMI160_FIFO_HEAD_OVER_READ                UINT8_C(0x80)
+#define BMI160_FIFO_HEAD_A                        UINT8_C(0x84)
+#define BMI160_FIFO_HEAD_G                        UINT8_C(0x88)
+#define BMI160_FIFO_HEAD_G_A                      UINT8_C(0x8C)
+#define BMI160_FIFO_HEAD_M                        UINT8_C(0x90)
+#define BMI160_FIFO_HEAD_M_A                      UINT8_C(0x94)
+#define BMI160_FIFO_HEAD_M_G                      UINT8_C(0x98)
+#define BMI160_FIFO_HEAD_M_G_A                    UINT8_C(0x9C)
+
+/** FIFO sensor time length definitions */
+#define BMI160_SENSOR_TIME_LENGTH                 UINT8_C(3)
+
+/** FIFO DOWN selection */
+/* Accel fifo down-sampling values*/
+#define  BMI160_ACCEL_FIFO_DOWN_ZERO              UINT8_C(0x00)
+#define  BMI160_ACCEL_FIFO_DOWN_ONE               UINT8_C(0x10)
+#define  BMI160_ACCEL_FIFO_DOWN_TWO               UINT8_C(0x20)
+#define  BMI160_ACCEL_FIFO_DOWN_THREE             UINT8_C(0x30)
+#define  BMI160_ACCEL_FIFO_DOWN_FOUR              UINT8_C(0x40)
+#define  BMI160_ACCEL_FIFO_DOWN_FIVE              UINT8_C(0x50)
+#define  BMI160_ACCEL_FIFO_DOWN_SIX               UINT8_C(0x60)
+#define  BMI160_ACCEL_FIFO_DOWN_SEVEN             UINT8_C(0x70)
+
+/* Gyro fifo down-smapling values*/
+#define  BMI160_GYRO_FIFO_DOWN_ZERO               UINT8_C(0x00)
+#define  BMI160_GYRO_FIFO_DOWN_ONE                UINT8_C(0x01)
+#define  BMI160_GYRO_FIFO_DOWN_TWO                UINT8_C(0x02)
+#define  BMI160_GYRO_FIFO_DOWN_THREE              UINT8_C(0x03)
+#define  BMI160_GYRO_FIFO_DOWN_FOUR               UINT8_C(0x04)
+#define  BMI160_GYRO_FIFO_DOWN_FIVE               UINT8_C(0x05)
+#define  BMI160_GYRO_FIFO_DOWN_SIX                UINT8_C(0x06)
+#define  BMI160_GYRO_FIFO_DOWN_SEVEN              UINT8_C(0x07)
+
+/* Accel Fifo filter enable*/
+#define  BMI160_ACCEL_FIFO_FILT_EN                UINT8_C(0x80)
+
+/* Gyro Fifo filter enable*/
+#define  BMI160_GYRO_FIFO_FILT_EN                 UINT8_C(0x08)
+
+/** Definitions to check validity of FIFO frames */
+#define FIFO_CONFIG_MSB_CHECK                     UINT8_C(0x80)
+#define FIFO_CONFIG_LSB_CHECK                     UINT8_C(0x00)
+
+/*! BMI160 accel FOC configurations */
+#define BMI160_FOC_ACCEL_DISABLED                 UINT8_C(0x00)
+#define BMI160_FOC_ACCEL_POSITIVE_G               UINT8_C(0x01)
+#define BMI160_FOC_ACCEL_NEGATIVE_G               UINT8_C(0x02)
+#define BMI160_FOC_ACCEL_0G                       UINT8_C(0x03)
+
+/** Array Parameter DefinItions */
+#define BMI160_SENSOR_TIME_LSB_BYTE               UINT8_C(0)
+#define BMI160_SENSOR_TIME_XLSB_BYTE              UINT8_C(1)
+#define BMI160_SENSOR_TIME_MSB_BYTE               UINT8_C(2)
+
+/** Interface settings */
+#define BMI160_SPI_INTF                           UINT8_C(1)
+#define BMI160_I2C_INTF                           UINT8_C(0)
+#define BMI160_SPI_RD_MASK                        UINT8_C(0x80)
+#define BMI160_SPI_WR_MASK                        UINT8_C(0x7F)
+
+/* Sensor & time select definition*/
+#define BMI160_ACCEL_SEL                          UINT8_C(0x01)
+#define BMI160_GYRO_SEL                           UINT8_C(0x02)
+#define BMI160_TIME_SEL                           UINT8_C(0x04)
+
+/* Sensor select mask*/
+#define BMI160_SEN_SEL_MASK                       UINT8_C(0x07)
+
+/* Error code mask */
+#define BMI160_ERR_REG_MASK                       UINT8_C(0x0F)
+
+/* BMI160 I2C address */
+#define BMI160_I2C_ADDR                           UINT8_C(0x68)
+
+/* BMI160 secondary IF address */
+#define BMI160_AUX_BMM150_I2C_ADDR                UINT8_C(0x10)
+
+/** BMI160 Length definitions */
+#define BMI160_ONE                                UINT8_C(1)
+#define BMI160_TWO                                UINT8_C(2)
+#define BMI160_THREE                              UINT8_C(3)
+#define BMI160_FOUR                               UINT8_C(4)
+#define BMI160_FIVE                               UINT8_C(5)
+
+/** BMI160 fifo level Margin */
+#define BMI160_FIFO_LEVEL_MARGIN                  UINT8_C(16)
+
+/** BMI160 fifo flush Command */
+#define BMI160_FIFO_FLUSH_VALUE                   UINT8_C(0xB0)
+
+/** BMI160 offset values for xyz axes of accel */
+#define BMI160_ACCEL_MIN_OFFSET                   INT8_C(-128)
+#define BMI160_ACCEL_MAX_OFFSET                   INT8_C(127)
+
+/** BMI160 offset values for xyz axes of gyro */
+#define BMI160_GYRO_MIN_OFFSET                    INT16_C(-512)
+#define BMI160_GYRO_MAX_OFFSET                    INT16_C(511)
+
+/** BMI160 fifo full interrupt position and mask */
+#define BMI160_FIFO_FULL_INT_POS                  UINT8_C(5)
+#define BMI160_FIFO_FULL_INT_MSK                  UINT8_C(0x20)
+#define BMI160_FIFO_WTM_INT_POS                   UINT8_C(6)
+#define BMI160_FIFO_WTM_INT_MSK                   UINT8_C(0x40)
+
+#define BMI160_FIFO_FULL_INT_PIN1_POS             UINT8_C(5)
+#define BMI160_FIFO_FULL_INT_PIN1_MSK             UINT8_C(0x20)
+#define BMI160_FIFO_FULL_INT_PIN2_POS             UINT8_C(1)
+#define BMI160_FIFO_FULL_INT_PIN2_MSK             UINT8_C(0x02)
+
+#define BMI160_FIFO_WTM_INT_PIN1_POS              UINT8_C(6)
+#define BMI160_FIFO_WTM_INT_PIN1_MSK              UINT8_C(0x40)
+#define BMI160_FIFO_WTM_INT_PIN2_POS              UINT8_C(2)
+#define BMI160_FIFO_WTM_INT_PIN2_MSK              UINT8_C(0x04)
+
+#define BMI160_MANUAL_MODE_EN_POS                 UINT8_C(7)
+#define BMI160_MANUAL_MODE_EN_MSK                 UINT8_C(0x80)
+#define BMI160_AUX_READ_BURST_POS                 UINT8_C(0)
+#define BMI160_AUX_READ_BURST_MSK                 UINT8_C(0x03)
+
+#define BMI160_GYRO_SELF_TEST_POS                 UINT8_C(4)
+#define BMI160_GYRO_SELF_TEST_MSK                 UINT8_C(0x10)
+#define BMI160_GYRO_SELF_TEST_STATUS_POS          UINT8_C(1)
+#define BMI160_GYRO_SELF_TEST_STATUS_MSK          UINT8_C(0x02)
+
+#define BMI160_GYRO_FOC_EN_POS                    UINT8_C(6)
+#define BMI160_GYRO_FOC_EN_MSK                    UINT8_C(0x40)
+
+#define BMI160_ACCEL_FOC_X_CONF_POS               UINT8_C(4)
+#define BMI160_ACCEL_FOC_X_CONF_MSK               UINT8_C(0x30)
+
+#define BMI160_ACCEL_FOC_Y_CONF_POS               UINT8_C(2)
+#define BMI160_ACCEL_FOC_Y_CONF_MSK               UINT8_C(0x0C)
+
+#define BMI160_ACCEL_FOC_Z_CONF_MSK               UINT8_C(0x03)
+
+#define BMI160_FOC_STATUS_POS                     UINT8_C(3)
+#define BMI160_FOC_STATUS_MSK                     UINT8_C(0x08)
+
+#define BMI160_GYRO_OFFSET_X_MSK                  UINT8_C(0x03)
+
+#define BMI160_GYRO_OFFSET_Y_POS                  UINT8_C(2)
+#define BMI160_GYRO_OFFSET_Y_MSK                  UINT8_C(0x0C)
+
+#define BMI160_GYRO_OFFSET_Z_POS                  UINT8_C(4)
+#define BMI160_GYRO_OFFSET_Z_MSK                  UINT8_C(0x30)
+
+#define BMI160_GYRO_OFFSET_EN_POS                 UINT8_C(7)
+#define BMI160_GYRO_OFFSET_EN_MSK                 UINT8_C(0x80)
+
+#define BMI160_ACCEL_OFFSET_EN_POS                UINT8_C(6)
+#define BMI160_ACCEL_OFFSET_EN_MSK                UINT8_C(0x40)
+
+#define BMI160_GYRO_OFFSET_POS                    UINT16_C(8)
+#define BMI160_GYRO_OFFSET_MSK                    UINT16_C(0x0300)
+
+#define BMI160_NVM_UPDATE_POS                     UINT8_C(1)
+#define BMI160_NVM_UPDATE_MSK                     UINT8_C(0x02)
+
+#define BMI160_NVM_STATUS_POS                     UINT8_C(4)
+#define BMI160_NVM_STATUS_MSK                     UINT8_C(0x10)
+
+#define BMI160_MAG_POWER_MODE_MSK                 UINT8_C(0x03)
+
+#define BMI160_ACCEL_POWER_MODE_MSK               UINT8_C(0x30)
+#define BMI160_ACCEL_POWER_MODE_POS               UINT8_C(4)
+
+#define BMI160_GYRO_POWER_MODE_MSK                UINT8_C(0x0C)
+#define BMI160_GYRO_POWER_MODE_POS                UINT8_C(2)
+
+/* BIT SLICE GET AND SET FUNCTIONS */
+#define BMI160_GET_BITS(regvar, bitname) \
+    ((regvar & bitname##_MSK) >> bitname##_POS)
+#define BMI160_SET_BITS(regvar, bitname, val) \
+    ((regvar & ~bitname##_MSK) | \
+     ((val << bitname##_POS) & bitname##_MSK))
+
+#define BMI160_SET_BITS_POS_0(reg_data, bitname, data) \
+    ((reg_data & ~(bitname##_MSK)) | \
+     (data & bitname##_MSK))
+
+#define BMI160_GET_BITS_POS_0(reg_data, bitname)  (reg_data & (bitname##_MSK))
+
+/**\name UTILITY MACROS */
+#define BMI160_SET_LOW_BYTE                       UINT16_C(0x00FF)
+#define BMI160_SET_HIGH_BYTE                      UINT16_C(0xFF00)
+
+#define BMI160_GET_LSB(var)                       (uint8_t)(var & BMI160_SET_LOW_BYTE)
+#define BMI160_GET_MSB(var)                       (uint8_t)((var & BMI160_SET_HIGH_BYTE) >> 8)
+
+/*****************************************************************************/
+/* type definitions */
+
+/*!
+ * @brief Bus communication function pointer which should be mapped to
+ * the platform specific read functions of the user
+ */
+typedef int8_t (*bmi160_read_fptr_t)(uint8_t dev_addr, uint8_t reg_addr, uint8_t *data, uint16_t len);
+
+/*!
+ * @brief Bus communication function pointer which should be mapped to
+ * the platform specific write functions of the user
+ */
+typedef int8_t (*bmi160_write_fptr_t)(uint8_t dev_addr, uint8_t reg_addr, uint8_t *read_data, uint16_t len);
+typedef void (*bmi160_delay_fptr_t)(uint32_t period);
+
+/*************************** Data structures *********************************/
+
+/*!
+ * @brief bmi160 interrupt status selection enum.
+ */
+enum bmi160_int_status_sel {
+    BMI160_INT_STATUS_0 = 1,
+    BMI160_INT_STATUS_1 = 2,
+    BMI160_INT_STATUS_2 = 4,
+    BMI160_INT_STATUS_3 = 8,
+    BMI160_INT_STATUS_ALL = 15
+};
+
+/*!
+ * @brief bmi160 interrupt status bits structure
+ */
+struct bmi160_int_status_bits
+{
+#ifdef LITTLE_ENDIAN
+
+    uint32_t step : 1;
+    uint32_t sigmot : 1;
+    uint32_t anym : 1;
+
+    /* pmu trigger will be handled later */
+    uint32_t pmu_trigger_reserved : 1;
+    uint32_t d_tap : 1;
+    uint32_t s_tap : 1;
+    uint32_t orient : 1;
+    uint32_t flat_int : 1;
+    uint32_t reserved : 2;
+    uint32_t high_g : 1;
+    uint32_t low_g : 1;
+    uint32_t drdy : 1;
+    uint32_t ffull : 1;
+    uint32_t fwm : 1;
+    uint32_t nomo : 1;
+    uint32_t anym_first_x : 1;
+    uint32_t anym_first_y : 1;
+    uint32_t anym_first_z : 1;
+    uint32_t anym_sign : 1;
+    uint32_t tap_first_x : 1;
+    uint32_t tap_first_y : 1;
+    uint32_t tap_first_z : 1;
+    uint32_t tap_sign : 1;
+    uint32_t high_first_x : 1;
+    uint32_t high_first_y : 1;
+    uint32_t high_first_z : 1;
+    uint32_t high_sign : 1;
+    uint32_t orient_1_0 : 2;
+    uint32_t orient_2 : 1;
+    uint32_t flat : 1;
+#else
+    uint32_t high_first_x : 1;
+    uint32_t high_first_y : 1;
+    uint32_t high_first_z : 1;
+    uint32_t high_sign : 1;
+    uint32_t orient_1_0 : 2;
+    uint32_t orient_2 : 1;
+    uint32_t flat : 1;
+    uint32_t anym_first_x : 1;
+    uint32_t anym_first_y : 1;
+    uint32_t anym_first_z : 1;
+    uint32_t anym_sign : 1;
+    uint32_t tap_first_x : 1;
+    uint32_t tap_first_y : 1;
+    uint32_t tap_first_z : 1;
+    uint32_t tap_sign : 1;
+    uint32_t reserved : 2;
+    uint32_t high_g : 1;
+    uint32_t low_g : 1;
+    uint32_t drdy : 1;
+    uint32_t ffull : 1;
+    uint32_t fwm : 1;
+    uint32_t nomo : 1;
+    uint32_t step : 1;
+    uint32_t sigmot : 1;
+    uint32_t anym : 1;
+
+    /* pmu trigger will be handled later */
+    uint32_t pmu_trigger_reserved : 1;
+    uint32_t d_tap : 1;
+    uint32_t s_tap : 1;
+    uint32_t orient : 1;
+    uint32_t flat_int : 1;
+#endif
+};
+
+/*!
+ * @brief bmi160 interrupt status structure
+ */
+union bmi160_int_status
+{
+    uint8_t data[4];
+    struct bmi160_int_status_bits bit;
+};
+
+/*!
+ * @brief bmi160 sensor data structure which comprises of accel data
+ */
+struct bmi160_sensor_data
+{
+    /*! X-axis sensor data */
+    int16_t x;
+
+    /*! Y-axis sensor data */
+    int16_t y;
+
+    /*! Z-axis sensor data */
+    int16_t z;
+
+    /*! sensor time */
+    uint32_t sensortime;
+};
+
+/*!
+ * @brief bmi160 aux data structure which comprises of 8 bytes of accel data
+ */
+struct bmi160_aux_data
+{
+    /*! Auxiliary data */
+    uint8_t data[8];
+};
+
+/*!
+ * @brief bmi160 FOC configuration structure
+ */
+struct bmi160_foc_conf
+{
+    /*! Enabling FOC in gyro
+     * Assignable macros :
+     *  - BMI160_ENABLE
+     *  - BMI160_DISABLE
+     */
+    uint8_t foc_gyr_en;
+
+    /*! Accel FOC configurations
+     * Assignable macros :
+     *  - BMI160_FOC_ACCEL_DISABLED
+     *  - BMI160_FOC_ACCEL_POSITIVE_G
+     *  - BMI160_FOC_ACCEL_NEGATIVE_G
+     *  - BMI160_FOC_ACCEL_0G
+     */
+    uint8_t foc_acc_x;
+    uint8_t foc_acc_y;
+    uint8_t foc_acc_z;
+
+    /*! Enabling offset compensation for accel in data registers
+     * Assignable macros :
+     *  - BMI160_ENABLE
+     *  - BMI160_DISABLE
+     */
+    uint8_t acc_off_en;
+
+    /*! Enabling offset compensation for gyro in data registers
+     * Assignable macros :
+     *  - BMI160_ENABLE
+     *  - BMI160_DISABLE
+     */
+    uint8_t gyro_off_en;
+};
+
+/*!
+ * @brief bmi160 accel gyro offsets
+ */
+struct bmi160_offsets
+{
+    /*! Accel offset for x axis */
+    int8_t off_acc_x;
+
+    /*! Accel offset for y axis */
+    int8_t off_acc_y;
+
+    /*! Accel offset for z axis */
+    int8_t off_acc_z;
+
+    /*! Gyro offset for x axis */
+    int16_t off_gyro_x;
+
+    /*! Gyro offset for y axis */
+    int16_t off_gyro_y;
+
+    /*! Gyro offset for z axis */
+    int16_t off_gyro_z;
+};
+
+/*!
+ * @brief FIFO aux. sensor data structure
+ */
+struct bmi160_aux_fifo_data
+{
+    /*! The value of aux. sensor x LSB data */
+    uint8_t aux_x_lsb;
+
+    /*! The value of aux. sensor x MSB data */
+    uint8_t aux_x_msb;
+
+    /*! The value of aux. sensor y LSB data */
+    uint8_t aux_y_lsb;
+
+    /*! The value of aux. sensor y MSB data */
+    uint8_t aux_y_msb;
+
+    /*! The value of aux. sensor z LSB data */
+    uint8_t aux_z_lsb;
+
+    /*! The value of aux. sensor z MSB data */
+    uint8_t aux_z_msb;
+
+    /*! The value of aux. sensor r for BMM150 LSB data */
+    uint8_t aux_r_y2_lsb;
+
+    /*! The value of aux. sensor r for BMM150 MSB data */
+    uint8_t aux_r_y2_msb;
+};
+
+/*!
+ * @brief bmi160 sensor select structure
+ */
+enum bmi160_select_sensor {
+    BMI160_ACCEL_ONLY = 1,
+    BMI160_GYRO_ONLY,
+    BMI160_BOTH_ACCEL_AND_GYRO
+};
+
+/*!
+ * @brief bmi160 sensor step detector mode structure
+ */
+enum bmi160_step_detect_mode {
+    BMI160_STEP_DETECT_NORMAL,
+    BMI160_STEP_DETECT_SENSITIVE,
+    BMI160_STEP_DETECT_ROBUST,
+
+    /*! Non recommended User defined setting */
+    BMI160_STEP_DETECT_USER_DEFINE
+};
+
+/*!
+ * @brief enum for auxiliary burst read selection
+ */
+enum bmi160_aux_read_len {
+    BMI160_AUX_READ_LEN_0,
+    BMI160_AUX_READ_LEN_1,
+    BMI160_AUX_READ_LEN_2,
+    BMI160_AUX_READ_LEN_3
+};
+
+/*!
+ * @brief bmi160 sensor configuration structure
+ */
+struct bmi160_cfg
+{
+    /*! power mode */
+    uint8_t power;
+
+    /*! output data rate */
+    uint8_t odr;
+
+    /*! range */
+    uint8_t range;
+
+    /*! bandwidth */
+    uint8_t bw;
+};
+
+/*!
+ * @brief Aux sensor configuration structure
+ */
+struct bmi160_aux_cfg
+{
+    /*! Aux sensor, 1 - enable 0 - disable */
+    uint8_t aux_sensor_enable : 1;
+
+    /*! Aux manual/auto mode status */
+    uint8_t manual_enable : 1;
+
+    /*! Aux read burst length */
+    uint8_t aux_rd_burst_len : 2;
+
+    /*! output data rate */
+    uint8_t aux_odr : 4;
+
+    /*! i2c addr of auxiliary sensor */
+    uint8_t aux_i2c_addr;
+};
+
+/*!
+ * @brief bmi160 interrupt channel selection structure
+ */
+enum bmi160_int_channel {
+    /*! Un-map both channels */
+    BMI160_INT_CHANNEL_NONE,
+
+    /*! interrupt Channel 1 */
+    BMI160_INT_CHANNEL_1,
+
+    /*! interrupt Channel 2 */
+    BMI160_INT_CHANNEL_2,
+
+    /*! Map both channels */
+    BMI160_INT_CHANNEL_BOTH
+};
+enum bmi160_int_types {
+    /*! Slope/Any-motion interrupt */
+    BMI160_ACC_ANY_MOTION_INT,
+
+    /*! Significant motion interrupt */
+    BMI160_ACC_SIG_MOTION_INT,
+
+    /*! Step detector interrupt */
+    BMI160_STEP_DETECT_INT,
+
+    /*! double tap interrupt */
+    BMI160_ACC_DOUBLE_TAP_INT,
+
+    /*! single tap interrupt */
+    BMI160_ACC_SINGLE_TAP_INT,
+
+    /*! orientation interrupt */
+    BMI160_ACC_ORIENT_INT,
+
+    /*! flat interrupt */
+    BMI160_ACC_FLAT_INT,
+
+    /*! high-g interrupt */
+    BMI160_ACC_HIGH_G_INT,
+
+    /*! low-g interrupt */
+    BMI160_ACC_LOW_G_INT,
+
+    /*! slow/no-motion interrupt */
+    BMI160_ACC_SLOW_NO_MOTION_INT,
+
+    /*! data ready interrupt  */
+    BMI160_ACC_GYRO_DATA_RDY_INT,
+
+    /*! fifo full interrupt */
+    BMI160_ACC_GYRO_FIFO_FULL_INT,
+
+    /*! fifo watermark interrupt */
+    BMI160_ACC_GYRO_FIFO_WATERMARK_INT,
+
+    /*! fifo tagging feature support */
+    BMI160_FIFO_TAG_INT_PIN
+};
+
+/*!
+ * @brief bmi160 active state of any & sig motion interrupt.
+ */
+enum bmi160_any_sig_motion_active_interrupt_state {
+    /*! Both any & sig motion are disabled */
+    BMI160_BOTH_ANY_SIG_MOTION_DISABLED = -1,
+
+    /*! Any-motion selected */
+    BMI160_ANY_MOTION_ENABLED,
+
+    /*! Sig-motion selected */
+    BMI160_SIG_MOTION_ENABLED
+};
+struct bmi160_acc_tap_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! tap threshold */
+    uint16_t tap_thr : 5;
+
+    /*! tap shock */
+    uint16_t tap_shock : 1;
+
+    /*! tap quiet */
+    uint16_t tap_quiet : 1;
+
+    /*! tap duration */
+    uint16_t tap_dur : 3;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint16_t tap_data_src : 1;
+
+    /*! tap enable, 1 - enable, 0 - disable */
+    uint16_t tap_en : 1;
+#else
+
+    /*! tap enable, 1 - enable, 0 - disable */
+    uint16_t tap_en : 1;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint16_t tap_data_src : 1;
+
+    /*! tap duration */
+    uint16_t tap_dur : 3;
+
+    /*! tap quiet */
+    uint16_t tap_quiet : 1;
+
+    /*! tap shock */
+    uint16_t tap_shock : 1;
+
+    /*! tap threshold */
+    uint16_t tap_thr : 5;
+#endif
+};
+struct bmi160_acc_any_mot_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! 1 any-motion enable, 0 - any-motion disable */
+    uint8_t anymotion_en : 1;
+
+    /*! slope interrupt x, 1 - enable, 0 - disable */
+    uint8_t anymotion_x : 1;
+
+    /*! slope interrupt y, 1 - enable, 0 - disable */
+    uint8_t anymotion_y : 1;
+
+    /*! slope interrupt z, 1 - enable, 0 - disable */
+    uint8_t anymotion_z : 1;
+
+    /*! slope duration */
+    uint8_t anymotion_dur : 2;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint8_t anymotion_data_src : 1;
+
+    /*! slope threshold */
+    uint8_t anymotion_thr;
+#else
+
+    /*! slope threshold */
+    uint8_t anymotion_thr;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint8_t anymotion_data_src : 1;
+
+    /*! slope duration */
+    uint8_t anymotion_dur : 2;
+
+    /*! slope interrupt z, 1 - enable, 0 - disable */
+    uint8_t anymotion_z : 1;
+
+    /*! slope interrupt y, 1 - enable, 0 - disable */
+    uint8_t anymotion_y : 1;
+
+    /*! slope interrupt x, 1 - enable, 0 - disable */
+    uint8_t anymotion_x : 1;
+
+    /*! 1 any-motion enable, 0 - any-motion disable */
+    uint8_t anymotion_en : 1;
+#endif
+};
+struct bmi160_acc_sig_mot_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! skip time of sig-motion interrupt */
+    uint8_t sig_mot_skip : 2;
+
+    /*! proof time of sig-motion interrupt */
+    uint8_t sig_mot_proof : 2;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint8_t sig_data_src : 1;
+
+    /*! 1 - enable sig, 0 - disable sig & enable anymotion */
+    uint8_t sig_en : 1;
+
+    /*! sig-motion threshold */
+    uint8_t sig_mot_thres;
+#else
+
+    /*! sig-motion threshold */
+    uint8_t sig_mot_thres;
+
+    /*! 1 - enable sig, 0 - disable sig & enable anymotion */
+    uint8_t sig_en : 1;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint8_t sig_data_src : 1;
+
+    /*! proof time of sig-motion interrupt */
+    uint8_t sig_mot_proof : 2;
+
+    /*! skip time of sig-motion interrupt */
+    uint8_t sig_mot_skip : 2;
+#endif
+};
+struct bmi160_acc_step_detect_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! 1- step detector enable, 0- step detector disable */
+    uint16_t step_detector_en : 1;
+
+    /*! minimum threshold */
+    uint16_t min_threshold : 2;
+
+    /*! minimal detectable step time */
+    uint16_t steptime_min : 3;
+
+    /*! enable step counter mode setting */
+    uint16_t step_detector_mode : 2;
+
+    /*! minimum step buffer size*/
+    uint16_t step_min_buf : 3;
+#else
+
+    /*! minimum step buffer size*/
+    uint16_t step_min_buf : 3;
+
+    /*! enable step counter mode setting */
+    uint16_t step_detector_mode : 2;
+
+    /*! minimal detectable step time */
+    uint16_t steptime_min : 3;
+
+    /*! minimum threshold */
+    uint16_t min_threshold : 2;
+
+    /*! 1- step detector enable, 0- step detector disable */
+    uint16_t step_detector_en : 1;
+#endif
+};
+struct bmi160_acc_no_motion_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! no motion interrupt x */
+    uint16_t no_motion_x : 1;
+
+    /*! no motion interrupt y */
+    uint16_t no_motion_y : 1;
+
+    /*! no motion interrupt z */
+    uint16_t no_motion_z : 1;
+
+    /*! no motion duration */
+    uint16_t no_motion_dur : 6;
+
+    /*! no motion sel , 1 - enable no-motion ,0- enable slow-motion */
+    uint16_t no_motion_sel : 1;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint16_t no_motion_src : 1;
+
+    /*! no motion threshold */
+    uint8_t no_motion_thres;
+#else
+
+    /*! no motion threshold */
+    uint8_t no_motion_thres;
+
+    /*! data source 0- filter & 1 pre-filter*/
+    uint16_t no_motion_src : 1;
+
+    /*! no motion sel , 1 - enable no-motion ,0- enable slow-motion */
+    uint16_t no_motion_sel : 1;
+
+    /*! no motion duration */
+    uint16_t no_motion_dur : 6;
+
+    /* no motion interrupt z */
+    uint16_t no_motion_z : 1;
+
+    /*! no motion interrupt y */
+    uint16_t no_motion_y : 1;
+
+    /*! no motion interrupt x */
+    uint16_t no_motion_x : 1;
+#endif
+};
+struct bmi160_acc_orient_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! thresholds for switching between the different orientations */
+    uint16_t orient_mode : 2;
+
+    /*! blocking_mode */
+    uint16_t orient_blocking : 2;
+
+    /*! Orientation interrupt hysteresis */
+    uint16_t orient_hyst : 4;
+
+    /*! Orientation interrupt theta */
+    uint16_t orient_theta : 6;
+
+    /*! Enable/disable Orientation interrupt */
+    uint16_t orient_ud_en : 1;
+
+    /*! exchange x- and z-axis in algorithm ,0 - z, 1 - x */
+    uint16_t axes_ex : 1;
+
+    /*! 1 - orient enable, 0 - orient disable */
+    uint8_t orient_en : 1;
+#else
+
+    /*! 1 - orient enable, 0 - orient disable */
+    uint8_t orient_en : 1;
+
+    /*! exchange x- and z-axis in algorithm ,0 - z, 1 - x */
+    uint16_t axes_ex : 1;
+
+    /*! Enable/disable Orientation interrupt */
+    uint16_t orient_ud_en : 1;
+
+    /*! Orientation interrupt theta */
+    uint16_t orient_theta : 6;
+
+    /*! Orientation interrupt hysteresis */
+    uint16_t orient_hyst : 4;
+
+    /*! blocking_mode */
+    uint16_t orient_blocking : 2;
+
+    /*! thresholds for switching between the different orientations */
+    uint16_t orient_mode : 2;
+#endif
+};
+struct bmi160_acc_flat_detect_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! flat threshold */
+    uint16_t flat_theta : 6;
+
+    /*! flat interrupt hysteresis */
+    uint16_t flat_hy : 3;
+
+    /*! delay time for which the flat value must remain stable for the
+     * flat interrupt to be generated */
+    uint16_t flat_hold_time : 2;
+
+    /*! 1 - flat enable, 0 - flat disable */
+    uint16_t flat_en : 1;
+#else
+
+    /*! 1 - flat enable, 0 - flat disable */
+    uint16_t flat_en : 1;
+
+    /*! delay time for which the flat value must remain stable for the
+     * flat interrupt to be generated */
+    uint16_t flat_hold_time : 2;
+
+    /*! flat interrupt hysteresis */
+    uint16_t flat_hy : 3;
+
+    /*! flat threshold */
+    uint16_t flat_theta : 6;
+#endif
+};
+struct bmi160_acc_low_g_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! low-g interrupt trigger delay */
+    uint8_t low_dur;
+
+    /*! low-g interrupt trigger threshold */
+    uint8_t low_thres;
+
+    /*! hysteresis of low-g interrupt */
+    uint8_t low_hyst : 2;
+
+    /*! 0 - single-axis mode ,1 - axis-summing mode */
+    uint8_t low_mode : 1;
+
+    /*! data source 0- filter & 1 pre-filter */
+    uint8_t low_data_src : 1;
+
+    /*! 1 - enable low-g, 0 - disable low-g */
+    uint8_t low_en : 1;
+#else
+
+    /*! 1 - enable low-g, 0 - disable low-g */
+    uint8_t low_en : 1;
+
+    /*! data source 0- filter & 1 pre-filter */
+    uint8_t low_data_src : 1;
+
+    /*! 0 - single-axis mode ,1 - axis-summing mode */
+    uint8_t low_mode : 1;
+
+    /*! hysteresis of low-g interrupt */
+    uint8_t low_hyst : 2;
+
+    /*! low-g interrupt trigger threshold */
+    uint8_t low_thres;
+
+    /*! low-g interrupt trigger delay */
+    uint8_t low_dur;
+#endif
+};
+struct bmi160_acc_high_g_int_cfg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! High-g interrupt x, 1 - enable, 0 - disable */
+    uint8_t high_g_x : 1;
+
+    /*! High-g interrupt y, 1 - enable, 0 - disable */
+    uint8_t high_g_y : 1;
+
+    /*! High-g interrupt z, 1 - enable, 0 - disable */
+    uint8_t high_g_z : 1;
+
+    /*! High-g hysteresis  */
+    uint8_t high_hy : 2;
+
+    /*! data source 0- filter & 1 pre-filter */
+    uint8_t high_data_src : 1;
+
+    /*! High-g threshold */
+    uint8_t high_thres;
+
+    /*! High-g duration */
+    uint8_t high_dur;
+#else
+
+    /*! High-g duration */
+    uint8_t high_dur;
+
+    /*! High-g threshold */
+    uint8_t high_thres;
+
+    /*! data source 0- filter & 1 pre-filter */
+    uint8_t high_data_src : 1;
+
+    /*! High-g hysteresis  */
+    uint8_t high_hy : 2;
+
+    /*! High-g interrupt z, 1 - enable, 0 - disable */
+    uint8_t high_g_z : 1;
+
+    /*! High-g interrupt y, 1 - enable, 0 - disable */
+    uint8_t high_g_y : 1;
+
+    /*! High-g interrupt x, 1 - enable, 0 - disable */
+    uint8_t high_g_x : 1;
+#endif
+};
+struct bmi160_int_pin_settg
+{
+#ifdef LITTLE_ENDIAN
+
+    /*! To enable either INT1 or INT2 pin as output.
+     * 0- output disabled ,1- output enabled */
+    uint16_t output_en : 1;
+
+    /*! 0 - push-pull 1- open drain,only valid if output_en is set 1 */
+    uint16_t output_mode : 1;
+
+    /*! 0 - active low , 1 - active high level.
+     * if output_en is 1,this applies to interrupts,else PMU_trigger */
+    uint16_t output_type : 1;
+
+    /*! 0 - level trigger , 1 - edge trigger  */
+    uint16_t edge_ctrl : 1;
+
+    /*! To enable either INT1 or INT2 pin as input.
+     * 0 - input disabled ,1 - input enabled */
+    uint16_t input_en : 1;
+
+    /*! latch duration*/
+    uint16_t latch_dur : 4;
+#else
+
+    /*! latch duration*/
+    uint16_t latch_dur : 4;
+
+    /*! Latched,non-latched or temporary interrupt modes */
+    uint16_t input_en : 1;
+
+    /*! 1 - edge trigger, 0 - level trigger */
+    uint16_t edge_ctrl : 1;
+
+    /*! 0 - active low , 1 - active high level.
+     * if output_en is 1,this applies to interrupts,else PMU_trigger */
+    uint16_t output_type : 1;
+
+    /*! 0 - push-pull , 1 - open drain,only valid if output_en is set 1 */
+    uint16_t output_mode : 1;
+
+    /*! To enable either INT1 or INT2 pin as output.
+     * 0 - output disabled , 1 - output enabled */
+    uint16_t output_en : 1;
+#endif
+};
+union bmi160_int_type_cfg
+{
+    /*! Tap interrupt structure */
+    struct bmi160_acc_tap_int_cfg acc_tap_int;
+
+    /*! Slope interrupt structure */
+    struct bmi160_acc_any_mot_int_cfg acc_any_motion_int;
+
+    /*! Significant motion interrupt structure */
+    struct bmi160_acc_sig_mot_int_cfg acc_sig_motion_int;
+
+    /*! Step detector interrupt structure */
+    struct bmi160_acc_step_detect_int_cfg acc_step_detect_int;
+
+    /*! No motion interrupt structure */
+    struct bmi160_acc_no_motion_int_cfg acc_no_motion_int;
+
+    /*! Orientation interrupt structure */
+    struct bmi160_acc_orient_int_cfg acc_orient_int;
+
+    /*! Flat interrupt structure */
+    struct bmi160_acc_flat_detect_int_cfg acc_flat_int;
+
+    /*! Low-g interrupt structure */
+    struct bmi160_acc_low_g_int_cfg acc_low_g_int;
+
+    /*! High-g interrupt structure */
+    struct bmi160_acc_high_g_int_cfg acc_high_g_int;
+};
+struct bmi160_int_settg
+{
+    /*! Interrupt channel */
+    enum bmi160_int_channel int_channel;
+
+    /*! Select Interrupt */
+    enum bmi160_int_types int_type;
+
+    /*! Structure configuring Interrupt pins */
+    struct bmi160_int_pin_settg int_pin_settg;
+
+    /*! Union configures required interrupt */
+    union bmi160_int_type_cfg int_type_cfg;
+
+    /*! FIFO FULL INT 1-enable, 0-disable */
+    uint8_t fifo_full_int_en : 1;
+
+    /*! FIFO WTM INT 1-enable, 0-disable */
+    uint8_t fifo_wtm_int_en : 1;
+};
+
+/*!
+ *  @brief This structure holds the information for usage of
+ *  FIFO by the user.
+ */
+struct bmi160_fifo_frame
+{
+    /*! Data buffer of user defined length is to be mapped here */
+    uint8_t *data;
+
+    /*! While calling the API  "bmi160_get_fifo_data" , length stores
+     *  number of bytes in FIFO to be read (specified by user as input)
+     *  and after execution of the API ,number of FIFO data bytes
+     *  available is provided as an output to user
+     */
+    uint16_t length;
+
+    /*! FIFO time enable */
+    uint8_t fifo_time_enable;
+
+    /*! Enabling of the FIFO header to stream in header mode */
+    uint8_t fifo_header_enable;
+
+    /*! Streaming of the Accelerometer, Gyroscope
+     * sensor data or both in FIFO */
+    uint8_t fifo_data_enable;
+
+    /*! Will be equal to length when no more frames are there to parse */
+    uint16_t accel_byte_start_idx;
+
+    /*! Will be equal to length when no more frames are there to parse */
+    uint16_t gyro_byte_start_idx;
+
+    /*! Will be equal to length when no more frames are there to parse */
+    uint16_t aux_byte_start_idx;
+
+    /*! Value of FIFO sensor time time */
+    uint32_t sensor_time;
+
+    /*! Value of Skipped frame counts */
+    uint8_t skipped_frame_count;
+};
+struct bmi160_dev
+{
+    /*! Chip Id */
+    uint8_t chip_id;
+
+    /*! Device Id */
+    uint8_t id;
+
+    /*! 0 - I2C , 1 - SPI Interface */
+    uint8_t intf;
+
+    /*! Hold active interrupts status for any and sig motion
+     *  0 - Any-motion enable, 1 - Sig-motion enable,
+     *  -1 neither any-motion nor sig-motion selected */
+    enum bmi160_any_sig_motion_active_interrupt_state any_sig_sel;
+
+    /*! Structure to configure Accel sensor */
+    struct bmi160_cfg accel_cfg;
+
+    /*! Structure to hold previous/old accel config parameters.
+     * This is used at driver level to prevent overwriting of same
+     * data, hence user does not change it in the code */
+    struct bmi160_cfg prev_accel_cfg;
+
+    /*! Structure to configure Gyro sensor */
+    struct bmi160_cfg gyro_cfg;
+
+    /*! Structure to hold previous/old gyro config parameters.
+     * This is used at driver level to prevent overwriting of same
+     * data, hence user does not change it in the code */
+    struct bmi160_cfg prev_gyro_cfg;
+
+    /*! Structure to configure the auxiliary sensor */
+    struct bmi160_aux_cfg aux_cfg;
+
+    /*! Structure to hold previous/old aux config parameters.
+     * This is used at driver level to prevent overwriting of same
+     * data, hence user does not change it in the code */
+    struct bmi160_aux_cfg prev_aux_cfg;
+
+    /*! FIFO related configurations */
+    struct bmi160_fifo_frame *fifo;
+
+    /*! Read function pointer */
+    bmi160_read_fptr_t read;
+
+    /*! Write function pointer */
+    bmi160_write_fptr_t write;
+
+    /*!  Delay function pointer */
+    bmi160_delay_fptr_t delay_ms;
+
+    /*! User set read/write length */
+    uint16_t read_write_len;
+};
+
+#endif /* BMI160_DEFS_H_ */

lib/bmi160-api/examples/read_chip_id/Makefile

@@ -0,0 +1,13 @@
+COINES_INSTALL_PATH ?= ../../../..
+
+EXAMPLE_FILE ?= read_chip_id.c
+
+API_LOCATION ?= ../..
+
+C_SRCS += \
+$(API_LOCATION)/bmi160.c
+
+INCLUDEPATHS += \
+$(API_LOCATION)
+
+include $(COINES_INSTALL_PATH)/coines.mk

lib/bmi160-api/examples/read_chip_id/read_chip_id.c

@@ -0,0 +1,237 @@
+/**
+ * Copyright (C) 2021 Bosch Sensortec GmbH. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*********************************************************************/
+/* system header files */
+/*********************************************************************/
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+/*********************************************************************/
+/* own header files */
+/*********************************************************************/
+#include "coines.h"
+#include "bmi160.h"
+
+/*********************************************************************/
+/* local macro definitions */
+/*! i2c interface communication, 1 - Enable; 0- Disable */
+#define BMI160_INTERFACE_I2C  1
+
+/*! spi interface communication, 1 - Enable; 0- Disable */
+#define BMI160_INTERFACE_SPI  0
+
+#if (!((BMI160_INTERFACE_I2C == 1) && (BMI160_INTERFACE_SPI == 0)) && \
+    (!((BMI160_INTERFACE_I2C == 0) && (BMI160_INTERFACE_SPI == 1))))
+#error "Invalid value given for the macros BMI160_INTERFACE_I2C / BMI160_INTERFACE_SPI"
+#endif
+
+/*! bmi160 shuttle id */
+#define BMI160_SHUTTLE_ID     0x38
+
+/*! bmi160 Device address */
+#define BMI160_DEV_ADDR       BMI160_I2C_ADDR
+
+/*********************************************************************/
+/* global variables */
+/*********************************************************************/
+
+/*! @brief This structure containing relevant bmi160 info */
+struct bmi160_dev bmi160dev;
+
+/*! @brief variable to hold the bmi160 accel data */
+struct bmi160_sensor_data bmi160_accel;
+
+/*! @brief variable to hold the bmi160 gyro data */
+struct bmi160_sensor_data bmi160_gyro;
+
+/*********************************************************************/
+/* static function declarations */
+/*********************************************************************/
+
+/*!
+ * @brief   internal API is used to initialize the sensor interface
+ */
+static void init_sensor_interface(void);
+
+/*!
+ * @brief   This internal API is used to initialize the bmi160 sensor with default
+ */
+static void init_bmi160(void);
+
+/*!
+ * @brief   This internal API is used to initialize the sensor driver interface
+ */
+static void init_bmi160_sensor_driver_interface(void);
+
+/*********************************************************************/
+/* functions */
+/*********************************************************************/
+
+/*!
+ *  @brief This internal API is used to initialize the sensor interface depending
+ *   on selection either SPI or I2C.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_sensor_interface(void)
+{
+    /* Switch VDD for sensor off */
+    coines_set_shuttleboard_vdd_vddio_config(0, 0);
+
+    /* wait until the sensor goes off */
+    coines_delay_msec(10);
+#if BMI160_INTERFACE_I2C == 1
+
+    /* SDO pin is made low for selecting I2C address 0x68 */
+    coines_set_pin_config(COINES_SHUTTLE_PIN_15, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_LOW);
+
+    /* set the sensor interface as I2C */
+    coines_config_i2c_bus(COINES_I2C_BUS_0, COINES_I2C_FAST_MODE);
+    coines_delay_msec(10);
+
+    /* CSB pin is made high for selecting I2C protocol*/
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_HIGH);
+#endif
+#if BMI160_INTERFACE_SPI == 1
+
+    /* CSB pin is made low for selecting SPI protocol*/
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_LOW);
+
+    coines_delay_msec(10);
+    coines_config_spi_bus(COINES_SPI_BUS_0, COINES_SPI_SPEED_5_MHZ, COINES_SPI_MODE3);
+#endif
+    coines_delay_msec(10);
+
+    /* Switch VDD for sensor on */
+    coines_set_shuttleboard_vdd_vddio_config(3300, 3300);
+
+#if BMI160_INTERFACE_SPI == 1
+    coines_delay_msec(10);
+
+    /* CSB pin is made high for selecting SPI protocol
+     * Note: CSB has to see rising after power up, to switch to SPI protocol */
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_HIGH);
+#endif
+}
+
+/*!
+ *  @brief This internal API is used to initializes the bmi160 sensor
+ *  settings like power mode and OSRS settings.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_bmi160(void)
+{
+    int8_t rslt;
+
+    rslt = bmi160_init(&bmi160dev);
+
+    if (rslt == BMI160_OK)
+    {
+        printf("BMI160 initialization success !\n");
+        printf("Chip ID 0x%X\n", bmi160dev.chip_id);
+    }
+    else
+    {
+        printf("BMI160 initialization failure !\n");
+        exit(COINES_E_FAILURE);
+    }
+}
+
+/*!
+ *  @brief This internal API is used to set the sensor driver interface to
+ *  read/write the data.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_bmi160_sensor_driver_interface(void)
+{
+#if BMI160_INTERFACE_I2C == 1
+
+    /* I2C setup */
+
+    /* link read/write/delay function of host system to appropriate
+     * bmi160 function call prototypes */
+    bmi160dev.write = coines_write_i2c;
+    bmi160dev.read = coines_read_i2c;
+    bmi160dev.delay_ms = coines_delay_msec;
+
+    /* set correct i2c address */
+    bmi160dev.id = BMI160_DEV_ADDR;
+    bmi160dev.intf = BMI160_I2C_INTF;
+#endif
+#if BMI160_INTERFACE_SPI == 1
+
+    /* SPI setup */
+
+    /* link read/write/delay function of host system to appropriate
+     *  bmi160 function call prototypes */
+    bmi160dev.write = coines_write_spi;
+    bmi160dev.read = coines_read_spi;
+    bmi160dev.delay_ms = coines_delay_msec;
+    bmi160dev.id = COINES_SHUTTLE_PIN_7;
+    bmi160dev.intf = BMI160_SPI_INTF;
+#endif
+}
+
+/*!
+ *  @brief Main Function where the execution getting started to test the code.
+ *
+ *  @param[in] argc
+ *  @param[in] argv
+ *
+ *  @return status
+ *
+ */
+int main(int argc, char *argv[])
+{
+    struct coines_board_info board_info;
+    int16_t rslt;
+
+    init_bmi160_sensor_driver_interface();
+
+    rslt = coines_open_comm_intf(COINES_COMM_INTF_USB);
+
+    if (rslt < 0)
+    {
+        printf(
+            "\n Unable to connect with Application Board ! \n" " 1. Check if the board is connected and powered on. \n" " 2. Check if Application Board USB driver is installed. \n"
+            " 3. Check if board is in use by another application. (Insufficient permissions to access USB) \n");
+        exit(rslt);
+    }
+
+    rslt = coines_get_board_info(&board_info);
+
+    if (rslt == COINES_SUCCESS)
+    {
+        if (board_info.shuttle_id != BMI160_SHUTTLE_ID)
+        {
+
+            printf("! Warning invalid sensor shuttle \n ," "This application will not support this sensor \n");
+            exit(COINES_E_FAILURE);
+        }
+    }
+
+    init_sensor_interface();
+
+    /* After sensor init introduce 200 msec sleep */
+    coines_delay_msec(200);
+    init_bmi160();
+    coines_close_comm_intf(COINES_COMM_INTF_USB);
+
+    return EXIT_SUCCESS;
+}

lib/bmi160-api/examples/read_sensor_data/Makefile

@@ -0,0 +1,13 @@
+COINES_INSTALL_PATH ?= ../../../..
+
+EXAMPLE_FILE ?= read_sensor_data.c
+
+API_LOCATION ?= ../..
+
+C_SRCS += \
+$(API_LOCATION)/bmi160.c
+
+INCLUDEPATHS += \
+$(API_LOCATION)
+
+include $(COINES_INSTALL_PATH)/coines.mk

lib/bmi160-api/examples/read_sensor_data/read_sensor_data.c

@@ -0,0 +1,271 @@
+/**
+ * Copyright (C) 2021 Bosch Sensortec GmbH. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*********************************************************************/
+/* system header files */
+/*********************************************************************/
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+/*********************************************************************/
+/* own header files */
+/*********************************************************************/
+#include "coines.h"
+#include "bmi160.h"
+
+/*********************************************************************/
+/* local macro definitions */
+/*! I2C interface communication, 1 - Enable; 0- Disable */
+#define BMI160_INTERFACE_I2C  1
+
+/*! SPI interface communication, 1 - Enable; 0- Disable */
+#define BMI160_INTERFACE_SPI  0
+
+#if (!((BMI160_INTERFACE_I2C == 1) && (BMI160_INTERFACE_SPI == 0)) && \
+    (!((BMI160_INTERFACE_I2C == 0) && (BMI160_INTERFACE_SPI == 1))))
+#error "Invalid value given for the macros BMI160_INTERFACE_I2C / BMI160_INTERFACE_SPI"
+#endif
+
+/*! bmi160 shuttle id */
+#define BMI160_SHUTTLE_ID     0x38
+
+/*! bmi160 Device address */
+#define BMI160_DEV_ADDR       BMI160_I2C_ADDR
+
+/*********************************************************************/
+/* global variables */
+/*********************************************************************/
+
+/*! @brief This structure containing relevant bmi160 info */
+struct bmi160_dev bmi160dev;
+
+/*! @brief variable to hold the bmi160 accel data */
+struct bmi160_sensor_data bmi160_accel;
+
+/*! @brief variable to hold the bmi160 gyro data */
+struct bmi160_sensor_data bmi160_gyro;
+
+/*********************************************************************/
+/* static function declarations */
+/*********************************************************************/
+
+/*!
+ * @brief   internal API is used to initialize the sensor interface
+ */
+static void init_sensor_interface(void);
+
+/*!
+ * @brief   This internal API is used to initialize the bmi160 sensor with default
+ */
+static void init_bmi160(void);
+
+/*!
+ * @brief   This internal API is used to initialize the sensor driver interface
+ */
+static void init_bmi160_sensor_driver_interface(void);
+
+/*********************************************************************/
+/* functions */
+/*********************************************************************/
+
+/*!
+ *  @brief This internal API is used to initialize the sensor interface depending
+ *   on selection either SPI or I2C.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_sensor_interface(void)
+{
+    /* Switch VDD for sensor off */
+    coines_set_shuttleboard_vdd_vddio_config(0, 0);
+
+    /* wait until the sensor goes off */
+    coines_delay_msec(10);
+#if BMI160_INTERFACE_I2C == 1
+
+    /* SDO pin is made low for selecting I2C address 0x68 */
+    coines_set_pin_config(COINES_SHUTTLE_PIN_15, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_LOW);
+
+    /* set the sensor interface as I2C */
+    coines_config_i2c_bus(COINES_I2C_BUS_0, COINES_I2C_FAST_MODE);
+    coines_delay_msec(10);
+
+    /* CSB pin is made high for selecting I2C protocol*/
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_HIGH);
+#endif
+#if BMI160_INTERFACE_SPI == 1
+
+    /* CSB pin is made low for selecting SPI protocol*/
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_LOW);
+
+    coines_delay_msec(10);
+    coines_config_spi_bus(COINES_SPI_BUS_0, COINES_SPI_SPEED_5_MHZ, COINES_SPI_MODE3);
+#endif
+    coines_delay_msec(10);
+
+    /* Switch VDD for sensor on */
+    coines_set_shuttleboard_vdd_vddio_config(3300, 3300);
+
+#if BMI160_INTERFACE_SPI == 1
+    coines_delay_msec(10);
+
+    /* CSB pin is made high for selecting SPI protocol
+     * Note: CSB has to see rising after power up, to switch to SPI protocol */
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_HIGH);
+#endif
+}
+
+/*!
+ *  @brief This internal API is used to initializes the bmi160 sensor
+ *  settings like power mode and OSRS settings.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_bmi160(void)
+{
+    int8_t rslt;
+
+    rslt = bmi160_init(&bmi160dev);
+
+    if (rslt == BMI160_OK)
+    {
+        printf("BMI160 initialization success !\n");
+        printf("Chip ID 0x%X\n", bmi160dev.chip_id);
+    }
+    else
+    {
+        printf("BMI160 initialization failure !\n");
+        exit(COINES_E_FAILURE);
+    }
+
+    /* Select the Output data rate, range of accelerometer sensor */
+    bmi160dev.accel_cfg.odr = BMI160_ACCEL_ODR_1600HZ;
+    bmi160dev.accel_cfg.range = BMI160_ACCEL_RANGE_16G;
+    bmi160dev.accel_cfg.bw = BMI160_ACCEL_BW_NORMAL_AVG4;
+
+    /* Select the power mode of accelerometer sensor */
+    bmi160dev.accel_cfg.power = BMI160_ACCEL_NORMAL_MODE;
+
+    /* Select the Output data rate, range of Gyroscope sensor */
+    bmi160dev.gyro_cfg.odr = BMI160_GYRO_ODR_3200HZ;
+    bmi160dev.gyro_cfg.range = BMI160_GYRO_RANGE_2000_DPS;
+    bmi160dev.gyro_cfg.bw = BMI160_GYRO_BW_NORMAL_MODE;
+
+    /* Select the power mode of Gyroscope sensor */
+    bmi160dev.gyro_cfg.power = BMI160_GYRO_NORMAL_MODE;
+
+    /* Set the sensor configuration */
+    rslt = bmi160_set_sens_conf(&bmi160dev);
+}
+
+/*!
+ *  @brief This internal API is used to set the sensor driver interface to
+ *  read/write the data.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_bmi160_sensor_driver_interface(void)
+{
+#if BMI160_INTERFACE_I2C == 1
+
+    /* I2C setup */
+
+    /* link read/write/delay function of host system to appropriate
+     * bmi160 function call prototypes */
+    bmi160dev.write = coines_write_i2c;
+    bmi160dev.read = coines_read_i2c;
+    bmi160dev.delay_ms = coines_delay_msec;
+
+    /* set correct i2c address */
+    bmi160dev.id = BMI160_DEV_ADDR;
+    bmi160dev.intf = BMI160_I2C_INTF;
+#endif
+#if BMI160_INTERFACE_SPI == 1
+
+    /* SPI setup */
+
+    /* link read/write/delay function of host system to appropriate
+     *  bmi160 function call prototypes */
+    bmi160dev.write = coines_write_spi;
+    bmi160dev.read = coines_read_spi;
+    bmi160dev.delay_ms = coines_delay_msec;
+    bmi160dev.id = COINES_SHUTTLE_PIN_7;
+    bmi160dev.intf = BMI160_SPI_INTF;
+#endif
+}
+
+/*!
+ *  @brief Main Function where the execution getting started to test the code.
+ *
+ *  @param[in] argc
+ *  @param[in] argv
+ *
+ *  @return status
+ *
+ */
+int main(int argc, char *argv[])
+{
+    struct coines_board_info board_info;
+    int16_t rslt;
+    int times_to_read = 0;
+
+    init_bmi160_sensor_driver_interface();
+
+    rslt = coines_open_comm_intf(COINES_COMM_INTF_USB);
+
+    if (rslt < 0)
+    {
+        printf(
+            "\n Unable to connect with Application Board ! \n" " 1. Check if the board is connected and powered on. \n" " 2. Check if Application Board USB driver is installed. \n"
+            " 3. Check if board is in use by another application. (Insufficient permissions to access USB) \n");
+        exit(rslt);
+    }
+
+    rslt = coines_get_board_info(&board_info);
+
+    if (rslt == COINES_SUCCESS)
+    {
+        if (board_info.shuttle_id != BMI160_SHUTTLE_ID)
+        {
+
+            printf("! Warning invalid sensor shuttle \n ," "This application will not support this sensor \n");
+            exit(COINES_E_FAILURE);
+        }
+    }
+
+    init_sensor_interface();
+
+    /* After sensor init introduce 200 msec sleep */
+    coines_delay_msec(200);
+    init_bmi160();
+
+    while (times_to_read < 100)
+    {
+        /* To read both Accel and Gyro data */
+        bmi160_get_sensor_data((BMI160_ACCEL_SEL | BMI160_GYRO_SEL), &bmi160_accel, &bmi160_gyro, &bmi160dev);
+
+        printf("ax:%d\tay:%d\taz:%d\n", bmi160_accel.x, bmi160_accel.y, bmi160_accel.z);
+        printf("gx:%d\tgy:%d\tgz:%d\n", bmi160_gyro.x, bmi160_gyro.y, bmi160_gyro.z);
+        fflush(stdout);
+
+        coines_delay_msec(10);
+        times_to_read = times_to_read + 1;
+    }
+
+    coines_close_comm_intf(COINES_COMM_INTF_USB);
+
+    return EXIT_SUCCESS;
+}

lib/bmi160-api/examples/tap/Makefile

@@ -0,0 +1,13 @@
+COINES_INSTALL_PATH ?= ../../../..
+
+EXAMPLE_FILE ?= tap.c
+
+API_LOCATION ?= ../..
+
+C_SRCS += \
+$(API_LOCATION)/bmi160.c
+
+INCLUDEPATHS += \
+$(API_LOCATION)
+
+include $(COINES_INSTALL_PATH)/coines.mk

lib/bmi160-api/examples/tap/tap.c

@@ -0,0 +1,366 @@
+/**
+ * Copyright (C) 2021 Bosch Sensortec GmbH. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/*********************************************************************/
+/* system header files */
+/*********************************************************************/
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+/*********************************************************************/
+/* own header files */
+/*********************************************************************/
+#include "coines.h"
+#include "bmi160.h"
+
+/*********************************************************************/
+/* local macro definitions */
+/*! i2c interface communication, 1 - Enable; 0- Disable */
+#define BMI160_INTERFACE_I2C  0
+
+/*! spi interface communication, 1 - Enable; 0- Disable */
+#define BMI160_INTERFACE_SPI  1
+
+#if (!((BMI160_INTERFACE_I2C == 1) && (BMI160_INTERFACE_SPI == 0)) && \
+    (!((BMI160_INTERFACE_I2C == 0) && (BMI160_INTERFACE_SPI == 1))))
+#error "Invalid value given for the macros BMI160_INTERFACE_I2C / BMI160_INTERFACE_SPI"
+#endif
+
+/*! bmi160 shuttle id */
+#define BMI160_SHUTTLE_ID     0x38
+
+/*! bmi160 Device address */
+#define BMI160_DEV_ADDR       BMI160_I2C_ADDR
+
+/*********************************************************************/
+/* global variables */
+/*********************************************************************/
+
+/*! @brief This structure containing relevant bmi160 info */
+struct bmi160_dev bmi160dev;
+
+/*! @brief variable to hold the bmi160 accel data */
+struct bmi160_sensor_data bmi160_accel;
+
+/*! @brief variable to hold the bmi160 gyro data */
+struct bmi160_sensor_data bmi160_gyro;
+
+/*********************************************************************/
+/* static function declarations */
+/*********************************************************************/
+
+/*!
+ * @brief   internal API is used to initialize the sensor interface
+ */
+static void init_sensor_interface(void);
+
+/*!
+ * @brief   This internal API is used to initialize the bmi160 sensor with default
+ */
+static void init_bmi160(void);
+
+/*!
+ * @brief   This internal API is used to initialize the sensor driver interface
+ */
+static void init_bmi160_sensor_driver_interface(void);
+
+/*!
+ * @brief   This internal API is used to set tap configurations
+ */
+static int8_t set_tap_config(uint8_t feature_enable);
+
+/*********************************************************************/
+/* functions */
+/*********************************************************************/
+
+/*!
+ *  @brief This internal API is used to initialize the sensor interface depending
+ *   on selection either SPI or I2C.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_sensor_interface(void)
+{
+    /* Switch VDD for sensor off */
+    coines_set_shuttleboard_vdd_vddio_config(0, 0);
+
+    /* wait until the sensor goes off */
+    coines_delay_msec(10);
+#if BMI160_INTERFACE_I2C == 1
+
+    /* SDO pin is made low for selecting I2C address 0x68 */
+    coines_set_pin_config(COINES_SHUTTLE_PIN_15, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_LOW);
+
+    /* set the sensor interface as I2C */
+    coines_config_i2c_bus(COINES_I2C_BUS_0, COINES_I2C_FAST_MODE);
+    coines_delay_msec(10);
+
+    /* CSB pin is made high for selecting I2C protocol*/
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_HIGH);
+#endif
+#if BMI160_INTERFACE_SPI == 1
+
+    /* CSB pin is made low for selecting SPI protocol*/
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_LOW);
+
+    coines_delay_msec(10);
+    coines_config_spi_bus(COINES_SPI_BUS_0, COINES_SPI_SPEED_5_MHZ, COINES_SPI_MODE3);
+#endif
+    coines_delay_msec(10);
+
+    /* Switch VDD for sensor on */
+    coines_set_shuttleboard_vdd_vddio_config(3300, 3300);
+
+#if BMI160_INTERFACE_SPI == 1
+    coines_delay_msec(10);
+
+    /* CSB pin is made high for selecting SPI protocol
+     * Note: CSB has to see rising after power up, to switch to SPI protocol */
+    coines_set_pin_config(COINES_SHUTTLE_PIN_7, COINES_PIN_DIRECTION_OUT, COINES_PIN_VALUE_HIGH);
+#endif
+}
+
+/*!
+ *  @brief This internal API is used to initializes the bmi160 sensor
+ *  settings like power mode and OSRS settings.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_bmi160(void)
+{
+    int8_t rslt;
+
+    rslt = bmi160_init(&bmi160dev);
+
+    if (rslt == BMI160_OK)
+    {
+        printf("BMI160 initialization success !\n");
+        printf("Chip ID 0x%X\n", bmi160dev.chip_id);
+    }
+    else
+    {
+        printf("BMI160 initialization failure !\n");
+        exit(COINES_E_FAILURE);
+    }
+
+    /* Select the Output data rate, range of accelerometer sensor */
+    bmi160dev.accel_cfg.odr = BMI160_ACCEL_ODR_100HZ;
+    bmi160dev.accel_cfg.range = BMI160_ACCEL_RANGE_8G;
+    bmi160dev.accel_cfg.bw = BMI160_ACCEL_BW_NORMAL_AVG4;
+
+    /* Select the power mode of accelerometer sensor */
+    bmi160dev.accel_cfg.power = BMI160_ACCEL_NORMAL_MODE;
+
+    /* Set the sensor configuration */
+    rslt = bmi160_set_sens_conf(&bmi160dev);
+}
+
+/*!
+ *  @brief This internal API is used to set the sensor driver interface to
+ *  read/write the data.
+ *
+ *  @param[in] void
+ *
+ *  @return void
+ *
+ */
+static void init_bmi160_sensor_driver_interface(void)
+{
+#if BMI160_INTERFACE_I2C == 1
+
+    /* I2C setup */
+
+    /* link read/write/delay function of host system to appropriate
+     * bmi160 function call prototypes */
+    bmi160dev.write = coines_write_i2c;
+    bmi160dev.read = coines_read_i2c;
+    bmi160dev.delay_ms = coines_delay_msec;
+
+    /* set correct i2c address */
+    bmi160dev.id = BMI160_DEV_ADDR;
+    bmi160dev.intf = BMI160_I2C_INTF;
+#endif
+#if BMI160_INTERFACE_SPI == 1
+
+    /* SPI setup */
+
+    /* link read/write/delay function of host system to appropriate
+     *  bmi160 function call prototypes */
+    bmi160dev.write = coines_write_spi;
+    bmi160dev.read = coines_read_spi;
+    bmi160dev.delay_ms = coines_delay_msec;
+    bmi160dev.id = COINES_SHUTTLE_PIN_7;
+    bmi160dev.intf = BMI160_SPI_INTF;
+#endif
+}
+
+/*!
+ *  @brief Main Function where the execution getting started to test the code.
+ *
+ *  @param[in] argc
+ *  @param[in] argv
+ *
+ *  @return status
+ *
+ */
+int main(int argc, char *argv[])
+{
+    struct coines_board_info board_info;
+    int16_t rslt;
+
+    init_bmi160_sensor_driver_interface();
+
+    rslt = coines_open_comm_intf(COINES_COMM_INTF_USB);
+
+    if (rslt < 0)
+    {
+        printf(
+            "\n Unable to connect with Application Board ! \n" " 1. Check if the board is connected and powered on. \n" " 2. Check if Application Board USB driver is installed. \n"
+            " 3. Check if board is in use by another application. (Insufficient permissions to access USB) \n");
+        exit(rslt);
+    }
+
+    rslt = coines_get_board_info(&board_info);
+
+    if (rslt == COINES_SUCCESS)
+    {
+        if (board_info.shuttle_id != BMI160_SHUTTLE_ID)
+        {
+
+            printf("! Warning invalid sensor shuttle \n ," "This application will not support this sensor \n");
+            exit(COINES_E_FAILURE);
+        }
+    }
+
+    init_sensor_interface();
+
+    /* after sensor init introduce 200 msec sleep */
+    coines_delay_msec(200);
+    init_bmi160();
+
+    rslt = set_tap_config(BMI160_ENABLE);
+    if (rslt == BMI160_OK)
+    {
+        union bmi160_int_status int_status;
+        uint8_t loop = 0;
+        uint32_t last_time = 0;
+        uint32_t current_time = 0;
+
+        printf("Do Single or Double Tap the board\n");
+        fflush(stdout);
+
+        memset(int_status.data, 0x00, sizeof(int_status.data));
+
+        while (loop < 10)
+        {
+            /* Read interrupt status */
+            rslt = bmi160_get_int_status(BMI160_INT_STATUS_ALL, &int_status, &bmi160dev);
+            current_time = coines_get_millis();
+
+            /* Enters only if the obtained interrupt is single-tap */
+            if (rslt == BMI160_OK)
+            {
+                /* Enters only if the obtained interrupt is single-tap */
+                if (int_status.bit.s_tap)
+                {
+                    printf("Single tap, iter:%d, time:%d ms, delta:%d ms, int_status:0x%x\n",
+                           loop++,
+                           current_time,
+                           current_time - last_time,
+                           int_status.data[0]);
+                }
+                /* Enters only if the obtained interrupt is double-tap */
+                else if (int_status.bit.d_tap)
+                {
+                    printf("Double tap, iter:%d, time:%d ms, delta:%d ms, int_status:0x%x\n",
+                           loop++,
+                           current_time,
+                           current_time - last_time,
+                           int_status.data[0]);
+                }
+
+                fflush(stdout);
+            }
+            else
+            {
+                break;
+            }
+
+            memset(int_status.data, 0x00, sizeof(int_status.data));
+            last_time = current_time;
+        }
+
+        /* Disable tap feature */
+        printf("\nDisable tap test...\n");
+        rslt = set_tap_config(BMI160_DISABLE);
+        printf("bmi160_set_int_config(tap enable) status:%d\n", rslt);
+
+        fflush(stdout);
+    }
+
+    coines_close_comm_intf(COINES_COMM_INTF_USB);
+
+    return EXIT_SUCCESS;
+}
+
+static int8_t set_tap_config(uint8_t feature_enable)
+{
+    int8_t rslt = BMI160_OK;
+    struct bmi160_int_settg int_config;
+
+    if (feature_enable > 0)
+    {
+        /* Select the Interrupt channel/pin */
+        int_config.int_channel = BMI160_INT_CHANNEL_1; /* Interrupt channel/pin 1 */
+
+        /* Select the interrupt channel/pin settings */
+        int_config.int_pin_settg.output_en = BMI160_ENABLE; /* Enabling interrupt pins to act as output pin */
+        int_config.int_pin_settg.output_mode = BMI160_DISABLE; /* Choosing push-pull mode for interrupt pin */
+        int_config.int_pin_settg.output_type = BMI160_ENABLE; /* Choosing active low output */
+        int_config.int_pin_settg.edge_ctrl = BMI160_DISABLE; /* Choosing edge triggered output */
+        int_config.int_pin_settg.input_en = BMI160_DISABLE; /* Disabling interrupt pin to act as input */
+        int_config.int_pin_settg.latch_dur = BMI160_LATCH_DUR_NONE; /* non-latched output */
+
+        /* Select the Interrupt type */
+        int_config.int_type = BMI160_ACC_SINGLE_TAP_INT; /* Choosing tap interrupt */
+
+        /* Select the Any-motion interrupt parameters */
+        int_config.int_type_cfg.acc_tap_int.tap_en = BMI160_ENABLE; /* 1- Enable tap, 0- disable tap */
+        int_config.int_type_cfg.acc_tap_int.tap_thr = 2; /* Set tap threshold */
+        int_config.int_type_cfg.acc_tap_int.tap_dur = 2; /* Set tap duration */
+        int_config.int_type_cfg.acc_tap_int.tap_shock = 0; /* Set tap shock value */
+        int_config.int_type_cfg.acc_tap_int.tap_quiet = 0; /* Set tap quiet duration */
+        int_config.int_type_cfg.acc_tap_int.tap_data_src = 1; /* data source 0 : filter or 1 : pre-filter */
+
+        /* Set the Any-motion interrupt */
+        rslt = bmi160_set_int_config(&int_config, &bmi160dev); /* sensor is an instance of the structure bmi160_dev  */
+        printf("bmi160_set_int_config(tap enable) status:%d\n", rslt);
+    }
+    else
+    {
+        /* Select the Interrupt channel/pin */
+        int_config.int_channel = BMI160_INT_CHANNEL_1;
+        int_config.int_pin_settg.output_en = BMI160_DISABLE; /* Disabling interrupt pins to act as output pin */
+        int_config.int_pin_settg.edge_ctrl = BMI160_DISABLE; /* Choosing edge triggered output */
+
+        /* Select the Interrupt type */
+        int_config.int_type = BMI160_ACC_SINGLE_TAP_INT; /* Choosing Tap interrupt */
+        int_config.int_type_cfg.acc_tap_int.tap_en = BMI160_DISABLE; /* 1- Enable tap, 0- disable tap */
+
+        /* Set the Data ready interrupt */
+        rslt = bmi160_set_int_config(&int_config, &bmi160dev); /* sensor is an instance of the structure bmi160_dev */
+        printf("bmi160_set_int_config(tap disable) status:%d\n", rslt);
+    }
+
+    return rslt;
+}

lib/lsm6ds3tr-api/.gitsubtree

@@ -0,0 +1 @@
+https://github.com/STMicroelectronics/lsm6ds3tr-c-pid master /

lib/lsm6ds3tr-api/CONTRIBUTING.md

@@ -0,0 +1,33 @@
+## Contributing guide
+This document serves as a checklist before contributing to this repository. It includes links to additional information if topics are unclear to you.
+
+This guide mainly focuses on the proper use of Git.
+
+### 1. Before opening an issue
+To report a bug/request please enter the issue in the right repository.
+
+Please check the following boxes before posting an issue:
+- [ ] `Make sure you are using the latest commit (major releases are Tagged, but corrections are available as new commits).`
+- [ ] `Make sure your issue is a question/feedback/suggestion RELATED TO the software provided in this repository.` Otherwise, it should be discussed on the [ST Community forum](https://community.st.com/s/).
+- [ ] `Make sure your issue is not already reported/fixed on GitHub or discussed in a previous issue.` Please refer to the tab issue for the list of issues and pull-requests. Do not forget to browse to the **closed** issues.
+
+### 2. Posting the issue
+When you have checked the previous boxes, you will find two templates (Bug Report or Other Issue) available in the **Issues** tab of the repository.
+
+### 3. Pull Requests
+STMicroelectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
+
+* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual CLA (https://cla.st.com).
+* If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate CLA (https://cla.st.com) mentioning your GitHub account name.
+* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account, you can check here (https://cla.st.com).
+
+Please note that:
+* The Corporate CLA will always take precedence over the Individual CLA.
+* One CLA submission is sufficient for any project proposed by STMicroelectronics.
+
+#### How to proceed
+
+* We recommend to engage first a communication through an issue, in order to present your proposal and just to confirm that it corresponds to a STMicroelectronics domain or scope.
+* Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version.
+* Please submit one Pull Request for one new feature or proposal. This will facilitate the analysis and the final merge if accepted.
+

lib/lsm6ds3tr-api/LICENSE

@@ -0,0 +1,29 @@
+BSD 3-Clause License
+
+Copyright (c) 2019, STMicroelectronics
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+
+* Neither the name of the copyright holder nor the names of its
+  contributors may be used to endorse or promote products derived from
+  this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

lib/lsm6ds3tr-api/README.md

@@ -0,0 +1,59 @@
+# 1 - Introduction
+
+Sensor driver for LSM6DS3TR-C sensor written in C programming language. This repository contains the sensor driver files (.h and .c) to be included, or linked directly as a git submodule, in your project. The driver is MISRA compliant and the documentation can be generated using the [Doxygen](http://www.doxygen.org/) tool.
+
+In order to `clone` the complete content of the repository folder, use the command:
+
+```
+git clone https://github.com/STMicroelectronics/LSM6DS3TR-C-PID/
+```
+
+Some examples of driver usage can be found [here](https://github.com/STMicroelectronics/STMems_Standard_C_drivers).
+
+------
+
+
+
+# 2 - Integration details
+
+The driver is platform-independent, you only need to define two  functions for read and write transactions from the sensor hardware bus  (ie. SPI or I²C). **A few devices integrate an extra bit in the  communication protocol in order to enable multi read/write access, this  bit must be managed in the read and write functions defined by the user.** Please refer to the read and write implementation in the [reference examples](https://github.com/STMicroelectronics/STMems_Standard_C_drivers/tree/master/lsm6ds3tr-c_STdC/examples).
+
+
+
+### 2.a Source code integration
+
+- Include in your project the driver files of the sensor (.h and .c) 
+- Define in your code the read and write functions that use the I²C or SPI platform driver like the following:
+
+```
+/** Please note that is MANDATORY: return 0 -> no Error.**/
+int32_t platform_write(void *handle, uint8_t Reg, const uint8_t *Bufp, uint16_t len)
+int32_t platform_read(void *handle, uint8_t Reg, uint8_t *Bufp, uint16_t len)
+```
+
+- Declare and initialize the structure of the device interface:
+
+```
+xxxxxxx_ctx_t dev_ctx; /** xxxxxxx is the used part number **/
+dev_ctx.write_reg = platform_write;
+dev_ctx.read_reg = platform_read;
+```
+
+- If needed by the platform read and write functions, initialize the handle parameter:
+
+```
+dev_ctx.handle = &platform_handle;
+```
+
+Some integration examples can be found [here](https://github.com/STMicroelectronics/STMems_Standard_C_drivers/tree/master/lsm6ds3tr-c_STdC/examples).
+
+### 2.b Required properties
+
+> - A standard C language compiler for the target MCU
+> - A C library for the target MCU and the desired interface (ie. SPI, I²C)
+
+------
+
+**More Information: [http://www.st.com](http://st.com/MEMS)**
+
+**Copyright (C) 2021 STMicroelectronics**

lib/lsm6ds3tr-api/Release_Notes.html

@@ -0,0 +1,82 @@
+<!DOCTYPE html>
+<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
+<head>
+  <meta charset="utf-8" />
+  <meta name="generator" content="pandoc" />
+  <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
+  <title>Release Notes for LSM6DS3TR-C Component</title>
+  <style>
+    code{white-space: pre-wrap;}
+    span.smallcaps{font-variant: small-caps;}
+    span.underline{text-decoration: underline;}
+    div.column{display: inline-block; vertical-align: top; width: 50%;}
+    div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
+    ul.task-list{list-style: none;}
+    .display.math{display: block; text-align: center; margin: 0.5rem auto;}
+  </style>
+  <link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
+  <!--[if lt IE 9]>
+    <script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
+  <![endif]-->
+  <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
+</head>
+<body>
+<div class="row">
+<div class="col-sm-12 col-lg-4">
+<center>
+<h1 id="release-notes-for-lsm6ds3tr-c-component-driver">Release Notes for LSM6DS3TR-C Component Driver</h1>
+<p>Copyright © 2021 STMicroelectronics<br />
+</p>
+<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
+</center>
+<h1 id="license">License</h1>
+<p>This software component is licensed by ST under BSD 3-Clause license, the “License”. You may not use this component except in compliance with the License. You may obtain a copy of the License at:</p>
+<p><a href="https://opensource.org/licenses/BSD-3-Clause">BSD 3-Clause license</a></p>
+<h1 id="purpose">Purpose</h1>
+<p>This directory contains the LSM6DS3TR-C component drivers.</p>
+</div>
+<section id="update-history" class="col-sm-12 col-lg-8">
+<h1>Update history</h1>
+<div class="collapse">
+<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.0.0 / 18-June-2021</label>
+<div>
+<h2 id="main-changes">Main changes</h2>
+<h3 id="first-release">First release</h3>
+<ul>
+<li>First official release [ref. DS v3.0]</li>
+</ul>
+<h2 id="section"></h2>
+</div>
+<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V1.1.0 / 01-June-2023</label>
+<div>
+<h2 id="main-changes-1">Main changes</h2>
+<ul>
+<li>Add __weak directive to read/write registers routines</li>
+<li>Extend stmdev_ctx_t structure with mdelay callback</li>
+<li>repo name changed adding ‘-pid’ extension</li>
+</ul>
+<h2 id="section-1"></h2>
+</div>
+<input type="checkbox" id="collapse-section3" checked aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V2.0.0 / 20-Mar-2024</label>
+<div>
+<h2 id="main-changes-2">Main changes</h2>
+<ul>
+<li>Fixed code style (Artistic Style Version 3.4.13)</li>
+<li>Add “const” to ctx arg for all APIs</li>
+</ul>
+<h2 id="section-2"></h2>
+</div>
+</div>
+</section>
+</div>
+<footer class="sticky">
+<div class="columns">
+<div class="column" style="width:95%;">
+<p>For complete documentation on LSM6DS3TR-C, visit: <a href="https://www.st.com/content/st_com/en/products/mems-and-sensors/inemo-inertial-modules/lsm6ds3tr-c.html">LSM6DS3TR-C</a></p>
+</div><div class="column" style="width:5%;">
+<p><abbr title="Based on template cx566953 version 2.0">Info</abbr></p>
+</div>
+</div>
+</footer>
+</body>
+</html>

lib/lsm6ds3tr-api/Release_Notes.md

@@ -0,0 +1,89 @@
+---
+pagetitle: Release Notes for LSM6DS3TR-C Component
+lang: en
+header-includes: <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
+---
+
+::: {.row}
+::: {.col-sm-12 .col-lg-4}
+
+<center>
+# Release Notes for LSM6DS3TR-C Component Driver
+Copyright &copy; 2021 STMicroelectronics\
+
+[![ST logo](_htmresc/st_logo_2020.png)](https://www.st.com){.logo}
+</center>
+
+# License
+
+This software component is licensed by ST under BSD 3-Clause license, the "License".
+You may not use this component except in compliance with the License. You may obtain a copy of the License at:
+
+[BSD 3-Clause license](https://opensource.org/licenses/BSD-3-Clause)
+
+# Purpose
+
+This directory contains the LSM6DS3TR-C component drivers.
+:::
+
+::: {.col-sm-12 .col-lg-8}
+# Update history
+
+::: {.collapse}
+<input type="checkbox" id="collapse-section1" aria-hidden="true">
+<label for="collapse-section1" aria-hidden="true">V1.0.0 / 18-June-2021</label>
+<div>
+
+## Main changes
+
+### First release
+
+- First official release [ref. DS v3.0]
+
+##
+
+</div>
+
+<input type="checkbox" id="collapse-section2" aria-hidden="true">
+<label for="collapse-section2" aria-hidden="true">V1.1.0 / 01-June-2023</label>
+<div>
+
+## Main changes
+
+- Add __weak directive to read/write registers routines
+- Extend stmdev_ctx_t structure with mdelay callback
+- repo name changed adding '-pid' extension
+
+##
+
+</div>
+
+<input type="checkbox" id="collapse-section3" checked aria-hidden="true">
+<label for="collapse-section3" aria-hidden="true">V2.0.0 / 20-Mar-2024</label>
+<div>
+
+## Main changes
+
+- Fixed code style (Artistic Style Version 3.4.13)
+- Add "const" to ctx arg for all APIs
+
+##
+
+</div>
+:::
+
+:::
+:::
+
+<footer class="sticky">
+::: {.columns}
+::: {.column width="95%"}
+For complete documentation on LSM6DS3TR-C,
+visit:
+[LSM6DS3TR-C](https://www.st.com/content/st_com/en/products/mems-and-sensors/inemo-inertial-modules/lsm6ds3tr-c.html)
+:::
+::: {.column width="5%"}
+<abbr title="Based on template cx566953 version 2.0">Info</abbr>
+:::
+:::
+</footer>

lib/lsm6ds3tr-api/_htmresc/mini-st_2020.css

@@ -0,0 +1,1711 @@
+@charset "UTF-8";
+/*
+  Flavor name: Custom (mini-custom)
+  Generated online - https://minicss.org/flavors
+  mini.css version: v3.0.1
+*/
+/*
+  Browsers resets and base typography.
+*/
+/* Core module CSS variable definitions */
+:root {
+  --fore-color: #03234b;
+  --secondary-fore-color: #03234b;
+  --back-color: #ffffff;
+  --secondary-back-color: #ffffff;
+  --blockquote-color: #e6007e;
+  --pre-color: #e6007e;
+  --border-color: #3cb4e6;
+  --secondary-border-color: #3cb4e6;
+  --heading-ratio: 1.2;
+  --universal-margin: 0.5rem;
+  --universal-padding: 0.25rem;
+  --universal-border-radius: 0.075rem;
+  --background-margin: 1.5%;
+  --a-link-color: #3cb4e6;
+  --a-visited-color: #8c0078; }
+
+html {
+  font-size: 13.5px; }
+
+a, b, del, em, i, ins, q, span, strong, u {
+  font-size: 1em; }
+
+html, * {
+  font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;
+  line-height: 1.25;
+  -webkit-text-size-adjust: 100%; }
+
+* {
+  font-size: 1rem; }
+
+body {
+  margin: 0;
+  color: var(--fore-color);
+  @background: var(--back-color);
+  background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;
+  background-size: var(--background-margin);
+  }
+
+details {
+  display: block; }
+
+summary {
+  display: list-item; }
+
+abbr[title] {
+  border-bottom: none;
+  text-decoration: underline dotted; }
+
+input {
+  overflow: visible; }
+
+img {
+  max-width: 100%;
+  height: auto; }
+
+h1, h2, h3, h4, h5, h6 {
+  line-height: 1.25;
+  margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+  font-weight: 400; }
+  h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
+    color: var(--secondary-fore-color);
+    display: block;
+    margin-top: -0.25rem; }
+
+h1 {
+  font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
+
+h2 {
+  font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );
+  border-style: none none solid none ; 
+  border-width: thin;
+  border-color: var(--border-color); }
+h3 {
+  font-size: calc(1rem * var(--heading-ratio) ); }
+
+h4 {
+  font-size: calc(1rem * var(--heading-ratio)); }
+
+h5 {
+  font-size: 1rem; }
+
+h6 {
+  font-size: calc(1rem / var(--heading-ratio)); }
+
+p {
+  margin: var(--universal-margin); }
+
+ol, ul {
+  margin: var(--universal-margin);
+  padding-left: calc(3 * var(--universal-margin)); }
+
+b, strong {
+  font-weight: 700; }
+
+hr {
+  box-sizing: content-box;
+  border: 0;
+  line-height: 1.25em;
+  margin: var(--universal-margin);
+  height: 0.0714285714rem;
+  background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
+
+blockquote {
+  display: block;
+  position: relative;
+  font-style: italic;
+  color: var(--secondary-fore-color);
+  margin: var(--universal-margin);
+  padding: calc(3 * var(--universal-padding));
+  border: 0.0714285714rem solid var(--secondary-border-color);
+  border-left: 0.3rem solid var(--blockquote-color);
+  border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+  blockquote:before {
+    position: absolute;
+    top: calc(0rem - var(--universal-padding));
+    left: 0;
+    font-family: sans-serif;
+    font-size: 2rem;
+    font-weight: 800;
+    content: "\201c";
+    color: var(--blockquote-color); }
+  blockquote[cite]:after {
+    font-style: normal;
+    font-size: 0.75em;
+    font-weight: 700;
+    content: "\a—  " attr(cite);
+    white-space: pre; }
+
+code, kbd, pre, samp {
+  font-family: Menlo, Consolas, monospace;
+  font-size: 0.85em; }
+
+code {
+  background: var(--secondary-back-color);
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+kbd {
+  background: var(--fore-color);
+  color: var(--back-color);
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+pre {
+  overflow: auto;
+  background: var(--secondary-back-color);
+  padding: calc(1.5 * var(--universal-padding));
+  margin: var(--universal-margin);
+  border: 0.0714285714rem solid var(--secondary-border-color);
+  border-left: 0.2857142857rem solid var(--pre-color);
+  border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+
+sup, sub, code, kbd {
+  line-height: 0;
+  position: relative;
+  vertical-align: baseline; }
+
+small, sup, sub, figcaption {
+  font-size: 0.75em; }
+
+sup {
+  top: -0.5em; }
+
+sub {
+  bottom: -0.25em; }
+
+figure {
+  margin: var(--universal-margin); }
+
+figcaption {
+  color: var(--secondary-fore-color); }
+
+a {
+  text-decoration: none; }
+  a:link {
+    color: var(--a-link-color); }
+  a:visited {
+    color: var(--a-visited-color); }
+  a:hover, a:focus {
+    text-decoration: underline; }
+
+/*
+  Definitions for the grid system, cards and containers.
+*/
+.container {
+  margin: 0 auto;
+  padding: 0 calc(1.5 * var(--universal-padding)); }
+
+.row {
+  box-sizing: border-box;
+  display: flex;
+  flex: 0 1 auto;
+  flex-flow: row wrap;
+  margin: 0 0 0 var(--background-margin); }
+
+.col-sm,
+[class^='col-sm-'],
+[class^='col-sm-offset-'],
+.row[class*='cols-sm-'] > * {
+  box-sizing: border-box;
+  flex: 0 0 auto;
+  padding: 0 calc(var(--universal-padding) / 2); }
+
+.col-sm,
+.row.cols-sm > * {
+  max-width: 100%;
+  flex-grow: 1;
+  flex-basis: 0; }
+
+.col-sm-1,
+.row.cols-sm-1 > * {
+  max-width: 8.3333333333%;
+  flex-basis: 8.3333333333%; }
+
+.col-sm-offset-0 {
+  margin-left: 0; }
+
+.col-sm-2,
+.row.cols-sm-2 > * {
+  max-width: 16.6666666667%;
+  flex-basis: 16.6666666667%; }
+
+.col-sm-offset-1 {
+  margin-left: 8.3333333333%; }
+
+.col-sm-3,
+.row.cols-sm-3 > * {
+  max-width: 25%;
+  flex-basis: 25%; }
+
+.col-sm-offset-2 {
+  margin-left: 16.6666666667%; }
+
+.col-sm-4,
+.row.cols-sm-4 > * {
+  max-width: 33.3333333333%;
+  flex-basis: 33.3333333333%; }
+
+.col-sm-offset-3 {
+  margin-left: 25%; }
+
+.col-sm-5,
+.row.cols-sm-5 > * {
+  max-width: 41.6666666667%;
+  flex-basis: 41.6666666667%; }
+
+.col-sm-offset-4 {
+  margin-left: 33.3333333333%; }
+
+.col-sm-6,
+.row.cols-sm-6 > * {
+  max-width: 50%;
+  flex-basis: 50%; }
+
+.col-sm-offset-5 {
+  margin-left: 41.6666666667%; }
+
+.col-sm-7,
+.row.cols-sm-7 > * {
+  max-width: 58.3333333333%;
+  flex-basis: 58.3333333333%; }
+
+.col-sm-offset-6 {
+  margin-left: 50%; }
+
+.col-sm-8,
+.row.cols-sm-8 > * {
+  max-width: 66.6666666667%;
+  flex-basis: 66.6666666667%; }
+
+.col-sm-offset-7 {
+  margin-left: 58.3333333333%; }
+
+.col-sm-9,
+.row.cols-sm-9 > * {
+  max-width: 75%;
+  flex-basis: 75%; }
+
+.col-sm-offset-8 {
+  margin-left: 66.6666666667%; }
+
+.col-sm-10,
+.row.cols-sm-10 > * {
+  max-width: 83.3333333333%;
+  flex-basis: 83.3333333333%; }
+
+.col-sm-offset-9 {
+  margin-left: 75%; }
+
+.col-sm-11,
+.row.cols-sm-11 > * {
+  max-width: 91.6666666667%;
+  flex-basis: 91.6666666667%; }
+
+.col-sm-offset-10 {
+  margin-left: 83.3333333333%; }
+
+.col-sm-12,
+.row.cols-sm-12 > * {
+  max-width: 100%;
+  flex-basis: 100%; }
+
+.col-sm-offset-11 {
+  margin-left: 91.6666666667%; }
+
+.col-sm-normal {
+  order: initial; }
+
+.col-sm-first {
+  order: -999; }
+
+.col-sm-last {
+  order: 999; }
+
+@media screen and (min-width: 500px) {
+  .col-md,
+  [class^='col-md-'],
+  [class^='col-md-offset-'],
+  .row[class*='cols-md-'] > * {
+    box-sizing: border-box;
+    flex: 0 0 auto;
+    padding: 0 calc(var(--universal-padding) / 2); }
+
+  .col-md,
+  .row.cols-md > * {
+    max-width: 100%;
+    flex-grow: 1;
+    flex-basis: 0; }
+
+  .col-md-1,
+  .row.cols-md-1 > * {
+    max-width: 8.3333333333%;
+    flex-basis: 8.3333333333%; }
+
+  .col-md-offset-0 {
+    margin-left: 0; }
+
+  .col-md-2,
+  .row.cols-md-2 > * {
+    max-width: 16.6666666667%;
+    flex-basis: 16.6666666667%; }
+
+  .col-md-offset-1 {
+    margin-left: 8.3333333333%; }
+
+  .col-md-3,
+  .row.cols-md-3 > * {
+    max-width: 25%;
+    flex-basis: 25%; }
+
+  .col-md-offset-2 {
+    margin-left: 16.6666666667%; }
+
+  .col-md-4,
+  .row.cols-md-4 > * {
+    max-width: 33.3333333333%;
+    flex-basis: 33.3333333333%; }
+
+  .col-md-offset-3 {
+    margin-left: 25%; }
+
+  .col-md-5,
+  .row.cols-md-5 > * {
+    max-width: 41.6666666667%;
+    flex-basis: 41.6666666667%; }
+
+  .col-md-offset-4 {
+    margin-left: 33.3333333333%; }
+
+  .col-md-6,
+  .row.cols-md-6 > * {
+    max-width: 50%;
+    flex-basis: 50%; }
+
+  .col-md-offset-5 {
+    margin-left: 41.6666666667%; }
+
+  .col-md-7,
+  .row.cols-md-7 > * {
+    max-width: 58.3333333333%;
+    flex-basis: 58.3333333333%; }
+
+  .col-md-offset-6 {
+    margin-left: 50%; }
+
+  .col-md-8,
+  .row.cols-md-8 > * {
+    max-width: 66.6666666667%;
+    flex-basis: 66.6666666667%; }
+
+  .col-md-offset-7 {
+    margin-left: 58.3333333333%; }
+
+  .col-md-9,
+  .row.cols-md-9 > * {
+    max-width: 75%;
+    flex-basis: 75%; }
+
+  .col-md-offset-8 {
+    margin-left: 66.6666666667%; }
+
+  .col-md-10,
+  .row.cols-md-10 > * {
+    max-width: 83.3333333333%;
+    flex-basis: 83.3333333333%; }
+
+  .col-md-offset-9 {
+    margin-left: 75%; }
+
+  .col-md-11,
+  .row.cols-md-11 > * {
+    max-width: 91.6666666667%;
+    flex-basis: 91.6666666667%; }
+
+  .col-md-offset-10 {
+    margin-left: 83.3333333333%; }
+
+  .col-md-12,
+  .row.cols-md-12 > * {
+    max-width: 100%;
+    flex-basis: 100%; }
+
+  .col-md-offset-11 {
+    margin-left: 91.6666666667%; }
+
+  .col-md-normal {
+    order: initial; }
+
+  .col-md-first {
+    order: -999; }
+
+  .col-md-last {
+    order: 999; } }
+@media screen and (min-width: 1280px) {
+  .col-lg,
+  [class^='col-lg-'],
+  [class^='col-lg-offset-'],
+  .row[class*='cols-lg-'] > * {
+    box-sizing: border-box;
+    flex: 0 0 auto;
+    padding: 0 calc(var(--universal-padding) / 2); }
+
+  .col-lg,
+  .row.cols-lg > * {
+    max-width: 100%;
+    flex-grow: 1;
+    flex-basis: 0; }
+
+  .col-lg-1,
+  .row.cols-lg-1 > * {
+    max-width: 8.3333333333%;
+    flex-basis: 8.3333333333%; }
+
+  .col-lg-offset-0 {
+    margin-left: 0; }
+
+  .col-lg-2,
+  .row.cols-lg-2 > * {
+    max-width: 16.6666666667%;
+    flex-basis: 16.6666666667%; }
+
+  .col-lg-offset-1 {
+    margin-left: 8.3333333333%; }
+
+  .col-lg-3,
+  .row.cols-lg-3 > * {
+    max-width: 25%;
+    flex-basis: 25%; }
+
+  .col-lg-offset-2 {
+    margin-left: 16.6666666667%; }
+
+  .col-lg-4,
+  .row.cols-lg-4 > * {
+    max-width: 33.3333333333%;
+    flex-basis: 33.3333333333%; }
+
+  .col-lg-offset-3 {
+    margin-left: 25%; }
+
+  .col-lg-5,
+  .row.cols-lg-5 > * {
+    max-width: 41.6666666667%;
+    flex-basis: 41.6666666667%; }
+
+  .col-lg-offset-4 {
+    margin-left: 33.3333333333%; }
+
+  .col-lg-6,
+  .row.cols-lg-6 > * {
+    max-width: 50%;
+    flex-basis: 50%; }
+
+  .col-lg-offset-5 {
+    margin-left: 41.6666666667%; }
+
+  .col-lg-7,
+  .row.cols-lg-7 > * {
+    max-width: 58.3333333333%;
+    flex-basis: 58.3333333333%; }
+
+  .col-lg-offset-6 {
+    margin-left: 50%; }
+
+  .col-lg-8,
+  .row.cols-lg-8 > * {
+    max-width: 66.6666666667%;
+    flex-basis: 66.6666666667%; }
+
+  .col-lg-offset-7 {
+    margin-left: 58.3333333333%; }
+
+  .col-lg-9,
+  .row.cols-lg-9 > * {
+    max-width: 75%;
+    flex-basis: 75%; }
+
+  .col-lg-offset-8 {
+    margin-left: 66.6666666667%; }
+
+  .col-lg-10,
+  .row.cols-lg-10 > * {
+    max-width: 83.3333333333%;
+    flex-basis: 83.3333333333%; }
+
+  .col-lg-offset-9 {
+    margin-left: 75%; }
+
+  .col-lg-11,
+  .row.cols-lg-11 > * {
+    max-width: 91.6666666667%;
+    flex-basis: 91.6666666667%; }
+
+  .col-lg-offset-10 {
+    margin-left: 83.3333333333%; }
+
+  .col-lg-12,
+  .row.cols-lg-12 > * {
+    max-width: 100%;
+    flex-basis: 100%; }
+
+  .col-lg-offset-11 {
+    margin-left: 91.6666666667%; }
+
+  .col-lg-normal {
+    order: initial; }
+
+  .col-lg-first {
+    order: -999; }
+
+  .col-lg-last {
+    order: 999; } }
+/* Card component CSS variable definitions */
+:root {
+  --card-back-color: #3cb4e6;
+  --card-fore-color: #03234b;
+  --card-border-color: #03234b; }
+
+.card {
+  display: flex;
+  flex-direction: column;
+  justify-content: space-between;
+  align-self: center;
+  position: relative;
+  width: 100%;
+  background: var(--card-back-color);
+  color: var(--card-fore-color);
+  border: 0.0714285714rem solid var(--card-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin);
+  overflow: hidden; }
+  @media screen and (min-width: 320px) {
+    .card {
+      max-width: 320px; } }
+  .card > .sectione {
+    background: var(--card-back-color);
+    color: var(--card-fore-color);
+    box-sizing: border-box;
+    margin: 0;
+    border: 0;
+    border-radius: 0;
+    border-bottom: 0.0714285714rem solid var(--card-border-color);
+    padding: var(--universal-padding);
+    width: 100%; }
+    .card > .sectione.media {
+      height: 200px;
+      padding: 0;
+      -o-object-fit: cover;
+      object-fit: cover; }
+  .card > .sectione:last-child {
+    border-bottom: 0; }
+
+/*
+  Custom elements for card elements.
+*/
+@media screen and (min-width: 240px) {
+  .card.small {
+    max-width: 240px; } }
+@media screen and (min-width: 480px) {
+  .card.large {
+    max-width: 480px; } }
+.card.fluid {
+  max-width: 100%;
+  width: auto; }
+
+.card.warning {
+  --card-back-color: #e5b8b7;
+  --card-fore-color: #3b234b;
+  --card-border-color: #8c0078; }
+
+.card.error {
+  --card-back-color: #464650;
+  --card-fore-color: #ffffff;
+  --card-border-color: #8c0078; }
+
+.card > .sectione.dark {
+  --card-back-color: #3b234b;
+  --card-fore-color: #ffffff; }
+
+.card > .sectione.double-padded {
+  padding: calc(1.5 * var(--universal-padding)); }
+
+/*
+  Definitions for forms and input elements.
+*/
+/* Input_control module CSS variable definitions */
+:root {
+  --form-back-color: #ffe97f;
+  --form-fore-color: #03234b;
+  --form-border-color: #3cb4e6;
+  --input-back-color: #ffffff;
+  --input-fore-color: #03234b;
+  --input-border-color: #3cb4e6;
+  --input-focus-color: #0288d1;
+  --input-invalid-color: #d32f2f;
+  --button-back-color: #e2e2e2;
+  --button-hover-back-color: #dcdcdc;
+  --button-fore-color: #212121;
+  --button-border-color: transparent;
+  --button-hover-border-color: transparent;
+  --button-group-border-color: rgba(124, 124, 124, 0.54); }
+
+form {
+  background: var(--form-back-color);
+  color: var(--form-fore-color);
+  border: 0.0714285714rem solid var(--form-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin);
+  padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
+
+fieldset {
+  border: 0.0714285714rem solid var(--form-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: calc(var(--universal-margin) / 4);
+  padding: var(--universal-padding); }
+
+legend {
+  box-sizing: border-box;
+  display: table;
+  max-width: 100%;
+  white-space: normal;
+  font-weight: 500;
+  padding: calc(var(--universal-padding) / 2); }
+
+label {
+  padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+.input-group {
+  display: inline-block; }
+  .input-group.fluid {
+    display: flex;
+    align-items: center;
+    justify-content: center; }
+    .input-group.fluid > input {
+      max-width: 100%;
+      flex-grow: 1;
+      flex-basis: 0px; }
+    @media screen and (max-width: 499px) {
+      .input-group.fluid {
+        align-items: stretch;
+        flex-direction: column; } }
+  .input-group.vertical {
+    display: flex;
+    align-items: stretch;
+    flex-direction: column; }
+    .input-group.vertical > input {
+      max-width: 100%;
+      flex-grow: 1;
+      flex-basis: 0px; }
+
+[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {
+  height: auto; }
+
+[type="search"] {
+  -webkit-appearance: textfield;
+  outline-offset: -2px; }
+
+[type="search"]::-webkit-search-cancel-button,
+[type="search"]::-webkit-search-decoration {
+  -webkit-appearance: none; }
+
+input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],
+[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {
+  box-sizing: border-box;
+  background: var(--input-back-color);
+  color: var(--input-fore-color);
+  border: 0.0714285714rem solid var(--input-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: calc(var(--universal-margin) / 2);
+  padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {
+  border-color: var(--input-focus-color);
+  box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {
+  border-color: var(--input-invalid-color);
+  box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {
+  background: var(--secondary-back-color); }
+
+select {
+  max-width: 100%; }
+
+option {
+  overflow: hidden;
+  text-overflow: ellipsis; }
+
+[type="checkbox"], [type="radio"] {
+  -webkit-appearance: none;
+  -moz-appearance: none;
+  appearance: none;
+  position: relative;
+  height: calc(1rem + var(--universal-padding) / 2);
+  width: calc(1rem + var(--universal-padding) / 2);
+  vertical-align: text-bottom;
+  padding: 0;
+  flex-basis: calc(1rem + var(--universal-padding) / 2) !important;
+  flex-grow: 0 !important; }
+  [type="checkbox"]:checked:before, [type="radio"]:checked:before {
+    position: absolute; }
+
+[type="checkbox"]:checked:before {
+  content: '\2713';
+  font-family: sans-serif;
+  font-size: calc(1rem + var(--universal-padding) / 2);
+  top: calc(0rem - var(--universal-padding));
+  left: calc(var(--universal-padding) / 4); }
+
+[type="radio"] {
+  border-radius: 100%; }
+  [type="radio"]:checked:before {
+    border-radius: 100%;
+    content: '';
+    top: calc(0.0714285714rem + var(--universal-padding) / 2);
+    left: calc(0.0714285714rem + var(--universal-padding) / 2);
+    background: var(--input-fore-color);
+    width: 0.5rem;
+    height: 0.5rem; }
+
+:placeholder-shown {
+  color: var(--input-fore-color); }
+
+::-ms-placeholder {
+  color: var(--input-fore-color);
+  opacity: 0.54; }
+
+button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {
+  border-style: none;
+  padding: 0; }
+
+button, html [type="button"], [type="reset"], [type="submit"] {
+  -webkit-appearance: button; }
+
+button {
+  overflow: visible;
+  text-transform: none; }
+
+button, [type="button"], [type="submit"], [type="reset"],
+a.button, label.button, .button,
+a[role="button"], label[role="button"], [role="button"] {
+  display: inline-block;
+  background: var(--button-back-color);
+  color: var(--button-fore-color);
+  border: 0.0714285714rem solid var(--button-border-color);
+  border-radius: var(--universal-border-radius);
+  padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
+  margin: var(--universal-margin);
+  text-decoration: none;
+  cursor: pointer;
+  transition: background 0.3s; }
+  button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,
+  a.button:hover,
+  a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,
+  a[role="button"]:hover,
+  a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {
+    background: var(--button-hover-back-color);
+    border-color: var(--button-hover-border-color); }
+
+input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {
+  cursor: not-allowed;
+  opacity: 0.75; }
+
+.button-group {
+  display: flex;
+  border: 0.0714285714rem solid var(--button-group-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin); }
+  .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
+    margin: 0;
+    max-width: 100%;
+    flex: 1 1 auto;
+    text-align: center;
+    border: 0;
+    border-radius: 0;
+    box-shadow: none; }
+  .button-group > :not(:first-child) {
+    border-left: 0.0714285714rem solid var(--button-group-border-color); }
+  @media screen and (max-width: 499px) {
+    .button-group {
+      flex-direction: column; }
+      .button-group > :not(:first-child) {
+        border: 0;
+        border-top: 0.0714285714rem solid var(--button-group-border-color); } }
+
+/*
+  Custom elements for forms and input elements.
+*/
+button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {
+  --button-back-color: #1976d2;
+  --button-fore-color: #f8f8f8; }
+  button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {
+    --button-hover-back-color: #1565c0; }
+
+button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {
+  --button-back-color: #d32f2f;
+  --button-fore-color: #f8f8f8; }
+  button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {
+    --button-hover-back-color: #c62828; }
+
+button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {
+  --button-back-color: #308732;
+  --button-fore-color: #f8f8f8; }
+  button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {
+    --button-hover-back-color: #277529; }
+
+button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {
+  --button-back-color: #212121;
+  --button-fore-color: #f8f8f8; }
+  button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {
+    --button-hover-back-color: #111; }
+
+button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {
+  padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));
+  margin: var(--universal-margin); }
+
+button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {
+  padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));
+  margin: var(--universal-margin); }
+
+/*
+  Definitions for navigation elements.
+*/
+/* Navigation module CSS variable definitions */
+:root {
+  --header-back-color: #03234b;
+  --header-hover-back-color: #ffd200;
+  --header-fore-color: #ffffff;
+  --header-border-color: #3cb4e6;
+  --nav-back-color: #ffffff;
+  --nav-hover-back-color: #ffe97f;
+  --nav-fore-color: #e6007e;
+  --nav-border-color: #3cb4e6;
+  --nav-link-color: #3cb4e6;
+  --footer-fore-color: #ffffff;
+  --footer-back-color: #03234b;
+  --footer-border-color: #3cb4e6;
+  --footer-link-color: #3cb4e6;
+  --drawer-back-color: #ffffff;
+  --drawer-hover-back-color: #ffe97f;
+  --drawer-border-color: #3cb4e6;
+  --drawer-close-color: #e6007e; }
+
+header {
+  height: 2.75rem;
+  background: var(--header-back-color);
+  color: var(--header-fore-color);
+  border-bottom: 0.0714285714rem solid var(--header-border-color);
+  padding: calc(var(--universal-padding) / 4) 0;
+  white-space: nowrap;
+  overflow-x: auto;
+  overflow-y: hidden; }
+  header.row {
+    box-sizing: content-box; }
+  header .logo {
+    color: var(--header-fore-color);
+    font-size: 1.75rem;
+    padding: var(--universal-padding) calc(2 * var(--universal-padding));
+    text-decoration: none; }
+  header button, header [type="button"], header .button, header [role="button"] {
+    box-sizing: border-box;
+    position: relative;
+    top: calc(0rem - var(--universal-padding) / 4);
+    height: calc(3.1875rem + var(--universal-padding) / 2);
+    background: var(--header-back-color);
+    line-height: calc(3.1875rem - var(--universal-padding) * 1.5);
+    text-align: center;
+    color: var(--header-fore-color);
+    border: 0;
+    border-radius: 0;
+    margin: 0;
+    text-transform: uppercase; }
+    header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {
+      background: var(--header-hover-back-color); }
+
+nav {
+  background: var(--nav-back-color);
+  color: var(--nav-fore-color);
+  border: 0.0714285714rem solid var(--nav-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin); }
+  nav * {
+    padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+  nav a, nav a:visited {
+    display: block;
+    color: var(--nav-link-color);
+    border-radius: var(--universal-border-radius);
+    transition: background 0.3s; }
+    nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {
+      text-decoration: none;
+      background: var(--nav-hover-back-color); }
+  nav .sublink-1 {
+    position: relative;
+    margin-left: calc(2 * var(--universal-padding)); }
+    nav .sublink-1:before {
+      position: absolute;
+      left: calc(var(--universal-padding) - 1 * var(--universal-padding));
+      top: -0.0714285714rem;
+      content: '';
+      height: 100%;
+      border: 0.0714285714rem solid var(--nav-border-color);
+      border-left: 0; }
+  nav .sublink-2 {
+    position: relative;
+    margin-left: calc(4 * var(--universal-padding)); }
+    nav .sublink-2:before {
+      position: absolute;
+      left: calc(var(--universal-padding) - 3 * var(--universal-padding));
+      top: -0.0714285714rem;
+      content: '';
+      height: 100%;
+      border: 0.0714285714rem solid var(--nav-border-color);
+      border-left: 0; }
+
+footer {
+  background: var(--footer-back-color);
+  color: var(--footer-fore-color);
+  border-top: 0.0714285714rem solid var(--footer-border-color);
+  padding: calc(2 * var(--universal-padding)) var(--universal-padding);
+  font-size: 0.875rem; }
+  footer a, footer a:visited {
+    color: var(--footer-link-color); }
+
+header.sticky {
+  position: -webkit-sticky;
+  position: sticky;
+  z-index: 1101;
+  top: 0; }
+
+footer.sticky {
+  position: -webkit-sticky;
+  position: sticky;
+  z-index: 1101;
+  bottom: 0; }
+
+.drawer-toggle:before {
+  display: inline-block;
+  position: relative;
+  vertical-align: bottom;
+  content: '\00a0\2261\00a0';
+  font-family: sans-serif;
+  font-size: 1.5em; }
+@media screen and (min-width: 500px) {
+  .drawer-toggle:not(.persistent) {
+    display: none; } }
+
+[type="checkbox"].drawer {
+  height: 1px;
+  width: 1px;
+  margin: -1px;
+  overflow: hidden;
+  position: absolute;
+  clip: rect(0 0 0 0);
+  -webkit-clip-path: inset(100%);
+  clip-path: inset(100%); }
+  [type="checkbox"].drawer + * {
+    display: block;
+    box-sizing: border-box;
+    position: fixed;
+    top: 0;
+    width: 320px;
+    height: 100vh;
+    overflow-y: auto;
+    background: var(--drawer-back-color);
+    border: 0.0714285714rem solid var(--drawer-border-color);
+    border-radius: 0;
+    margin: 0;
+    z-index: 1110;
+    right: -320px;
+    transition: right 0.3s; }
+    [type="checkbox"].drawer + * .drawer-close {
+      position: absolute;
+      top: var(--universal-margin);
+      right: var(--universal-margin);
+      z-index: 1111;
+      width: 2rem;
+      height: 2rem;
+      border-radius: var(--universal-border-radius);
+      padding: var(--universal-padding);
+      margin: 0;
+      cursor: pointer;
+      transition: background 0.3s; }
+      [type="checkbox"].drawer + * .drawer-close:before {
+        display: block;
+        content: '\00D7';
+        color: var(--drawer-close-color);
+        position: relative;
+        font-family: sans-serif;
+        font-size: 2rem;
+        line-height: 1;
+        text-align: center; }
+      [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {
+        background: var(--drawer-hover-back-color); }
+    @media screen and (max-width: 320px) {
+      [type="checkbox"].drawer + * {
+        width: 100%; } }
+  [type="checkbox"].drawer:checked + * {
+    right: 0; }
+  @media screen and (min-width: 500px) {
+    [type="checkbox"].drawer:not(.persistent) + * {
+      position: static;
+      height: 100%;
+      z-index: 1100; }
+      [type="checkbox"].drawer:not(.persistent) + * .drawer-close {
+        display: none; } }
+
+/*
+  Definitions for the responsive table component.
+*/
+/* Table module CSS variable definitions. */
+:root {
+  --table-border-color: #03234b;
+  --table-border-separator-color: #03234b;
+  --table-head-back-color: #03234b;
+  --table-head-fore-color: #ffffff;
+  --table-body-back-color: #ffffff;
+  --table-body-fore-color: #03234b;
+  --table-body-alt-back-color: #f4f4f4; }
+
+table {
+  border-collapse: separate;
+  border-spacing: 0;
+  margin: 0;
+  display: flex;
+  flex: 0 1 auto;
+  flex-flow: row wrap;
+  padding: var(--universal-padding);
+  padding-top: 0; }
+  table caption {
+    font-size: 1rem;
+    margin: calc(2 * var(--universal-margin)) 0;
+    max-width: 100%;
+    flex: 0 0 100%; }
+  table thead, table tbody {
+    display: flex;
+    flex-flow: row wrap;
+    border: 0.0714285714rem solid var(--table-border-color); }
+  table thead {
+    z-index: 999;
+    border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
+    border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
+  table tbody {
+    border-top: 0;
+    margin-top: calc(0 - var(--universal-margin));
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+  table tr {
+    display: flex;
+    padding: 0; }
+  table th, table td {
+    padding: calc(0.5 * var(--universal-padding));
+		font-size: 0.9rem; }
+  table th {
+    text-align: left;
+    background: var(--table-head-back-color);
+    color: var(--table-head-fore-color); }
+  table td {
+    background: var(--table-body-back-color);
+    color: var(--table-body-fore-color);
+    border-top: 0.0714285714rem solid var(--table-border-color); }
+
+table:not(.horizontal) {
+  overflow: auto;
+  max-height: 100%; }
+  table:not(.horizontal) thead, table:not(.horizontal) tbody {
+    max-width: 100%;
+    flex: 0 0 100%; }
+  table:not(.horizontal) tr {
+    flex-flow: row wrap;
+    flex: 0 0 100%; }
+  table:not(.horizontal) th, table:not(.horizontal) td {
+    flex: 1 0 0%;
+    overflow: hidden;
+    text-overflow: ellipsis; }
+  table:not(.horizontal) thead {
+    position: sticky;
+    top: 0; }
+  table:not(.horizontal) tbody tr:first-child td {
+    border-top: 0; }
+
+table.horizontal {
+  border: 0; }
+  table.horizontal thead, table.horizontal tbody {
+    border: 0;
+    flex: .2 0 0;
+    flex-flow: row nowrap; }
+  table.horizontal tbody {
+    overflow: auto;
+    justify-content: space-between;
+    flex: .8 0 0;
+    margin-left: 0;
+    padding-bottom: calc(var(--universal-padding) / 4); }
+  table.horizontal tr {
+    flex-direction: column;
+    flex: 1 0 auto; }
+  table.horizontal th, table.horizontal td {
+    width: auto;
+    border: 0;
+    border-bottom: 0.0714285714rem solid var(--table-border-color); }
+    table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
+      border-top: 0; }
+  table.horizontal th {
+    text-align: right;
+    border-left: 0.0714285714rem solid var(--table-border-color);
+    border-right: 0.0714285714rem solid var(--table-border-separator-color); }
+  table.horizontal thead tr:first-child {
+    padding-left: 0; }
+  table.horizontal th:first-child, table.horizontal td:first-child {
+    border-top: 0.0714285714rem solid var(--table-border-color); }
+  table.horizontal tbody tr:last-child td {
+    border-right: 0.0714285714rem solid var(--table-border-color); }
+    table.horizontal tbody tr:last-child td:first-child {
+      border-top-right-radius: 0.25rem; }
+    table.horizontal tbody tr:last-child td:last-child {
+      border-bottom-right-radius: 0.25rem; }
+  table.horizontal thead tr:first-child th:first-child {
+    border-top-left-radius: 0.25rem; }
+  table.horizontal thead tr:first-child th:last-child {
+    border-bottom-left-radius: 0.25rem; }
+
+@media screen and (max-width: 499px) {
+  table, table.horizontal {
+    border-collapse: collapse;
+    border: 0;
+    width: 100%;
+    display: table; }
+    table thead, table th, table.horizontal thead, table.horizontal th {
+      border: 0;
+      height: 1px;
+      width: 1px;
+      margin: -1px;
+      overflow: hidden;
+      padding: 0;
+      position: absolute;
+      clip: rect(0 0 0 0);
+      -webkit-clip-path: inset(100%);
+      clip-path: inset(100%); }
+    table tbody, table.horizontal tbody {
+      border: 0;
+      display: table-row-group; }
+    table tr, table.horizontal tr {
+      display: block;
+      border: 0.0714285714rem solid var(--table-border-color);
+      border-radius: var(--universal-border-radius);
+      background: #ffffff;
+      padding: var(--universal-padding);
+      margin: var(--universal-margin);
+      margin-bottom: calc(1 * var(--universal-margin)); }
+    table th, table td, table.horizontal th, table.horizontal td {
+      width: auto; }
+    table td, table.horizontal td {
+      display: block;
+      border: 0;
+      text-align: right; }
+    table td:before, table.horizontal td:before {
+      content: attr(data-label);
+      float: left;
+      font-weight: 600; }
+    table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {
+      border-top: 0; }
+    table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
+      border-right: 0; } }
+table tr:nth-of-type(2n) > td {
+  background: var(--table-body-alt-back-color); }
+
+@media screen and (max-width: 500px) {
+  table tr:nth-of-type(2n) {
+    background: var(--table-body-alt-back-color); } }
+:root {
+  --table-body-hover-back-color: #90caf9; }
+
+table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+  background: var(--table-body-hover-back-color); }
+
+@media screen and (max-width: 500px) {
+  table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+    background: var(--table-body-hover-back-color); } }
+/*
+  Definitions for contextual background elements, toasts and tooltips.
+*/
+/* Contextual module CSS variable definitions */
+:root {
+  --mark-back-color: #3cb4e6;
+  --mark-fore-color: #ffffff; }
+
+mark {
+  background: var(--mark-back-color);
+  color: var(--mark-fore-color);
+  font-size: 0.95em;
+  line-height: 1em;
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
+  mark.inline-block {
+    display: inline-block;
+    font-size: 1em;
+    line-height: 1.4;
+    padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+:root {
+  --toast-back-color: #424242;
+  --toast-fore-color: #fafafa; }
+
+.toast {
+  position: fixed;
+  bottom: calc(var(--universal-margin) * 3);
+  left: 50%;
+  transform: translate(-50%, -50%);
+  z-index: 1111;
+  color: var(--toast-fore-color);
+  background: var(--toast-back-color);
+  border-radius: calc(var(--universal-border-radius) * 16);
+  padding: var(--universal-padding) calc(var(--universal-padding) * 3); }
+
+:root {
+  --tooltip-back-color: #212121;
+  --tooltip-fore-color: #fafafa; }
+
+.tooltip {
+  position: relative;
+  display: inline-block; }
+  .tooltip:before, .tooltip:after {
+    position: absolute;
+    opacity: 0;
+    clip: rect(0 0 0 0);
+    -webkit-clip-path: inset(100%);
+    clip-path: inset(100%);
+    transition: all 0.3s;
+    z-index: 1010;
+    left: 50%; }
+  .tooltip:not(.bottom):before, .tooltip:not(.bottom):after {
+    bottom: 75%; }
+  .tooltip.bottom:before, .tooltip.bottom:after {
+    top: 75%; }
+  .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {
+    opacity: 1;
+    clip: auto;
+    -webkit-clip-path: inset(0%);
+    clip-path: inset(0%); }
+  .tooltip:before {
+    content: '';
+    background: transparent;
+    border: var(--universal-margin) solid transparent;
+    left: calc(50% - var(--universal-margin)); }
+  .tooltip:not(.bottom):before {
+    border-top-color: #212121; }
+  .tooltip.bottom:before {
+    border-bottom-color: #212121; }
+  .tooltip:after {
+    content: attr(aria-label);
+    color: var(--tooltip-fore-color);
+    background: var(--tooltip-back-color);
+    border-radius: var(--universal-border-radius);
+    padding: var(--universal-padding);
+    white-space: nowrap;
+    transform: translateX(-50%); }
+  .tooltip:not(.bottom):after {
+    margin-bottom: calc(2 * var(--universal-margin)); }
+  .tooltip.bottom:after {
+    margin-top: calc(2 * var(--universal-margin)); }
+
+:root {
+  --modal-overlay-color: rgba(0, 0, 0, 0.45);
+  --modal-close-color: #e6007e;
+  --modal-close-hover-color: #ffe97f; }
+
+[type="checkbox"].modal {
+  height: 1px;
+  width: 1px;
+  margin: -1px;
+  overflow: hidden;
+  position: absolute;
+  clip: rect(0 0 0 0);
+  -webkit-clip-path: inset(100%);
+  clip-path: inset(100%); }
+  [type="checkbox"].modal + div {
+    position: fixed;
+    top: 0;
+    left: 0;
+    display: none;
+    width: 100vw;
+    height: 100vh;
+    background: var(--modal-overlay-color); }
+    [type="checkbox"].modal + div .card {
+      margin: 0 auto;
+      max-height: 50vh;
+      overflow: auto; }
+      [type="checkbox"].modal + div .card .modal-close {
+        position: absolute;
+        top: 0;
+        right: 0;
+        width: 1.75rem;
+        height: 1.75rem;
+        border-radius: var(--universal-border-radius);
+        padding: var(--universal-padding);
+        margin: 0;
+        cursor: pointer;
+        transition: background 0.3s; }
+        [type="checkbox"].modal + div .card .modal-close:before {
+          display: block;
+          content: '\00D7';
+          color: var(--modal-close-color);
+          position: relative;
+          font-family: sans-serif;
+          font-size: 1.75rem;
+          line-height: 1;
+          text-align: center; }
+        [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {
+          background: var(--modal-close-hover-color); }
+  [type="checkbox"].modal:checked + div {
+    display: flex;
+    flex: 0 1 auto;
+    z-index: 1200; }
+    [type="checkbox"].modal:checked + div .card .modal-close {
+      z-index: 1211; }
+
+:root {
+  --collapse-label-back-color: #03234b;
+  --collapse-label-fore-color: #ffffff;
+  --collapse-label-hover-back-color: #3cb4e6;
+  --collapse-selected-label-back-color: #3cb4e6;
+  --collapse-border-color: var(--collapse-label-back-color);
+  --collapse-selected-border-color: #ceecf8;
+  --collapse-content-back-color: #ffffff;
+  --collapse-selected-label-border-color: #3cb4e6; }
+
+.collapse {
+  width: calc(100% - 2 * var(--universal-margin));
+  opacity: 1;
+  display: flex;
+  flex-direction: column;
+  margin: var(--universal-margin);
+  border-radius: var(--universal-border-radius); }
+  .collapse > [type="radio"], .collapse > [type="checkbox"] {
+    height: 1px;
+    width: 1px;
+    margin: -1px;
+    overflow: hidden;
+    position: absolute;
+    clip: rect(0 0 0 0);
+    -webkit-clip-path: inset(100%);
+    clip-path: inset(100%); }
+  .collapse > label {
+    flex-grow: 1;
+    display: inline-block;
+    height: 1.25rem;
+    cursor: pointer;
+    transition: background 0.2s;
+    color: var(--collapse-label-fore-color);
+    background: var(--collapse-label-back-color);
+    border: 0.0714285714rem solid var(--collapse-selected-border-color);
+    padding: calc(1.25 * var(--universal-padding)); }
+    .collapse > label:hover, .collapse > label:focus {
+      background: var(--collapse-label-hover-back-color); }
+    .collapse > label + div {
+      flex-basis: auto;
+      height: 1px;
+      width: 1px;
+      margin: -1px;
+      overflow: hidden;
+      position: absolute;
+      clip: rect(0 0 0 0);
+      -webkit-clip-path: inset(100%);
+      clip-path: inset(100%);
+      transition: max-height 0.3s;
+      max-height: 1px; }
+  .collapse > :checked + label {
+    background: var(--collapse-selected-label-back-color);
+    border-color: var(--collapse-selected-label-border-color); }
+    .collapse > :checked + label + div {
+      box-sizing: border-box;
+      position: relative;
+      width: 100%;
+      height: auto;
+      overflow: auto;
+      margin: 0;
+      background: var(--collapse-content-back-color);
+      border: 0.0714285714rem solid var(--collapse-selected-border-color);
+      border-top: 0;
+      padding: var(--universal-padding);
+      clip: auto;
+      -webkit-clip-path: inset(0%);
+      clip-path: inset(0%);
+      max-height: 100%; }
+  .collapse > label:not(:first-of-type) {
+    border-top: 0; }
+  .collapse > label:first-of-type {
+    border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }
+  .collapse > label:last-of-type:not(:first-of-type) {
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+  .collapse > label:last-of-type:first-of-type {
+    border-radius: var(--universal-border-radius); }
+  .collapse > :checked:last-of-type:not(:first-of-type) + label {
+    border-radius: 0; }
+  .collapse > :checked:last-of-type + label + div {
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+
+/*
+  Custom elements for contextual background elements, toasts and tooltips.
+*/
+mark.tertiary {
+  --mark-back-color: #3cb4e6; }
+
+mark.tag {
+  padding: calc(var(--universal-padding)/2) var(--universal-padding);
+  border-radius: 1em; }
+
+/*
+  Definitions for progress elements and spinners.
+*/
+/* Progress module CSS variable definitions */
+:root {
+  --progress-back-color: #3cb4e6;
+  --progress-fore-color: #555; }
+
+progress {
+  display: block;
+  vertical-align: baseline;
+  -webkit-appearance: none;
+  -moz-appearance: none;
+  appearance: none;
+  height: 0.75rem;
+  width: calc(100% - 2 * var(--universal-margin));
+  margin: var(--universal-margin);
+  border: 0;
+  border-radius: calc(2 * var(--universal-border-radius));
+  background: var(--progress-back-color);
+  color: var(--progress-fore-color); }
+  progress::-webkit-progress-value {
+    background: var(--progress-fore-color);
+    border-top-left-radius: calc(2 * var(--universal-border-radius));
+    border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+  progress::-webkit-progress-bar {
+    background: var(--progress-back-color); }
+  progress::-moz-progress-bar {
+    background: var(--progress-fore-color);
+    border-top-left-radius: calc(2 * var(--universal-border-radius));
+    border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+  progress[value="1000"]::-webkit-progress-value {
+    border-radius: calc(2 * var(--universal-border-radius)); }
+  progress[value="1000"]::-moz-progress-bar {
+    border-radius: calc(2 * var(--universal-border-radius)); }
+  progress.inline {
+    display: inline-block;
+    vertical-align: middle;
+    width: 60%; }
+
+:root {
+  --spinner-back-color: #ddd;
+  --spinner-fore-color: #555; }
+
+@keyframes spinner-donut-anim {
+  0% {
+    transform: rotate(0deg); }
+  100% {
+    transform: rotate(360deg); } }
+.spinner {
+  display: inline-block;
+  margin: var(--universal-margin);
+  border: 0.25rem solid var(--spinner-back-color);
+  border-left: 0.25rem solid var(--spinner-fore-color);
+  border-radius: 50%;
+  width: 1.25rem;
+  height: 1.25rem;
+  animation: spinner-donut-anim 1.2s linear infinite; }
+
+/*
+  Custom elements for progress bars and spinners.
+*/
+progress.primary {
+  --progress-fore-color: #1976d2; }
+
+progress.secondary {
+  --progress-fore-color: #d32f2f; }
+
+progress.tertiary {
+  --progress-fore-color: #308732; }
+
+.spinner.primary {
+  --spinner-fore-color: #1976d2; }
+
+.spinner.secondary {
+  --spinner-fore-color: #d32f2f; }
+
+.spinner.tertiary {
+  --spinner-fore-color: #308732; }
+
+/*
+  Definitions for icons - powered by Feather (https://feathericons.com/).
+*/
+span[class^='icon-'] {
+  display: inline-block;
+  height: 1em;
+  width: 1em;
+  vertical-align: -0.125em;
+  background-size: contain;
+  margin: 0 calc(var(--universal-margin) / 4); }
+  span[class^='icon-'].secondary {
+    -webkit-filter: invert(25%);
+    filter: invert(25%); }
+  span[class^='icon-'].inverse {
+    -webkit-filter: invert(100%);
+    filter: invert(100%); }
+
+span.icon-alert {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-bookmark {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-calendar {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-credit {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-edit {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+span.icon-link {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-help {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-home {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-info {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-lock {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-mail {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-location {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-phone {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-rss {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-search {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-settings {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-share {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-cart {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-upload {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-user {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+
+/*
+  Definitions for STMicroelectronics icons (https://brandportal.st.com/document/26).
+*/
+span.icon-st-update {
+  background-image: url("Update.svg"); }
+span.icon-st-add {
+  background-image: url("Add button.svg"); }
+
+/*
+  Definitions for utilities and helper classes.
+*/
+/* Utility module CSS variable definitions */
+:root {
+  --generic-border-color: rgba(0, 0, 0, 0.3);
+  --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
+
+.hidden {
+  display: none !important; }
+
+.visually-hidden {
+  position: absolute !important;
+  width: 1px !important;
+  height: 1px !important;
+  margin: -1px !important;
+  border: 0 !important;
+  padding: 0 !important;
+  clip: rect(0 0 0 0) !important;
+  -webkit-clip-path: inset(100%) !important;
+  clip-path: inset(100%) !important;
+  overflow: hidden !important; }
+
+.bordered {
+  border: 0.0714285714rem solid var(--generic-border-color) !important; }
+
+.rounded {
+  border-radius: var(--universal-border-radius) !important; }
+
+.circular {
+  border-radius: 50% !important; }
+
+.shadowed {
+  box-shadow: var(--generic-box-shadow) !important; }
+
+.responsive-margin {
+  margin: calc(var(--universal-margin) / 4) !important; }
+  @media screen and (min-width: 500px) {
+    .responsive-margin {
+      margin: calc(var(--universal-margin) / 2) !important; } }
+  @media screen and (min-width: 1280px) {
+    .responsive-margin {
+      margin: var(--universal-margin) !important; } }
+
+.responsive-padding {
+  padding: calc(var(--universal-padding) / 4) !important; }
+  @media screen and (min-width: 500px) {
+    .responsive-padding {
+      padding: calc(var(--universal-padding) / 2) !important; } }
+  @media screen and (min-width: 1280px) {
+    .responsive-padding {
+      padding: var(--universal-padding) !important; } }
+
+@media screen and (max-width: 499px) {
+  .hidden-sm {
+    display: none !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+  .hidden-md {
+    display: none !important; } }
+@media screen and (min-width: 1280px) {
+  .hidden-lg {
+    display: none !important; } }
+@media screen and (max-width: 499px) {
+  .visually-hidden-sm {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+  .visually-hidden-md {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+@media screen and (min-width: 1280px) {
+  .visually-hidden-lg {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+
+/*# sourceMappingURL=mini-custom.css.map */
+
+img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
+img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
+
+.figure {
+  display: block;
+  margin-left: auto;
+  margin-right: auto;
+  text-align: center;
+}

lib/lsm6ds3tr-api/lsm6ds3tr-c_reg.c

@@ -0,0 +1,8219 @@
+/**
+  ******************************************************************************
+  * @file    lsm6ds3tr_c_reg.c
+  * @author  Sensors Software Solution Team
+  * @brief   LSM6DS3TR_C driver file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+#include "lsm6ds3tr-c_reg.h"
+
+/**
+  * @defgroup    LSM6DS3TR_C
+  * @brief       This file provides a set of functions needed to drive the
+  *              lsm6ds3tr_c enanced inertial module.
+  * @{
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_interfaces_functions
+  * @brief       This section provide a set of functions used to read and
+  *              write a generic register of the device.
+  *              MANDATORY: return 0 -> no Error.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Read generic device register
+  *
+  * @param  ctx   read / write interface definitions(ptr)
+  * @param  reg   register to read
+  * @param  data  pointer to buffer that store the data read(ptr)
+  * @param  len   number of consecutive register to read
+  * @retval       interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t __weak lsm6ds3tr_c_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
+                                    uint8_t *data,
+                                    uint16_t len)
+{
+  int32_t ret;
+
+  if (ctx == NULL)
+  {
+    return -1;
+  }
+
+  ret = ctx->read_reg(ctx->handle, reg, data, len);
+
+  return ret;
+}
+
+/**
+  * @brief  Write generic device register
+  *
+  * @param  ctx   read / write interface definitions(ptr)
+  * @param  reg   register to write
+  * @param  data  pointer to data to write in register reg(ptr)
+  * @param  len   number of consecutive register to write
+  * @retval       interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t __weak lsm6ds3tr_c_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
+                                     uint8_t *data,
+                                     uint16_t len)
+{
+  int32_t ret;
+
+  if (ctx == NULL)
+  {
+    return -1;
+  }
+
+  ret = ctx->write_reg(ctx->handle, reg, data, len);
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Sensitivity
+  * @brief       These functions convert raw-data into engineering units.
+  * @{
+  *
+  */
+
+float_t lsm6ds3tr_c_from_fs2g_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb * 0.061f);
+}
+
+float_t lsm6ds3tr_c_from_fs4g_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb * 0.122f);
+}
+
+float_t lsm6ds3tr_c_from_fs8g_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb * 0.244f);
+}
+
+float_t lsm6ds3tr_c_from_fs16g_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb * 0.488f);
+}
+
+float_t lsm6ds3tr_c_from_fs125dps_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb * 4.375f);
+}
+
+float_t lsm6ds3tr_c_from_fs250dps_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb * 8.750f);
+}
+
+float_t lsm6ds3tr_c_from_fs500dps_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb * 17.50f);
+}
+
+float_t lsm6ds3tr_c_from_fs1000dps_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb * 35.0f);
+}
+
+float_t lsm6ds3tr_c_from_fs2000dps_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb * 70.0f);
+}
+
+float_t lsm6ds3tr_c_from_lsb_to_celsius(int16_t lsb)
+{
+  return (((float_t)lsb / 256.0f) + 25.0f);
+}
+
+/**
+  * @}
+  *
+  */
+
+
+/**
+  * @defgroup    LSM6DS3TR_C_data_generation
+  * @brief       This section groups all the functions concerning data
+  *              generation
+  * @{
+  *
+  */
+
+/**
+  * @brief  Accelerometer full-scale selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fs_xl in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_full_scale_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_xl_t val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl1_xl.fs_xl = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                                (uint8_t *)&ctrl1_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer full-scale selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of fs_xl in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_full_scale_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_xl_t *val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  switch (ctrl1_xl.fs_xl)
+  {
+    case LSM6DS3TR_C_2g:
+      *val = LSM6DS3TR_C_2g;
+      break;
+
+    case LSM6DS3TR_C_16g:
+      *val = LSM6DS3TR_C_16g;
+      break;
+
+    case LSM6DS3TR_C_4g:
+      *val = LSM6DS3TR_C_4g;
+      break;
+
+    case LSM6DS3TR_C_8g:
+      *val = LSM6DS3TR_C_8g;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_XL_FS_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer data rate selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of odr_xl in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_data_rate_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_xl_t val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl1_xl.odr_xl = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                                (uint8_t *)&ctrl1_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer data rate selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of odr_xl in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_data_rate_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_xl_t *val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  switch (ctrl1_xl.odr_xl)
+  {
+    case LSM6DS3TR_C_XL_ODR_OFF:
+      *val = LSM6DS3TR_C_XL_ODR_OFF;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_12Hz5:
+      *val = LSM6DS3TR_C_XL_ODR_12Hz5;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_26Hz:
+      *val = LSM6DS3TR_C_XL_ODR_26Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_52Hz:
+      *val = LSM6DS3TR_C_XL_ODR_52Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_104Hz:
+      *val = LSM6DS3TR_C_XL_ODR_104Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_208Hz:
+      *val = LSM6DS3TR_C_XL_ODR_208Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_416Hz:
+      *val = LSM6DS3TR_C_XL_ODR_416Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_833Hz:
+      *val = LSM6DS3TR_C_XL_ODR_833Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_1k66Hz:
+      *val = LSM6DS3TR_C_XL_ODR_1k66Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_3k33Hz:
+      *val = LSM6DS3TR_C_XL_ODR_3k33Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_6k66Hz:
+      *val = LSM6DS3TR_C_XL_ODR_6k66Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ODR_1Hz6:
+      *val = LSM6DS3TR_C_XL_ODR_1Hz6;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_XL_ODR_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope chain full-scale selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fs_g in reg CTRL2_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_full_scale_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_g_t val)
+{
+  lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G,
+                             (uint8_t *)&ctrl2_g, 1);
+
+  if (ret == 0)
+  {
+    ctrl2_g.fs_g = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL2_G,
+                                (uint8_t *)&ctrl2_g, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope chain full-scale selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of fs_g in reg CTRL2_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_full_scale_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_g_t *val)
+{
+  lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G,
+                             (uint8_t *)&ctrl2_g, 1);
+
+  switch (ctrl2_g.fs_g)
+  {
+    case LSM6DS3TR_C_250dps:
+      *val = LSM6DS3TR_C_250dps;
+      break;
+
+    case LSM6DS3TR_C_125dps:
+      *val = LSM6DS3TR_C_125dps;
+      break;
+
+    case LSM6DS3TR_C_500dps:
+      *val = LSM6DS3TR_C_500dps;
+      break;
+
+    case LSM6DS3TR_C_1000dps:
+      *val = LSM6DS3TR_C_1000dps;
+      break;
+
+    case LSM6DS3TR_C_2000dps:
+      *val = LSM6DS3TR_C_2000dps;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_GY_FS_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope data rate selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of odr_g in reg CTRL2_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_data_rate_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_g_t val)
+{
+  lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G,
+                             (uint8_t *)&ctrl2_g, 1);
+
+  if (ret == 0)
+  {
+    ctrl2_g.odr_g = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL2_G,
+                                (uint8_t *)&ctrl2_g, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope data rate selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of odr_g in reg CTRL2_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_data_rate_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_g_t *val)
+{
+  lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G,
+                             (uint8_t *)&ctrl2_g, 1);
+
+  switch (ctrl2_g.odr_g)
+  {
+    case LSM6DS3TR_C_GY_ODR_OFF:
+      *val = LSM6DS3TR_C_GY_ODR_OFF;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_12Hz5:
+      *val = LSM6DS3TR_C_GY_ODR_12Hz5;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_26Hz:
+      *val = LSM6DS3TR_C_GY_ODR_26Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_52Hz:
+      *val = LSM6DS3TR_C_GY_ODR_52Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_104Hz:
+      *val = LSM6DS3TR_C_GY_ODR_104Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_208Hz:
+      *val = LSM6DS3TR_C_GY_ODR_208Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_416Hz:
+      *val = LSM6DS3TR_C_GY_ODR_416Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_833Hz:
+      *val = LSM6DS3TR_C_GY_ODR_833Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_1k66Hz:
+      *val = LSM6DS3TR_C_GY_ODR_1k66Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_3k33Hz:
+      *val = LSM6DS3TR_C_GY_ODR_3k33Hz;
+      break;
+
+    case LSM6DS3TR_C_GY_ODR_6k66Hz:
+      *val = LSM6DS3TR_C_GY_ODR_6k66Hz;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_GY_ODR_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Block data update.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of bdu in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_block_data_update_set(const stmdev_ctx_t *ctx,
+                                          uint8_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.bdu = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Block data update.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of bdu in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_block_data_update_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+  *val = ctrl3_c.bdu;
+
+  return ret;
+}
+
+/**
+  * @brief  Weight of XL user offset bits of registers
+  *         X_OFS_USR(73h), Y_OFS_USR(74h), Z_OFS_USR(75h).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of usr_off_w in reg CTRL6_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_offset_weight_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_usr_off_w_t val)
+{
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl6_c.usr_off_w = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                                (uint8_t *)&ctrl6_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Weight of XL user offset bits of registers
+  *         X_OFS_USR(73h), Y_OFS_USR(74h), Z_OFS_USR(75h).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of usr_off_w in reg CTRL6_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_offset_weight_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_usr_off_w_t *val)
+{
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  switch (ctrl6_c.usr_off_w)
+  {
+    case LSM6DS3TR_C_LSb_1mg:
+      *val = LSM6DS3TR_C_LSb_1mg;
+      break;
+
+    case LSM6DS3TR_C_LSb_16mg:
+      *val = LSM6DS3TR_C_LSb_16mg;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_WEIGHT_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  High-performance operating mode for accelerometer[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of xl_hm_mode in reg CTRL6_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_power_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_xl_hm_mode_t val)
+{
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl6_c.xl_hm_mode = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                                (uint8_t *)&ctrl6_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  High-performance operating mode for accelerometer.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of xl_hm_mode in reg CTRL6_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_power_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_xl_hm_mode_t *val)
+{
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  switch (ctrl6_c.xl_hm_mode)
+  {
+    case LSM6DS3TR_C_XL_HIGH_PERFORMANCE:
+      *val = LSM6DS3TR_C_XL_HIGH_PERFORMANCE;
+      break;
+
+    case LSM6DS3TR_C_XL_NORMAL:
+      *val = LSM6DS3TR_C_XL_NORMAL;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_XL_PW_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Source register rounding function on WAKE_UP_SRC (1Bh),
+  *         TAP_SRC (1Ch), D6D_SRC (1Dh), STATUS_REG (1Eh) and
+  *         FUNC_SRC1 (53h) registers in the primary interface.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of rounding_status in reg CTRL7_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_rounding_on_status_set(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rounding_status_t val)
+{
+  lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                             (uint8_t *)&ctrl7_g, 1);
+
+  if (ret == 0)
+  {
+    ctrl7_g.rounding_status = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                                (uint8_t *)&ctrl7_g, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Source register rounding function on WAKE_UP_SRC (1Bh),
+  *         TAP_SRC (1Ch), D6D_SRC (1Dh), STATUS_REG (1Eh) and
+  *         FUNC_SRC1 (53h) registers in the primary interface.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of rounding_status in reg CTRL7_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_rounding_on_status_get(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rounding_status_t *val)
+{
+  lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                             (uint8_t *)&ctrl7_g, 1);
+
+  switch (ctrl7_g.rounding_status)
+  {
+    case LSM6DS3TR_C_STAT_RND_DISABLE:
+      *val = LSM6DS3TR_C_STAT_RND_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_STAT_RND_ENABLE:
+      *val = LSM6DS3TR_C_STAT_RND_ENABLE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_STAT_RND_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  High-performance operating mode disable for gyroscope.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of g_hm_mode in reg CTRL7_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_power_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_g_hm_mode_t val)
+{
+  lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                             (uint8_t *)&ctrl7_g, 1);
+
+  if (ret == 0)
+  {
+    ctrl7_g.g_hm_mode = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                                (uint8_t *)&ctrl7_g, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  High-performance operating mode disable for gyroscope.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of g_hm_mode in reg CTRL7_G
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_power_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_g_hm_mode_t *val)
+{
+  lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                             (uint8_t *)&ctrl7_g, 1);
+
+  switch (ctrl7_g.g_hm_mode)
+  {
+    case LSM6DS3TR_C_GY_HIGH_PERFORMANCE:
+      *val = LSM6DS3TR_C_GY_HIGH_PERFORMANCE;
+      break;
+
+    case LSM6DS3TR_C_GY_NORMAL:
+      *val = LSM6DS3TR_C_GY_NORMAL;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_GY_PW_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Read all the interrupt/status flag of the device.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    WAKE_UP_SRC, TAP_SRC, D6D_SRC, STATUS_REG,
+  *                FUNC_SRC1, FUNC_SRC2, WRIST_TILT_IA, A_WRIST_TILT_Mask
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_all_sources_get(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_all_sources_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_SRC,
+                             (uint8_t *) & (val->wake_up_src), 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_SRC,
+                               (uint8_t *) & (val->tap_src), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_D6D_SRC,
+                               (uint8_t *) & (val->d6d_src), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG,
+                               (uint8_t *) & (val->status_reg), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_SRC1,
+                               (uint8_t *) & (val->func_src1), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_SRC2,
+                               (uint8_t *) & (val->func_src2), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WRIST_TILT_IA,
+                               (uint8_t *) & (val->wrist_tilt_ia), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_MASK,
+                               (uint8_t *) & (val->a_wrist_tilt_mask), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+  }
+
+  return ret;
+}
+/**
+  * @brief  The STATUS_REG register is read by the primary interface[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Registers STATUS_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_status_reg_get(const stmdev_ctx_t *ctx,
+                                   lsm6ds3tr_c_status_reg_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG,
+                             (uint8_t *) val, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer new data available.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of xlda in reg STATUS_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_flag_data_ready_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6ds3tr_c_status_reg_t status_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG,
+                             (uint8_t *)&status_reg, 1);
+  *val = status_reg.xlda;
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope new data available.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of gda in reg STATUS_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_flag_data_ready_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6ds3tr_c_status_reg_t status_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG,
+                             (uint8_t *)&status_reg, 1);
+  *val = status_reg.gda;
+
+  return ret;
+}
+
+/**
+  * @brief  Temperature new data available.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tda in reg STATUS_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_temp_flag_data_ready_get(const stmdev_ctx_t *ctx,
+                                             uint8_t *val)
+{
+  lsm6ds3tr_c_status_reg_t status_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG,
+                             (uint8_t *)&status_reg, 1);
+  *val = status_reg.tda;
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer axis user offset correction expressed in two’s
+  *         complement, weight depends on USR_OFF_W in CTRL6_C.
+  *         The value must be in the range [-127 127].[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that contains data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_usr_offset_set(const stmdev_ctx_t *ctx,
+                                      uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_X_OFS_USR, buff, 3);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer axis user offset correction xpressed in two’s
+  *         complement, weight depends on USR_OFF_W in CTRL6_C.
+  *         The value must be in the range [-127 127].[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_usr_offset_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_X_OFS_USR, buff, 3);
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Timestamp
+  * @brief       This section groups all the functions that manage the
+  *              timestamp generation.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable timestamp count. The count is saved in TIMESTAMP0_REG (40h),
+  *         TIMESTAMP1_REG (41h) and TIMESTAMP2_REG (42h).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of timer_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_timestamp_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.timer_en = val;
+
+    if (val != 0x00U)
+    {
+      ctrl10_c.func_en = val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                  (uint8_t *)&ctrl10_c, 1);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable timestamp count. The count is saved in TIMESTAMP0_REG (40h),
+  *         TIMESTAMP1_REG (41h) and TIMESTAMP2_REG (42h).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of timer_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_timestamp_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+  *val = ctrl10_c.timer_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Timestamp register resolution setting.
+  *         Configuration of this bit affects
+  *         TIMESTAMP0_REG(40h), TIMESTAMP1_REG(41h),
+  *         TIMESTAMP2_REG(42h), STEP_TIMESTAMP_L(49h),
+  *         STEP_TIMESTAMP_H(4Ah) and
+  *         STEP_COUNT_DELTA(15h) registers.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of timer_hr in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_timestamp_res_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_timer_hr_t val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+
+  if (ret == 0)
+  {
+    wake_up_dur.timer_hr = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                                (uint8_t *)&wake_up_dur, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Timestamp register resolution setting.
+  *         Configuration of this bit affects
+  *         TIMESTAMP0_REG(40h), TIMESTAMP1_REG(41h),
+  *         TIMESTAMP2_REG(42h), STEP_TIMESTAMP_L(49h),
+  *         STEP_TIMESTAMP_H(4Ah) and
+  *         STEP_COUNT_DELTA(15h) registers.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of timer_hr in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_timestamp_res_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_timer_hr_t *val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+
+  switch (wake_up_dur.timer_hr)
+  {
+    case LSM6DS3TR_C_LSB_6ms4:
+      *val = LSM6DS3TR_C_LSB_6ms4;
+      break;
+
+    case LSM6DS3TR_C_LSB_25us:
+      *val = LSM6DS3TR_C_LSB_25us;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_TS_RES_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Dataoutput
+  * @brief       This section groups all the data output functions.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Circular burst-mode (rounding) read from output registers
+  *         through the primary interface.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of rounding in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_rounding_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_rounding_t val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl5_c.rounding = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                                (uint8_t *)&ctrl5_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Circular burst-mode (rounding) read from output registers
+  *         through the primary interface.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of rounding in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_rounding_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_rounding_t *val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  switch (ctrl5_c.rounding)
+  {
+    case LSM6DS3TR_C_ROUND_DISABLE:
+      *val = LSM6DS3TR_C_ROUND_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_ROUND_XL:
+      *val = LSM6DS3TR_C_ROUND_XL;
+      break;
+
+    case LSM6DS3TR_C_ROUND_GY:
+      *val = LSM6DS3TR_C_ROUND_GY;
+      break;
+
+    case LSM6DS3TR_C_ROUND_GY_XL:
+      *val = LSM6DS3TR_C_ROUND_GY_XL;
+      break;
+
+    case LSM6DS3TR_C_ROUND_SH1_TO_SH6:
+      *val = LSM6DS3TR_C_ROUND_SH1_TO_SH6;
+      break;
+
+    case LSM6DS3TR_C_ROUND_XL_SH1_TO_SH6:
+      *val = LSM6DS3TR_C_ROUND_XL_SH1_TO_SH6;
+      break;
+
+    case LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH12:
+      *val = LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH12;
+      break;
+
+    case LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH6:
+      *val = LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH6;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_ROUND_OUT_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Temperature data output register (r). L and H registers together
+  *         express a 16-bit word in two’s complement.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_temperature_raw_get(const stmdev_ctx_t *ctx,
+                                        int16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUT_TEMP_L, buff, 2);
+  *val = (int16_t)buff[1];
+  *val = (*val * 256) + (int16_t)buff[0];
+
+  return ret;
+}
+
+/**
+  * @brief  Angular rate sensor. The value is expressed as a 16-bit word in
+  *         two’s complement.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_angular_rate_raw_get(const stmdev_ctx_t *ctx,
+                                         int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUTX_L_G, buff, 6);
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+  val[1] = (int16_t)buff[3];
+  val[1] = (val[1] * 256) + (int16_t)buff[2];
+  val[2] = (int16_t)buff[5];
+  val[2] = (val[2] * 256) + (int16_t)buff[4];
+
+  return ret;
+}
+
+/**
+  * @brief  Linear acceleration output register. The value is expressed
+  *         as a 16-bit word in two’s complement.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_acceleration_raw_get(const stmdev_ctx_t *ctx,
+                                         int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUTX_L_XL, buff, 6);
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+  val[1] = (int16_t)buff[3];
+  val[1] = (val[1] * 256) + (int16_t)buff[2];
+  val[2] = (int16_t)buff[5];
+  val[2] = (val[2] * 256) + (int16_t)buff[4];
+
+  return ret;
+}
+
+/**
+  * @brief  External magnetometer raw data.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_calibrated_raw_get(const stmdev_ctx_t *ctx,
+                                           int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUT_MAG_RAW_X_L, buff, 6);
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+  val[1] = (int16_t)buff[3];
+  val[1] = (val[1] * 256) + (int16_t)buff[2];
+  val[2] = (int16_t)buff[5];
+  val[2] = (val[2] * 256) + (int16_t)buff[4];
+
+  return ret;
+}
+
+/**
+  * @brief  Read data in FIFO.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buffer Data buffer to store FIFO data.
+  * @param  len    Number of data to read from FIFO.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_raw_data_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *buffer,
+                                      uint8_t len)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_DATA_OUT_L, buffer,
+                             len);
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_common
+  * @brief       This section groups common useful functions.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable access to the embedded functions/sensor hub
+  *         configuration registers[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of func_cfg_en in reg FUNC_CFG_ACCESS
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mem_bank_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_func_cfg_en_t val)
+{
+  lsm6ds3tr_c_func_cfg_access_t func_cfg_access;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_CFG_ACCESS,
+                             (uint8_t *)&func_cfg_access, 1);
+
+  if (ret == 0)
+  {
+    func_cfg_access.func_cfg_en = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FUNC_CFG_ACCESS,
+                                (uint8_t *)&func_cfg_access, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable access to the embedded functions/sensor hub configuration
+  *         registers[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of func_cfg_en in reg FUNC_CFG_ACCESS
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mem_bank_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_func_cfg_en_t *val)
+{
+  lsm6ds3tr_c_func_cfg_access_t func_cfg_access;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_CFG_ACCESS,
+                             (uint8_t *)&func_cfg_access, 1);
+
+  switch (func_cfg_access.func_cfg_en)
+  {
+    case LSM6DS3TR_C_USER_BANK:
+      *val = LSM6DS3TR_C_USER_BANK;
+      break;
+
+    case LSM6DS3TR_C_BANK_B:
+      *val = LSM6DS3TR_C_BANK_B;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_BANK_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Data-ready pulsed / letched mode[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of drdy_pulsed in reg DRDY_PULSE_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_data_ready_mode_set(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_drdy_pulsed_g_t val)
+{
+  lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G,
+                             (uint8_t *)&drdy_pulse_cfg_g, 1);
+
+  if (ret == 0)
+  {
+    drdy_pulse_cfg_g.drdy_pulsed = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G,
+                                (uint8_t *)&drdy_pulse_cfg_g, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Data-ready pulsed / letched mode[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of drdy_pulsed in reg DRDY_PULSE_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_data_ready_mode_get(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_drdy_pulsed_g_t *val)
+{
+  lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G,
+                             (uint8_t *)&drdy_pulse_cfg_g, 1);
+
+  switch (drdy_pulse_cfg_g.drdy_pulsed)
+  {
+    case LSM6DS3TR_C_DRDY_LATCHED:
+      *val = LSM6DS3TR_C_DRDY_LATCHED;
+      break;
+
+    case LSM6DS3TR_C_DRDY_PULSED:
+      *val = LSM6DS3TR_C_DRDY_PULSED;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_DRDY_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DeviceWhoamI.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WHO_AM_I, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Software reset. Restore the default values in user registers[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sw_reset in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_reset_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.sw_reset = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Software reset. Restore the default values in user registers[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sw_reset in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_reset_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+  *val = ctrl3_c.sw_reset;
+
+  return ret;
+}
+
+/**
+  * @brief  Big/Little Endian Data selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of ble in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_data_format_set(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_ble_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.ble = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Big/Little Endian Data selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of ble in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_data_format_get(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_ble_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  switch (ctrl3_c.ble)
+  {
+    case LSM6DS3TR_C_LSB_AT_LOW_ADD:
+      *val = LSM6DS3TR_C_LSB_AT_LOW_ADD;
+      break;
+
+    case LSM6DS3TR_C_MSB_AT_LOW_ADD:
+      *val = LSM6DS3TR_C_MSB_AT_LOW_ADD;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_DATA_FMT_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Register address automatically incremented during a multiple byte
+  *         access with a serial interface.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of if_inc in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_auto_increment_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.if_inc = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Register address automatically incremented during a multiple byte
+  *         access with a serial interface.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of if_inc in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_auto_increment_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+  *val = ctrl3_c.if_inc;
+
+  return ret;
+}
+
+/**
+  * @brief  Reboot memory content. Reload the calibration parameters.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of boot in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_boot_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.boot = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Reboot memory content. Reload the calibration parameters.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of boot in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_boot_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+  *val = ctrl3_c.boot;
+
+  return ret;
+}
+
+/**
+  * @brief  Linear acceleration sensor self-test enable.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of st_xl in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_self_test_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_xl_t val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl5_c.st_xl = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                                (uint8_t *)&ctrl5_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Linear acceleration sensor self-test enable.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of st_xl in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_self_test_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_xl_t *val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  switch (ctrl5_c.st_xl)
+  {
+    case LSM6DS3TR_C_XL_ST_DISABLE:
+      *val = LSM6DS3TR_C_XL_ST_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_XL_ST_POSITIVE:
+      *val = LSM6DS3TR_C_XL_ST_POSITIVE;
+      break;
+
+    case LSM6DS3TR_C_XL_ST_NEGATIVE:
+      *val = LSM6DS3TR_C_XL_ST_NEGATIVE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_XL_ST_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Angular rate sensor self-test enable.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of st_g in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_self_test_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_g_t val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl5_c.st_g = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                                (uint8_t *)&ctrl5_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Angular rate sensor self-test enable.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of st_g in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_self_test_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_g_t *val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  switch (ctrl5_c.st_g)
+  {
+    case LSM6DS3TR_C_GY_ST_DISABLE:
+      *val = LSM6DS3TR_C_GY_ST_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_GY_ST_POSITIVE:
+      *val = LSM6DS3TR_C_GY_ST_POSITIVE;
+      break;
+
+    case LSM6DS3TR_C_GY_ST_NEGATIVE:
+      *val = LSM6DS3TR_C_GY_ST_NEGATIVE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_GY_ST_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_filters
+  * @brief       This section group all the functions concerning the filters
+  *              configuration that impact both accelerometer and gyro.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Mask DRDY on pin (both XL & Gyro) until filter settling ends
+  *         (XL and Gyro independently masked).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of drdy_mask in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_filter_settling_mask_set(const stmdev_ctx_t *ctx,
+                                             uint8_t val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl4_c.drdy_mask = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                (uint8_t *)&ctrl4_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Mask DRDY on pin (both XL & Gyro) until filter settling ends
+  *         (XL and Gyro independently masked).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of drdy_mask in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_filter_settling_mask_get(const stmdev_ctx_t *ctx,
+                                             uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+  *val = ctrl4_c.drdy_mask;
+
+  return ret;
+}
+
+/**
+  * @brief  HPF or SLOPE filter selection on wake-up and Activity/Inactivity
+  *         functions.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of slope_fds in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_hp_path_internal_set(const stmdev_ctx_t *ctx,
+                                            lsm6ds3tr_c_slope_fds_t val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg.slope_fds = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  HPF or SLOPE filter selection on wake-up and Activity/Inactivity
+  *         functions.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of slope_fds in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_hp_path_internal_get(const stmdev_ctx_t *ctx,
+                                            lsm6ds3tr_c_slope_fds_t *val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  switch (tap_cfg.slope_fds)
+  {
+    case LSM6DS3TR_C_USE_SLOPE:
+      *val = LSM6DS3TR_C_USE_SLOPE;
+      break;
+
+    case LSM6DS3TR_C_USE_HPF:
+      *val = LSM6DS3TR_C_USE_HPF;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_HP_PATH_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_accelerometer_filters
+  * @brief       This section group all the functions concerning the filters
+  *              configuration that impact accelerometer in every mode.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Accelerometer analog chain bandwidth selection (only for
+  *         accelerometer ODR ≥ 1.67 kHz).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of bw0_xl in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_filter_analog_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_bw0_xl_t val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl1_xl.bw0_xl = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                                (uint8_t *)&ctrl1_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer analog chain bandwidth selection (only for
+  *         accelerometer ODR ≥ 1.67 kHz).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of bw0_xl in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_filter_analog_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_bw0_xl_t *val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  switch (ctrl1_xl.bw0_xl)
+  {
+    case LSM6DS3TR_C_XL_ANA_BW_1k5Hz:
+      *val = LSM6DS3TR_C_XL_ANA_BW_1k5Hz;
+      break;
+
+    case LSM6DS3TR_C_XL_ANA_BW_400Hz:
+      *val = LSM6DS3TR_C_XL_ANA_BW_400Hz;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_XL_ANA_BW_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_accelerometer_filters
+  * @brief       This section group all the functions concerning the filters
+  *              configuration that impact accelerometer.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Accelerometer digital LPF (LPF1) bandwidth selection LPF2 is
+  *         not used.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of lpf1_bw_sel in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_lp1_bandwidth_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lpf1_bw_sel_t val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                             (uint8_t *)&ctrl1_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl1_xl.lpf1_bw_sel = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                                (uint8_t *)&ctrl1_xl, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                                 (uint8_t *)&ctrl8_xl, 1);
+
+      if (ret == 0)
+      {
+        ctrl8_xl.lpf2_xl_en = 0;
+        ctrl8_xl.hp_slope_xl_en = 0;
+        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                                    (uint8_t *)&ctrl8_xl, 1);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer digital LPF (LPF1) bandwidth selection LPF2
+  *         is not used.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of lpf1_bw_sel in reg CTRL1_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_lp1_bandwidth_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lpf1_bw_sel_t *val)
+{
+  lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ret == 0)
+  {
+    if ((ctrl8_xl.lpf2_xl_en != 0x00U) ||
+        (ctrl8_xl.hp_slope_xl_en != 0x00U))
+    {
+      *val = LSM6DS3TR_C_XL_LP1_NA;
+    }
+
+    else
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL,
+                                 (uint8_t *)&ctrl1_xl, 1);
+
+      switch (ctrl1_xl.lpf1_bw_sel)
+      {
+        case LSM6DS3TR_C_XL_LP1_ODR_DIV_2:
+          *val = LSM6DS3TR_C_XL_LP1_ODR_DIV_2;
+          break;
+
+        case LSM6DS3TR_C_XL_LP1_ODR_DIV_4:
+          *val = LSM6DS3TR_C_XL_LP1_ODR_DIV_4;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_XL_LP1_NA;
+          break;
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  LPF2 on outputs[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of input_composite in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_lp2_bandwidth_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_input_composite_t val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl8_xl.input_composite = ((uint8_t) val & 0x10U) >> 4;
+    ctrl8_xl.hpcf_xl = (uint8_t) val & 0x03U;
+    ctrl8_xl.lpf2_xl_en = 1;
+    ctrl8_xl.hp_slope_xl_en = 0;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                                (uint8_t *)&ctrl8_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  LPF2 on outputs[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of input_composite in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_lp2_bandwidth_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_input_composite_t *val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ret == 0)
+  {
+    if ((ctrl8_xl.lpf2_xl_en == 0x00U) ||
+        (ctrl8_xl.hp_slope_xl_en != 0x00U))
+    {
+      *val = LSM6DS3TR_C_XL_LP_NA;
+    }
+
+    else
+    {
+      switch ((ctrl8_xl.input_composite << 4) + ctrl8_xl.hpcf_xl)
+      {
+        case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_50:
+          *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_50;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_100:
+          *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_100;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_9:
+          *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_9;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_400:
+          *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_400;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_50:
+          *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_50;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_100:
+          *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_100;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_9:
+          *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_9;
+          break;
+
+        case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_400:
+          *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_400;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_XL_LP_NA;
+          break;
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable HP filter reference mode.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of hp_ref_mode in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_reference_mode_set(const stmdev_ctx_t *ctx,
+                                          uint8_t val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl8_xl.hp_ref_mode = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                                (uint8_t *)&ctrl8_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable HP filter reference mode.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of hp_ref_mode in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_reference_mode_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+  *val = ctrl8_xl.hp_ref_mode;
+
+  return ret;
+}
+
+/**
+  * @brief  High pass/Slope on outputs.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of hpcf_xl in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_hp_bandwidth_set(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_hpcf_xl_t val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl8_xl.input_composite = 0;
+    ctrl8_xl.hpcf_xl = (uint8_t)val & 0x03U;
+    ctrl8_xl.hp_slope_xl_en = 1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                                (uint8_t *)&ctrl8_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  High pass/Slope on outputs.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of hpcf_xl in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_xl_hp_bandwidth_get(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_hpcf_xl_t *val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ctrl8_xl.hp_slope_xl_en == 0x00U)
+  {
+    *val = LSM6DS3TR_C_XL_HP_NA;
+  }
+
+  switch (ctrl8_xl.hpcf_xl)
+  {
+    case LSM6DS3TR_C_XL_HP_ODR_DIV_4:
+      *val = LSM6DS3TR_C_XL_HP_ODR_DIV_4;
+      break;
+
+    case LSM6DS3TR_C_XL_HP_ODR_DIV_100:
+      *val = LSM6DS3TR_C_XL_HP_ODR_DIV_100;
+      break;
+
+    case LSM6DS3TR_C_XL_HP_ODR_DIV_9:
+      *val = LSM6DS3TR_C_XL_HP_ODR_DIV_9;
+      break;
+
+    case LSM6DS3TR_C_XL_HP_ODR_DIV_400:
+      *val = LSM6DS3TR_C_XL_HP_ODR_DIV_400;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_XL_HP_NA;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_gyroscope_filters
+  * @brief       This section group all the functions concerning the filters
+  *              configuration that impact gyroscope.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Gyroscope low pass path bandwidth.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    gyroscope filtering chain configuration.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_band_pass_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_lpf1_sel_g_t val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                             (uint8_t *)&ctrl7_g, 1);
+
+  if (ret == 0)
+  {
+    ctrl7_g.hpm_g  = ((uint8_t)val & 0x30U) >> 4;
+    ctrl7_g.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                                (uint8_t *)&ctrl7_g, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                                 (uint8_t *)&ctrl6_c, 1);
+
+      if (ret == 0)
+      {
+        ctrl6_c.ftype = (uint8_t)val & 0x03U;
+        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                                    (uint8_t *)&ctrl6_c, 1);
+
+        if (ret == 0)
+        {
+          ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                     (uint8_t *)&ctrl4_c, 1);
+
+          if (ret == 0)
+          {
+            ctrl4_c.lpf1_sel_g = ((uint8_t)val & 0x08U) >> 3;
+            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                        (uint8_t *)&ctrl4_c, 1);
+          }
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope low pass path bandwidth.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    gyroscope filtering chain
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_band_pass_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_lpf1_sel_g_t *val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                               (uint8_t *)&ctrl4_c, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G,
+                                 (uint8_t *)&ctrl7_g, 1);
+
+      switch ((ctrl7_g.hp_en_g << 7) + (ctrl7_g.hpm_g << 4) +
+              (ctrl4_c.lpf1_sel_g << 3) + ctrl6_c.ftype)
+      {
+        case LSM6DS3TR_C_HP_16mHz_LP2:
+          *val = LSM6DS3TR_C_HP_16mHz_LP2;
+          break;
+
+        case LSM6DS3TR_C_HP_65mHz_LP2:
+          *val = LSM6DS3TR_C_HP_65mHz_LP2;
+          break;
+
+        case LSM6DS3TR_C_HP_260mHz_LP2:
+          *val = LSM6DS3TR_C_HP_260mHz_LP2;
+          break;
+
+        case LSM6DS3TR_C_HP_1Hz04_LP2:
+          *val = LSM6DS3TR_C_HP_1Hz04_LP2;
+          break;
+
+        case LSM6DS3TR_C_HP_DISABLE_LP1_LIGHT:
+          *val = LSM6DS3TR_C_HP_DISABLE_LP1_LIGHT;
+          break;
+
+        case LSM6DS3TR_C_HP_DISABLE_LP1_NORMAL:
+          *val = LSM6DS3TR_C_HP_DISABLE_LP1_NORMAL;
+          break;
+
+        case LSM6DS3TR_C_HP_DISABLE_LP_STRONG:
+          *val = LSM6DS3TR_C_HP_DISABLE_LP_STRONG;
+          break;
+
+        case LSM6DS3TR_C_HP_DISABLE_LP1_AGGRESSIVE:
+          *val = LSM6DS3TR_C_HP_DISABLE_LP1_AGGRESSIVE;
+          break;
+
+        case LSM6DS3TR_C_HP_16mHz_LP1_LIGHT:
+          *val = LSM6DS3TR_C_HP_16mHz_LP1_LIGHT;
+          break;
+
+        case LSM6DS3TR_C_HP_65mHz_LP1_NORMAL:
+          *val = LSM6DS3TR_C_HP_65mHz_LP1_NORMAL;
+          break;
+
+        case LSM6DS3TR_C_HP_260mHz_LP1_STRONG:
+          *val = LSM6DS3TR_C_HP_260mHz_LP1_STRONG;
+          break;
+
+        case LSM6DS3TR_C_HP_1Hz04_LP1_AGGRESSIVE:
+          *val = LSM6DS3TR_C_HP_1Hz04_LP1_AGGRESSIVE;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_HP_GY_BAND_NA;
+          break;
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_serial_interface
+  * @brief       This section groups all the functions concerning serial
+  *              interface management
+  * @{
+  *
+  */
+
+/**
+  * @brief  SPI Serial Interface Mode selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sim in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_spi_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_sim_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.sim = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  SPI Serial Interface Mode selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of sim in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_spi_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_sim_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  switch (ctrl3_c.sim)
+  {
+    case LSM6DS3TR_C_SPI_4_WIRE:
+      *val = LSM6DS3TR_C_SPI_4_WIRE;
+      break;
+
+    case LSM6DS3TR_C_SPI_3_WIRE:
+      *val = LSM6DS3TR_C_SPI_3_WIRE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_SPI_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable / Enable I2C interface.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of i2c_disable in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_i2c_interface_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_i2c_disable_t val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl4_c.i2c_disable = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                (uint8_t *)&ctrl4_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable / Enable I2C interface.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of i2c_disable in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_i2c_interface_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_i2c_disable_t *val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+
+  switch (ctrl4_c.i2c_disable)
+  {
+    case LSM6DS3TR_C_I2C_ENABLE:
+      *val = LSM6DS3TR_C_I2C_ENABLE;
+      break;
+
+    case LSM6DS3TR_C_I2C_DISABLE:
+      *val = LSM6DS3TR_C_I2C_DISABLE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_I2C_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_interrupt_pins
+  * @brief       This section groups all the functions that manage
+  *              interrupt pins
+  * @{
+  *
+  */
+
+/**
+  * @brief  Select the signal that need to route on int1 pad[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    configure INT1_CTRL, MD1_CFG, CTRL4_C(den_drdy_int1),
+  *                MASTER_CONFIG(drdy_on_int1)
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_int1_route_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int1_route_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  lsm6ds3tr_c_int1_ctrl_t int1_ctrl;
+  lsm6ds3tr_c_md1_cfg_t md1_cfg;
+  lsm6ds3tr_c_md2_cfg_t md2_cfg;
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT1_CTRL,
+                             (uint8_t *)&int1_ctrl, 1);
+
+  if (ret == 0)
+  {
+    int1_ctrl.int1_drdy_xl        = val.int1_drdy_xl;
+    int1_ctrl.int1_drdy_g         = val.int1_drdy_g;
+    int1_ctrl.int1_boot           = val.int1_boot;
+    int1_ctrl.int1_fth            = val.int1_fth;
+    int1_ctrl.int1_fifo_ovr       = val.int1_fifo_ovr;
+    int1_ctrl.int1_full_flag      = val.int1_full_flag;
+    int1_ctrl.int1_sign_mot       = val.int1_sign_mot;
+    int1_ctrl.int1_step_detector  = val.int1_step_detector;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT1_CTRL,
+                                (uint8_t *)&int1_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD1_CFG,
+                               (uint8_t *)&md1_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD2_CFG,
+                               (uint8_t *)&md2_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    md1_cfg.int1_timer           = val.int1_timer;
+    md1_cfg.int1_tilt            = val.int1_tilt;
+    md1_cfg.int1_6d              = val.int1_6d;
+    md1_cfg.int1_double_tap      = val.int1_double_tap;
+    md1_cfg.int1_ff              = val.int1_ff;
+    md1_cfg.int1_wu              = val.int1_wu;
+    md1_cfg.int1_single_tap      = val.int1_single_tap;
+    md1_cfg.int1_inact_state     = val.int1_inact_state;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MD1_CFG,
+                                (uint8_t *)&md1_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                               (uint8_t *)&ctrl4_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ctrl4_c.den_drdy_int1 = val.den_drdy_int1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                (uint8_t *)&ctrl4_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                               (uint8_t *)&master_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    master_config.drdy_on_int1   = val.den_drdy_int1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                               (uint8_t *)&tap_cfg, 1);
+
+    if ((val.int1_6d != 0x00U) ||
+        (val.int1_ff != 0x00U) ||
+        (val.int1_wu != 0x00U) ||
+        (val.int1_single_tap != 0x00U) ||
+        (val.int1_double_tap != 0x00U) ||
+        (val.int1_inact_state != 0x00U) ||
+        (md2_cfg.int2_6d != 0x00U) ||
+        (md2_cfg.int2_ff != 0x00U) ||
+        (md2_cfg.int2_wu != 0x00U) ||
+        (md2_cfg.int2_single_tap != 0x00U) ||
+        (md2_cfg.int2_double_tap != 0x00U) ||
+        (md2_cfg.int2_inact_state != 0x00U))
+    {
+      tap_cfg.interrupts_enable = PROPERTY_ENABLE;
+    }
+
+    else
+    {
+      tap_cfg.interrupts_enable = PROPERTY_DISABLE;
+    }
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Select the signal that need to route on int1 pad[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    read INT1_CTRL, MD1_CFG, CTRL4_C(den_drdy_int1),
+  *                MASTER_CONFIG(drdy_on_int1)
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_int1_route_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int1_route_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  lsm6ds3tr_c_int1_ctrl_t int1_ctrl;
+  lsm6ds3tr_c_md1_cfg_t md1_cfg;
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT1_CTRL,
+                             (uint8_t *)&int1_ctrl, 1);
+
+  if (ret == 0)
+  {
+    val->int1_drdy_xl       = int1_ctrl.int1_drdy_xl;
+    val->int1_drdy_g        = int1_ctrl.int1_drdy_g;
+    val->int1_boot          = int1_ctrl.int1_boot;
+    val->int1_fth           = int1_ctrl.int1_fth;
+    val->int1_fifo_ovr      = int1_ctrl.int1_fifo_ovr;
+    val->int1_full_flag     = int1_ctrl.int1_full_flag;
+    val->int1_sign_mot      = int1_ctrl.int1_sign_mot;
+    val->int1_step_detector = int1_ctrl.int1_step_detector ;
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD1_CFG,
+                               (uint8_t *)&md1_cfg, 1);
+
+    if (ret == 0)
+    {
+      val->int1_timer       = md1_cfg.int1_timer;
+      val->int1_tilt        = md1_cfg.int1_tilt;
+      val->int1_6d          = md1_cfg.int1_6d;
+      val->int1_double_tap  = md1_cfg.int1_double_tap;
+      val->int1_ff          = md1_cfg.int1_ff;
+      val->int1_wu          = md1_cfg.int1_wu;
+      val->int1_single_tap  = md1_cfg.int1_single_tap;
+      val->int1_inact_state = md1_cfg.int1_inact_state;
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                 (uint8_t *)&ctrl4_c, 1);
+
+      if (ret == 0)
+      {
+        val->den_drdy_int1 = ctrl4_c.den_drdy_int1;
+        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                   (uint8_t *)&master_config, 1);
+        val->den_drdy_int1 = master_config.drdy_on_int1;
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Select the signal that need to route on int2 pad[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    INT2_CTRL, DRDY_PULSE_CFG(int2_wrist_tilt), MD2_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_int2_route_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int2_route_t val)
+{
+  lsm6ds3tr_c_int2_ctrl_t int2_ctrl;
+  lsm6ds3tr_c_md1_cfg_t md1_cfg;
+  lsm6ds3tr_c_md2_cfg_t md2_cfg;
+  lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT2_CTRL,
+                             (uint8_t *)&int2_ctrl, 1);
+
+  if (ret == 0)
+  {
+    int2_ctrl.int2_drdy_xl        = val.int2_drdy_xl;
+    int2_ctrl.int2_drdy_g         = val.int2_drdy_g;
+    int2_ctrl.int2_drdy_temp      = val.int2_drdy_temp;
+    int2_ctrl.int2_fth            = val.int2_fth;
+    int2_ctrl.int2_fifo_ovr       = val.int2_fifo_ovr;
+    int2_ctrl.int2_full_flag      = val.int2_full_flag;
+    int2_ctrl.int2_step_count_ov  = val.int2_step_count_ov;
+    int2_ctrl.int2_step_delta     = val.int2_step_delta;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT2_CTRL,
+                                (uint8_t *)&int2_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD1_CFG,
+                               (uint8_t *)&md1_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD2_CFG,
+                               (uint8_t *)&md2_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    md2_cfg.int2_iron              = val.int2_iron;
+    md2_cfg.int2_tilt              = val.int2_tilt;
+    md2_cfg.int2_6d                = val.int2_6d;
+    md2_cfg.int2_double_tap        = val.int2_double_tap;
+    md2_cfg.int2_ff                = val.int2_ff;
+    md2_cfg.int2_wu                = val.int2_wu;
+    md2_cfg.int2_single_tap        = val.int2_single_tap;
+    md2_cfg.int2_inact_state       = val.int2_inact_state;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MD2_CFG,
+                                (uint8_t *)&md2_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G,
+                               (uint8_t *)&drdy_pulse_cfg_g, 1);
+  }
+
+  if (ret == 0)
+  {
+    drdy_pulse_cfg_g.int2_wrist_tilt = val.int2_wrist_tilt;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G,
+                                (uint8_t *)&drdy_pulse_cfg_g, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                               (uint8_t *)&tap_cfg, 1);
+
+    if ((md1_cfg.int1_6d != 0x00U) ||
+        (md1_cfg.int1_ff != 0x00U) ||
+        (md1_cfg.int1_wu != 0x00U) ||
+        (md1_cfg.int1_single_tap != 0x00U) ||
+        (md1_cfg.int1_double_tap != 0x00U) ||
+        (md1_cfg.int1_inact_state != 0x00U) ||
+        (val.int2_6d != 0x00U) ||
+        (val.int2_ff != 0x00U) ||
+        (val.int2_wu != 0x00U) ||
+        (val.int2_single_tap != 0x00U) ||
+        (val.int2_double_tap != 0x00U) ||
+        (val.int2_inact_state != 0x00U))
+    {
+      tap_cfg.interrupts_enable = PROPERTY_ENABLE;
+    }
+
+    else
+    {
+      tap_cfg.interrupts_enable = PROPERTY_DISABLE;
+    }
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Select the signal that need to route on int2 pad[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    INT2_CTRL, DRDY_PULSE_CFG(int2_wrist_tilt), MD2_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_int2_route_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int2_route_t *val)
+{
+  lsm6ds3tr_c_int2_ctrl_t int2_ctrl;
+  lsm6ds3tr_c_md2_cfg_t md2_cfg;
+  lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT2_CTRL,
+                             (uint8_t *)&int2_ctrl, 1);
+
+  if (ret == 0)
+  {
+    val->int2_drdy_xl         = int2_ctrl.int2_drdy_xl;
+    val->int2_drdy_g          = int2_ctrl.int2_drdy_g;
+    val->int2_drdy_temp       = int2_ctrl.int2_drdy_temp;
+    val->int2_fth             = int2_ctrl.int2_fth;
+    val->int2_fifo_ovr        = int2_ctrl.int2_fifo_ovr;
+    val->int2_full_flag       = int2_ctrl.int2_full_flag;
+    val->int2_step_count_ov   = int2_ctrl.int2_step_count_ov;
+    val->int2_step_delta      = int2_ctrl.int2_step_delta;
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD2_CFG,
+                               (uint8_t *)&md2_cfg, 1);
+
+    if (ret == 0)
+    {
+      val->int2_iron           = md2_cfg.int2_iron;
+      val->int2_tilt           = md2_cfg.int2_tilt;
+      val->int2_6d             = md2_cfg.int2_6d;
+      val->int2_double_tap     = md2_cfg.int2_double_tap;
+      val->int2_ff             = md2_cfg.int2_ff;
+      val->int2_wu             = md2_cfg.int2_wu;
+      val->int2_single_tap     = md2_cfg.int2_single_tap;
+      val->int2_inact_state    = md2_cfg.int2_inact_state;
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G,
+                                 (uint8_t *)&drdy_pulse_cfg_g, 1);
+      val->int2_wrist_tilt = drdy_pulse_cfg_g.int2_wrist_tilt;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Push-pull/open drain selection on interrupt pads.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pp_od in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_pp_od_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.pp_od = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Push-pull/open drain selection on interrupt pads.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of pp_od in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_pp_od_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  switch (ctrl3_c.pp_od)
+  {
+    case LSM6DS3TR_C_PUSH_PULL:
+      *val = LSM6DS3TR_C_PUSH_PULL;
+      break;
+
+    case LSM6DS3TR_C_OPEN_DRAIN:
+      *val = LSM6DS3TR_C_OPEN_DRAIN;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_PIN_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt active-high/low.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of h_lactive in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_polarity_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_h_lactive_t val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.h_lactive = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                                (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt active-high/low.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of h_lactive in reg CTRL3_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pin_polarity_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_h_lactive_t *val)
+{
+  lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+  switch (ctrl3_c.h_lactive)
+  {
+    case LSM6DS3TR_C_ACTIVE_HIGH:
+      *val = LSM6DS3TR_C_ACTIVE_HIGH;
+      break;
+
+    case LSM6DS3TR_C_ACTIVE_LOW:
+      *val = LSM6DS3TR_C_ACTIVE_LOW;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_POLARITY_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  All interrupt signals become available on INT1 pin.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of int2_on_int1 in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_all_on_int1_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl4_c.int2_on_int1 = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                (uint8_t *)&ctrl4_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  All interrupt signals become available on INT1 pin.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of int2_on_int1 in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_all_on_int1_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+  *val = ctrl4_c.int2_on_int1;
+
+  return ret;
+}
+
+/**
+  * @brief  Latched/pulsed interrupt.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of lir in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_int_notification_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lir_t val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg.lir = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Latched/pulsed interrupt.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of lir in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_int_notification_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lir_t *val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  switch (tap_cfg.lir)
+  {
+    case LSM6DS3TR_C_INT_PULSED:
+      *val = LSM6DS3TR_C_INT_PULSED;
+      break;
+
+    case LSM6DS3TR_C_INT_LATCHED:
+      *val = LSM6DS3TR_C_INT_LATCHED;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_INT_MODE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Wake_Up_event
+  * @brief       This section groups all the functions that manage the
+  *              Wake Up event generation.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Threshold for wakeup.1 LSB = FS_XL / 64.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of wk_ths in reg WAKE_UP_THS
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_wkup_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS,
+                             (uint8_t *)&wake_up_ths, 1);
+
+  if (ret == 0)
+  {
+    wake_up_ths.wk_ths = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS,
+                                (uint8_t *)&wake_up_ths, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for wakeup.1 LSB = FS_XL / 64.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of wk_ths in reg WAKE_UP_THS
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_wkup_threshold_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS,
+                             (uint8_t *)&wake_up_ths, 1);
+  *val = wake_up_ths.wk_ths;
+
+  return ret;
+}
+
+/**
+  * @brief  Wake up duration event.1LSb = 1 / ODR[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of wake_dur in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_wkup_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+
+  if (ret == 0)
+  {
+    wake_up_dur.wake_dur = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                                (uint8_t *)&wake_up_dur, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Wake up duration event.1LSb = 1 / ODR[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of wake_dur in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_wkup_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+  *val = wake_up_dur.wake_dur;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Activity/Inactivity_detection
+  * @brief       This section groups all the functions concerning
+  *              activity/inactivity detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enables gyroscope Sleep mode.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sleep in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_sleep_mode_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl4_c.sleep = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                (uint8_t *)&ctrl4_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables gyroscope Sleep mode.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sleep in reg CTRL4_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_gy_sleep_mode_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+  *val = ctrl4_c.sleep;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable inactivity function.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of inact_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_act_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_inact_en_t val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg.inact_en = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable inactivity function.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of inact_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_act_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_inact_en_t *val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  switch (tap_cfg.inact_en)
+  {
+    case LSM6DS3TR_C_PROPERTY_DISABLE:
+      *val = LSM6DS3TR_C_PROPERTY_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_XL_12Hz5_GY_NOT_AFFECTED:
+      *val = LSM6DS3TR_C_XL_12Hz5_GY_NOT_AFFECTED;
+      break;
+
+    case LSM6DS3TR_C_XL_12Hz5_GY_SLEEP:
+      *val = LSM6DS3TR_C_XL_12Hz5_GY_SLEEP;
+      break;
+
+    case LSM6DS3TR_C_XL_12Hz5_GY_PD:
+      *val = LSM6DS3TR_C_XL_12Hz5_GY_PD;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_ACT_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Duration to go in sleep mode.1 LSb = 512 / ODR[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sleep_dur in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_act_sleep_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+
+  if (ret == 0)
+  {
+    wake_up_dur.sleep_dur = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                                (uint8_t *)&wake_up_dur, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Duration to go in sleep mode. 1 LSb = 512 / ODR[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sleep_dur in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_act_sleep_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+  *val = wake_up_dur.sleep_dur;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_tap_generator
+  * @brief       This section groups all the functions that manage the
+  *              tap and double tap event generation.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Read the tap / double tap source register.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure of registers from TAP_SRC
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_src_get(const stmdev_ctx_t *ctx,
+                                lsm6ds3tr_c_tap_src_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_SRC, (uint8_t *) val, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Z direction in tap recognition.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_z_en in reg TAP_CFG
+  *
+  */
+int32_t lsm6ds3tr_c_tap_detection_on_z_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg.tap_z_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Z direction in tap recognition.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_z_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_detection_on_z_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+  *val = tap_cfg.tap_z_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Y direction in tap recognition.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_y_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_detection_on_y_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg.tap_y_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Y direction in tap recognition.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_y_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_detection_on_y_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+  *val = tap_cfg.tap_y_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable X direction in tap recognition.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_x_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_detection_on_x_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg.tap_x_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                                (uint8_t *)&tap_cfg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable X direction in tap recognition.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_x_en in reg TAP_CFG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_detection_on_x_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6ds3tr_c_tap_cfg_t tap_cfg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG,
+                             (uint8_t *)&tap_cfg, 1);
+  *val = tap_cfg.tap_x_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for tap recognition.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_ths in reg TAP_THS_6D
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_threshold_x_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                             (uint8_t *)&tap_ths_6d, 1);
+
+  if (ret == 0)
+  {
+    tap_ths_6d.tap_ths = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                                (uint8_t *)&tap_ths_6d, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for tap recognition.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tap_ths in reg TAP_THS_6D
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_threshold_x_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                             (uint8_t *)&tap_ths_6d, 1);
+  *val = tap_ths_6d.tap_ths;
+
+  return ret;
+}
+
+/**
+  * @brief  Maximum duration is the maximum time of an overthreshold signal
+  *         detection to be recognized as a tap event.
+  *         The default value of these bits is 00b which corresponds to
+  *         4*ODR_XL time.
+  *         If the SHOCK[1:0] bits are set to a different
+  *         value, 1LSB corresponds to 8*ODR_XL time.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of shock in reg INT_DUR2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_shock_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_int_dur2_t int_dur2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                             (uint8_t *)&int_dur2, 1);
+
+  if (ret == 0)
+  {
+    int_dur2.shock = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                                (uint8_t *)&int_dur2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Maximum duration is the maximum time of an overthreshold signal
+  *         detection to be recognized as a tap event.
+  *         The default value of these bits is 00b which corresponds to
+  *         4*ODR_XL time.
+  *         If the SHOCK[1:0] bits are set to a different value, 1LSB
+  *         corresponds to 8*ODR_XL time.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of shock in reg INT_DUR2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_shock_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_int_dur2_t int_dur2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                             (uint8_t *)&int_dur2, 1);
+  *val = int_dur2.shock;
+
+  return ret;
+}
+
+/**
+  * @brief  Quiet time is the time after the first detected tap in which there
+  *         must not be any overthreshold event.
+  *         The default value of these bits is 00b which corresponds to
+  *         2*ODR_XL time.
+  *         If the QUIET[1:0] bits are set to a different value, 1LSB
+  *         corresponds to 4*ODR_XL time.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of quiet in reg INT_DUR2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_quiet_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_int_dur2_t int_dur2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                             (uint8_t *)&int_dur2, 1);
+
+  if (ret == 0)
+  {
+    int_dur2.quiet = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                                (uint8_t *)&int_dur2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Quiet time is the time after the first detected tap in which there
+  *         must not be any overthreshold event.
+  *         The default value of these bits is 00b which corresponds to
+  *         2*ODR_XL time.
+  *         If the QUIET[1:0] bits are set to a different value, 1LSB
+  *         corresponds to 4*ODR_XL time.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of quiet in reg INT_DUR2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_quiet_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_int_dur2_t int_dur2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                             (uint8_t *)&int_dur2, 1);
+  *val = int_dur2.quiet;
+
+  return ret;
+}
+
+/**
+  * @brief  When double tap recognition is enabled, this register expresses the
+  *         maximum time between two consecutive detected taps to determine a
+  *         double tap event.
+  *         The default value of these bits is 0000b which corresponds to
+  *         16*ODR_XL time.
+  *         If the DUR[3:0] bits are set to a different value,1LSB corresponds
+  *         to 32*ODR_XL time.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of dur in reg INT_DUR2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_int_dur2_t int_dur2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                             (uint8_t *)&int_dur2, 1);
+
+  if (ret == 0)
+  {
+    int_dur2.dur = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                                (uint8_t *)&int_dur2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  When double tap recognition is enabled, this register expresses the
+  *         maximum time between two consecutive detected taps to determine a
+  *         double tap event.
+  *         The default value of these bits is 0000b which corresponds to
+  *         16*ODR_XL time.
+  *         If the DUR[3:0] bits are set to a different value,1LSB corresponds
+  *         to 32*ODR_XL time.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of dur in reg INT_DUR2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_int_dur2_t int_dur2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2,
+                             (uint8_t *)&int_dur2, 1);
+  *val = int_dur2.dur;
+
+  return ret;
+}
+
+/**
+  * @brief  Single/double-tap event enable/disable.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of
+  *                                      single_double_tap in reg WAKE_UP_THS
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_single_double_tap_t val)
+{
+  lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS,
+                             (uint8_t *)&wake_up_ths, 1);
+
+  if (ret == 0)
+  {
+    wake_up_ths.single_double_tap = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS,
+                                (uint8_t *)&wake_up_ths, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Single/double-tap event enable/disable.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of single_double_tap
+  *                                      in reg WAKE_UP_THS
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tap_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_single_double_tap_t *val)
+{
+  lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS,
+                             (uint8_t *)&wake_up_ths, 1);
+
+  switch (wake_up_ths.single_double_tap)
+  {
+    case LSM6DS3TR_C_ONLY_SINGLE:
+      *val = LSM6DS3TR_C_ONLY_SINGLE;
+      break;
+
+    case LSM6DS3TR_C_BOTH_SINGLE_DOUBLE:
+      *val = LSM6DS3TR_C_BOTH_SINGLE_DOUBLE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_TAP_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_ Six_position_detection(6D/4D)
+  * @brief       This section groups all the functions concerning six
+  *              position detection (6D).
+  * @{
+  *
+  */
+
+/**
+  * @brief  LPF2 feed 6D function selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of low_pass_on_6d in
+  *                                   reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_6d_feed_data_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_low_pass_on_6d_t val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl8_xl.low_pass_on_6d = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                                (uint8_t *)&ctrl8_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  LPF2 feed 6D function selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of low_pass_on_6d in reg CTRL8_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_6d_feed_data_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_low_pass_on_6d_t *val)
+{
+  lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL,
+                             (uint8_t *)&ctrl8_xl, 1);
+
+  switch (ctrl8_xl.low_pass_on_6d)
+  {
+    case LSM6DS3TR_C_ODR_DIV_2_FEED:
+      *val = LSM6DS3TR_C_ODR_DIV_2_FEED;
+      break;
+
+    case LSM6DS3TR_C_LPF2_FEED:
+      *val = LSM6DS3TR_C_LPF2_FEED;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_6D_FEED_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for 4D/6D function.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sixd_ths in reg TAP_THS_6D
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_6d_threshold_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sixd_ths_t val)
+{
+  lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                             (uint8_t *)&tap_ths_6d, 1);
+
+  if (ret == 0)
+  {
+    tap_ths_6d.sixd_ths = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                                (uint8_t *)&tap_ths_6d, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for 4D/6D function.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of sixd_ths in reg TAP_THS_6D
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_6d_threshold_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sixd_ths_t *val)
+{
+  lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                             (uint8_t *)&tap_ths_6d, 1);
+
+  switch (tap_ths_6d.sixd_ths)
+  {
+    case LSM6DS3TR_C_DEG_80:
+      *val = LSM6DS3TR_C_DEG_80;
+      break;
+
+    case LSM6DS3TR_C_DEG_70:
+      *val = LSM6DS3TR_C_DEG_70;
+      break;
+
+    case LSM6DS3TR_C_DEG_60:
+      *val = LSM6DS3TR_C_DEG_60;
+      break;
+
+    case LSM6DS3TR_C_DEG_50:
+      *val = LSM6DS3TR_C_DEG_50;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_6D_TH_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  4D orientation detection enable.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of d4d_en in reg TAP_THS_6D
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_4d_mode_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                             (uint8_t *)&tap_ths_6d, 1);
+
+  if (ret == 0)
+  {
+    tap_ths_6d.d4d_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                                (uint8_t *)&tap_ths_6d, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  4D orientation detection enable.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of d4d_en in reg TAP_THS_6D
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_4d_mode_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D,
+                             (uint8_t *)&tap_ths_6d, 1);
+  *val = tap_ths_6d.d4d_en;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_free_fall
+  * @brief       This section group all the functions concerning the free
+  *              fall detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief Free-fall duration event. 1LSb = 1 / ODR[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of ff_dur in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_ff_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  lsm6ds3tr_c_free_fall_t free_fall;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL,
+                             (uint8_t *)&free_fall, 1);
+
+  if (ret == 0)
+  {
+    free_fall.ff_dur = (val & 0x1FU);
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FREE_FALL,
+                                (uint8_t *)&free_fall, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                                 (uint8_t *)&wake_up_dur, 1);
+
+      if (ret == 0)
+      {
+        wake_up_dur.ff_dur = (val & 0x20U) >> 5;
+        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                                    (uint8_t *)&wake_up_dur, 1);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Free-fall duration event. 1LSb = 1 / ODR[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of ff_dur in reg WAKE_UP_DUR
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_ff_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
+  lsm6ds3tr_c_free_fall_t free_fall;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR,
+                             (uint8_t *)&wake_up_dur, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL,
+                               (uint8_t *)&free_fall, 1);
+  }
+
+  *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
+
+  return ret;
+}
+
+/**
+  * @brief  Free fall threshold setting.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of ff_ths in reg FREE_FALL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_ff_threshold_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_ff_ths_t val)
+{
+  lsm6ds3tr_c_free_fall_t free_fall;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL,
+                             (uint8_t *)&free_fall, 1);
+
+  if (ret == 0)
+  {
+    free_fall.ff_ths = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FREE_FALL,
+                                (uint8_t *)&free_fall, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Free fall threshold setting.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of ff_ths in reg FREE_FALL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_ff_threshold_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_ff_ths_t *val)
+{
+  lsm6ds3tr_c_free_fall_t free_fall;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL,
+                             (uint8_t *)&free_fall, 1);
+
+  switch (free_fall.ff_ths)
+  {
+    case LSM6DS3TR_C_FF_TSH_156mg:
+      *val = LSM6DS3TR_C_FF_TSH_156mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_219mg:
+      *val = LSM6DS3TR_C_FF_TSH_219mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_250mg:
+      *val = LSM6DS3TR_C_FF_TSH_250mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_312mg:
+      *val = LSM6DS3TR_C_FF_TSH_312mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_344mg:
+      *val = LSM6DS3TR_C_FF_TSH_344mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_406mg:
+      *val = LSM6DS3TR_C_FF_TSH_406mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_469mg:
+      *val = LSM6DS3TR_C_FF_TSH_469mg;
+      break;
+
+    case LSM6DS3TR_C_FF_TSH_500mg:
+      *val = LSM6DS3TR_C_FF_TSH_500mg;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FF_TSH_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_fifo
+  * @brief       This section group all the functions concerning the
+  *              fifo usage
+  * @{
+  *
+  */
+
+/**
+  * @brief  FIFO watermark level selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fth in reg FIFO_CTRL1
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_watermark_set(const stmdev_ctx_t *ctx,
+                                       uint16_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl1_t fifo_ctrl1;
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl1.fth = (uint8_t)(0x00FFU & val);
+    fifo_ctrl2.fth = (uint8_t)((0x0700U & val) >> 8);
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL1,
+                                (uint8_t *)&fifo_ctrl1, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                                  (uint8_t *)&fifo_ctrl2, 1);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO watermark level selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fth in reg FIFO_CTRL1
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_watermark_get(const stmdev_ctx_t *ctx,
+                                       uint16_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl1_t fifo_ctrl1;
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL1,
+                             (uint8_t *)&fifo_ctrl1, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                               (uint8_t *)&fifo_ctrl2, 1);
+  }
+
+  *val = ((uint16_t)fifo_ctrl2.fth << 8) + (uint16_t)fifo_ctrl1.fth;
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO data level.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    get the values of diff_fifo in reg  FIFO_STATUS1 and
+  *                FIFO_STATUS2(diff_fifo), it is recommended to set the
+  *                BDU bit.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_data_level_get(const stmdev_ctx_t *ctx,
+                                        uint16_t *val)
+{
+  lsm6ds3tr_c_fifo_status1_t fifo_status1;
+  lsm6ds3tr_c_fifo_status2_t fifo_status2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS1,
+                             (uint8_t *)&fifo_status1, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS2,
+                               (uint8_t *)&fifo_status2, 1);
+    *val = ((uint16_t) fifo_status2.diff_fifo << 8) +
+           (uint16_t) fifo_status1.diff_fifo;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO watermark.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    get the values of watermark in reg  FIFO_STATUS2 and
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_wtm_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_fifo_status2_t fifo_status2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS2,
+                             (uint8_t *)&fifo_status2, 1);
+  *val = fifo_status2.waterm;
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO pattern.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    get the values of fifo_pattern in reg  FIFO_STATUS3 and
+  *                FIFO_STATUS4, it is recommended to set the BDU bit
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_pattern_get(const stmdev_ctx_t *ctx, uint16_t *val)
+{
+  lsm6ds3tr_c_fifo_status3_t fifo_status3;
+  lsm6ds3tr_c_fifo_status4_t fifo_status4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS3,
+                             (uint8_t *)&fifo_status3, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS4,
+                               (uint8_t *)&fifo_status4, 1);
+    *val = ((uint16_t)fifo_status4.fifo_pattern << 8) +
+           fifo_status3.fifo_pattern;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Batching of temperature data[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fifo_temp_en in reg FIFO_CTRL2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_temp_batch_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl2.fifo_temp_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                                (uint8_t *)&fifo_ctrl2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Batching of temperature data[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fifo_temp_en in reg FIFO_CTRL2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_temp_batch_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+  *val = fifo_ctrl2.fifo_temp_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Trigger signal for FIFO write operation.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    act on FIFO_CTRL2(timer_pedo_fifo_drdy)
+  *                and MASTER_CONFIG(data_valid_sel_fifo)
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_write_trigger_set(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_trigger_fifo_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl2.timer_pedo_fifo_drdy = (uint8_t)val & 0x01U;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                                (uint8_t *)&fifo_ctrl2, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                 (uint8_t *)&master_config, 1);
+
+      if (ret == 0)
+      {
+        master_config.data_valid_sel_fifo = (((uint8_t)val & 0x02U) >> 1);
+        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                    (uint8_t *)&master_config, 1);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Trigger signal for FIFO write operation.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    act on FIFO_CTRL2(timer_pedo_fifo_drdy)
+  *                and MASTER_CONFIG(data_valid_sel_fifo)
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_write_trigger_get(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_trigger_fifo_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                               (uint8_t *)&master_config, 1);
+
+    switch ((fifo_ctrl2.timer_pedo_fifo_drdy << 1) +
+            fifo_ctrl2. timer_pedo_fifo_drdy)
+    {
+      case LSM6DS3TR_C_TRG_XL_GY_DRDY:
+        *val = LSM6DS3TR_C_TRG_XL_GY_DRDY;
+        break;
+
+      case LSM6DS3TR_C_TRG_STEP_DETECT:
+        *val = LSM6DS3TR_C_TRG_STEP_DETECT;
+        break;
+
+      case LSM6DS3TR_C_TRG_SH_DRDY:
+        *val = LSM6DS3TR_C_TRG_SH_DRDY;
+        break;
+
+      default:
+        *val = LSM6DS3TR_C_TRG_SH_ND;
+        break;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Enable pedometer step counter and timestamp as 4th
+  *          FIFO data set.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of timer_pedo_fifo_en in reg FIFO_CTRL2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_set(
+  stmdev_ctx_t *ctx,
+  uint8_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl2.timer_pedo_fifo_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                                (uint8_t *)&fifo_ctrl2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable pedometer step counter and timestamp as 4th
+  *         FIFO data set.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of timer_pedo_fifo_en in reg FIFO_CTRL2
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_get(
+  stmdev_ctx_t *ctx,
+  uint8_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2,
+                             (uint8_t *)&fifo_ctrl2, 1);
+  *val = fifo_ctrl2.timer_pedo_fifo_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO) for
+  *         accelerometer data.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of dec_fifo_xl in reg FIFO_CTRL3
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_xl_batch_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_xl_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3,
+                             (uint8_t *)&fifo_ctrl3, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl3.dec_fifo_xl = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3,
+                                (uint8_t *)&fifo_ctrl3, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO) for
+  *         accelerometer data.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of dec_fifo_xl in reg FIFO_CTRL3
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_xl_batch_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_xl_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3,
+                             (uint8_t *)&fifo_ctrl3, 1);
+
+  switch (fifo_ctrl3.dec_fifo_xl)
+  {
+    case LSM6DS3TR_C_FIFO_XL_DISABLE:
+      *val = LSM6DS3TR_C_FIFO_XL_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_NO_DEC:
+      *val = LSM6DS3TR_C_FIFO_XL_NO_DEC;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_DEC_2:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_2;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_DEC_3:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_3;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_DEC_4:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_4;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_DEC_8:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_8;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_DEC_16:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_16;
+      break;
+
+    case LSM6DS3TR_C_FIFO_XL_DEC_32:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_32;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FIFO_XL_DEC_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for gyroscope data.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of dec_fifo_gyro in reg FIFO_CTRL3
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_gy_batch_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_gyro_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3,
+                             (uint8_t *)&fifo_ctrl3, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl3.dec_fifo_gyro = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3,
+                                (uint8_t *)&fifo_ctrl3, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for gyroscope data.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of dec_fifo_gyro in reg FIFO_CTRL3
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_gy_batch_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_gyro_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3,
+                             (uint8_t *)&fifo_ctrl3, 1);
+
+  switch (fifo_ctrl3.dec_fifo_gyro)
+  {
+    case LSM6DS3TR_C_FIFO_GY_DISABLE:
+      *val = LSM6DS3TR_C_FIFO_GY_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_NO_DEC:
+      *val = LSM6DS3TR_C_FIFO_GY_NO_DEC;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_DEC_2:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_2;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_DEC_3:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_3;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_DEC_4:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_4;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_DEC_8:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_8;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_DEC_16:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_16;
+      break;
+
+    case LSM6DS3TR_C_FIFO_GY_DEC_32:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_32;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FIFO_GY_DEC_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Selects Batching Data Rate (writing frequency in FIFO)
+  *          for third data set.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of dec_ds3_fifo in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_dataset_3_batch_set(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds3_fifo_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl4.dec_ds3_fifo = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                                (uint8_t *)&fifo_ctrl4, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Selects Batching Data Rate (writing frequency in FIFO)
+  *          for third data set.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of dec_ds3_fifo in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_dataset_3_batch_get(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds3_fifo_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+
+  switch (fifo_ctrl4.dec_ds3_fifo)
+  {
+    case LSM6DS3TR_C_FIFO_DS3_DISABLE:
+      *val = LSM6DS3TR_C_FIFO_DS3_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_NO_DEC:
+      *val = LSM6DS3TR_C_FIFO_DS3_NO_DEC;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_DEC_2:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_2;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_DEC_3:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_3;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_DEC_4:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_4;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_DEC_8:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_8;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_DEC_16:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_16;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS3_DEC_32:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_32;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FIFO_DS3_DEC_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Selects Batching Data Rate (writing frequency in FIFO)
+  *          for fourth data set.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of dec_ds4_fifo in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_dataset_4_batch_set(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds4_fifo_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl4.dec_ds4_fifo = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                                (uint8_t *)&fifo_ctrl4, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Selects Batching Data Rate (writing frequency in FIFO) for
+  *          fourth data set.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of dec_ds4_fifo in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_dataset_4_batch_get(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds4_fifo_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+
+  switch (fifo_ctrl4.dec_ds4_fifo)
+  {
+    case LSM6DS3TR_C_FIFO_DS4_DISABLE:
+      *val = LSM6DS3TR_C_FIFO_DS4_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_NO_DEC:
+      *val = LSM6DS3TR_C_FIFO_DS4_NO_DEC;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_DEC_2:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_2;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_DEC_3:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_3;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_DEC_4:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_4;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_DEC_8:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_8;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_DEC_16:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_16;
+      break;
+
+    case LSM6DS3TR_C_FIFO_DS4_DEC_32:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_32;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FIFO_DS4_DEC_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   8-bit data storage in FIFO.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of only_high_data in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_set(const stmdev_ctx_t *ctx,
+                                               uint8_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl4.only_high_data = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                                (uint8_t *)&fifo_ctrl4, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  8-bit data storage in FIFO.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of only_high_data in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_get(const stmdev_ctx_t *ctx,
+                                               uint8_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+  *val = fifo_ctrl4.only_high_data;
+
+  return ret;
+}
+
+/**
+  * @brief  Sensing chain FIFO stop values memorization at threshold
+  *         level.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of stop_on_fth in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_stop_on_wtm_set(const stmdev_ctx_t *ctx,
+                                         uint8_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl4.stop_on_fth = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                                (uint8_t *)&fifo_ctrl4, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensing chain FIFO stop values memorization at threshold
+  *         level.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of stop_on_fth in reg FIFO_CTRL4
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_stop_on_wtm_get(const stmdev_ctx_t *ctx,
+                                         uint8_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4,
+                             (uint8_t *)&fifo_ctrl4, 1);
+  *val = fifo_ctrl4.stop_on_fth;
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO mode selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of fifo_mode in reg FIFO_CTRL5
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_mode_set(const stmdev_ctx_t *ctx,
+                                  lsm6ds3tr_c_fifo_mode_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5,
+                             (uint8_t *)&fifo_ctrl5, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl5.fifo_mode = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5,
+                                (uint8_t *)&fifo_ctrl5, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO mode selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of fifo_mode in reg FIFO_CTRL5
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_mode_get(const stmdev_ctx_t *ctx,
+                                  lsm6ds3tr_c_fifo_mode_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5,
+                             (uint8_t *)&fifo_ctrl5, 1);
+
+  switch (fifo_ctrl5.fifo_mode)
+  {
+    case LSM6DS3TR_C_BYPASS_MODE:
+      *val = LSM6DS3TR_C_BYPASS_MODE;
+      break;
+
+    case LSM6DS3TR_C_FIFO_MODE:
+      *val = LSM6DS3TR_C_FIFO_MODE;
+      break;
+
+    case LSM6DS3TR_C_STREAM_TO_FIFO_MODE:
+      *val = LSM6DS3TR_C_STREAM_TO_FIFO_MODE;
+      break;
+
+    case LSM6DS3TR_C_BYPASS_TO_STREAM_MODE:
+      *val = LSM6DS3TR_C_BYPASS_TO_STREAM_MODE;
+      break;
+
+    case LSM6DS3TR_C_STREAM_MODE:
+      *val = LSM6DS3TR_C_STREAM_MODE;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FIFO_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO ODR selection, setting FIFO_MODE also.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of odr_fifo in reg FIFO_CTRL5
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_data_rate_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_odr_fifo_t val)
+{
+  lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5,
+                             (uint8_t *)&fifo_ctrl5, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl5.odr_fifo = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5,
+                                (uint8_t *)&fifo_ctrl5, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO ODR selection, setting FIFO_MODE also.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of odr_fifo in reg FIFO_CTRL5
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_fifo_data_rate_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_odr_fifo_t *val)
+{
+  lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5,
+                             (uint8_t *)&fifo_ctrl5, 1);
+
+  switch (fifo_ctrl5.odr_fifo)
+  {
+    case LSM6DS3TR_C_FIFO_DISABLE:
+      *val = LSM6DS3TR_C_FIFO_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_FIFO_12Hz5:
+      *val = LSM6DS3TR_C_FIFO_12Hz5;
+      break;
+
+    case LSM6DS3TR_C_FIFO_26Hz:
+      *val = LSM6DS3TR_C_FIFO_26Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_52Hz:
+      *val = LSM6DS3TR_C_FIFO_52Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_104Hz:
+      *val = LSM6DS3TR_C_FIFO_104Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_208Hz:
+      *val = LSM6DS3TR_C_FIFO_208Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_416Hz:
+      *val = LSM6DS3TR_C_FIFO_416Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_833Hz:
+      *val = LSM6DS3TR_C_FIFO_833Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_1k66Hz:
+      *val = LSM6DS3TR_C_FIFO_1k66Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_3k33Hz:
+      *val = LSM6DS3TR_C_FIFO_3k33Hz;
+      break;
+
+    case LSM6DS3TR_C_FIFO_6k66Hz:
+      *val = LSM6DS3TR_C_FIFO_6k66Hz;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_FIFO_RATE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_DEN_functionality
+  * @brief       This section groups all the functions concerning DEN
+  *              functionality.
+  * @{
+  *
+  */
+
+/**
+  * @brief  DEN active level configuration.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_lh in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_polarity_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_den_lh_t val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl5_c.den_lh = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                                (uint8_t *)&ctrl5_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN active level configuration.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of den_lh in reg CTRL5_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_polarity_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_den_lh_t *val)
+{
+  lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C,
+                             (uint8_t *)&ctrl5_c, 1);
+
+  switch (ctrl5_c.den_lh)
+  {
+    case LSM6DS3TR_C_DEN_ACT_LOW:
+      *val = LSM6DS3TR_C_DEN_ACT_LOW;
+      break;
+
+    case LSM6DS3TR_C_DEN_ACT_HIGH:
+      *val = LSM6DS3TR_C_DEN_ACT_HIGH;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_DEN_POL_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN functionality marking mode[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_mode in reg CTRL6_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_den_mode_t val)
+{
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl6_c.den_mode = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                                (uint8_t *)&ctrl6_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN functionality marking mode[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_mode in reg CTRL6_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_den_mode_t *val)
+{
+  lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C,
+                             (uint8_t *)&ctrl6_c, 1);
+
+  switch (ctrl6_c.den_mode)
+  {
+    case LSM6DS3TR_C_DEN_DISABLE:
+      *val = LSM6DS3TR_C_DEN_DISABLE;
+      break;
+
+    case LSM6DS3TR_C_LEVEL_LETCHED:
+      *val = LSM6DS3TR_C_LEVEL_LETCHED;
+      break;
+
+    case LSM6DS3TR_C_LEVEL_TRIGGER:
+      *val = LSM6DS3TR_C_LEVEL_TRIGGER;
+      break;
+
+    case LSM6DS3TR_C_EDGE_TRIGGER:
+      *val = LSM6DS3TR_C_EDGE_TRIGGER;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_DEN_MODE_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Extend DEN functionality to accelerometer sensor.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_xl_g in reg CTRL9_XL
+  *                             and den_xl_en in CTRL4_C.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_enable_set(const stmdev_ctx_t *ctx,
+                                   lsm6ds3tr_c_den_xl_en_t val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl9_xl.den_xl_g = (uint8_t)val & 0x01U;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                                (uint8_t *)&ctrl9_xl, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                 (uint8_t *)&ctrl4_c, 1);
+
+      if (ret == 0)
+      {
+        ctrl4_c.den_xl_en = (uint8_t)val & 0x02U;
+        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                                    (uint8_t *)&ctrl4_c, 1);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Extend DEN functionality to accelerometer sensor. [get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of den_xl_g in reg CTRL9_XL
+  *                             and den_xl_en in CTRL4_C.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_enable_get(const stmdev_ctx_t *ctx,
+                                   lsm6ds3tr_c_den_xl_en_t *val)
+{
+  lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                               (uint8_t *)&ctrl9_xl, 1);
+
+    switch ((ctrl4_c.den_xl_en << 1) + ctrl9_xl.den_xl_g)
+    {
+      case LSM6DS3TR_C_STAMP_IN_GY_DATA:
+        *val = LSM6DS3TR_C_STAMP_IN_GY_DATA;
+        break;
+
+      case LSM6DS3TR_C_STAMP_IN_XL_DATA:
+        *val = LSM6DS3TR_C_STAMP_IN_XL_DATA;
+        break;
+
+      case LSM6DS3TR_C_STAMP_IN_GY_XL_DATA:
+        *val = LSM6DS3TR_C_STAMP_IN_GY_XL_DATA;
+        break;
+
+      default:
+        *val = LSM6DS3TR_C_DEN_STAMP_ND;
+        break;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Z-axis.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_z in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mark_axis_z_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl9_xl.den_z = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                                (uint8_t *)&ctrl9_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Z-axis.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_z in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mark_axis_z_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+  *val = ctrl9_xl.den_z;
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Y-axis.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_y in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mark_axis_y_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl9_xl.den_y = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                                (uint8_t *)&ctrl9_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Y-axis.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_y in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mark_axis_y_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+  *val = ctrl9_xl.den_y;
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of X-axis.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_x in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mark_axis_x_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl9_xl.den_x = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                                (uint8_t *)&ctrl9_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of X-axis.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of den_x in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_den_mark_axis_x_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+  *val = ctrl9_xl.den_x;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Pedometer
+  * @brief       This section groups all the functions that manage pedometer.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Reset pedometer step counter.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pedo_rst_step in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_step_reset_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.pedo_rst_step = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                (uint8_t *)&ctrl10_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Reset pedometer step counter.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pedo_rst_step in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_step_reset_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+  *val = ctrl10_c.pedo_rst_step;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable pedometer algorithm.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pedo_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.pedo_en = val;
+
+    if (val != 0x00U)
+    {
+      ctrl10_c.func_en = val;
+    }
+
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                (uint8_t *)&ctrl10_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  pedo_sens:   Enable pedometer algorithm.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pedo_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+  *val = ctrl10_c.pedo_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Minimum threshold to detect a peak. Default is 10h.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of ths_min in reg
+  *                      CONFIG_PEDO_THS_MIN
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN,
+                               (uint8_t *)&config_pedo_ths_min, 1);
+
+    if (ret == 0)
+    {
+      config_pedo_ths_min.ths_min = val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN,
+                                  (uint8_t *)&config_pedo_ths_min, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Minimum threshold to detect a peak. Default is 10h.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of ths_min in reg  CONFIG_PEDO_THS_MIN
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_threshold_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN,
+                               (uint8_t *)&config_pedo_ths_min, 1);
+
+    if (ret == 0)
+    {
+      *val =  config_pedo_ths_min.ths_min;
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  pedo_full_scale:   Pedometer data range.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pedo_fs in
+  *                            reg CONFIG_PEDO_THS_MIN
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_full_scale_set(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_pedo_fs_t val)
+{
+  lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN,
+                               (uint8_t *)&config_pedo_ths_min, 1);
+
+    if (ret == 0)
+    {
+      config_pedo_ths_min.pedo_fs = (uint8_t) val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN,
+                                  (uint8_t *)&config_pedo_ths_min, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Pedometer data range.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of pedo_fs in
+  *                            reg CONFIG_PEDO_THS_MIN
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_full_scale_get(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_pedo_fs_t *val)
+{
+  lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN,
+                               (uint8_t *)&config_pedo_ths_min, 1);
+
+    if (ret == 0)
+    {
+      switch (config_pedo_ths_min.pedo_fs)
+      {
+        case LSM6DS3TR_C_PEDO_AT_2g:
+          *val = LSM6DS3TR_C_PEDO_AT_2g;
+          break;
+
+        case LSM6DS3TR_C_PEDO_AT_4g:
+          *val = LSM6DS3TR_C_PEDO_AT_4g;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_PEDO_FS_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Pedometer debounce configuration register (r/w).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of deb_step in reg PEDO_DEB_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_debounce_steps_set(const stmdev_ctx_t *ctx,
+                                            uint8_t val)
+{
+  lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG,
+                               (uint8_t *)&pedo_deb_reg, 1);
+
+    if (ret == 0)
+    {
+      pedo_deb_reg.deb_step = val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG,
+                                  (uint8_t *)&pedo_deb_reg, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Pedometer debounce configuration register (r/w).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of deb_step in reg PEDO_DEB_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_debounce_steps_get(const stmdev_ctx_t *ctx,
+                                            uint8_t *val)
+{
+  lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG,
+                               (uint8_t *)&pedo_deb_reg, 1);
+
+    if (ret == 0)
+    {
+      *val = pedo_deb_reg.deb_step;
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Debounce time. If the time between two consecutive steps is
+  *         greater than  DEB_TIME*80ms, the debouncer is reactivated.
+  *         Default value: 01101[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of deb_time in reg PEDO_DEB_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_timeout_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG,
+                               (uint8_t *)&pedo_deb_reg, 1);
+
+    if (ret == 0)
+    {
+      pedo_deb_reg.deb_time = val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG,
+                                  (uint8_t *)&pedo_deb_reg, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Debounce time. If the time between two consecutive steps is
+  *         greater than  DEB_TIME*80ms, the debouncer is reactivated.
+  *         Default value: 01101[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of deb_time in reg PEDO_DEB_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_timeout_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG,
+                               (uint8_t *)&pedo_deb_reg, 1);
+
+    if (ret == 0)
+    {
+      *val = pedo_deb_reg.deb_time;
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Time period register for step detection on delta time (r/w).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that contains data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_steps_period_set(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_STEP_COUNT_DELTA, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Time period register for step detection on delta time (r/w).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_pedo_steps_period_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STEP_COUNT_DELTA, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_significant_motion
+  * @brief       This section groups all the functions that manage the
+  *              significant motion detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable significant motion detection function.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sign_motion_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_motion_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.sign_motion_en = val;
+
+    if (val != 0x00U)
+    {
+      ctrl10_c.func_en = val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                  (uint8_t *)&ctrl10_c, 1);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable significant motion detection function.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of sign_motion_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_motion_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+  *val = ctrl10_c.sign_motion_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Significant motion threshold.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that store significant motion threshold.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_motion_threshold_set(const stmdev_ctx_t *ctx,
+                                         uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SM_THS, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Significant motion threshold.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that store significant motion threshold.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_motion_threshold_get(const stmdev_ctx_t *ctx,
+                                         uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SM_THS, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_tilt_detection
+  * @brief       This section groups all the functions that manage the tilt
+  *              event detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable tilt calculation.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tilt_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.tilt_en = val;
+
+    if (val != 0x00U)
+    {
+      ctrl10_c.func_en = val;
+    }
+
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                (uint8_t *)&ctrl10_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable tilt calculation.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tilt_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+  *val = ctrl10_c.tilt_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable tilt calculation.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tilt_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_wrist_tilt_sens_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.wrist_tilt_en = val;
+
+    if (val != 0x00U)
+    {
+      ctrl10_c.func_en = val;
+    }
+
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                (uint8_t *)&ctrl10_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable tilt calculation.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tilt_en in reg CTRL10_C
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_wrist_tilt_sens_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+  *val = ctrl10_c.wrist_tilt_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Absolute Wrist Tilt latency register (r/w).
+  *         Absolute wrist tilt latency parameters.
+  *         1 LSB = 40 ms. Default value: 0Fh (600 ms).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that contains data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_latency_set(const stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_LAT, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Absolute Wrist Tilt latency register (r/w).
+  *         Absolute wrist tilt latency parameters.
+  *         1 LSB = 40 ms. Default value: 0Fh (600 ms).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_latency_get(const stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_LAT, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Absolute Wrist Tilt threshold register(r/w).
+  *         Absolute wrist tilt threshold parameters.
+  *         1 LSB = 15.625 mg.Default value: 20h (500 mg).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that contains data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_threshold_set(const stmdev_ctx_t *ctx,
+                                       uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_THS, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Absolute Wrist Tilt threshold register(r/w).
+  *         Absolute wrist tilt threshold parameters.
+  *         1 LSB = 15.625 mg.Default value: 20h (500 mg).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_threshold_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_THS, buff, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Absolute Wrist Tilt mask register (r/w).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Registers A_WRIST_TILT_MASK
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_src_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_a_wrist_tilt_mask_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_MASK,
+                               (uint8_t *) val, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Absolute Wrist Tilt mask register (r/w).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Registers A_WRIST_TILT_MASK
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_tilt_src_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_a_wrist_tilt_mask_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_MASK,
+                               (uint8_t *) val, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_ magnetometer_sensor
+  * @brief       This section groups all the functions that manage additional
+  *              magnetometer sensor.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable soft-iron correction algorithm for magnetometer.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of soft_en in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_soft_iron_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl9_xl.soft_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                                (uint8_t *)&ctrl9_xl, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable soft-iron correction algorithm for magnetometer.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of soft_en in reg CTRL9_XL
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_soft_iron_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+  *val = ctrl9_xl.soft_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable hard-iron correction algorithm for magnetometer.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of iron_en in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_hard_iron_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  if (ret == 0)
+  {
+    master_config.iron_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                 (uint8_t *)&ctrl10_c, 1);
+
+      if (ret == 0)
+      {
+        if (val != 0x00U)
+        {
+          ctrl10_c.func_en = val;
+        }
+
+        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                    (uint8_t *)&ctrl10_c, 1);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable hard-iron correction algorithm for magnetometer.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of iron_en in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_hard_iron_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+  *val = master_config.iron_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Soft iron 3x3 matrix. Value are expressed in sign-module format.
+  *         (Es. SVVVVVVVb where S is the sign 0/+1/- and V is the value).[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that contains data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_soft_iron_mat_set(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MAG_SI_XX, buff, 9);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Soft iron 3x3 matrix. Value are expressed in sign-module format.
+  *         (Es. SVVVVVVVb where S is the sign 0/+1/- and V is the value).[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_soft_iron_mat_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MAG_SI_XX, buff, 9);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Offset for hard-iron compensation register (r/w). The value is
+  *         expressed as a 16-bit word in two’s complement.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that contains data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_offset_set(const stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
+    buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
+    buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
+    buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
+    buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
+    buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MAG_OFFX_L, buff, 6);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Offset for hard-iron compensation register(r/w).
+  *         The value is expressed as a 16-bit word in two’s complement.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  buff   Buffer that stores data read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_mag_offset_get(const stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MAG_OFFX_L, buff, 6);
+
+    if (ret == 0)
+    {
+      val[0] = (int16_t)buff[1];
+      val[0] = (val[0] * 256) + (int16_t)buff[0];
+      val[1] = (int16_t)buff[3];
+      val[1] = (val[1] * 256) + (int16_t)buff[2];
+      val[2] = (int16_t)buff[5];
+      val[2] = (val[2] * 256) + (int16_t)buff[4];
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup    LSM6DS3TR_C_Sensor_hub
+  * @brief       This section groups all the functions that manage the sensor
+  *              hub functionality.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable function.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values func_en
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_func_en_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                             (uint8_t *)&ctrl10_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl10_c.func_en = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C,
+                                (uint8_t *)&ctrl10_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor synchronization time frame with the step of 500 ms and
+  *         full range of 5s. Unsigned 8-bit.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tph in reg SENSOR_SYNC_TIME_FRAME
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_sync_sens_frame_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val)
+{
+  lsm6ds3tr_c_sensor_sync_time_frame_t sensor_sync_time_frame;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME,
+                             (uint8_t *)&sensor_sync_time_frame, 1);
+
+  if (ret == 0)
+  {
+    sensor_sync_time_frame.tph = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME,
+                                (uint8_t *)&sensor_sync_time_frame, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor synchronization time frame with the step of 500 ms and
+  *         full range of 5s. Unsigned 8-bit.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of tph in reg  SENSOR_SYNC_TIME_FRAME
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_sync_sens_frame_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6ds3tr_c_sensor_sync_time_frame_t sensor_sync_time_frame;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME,
+                             (uint8_t *)&sensor_sync_time_frame, 1);
+  *val =  sensor_sync_time_frame.tph;
+
+  return ret;
+}
+
+/**
+  * @brief  Resolution ratio of error code for sensor synchronization.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of rr in reg  SENSOR_SYNC_RES_RATIO
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_sync_sens_ratio_set(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rr_t val)
+{
+  lsm6ds3tr_c_sensor_sync_res_ratio_t sensor_sync_res_ratio;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO,
+                             (uint8_t *)&sensor_sync_res_ratio, 1);
+
+  if (ret == 0)
+  {
+    sensor_sync_res_ratio.rr = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO,
+                                (uint8_t *)&sensor_sync_res_ratio, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Resolution ratio of error code for sensor synchronization.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of rr in reg  SENSOR_SYNC_RES_RATIO
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_sync_sens_ratio_get(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rr_t *val)
+{
+  lsm6ds3tr_c_sensor_sync_res_ratio_t sensor_sync_res_ratio;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO,
+                             (uint8_t *)&sensor_sync_res_ratio, 1);
+
+  switch (sensor_sync_res_ratio.rr)
+  {
+    case LSM6DS3TR_C_RES_RATIO_2_11:
+      *val = LSM6DS3TR_C_RES_RATIO_2_11;
+      break;
+
+    case LSM6DS3TR_C_RES_RATIO_2_12:
+      *val = LSM6DS3TR_C_RES_RATIO_2_12;
+      break;
+
+    case LSM6DS3TR_C_RES_RATIO_2_13:
+      *val = LSM6DS3TR_C_RES_RATIO_2_13;
+      break;
+
+    case LSM6DS3TR_C_RES_RATIO_2_14:
+      *val = LSM6DS3TR_C_RES_RATIO_2_14;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_RES_RATIO_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub I2C master enable.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of master_on in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_master_set(const stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  if (ret == 0)
+  {
+    master_config.master_on = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub I2C master enable.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of master_on in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_master_get(const stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+  *val = master_config.master_on;
+
+  return ret;
+}
+
+/**
+  * @brief  I2C interface pass-through.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pass_through_mode in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_pass_through_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  if (ret == 0)
+  {
+    master_config.pass_through_mode = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  I2C interface pass-through.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pass_through_mode in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_pass_through_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+  *val = master_config.pass_through_mode;
+
+  return ret;
+}
+
+/**
+  * @brief  Master I2C pull-up enable/disable.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of pull_up_en in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_pin_mode_set(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_pull_up_en_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  if (ret == 0)
+  {
+    master_config.pull_up_en = (uint8_t) val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Master I2C pull-up enable/disable.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of pull_up_en in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_pin_mode_get(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_pull_up_en_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  switch (master_config.pull_up_en)
+  {
+    case LSM6DS3TR_C_EXT_PULL_UP:
+      *val = LSM6DS3TR_C_EXT_PULL_UP;
+      break;
+
+    case LSM6DS3TR_C_INTERNAL_PULL_UP:
+      *val = LSM6DS3TR_C_INTERNAL_PULL_UP;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_SH_PIN_MODE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub trigger signal selection.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of start_config in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_syncro_mode_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_start_config_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  if (ret == 0)
+  {
+    master_config.start_config = (uint8_t)val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub trigger signal selection.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of start_config in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_syncro_mode_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_start_config_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  switch (master_config.start_config)
+  {
+    case LSM6DS3TR_C_XL_GY_DRDY:
+      *val = LSM6DS3TR_C_XL_GY_DRDY;
+      break;
+
+    case LSM6DS3TR_C_EXT_ON_INT2_PIN:
+      *val = LSM6DS3TR_C_EXT_ON_INT2_PIN;
+      break;
+
+    default:
+      *val = LSM6DS3TR_C_SH_SYNCRO_ND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Manage the Master DRDY signal on INT1 pad.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of drdy_on_int1 in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_drdy_on_int1_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+
+  if (ret == 0)
+  {
+    master_config.drdy_on_int1 = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                                (uint8_t *)&master_config, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Manage the Master DRDY signal on INT1 pad.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of drdy_on_int1 in reg MASTER_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_drdy_on_int1_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val)
+{
+  lsm6ds3tr_c_master_config_t master_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG,
+                             (uint8_t *)&master_config, 1);
+  *val = master_config.drdy_on_int1;
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub output registers.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure of registers from SENSORHUB1_REG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_read_data_raw_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_emb_sh_read_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSORHUB1_REG,
+                             (uint8_t *) & (val->sh_byte_1), 12);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSORHUB13_REG,
+                               (uint8_t *) & (val->sh_byte_13), 6);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Master command code used for stamping for sensor sync.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of master_cmd_code in
+  *                reg MASTER_CMD_CODE
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_cmd_sens_sync_set(const stmdev_ctx_t *ctx,
+                                         uint8_t val)
+{
+  lsm6ds3tr_c_master_cmd_code_t master_cmd_code;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CMD_CODE,
+                             (uint8_t *)&master_cmd_code, 1);
+
+  if (ret == 0)
+  {
+    master_cmd_code.master_cmd_code = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CMD_CODE,
+                                (uint8_t *)&master_cmd_code, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Master command code used for stamping for sensor sync.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of master_cmd_code in
+  *                reg MASTER_CMD_CODE
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_cmd_sens_sync_get(const stmdev_ctx_t *ctx,
+                                         uint8_t *val)
+{
+  lsm6ds3tr_c_master_cmd_code_t master_cmd_code;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CMD_CODE,
+                             (uint8_t *)&master_cmd_code, 1);
+  *val = master_cmd_code.master_cmd_code;
+
+  return ret;
+}
+
+/**
+  * @brief  Error code used for sensor synchronization.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of error_code in
+  *                reg SENS_SYNC_SPI_ERROR_CODE.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_spi_sync_error_set(const stmdev_ctx_t *ctx,
+                                          uint8_t val)
+{
+  lsm6ds3tr_c_sens_sync_spi_error_code_t sens_sync_spi_error_code;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE,
+                             (uint8_t *)&sens_sync_spi_error_code, 1);
+
+  if (ret == 0)
+  {
+    sens_sync_spi_error_code.error_code = val;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE,
+                                (uint8_t *)&sens_sync_spi_error_code, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Error code used for sensor synchronization.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of error_code in
+  *                reg SENS_SYNC_SPI_ERROR_CODE.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_spi_sync_error_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *val)
+{
+  lsm6ds3tr_c_sens_sync_spi_error_code_t sens_sync_spi_error_code;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE,
+                             (uint8_t *)&sens_sync_spi_error_code, 1);
+  *val =  sens_sync_spi_error_code.error_code;
+
+  return ret;
+}
+
+/**
+  * @brief   Number of external sensors to be read by the sensor hub.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of aux_sens_on in reg SLAVE0_CONFIG.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_num_of_dev_connected_set(const stmdev_ctx_t *ctx,
+                                                lsm6ds3tr_c_aux_sens_on_t val)
+{
+  lsm6ds3tr_c_slave0_config_t slave0_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                               (uint8_t *)&slave0_config, 1);
+
+    if (ret == 0)
+    {
+      slave0_config.aux_sens_on = (uint8_t) val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                                  (uint8_t *)&slave0_config, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Number of external sensors to be read by the sensor hub.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of aux_sens_on in reg SLAVE0_CONFIG.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_num_of_dev_connected_get(const stmdev_ctx_t *ctx,
+                                                lsm6ds3tr_c_aux_sens_on_t *val)
+{
+  lsm6ds3tr_c_slave0_config_t slave0_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                               (uint8_t *)&slave0_config, 1);
+
+    if (ret == 0)
+    {
+      switch (slave0_config.aux_sens_on)
+      {
+        case LSM6DS3TR_C_SLV_0:
+          *val = LSM6DS3TR_C_SLV_0;
+          break;
+
+        case LSM6DS3TR_C_SLV_0_1:
+          *val = LSM6DS3TR_C_SLV_0_1;
+          break;
+
+        case LSM6DS3TR_C_SLV_0_1_2:
+          *val = LSM6DS3TR_C_SLV_0_1_2;
+          break;
+
+        case LSM6DS3TR_C_SLV_0_1_2_3:
+          *val = LSM6DS3TR_C_SLV_0_1_2_3;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_SLV_EN_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 0 for perform a write.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure that contain:
+  *                  - uint8_t slv_add;    8 bit i2c device address
+  *                  - uint8_t slv_subadd; 8 bit register device address
+  *                  - uint8_t slv_data;   8 bit data to write
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_cfg_write(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_sh_cfg_write_t *val)
+{
+  lsm6ds3tr_c_slv0_add_t slv0_add;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    slv0_add.slave0_add = val->slv0_add;
+    slv0_add.rw_0 = 0;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_ADD,
+                                (uint8_t *)&slv0_add, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_SUBADD,
+                                  &(val->slv0_subadd), 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_write_reg(ctx,
+                                    LSM6DS3TR_C_DATAWRITE_SRC_MODE_SUB_SLV0,
+                                    &(val->slv0_data), 1);
+
+        if (ret == 0)
+        {
+          ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 0 for perform a read.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure that contain:
+  *                  - uint8_t slv_add;    8 bit i2c device address
+  *                  - uint8_t slv_subadd; 8 bit register device address
+  *                  - uint8_t slv_len;    num of bit to read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slv0_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val)
+{
+  lsm6ds3tr_c_slave0_config_t slave0_config;
+  lsm6ds3tr_c_slv0_add_t slv0_add;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    slv0_add.slave0_add = val->slv_add;
+    slv0_add.rw_0 = 1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_ADD,
+                                (uint8_t *)&slv0_add, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_SUBADD,
+                                  &(val->slv_subadd), 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                                   (uint8_t *)&slave0_config, 1);
+        slave0_config.slave0_numop = val->slv_len;
+
+        if (ret == 0)
+        {
+          ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                                      (uint8_t *)&slave0_config, 1);
+
+          if (ret == 0)
+          {
+            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+          }
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 1 for perform a read.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure that contain:
+  *                  - uint8_t slv_add;    8 bit i2c device address
+  *                  - uint8_t slv_subadd; 8 bit register device address
+  *                  - uint8_t slv_len;    num of bit to read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slv1_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val)
+{
+  lsm6ds3tr_c_slave1_config_t slave1_config;
+  lsm6ds3tr_c_slv1_add_t slv1_add;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    slv1_add.slave1_add  = val->slv_add;
+    slv1_add.r_1 = 1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV1_ADD,
+                                (uint8_t *)&slv1_add, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV1_SUBADD,
+                                  &(val->slv_subadd), 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                                   (uint8_t *)&slave1_config, 1);
+        slave1_config.slave1_numop = val->slv_len;
+
+        if (ret == 0)
+        {
+          ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                                      (uint8_t *)&slave1_config, 1);
+
+          if (ret == 0)
+          {
+            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+          }
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 2 for perform a read.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure that contain:
+  *                  - uint8_t slv_add;    8 bit i2c device address
+  *                  - uint8_t slv_subadd; 8 bit register device address
+  *                  - uint8_t slv_len;    num of bit to read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slv2_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val)
+{
+  lsm6ds3tr_c_slv2_add_t slv2_add;
+  lsm6ds3tr_c_slave2_config_t slave2_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    slv2_add.slave2_add  = val->slv_add;
+    slv2_add.r_2 = 1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV2_ADD,
+                                (uint8_t *)&slv2_add, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV2_SUBADD,
+                                  &(val->slv_subadd), 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG,
+                                   (uint8_t *)&slave2_config, 1);
+
+        if (ret == 0)
+        {
+          slave2_config.slave2_numop = val->slv_len;
+          ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG,
+                                      (uint8_t *)&slave2_config, 1);
+
+          if (ret == 0)
+          {
+            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+          }
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 3 for perform a read.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Structure that contain:
+  *                  - uint8_t slv_add;    8 bit i2c device address
+  *                  - uint8_t slv_subadd; 8 bit register device address
+  *                  - uint8_t slv_len;    num of bit to read
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slv3_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val)
+{
+  lsm6ds3tr_c_slave3_config_t slave3_config;
+  lsm6ds3tr_c_slv3_add_t slv3_add;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    slv3_add.slave3_add  = val->slv_add;
+    slv3_add.r_3 = 1;
+    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV3_ADD,
+                                (uint8_t *)&slv3_add, 1);
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV3_SUBADD,
+                                  (uint8_t *) & (val->slv_subadd), 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG,
+                                   (uint8_t *)&slave3_config, 1);
+
+        if (ret == 0)
+        {
+          slave3_config.slave3_numop = val->slv_len;
+          ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG,
+                                      (uint8_t *)&slave3_config, 1);
+
+          if (ret == 0)
+          {
+            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+          }
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 0 starting from the
+  *         sensor hub trigger.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of slave0_rate in reg SLAVE0_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_0_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave0_rate_t val)
+{
+  lsm6ds3tr_c_slave0_config_t slave0_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                               (uint8_t *)&slave0_config, 1);
+
+    if (ret == 0)
+    {
+      slave0_config.slave0_rate = (uint8_t) val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                                  (uint8_t *)&slave0_config, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 0 starting from the
+  *         sensor hub trigger.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of slave0_rate in reg SLAVE0_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_0_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave0_rate_t *val)
+{
+  lsm6ds3tr_c_slave0_config_t slave0_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG,
+                               (uint8_t *)&slave0_config, 1);
+
+    if (ret == 0)
+    {
+      switch (slave0_config.slave0_rate)
+      {
+        case LSM6DS3TR_C_SL0_NO_DEC:
+          *val = LSM6DS3TR_C_SL0_NO_DEC;
+          break;
+
+        case LSM6DS3TR_C_SL0_DEC_2:
+          *val = LSM6DS3TR_C_SL0_DEC_2;
+          break;
+
+        case LSM6DS3TR_C_SL0_DEC_4:
+          *val = LSM6DS3TR_C_SL0_DEC_4;
+          break;
+
+        case LSM6DS3TR_C_SL0_DEC_8:
+          *val = LSM6DS3TR_C_SL0_DEC_8;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_SL0_DEC_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Slave 0 write operation is performed only at the first sensor
+  *         hub cycle.
+  *         This is effective if the Aux_sens_on[1:0] field in
+  *         SLAVE0_CONFIG(04h) is set to a value other than 00.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of write_once in reg SLAVE1_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_write_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_write_once_t val)
+{
+  lsm6ds3tr_c_slave1_config_t slave1_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                               (uint8_t *)&slave1_config, 1);
+    slave1_config.write_once = (uint8_t) val;
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                                  (uint8_t *)&slave1_config, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Slave 0 write operation is performed only at the first sensor
+  *         hub cycle.
+  *         This is effective if the Aux_sens_on[1:0] field in
+  *         SLAVE0_CONFIG(04h) is set to a value other than 00.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of write_once in reg SLAVE1_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_write_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_write_once_t *val)
+{
+  lsm6ds3tr_c_slave1_config_t slave1_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                               (uint8_t *)&slave1_config, 1);
+
+    if (ret == 0)
+    {
+      switch (slave1_config.write_once)
+      {
+        case LSM6DS3TR_C_EACH_SH_CYCLE:
+          *val = LSM6DS3TR_C_EACH_SH_CYCLE;
+          break;
+
+        case LSM6DS3TR_C_ONLY_FIRST_CYCLE:
+          *val = LSM6DS3TR_C_ONLY_FIRST_CYCLE;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_SH_WR_MODE_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 1 starting from the
+  *         sensor hub trigger.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of slave1_rate in reg SLAVE1_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_1_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave1_rate_t val)
+{
+  lsm6ds3tr_c_slave1_config_t slave1_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                               (uint8_t *)&slave1_config, 1);
+
+    if (ret == 0)
+    {
+      slave1_config.slave1_rate = (uint8_t) val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                                  (uint8_t *)&slave1_config, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 1 starting from the
+  *         sensor hub trigger.[get]
+  *
+  * @param  ctx    Read / write interface definitions reg SLAVE1_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_1_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave1_rate_t *val)
+{
+  lsm6ds3tr_c_slave1_config_t slave1_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG,
+                               (uint8_t *)&slave1_config, 1);
+
+    if (ret == 0)
+    {
+      switch (slave1_config.slave1_rate)
+      {
+        case LSM6DS3TR_C_SL1_NO_DEC:
+          *val = LSM6DS3TR_C_SL1_NO_DEC;
+          break;
+
+        case LSM6DS3TR_C_SL1_DEC_2:
+          *val = LSM6DS3TR_C_SL1_DEC_2;
+          break;
+
+        case LSM6DS3TR_C_SL1_DEC_4:
+          *val = LSM6DS3TR_C_SL1_DEC_4;
+          break;
+
+        case LSM6DS3TR_C_SL1_DEC_8:
+          *val = LSM6DS3TR_C_SL1_DEC_8;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_SL1_DEC_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 2 starting from the
+  *         sensor hub trigger.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of slave2_rate in reg SLAVE2_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_2_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave2_rate_t val)
+{
+  lsm6ds3tr_c_slave2_config_t slave2_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG,
+                               (uint8_t *)&slave2_config, 1);
+
+    if (ret == 0)
+    {
+      slave2_config.slave2_rate = (uint8_t) val;
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG,
+                                  (uint8_t *)&slave2_config, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 2 starting from the
+  *         sensor hub trigger.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of slave2_rate in reg SLAVE2_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_2_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave2_rate_t *val)
+{
+  lsm6ds3tr_c_slave2_config_t slave2_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG,
+                               (uint8_t *)&slave2_config, 1);
+
+    if (ret == 0)
+    {
+      switch (slave2_config.slave2_rate)
+      {
+        case LSM6DS3TR_C_SL2_NO_DEC:
+          *val = LSM6DS3TR_C_SL2_NO_DEC;
+          break;
+
+        case LSM6DS3TR_C_SL2_DEC_2:
+          *val = LSM6DS3TR_C_SL2_DEC_2;
+          break;
+
+        case LSM6DS3TR_C_SL2_DEC_4:
+          *val = LSM6DS3TR_C_SL2_DEC_4;
+          break;
+
+        case LSM6DS3TR_C_SL2_DEC_8:
+          *val = LSM6DS3TR_C_SL2_DEC_8;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_SL2_DEC_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 3 starting from the
+  *         sensor hub trigger.[set]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Change the values of slave3_rate in reg SLAVE3_CONFIG
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_3_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave3_rate_t val)
+{
+  lsm6ds3tr_c_slave3_config_t slave3_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG,
+                               (uint8_t *)&slave3_config, 1);
+    slave3_config.slave3_rate = (uint8_t)val;
+
+    if (ret == 0)
+    {
+      ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG,
+                                  (uint8_t *)&slave3_config, 1);
+
+      if (ret == 0)
+      {
+        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Decimation of read operation on Slave 3 starting from the
+  *         sensor hub trigger.[get]
+  *
+  * @param  ctx    Read / write interface definitions
+  * @param  val    Get the values of slave3_rate in reg SLAVE3_CONFIG.
+  * @retval        Interface status (MANDATORY: return 0 -> no Error).
+  *
+  */
+int32_t lsm6ds3tr_c_sh_slave_3_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave3_rate_t *val)
+{
+  lsm6ds3tr_c_slave3_config_t slave3_config;
+  int32_t ret;
+
+  ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
+
+  if (ret == 0)
+  {
+    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG,
+                               (uint8_t *)&slave3_config, 1);
+
+    if (ret == 0)
+    {
+      switch (slave3_config.slave3_rate)
+      {
+        case LSM6DS3TR_C_SL3_NO_DEC:
+          *val = LSM6DS3TR_C_SL3_NO_DEC;
+          break;
+
+        case LSM6DS3TR_C_SL3_DEC_2:
+          *val = LSM6DS3TR_C_SL3_DEC_2;
+          break;
+
+        case LSM6DS3TR_C_SL3_DEC_4:
+          *val = LSM6DS3TR_C_SL3_DEC_4;
+          break;
+
+        case LSM6DS3TR_C_SL3_DEC_8:
+          *val = LSM6DS3TR_C_SL3_DEC_8;
+          break;
+
+        default:
+          *val = LSM6DS3TR_C_SL3_DEC_ND;
+          break;
+      }
+
+      ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @}
+  *
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

lib/lsm6ds3tr-api/lsm6ds3tr-c_reg.h

@@ -0,0 +1,2804 @@
+/**
+  ******************************************************************************
+  * @file    lsm6ds3tr_c_reg.h
+  * @author  Sensors Software Solution Team
+  * @brief   This file contains all the functions prototypes for the
+  *          lsm6ds3tr_c_reg.c driver.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef LSM6DS3TR_C_DRIVER_H
+#define LSM6DS3TR_C_DRIVER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdint.h>
+#include <stddef.h>
+#include <math.h>
+
+/** @addtogroup LSM6DS3TR_C
+  * @{
+  *
+  */
+
+/** @defgroup  Endianness definitions
+  * @{
+  *
+  */
+
+#ifndef DRV_BYTE_ORDER
+#ifndef __BYTE_ORDER__
+
+#define DRV_LITTLE_ENDIAN 1234
+#define DRV_BIG_ENDIAN    4321
+
+/** if _BYTE_ORDER is not defined, choose the endianness of your architecture
+  * by uncommenting the define which fits your platform endianness
+  */
+//#define DRV_BYTE_ORDER    DRV_BIG_ENDIAN
+#define DRV_BYTE_ORDER    DRV_LITTLE_ENDIAN
+
+#else /* defined __BYTE_ORDER__ */
+
+#define DRV_LITTLE_ENDIAN  __ORDER_LITTLE_ENDIAN__
+#define DRV_BIG_ENDIAN     __ORDER_BIG_ENDIAN__
+#define DRV_BYTE_ORDER     __BYTE_ORDER__
+
+#endif /* __BYTE_ORDER__*/
+#endif /* DRV_BYTE_ORDER */
+
+/**
+  * @}
+  *
+  */
+
+/** @defgroup STMicroelectronics sensors common types
+  * @{
+  *
+  */
+
+#ifndef MEMS_SHARED_TYPES
+#define MEMS_SHARED_TYPES
+
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0       : 1;
+  uint8_t bit1       : 1;
+  uint8_t bit2       : 1;
+  uint8_t bit3       : 1;
+  uint8_t bit4       : 1;
+  uint8_t bit5       : 1;
+  uint8_t bit6       : 1;
+  uint8_t bit7       : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7       : 1;
+  uint8_t bit6       : 1;
+  uint8_t bit5       : 1;
+  uint8_t bit4       : 1;
+  uint8_t bit3       : 1;
+  uint8_t bit2       : 1;
+  uint8_t bit1       : 1;
+  uint8_t bit0       : 1;
+#endif /* DRV_BYTE_ORDER */
+} bitwise_t;
+
+#define PROPERTY_DISABLE                (0U)
+#define PROPERTY_ENABLE                 (1U)
+
+/** @addtogroup  Interfaces_Functions
+  * @brief       This section provide a set of functions used to read and
+  *              write a generic register of the device.
+  *              MANDATORY: return 0 -> no Error.
+  * @{
+  *
+  */
+
+typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, const uint8_t *, uint16_t);
+typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
+typedef void (*stmdev_mdelay_ptr)(uint32_t millisec);
+
+typedef struct
+{
+  /** Component mandatory fields **/
+  stmdev_write_ptr  write_reg;
+  stmdev_read_ptr   read_reg;
+  /** Component optional fields **/
+  stmdev_mdelay_ptr   mdelay;
+  /** Customizable optional pointer **/
+  void *handle;
+} stmdev_ctx_t;
+
+/**
+  * @}
+  *
+  */
+
+#endif /* MEMS_SHARED_TYPES */
+
+#ifndef MEMS_UCF_SHARED_TYPES
+#define MEMS_UCF_SHARED_TYPES
+
+/** @defgroup    Generic address-data structure definition
+  * @brief       This structure is useful to load a predefined configuration
+  *              of a sensor.
+  *              You can create a sensor configuration by your own or using
+  *              Unico / Unicleo tools available on STMicroelectronics
+  *              web site.
+  *
+  * @{
+  *
+  */
+
+typedef struct
+{
+  uint8_t address;
+  uint8_t data;
+} ucf_line_t;
+
+/**
+  * @}
+  *
+  */
+
+#endif /* MEMS_UCF_SHARED_TYPES */
+
+/**
+  * @}
+  *
+  */
+
+/** @defgroup LSM6DS3TR_C_Infos
+  * @{
+  *
+  */
+
+/** I2C Device Address 8 bit format  if SA0=0 -> D5 if SA0=1 -> D7 **/
+#define LSM6DS3TR_C_I2C_ADD_L     0xD5U
+#define LSM6DS3TR_C_I2C_ADD_H     0xD7U
+
+/** Device Identification (Who am I) **/
+#define LSM6DS3TR_C_ID            0x6AU
+
+/**
+  * @}
+  *
+  */
+
+#define LSM6DS3TR_C_FUNC_CFG_ACCESS              0x01U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t func_cfg_en              : 3;  /* func_cfg_en + func_cfg_en_b */
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t func_cfg_en              : 3;  /* func_cfg_en + func_cfg_en_b */
+  uint8_t not_used_01              : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_func_cfg_access_t;
+
+#define LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME       0x04U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t tph                      : 4;
+  uint8_t not_used_01              : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 4;
+  uint8_t tph                      : 4;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensor_sync_time_frame_t;
+
+#define LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO        0x05U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t rr                       : 2;
+  uint8_t not_used_01              : 6;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 6;
+  uint8_t rr                       : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensor_sync_res_ratio_t;
+
+#define LSM6DS3TR_C_FIFO_CTRL1                   0x06U
+typedef struct
+{
+  uint8_t fth                      : 8;  /* + FIFO_CTRL2(fth) */
+} lsm6ds3tr_c_fifo_ctrl1_t;
+
+#define LSM6DS3TR_C_FIFO_CTRL2                   0x07U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fth                      : 3;  /* + FIFO_CTRL1(fth) */
+  uint8_t fifo_temp_en             : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t timer_pedo_fifo_drdy     : 1;
+  uint8_t timer_pedo_fifo_en       : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t timer_pedo_fifo_en       : 1;
+  uint8_t timer_pedo_fifo_drdy     : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t fifo_temp_en             : 1;
+  uint8_t fth                      : 3;  /* + FIFO_CTRL1(fth) */
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_fifo_ctrl2_t;
+
+#define LSM6DS3TR_C_FIFO_CTRL3                   0x08U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t dec_fifo_xl              : 3;
+  uint8_t dec_fifo_gyro            : 3;
+  uint8_t not_used_01              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t dec_fifo_gyro            : 3;
+  uint8_t dec_fifo_xl              : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_fifo_ctrl3_t;
+
+#define LSM6DS3TR_C_FIFO_CTRL4                   0x09U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t dec_ds3_fifo             : 3;
+  uint8_t dec_ds4_fifo             : 3;
+  uint8_t only_high_data           : 1;
+  uint8_t stop_on_fth              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t stop_on_fth              : 1;
+  uint8_t only_high_data           : 1;
+  uint8_t dec_ds4_fifo             : 3;
+  uint8_t dec_ds3_fifo             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_fifo_ctrl4_t;
+
+#define LSM6DS3TR_C_FIFO_CTRL5                   0x0AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fifo_mode                : 3;
+  uint8_t odr_fifo                 : 4;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t odr_fifo                 : 4;
+  uint8_t fifo_mode                : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_fifo_ctrl5_t;
+
+#define LSM6DS3TR_C_DRDY_PULSE_CFG_G             0x0BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_wrist_tilt          : 1;
+  uint8_t not_used_01              : 6;
+  uint8_t drdy_pulsed              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t drdy_pulsed              : 1;
+  uint8_t not_used_01              : 6;
+  uint8_t int2_wrist_tilt          : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_drdy_pulse_cfg_g_t;
+
+#define LSM6DS3TR_C_INT1_CTRL                    0x0DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int1_drdy_xl             : 1;
+  uint8_t int1_drdy_g              : 1;
+  uint8_t int1_boot                : 1;
+  uint8_t int1_fth                 : 1;
+  uint8_t int1_fifo_ovr            : 1;
+  uint8_t int1_full_flag           : 1;
+  uint8_t int1_sign_mot            : 1;
+  uint8_t int1_step_detector       : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int1_step_detector       : 1;
+  uint8_t int1_sign_mot            : 1;
+  uint8_t int1_full_flag           : 1;
+  uint8_t int1_fifo_ovr            : 1;
+  uint8_t int1_fth                 : 1;
+  uint8_t int1_boot                : 1;
+  uint8_t int1_drdy_g              : 1;
+  uint8_t int1_drdy_xl             : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_int1_ctrl_t;
+
+#define LSM6DS3TR_C_INT2_CTRL                    0x0EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_drdy_xl             : 1;
+  uint8_t int2_drdy_g              : 1;
+  uint8_t int2_drdy_temp           : 1;
+  uint8_t int2_fth                 : 1;
+  uint8_t int2_fifo_ovr            : 1;
+  uint8_t int2_full_flag           : 1;
+  uint8_t int2_step_count_ov       : 1;
+  uint8_t int2_step_delta          : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_step_delta          : 1;
+  uint8_t int2_step_count_ov       : 1;
+  uint8_t int2_full_flag           : 1;
+  uint8_t int2_fifo_ovr            : 1;
+  uint8_t int2_fth                 : 1;
+  uint8_t int2_drdy_temp           : 1;
+  uint8_t int2_drdy_g              : 1;
+  uint8_t int2_drdy_xl             : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_int2_ctrl_t;
+
+#define LSM6DS3TR_C_WHO_AM_I                     0x0FU
+#define LSM6DS3TR_C_CTRL1_XL                     0x10U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bw0_xl                   : 1;
+  uint8_t lpf1_bw_sel              : 1;
+  uint8_t fs_xl                    : 2;
+  uint8_t odr_xl                   : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t odr_xl                   : 4;
+  uint8_t fs_xl                    : 2;
+  uint8_t lpf1_bw_sel              : 1;
+  uint8_t bw0_xl                   : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl1_xl_t;
+
+#define LSM6DS3TR_C_CTRL2_G                      0x11U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t fs_g                     : 3;  /* fs_g + fs_125 */
+  uint8_t odr_g                    : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t odr_g                    : 4;
+  uint8_t fs_g                     : 3;  /* fs_g + fs_125 */
+  uint8_t not_used_01              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl2_g_t;
+
+#define LSM6DS3TR_C_CTRL3_C                      0x12U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sw_reset                 : 1;
+  uint8_t ble                      : 1;
+  uint8_t if_inc                   : 1;
+  uint8_t sim                      : 1;
+  uint8_t pp_od                    : 1;
+  uint8_t h_lactive                : 1;
+  uint8_t bdu                      : 1;
+  uint8_t boot                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t boot                     : 1;
+  uint8_t bdu                      : 1;
+  uint8_t h_lactive                : 1;
+  uint8_t pp_od                    : 1;
+  uint8_t sim                      : 1;
+  uint8_t if_inc                   : 1;
+  uint8_t ble                      : 1;
+  uint8_t sw_reset                 : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl3_c_t;
+
+#define LSM6DS3TR_C_CTRL4_C                      0x13U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t lpf1_sel_g               : 1;
+  uint8_t i2c_disable              : 1;
+  uint8_t drdy_mask                : 1;
+  uint8_t den_drdy_int1            : 1;
+  uint8_t int2_on_int1             : 1;
+  uint8_t sleep                    : 1;
+  uint8_t den_xl_en                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_xl_en                : 1;
+  uint8_t sleep                    : 1;
+  uint8_t int2_on_int1             : 1;
+  uint8_t den_drdy_int1            : 1;
+  uint8_t drdy_mask                : 1;
+  uint8_t i2c_disable              : 1;
+  uint8_t lpf1_sel_g               : 1;
+  uint8_t not_used_01              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl4_c_t;
+
+#define LSM6DS3TR_C_CTRL5_C                      0x14U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t st_xl                    : 2;
+  uint8_t st_g                     : 2;
+  uint8_t den_lh                   : 1;
+  uint8_t rounding                 : 3;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t rounding                 : 3;
+  uint8_t den_lh                   : 1;
+  uint8_t st_g                     : 2;
+  uint8_t st_xl                    : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl5_c_t;
+
+#define LSM6DS3TR_C_CTRL6_C                      0x15U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ftype                    : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t usr_off_w                : 1;
+  uint8_t xl_hm_mode               : 1;
+  uint8_t den_mode                 : 3;  /* trig_en + lvl_en + lvl2_en */
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_mode                 : 3;  /* trig_en + lvl_en + lvl2_en */
+  uint8_t xl_hm_mode               : 1;
+  uint8_t usr_off_w                : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t ftype                    : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl6_c_t;
+
+#define LSM6DS3TR_C_CTRL7_G                      0x16U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t rounding_status          : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t hpm_g                    : 2;
+  uint8_t hp_en_g                  : 1;
+  uint8_t g_hm_mode                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t g_hm_mode                : 1;
+  uint8_t hp_en_g                  : 1;
+  uint8_t hpm_g                    : 2;
+  uint8_t not_used_02              : 1;
+  uint8_t rounding_status          : 1;
+  uint8_t not_used_01              : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl7_g_t;
+
+#define LSM6DS3TR_C_CTRL8_XL                     0x17U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t low_pass_on_6d           : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t hp_slope_xl_en           : 1;
+  uint8_t input_composite          : 1;
+  uint8_t hp_ref_mode              : 1;
+  uint8_t hpcf_xl                  : 2;
+  uint8_t lpf2_xl_en               : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t lpf2_xl_en               : 1;
+  uint8_t hpcf_xl                  : 2;
+  uint8_t hp_ref_mode              : 1;
+  uint8_t input_composite          : 1;
+  uint8_t hp_slope_xl_en           : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t low_pass_on_6d           : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl8_xl_t;
+
+#define LSM6DS3TR_C_CTRL9_XL                     0x18U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t soft_en                  : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t den_xl_g                 : 1;
+  uint8_t den_z                    : 1;
+  uint8_t den_y                    : 1;
+  uint8_t den_x                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_x                    : 1;
+  uint8_t den_y                    : 1;
+  uint8_t den_z                    : 1;
+  uint8_t den_xl_g                 : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t soft_en                  : 1;
+  uint8_t not_used_01              : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl9_xl_t;
+
+#define LSM6DS3TR_C_CTRL10_C                     0x19U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sign_motion_en           : 1;
+  uint8_t pedo_rst_step            : 1;
+  uint8_t func_en                  : 1;
+  uint8_t tilt_en                  : 1;
+  uint8_t pedo_en                  : 1;
+  uint8_t timer_en                 : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t wrist_tilt_en            : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t wrist_tilt_en            : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t timer_en                 : 1;
+  uint8_t pedo_en                  : 1;
+  uint8_t tilt_en                  : 1;
+  uint8_t func_en                  : 1;
+  uint8_t pedo_rst_step            : 1;
+  uint8_t sign_motion_en           : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_ctrl10_c_t;
+
+#define LSM6DS3TR_C_MASTER_CONFIG                0x1AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t master_on                : 1;
+  uint8_t iron_en                  : 1;
+  uint8_t pass_through_mode        : 1;
+  uint8_t pull_up_en               : 1;
+  uint8_t start_config             : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t data_valid_sel_fifo      : 1;
+  uint8_t drdy_on_int1             : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t drdy_on_int1             : 1;
+  uint8_t data_valid_sel_fifo      : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t start_config             : 1;
+  uint8_t pull_up_en               : 1;
+  uint8_t pass_through_mode        : 1;
+  uint8_t iron_en                  : 1;
+  uint8_t master_on                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_master_config_t;
+
+#define LSM6DS3TR_C_WAKE_UP_SRC                  0x1BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t z_wu                     : 1;
+  uint8_t y_wu                     : 1;
+  uint8_t x_wu                     : 1;
+  uint8_t wu_ia                    : 1;
+  uint8_t sleep_state_ia           : 1;
+  uint8_t ff_ia                    : 1;
+  uint8_t not_used_01              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t ff_ia                    : 1;
+  uint8_t sleep_state_ia           : 1;
+  uint8_t wu_ia                    : 1;
+  uint8_t x_wu                     : 1;
+  uint8_t y_wu                     : 1;
+  uint8_t z_wu                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_wake_up_src_t;
+
+#define LSM6DS3TR_C_TAP_SRC                      0x1CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t z_tap                    : 1;
+  uint8_t y_tap                    : 1;
+  uint8_t x_tap                    : 1;
+  uint8_t tap_sign                 : 1;
+  uint8_t double_tap               : 1;
+  uint8_t single_tap               : 1;
+  uint8_t tap_ia                   : 1;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t tap_ia                   : 1;
+  uint8_t single_tap               : 1;
+  uint8_t double_tap               : 1;
+  uint8_t tap_sign                 : 1;
+  uint8_t x_tap                    : 1;
+  uint8_t y_tap                    : 1;
+  uint8_t z_tap                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_tap_src_t;
+
+#define LSM6DS3TR_C_D6D_SRC                      0x1DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t xl                       : 1;
+  uint8_t xh                       : 1;
+  uint8_t yl                       : 1;
+  uint8_t yh                       : 1;
+  uint8_t zl                       : 1;
+  uint8_t zh                       : 1;
+  uint8_t d6d_ia                   : 1;
+  uint8_t den_drdy                 : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_drdy                 : 1;
+  uint8_t d6d_ia                   : 1;
+  uint8_t zh                       : 1;
+  uint8_t zl                       : 1;
+  uint8_t yh                       : 1;
+  uint8_t yl                       : 1;
+  uint8_t xh                       : 1;
+  uint8_t xl                       : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_d6d_src_t;
+
+#define LSM6DS3TR_C_STATUS_REG                   0x1EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t xlda                     : 1;
+  uint8_t gda                      : 1;
+  uint8_t tda                      : 1;
+  uint8_t not_used_01              : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t tda                      : 1;
+  uint8_t gda                      : 1;
+  uint8_t xlda                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_status_reg_t;
+
+#define LSM6DS3TR_C_OUT_TEMP_L                   0x20U
+#define LSM6DS3TR_C_OUT_TEMP_H                   0x21U
+#define LSM6DS3TR_C_OUTX_L_G                     0x22U
+#define LSM6DS3TR_C_OUTX_H_G                     0x23U
+#define LSM6DS3TR_C_OUTY_L_G                     0x24U
+#define LSM6DS3TR_C_OUTY_H_G                     0x25U
+#define LSM6DS3TR_C_OUTZ_L_G                     0x26U
+#define LSM6DS3TR_C_OUTZ_H_G                     0x27U
+#define LSM6DS3TR_C_OUTX_L_XL                    0x28U
+#define LSM6DS3TR_C_OUTX_H_XL                    0x29U
+#define LSM6DS3TR_C_OUTY_L_XL                    0x2AU
+#define LSM6DS3TR_C_OUTY_H_XL                    0x2BU
+#define LSM6DS3TR_C_OUTZ_L_XL                    0x2CU
+#define LSM6DS3TR_C_OUTZ_H_XL                    0x2DU
+#define LSM6DS3TR_C_SENSORHUB1_REG               0x2EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub1_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB2_REG               0x2FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub2_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB3_REG               0x30U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub3_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB4_REG               0x31U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub4_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB5_REG               0x32U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub5_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB6_REG               0x33U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub6_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB7_REG               0x34U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub7_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB8_REG               0x35U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub8_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB9_REG               0x36U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub9_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB10_REG              0x37U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub10_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB11_REG              0x38U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub11_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB12_REG              0x39U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub12_reg_t;
+
+#define LSM6DS3TR_C_FIFO_STATUS1                 0x3AU
+typedef struct
+{
+  uint8_t diff_fifo                : 8;  /* + FIFO_STATUS2(diff_fifo) */
+} lsm6ds3tr_c_fifo_status1_t;
+
+#define LSM6DS3TR_C_FIFO_STATUS2                 0x3BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t diff_fifo                : 3;  /* + FIFO_STATUS1(diff_fifo) */
+  uint8_t not_used_01              : 1;
+  uint8_t fifo_empty               : 1;
+  uint8_t fifo_full_smart          : 1;
+  uint8_t over_run                 : 1;
+  uint8_t waterm                   : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t waterm                   : 1;
+  uint8_t over_run                 : 1;
+  uint8_t fifo_full_smart          : 1;
+  uint8_t fifo_empty               : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t diff_fifo                : 3;  /* + FIFO_STATUS1(diff_fifo) */
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_fifo_status2_t;
+
+#define LSM6DS3TR_C_FIFO_STATUS3                 0x3CU
+typedef struct
+{
+  uint8_t fifo_pattern             : 8;  /* + FIFO_STATUS4(fifo_pattern) */
+} lsm6ds3tr_c_fifo_status3_t;
+
+#define LSM6DS3TR_C_FIFO_STATUS4                 0x3DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fifo_pattern             : 2;  /* + FIFO_STATUS3(fifo_pattern) */
+  uint8_t not_used_01              : 6;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 6;
+  uint8_t fifo_pattern             : 2;  /* + FIFO_STATUS3(fifo_pattern) */
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_fifo_status4_t;
+
+#define LSM6DS3TR_C_FIFO_DATA_OUT_L              0x3EU
+#define LSM6DS3TR_C_FIFO_DATA_OUT_H              0x3FU
+#define LSM6DS3TR_C_TIMESTAMP0_REG               0x40U
+#define LSM6DS3TR_C_TIMESTAMP1_REG               0x41U
+#define LSM6DS3TR_C_TIMESTAMP2_REG               0x42U
+#define LSM6DS3TR_C_STEP_TIMESTAMP_L             0x49U
+#define LSM6DS3TR_C_STEP_TIMESTAMP_H             0x4AU
+#define LSM6DS3TR_C_STEP_COUNTER_L               0x4BU
+#define LSM6DS3TR_C_STEP_COUNTER_H               0x4CU
+
+#define LSM6DS3TR_C_SENSORHUB13_REG              0x4DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub13_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB14_REG              0x4EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub14_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB15_REG              0x4FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub15_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB16_REG              0x50U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub16_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB17_REG              0x51U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub17_reg_t;
+
+#define LSM6DS3TR_C_SENSORHUB18_REG              0x52U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit7                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                     : 1;
+  uint8_t bit6                     : 1;
+  uint8_t bit5                     : 1;
+  uint8_t bit4                     : 1;
+  uint8_t bit3                     : 1;
+  uint8_t bit2                     : 1;
+  uint8_t bit1                     : 1;
+  uint8_t bit0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_sensorhub18_reg_t;
+
+#define LSM6DS3TR_C_FUNC_SRC1                    0x53U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sensorhub_end_op         : 1;
+  uint8_t si_end_op                : 1;
+  uint8_t hi_fail                  : 1;
+  uint8_t step_overflow            : 1;
+  uint8_t step_detected            : 1;
+  uint8_t tilt_ia                  : 1;
+  uint8_t sign_motion_ia           : 1;
+  uint8_t step_count_delta_ia      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t step_count_delta_ia      : 1;
+  uint8_t sign_motion_ia           : 1;
+  uint8_t tilt_ia                  : 1;
+  uint8_t step_detected            : 1;
+  uint8_t step_overflow            : 1;
+  uint8_t hi_fail                  : 1;
+  uint8_t si_end_op                : 1;
+  uint8_t sensorhub_end_op         : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_func_src1_t;
+
+#define LSM6DS3TR_C_FUNC_SRC2                    0x54U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t wrist_tilt_ia            : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t slave0_nack              : 1;
+  uint8_t slave1_nack              : 1;
+  uint8_t slave2_nack              : 1;
+  uint8_t slave3_nack              : 1;
+  uint8_t not_used_02              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 1;
+  uint8_t slave3_nack              : 1;
+  uint8_t slave2_nack              : 1;
+  uint8_t slave1_nack              : 1;
+  uint8_t slave0_nack              : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t wrist_tilt_ia            : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_func_src2_t;
+
+#define LSM6DS3TR_C_WRIST_TILT_IA                0x55U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t wrist_tilt_ia_zneg       : 1;
+  uint8_t wrist_tilt_ia_zpos       : 1;
+  uint8_t wrist_tilt_ia_yneg       : 1;
+  uint8_t wrist_tilt_ia_ypos       : 1;
+  uint8_t wrist_tilt_ia_xneg       : 1;
+  uint8_t wrist_tilt_ia_xpos       : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t wrist_tilt_ia_xpos       : 1;
+  uint8_t wrist_tilt_ia_xneg       : 1;
+  uint8_t wrist_tilt_ia_ypos       : 1;
+  uint8_t wrist_tilt_ia_yneg       : 1;
+  uint8_t wrist_tilt_ia_zpos       : 1;
+  uint8_t wrist_tilt_ia_zneg       : 1;
+  uint8_t not_used_01              : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_wrist_tilt_ia_t;
+
+#define LSM6DS3TR_C_TAP_CFG                      0x58U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t lir                      : 1;
+  uint8_t tap_z_en                 : 1;
+  uint8_t tap_y_en                 : 1;
+  uint8_t tap_x_en                 : 1;
+  uint8_t slope_fds                : 1;
+  uint8_t inact_en                 : 2;
+  uint8_t interrupts_enable        : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t interrupts_enable        : 1;
+  uint8_t inact_en                 : 2;
+  uint8_t slope_fds                : 1;
+  uint8_t tap_x_en                 : 1;
+  uint8_t tap_y_en                 : 1;
+  uint8_t tap_z_en                 : 1;
+  uint8_t lir                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_tap_cfg_t;
+
+#define LSM6DS3TR_C_TAP_THS_6D                   0x59U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t tap_ths                  : 5;
+  uint8_t sixd_ths                 : 2;
+  uint8_t d4d_en                   : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t d4d_en                   : 1;
+  uint8_t sixd_ths                 : 2;
+  uint8_t tap_ths                  : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_tap_ths_6d_t;
+
+#define LSM6DS3TR_C_INT_DUR2                     0x5AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t shock                    : 2;
+  uint8_t quiet                    : 2;
+  uint8_t dur                      : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t dur                      : 4;
+  uint8_t quiet                    : 2;
+  uint8_t shock                    : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_int_dur2_t;
+
+#define LSM6DS3TR_C_WAKE_UP_THS                  0x5BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t wk_ths                   : 6;
+  uint8_t not_used_01              : 1;
+  uint8_t single_double_tap        : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t single_double_tap        : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t wk_ths                   : 6;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_wake_up_ths_t;
+
+#define LSM6DS3TR_C_WAKE_UP_DUR                  0x5CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sleep_dur                : 4;
+  uint8_t timer_hr                 : 1;
+  uint8_t wake_dur                 : 2;
+  uint8_t ff_dur                   : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t ff_dur                   : 1;
+  uint8_t wake_dur                 : 2;
+  uint8_t timer_hr                 : 1;
+  uint8_t sleep_dur                : 4;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_wake_up_dur_t;
+
+#define LSM6DS3TR_C_FREE_FALL                    0x5DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ff_ths                   : 3;
+  uint8_t ff_dur                   : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t ff_dur                   : 5;
+  uint8_t ff_ths                   : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_free_fall_t;
+
+#define LSM6DS3TR_C_MD1_CFG                      0x5EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int1_timer               : 1;
+  uint8_t int1_tilt                : 1;
+  uint8_t int1_6d                  : 1;
+  uint8_t int1_double_tap          : 1;
+  uint8_t int1_ff                  : 1;
+  uint8_t int1_wu                  : 1;
+  uint8_t int1_single_tap          : 1;
+  uint8_t int1_inact_state         : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int1_inact_state         : 1;
+  uint8_t int1_single_tap          : 1;
+  uint8_t int1_wu                  : 1;
+  uint8_t int1_ff                  : 1;
+  uint8_t int1_double_tap          : 1;
+  uint8_t int1_6d                  : 1;
+  uint8_t int1_tilt                : 1;
+  uint8_t int1_timer               : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_md1_cfg_t;
+
+#define LSM6DS3TR_C_MD2_CFG                      0x5FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_iron                : 1;
+  uint8_t int2_tilt                : 1;
+  uint8_t int2_6d                  : 1;
+  uint8_t int2_double_tap          : 1;
+  uint8_t int2_ff                  : 1;
+  uint8_t int2_wu                  : 1;
+  uint8_t int2_single_tap          : 1;
+  uint8_t int2_inact_state         : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_inact_state         : 1;
+  uint8_t int2_single_tap          : 1;
+  uint8_t int2_wu                  : 1;
+  uint8_t int2_ff                  : 1;
+  uint8_t int2_double_tap          : 1;
+  uint8_t int2_6d                  : 1;
+  uint8_t int2_tilt                : 1;
+  uint8_t int2_iron                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_md2_cfg_t;
+
+#define LSM6DS3TR_C_MASTER_CMD_CODE              0x60U
+typedef struct
+{
+  uint8_t master_cmd_code          : 8;
+} lsm6ds3tr_c_master_cmd_code_t;
+
+#define LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE     0x61U
+typedef struct
+{
+  uint8_t error_code               : 8;
+} lsm6ds3tr_c_sens_sync_spi_error_code_t;
+
+#define LSM6DS3TR_C_OUT_MAG_RAW_X_L              0x66U
+#define LSM6DS3TR_C_OUT_MAG_RAW_X_H              0x67U
+#define LSM6DS3TR_C_OUT_MAG_RAW_Y_L              0x68U
+#define LSM6DS3TR_C_OUT_MAG_RAW_Y_H              0x69U
+#define LSM6DS3TR_C_OUT_MAG_RAW_Z_L              0x6AU
+#define LSM6DS3TR_C_OUT_MAG_RAW_Z_H              0x6BU
+#define LSM6DS3TR_C_X_OFS_USR                    0x73U
+#define LSM6DS3TR_C_Y_OFS_USR                    0x74U
+#define LSM6DS3TR_C_Z_OFS_USR                    0x75U
+#define LSM6DS3TR_C_SLV0_ADD                     0x02U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t rw_0                     : 1;
+  uint8_t slave0_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave0_add               : 7;
+  uint8_t rw_0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slv0_add_t;
+
+#define LSM6DS3TR_C_SLV0_SUBADD                  0x03U
+typedef struct
+{
+  uint8_t slave0_reg               : 8;
+} lsm6ds3tr_c_slv0_subadd_t;
+
+#define LSM6DS3TR_C_SLAVE0_CONFIG                0x04U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave0_numop             : 3;
+  uint8_t src_mode                 : 1;
+  uint8_t aux_sens_on              : 2;
+  uint8_t slave0_rate              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave0_rate              : 2;
+  uint8_t aux_sens_on              : 2;
+  uint8_t src_mode                 : 1;
+  uint8_t slave0_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slave0_config_t;
+
+#define LSM6DS3TR_C_SLV1_ADD                     0x05U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t r_1                      : 1;
+  uint8_t slave1_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave1_add               : 7;
+  uint8_t r_1                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slv1_add_t;
+
+#define LSM6DS3TR_C_SLV1_SUBADD                  0x06U
+typedef struct
+{
+  uint8_t slave1_reg               : 8;
+} lsm6ds3tr_c_slv1_subadd_t;
+
+#define LSM6DS3TR_C_SLAVE1_CONFIG                0x07U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave1_numop             : 3;
+  uint8_t not_used_01              : 2;
+  uint8_t write_once               : 1;
+  uint8_t slave1_rate              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave1_rate              : 2;
+  uint8_t write_once               : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t slave1_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slave1_config_t;
+
+#define LSM6DS3TR_C_SLV2_ADD                     0x08U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t r_2                      : 1;
+  uint8_t slave2_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave2_add               : 7;
+  uint8_t r_2                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slv2_add_t;
+
+#define LSM6DS3TR_C_SLV2_SUBADD                  0x09U
+typedef struct
+{
+  uint8_t slave2_reg               : 8;
+} lsm6ds3tr_c_slv2_subadd_t;
+
+#define LSM6DS3TR_C_SLAVE2_CONFIG                0x0AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave2_numop             : 3;
+  uint8_t not_used_01              : 3;
+  uint8_t slave2_rate              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave2_rate              : 2;
+  uint8_t not_used_01              : 3;
+  uint8_t slave2_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slave2_config_t;
+
+#define LSM6DS3TR_C_SLV3_ADD                     0x0BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t r_3                      : 1;
+  uint8_t slave3_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave3_add               : 7;
+  uint8_t r_3                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slv3_add_t;
+
+#define LSM6DS3TR_C_SLV3_SUBADD                  0x0CU
+typedef struct
+{
+  uint8_t slave3_reg               : 8;
+} lsm6ds3tr_c_slv3_subadd_t;
+
+#define LSM6DS3TR_C_SLAVE3_CONFIG                0x0DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave3_numop             : 3;
+  uint8_t not_used_01              : 3;
+  uint8_t slave3_rate              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave3_rate              : 2;
+  uint8_t not_used_01              : 3;
+  uint8_t slave3_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_slave3_config_t;
+
+#define LSM6DS3TR_C_DATAWRITE_SRC_MODE_SUB_SLV0  0x0EU
+typedef struct
+{
+  uint8_t slave_dataw              : 8;
+} lsm6ds3tr_c_datawrite_src_mode_sub_slv0_t;
+
+#define LSM6DS3TR_C_CONFIG_PEDO_THS_MIN          0x0FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ths_min                  : 5;
+  uint8_t not_used_01              : 2;
+  uint8_t pedo_fs                  : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t pedo_fs                  : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t ths_min                  : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_config_pedo_ths_min_t;
+
+#define LSM6DS3TR_C_SM_THS                       0x13U
+#define LSM6DS3TR_C_PEDO_DEB_REG                 0x14U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t deb_step      : 3;
+  uint8_t deb_time      : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t deb_time      : 5;
+  uint8_t deb_step      : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_pedo_deb_reg_t;
+
+#define LSM6DS3TR_C_STEP_COUNT_DELTA             0x15U
+#define LSM6DS3TR_C_MAG_SI_XX                    0x24U
+#define LSM6DS3TR_C_MAG_SI_XY                    0x25U
+#define LSM6DS3TR_C_MAG_SI_XZ                    0x26U
+#define LSM6DS3TR_C_MAG_SI_YX                    0x27U
+#define LSM6DS3TR_C_MAG_SI_YY                    0x28U
+#define LSM6DS3TR_C_MAG_SI_YZ                    0x29U
+#define LSM6DS3TR_C_MAG_SI_ZX                    0x2AU
+#define LSM6DS3TR_C_MAG_SI_ZY                    0x2BU
+#define LSM6DS3TR_C_MAG_SI_ZZ                    0x2CU
+#define LSM6DS3TR_C_MAG_OFFX_L                   0x2DU
+#define LSM6DS3TR_C_MAG_OFFX_H                   0x2EU
+#define LSM6DS3TR_C_MAG_OFFY_L                   0x2FU
+#define LSM6DS3TR_C_MAG_OFFY_H                   0x30U
+#define LSM6DS3TR_C_MAG_OFFZ_L                   0x31U
+#define LSM6DS3TR_C_MAG_OFFZ_H                   0x32U
+#define LSM6DS3TR_C_A_WRIST_TILT_LAT             0x50U
+#define LSM6DS3TR_C_A_WRIST_TILT_THS             0x54U
+#define LSM6DS3TR_C_A_WRIST_TILT_MASK            0x59U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t  wrist_tilt_mask_zneg    : 1;
+  uint8_t  wrist_tilt_mask_zpos    : 1;
+  uint8_t  wrist_tilt_mask_yneg    : 1;
+  uint8_t  wrist_tilt_mask_ypos    : 1;
+  uint8_t  wrist_tilt_mask_xneg    : 1;
+  uint8_t  wrist_tilt_mask_xpos    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t  wrist_tilt_mask_xpos    : 1;
+  uint8_t  wrist_tilt_mask_xneg    : 1;
+  uint8_t  wrist_tilt_mask_ypos    : 1;
+  uint8_t  wrist_tilt_mask_yneg    : 1;
+  uint8_t  wrist_tilt_mask_zpos    : 1;
+  uint8_t  wrist_tilt_mask_zneg    : 1;
+  uint8_t not_used_01              : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6ds3tr_c_a_wrist_tilt_mask_t;
+
+/**
+  * @defgroup LSM6DS3TR_C_Register_Union
+  * @brief    This union group all the registers having a bit-field
+  *           description.
+  *           This union is useful but it's not needed by the driver.
+  *
+  *           REMOVING this union you are compliant with:
+  *           MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
+  *
+  * @{
+  *
+  */
+typedef union
+{
+  lsm6ds3tr_c_func_cfg_access_t                  func_cfg_access;
+  lsm6ds3tr_c_sensor_sync_time_frame_t           sensor_sync_time_frame;
+  lsm6ds3tr_c_sensor_sync_res_ratio_t            sensor_sync_res_ratio;
+  lsm6ds3tr_c_fifo_ctrl1_t                       fifo_ctrl1;
+  lsm6ds3tr_c_fifo_ctrl2_t                       fifo_ctrl2;
+  lsm6ds3tr_c_fifo_ctrl3_t                       fifo_ctrl3;
+  lsm6ds3tr_c_fifo_ctrl4_t                       fifo_ctrl4;
+  lsm6ds3tr_c_fifo_ctrl5_t                       fifo_ctrl5;
+  lsm6ds3tr_c_drdy_pulse_cfg_g_t                 drdy_pulse_cfg_g;
+  lsm6ds3tr_c_int1_ctrl_t                        int1_ctrl;
+  lsm6ds3tr_c_int2_ctrl_t                        int2_ctrl;
+  lsm6ds3tr_c_ctrl1_xl_t                         ctrl1_xl;
+  lsm6ds3tr_c_ctrl2_g_t                          ctrl2_g;
+  lsm6ds3tr_c_ctrl3_c_t                          ctrl3_c;
+  lsm6ds3tr_c_ctrl4_c_t                          ctrl4_c;
+  lsm6ds3tr_c_ctrl5_c_t                          ctrl5_c;
+  lsm6ds3tr_c_ctrl6_c_t                          ctrl6_c;
+  lsm6ds3tr_c_ctrl7_g_t                          ctrl7_g;
+  lsm6ds3tr_c_ctrl8_xl_t                         ctrl8_xl;
+  lsm6ds3tr_c_ctrl9_xl_t                         ctrl9_xl;
+  lsm6ds3tr_c_ctrl10_c_t                         ctrl10_c;
+  lsm6ds3tr_c_master_config_t                    master_config;
+  lsm6ds3tr_c_wake_up_src_t                      wake_up_src;
+  lsm6ds3tr_c_tap_src_t                          tap_src;
+  lsm6ds3tr_c_d6d_src_t                          d6d_src;
+  lsm6ds3tr_c_status_reg_t                       status_reg;
+  lsm6ds3tr_c_sensorhub1_reg_t                   sensorhub1_reg;
+  lsm6ds3tr_c_sensorhub2_reg_t                   sensorhub2_reg;
+  lsm6ds3tr_c_sensorhub3_reg_t                   sensorhub3_reg;
+  lsm6ds3tr_c_sensorhub4_reg_t                   sensorhub4_reg;
+  lsm6ds3tr_c_sensorhub5_reg_t                   sensorhub5_reg;
+  lsm6ds3tr_c_sensorhub6_reg_t                   sensorhub6_reg;
+  lsm6ds3tr_c_sensorhub7_reg_t                   sensorhub7_reg;
+  lsm6ds3tr_c_sensorhub8_reg_t                   sensorhub8_reg;
+  lsm6ds3tr_c_sensorhub9_reg_t                   sensorhub9_reg;
+  lsm6ds3tr_c_sensorhub10_reg_t                  sensorhub10_reg;
+  lsm6ds3tr_c_sensorhub11_reg_t                  sensorhub11_reg;
+  lsm6ds3tr_c_sensorhub12_reg_t                  sensorhub12_reg;
+  lsm6ds3tr_c_fifo_status1_t                     fifo_status1;
+  lsm6ds3tr_c_fifo_status2_t                     fifo_status2;
+  lsm6ds3tr_c_fifo_status3_t                     fifo_status3;
+  lsm6ds3tr_c_fifo_status4_t                     fifo_status4;
+  lsm6ds3tr_c_sensorhub13_reg_t                  sensorhub13_reg;
+  lsm6ds3tr_c_sensorhub14_reg_t                  sensorhub14_reg;
+  lsm6ds3tr_c_sensorhub15_reg_t                  sensorhub15_reg;
+  lsm6ds3tr_c_sensorhub16_reg_t                  sensorhub16_reg;
+  lsm6ds3tr_c_sensorhub17_reg_t                  sensorhub17_reg;
+  lsm6ds3tr_c_sensorhub18_reg_t                  sensorhub18_reg;
+  lsm6ds3tr_c_func_src1_t                        func_src1;
+  lsm6ds3tr_c_func_src2_t                        func_src2;
+  lsm6ds3tr_c_wrist_tilt_ia_t                    wrist_tilt_ia;
+  lsm6ds3tr_c_tap_cfg_t                          tap_cfg;
+  lsm6ds3tr_c_tap_ths_6d_t                       tap_ths_6d;
+  lsm6ds3tr_c_int_dur2_t                         int_dur2;
+  lsm6ds3tr_c_wake_up_ths_t                      wake_up_ths;
+  lsm6ds3tr_c_wake_up_dur_t                      wake_up_dur;
+  lsm6ds3tr_c_free_fall_t                        free_fall;
+  lsm6ds3tr_c_md1_cfg_t                          md1_cfg;
+  lsm6ds3tr_c_md2_cfg_t                          md2_cfg;
+  lsm6ds3tr_c_master_cmd_code_t                  master_cmd_code;
+  lsm6ds3tr_c_sens_sync_spi_error_code_t
+  sens_sync_spi_error_code;
+  lsm6ds3tr_c_slv0_add_t                         slv0_add;
+  lsm6ds3tr_c_slv0_subadd_t                      slv0_subadd;
+  lsm6ds3tr_c_slave0_config_t                    slave0_config;
+  lsm6ds3tr_c_slv1_add_t                         slv1_add;
+  lsm6ds3tr_c_slv1_subadd_t                      slv1_subadd;
+  lsm6ds3tr_c_slave1_config_t                    slave1_config;
+  lsm6ds3tr_c_slv2_add_t                         slv2_add;
+  lsm6ds3tr_c_slv2_subadd_t                      slv2_subadd;
+  lsm6ds3tr_c_slave2_config_t                    slave2_config;
+  lsm6ds3tr_c_slv3_add_t                         slv3_add;
+  lsm6ds3tr_c_slv3_subadd_t                      slv3_subadd;
+  lsm6ds3tr_c_slave3_config_t                    slave3_config;
+  lsm6ds3tr_c_datawrite_src_mode_sub_slv0_t
+  datawrite_src_mode_sub_slv0;
+  lsm6ds3tr_c_config_pedo_ths_min_t              config_pedo_ths_min;
+  lsm6ds3tr_c_pedo_deb_reg_t                     pedo_deb_reg;
+  lsm6ds3tr_c_a_wrist_tilt_mask_t                a_wrist_tilt_mask;
+  bitwise_t                                  bitwise;
+  uint8_t                                    byte;
+} lsm6ds3tr_c_reg_t;
+
+/**
+  * @}
+  *
+  */
+
+#ifndef __weak
+#define __weak __attribute__((weak))
+#endif /* __weak */
+
+/*
+ * These are the basic platform dependent I/O routines to read
+ * and write device registers connected on a standard bus.
+ * The driver keeps offering a default implementation based on function
+ * pointers to read/write routines for backward compatibility.
+ * The __weak directive allows the final application to overwrite
+ * them with a custom implementation.
+ */
+
+int32_t lsm6ds3tr_c_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
+                             uint8_t *data,
+                             uint16_t len);
+int32_t lsm6ds3tr_c_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
+                              uint8_t *data,
+                              uint16_t len);
+
+float_t lsm6ds3tr_c_from_fs2g_to_mg(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs4g_to_mg(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs8g_to_mg(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs16g_to_mg(int16_t lsb);
+
+float_t lsm6ds3tr_c_from_fs125dps_to_mdps(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs250dps_to_mdps(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs500dps_to_mdps(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs1000dps_to_mdps(int16_t lsb);
+float_t lsm6ds3tr_c_from_fs2000dps_to_mdps(int16_t lsb);
+
+float_t lsm6ds3tr_c_from_lsb_to_celsius(int16_t lsb);
+
+typedef enum
+{
+  LSM6DS3TR_C_2g       = 0,
+  LSM6DS3TR_C_16g      = 1,
+  LSM6DS3TR_C_4g       = 2,
+  LSM6DS3TR_C_8g       = 3,
+  LSM6DS3TR_C_XL_FS_ND = 4,  /* ERROR CODE */
+} lsm6ds3tr_c_fs_xl_t;
+int32_t lsm6ds3tr_c_xl_full_scale_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_xl_t val);
+int32_t lsm6ds3tr_c_xl_full_scale_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_xl_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_ODR_OFF      =  0,
+  LSM6DS3TR_C_XL_ODR_12Hz5    =  1,
+  LSM6DS3TR_C_XL_ODR_26Hz     =  2,
+  LSM6DS3TR_C_XL_ODR_52Hz     =  3,
+  LSM6DS3TR_C_XL_ODR_104Hz    =  4,
+  LSM6DS3TR_C_XL_ODR_208Hz    =  5,
+  LSM6DS3TR_C_XL_ODR_416Hz    =  6,
+  LSM6DS3TR_C_XL_ODR_833Hz    =  7,
+  LSM6DS3TR_C_XL_ODR_1k66Hz   =  8,
+  LSM6DS3TR_C_XL_ODR_3k33Hz   =  9,
+  LSM6DS3TR_C_XL_ODR_6k66Hz   = 10,
+  LSM6DS3TR_C_XL_ODR_1Hz6     = 11,
+  LSM6DS3TR_C_XL_ODR_ND       = 12,  /* ERROR CODE */
+} lsm6ds3tr_c_odr_xl_t;
+int32_t lsm6ds3tr_c_xl_data_rate_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_xl_t val);
+int32_t lsm6ds3tr_c_xl_data_rate_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_xl_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_250dps     = 0,
+  LSM6DS3TR_C_125dps     = 1,
+  LSM6DS3TR_C_500dps     = 2,
+  LSM6DS3TR_C_1000dps    = 4,
+  LSM6DS3TR_C_2000dps    = 6,
+  LSM6DS3TR_C_GY_FS_ND   = 7,    /* ERROR CODE */
+} lsm6ds3tr_c_fs_g_t;
+int32_t lsm6ds3tr_c_gy_full_scale_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_g_t val);
+int32_t lsm6ds3tr_c_gy_full_scale_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_fs_g_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_GY_ODR_OFF    =  0,
+  LSM6DS3TR_C_GY_ODR_12Hz5  =  1,
+  LSM6DS3TR_C_GY_ODR_26Hz   =  2,
+  LSM6DS3TR_C_GY_ODR_52Hz   =  3,
+  LSM6DS3TR_C_GY_ODR_104Hz  =  4,
+  LSM6DS3TR_C_GY_ODR_208Hz  =  5,
+  LSM6DS3TR_C_GY_ODR_416Hz  =  6,
+  LSM6DS3TR_C_GY_ODR_833Hz  =  7,
+  LSM6DS3TR_C_GY_ODR_1k66Hz =  8,
+  LSM6DS3TR_C_GY_ODR_3k33Hz =  9,
+  LSM6DS3TR_C_GY_ODR_6k66Hz = 10,
+  LSM6DS3TR_C_GY_ODR_ND     = 11,    /* ERROR CODE */
+} lsm6ds3tr_c_odr_g_t;
+int32_t lsm6ds3tr_c_gy_data_rate_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_g_t val);
+int32_t lsm6ds3tr_c_gy_data_rate_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_odr_g_t *val);
+
+int32_t lsm6ds3tr_c_block_data_update_set(const stmdev_ctx_t *ctx,
+                                          uint8_t val);
+int32_t lsm6ds3tr_c_block_data_update_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_LSb_1mg   = 0,
+  LSM6DS3TR_C_LSb_16mg  = 1,
+  LSM6DS3TR_C_WEIGHT_ND = 2,
+} lsm6ds3tr_c_usr_off_w_t;
+int32_t lsm6ds3tr_c_xl_offset_weight_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_usr_off_w_t val);
+int32_t lsm6ds3tr_c_xl_offset_weight_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_usr_off_w_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_HIGH_PERFORMANCE  = 0,
+  LSM6DS3TR_C_XL_NORMAL            = 1,
+  LSM6DS3TR_C_XL_PW_MODE_ND        = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_xl_hm_mode_t;
+int32_t lsm6ds3tr_c_xl_power_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_xl_hm_mode_t val);
+int32_t lsm6ds3tr_c_xl_power_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_xl_hm_mode_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_STAT_RND_DISABLE  = 0,
+  LSM6DS3TR_C_STAT_RND_ENABLE   = 1,
+  LSM6DS3TR_C_STAT_RND_ND       = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_rounding_status_t;
+int32_t lsm6ds3tr_c_rounding_on_status_set(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rounding_status_t val);
+int32_t lsm6ds3tr_c_rounding_on_status_get(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rounding_status_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_GY_HIGH_PERFORMANCE  = 0,
+  LSM6DS3TR_C_GY_NORMAL            = 1,
+  LSM6DS3TR_C_GY_PW_MODE_ND        = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_g_hm_mode_t;
+int32_t lsm6ds3tr_c_gy_power_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_g_hm_mode_t val);
+int32_t lsm6ds3tr_c_gy_power_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_g_hm_mode_t *val);
+
+typedef struct
+{
+  lsm6ds3tr_c_wake_up_src_t        wake_up_src;
+  lsm6ds3tr_c_tap_src_t            tap_src;
+  lsm6ds3tr_c_d6d_src_t            d6d_src;
+  lsm6ds3tr_c_status_reg_t         status_reg;
+  lsm6ds3tr_c_func_src1_t          func_src1;
+  lsm6ds3tr_c_func_src2_t          func_src2;
+  lsm6ds3tr_c_wrist_tilt_ia_t      wrist_tilt_ia;
+  lsm6ds3tr_c_a_wrist_tilt_mask_t  a_wrist_tilt_mask;
+} lsm6ds3tr_c_all_sources_t;
+int32_t lsm6ds3tr_c_all_sources_get(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_all_sources_t *val);
+
+int32_t lsm6ds3tr_c_status_reg_get(const stmdev_ctx_t *ctx,
+                                   lsm6ds3tr_c_status_reg_t *val);
+
+int32_t lsm6ds3tr_c_xl_flag_data_ready_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6ds3tr_c_gy_flag_data_ready_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6ds3tr_c_temp_flag_data_ready_get(const stmdev_ctx_t *ctx,
+                                             uint8_t *val);
+
+int32_t lsm6ds3tr_c_xl_usr_offset_set(const stmdev_ctx_t *ctx,
+                                      uint8_t *buff);
+int32_t lsm6ds3tr_c_xl_usr_offset_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *buff);
+int32_t lsm6ds3tr_c_timestamp_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_timestamp_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_LSB_6ms4    = 0,
+  LSM6DS3TR_C_LSB_25us    = 1,
+  LSM6DS3TR_C_TS_RES_ND   = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_timer_hr_t;
+int32_t lsm6ds3tr_c_timestamp_res_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_timer_hr_t val);
+int32_t lsm6ds3tr_c_timestamp_res_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_timer_hr_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_ROUND_DISABLE            = 0,
+  LSM6DS3TR_C_ROUND_XL                 = 1,
+  LSM6DS3TR_C_ROUND_GY                 = 2,
+  LSM6DS3TR_C_ROUND_GY_XL              = 3,
+  LSM6DS3TR_C_ROUND_SH1_TO_SH6         = 4,
+  LSM6DS3TR_C_ROUND_XL_SH1_TO_SH6      = 5,
+  LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH12  = 6,
+  LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH6   = 7,
+  LSM6DS3TR_C_ROUND_OUT_ND             = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_rounding_t;
+int32_t lsm6ds3tr_c_rounding_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_rounding_t val);
+int32_t lsm6ds3tr_c_rounding_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_rounding_t *val);
+
+int32_t lsm6ds3tr_c_temperature_raw_get(const stmdev_ctx_t *ctx,
+                                        int16_t *val);
+int32_t lsm6ds3tr_c_angular_rate_raw_get(const stmdev_ctx_t *ctx,
+                                         int16_t *val);
+int32_t lsm6ds3tr_c_acceleration_raw_get(const stmdev_ctx_t *ctx,
+                                         int16_t *val);
+
+int32_t lsm6ds3tr_c_mag_calibrated_raw_get(const stmdev_ctx_t *ctx,
+                                           int16_t *val);
+
+int32_t lsm6ds3tr_c_fifo_raw_data_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *buffer,
+                                      uint8_t len);
+
+typedef enum
+{
+  LSM6DS3TR_C_USER_BANK   = 0,
+  LSM6DS3TR_C_BANK_A      = 4,
+  LSM6DS3TR_C_BANK_B      = 5,
+  LSM6DS3TR_C_BANK_ND     = 6,    /* ERROR CODE */
+} lsm6ds3tr_c_func_cfg_en_t;
+int32_t lsm6ds3tr_c_mem_bank_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_func_cfg_en_t val);
+int32_t lsm6ds3tr_c_mem_bank_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_func_cfg_en_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_DRDY_LATCHED    = 0,
+  LSM6DS3TR_C_DRDY_PULSED     = 1,
+  LSM6DS3TR_C_DRDY_ND         = 2,  /* ERROR CODE */
+} lsm6ds3tr_c_drdy_pulsed_g_t;
+int32_t lsm6ds3tr_c_data_ready_mode_set(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_drdy_pulsed_g_t val);
+int32_t lsm6ds3tr_c_data_ready_mode_get(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_drdy_pulsed_g_t *val);
+
+int32_t lsm6ds3tr_c_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff);
+int32_t lsm6ds3tr_c_reset_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_reset_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_LSB_AT_LOW_ADD  = 0,
+  LSM6DS3TR_C_MSB_AT_LOW_ADD  = 1,
+  LSM6DS3TR_C_DATA_FMT_ND     = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_ble_t;
+int32_t lsm6ds3tr_c_data_format_set(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_ble_t val);
+int32_t lsm6ds3tr_c_data_format_get(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_ble_t *val);
+
+int32_t lsm6ds3tr_c_auto_increment_set(const stmdev_ctx_t *ctx,
+                                       uint8_t val);
+int32_t lsm6ds3tr_c_auto_increment_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6ds3tr_c_boot_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_boot_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_ST_DISABLE    = 0,
+  LSM6DS3TR_C_XL_ST_POSITIVE   = 1,
+  LSM6DS3TR_C_XL_ST_NEGATIVE   = 2,
+  LSM6DS3TR_C_XL_ST_ND         = 3,    /* ERROR CODE */
+} lsm6ds3tr_c_st_xl_t;
+int32_t lsm6ds3tr_c_xl_self_test_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_xl_t val);
+int32_t lsm6ds3tr_c_xl_self_test_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_xl_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_GY_ST_DISABLE    = 0,
+  LSM6DS3TR_C_GY_ST_POSITIVE   = 1,
+  LSM6DS3TR_C_GY_ST_NEGATIVE   = 3,
+  LSM6DS3TR_C_GY_ST_ND         = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_st_g_t;
+int32_t lsm6ds3tr_c_gy_self_test_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_g_t val);
+int32_t lsm6ds3tr_c_gy_self_test_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_st_g_t *val);
+
+int32_t lsm6ds3tr_c_filter_settling_mask_set(const stmdev_ctx_t *ctx,
+                                             uint8_t val);
+int32_t lsm6ds3tr_c_filter_settling_mask_get(const stmdev_ctx_t *ctx,
+                                             uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_USE_SLOPE    = 0,
+  LSM6DS3TR_C_USE_HPF      = 1,
+  LSM6DS3TR_C_HP_PATH_ND   = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_slope_fds_t;
+int32_t lsm6ds3tr_c_xl_hp_path_internal_set(const stmdev_ctx_t *ctx,
+                                            lsm6ds3tr_c_slope_fds_t val);
+int32_t lsm6ds3tr_c_xl_hp_path_internal_get(const stmdev_ctx_t *ctx,
+                                            lsm6ds3tr_c_slope_fds_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_ANA_BW_1k5Hz = 0,
+  LSM6DS3TR_C_XL_ANA_BW_400Hz = 1,
+  LSM6DS3TR_C_XL_ANA_BW_ND    = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_bw0_xl_t;
+int32_t lsm6ds3tr_c_xl_filter_analog_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_bw0_xl_t val);
+int32_t lsm6ds3tr_c_xl_filter_analog_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_bw0_xl_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_LP1_ODR_DIV_2 = 0,
+  LSM6DS3TR_C_XL_LP1_ODR_DIV_4 = 1,
+  LSM6DS3TR_C_XL_LP1_NA        = 2,  /* ERROR CODE */
+} lsm6ds3tr_c_lpf1_bw_sel_t;
+int32_t lsm6ds3tr_c_xl_lp1_bandwidth_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lpf1_bw_sel_t val);
+int32_t lsm6ds3tr_c_xl_lp1_bandwidth_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lpf1_bw_sel_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_50     = 0x00,
+  LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_100    = 0x01,
+  LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_9      = 0x02,
+  LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_400    = 0x03,
+  LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_50   = 0x10,
+  LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_100  = 0x11,
+  LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_9    = 0x12,
+  LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_400  = 0x13,
+  LSM6DS3TR_C_XL_LP_NA                     = 0x20, /* ERROR CODE */
+} lsm6ds3tr_c_input_composite_t;
+int32_t lsm6ds3tr_c_xl_lp2_bandwidth_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_input_composite_t val);
+int32_t lsm6ds3tr_c_xl_lp2_bandwidth_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_input_composite_t *val);
+
+int32_t lsm6ds3tr_c_xl_reference_mode_set(const stmdev_ctx_t *ctx,
+                                          uint8_t val);
+int32_t lsm6ds3tr_c_xl_reference_mode_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_HP_ODR_DIV_4      = 0x00, /* Slope filter */
+  LSM6DS3TR_C_XL_HP_ODR_DIV_100    = 0x01,
+  LSM6DS3TR_C_XL_HP_ODR_DIV_9      = 0x02,
+  LSM6DS3TR_C_XL_HP_ODR_DIV_400    = 0x03,
+  LSM6DS3TR_C_XL_HP_NA             = 0x10, /* ERROR CODE */
+} lsm6ds3tr_c_hpcf_xl_t;
+int32_t lsm6ds3tr_c_xl_hp_bandwidth_set(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_hpcf_xl_t val);
+int32_t lsm6ds3tr_c_xl_hp_bandwidth_get(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_hpcf_xl_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_LP2_ONLY                    = 0x00,
+
+  LSM6DS3TR_C_HP_16mHz_LP2                = 0x80,
+  LSM6DS3TR_C_HP_65mHz_LP2                = 0x90,
+  LSM6DS3TR_C_HP_260mHz_LP2               = 0xA0,
+  LSM6DS3TR_C_HP_1Hz04_LP2                = 0xB0,
+
+  LSM6DS3TR_C_HP_DISABLE_LP1_LIGHT        = 0x0A,
+  LSM6DS3TR_C_HP_DISABLE_LP1_NORMAL       = 0x09,
+  LSM6DS3TR_C_HP_DISABLE_LP_STRONG        = 0x08,
+  LSM6DS3TR_C_HP_DISABLE_LP1_AGGRESSIVE   = 0x0B,
+
+  LSM6DS3TR_C_HP_16mHz_LP1_LIGHT          = 0x8A,
+  LSM6DS3TR_C_HP_65mHz_LP1_NORMAL         = 0x99,
+  LSM6DS3TR_C_HP_260mHz_LP1_STRONG        = 0xA8,
+  LSM6DS3TR_C_HP_1Hz04_LP1_AGGRESSIVE     = 0xBB,
+
+  LSM6DS3TR_C_HP_GY_BAND_NA               = 0xFF,    /* ERROR CODE */
+} lsm6ds3tr_c_lpf1_sel_g_t;
+int32_t lsm6ds3tr_c_gy_band_pass_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_lpf1_sel_g_t val);
+int32_t lsm6ds3tr_c_gy_band_pass_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_lpf1_sel_g_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_SPI_4_WIRE  = 0,
+  LSM6DS3TR_C_SPI_3_WIRE  = 1,
+  LSM6DS3TR_C_SPI_MODE_ND = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_sim_t;
+int32_t lsm6ds3tr_c_spi_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_sim_t val);
+int32_t lsm6ds3tr_c_spi_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_sim_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_I2C_ENABLE   = 0,
+  LSM6DS3TR_C_I2C_DISABLE  = 1,
+  LSM6DS3TR_C_I2C_MODE_ND  = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_i2c_disable_t;
+int32_t lsm6ds3tr_c_i2c_interface_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_i2c_disable_t val);
+int32_t lsm6ds3tr_c_i2c_interface_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_i2c_disable_t *val);
+
+typedef struct
+{
+  uint8_t int1_drdy_xl             : 1;
+  uint8_t int1_drdy_g              : 1;
+  uint8_t int1_boot                : 1;
+  uint8_t int1_fth                 : 1;
+  uint8_t int1_fifo_ovr            : 1;
+  uint8_t int1_full_flag           : 1;
+  uint8_t int1_sign_mot            : 1;
+  uint8_t int1_step_detector       : 1;
+  uint8_t int1_timer               : 1;
+  uint8_t int1_tilt                : 1;
+  uint8_t int1_6d                  : 1;
+  uint8_t int1_double_tap          : 1;
+  uint8_t int1_ff                  : 1;
+  uint8_t int1_wu                  : 1;
+  uint8_t int1_single_tap          : 1;
+  uint8_t int1_inact_state         : 1;
+  uint8_t den_drdy_int1            : 1;
+  uint8_t drdy_on_int1             : 1;
+} lsm6ds3tr_c_int1_route_t;
+int32_t lsm6ds3tr_c_pin_int1_route_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int1_route_t val);
+int32_t lsm6ds3tr_c_pin_int1_route_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int1_route_t *val);
+
+typedef struct
+{
+  uint8_t int2_drdy_xl             : 1;
+  uint8_t int2_drdy_g              : 1;
+  uint8_t int2_drdy_temp           : 1;
+  uint8_t int2_fth                 : 1;
+  uint8_t int2_fifo_ovr            : 1;
+  uint8_t int2_full_flag           : 1;
+  uint8_t int2_step_count_ov       : 1;
+  uint8_t int2_step_delta          : 1;
+  uint8_t int2_iron                : 1;
+  uint8_t int2_tilt                : 1;
+  uint8_t int2_6d                  : 1;
+  uint8_t int2_double_tap          : 1;
+  uint8_t int2_ff                  : 1;
+  uint8_t int2_wu                  : 1;
+  uint8_t int2_single_tap          : 1;
+  uint8_t int2_inact_state         : 1;
+  uint8_t int2_wrist_tilt          : 1;
+} lsm6ds3tr_c_int2_route_t;
+int32_t lsm6ds3tr_c_pin_int2_route_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int2_route_t val);
+int32_t lsm6ds3tr_c_pin_int2_route_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_int2_route_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_PUSH_PULL   = 0,
+  LSM6DS3TR_C_OPEN_DRAIN  = 1,
+  LSM6DS3TR_C_PIN_MODE_ND = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_pp_od_t;
+int32_t lsm6ds3tr_c_pin_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_pp_od_t val);
+int32_t lsm6ds3tr_c_pin_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_pp_od_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_ACTIVE_HIGH   = 0,
+  LSM6DS3TR_C_ACTIVE_LOW    = 1,
+  LSM6DS3TR_C_POLARITY_ND   = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_h_lactive_t;
+int32_t lsm6ds3tr_c_pin_polarity_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_h_lactive_t val);
+int32_t lsm6ds3tr_c_pin_polarity_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_h_lactive_t *val);
+
+int32_t lsm6ds3tr_c_all_on_int1_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_all_on_int1_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_INT_PULSED   = 0,
+  LSM6DS3TR_C_INT_LATCHED  = 1,
+  LSM6DS3TR_C_INT_MODE     = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_lir_t;
+int32_t lsm6ds3tr_c_int_notification_set(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lir_t val);
+int32_t lsm6ds3tr_c_int_notification_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_lir_t *val);
+
+int32_t lsm6ds3tr_c_wkup_threshold_set(const stmdev_ctx_t *ctx,
+                                       uint8_t val);
+int32_t lsm6ds3tr_c_wkup_threshold_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6ds3tr_c_wkup_dur_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_wkup_dur_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_gy_sleep_mode_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_gy_sleep_mode_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_PROPERTY_DISABLE          = 0,
+  LSM6DS3TR_C_XL_12Hz5_GY_NOT_AFFECTED  = 1,
+  LSM6DS3TR_C_XL_12Hz5_GY_SLEEP         = 2,
+  LSM6DS3TR_C_XL_12Hz5_GY_PD            = 3,
+  LSM6DS3TR_C_ACT_MODE_ND               = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_inact_en_t;
+int32_t lsm6ds3tr_c_act_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_inact_en_t val);
+int32_t lsm6ds3tr_c_act_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_inact_en_t *val);
+
+int32_t lsm6ds3tr_c_act_sleep_dur_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_act_sleep_dur_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_src_get(const stmdev_ctx_t *ctx,
+                                lsm6ds3tr_c_tap_src_t *val);
+
+int32_t lsm6ds3tr_c_tap_detection_on_z_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val);
+int32_t lsm6ds3tr_c_tap_detection_on_z_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_detection_on_y_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val);
+int32_t lsm6ds3tr_c_tap_detection_on_y_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_detection_on_x_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val);
+int32_t lsm6ds3tr_c_tap_detection_on_x_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_threshold_x_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_tap_threshold_x_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_shock_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_tap_shock_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_quiet_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_tap_quiet_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_tap_dur_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_tap_dur_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_ONLY_SINGLE          = 0,
+  LSM6DS3TR_C_BOTH_SINGLE_DOUBLE   = 1,
+  LSM6DS3TR_C_TAP_MODE_ND          = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_single_double_tap_t;
+int32_t lsm6ds3tr_c_tap_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_single_double_tap_t val);
+int32_t lsm6ds3tr_c_tap_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_single_double_tap_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_ODR_DIV_2_FEED      = 0,
+  LSM6DS3TR_C_LPF2_FEED           = 1,
+  LSM6DS3TR_C_6D_FEED_ND          = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_low_pass_on_6d_t;
+int32_t lsm6ds3tr_c_6d_feed_data_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_low_pass_on_6d_t val);
+int32_t lsm6ds3tr_c_6d_feed_data_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_low_pass_on_6d_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_DEG_80      = 0,
+  LSM6DS3TR_C_DEG_70      = 1,
+  LSM6DS3TR_C_DEG_60      = 2,
+  LSM6DS3TR_C_DEG_50      = 3,
+  LSM6DS3TR_C_6D_TH_ND    = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_sixd_ths_t;
+int32_t lsm6ds3tr_c_6d_threshold_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sixd_ths_t val);
+int32_t lsm6ds3tr_c_6d_threshold_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sixd_ths_t *val);
+
+int32_t lsm6ds3tr_c_4d_mode_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_4d_mode_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_ff_dur_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_ff_dur_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_FF_TSH_156mg = 0,
+  LSM6DS3TR_C_FF_TSH_219mg = 1,
+  LSM6DS3TR_C_FF_TSH_250mg = 2,
+  LSM6DS3TR_C_FF_TSH_312mg = 3,
+  LSM6DS3TR_C_FF_TSH_344mg = 4,
+  LSM6DS3TR_C_FF_TSH_406mg = 5,
+  LSM6DS3TR_C_FF_TSH_469mg = 6,
+  LSM6DS3TR_C_FF_TSH_500mg = 7,
+  LSM6DS3TR_C_FF_TSH_ND    = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_ff_ths_t;
+int32_t lsm6ds3tr_c_ff_threshold_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_ff_ths_t val);
+int32_t lsm6ds3tr_c_ff_threshold_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_ff_ths_t *val);
+
+int32_t lsm6ds3tr_c_fifo_watermark_set(const stmdev_ctx_t *ctx,
+                                       uint16_t val);
+int32_t lsm6ds3tr_c_fifo_watermark_get(const stmdev_ctx_t *ctx,
+                                       uint16_t *val);
+
+int32_t lsm6ds3tr_c_fifo_data_level_get(const stmdev_ctx_t *ctx,
+                                        uint16_t *val);
+
+int32_t lsm6ds3tr_c_fifo_wtm_flag_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+int32_t lsm6ds3tr_c_fifo_pattern_get(const stmdev_ctx_t *ctx,
+                                     uint16_t *val);
+
+int32_t lsm6ds3tr_c_fifo_temp_batch_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_fifo_temp_batch_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_TRG_XL_GY_DRDY     = 0,
+  LSM6DS3TR_C_TRG_STEP_DETECT    = 1,
+  LSM6DS3TR_C_TRG_SH_DRDY        = 2,
+  LSM6DS3TR_C_TRG_SH_ND          = 3,    /* ERROR CODE */
+} lsm6ds3tr_c_trigger_fifo_t;
+int32_t lsm6ds3tr_c_fifo_write_trigger_set(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_trigger_fifo_t val);
+int32_t lsm6ds3tr_c_fifo_write_trigger_get(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_trigger_fifo_t *val);
+
+int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_set(
+  stmdev_ctx_t *ctx,
+  uint8_t val);
+int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_get(
+  stmdev_ctx_t *ctx,
+  uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_FIFO_XL_DISABLE  = 0,
+  LSM6DS3TR_C_FIFO_XL_NO_DEC   = 1,
+  LSM6DS3TR_C_FIFO_XL_DEC_2    = 2,
+  LSM6DS3TR_C_FIFO_XL_DEC_3    = 3,
+  LSM6DS3TR_C_FIFO_XL_DEC_4    = 4,
+  LSM6DS3TR_C_FIFO_XL_DEC_8    = 5,
+  LSM6DS3TR_C_FIFO_XL_DEC_16   = 6,
+  LSM6DS3TR_C_FIFO_XL_DEC_32   = 7,
+  LSM6DS3TR_C_FIFO_XL_DEC_ND   = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_dec_fifo_xl_t;
+int32_t lsm6ds3tr_c_fifo_xl_batch_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_xl_t val);
+int32_t lsm6ds3tr_c_fifo_xl_batch_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_xl_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_FIFO_GY_DISABLE = 0,
+  LSM6DS3TR_C_FIFO_GY_NO_DEC  = 1,
+  LSM6DS3TR_C_FIFO_GY_DEC_2   = 2,
+  LSM6DS3TR_C_FIFO_GY_DEC_3   = 3,
+  LSM6DS3TR_C_FIFO_GY_DEC_4   = 4,
+  LSM6DS3TR_C_FIFO_GY_DEC_8   = 5,
+  LSM6DS3TR_C_FIFO_GY_DEC_16  = 6,
+  LSM6DS3TR_C_FIFO_GY_DEC_32  = 7,
+  LSM6DS3TR_C_FIFO_GY_DEC_ND  = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_dec_fifo_gyro_t;
+int32_t lsm6ds3tr_c_fifo_gy_batch_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_gyro_t val);
+int32_t lsm6ds3tr_c_fifo_gy_batch_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_dec_fifo_gyro_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_FIFO_DS3_DISABLE   = 0,
+  LSM6DS3TR_C_FIFO_DS3_NO_DEC    = 1,
+  LSM6DS3TR_C_FIFO_DS3_DEC_2     = 2,
+  LSM6DS3TR_C_FIFO_DS3_DEC_3     = 3,
+  LSM6DS3TR_C_FIFO_DS3_DEC_4     = 4,
+  LSM6DS3TR_C_FIFO_DS3_DEC_8     = 5,
+  LSM6DS3TR_C_FIFO_DS3_DEC_16    = 6,
+  LSM6DS3TR_C_FIFO_DS3_DEC_32    = 7,
+  LSM6DS3TR_C_FIFO_DS3_DEC_ND    = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_dec_ds3_fifo_t;
+int32_t lsm6ds3tr_c_fifo_dataset_3_batch_set(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds3_fifo_t val);
+int32_t lsm6ds3tr_c_fifo_dataset_3_batch_get(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds3_fifo_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_FIFO_DS4_DISABLE  = 0,
+  LSM6DS3TR_C_FIFO_DS4_NO_DEC   = 1,
+  LSM6DS3TR_C_FIFO_DS4_DEC_2    = 2,
+  LSM6DS3TR_C_FIFO_DS4_DEC_3    = 3,
+  LSM6DS3TR_C_FIFO_DS4_DEC_4    = 4,
+  LSM6DS3TR_C_FIFO_DS4_DEC_8    = 5,
+  LSM6DS3TR_C_FIFO_DS4_DEC_16   = 6,
+  LSM6DS3TR_C_FIFO_DS4_DEC_32   = 7,
+  LSM6DS3TR_C_FIFO_DS4_DEC_ND   = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_dec_ds4_fifo_t;
+int32_t lsm6ds3tr_c_fifo_dataset_4_batch_set(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds4_fifo_t val);
+int32_t lsm6ds3tr_c_fifo_dataset_4_batch_get(const stmdev_ctx_t *ctx,
+                                             lsm6ds3tr_c_dec_ds4_fifo_t *val);
+
+int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_set(const stmdev_ctx_t *ctx,
+                                               uint8_t val);
+int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_get(const stmdev_ctx_t *ctx,
+                                               uint8_t *val);
+
+int32_t lsm6ds3tr_c_fifo_stop_on_wtm_set(const stmdev_ctx_t *ctx,
+                                         uint8_t val);
+int32_t lsm6ds3tr_c_fifo_stop_on_wtm_get(const stmdev_ctx_t *ctx,
+                                         uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_BYPASS_MODE           = 0,
+  LSM6DS3TR_C_FIFO_MODE             = 1,
+  LSM6DS3TR_C_STREAM_TO_FIFO_MODE   = 3,
+  LSM6DS3TR_C_BYPASS_TO_STREAM_MODE = 4,
+  LSM6DS3TR_C_STREAM_MODE           = 6,
+  LSM6DS3TR_C_FIFO_MODE_ND          = 8,    /* ERROR CODE */
+} lsm6ds3tr_c_fifo_mode_t;
+int32_t lsm6ds3tr_c_fifo_mode_set(const stmdev_ctx_t *ctx,
+                                  lsm6ds3tr_c_fifo_mode_t val);
+int32_t lsm6ds3tr_c_fifo_mode_get(const stmdev_ctx_t *ctx,
+                                  lsm6ds3tr_c_fifo_mode_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_FIFO_DISABLE   =  0,
+  LSM6DS3TR_C_FIFO_12Hz5     =  1,
+  LSM6DS3TR_C_FIFO_26Hz      =  2,
+  LSM6DS3TR_C_FIFO_52Hz      =  3,
+  LSM6DS3TR_C_FIFO_104Hz     =  4,
+  LSM6DS3TR_C_FIFO_208Hz     =  5,
+  LSM6DS3TR_C_FIFO_416Hz     =  6,
+  LSM6DS3TR_C_FIFO_833Hz     =  7,
+  LSM6DS3TR_C_FIFO_1k66Hz    =  8,
+  LSM6DS3TR_C_FIFO_3k33Hz    =  9,
+  LSM6DS3TR_C_FIFO_6k66Hz    = 10,
+  LSM6DS3TR_C_FIFO_RATE_ND   = 11,    /* ERROR CODE */
+} lsm6ds3tr_c_odr_fifo_t;
+int32_t lsm6ds3tr_c_fifo_data_rate_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_odr_fifo_t val);
+int32_t lsm6ds3tr_c_fifo_data_rate_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_odr_fifo_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_DEN_ACT_LOW    = 0,
+  LSM6DS3TR_C_DEN_ACT_HIGH   = 1,
+  LSM6DS3TR_C_DEN_POL_ND     = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_den_lh_t;
+int32_t lsm6ds3tr_c_den_polarity_set(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_den_lh_t val);
+int32_t lsm6ds3tr_c_den_polarity_get(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_den_lh_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_DEN_DISABLE    = 0,
+  LSM6DS3TR_C_LEVEL_FIFO     = 6,
+  LSM6DS3TR_C_LEVEL_LETCHED  = 3,
+  LSM6DS3TR_C_LEVEL_TRIGGER  = 2,
+  LSM6DS3TR_C_EDGE_TRIGGER   = 4,
+  LSM6DS3TR_C_DEN_MODE_ND    = 5,    /* ERROR CODE */
+} lsm6ds3tr_c_den_mode_t;
+int32_t lsm6ds3tr_c_den_mode_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_den_mode_t val);
+int32_t lsm6ds3tr_c_den_mode_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_den_mode_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_STAMP_IN_GY_DATA     = 0,
+  LSM6DS3TR_C_STAMP_IN_XL_DATA     = 1,
+  LSM6DS3TR_C_STAMP_IN_GY_XL_DATA  = 2,
+  LSM6DS3TR_C_DEN_STAMP_ND         = 3,    /* ERROR CODE */
+} lsm6ds3tr_c_den_xl_en_t;
+int32_t lsm6ds3tr_c_den_enable_set(const stmdev_ctx_t *ctx,
+                                   lsm6ds3tr_c_den_xl_en_t val);
+int32_t lsm6ds3tr_c_den_enable_get(const stmdev_ctx_t *ctx,
+                                   lsm6ds3tr_c_den_xl_en_t *val);
+
+int32_t lsm6ds3tr_c_den_mark_axis_z_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_den_mark_axis_z_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+int32_t lsm6ds3tr_c_den_mark_axis_y_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_den_mark_axis_y_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+int32_t lsm6ds3tr_c_den_mark_axis_x_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_den_mark_axis_x_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+int32_t lsm6ds3tr_c_pedo_step_reset_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_pedo_step_reset_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+int32_t lsm6ds3tr_c_pedo_sens_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_pedo_sens_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_pedo_threshold_set(const stmdev_ctx_t *ctx,
+                                       uint8_t val);
+int32_t lsm6ds3tr_c_pedo_threshold_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_PEDO_AT_2g = 0,
+  LSM6DS3TR_C_PEDO_AT_4g = 1,
+  LSM6DS3TR_C_PEDO_FS_ND = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_pedo_fs_t;
+int32_t lsm6ds3tr_c_pedo_full_scale_set(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_pedo_fs_t val);
+int32_t lsm6ds3tr_c_pedo_full_scale_get(const stmdev_ctx_t *ctx,
+                                        lsm6ds3tr_c_pedo_fs_t *val);
+
+int32_t lsm6ds3tr_c_pedo_debounce_steps_set(const stmdev_ctx_t *ctx,
+                                            uint8_t val);
+int32_t lsm6ds3tr_c_pedo_debounce_steps_get(const stmdev_ctx_t *ctx,
+                                            uint8_t *val);
+
+int32_t lsm6ds3tr_c_pedo_timeout_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_pedo_timeout_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_pedo_steps_period_set(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff);
+int32_t lsm6ds3tr_c_pedo_steps_period_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff);
+
+int32_t lsm6ds3tr_c_motion_sens_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_motion_sens_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_motion_threshold_set(const stmdev_ctx_t *ctx,
+                                         uint8_t *buff);
+int32_t lsm6ds3tr_c_motion_threshold_get(const stmdev_ctx_t *ctx,
+                                         uint8_t *buff);
+
+int32_t lsm6ds3tr_c_tilt_sens_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_tilt_sens_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_wrist_tilt_sens_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_wrist_tilt_sens_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+int32_t lsm6ds3tr_c_tilt_latency_set(const stmdev_ctx_t *ctx,
+                                     uint8_t *buff);
+int32_t lsm6ds3tr_c_tilt_latency_get(const stmdev_ctx_t *ctx,
+                                     uint8_t *buff);
+
+int32_t lsm6ds3tr_c_tilt_threshold_set(const stmdev_ctx_t *ctx,
+                                       uint8_t *buff);
+int32_t lsm6ds3tr_c_tilt_threshold_get(const stmdev_ctx_t *ctx,
+                                       uint8_t *buff);
+
+int32_t lsm6ds3tr_c_tilt_src_set(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_a_wrist_tilt_mask_t *val);
+int32_t lsm6ds3tr_c_tilt_src_get(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_a_wrist_tilt_mask_t *val);
+
+int32_t lsm6ds3tr_c_mag_soft_iron_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_mag_soft_iron_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+int32_t lsm6ds3tr_c_mag_hard_iron_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_mag_hard_iron_get(const stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+int32_t lsm6ds3tr_c_mag_soft_iron_mat_set(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff);
+int32_t lsm6ds3tr_c_mag_soft_iron_mat_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *buff);
+
+int32_t lsm6ds3tr_c_mag_offset_set(const stmdev_ctx_t *ctx, int16_t *val);
+int32_t lsm6ds3tr_c_mag_offset_get(const stmdev_ctx_t *ctx, int16_t *val);
+
+int32_t lsm6ds3tr_c_func_en_set(const stmdev_ctx_t *ctx, uint8_t val);
+
+int32_t lsm6ds3tr_c_sh_sync_sens_frame_set(const stmdev_ctx_t *ctx,
+                                           uint8_t val);
+int32_t lsm6ds3tr_c_sh_sync_sens_frame_get(const stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_RES_RATIO_2_11  = 0,
+  LSM6DS3TR_C_RES_RATIO_2_12  = 1,
+  LSM6DS3TR_C_RES_RATIO_2_13  = 2,
+  LSM6DS3TR_C_RES_RATIO_2_14  = 3,
+  LSM6DS3TR_C_RES_RATIO_ND    = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_rr_t;
+int32_t lsm6ds3tr_c_sh_sync_sens_ratio_set(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rr_t val);
+int32_t lsm6ds3tr_c_sh_sync_sens_ratio_get(const stmdev_ctx_t *ctx,
+                                           lsm6ds3tr_c_rr_t *val);
+
+int32_t lsm6ds3tr_c_sh_master_set(const stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6ds3tr_c_sh_master_get(const stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6ds3tr_c_sh_pass_through_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_sh_pass_through_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_EXT_PULL_UP       = 0,
+  LSM6DS3TR_C_INTERNAL_PULL_UP  = 1,
+  LSM6DS3TR_C_SH_PIN_MODE       = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_pull_up_en_t;
+int32_t lsm6ds3tr_c_sh_pin_mode_set(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_pull_up_en_t val);
+int32_t lsm6ds3tr_c_sh_pin_mode_get(const stmdev_ctx_t *ctx,
+                                    lsm6ds3tr_c_pull_up_en_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_XL_GY_DRDY        = 0,
+  LSM6DS3TR_C_EXT_ON_INT2_PIN   = 1,
+  LSM6DS3TR_C_SH_SYNCRO_ND      = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_start_config_t;
+int32_t lsm6ds3tr_c_sh_syncro_mode_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_start_config_t val);
+int32_t lsm6ds3tr_c_sh_syncro_mode_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_start_config_t *val);
+
+int32_t lsm6ds3tr_c_sh_drdy_on_int1_set(const stmdev_ctx_t *ctx,
+                                        uint8_t val);
+int32_t lsm6ds3tr_c_sh_drdy_on_int1_get(const stmdev_ctx_t *ctx,
+                                        uint8_t *val);
+
+typedef struct
+{
+  lsm6ds3tr_c_sensorhub1_reg_t   sh_byte_1;
+  lsm6ds3tr_c_sensorhub2_reg_t   sh_byte_2;
+  lsm6ds3tr_c_sensorhub3_reg_t   sh_byte_3;
+  lsm6ds3tr_c_sensorhub4_reg_t   sh_byte_4;
+  lsm6ds3tr_c_sensorhub5_reg_t   sh_byte_5;
+  lsm6ds3tr_c_sensorhub6_reg_t   sh_byte_6;
+  lsm6ds3tr_c_sensorhub7_reg_t   sh_byte_7;
+  lsm6ds3tr_c_sensorhub8_reg_t   sh_byte_8;
+  lsm6ds3tr_c_sensorhub9_reg_t   sh_byte_9;
+  lsm6ds3tr_c_sensorhub10_reg_t  sh_byte_10;
+  lsm6ds3tr_c_sensorhub11_reg_t  sh_byte_11;
+  lsm6ds3tr_c_sensorhub12_reg_t  sh_byte_12;
+  lsm6ds3tr_c_sensorhub13_reg_t  sh_byte_13;
+  lsm6ds3tr_c_sensorhub14_reg_t  sh_byte_14;
+  lsm6ds3tr_c_sensorhub15_reg_t  sh_byte_15;
+  lsm6ds3tr_c_sensorhub16_reg_t  sh_byte_16;
+  lsm6ds3tr_c_sensorhub17_reg_t  sh_byte_17;
+  lsm6ds3tr_c_sensorhub18_reg_t  sh_byte_18;
+} lsm6ds3tr_c_emb_sh_read_t;
+int32_t lsm6ds3tr_c_sh_read_data_raw_get(const stmdev_ctx_t *ctx,
+                                         lsm6ds3tr_c_emb_sh_read_t *val);
+
+int32_t lsm6ds3tr_c_sh_cmd_sens_sync_set(const stmdev_ctx_t *ctx,
+                                         uint8_t val);
+int32_t lsm6ds3tr_c_sh_cmd_sens_sync_get(const stmdev_ctx_t *ctx,
+                                         uint8_t *val);
+
+int32_t lsm6ds3tr_c_sh_spi_sync_error_set(const stmdev_ctx_t *ctx,
+                                          uint8_t val);
+int32_t lsm6ds3tr_c_sh_spi_sync_error_get(const stmdev_ctx_t *ctx,
+                                          uint8_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_SLV_0        = 0,
+  LSM6DS3TR_C_SLV_0_1      = 1,
+  LSM6DS3TR_C_SLV_0_1_2    = 2,
+  LSM6DS3TR_C_SLV_0_1_2_3  = 3,
+  LSM6DS3TR_C_SLV_EN_ND    = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_aux_sens_on_t;
+int32_t lsm6ds3tr_c_sh_num_of_dev_connected_set(const stmdev_ctx_t *ctx,
+                                                lsm6ds3tr_c_aux_sens_on_t val);
+int32_t lsm6ds3tr_c_sh_num_of_dev_connected_get(const stmdev_ctx_t *ctx,
+                                                lsm6ds3tr_c_aux_sens_on_t *val);
+
+typedef struct
+{
+  uint8_t   slv0_add;
+  uint8_t   slv0_subadd;
+  uint8_t   slv0_data;
+} lsm6ds3tr_c_sh_cfg_write_t;
+int32_t lsm6ds3tr_c_sh_cfg_write(const stmdev_ctx_t *ctx,
+                                 lsm6ds3tr_c_sh_cfg_write_t *val);
+
+typedef struct
+{
+  uint8_t   slv_add;
+  uint8_t   slv_subadd;
+  uint8_t   slv_len;
+} lsm6ds3tr_c_sh_cfg_read_t;
+int32_t lsm6ds3tr_c_sh_slv0_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val);
+int32_t lsm6ds3tr_c_sh_slv1_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val);
+int32_t lsm6ds3tr_c_sh_slv2_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val);
+int32_t lsm6ds3tr_c_sh_slv3_cfg_read(const stmdev_ctx_t *ctx,
+                                     lsm6ds3tr_c_sh_cfg_read_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_SL0_NO_DEC   = 0,
+  LSM6DS3TR_C_SL0_DEC_2    = 1,
+  LSM6DS3TR_C_SL0_DEC_4    = 2,
+  LSM6DS3TR_C_SL0_DEC_8    = 3,
+  LSM6DS3TR_C_SL0_DEC_ND   = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_slave0_rate_t;
+int32_t lsm6ds3tr_c_sh_slave_0_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave0_rate_t val);
+int32_t lsm6ds3tr_c_sh_slave_0_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave0_rate_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_EACH_SH_CYCLE     = 0,
+  LSM6DS3TR_C_ONLY_FIRST_CYCLE  = 1,
+  LSM6DS3TR_C_SH_WR_MODE_ND     = 2,    /* ERROR CODE */
+} lsm6ds3tr_c_write_once_t;
+int32_t lsm6ds3tr_c_sh_write_mode_set(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_write_once_t val);
+int32_t lsm6ds3tr_c_sh_write_mode_get(const stmdev_ctx_t *ctx,
+                                      lsm6ds3tr_c_write_once_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_SL1_NO_DEC   = 0,
+  LSM6DS3TR_C_SL1_DEC_2    = 1,
+  LSM6DS3TR_C_SL1_DEC_4    = 2,
+  LSM6DS3TR_C_SL1_DEC_8    = 3,
+  LSM6DS3TR_C_SL1_DEC_ND   = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_slave1_rate_t;
+int32_t lsm6ds3tr_c_sh_slave_1_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave1_rate_t val);
+int32_t lsm6ds3tr_c_sh_slave_1_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave1_rate_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_SL2_NO_DEC  = 0,
+  LSM6DS3TR_C_SL2_DEC_2   = 1,
+  LSM6DS3TR_C_SL2_DEC_4   = 2,
+  LSM6DS3TR_C_SL2_DEC_8   = 3,
+  LSM6DS3TR_C_SL2_DEC_ND  = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_slave2_rate_t;
+int32_t lsm6ds3tr_c_sh_slave_2_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave2_rate_t val);
+int32_t lsm6ds3tr_c_sh_slave_2_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave2_rate_t *val);
+
+typedef enum
+{
+  LSM6DS3TR_C_SL3_NO_DEC  = 0,
+  LSM6DS3TR_C_SL3_DEC_2   = 1,
+  LSM6DS3TR_C_SL3_DEC_4   = 2,
+  LSM6DS3TR_C_SL3_DEC_8   = 3,
+  LSM6DS3TR_C_SL3_DEC_ND  = 4,    /* ERROR CODE */
+} lsm6ds3tr_c_slave3_rate_t;
+int32_t lsm6ds3tr_c_sh_slave_3_dec_set(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave3_rate_t val);
+int32_t lsm6ds3tr_c_sh_slave_3_dec_get(const stmdev_ctx_t *ctx,
+                                       lsm6ds3tr_c_slave3_rate_t *val);
+
+/**
+  * @}
+  *
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LSM6DS3TR_C_DRIVER_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

lib/lsm6dso-api/.gitsubtree

@@ -0,0 +1 @@
+https://github.com/STMicroelectronics/stm32-lsm6dso main /

lib/lsm6dso-api/CODE_OF_CONDUCT.md

@@ -0,0 +1,73 @@
+# Contributor Covenant Code of Conduct
+
+## Our Pledge
+
+In the interest of fostering an open and welcoming environment, we as
+contributors and maintainers pledge to making participation in our project and
+our community a harassment-free experience for everyone, regardless of age, body
+size, disability, ethnicity, sex characteristics, gender identity and expression,
+level of experience, education, socio-economic status, nationality, personal
+appearance, race, religion, or sexual identity and orientation.
+
+## Our Standards
+
+Examples of behavior that contributes to creating a positive environment
+include:
+
+* Using welcoming and inclusive language
+* Being respectful of differing viewpoints and experiences
+* Gracefully accepting constructive criticism
+* Focusing on what is best for the community
+* Showing empathy towards other community members
+
+Examples of unacceptable behavior by participants include:
+
+* The use of sexualized language or imagery and unwelcome sexual attention or
+ advances
+* Trolling, insulting/derogatory comments, and personal or political attacks
+* Public or private harassment
+* Publishing others' private information, such as a physical or electronic
+ address, without explicit permission
+* Other conduct which could reasonably be considered inappropriate in a
+ professional setting
+
+## Our Responsibilities
+
+Project maintainers are responsible for clarifying the standards of acceptable
+behavior and are expected to take appropriate and fair corrective action in
+response to any instances of unacceptable behavior.
+
+Project maintainers have the right and responsibility to remove, edit, or
+reject comments, commits, code, wiki edits, issues, and other contributions
+that are not aligned to this Code of Conduct, or to ban temporarily or
+permanently any contributor for other behaviors that they deem inappropriate,
+threatening, offensive, or harmful.
+
+## Scope
+
+This Code of Conduct applies both within project spaces and in public spaces
+when an individual is representing the project or its community. Examples of
+representing a project or community include using an official project e-mail
+address, posting via an official social media account, or acting as an appointed
+representative at an online or offline event. Representation of a project may be
+further defined and clarified by project maintainers.
+
+## Enforcement
+
+Instances of abusive, harassing, or otherwise unacceptable behavior may be
+reported by contacting the project team via this [link](https://www.st.com/content/st_com/en/contact-us.html).
+All complaints will be reviewed and investigated and will result in a response that
+is deemed necessary and appropriate to the circumstances. The project team is
+obligated to maintain confidentiality with regard to the reporter of an incident.
+Further details of specific enforcement policies may be posted separately.
+
+Project maintainers who do not follow or enforce the Code of Conduct in good
+faith may face temporary or permanent repercussions as determined by other
+members of the project's leadership.
+
+## Attribution
+
+This Code of Conduct is adapted from the [Contributor Covenant](https://www.contributor-covenant.org), version 1.4,
+available [here](https://www.contributor-covenant.org/version/1/4/code-of-conduct.html).
+
+For answers to common questions about this code of conduct, see the [FAQ section](https://www.contributor-covenant.org/faq).

lib/lsm6dso-api/CONTRIBUTING.md

@@ -0,0 +1,40 @@
+# Contributing guide
+
+This guide serves as a checklist before contributing to this repository. It mainly focuses on the steps to follow to submit an issue or a pull-request.
+
+## 1. Issues
+
+### 1.1 Before opening an issue
+
+Please check the following points before posting an issue:
+* Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits).
+* Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3-support-requests-and-questions) below.
+* Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Do not forget to browse into the **closed** issues.
+
+### 1.2 Posting the issue
+
+When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](../../issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose.
+
+## 2. Pull Requests
+
+### 2.1 Before opening a pull-request
+
+STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
+
+* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com).
+* If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name.
+* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page.
+
+Please note that:
+* The Corporate CLA will always take precedence over the Individual CLA.
+* One CLA submission is sufficient, for any project proposed by STMicroelectronics.
+
+### 2.2 How to proceed
+
+* We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope.
+* Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version.
+* Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted.
+
+## 3. Support requests and questions
+
+For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog).

lib/lsm6dso-api/LICENSE.md

@@ -0,0 +1,27 @@
+Copyright 2019 STMicroelectronics.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice,
+this list of conditions and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+3. Neither the name of the copyright holder nor the names of its contributors
+may be used to endorse or promote products derived from this software without
+specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

lib/lsm6dso-api/README.md

@@ -0,0 +1,34 @@
+# BSP LSM6DSO Component
+
+![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32-lsm6dso.svg?color=brightgreen)
+
+## Overview
+
+**STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.
+
+**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series.
+   * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
+   * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio.
+   * The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series.
+   * A consistent set of middleware components such as RTOS, USB, FatFS, graphics, touch sensing library...
+   * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series.
+
+Two models of publication are proposed for the STM32Cube embedded software:
+   * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
+   * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions.
+
+## Description
+
+This **lsm6dso** MCU component repository is one element **common to all** STM32Cube MCU embedded software packages, providing the **LSM6DSO** BSP MEMS component part.
+
+## Release note
+
+Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/lsm6dso/blob/main/Release_Notes.html).
+
+## Compatibility information
+
+Please refer to the repository of the BSP **board** driver you are using to know which version of this BSP component driver to use. It is **crucial** that you use a consistent set of versions.
+
+## Troubleshooting
+
+Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.

lib/lsm6dso-api/Release_Notes.html

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+<!DOCTYPE html>
+<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
+<head>
+  <meta charset="utf-8" />
+  <meta name="generator" content="pandoc" />
+  <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
+  <title>Release Notes for LSM6DSO Component</title>
+  <style>
+    code{white-space: pre-wrap;}
+    span.smallcaps{font-variant: small-caps;}
+    div.columns{display: flex; gap: min(4vw, 1.5em);}
+    div.column{flex: auto; overflow-x: auto;}
+    div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
+    ul.task-list{list-style: none;}
+    ul.task-list li input[type="checkbox"] {
+      width: 0.8em;
+      margin: 0 0.8em 0.2em -1.6em;
+      vertical-align: middle;
+    }
+    .display.math{display: block; text-align: center; margin: 0.5rem auto;}
+  </style>
+  <link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
+  <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
+  <!--[if lt IE 9]>
+    <script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
+  <![endif]-->
+</head>
+<body>
+<div class="row">
+<div class="col-sm-12 col-lg-4">
+<center>
+<h1 id="release-notes-for-lsm6dso-component-driver">Release Notes for
+LSM6DSO Component Driver</h1>
+<p>Copyright © 2022 STMicroelectronics<br />
+</p>
+<a href="https://www.st.com" class="logo"><img
+src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
+</center>
+<h1 id="purpose">Purpose</h1>
+<p>This directory contains the LSM6DSO component drivers.</p>
+</div>
+<section id="update-history" class="col-sm-12 col-lg-8">
+<h1>Update history</h1>
+<div class="collapse">
+<input type="checkbox" id="collapse-section15" checked aria-hidden="true">
+<label for="collapse-section15" aria-hidden="true">V1.7.0 /
+31-October-2022</label>
+<div>
+<h2 id="main-changes">Main changes</h2>
+<h3 id="maintenance-release">Maintenance release</h3>
+<ul>
+<li>Synchronized PID with currently latest version on ST GitHub</li>
+<li>Added Delay function</li>
+</ul>
+<h2 id="section"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section14" aria-hidden="true">
+<label for="collapse-section14" aria-hidden="true">V1.6.0 /
+23-March-2022</label>
+<div>
+<h2 id="main-changes-1">Main changes</h2>
+<h3 id="maintenance-release-1">Maintenance release</h3>
+<ul>
+<li>Synchronized PID with currently latest version on ST GitHub</li>
+</ul>
+<h2 id="section-1"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section13" aria-hidden="true">
+<label for="collapse-section13" aria-hidden="true">V1.5.4 /
+09-February-2022</label>
+<div>
+<h2 id="main-changes-2">Main changes</h2>
+<h3 id="patch-release">Patch release</h3>
+<ul>
+<li>Update License to new format</li>
+</ul>
+<h2 id="section-2"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section12" aria-hidden="true">
+<label for="collapse-section12" aria-hidden="true">V1.5.3 /
+17-November-2021</label>
+<div>
+<h2 id="main-changes-3">Main changes</h2>
+<h3 id="patch-release-1">Patch release</h3>
+<ul>
+<li>Fix C++ compiler errors</li>
+</ul>
+<h2 id="section-3"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section11" aria-hidden="true">
+<label for="collapse-section11" aria-hidden="true">V1.5.2 /
+21-April-2021</label>
+<div>
+<h2 id="main-changes-4">Main changes</h2>
+<h3 id="patch-release-2">Patch release</h3>
+<ul>
+<li>Update Release Notes to new format</li>
+</ul>
+<h2 id="section-4"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section10" aria-hidden="true">
+<label for="collapse-section10" aria-hidden="true">V1.5.1 /
+15-April-2021</label>
+<div>
+<h2 id="main-changes-5">Main changes</h2>
+<h3 id="patch-release-3">Patch release</h3>
+<ul>
+<li>Fix issues on INT2 events</li>
+</ul>
+<h2 id="section-5"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section9" aria-hidden="true">
+<label for="collapse-section9" aria-hidden="true">V1.5.0 /
+03-March-2021</label>
+<div>
+<h2 id="main-changes-6">Main changes</h2>
+<h3 id="maintenance-release-2">Maintenance release</h3>
+<ul>
+<li>Synchronize PID with latest version on ST GitHub</li>
+</ul>
+<h2 id="section-6"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section8" aria-hidden="true">
+<label for="collapse-section8" aria-hidden="true">V1.4.0 /
+28-October-2020</label>
+<div>
+<h2 id="main-changes-7">Main changes</h2>
+<h3 id="maintenance-release-3">Maintenance release</h3>
+<ul>
+<li>Update PID</li>
+</ul>
+<h2 id="section-7"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section7" aria-hidden="true">
+<label for="collapse-section7" aria-hidden="true">V1.3.0 /
+03-March-2020</label>
+<div>
+<h2 id="main-changes-8">Main changes</h2>
+<h3 id="maintenance-release-4">Maintenance release</h3>
+<ul>
+<li>Update PID</li>
+<li>Add MISRA 2012 compliancy</li>
+</ul>
+<h2 id="section-8"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section6" aria-hidden="true">
+<label for="collapse-section6" aria-hidden="true">V1.2.3 /
+10-February-2020</label>
+<div>
+<h2 id="main-changes-9">Main changes</h2>
+<h3 id="patch-release-4">Patch release</h3>
+<ul>
+<li>Align ODR values like PID</li>
+</ul>
+<h2 id="section-9"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section5" aria-hidden="true">
+<label for="collapse-section5" aria-hidden="true">V1.2.2 /
+11-October-2019</label>
+<div>
+<h2 id="main-changes-10">Main changes</h2>
+<h3 id="patch-release-5">Patch release</h3>
+<ul>
+<li>Rename context type to universal stmdev_ctx_t</li>
+<li>Move unions from PID to HLD</li>
+</ul>
+<h2 id="section-10"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section4" aria-hidden="true">
+<label for="collapse-section4" aria-hidden="true">V1.2.1 /
+23-July-2019</label>
+<div>
+<h2 id="main-changes-11">Main changes</h2>
+<h3 id="patch-release-6">Patch release</h3>
+<ul>
+<li>Update license</li>
+</ul>
+<h2 id="section-11"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section3" aria-hidden="true">
+<label for="collapse-section3" aria-hidden="true">V1.2.0 /
+28-May-2019</label>
+<div>
+<h2 id="main-changes-12">Main changes</h2>
+<h3 id="maintenance-release-5">Maintenance release</h3>
+<ul>
+<li>PID update from ST GitHub</li>
+<li>Add new APIs for VibrationMonitoring to HLD</li>
+<li>HLD coding style update</li>
+</ul>
+<h2 id="section-12"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section2" aria-hidden="true">
+<label for="collapse-section2" aria-hidden="true">V1.1.0 /
+04-April-2019</label>
+<div>
+<h2 id="main-changes-13">Main changes</h2>
+<h3 id="maintenance-release-6">Maintenance release</h3>
+<ul>
+<li>Add new APIs</li>
+</ul>
+<h2 id="section-13"></h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section1" aria-hidden="true">
+<label for="collapse-section1" aria-hidden="true">V1.0.0 /
+31-January-2019</label>
+<div>
+<h2 id="main-changes-14">Main changes</h2>
+<h3 id="first-release">First release</h3>
+<ul>
+<li>First official release</li>
+</ul>
+<h2 id="section-14"></h2>
+</div>
+</div>
+</section>
+</div>
+<footer class="sticky">
+<div class="columns">
+<div class="column" style="width:95%;">
+<p>For complete documentation on LSM6DSO, visit: <a
+href="https://www.st.com/content/st_com/en/products/mems-and-sensors/inemo-inertial-modules/lsm6dso.html">LSM6DSO</a></p>
+</div><div class="column" style="width:5%;">
+<p><abbr title="Based on template cx566953 version 2.0">Info</abbr></p>
+</div>
+</div>
+</footer>
+</body>
+</html>

lib/lsm6dso-api/SECURITY.md

@@ -0,0 +1,31 @@
+# Report potential product security vulnerabilities
+
+ST places a high priority on security, and our Product Security Incident
+Response Team (PSIRT) is committed to rapidly addressing potential security
+vulnerabilities affecting our products. PSIRT's long history and vast experience
+in security allows ST to perform clear analyses and provide appropriate guidance
+on mitigations and solutions when applicable.
+
+If you wish to report potential security vulnerabilities regarding our products,
+**please do not report them through public GitHub issues.** Instead, we
+encourage you to report them to our ST PSIRT following the process described at:
+**https://www.st.com/content/st_com/en/security/report-vulnerabilities.html**
+
+### IMPORTANT - READ CAREFULLY:
+
+STMicroelectronics International N.V., on behalf of itself, its affiliates and
+subsidiaries, (collectively “ST”) takes all potential security vulnerability
+reports or other related communications (“Report(s)”) seriously. In order to
+review Your Report (the terms “You” and “Yours” include your employer, and all
+affiliates, subsidiaries and related persons or entities) and take actions as
+deemed appropriate, ST requires that we have the rights and Your permission to
+do so.
+
+As such, by submitting Your Report to ST, You agree that You have the right to
+do so, and You grant to ST the rights to use the Report for purposes related to
+security vulnerability analysis, testing, correction, patching, reporting and
+any other related purpose or function.
+
+By submitting Your Report, You agree that ST’s
+[Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html)
+applies to all related communications.

lib/lsm6dso-api/_htmresc/mini-st_2020.css

@@ -0,0 +1,1711 @@
+@charset "UTF-8";
+/*
+  Flavor name: Custom (mini-custom)
+  Generated online - https://minicss.org/flavors
+  mini.css version: v3.0.1
+*/
+/*
+  Browsers resets and base typography.
+*/
+/* Core module CSS variable definitions */
+:root {
+  --fore-color: #03234b;
+  --secondary-fore-color: #03234b;
+  --back-color: #ffffff;
+  --secondary-back-color: #ffffff;
+  --blockquote-color: #e6007e;
+  --pre-color: #e6007e;
+  --border-color: #3cb4e6;
+  --secondary-border-color: #3cb4e6;
+  --heading-ratio: 1.2;
+  --universal-margin: 0.5rem;
+  --universal-padding: 0.25rem;
+  --universal-border-radius: 0.075rem;
+  --background-margin: 1.5%;
+  --a-link-color: #3cb4e6;
+  --a-visited-color: #8c0078; }
+
+html {
+  font-size: 13.5px; }
+
+a, b, del, em, i, ins, q, span, strong, u {
+  font-size: 1em; }
+
+html, * {
+  font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;
+  line-height: 1.25;
+  -webkit-text-size-adjust: 100%; }
+
+* {
+  font-size: 1rem; }
+
+body {
+  margin: 0;
+  color: var(--fore-color);
+  @background: var(--back-color);
+  background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;
+  background-size: var(--background-margin);
+  }
+
+details {
+  display: block; }
+
+summary {
+  display: list-item; }
+
+abbr[title] {
+  border-bottom: none;
+  text-decoration: underline dotted; }
+
+input {
+  overflow: visible; }
+
+img {
+  max-width: 100%;
+  height: auto; }
+
+h1, h2, h3, h4, h5, h6 {
+  line-height: 1.25;
+  margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+  font-weight: 400; }
+  h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
+    color: var(--secondary-fore-color);
+    display: block;
+    margin-top: -0.25rem; }
+
+h1 {
+  font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
+
+h2 {
+  font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );
+  border-style: none none solid none ; 
+  border-width: thin;
+  border-color: var(--border-color); }
+h3 {
+  font-size: calc(1rem * var(--heading-ratio) ); }
+
+h4 {
+  font-size: calc(1rem * var(--heading-ratio)); }
+
+h5 {
+  font-size: 1rem; }
+
+h6 {
+  font-size: calc(1rem / var(--heading-ratio)); }
+
+p {
+  margin: var(--universal-margin); }
+
+ol, ul {
+  margin: var(--universal-margin);
+  padding-left: calc(3 * var(--universal-margin)); }
+
+b, strong {
+  font-weight: 700; }
+
+hr {
+  box-sizing: content-box;
+  border: 0;
+  line-height: 1.25em;
+  margin: var(--universal-margin);
+  height: 0.0714285714rem;
+  background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
+
+blockquote {
+  display: block;
+  position: relative;
+  font-style: italic;
+  color: var(--secondary-fore-color);
+  margin: var(--universal-margin);
+  padding: calc(3 * var(--universal-padding));
+  border: 0.0714285714rem solid var(--secondary-border-color);
+  border-left: 0.3rem solid var(--blockquote-color);
+  border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+  blockquote:before {
+    position: absolute;
+    top: calc(0rem - var(--universal-padding));
+    left: 0;
+    font-family: sans-serif;
+    font-size: 2rem;
+    font-weight: 800;
+    content: "\201c";
+    color: var(--blockquote-color); }
+  blockquote[cite]:after {
+    font-style: normal;
+    font-size: 0.75em;
+    font-weight: 700;
+    content: "\a—  " attr(cite);
+    white-space: pre; }
+
+code, kbd, pre, samp {
+  font-family: Menlo, Consolas, monospace;
+  font-size: 0.85em; }
+
+code {
+  background: var(--secondary-back-color);
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+kbd {
+  background: var(--fore-color);
+  color: var(--back-color);
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+pre {
+  overflow: auto;
+  background: var(--secondary-back-color);
+  padding: calc(1.5 * var(--universal-padding));
+  margin: var(--universal-margin);
+  border: 0.0714285714rem solid var(--secondary-border-color);
+  border-left: 0.2857142857rem solid var(--pre-color);
+  border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+
+sup, sub, code, kbd {
+  line-height: 0;
+  position: relative;
+  vertical-align: baseline; }
+
+small, sup, sub, figcaption {
+  font-size: 0.75em; }
+
+sup {
+  top: -0.5em; }
+
+sub {
+  bottom: -0.25em; }
+
+figure {
+  margin: var(--universal-margin); }
+
+figcaption {
+  color: var(--secondary-fore-color); }
+
+a {
+  text-decoration: none; }
+  a:link {
+    color: var(--a-link-color); }
+  a:visited {
+    color: var(--a-visited-color); }
+  a:hover, a:focus {
+    text-decoration: underline; }
+
+/*
+  Definitions for the grid system, cards and containers.
+*/
+.container {
+  margin: 0 auto;
+  padding: 0 calc(1.5 * var(--universal-padding)); }
+
+.row {
+  box-sizing: border-box;
+  display: flex;
+  flex: 0 1 auto;
+  flex-flow: row wrap;
+  margin: 0 0 0 var(--background-margin); }
+
+.col-sm,
+[class^='col-sm-'],
+[class^='col-sm-offset-'],
+.row[class*='cols-sm-'] > * {
+  box-sizing: border-box;
+  flex: 0 0 auto;
+  padding: 0 calc(var(--universal-padding) / 2); }
+
+.col-sm,
+.row.cols-sm > * {
+  max-width: 100%;
+  flex-grow: 1;
+  flex-basis: 0; }
+
+.col-sm-1,
+.row.cols-sm-1 > * {
+  max-width: 8.3333333333%;
+  flex-basis: 8.3333333333%; }
+
+.col-sm-offset-0 {
+  margin-left: 0; }
+
+.col-sm-2,
+.row.cols-sm-2 > * {
+  max-width: 16.6666666667%;
+  flex-basis: 16.6666666667%; }
+
+.col-sm-offset-1 {
+  margin-left: 8.3333333333%; }
+
+.col-sm-3,
+.row.cols-sm-3 > * {
+  max-width: 25%;
+  flex-basis: 25%; }
+
+.col-sm-offset-2 {
+  margin-left: 16.6666666667%; }
+
+.col-sm-4,
+.row.cols-sm-4 > * {
+  max-width: 33.3333333333%;
+  flex-basis: 33.3333333333%; }
+
+.col-sm-offset-3 {
+  margin-left: 25%; }
+
+.col-sm-5,
+.row.cols-sm-5 > * {
+  max-width: 41.6666666667%;
+  flex-basis: 41.6666666667%; }
+
+.col-sm-offset-4 {
+  margin-left: 33.3333333333%; }
+
+.col-sm-6,
+.row.cols-sm-6 > * {
+  max-width: 50%;
+  flex-basis: 50%; }
+
+.col-sm-offset-5 {
+  margin-left: 41.6666666667%; }
+
+.col-sm-7,
+.row.cols-sm-7 > * {
+  max-width: 58.3333333333%;
+  flex-basis: 58.3333333333%; }
+
+.col-sm-offset-6 {
+  margin-left: 50%; }
+
+.col-sm-8,
+.row.cols-sm-8 > * {
+  max-width: 66.6666666667%;
+  flex-basis: 66.6666666667%; }
+
+.col-sm-offset-7 {
+  margin-left: 58.3333333333%; }
+
+.col-sm-9,
+.row.cols-sm-9 > * {
+  max-width: 75%;
+  flex-basis: 75%; }
+
+.col-sm-offset-8 {
+  margin-left: 66.6666666667%; }
+
+.col-sm-10,
+.row.cols-sm-10 > * {
+  max-width: 83.3333333333%;
+  flex-basis: 83.3333333333%; }
+
+.col-sm-offset-9 {
+  margin-left: 75%; }
+
+.col-sm-11,
+.row.cols-sm-11 > * {
+  max-width: 91.6666666667%;
+  flex-basis: 91.6666666667%; }
+
+.col-sm-offset-10 {
+  margin-left: 83.3333333333%; }
+
+.col-sm-12,
+.row.cols-sm-12 > * {
+  max-width: 100%;
+  flex-basis: 100%; }
+
+.col-sm-offset-11 {
+  margin-left: 91.6666666667%; }
+
+.col-sm-normal {
+  order: initial; }
+
+.col-sm-first {
+  order: -999; }
+
+.col-sm-last {
+  order: 999; }
+
+@media screen and (min-width: 500px) {
+  .col-md,
+  [class^='col-md-'],
+  [class^='col-md-offset-'],
+  .row[class*='cols-md-'] > * {
+    box-sizing: border-box;
+    flex: 0 0 auto;
+    padding: 0 calc(var(--universal-padding) / 2); }
+
+  .col-md,
+  .row.cols-md > * {
+    max-width: 100%;
+    flex-grow: 1;
+    flex-basis: 0; }
+
+  .col-md-1,
+  .row.cols-md-1 > * {
+    max-width: 8.3333333333%;
+    flex-basis: 8.3333333333%; }
+
+  .col-md-offset-0 {
+    margin-left: 0; }
+
+  .col-md-2,
+  .row.cols-md-2 > * {
+    max-width: 16.6666666667%;
+    flex-basis: 16.6666666667%; }
+
+  .col-md-offset-1 {
+    margin-left: 8.3333333333%; }
+
+  .col-md-3,
+  .row.cols-md-3 > * {
+    max-width: 25%;
+    flex-basis: 25%; }
+
+  .col-md-offset-2 {
+    margin-left: 16.6666666667%; }
+
+  .col-md-4,
+  .row.cols-md-4 > * {
+    max-width: 33.3333333333%;
+    flex-basis: 33.3333333333%; }
+
+  .col-md-offset-3 {
+    margin-left: 25%; }
+
+  .col-md-5,
+  .row.cols-md-5 > * {
+    max-width: 41.6666666667%;
+    flex-basis: 41.6666666667%; }
+
+  .col-md-offset-4 {
+    margin-left: 33.3333333333%; }
+
+  .col-md-6,
+  .row.cols-md-6 > * {
+    max-width: 50%;
+    flex-basis: 50%; }
+
+  .col-md-offset-5 {
+    margin-left: 41.6666666667%; }
+
+  .col-md-7,
+  .row.cols-md-7 > * {
+    max-width: 58.3333333333%;
+    flex-basis: 58.3333333333%; }
+
+  .col-md-offset-6 {
+    margin-left: 50%; }
+
+  .col-md-8,
+  .row.cols-md-8 > * {
+    max-width: 66.6666666667%;
+    flex-basis: 66.6666666667%; }
+
+  .col-md-offset-7 {
+    margin-left: 58.3333333333%; }
+
+  .col-md-9,
+  .row.cols-md-9 > * {
+    max-width: 75%;
+    flex-basis: 75%; }
+
+  .col-md-offset-8 {
+    margin-left: 66.6666666667%; }
+
+  .col-md-10,
+  .row.cols-md-10 > * {
+    max-width: 83.3333333333%;
+    flex-basis: 83.3333333333%; }
+
+  .col-md-offset-9 {
+    margin-left: 75%; }
+
+  .col-md-11,
+  .row.cols-md-11 > * {
+    max-width: 91.6666666667%;
+    flex-basis: 91.6666666667%; }
+
+  .col-md-offset-10 {
+    margin-left: 83.3333333333%; }
+
+  .col-md-12,
+  .row.cols-md-12 > * {
+    max-width: 100%;
+    flex-basis: 100%; }
+
+  .col-md-offset-11 {
+    margin-left: 91.6666666667%; }
+
+  .col-md-normal {
+    order: initial; }
+
+  .col-md-first {
+    order: -999; }
+
+  .col-md-last {
+    order: 999; } }
+@media screen and (min-width: 1280px) {
+  .col-lg,
+  [class^='col-lg-'],
+  [class^='col-lg-offset-'],
+  .row[class*='cols-lg-'] > * {
+    box-sizing: border-box;
+    flex: 0 0 auto;
+    padding: 0 calc(var(--universal-padding) / 2); }
+
+  .col-lg,
+  .row.cols-lg > * {
+    max-width: 100%;
+    flex-grow: 1;
+    flex-basis: 0; }
+
+  .col-lg-1,
+  .row.cols-lg-1 > * {
+    max-width: 8.3333333333%;
+    flex-basis: 8.3333333333%; }
+
+  .col-lg-offset-0 {
+    margin-left: 0; }
+
+  .col-lg-2,
+  .row.cols-lg-2 > * {
+    max-width: 16.6666666667%;
+    flex-basis: 16.6666666667%; }
+
+  .col-lg-offset-1 {
+    margin-left: 8.3333333333%; }
+
+  .col-lg-3,
+  .row.cols-lg-3 > * {
+    max-width: 25%;
+    flex-basis: 25%; }
+
+  .col-lg-offset-2 {
+    margin-left: 16.6666666667%; }
+
+  .col-lg-4,
+  .row.cols-lg-4 > * {
+    max-width: 33.3333333333%;
+    flex-basis: 33.3333333333%; }
+
+  .col-lg-offset-3 {
+    margin-left: 25%; }
+
+  .col-lg-5,
+  .row.cols-lg-5 > * {
+    max-width: 41.6666666667%;
+    flex-basis: 41.6666666667%; }
+
+  .col-lg-offset-4 {
+    margin-left: 33.3333333333%; }
+
+  .col-lg-6,
+  .row.cols-lg-6 > * {
+    max-width: 50%;
+    flex-basis: 50%; }
+
+  .col-lg-offset-5 {
+    margin-left: 41.6666666667%; }
+
+  .col-lg-7,
+  .row.cols-lg-7 > * {
+    max-width: 58.3333333333%;
+    flex-basis: 58.3333333333%; }
+
+  .col-lg-offset-6 {
+    margin-left: 50%; }
+
+  .col-lg-8,
+  .row.cols-lg-8 > * {
+    max-width: 66.6666666667%;
+    flex-basis: 66.6666666667%; }
+
+  .col-lg-offset-7 {
+    margin-left: 58.3333333333%; }
+
+  .col-lg-9,
+  .row.cols-lg-9 > * {
+    max-width: 75%;
+    flex-basis: 75%; }
+
+  .col-lg-offset-8 {
+    margin-left: 66.6666666667%; }
+
+  .col-lg-10,
+  .row.cols-lg-10 > * {
+    max-width: 83.3333333333%;
+    flex-basis: 83.3333333333%; }
+
+  .col-lg-offset-9 {
+    margin-left: 75%; }
+
+  .col-lg-11,
+  .row.cols-lg-11 > * {
+    max-width: 91.6666666667%;
+    flex-basis: 91.6666666667%; }
+
+  .col-lg-offset-10 {
+    margin-left: 83.3333333333%; }
+
+  .col-lg-12,
+  .row.cols-lg-12 > * {
+    max-width: 100%;
+    flex-basis: 100%; }
+
+  .col-lg-offset-11 {
+    margin-left: 91.6666666667%; }
+
+  .col-lg-normal {
+    order: initial; }
+
+  .col-lg-first {
+    order: -999; }
+
+  .col-lg-last {
+    order: 999; } }
+/* Card component CSS variable definitions */
+:root {
+  --card-back-color: #3cb4e6;
+  --card-fore-color: #03234b;
+  --card-border-color: #03234b; }
+
+.card {
+  display: flex;
+  flex-direction: column;
+  justify-content: space-between;
+  align-self: center;
+  position: relative;
+  width: 100%;
+  background: var(--card-back-color);
+  color: var(--card-fore-color);
+  border: 0.0714285714rem solid var(--card-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin);
+  overflow: hidden; }
+  @media screen and (min-width: 320px) {
+    .card {
+      max-width: 320px; } }
+  .card > .sectione {
+    background: var(--card-back-color);
+    color: var(--card-fore-color);
+    box-sizing: border-box;
+    margin: 0;
+    border: 0;
+    border-radius: 0;
+    border-bottom: 0.0714285714rem solid var(--card-border-color);
+    padding: var(--universal-padding);
+    width: 100%; }
+    .card > .sectione.media {
+      height: 200px;
+      padding: 0;
+      -o-object-fit: cover;
+      object-fit: cover; }
+  .card > .sectione:last-child {
+    border-bottom: 0; }
+
+/*
+  Custom elements for card elements.
+*/
+@media screen and (min-width: 240px) {
+  .card.small {
+    max-width: 240px; } }
+@media screen and (min-width: 480px) {
+  .card.large {
+    max-width: 480px; } }
+.card.fluid {
+  max-width: 100%;
+  width: auto; }
+
+.card.warning {
+  --card-back-color: #e5b8b7;
+  --card-fore-color: #3b234b;
+  --card-border-color: #8c0078; }
+
+.card.error {
+  --card-back-color: #464650;
+  --card-fore-color: #ffffff;
+  --card-border-color: #8c0078; }
+
+.card > .sectione.dark {
+  --card-back-color: #3b234b;
+  --card-fore-color: #ffffff; }
+
+.card > .sectione.double-padded {
+  padding: calc(1.5 * var(--universal-padding)); }
+
+/*
+  Definitions for forms and input elements.
+*/
+/* Input_control module CSS variable definitions */
+:root {
+  --form-back-color: #ffe97f;
+  --form-fore-color: #03234b;
+  --form-border-color: #3cb4e6;
+  --input-back-color: #ffffff;
+  --input-fore-color: #03234b;
+  --input-border-color: #3cb4e6;
+  --input-focus-color: #0288d1;
+  --input-invalid-color: #d32f2f;
+  --button-back-color: #e2e2e2;
+  --button-hover-back-color: #dcdcdc;
+  --button-fore-color: #212121;
+  --button-border-color: transparent;
+  --button-hover-border-color: transparent;
+  --button-group-border-color: rgba(124, 124, 124, 0.54); }
+
+form {
+  background: var(--form-back-color);
+  color: var(--form-fore-color);
+  border: 0.0714285714rem solid var(--form-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin);
+  padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
+
+fieldset {
+  border: 0.0714285714rem solid var(--form-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: calc(var(--universal-margin) / 4);
+  padding: var(--universal-padding); }
+
+legend {
+  box-sizing: border-box;
+  display: table;
+  max-width: 100%;
+  white-space: normal;
+  font-weight: 500;
+  padding: calc(var(--universal-padding) / 2); }
+
+label {
+  padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+.input-group {
+  display: inline-block; }
+  .input-group.fluid {
+    display: flex;
+    align-items: center;
+    justify-content: center; }
+    .input-group.fluid > input {
+      max-width: 100%;
+      flex-grow: 1;
+      flex-basis: 0px; }
+    @media screen and (max-width: 499px) {
+      .input-group.fluid {
+        align-items: stretch;
+        flex-direction: column; } }
+  .input-group.vertical {
+    display: flex;
+    align-items: stretch;
+    flex-direction: column; }
+    .input-group.vertical > input {
+      max-width: 100%;
+      flex-grow: 1;
+      flex-basis: 0px; }
+
+[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {
+  height: auto; }
+
+[type="search"] {
+  -webkit-appearance: textfield;
+  outline-offset: -2px; }
+
+[type="search"]::-webkit-search-cancel-button,
+[type="search"]::-webkit-search-decoration {
+  -webkit-appearance: none; }
+
+input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],
+[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {
+  box-sizing: border-box;
+  background: var(--input-back-color);
+  color: var(--input-fore-color);
+  border: 0.0714285714rem solid var(--input-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: calc(var(--universal-margin) / 2);
+  padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {
+  border-color: var(--input-focus-color);
+  box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {
+  border-color: var(--input-invalid-color);
+  box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {
+  background: var(--secondary-back-color); }
+
+select {
+  max-width: 100%; }
+
+option {
+  overflow: hidden;
+  text-overflow: ellipsis; }
+
+[type="checkbox"], [type="radio"] {
+  -webkit-appearance: none;
+  -moz-appearance: none;
+  appearance: none;
+  position: relative;
+  height: calc(1rem + var(--universal-padding) / 2);
+  width: calc(1rem + var(--universal-padding) / 2);
+  vertical-align: text-bottom;
+  padding: 0;
+  flex-basis: calc(1rem + var(--universal-padding) / 2) !important;
+  flex-grow: 0 !important; }
+  [type="checkbox"]:checked:before, [type="radio"]:checked:before {
+    position: absolute; }
+
+[type="checkbox"]:checked:before {
+  content: '\2713';
+  font-family: sans-serif;
+  font-size: calc(1rem + var(--universal-padding) / 2);
+  top: calc(0rem - var(--universal-padding));
+  left: calc(var(--universal-padding) / 4); }
+
+[type="radio"] {
+  border-radius: 100%; }
+  [type="radio"]:checked:before {
+    border-radius: 100%;
+    content: '';
+    top: calc(0.0714285714rem + var(--universal-padding) / 2);
+    left: calc(0.0714285714rem + var(--universal-padding) / 2);
+    background: var(--input-fore-color);
+    width: 0.5rem;
+    height: 0.5rem; }
+
+:placeholder-shown {
+  color: var(--input-fore-color); }
+
+::-ms-placeholder {
+  color: var(--input-fore-color);
+  opacity: 0.54; }
+
+button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {
+  border-style: none;
+  padding: 0; }
+
+button, html [type="button"], [type="reset"], [type="submit"] {
+  -webkit-appearance: button; }
+
+button {
+  overflow: visible;
+  text-transform: none; }
+
+button, [type="button"], [type="submit"], [type="reset"],
+a.button, label.button, .button,
+a[role="button"], label[role="button"], [role="button"] {
+  display: inline-block;
+  background: var(--button-back-color);
+  color: var(--button-fore-color);
+  border: 0.0714285714rem solid var(--button-border-color);
+  border-radius: var(--universal-border-radius);
+  padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
+  margin: var(--universal-margin);
+  text-decoration: none;
+  cursor: pointer;
+  transition: background 0.3s; }
+  button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,
+  a.button:hover,
+  a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,
+  a[role="button"]:hover,
+  a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {
+    background: var(--button-hover-back-color);
+    border-color: var(--button-hover-border-color); }
+
+input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {
+  cursor: not-allowed;
+  opacity: 0.75; }
+
+.button-group {
+  display: flex;
+  border: 0.0714285714rem solid var(--button-group-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin); }
+  .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
+    margin: 0;
+    max-width: 100%;
+    flex: 1 1 auto;
+    text-align: center;
+    border: 0;
+    border-radius: 0;
+    box-shadow: none; }
+  .button-group > :not(:first-child) {
+    border-left: 0.0714285714rem solid var(--button-group-border-color); }
+  @media screen and (max-width: 499px) {
+    .button-group {
+      flex-direction: column; }
+      .button-group > :not(:first-child) {
+        border: 0;
+        border-top: 0.0714285714rem solid var(--button-group-border-color); } }
+
+/*
+  Custom elements for forms and input elements.
+*/
+button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {
+  --button-back-color: #1976d2;
+  --button-fore-color: #f8f8f8; }
+  button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {
+    --button-hover-back-color: #1565c0; }
+
+button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {
+  --button-back-color: #d32f2f;
+  --button-fore-color: #f8f8f8; }
+  button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {
+    --button-hover-back-color: #c62828; }
+
+button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {
+  --button-back-color: #308732;
+  --button-fore-color: #f8f8f8; }
+  button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {
+    --button-hover-back-color: #277529; }
+
+button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {
+  --button-back-color: #212121;
+  --button-fore-color: #f8f8f8; }
+  button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {
+    --button-hover-back-color: #111; }
+
+button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {
+  padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));
+  margin: var(--universal-margin); }
+
+button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {
+  padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));
+  margin: var(--universal-margin); }
+
+/*
+  Definitions for navigation elements.
+*/
+/* Navigation module CSS variable definitions */
+:root {
+  --header-back-color: #03234b;
+  --header-hover-back-color: #ffd200;
+  --header-fore-color: #ffffff;
+  --header-border-color: #3cb4e6;
+  --nav-back-color: #ffffff;
+  --nav-hover-back-color: #ffe97f;
+  --nav-fore-color: #e6007e;
+  --nav-border-color: #3cb4e6;
+  --nav-link-color: #3cb4e6;
+  --footer-fore-color: #ffffff;
+  --footer-back-color: #03234b;
+  --footer-border-color: #3cb4e6;
+  --footer-link-color: #3cb4e6;
+  --drawer-back-color: #ffffff;
+  --drawer-hover-back-color: #ffe97f;
+  --drawer-border-color: #3cb4e6;
+  --drawer-close-color: #e6007e; }
+
+header {
+  height: 2.75rem;
+  background: var(--header-back-color);
+  color: var(--header-fore-color);
+  border-bottom: 0.0714285714rem solid var(--header-border-color);
+  padding: calc(var(--universal-padding) / 4) 0;
+  white-space: nowrap;
+  overflow-x: auto;
+  overflow-y: hidden; }
+  header.row {
+    box-sizing: content-box; }
+  header .logo {
+    color: var(--header-fore-color);
+    font-size: 1.75rem;
+    padding: var(--universal-padding) calc(2 * var(--universal-padding));
+    text-decoration: none; }
+  header button, header [type="button"], header .button, header [role="button"] {
+    box-sizing: border-box;
+    position: relative;
+    top: calc(0rem - var(--universal-padding) / 4);
+    height: calc(3.1875rem + var(--universal-padding) / 2);
+    background: var(--header-back-color);
+    line-height: calc(3.1875rem - var(--universal-padding) * 1.5);
+    text-align: center;
+    color: var(--header-fore-color);
+    border: 0;
+    border-radius: 0;
+    margin: 0;
+    text-transform: uppercase; }
+    header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {
+      background: var(--header-hover-back-color); }
+
+nav {
+  background: var(--nav-back-color);
+  color: var(--nav-fore-color);
+  border: 0.0714285714rem solid var(--nav-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin); }
+  nav * {
+    padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+  nav a, nav a:visited {
+    display: block;
+    color: var(--nav-link-color);
+    border-radius: var(--universal-border-radius);
+    transition: background 0.3s; }
+    nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {
+      text-decoration: none;
+      background: var(--nav-hover-back-color); }
+  nav .sublink-1 {
+    position: relative;
+    margin-left: calc(2 * var(--universal-padding)); }
+    nav .sublink-1:before {
+      position: absolute;
+      left: calc(var(--universal-padding) - 1 * var(--universal-padding));
+      top: -0.0714285714rem;
+      content: '';
+      height: 100%;
+      border: 0.0714285714rem solid var(--nav-border-color);
+      border-left: 0; }
+  nav .sublink-2 {
+    position: relative;
+    margin-left: calc(4 * var(--universal-padding)); }
+    nav .sublink-2:before {
+      position: absolute;
+      left: calc(var(--universal-padding) - 3 * var(--universal-padding));
+      top: -0.0714285714rem;
+      content: '';
+      height: 100%;
+      border: 0.0714285714rem solid var(--nav-border-color);
+      border-left: 0; }
+
+footer {
+  background: var(--footer-back-color);
+  color: var(--footer-fore-color);
+  border-top: 0.0714285714rem solid var(--footer-border-color);
+  padding: calc(2 * var(--universal-padding)) var(--universal-padding);
+  font-size: 0.875rem; }
+  footer a, footer a:visited {
+    color: var(--footer-link-color); }
+
+header.sticky {
+  position: -webkit-sticky;
+  position: sticky;
+  z-index: 1101;
+  top: 0; }
+
+footer.sticky {
+  position: -webkit-sticky;
+  position: sticky;
+  z-index: 1101;
+  bottom: 0; }
+
+.drawer-toggle:before {
+  display: inline-block;
+  position: relative;
+  vertical-align: bottom;
+  content: '\00a0\2261\00a0';
+  font-family: sans-serif;
+  font-size: 1.5em; }
+@media screen and (min-width: 500px) {
+  .drawer-toggle:not(.persistent) {
+    display: none; } }
+
+[type="checkbox"].drawer {
+  height: 1px;
+  width: 1px;
+  margin: -1px;
+  overflow: hidden;
+  position: absolute;
+  clip: rect(0 0 0 0);
+  -webkit-clip-path: inset(100%);
+  clip-path: inset(100%); }
+  [type="checkbox"].drawer + * {
+    display: block;
+    box-sizing: border-box;
+    position: fixed;
+    top: 0;
+    width: 320px;
+    height: 100vh;
+    overflow-y: auto;
+    background: var(--drawer-back-color);
+    border: 0.0714285714rem solid var(--drawer-border-color);
+    border-radius: 0;
+    margin: 0;
+    z-index: 1110;
+    right: -320px;
+    transition: right 0.3s; }
+    [type="checkbox"].drawer + * .drawer-close {
+      position: absolute;
+      top: var(--universal-margin);
+      right: var(--universal-margin);
+      z-index: 1111;
+      width: 2rem;
+      height: 2rem;
+      border-radius: var(--universal-border-radius);
+      padding: var(--universal-padding);
+      margin: 0;
+      cursor: pointer;
+      transition: background 0.3s; }
+      [type="checkbox"].drawer + * .drawer-close:before {
+        display: block;
+        content: '\00D7';
+        color: var(--drawer-close-color);
+        position: relative;
+        font-family: sans-serif;
+        font-size: 2rem;
+        line-height: 1;
+        text-align: center; }
+      [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {
+        background: var(--drawer-hover-back-color); }
+    @media screen and (max-width: 320px) {
+      [type="checkbox"].drawer + * {
+        width: 100%; } }
+  [type="checkbox"].drawer:checked + * {
+    right: 0; }
+  @media screen and (min-width: 500px) {
+    [type="checkbox"].drawer:not(.persistent) + * {
+      position: static;
+      height: 100%;
+      z-index: 1100; }
+      [type="checkbox"].drawer:not(.persistent) + * .drawer-close {
+        display: none; } }
+
+/*
+  Definitions for the responsive table component.
+*/
+/* Table module CSS variable definitions. */
+:root {
+  --table-border-color: #03234b;
+  --table-border-separator-color: #03234b;
+  --table-head-back-color: #03234b;
+  --table-head-fore-color: #ffffff;
+  --table-body-back-color: #ffffff;
+  --table-body-fore-color: #03234b;
+  --table-body-alt-back-color: #f4f4f4; }
+
+table {
+  border-collapse: separate;
+  border-spacing: 0;
+  margin: 0;
+  display: flex;
+  flex: 0 1 auto;
+  flex-flow: row wrap;
+  padding: var(--universal-padding);
+  padding-top: 0; }
+  table caption {
+    font-size: 1rem;
+    margin: calc(2 * var(--universal-margin)) 0;
+    max-width: 100%;
+    flex: 0 0 100%; }
+  table thead, table tbody {
+    display: flex;
+    flex-flow: row wrap;
+    border: 0.0714285714rem solid var(--table-border-color); }
+  table thead {
+    z-index: 999;
+    border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
+    border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
+  table tbody {
+    border-top: 0;
+    margin-top: calc(0 - var(--universal-margin));
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+  table tr {
+    display: flex;
+    padding: 0; }
+  table th, table td {
+    padding: calc(0.5 * var(--universal-padding));
+		font-size: 0.9rem; }
+  table th {
+    text-align: left;
+    background: var(--table-head-back-color);
+    color: var(--table-head-fore-color); }
+  table td {
+    background: var(--table-body-back-color);
+    color: var(--table-body-fore-color);
+    border-top: 0.0714285714rem solid var(--table-border-color); }
+
+table:not(.horizontal) {
+  overflow: auto;
+  max-height: 100%; }
+  table:not(.horizontal) thead, table:not(.horizontal) tbody {
+    max-width: 100%;
+    flex: 0 0 100%; }
+  table:not(.horizontal) tr {
+    flex-flow: row wrap;
+    flex: 0 0 100%; }
+  table:not(.horizontal) th, table:not(.horizontal) td {
+    flex: 1 0 0%;
+    overflow: hidden;
+    text-overflow: ellipsis; }
+  table:not(.horizontal) thead {
+    position: sticky;
+    top: 0; }
+  table:not(.horizontal) tbody tr:first-child td {
+    border-top: 0; }
+
+table.horizontal {
+  border: 0; }
+  table.horizontal thead, table.horizontal tbody {
+    border: 0;
+    flex: .2 0 0;
+    flex-flow: row nowrap; }
+  table.horizontal tbody {
+    overflow: auto;
+    justify-content: space-between;
+    flex: .8 0 0;
+    margin-left: 0;
+    padding-bottom: calc(var(--universal-padding) / 4); }
+  table.horizontal tr {
+    flex-direction: column;
+    flex: 1 0 auto; }
+  table.horizontal th, table.horizontal td {
+    width: auto;
+    border: 0;
+    border-bottom: 0.0714285714rem solid var(--table-border-color); }
+    table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
+      border-top: 0; }
+  table.horizontal th {
+    text-align: right;
+    border-left: 0.0714285714rem solid var(--table-border-color);
+    border-right: 0.0714285714rem solid var(--table-border-separator-color); }
+  table.horizontal thead tr:first-child {
+    padding-left: 0; }
+  table.horizontal th:first-child, table.horizontal td:first-child {
+    border-top: 0.0714285714rem solid var(--table-border-color); }
+  table.horizontal tbody tr:last-child td {
+    border-right: 0.0714285714rem solid var(--table-border-color); }
+    table.horizontal tbody tr:last-child td:first-child {
+      border-top-right-radius: 0.25rem; }
+    table.horizontal tbody tr:last-child td:last-child {
+      border-bottom-right-radius: 0.25rem; }
+  table.horizontal thead tr:first-child th:first-child {
+    border-top-left-radius: 0.25rem; }
+  table.horizontal thead tr:first-child th:last-child {
+    border-bottom-left-radius: 0.25rem; }
+
+@media screen and (max-width: 499px) {
+  table, table.horizontal {
+    border-collapse: collapse;
+    border: 0;
+    width: 100%;
+    display: table; }
+    table thead, table th, table.horizontal thead, table.horizontal th {
+      border: 0;
+      height: 1px;
+      width: 1px;
+      margin: -1px;
+      overflow: hidden;
+      padding: 0;
+      position: absolute;
+      clip: rect(0 0 0 0);
+      -webkit-clip-path: inset(100%);
+      clip-path: inset(100%); }
+    table tbody, table.horizontal tbody {
+      border: 0;
+      display: table-row-group; }
+    table tr, table.horizontal tr {
+      display: block;
+      border: 0.0714285714rem solid var(--table-border-color);
+      border-radius: var(--universal-border-radius);
+      background: #ffffff;
+      padding: var(--universal-padding);
+      margin: var(--universal-margin);
+      margin-bottom: calc(1 * var(--universal-margin)); }
+    table th, table td, table.horizontal th, table.horizontal td {
+      width: auto; }
+    table td, table.horizontal td {
+      display: block;
+      border: 0;
+      text-align: right; }
+    table td:before, table.horizontal td:before {
+      content: attr(data-label);
+      float: left;
+      font-weight: 600; }
+    table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {
+      border-top: 0; }
+    table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
+      border-right: 0; } }
+table tr:nth-of-type(2n) > td {
+  background: var(--table-body-alt-back-color); }
+
+@media screen and (max-width: 500px) {
+  table tr:nth-of-type(2n) {
+    background: var(--table-body-alt-back-color); } }
+:root {
+  --table-body-hover-back-color: #90caf9; }
+
+table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+  background: var(--table-body-hover-back-color); }
+
+@media screen and (max-width: 500px) {
+  table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+    background: var(--table-body-hover-back-color); } }
+/*
+  Definitions for contextual background elements, toasts and tooltips.
+*/
+/* Contextual module CSS variable definitions */
+:root {
+  --mark-back-color: #3cb4e6;
+  --mark-fore-color: #ffffff; }
+
+mark {
+  background: var(--mark-back-color);
+  color: var(--mark-fore-color);
+  font-size: 0.95em;
+  line-height: 1em;
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
+  mark.inline-block {
+    display: inline-block;
+    font-size: 1em;
+    line-height: 1.4;
+    padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+:root {
+  --toast-back-color: #424242;
+  --toast-fore-color: #fafafa; }
+
+.toast {
+  position: fixed;
+  bottom: calc(var(--universal-margin) * 3);
+  left: 50%;
+  transform: translate(-50%, -50%);
+  z-index: 1111;
+  color: var(--toast-fore-color);
+  background: var(--toast-back-color);
+  border-radius: calc(var(--universal-border-radius) * 16);
+  padding: var(--universal-padding) calc(var(--universal-padding) * 3); }
+
+:root {
+  --tooltip-back-color: #212121;
+  --tooltip-fore-color: #fafafa; }
+
+.tooltip {
+  position: relative;
+  display: inline-block; }
+  .tooltip:before, .tooltip:after {
+    position: absolute;
+    opacity: 0;
+    clip: rect(0 0 0 0);
+    -webkit-clip-path: inset(100%);
+    clip-path: inset(100%);
+    transition: all 0.3s;
+    z-index: 1010;
+    left: 50%; }
+  .tooltip:not(.bottom):before, .tooltip:not(.bottom):after {
+    bottom: 75%; }
+  .tooltip.bottom:before, .tooltip.bottom:after {
+    top: 75%; }
+  .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {
+    opacity: 1;
+    clip: auto;
+    -webkit-clip-path: inset(0%);
+    clip-path: inset(0%); }
+  .tooltip:before {
+    content: '';
+    background: transparent;
+    border: var(--universal-margin) solid transparent;
+    left: calc(50% - var(--universal-margin)); }
+  .tooltip:not(.bottom):before {
+    border-top-color: #212121; }
+  .tooltip.bottom:before {
+    border-bottom-color: #212121; }
+  .tooltip:after {
+    content: attr(aria-label);
+    color: var(--tooltip-fore-color);
+    background: var(--tooltip-back-color);
+    border-radius: var(--universal-border-radius);
+    padding: var(--universal-padding);
+    white-space: nowrap;
+    transform: translateX(-50%); }
+  .tooltip:not(.bottom):after {
+    margin-bottom: calc(2 * var(--universal-margin)); }
+  .tooltip.bottom:after {
+    margin-top: calc(2 * var(--universal-margin)); }
+
+:root {
+  --modal-overlay-color: rgba(0, 0, 0, 0.45);
+  --modal-close-color: #e6007e;
+  --modal-close-hover-color: #ffe97f; }
+
+[type="checkbox"].modal {
+  height: 1px;
+  width: 1px;
+  margin: -1px;
+  overflow: hidden;
+  position: absolute;
+  clip: rect(0 0 0 0);
+  -webkit-clip-path: inset(100%);
+  clip-path: inset(100%); }
+  [type="checkbox"].modal + div {
+    position: fixed;
+    top: 0;
+    left: 0;
+    display: none;
+    width: 100vw;
+    height: 100vh;
+    background: var(--modal-overlay-color); }
+    [type="checkbox"].modal + div .card {
+      margin: 0 auto;
+      max-height: 50vh;
+      overflow: auto; }
+      [type="checkbox"].modal + div .card .modal-close {
+        position: absolute;
+        top: 0;
+        right: 0;
+        width: 1.75rem;
+        height: 1.75rem;
+        border-radius: var(--universal-border-radius);
+        padding: var(--universal-padding);
+        margin: 0;
+        cursor: pointer;
+        transition: background 0.3s; }
+        [type="checkbox"].modal + div .card .modal-close:before {
+          display: block;
+          content: '\00D7';
+          color: var(--modal-close-color);
+          position: relative;
+          font-family: sans-serif;
+          font-size: 1.75rem;
+          line-height: 1;
+          text-align: center; }
+        [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {
+          background: var(--modal-close-hover-color); }
+  [type="checkbox"].modal:checked + div {
+    display: flex;
+    flex: 0 1 auto;
+    z-index: 1200; }
+    [type="checkbox"].modal:checked + div .card .modal-close {
+      z-index: 1211; }
+
+:root {
+  --collapse-label-back-color: #03234b;
+  --collapse-label-fore-color: #ffffff;
+  --collapse-label-hover-back-color: #3cb4e6;
+  --collapse-selected-label-back-color: #3cb4e6;
+  --collapse-border-color: var(--collapse-label-back-color);
+  --collapse-selected-border-color: #ceecf8;
+  --collapse-content-back-color: #ffffff;
+  --collapse-selected-label-border-color: #3cb4e6; }
+
+.collapse {
+  width: calc(100% - 2 * var(--universal-margin));
+  opacity: 1;
+  display: flex;
+  flex-direction: column;
+  margin: var(--universal-margin);
+  border-radius: var(--universal-border-radius); }
+  .collapse > [type="radio"], .collapse > [type="checkbox"] {
+    height: 1px;
+    width: 1px;
+    margin: -1px;
+    overflow: hidden;
+    position: absolute;
+    clip: rect(0 0 0 0);
+    -webkit-clip-path: inset(100%);
+    clip-path: inset(100%); }
+  .collapse > label {
+    flex-grow: 1;
+    display: inline-block;
+    height: 1.25rem;
+    cursor: pointer;
+    transition: background 0.2s;
+    color: var(--collapse-label-fore-color);
+    background: var(--collapse-label-back-color);
+    border: 0.0714285714rem solid var(--collapse-selected-border-color);
+    padding: calc(1.25 * var(--universal-padding)); }
+    .collapse > label:hover, .collapse > label:focus {
+      background: var(--collapse-label-hover-back-color); }
+    .collapse > label + div {
+      flex-basis: auto;
+      height: 1px;
+      width: 1px;
+      margin: -1px;
+      overflow: hidden;
+      position: absolute;
+      clip: rect(0 0 0 0);
+      -webkit-clip-path: inset(100%);
+      clip-path: inset(100%);
+      transition: max-height 0.3s;
+      max-height: 1px; }
+  .collapse > :checked + label {
+    background: var(--collapse-selected-label-back-color);
+    border-color: var(--collapse-selected-label-border-color); }
+    .collapse > :checked + label + div {
+      box-sizing: border-box;
+      position: relative;
+      width: 100%;
+      height: auto;
+      overflow: auto;
+      margin: 0;
+      background: var(--collapse-content-back-color);
+      border: 0.0714285714rem solid var(--collapse-selected-border-color);
+      border-top: 0;
+      padding: var(--universal-padding);
+      clip: auto;
+      -webkit-clip-path: inset(0%);
+      clip-path: inset(0%);
+      max-height: 100%; }
+  .collapse > label:not(:first-of-type) {
+    border-top: 0; }
+  .collapse > label:first-of-type {
+    border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }
+  .collapse > label:last-of-type:not(:first-of-type) {
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+  .collapse > label:last-of-type:first-of-type {
+    border-radius: var(--universal-border-radius); }
+  .collapse > :checked:last-of-type:not(:first-of-type) + label {
+    border-radius: 0; }
+  .collapse > :checked:last-of-type + label + div {
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+
+/*
+  Custom elements for contextual background elements, toasts and tooltips.
+*/
+mark.tertiary {
+  --mark-back-color: #3cb4e6; }
+
+mark.tag {
+  padding: calc(var(--universal-padding)/2) var(--universal-padding);
+  border-radius: 1em; }
+
+/*
+  Definitions for progress elements and spinners.
+*/
+/* Progress module CSS variable definitions */
+:root {
+  --progress-back-color: #3cb4e6;
+  --progress-fore-color: #555; }
+
+progress {
+  display: block;
+  vertical-align: baseline;
+  -webkit-appearance: none;
+  -moz-appearance: none;
+  appearance: none;
+  height: 0.75rem;
+  width: calc(100% - 2 * var(--universal-margin));
+  margin: var(--universal-margin);
+  border: 0;
+  border-radius: calc(2 * var(--universal-border-radius));
+  background: var(--progress-back-color);
+  color: var(--progress-fore-color); }
+  progress::-webkit-progress-value {
+    background: var(--progress-fore-color);
+    border-top-left-radius: calc(2 * var(--universal-border-radius));
+    border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+  progress::-webkit-progress-bar {
+    background: var(--progress-back-color); }
+  progress::-moz-progress-bar {
+    background: var(--progress-fore-color);
+    border-top-left-radius: calc(2 * var(--universal-border-radius));
+    border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+  progress[value="1000"]::-webkit-progress-value {
+    border-radius: calc(2 * var(--universal-border-radius)); }
+  progress[value="1000"]::-moz-progress-bar {
+    border-radius: calc(2 * var(--universal-border-radius)); }
+  progress.inline {
+    display: inline-block;
+    vertical-align: middle;
+    width: 60%; }
+
+:root {
+  --spinner-back-color: #ddd;
+  --spinner-fore-color: #555; }
+
+@keyframes spinner-donut-anim {
+  0% {
+    transform: rotate(0deg); }
+  100% {
+    transform: rotate(360deg); } }
+.spinner {
+  display: inline-block;
+  margin: var(--universal-margin);
+  border: 0.25rem solid var(--spinner-back-color);
+  border-left: 0.25rem solid var(--spinner-fore-color);
+  border-radius: 50%;
+  width: 1.25rem;
+  height: 1.25rem;
+  animation: spinner-donut-anim 1.2s linear infinite; }
+
+/*
+  Custom elements for progress bars and spinners.
+*/
+progress.primary {
+  --progress-fore-color: #1976d2; }
+
+progress.secondary {
+  --progress-fore-color: #d32f2f; }
+
+progress.tertiary {
+  --progress-fore-color: #308732; }
+
+.spinner.primary {
+  --spinner-fore-color: #1976d2; }
+
+.spinner.secondary {
+  --spinner-fore-color: #d32f2f; }
+
+.spinner.tertiary {
+  --spinner-fore-color: #308732; }
+
+/*
+  Definitions for icons - powered by Feather (https://feathericons.com/).
+*/
+span[class^='icon-'] {
+  display: inline-block;
+  height: 1em;
+  width: 1em;
+  vertical-align: -0.125em;
+  background-size: contain;
+  margin: 0 calc(var(--universal-margin) / 4); }
+  span[class^='icon-'].secondary {
+    -webkit-filter: invert(25%);
+    filter: invert(25%); }
+  span[class^='icon-'].inverse {
+    -webkit-filter: invert(100%);
+    filter: invert(100%); }
+
+span.icon-alert {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-bookmark {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-calendar {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-credit {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-edit {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+span.icon-link {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-help {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-home {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-info {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-lock {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-mail {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-location {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-phone {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-rss {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-search {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-settings {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-share {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-cart {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-upload {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-user {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+
+/*
+  Definitions for STMicroelectronics icons (https://brandportal.st.com/document/26).
+*/
+span.icon-st-update {
+  background-image: url("Update.svg"); }
+span.icon-st-add {
+  background-image: url("Add button.svg"); }
+
+/*
+  Definitions for utilities and helper classes.
+*/
+/* Utility module CSS variable definitions */
+:root {
+  --generic-border-color: rgba(0, 0, 0, 0.3);
+  --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
+
+.hidden {
+  display: none !important; }
+
+.visually-hidden {
+  position: absolute !important;
+  width: 1px !important;
+  height: 1px !important;
+  margin: -1px !important;
+  border: 0 !important;
+  padding: 0 !important;
+  clip: rect(0 0 0 0) !important;
+  -webkit-clip-path: inset(100%) !important;
+  clip-path: inset(100%) !important;
+  overflow: hidden !important; }
+
+.bordered {
+  border: 0.0714285714rem solid var(--generic-border-color) !important; }
+
+.rounded {
+  border-radius: var(--universal-border-radius) !important; }
+
+.circular {
+  border-radius: 50% !important; }
+
+.shadowed {
+  box-shadow: var(--generic-box-shadow) !important; }
+
+.responsive-margin {
+  margin: calc(var(--universal-margin) / 4) !important; }
+  @media screen and (min-width: 500px) {
+    .responsive-margin {
+      margin: calc(var(--universal-margin) / 2) !important; } }
+  @media screen and (min-width: 1280px) {
+    .responsive-margin {
+      margin: var(--universal-margin) !important; } }
+
+.responsive-padding {
+  padding: calc(var(--universal-padding) / 4) !important; }
+  @media screen and (min-width: 500px) {
+    .responsive-padding {
+      padding: calc(var(--universal-padding) / 2) !important; } }
+  @media screen and (min-width: 1280px) {
+    .responsive-padding {
+      padding: var(--universal-padding) !important; } }
+
+@media screen and (max-width: 499px) {
+  .hidden-sm {
+    display: none !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+  .hidden-md {
+    display: none !important; } }
+@media screen and (min-width: 1280px) {
+  .hidden-lg {
+    display: none !important; } }
+@media screen and (max-width: 499px) {
+  .visually-hidden-sm {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+  .visually-hidden-md {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+@media screen and (min-width: 1280px) {
+  .visually-hidden-lg {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+
+/*# sourceMappingURL=mini-custom.css.map */
+
+img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
+img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
+
+.figure {
+  display: block;
+  margin-left: auto;
+  margin-right: auto;
+  text-align: center;
+}

lib/lsm6dso-api/lsm6dso.c

@@ -0,0 +1,3909 @@
+/**
+  ******************************************************************************
+  * @file    lsm6dso.c
+  * @author  MEMS Software Solutions Team
+  * @brief   LSM6DSO driver file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "lsm6dso.h"
+
+/** @addtogroup BSP BSP
+  * @{
+  */
+
+/** @addtogroup Component Component
+  * @{
+  */
+
+/** @defgroup LSM6DSO LSM6DSO
+  * @{
+  */
+
+/** @defgroup LSM6DSO_Exported_Variables LSM6DSO Exported Variables
+  * @{
+  */
+
+LSM6DSO_CommonDrv_t LSM6DSO_COMMON_Driver =
+{
+  LSM6DSO_Init,
+  LSM6DSO_DeInit,
+  LSM6DSO_ReadID,
+  LSM6DSO_GetCapabilities,
+};
+
+LSM6DSO_ACC_Drv_t LSM6DSO_ACC_Driver =
+{
+  LSM6DSO_ACC_Enable,
+  LSM6DSO_ACC_Disable,
+  LSM6DSO_ACC_GetSensitivity,
+  LSM6DSO_ACC_GetOutputDataRate,
+  LSM6DSO_ACC_SetOutputDataRate,
+  LSM6DSO_ACC_GetFullScale,
+  LSM6DSO_ACC_SetFullScale,
+  LSM6DSO_ACC_GetAxes,
+  LSM6DSO_ACC_GetAxesRaw,
+};
+
+LSM6DSO_GYRO_Drv_t LSM6DSO_GYRO_Driver =
+{
+  LSM6DSO_GYRO_Enable,
+  LSM6DSO_GYRO_Disable,
+  LSM6DSO_GYRO_GetSensitivity,
+  LSM6DSO_GYRO_GetOutputDataRate,
+  LSM6DSO_GYRO_SetOutputDataRate,
+  LSM6DSO_GYRO_GetFullScale,
+  LSM6DSO_GYRO_SetFullScale,
+  LSM6DSO_GYRO_GetAxes,
+  LSM6DSO_GYRO_GetAxesRaw,
+};
+
+/**
+  * @}
+  */
+
+/** @defgroup LSM6DSO_Private_Function_Prototypes LSM6DSO Private Function Prototypes
+  * @{
+  */
+
+static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr);
+static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr);
+static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr);
+static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr);
+static void LSM6DSO_Delay(LSM6DSO_Object_t *pObj, uint32_t msDelay);
+static int32_t ReadRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length);
+static int32_t WriteRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length);
+
+/**
+  * @}
+  */
+
+/** @defgroup LSM6DSO_Exported_Functions LSM6DSO Exported Functions
+  * @{
+  */
+
+/**
+  * @brief  Register Component Bus IO operations
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_RegisterBusIO(LSM6DSO_Object_t *pObj, LSM6DSO_IO_t *pIO)
+{
+  int32_t ret = LSM6DSO_OK;
+
+  if (pObj == NULL)
+  {
+    ret = LSM6DSO_ERROR;
+  }
+  else
+  {
+    pObj->IO.Init      = pIO->Init;
+    pObj->IO.DeInit    = pIO->DeInit;
+    pObj->IO.BusType   = pIO->BusType;
+    pObj->IO.Address   = pIO->Address;
+    pObj->IO.WriteReg  = pIO->WriteReg;
+    pObj->IO.ReadReg   = pIO->ReadReg;
+    pObj->IO.GetTick   = pIO->GetTick;
+
+    pObj->Ctx.read_reg  = ReadRegWrap;
+    pObj->Ctx.write_reg = WriteRegWrap;
+    pObj->Ctx.mdelay    = pIO->Delay;
+    pObj->Ctx.handle   = pObj;
+
+    if (pObj->IO.Init == NULL)
+    {
+      ret = LSM6DSO_ERROR;
+    }
+    else if (pObj->IO.Init() != LSM6DSO_OK)
+    {
+      ret = LSM6DSO_ERROR;
+    }
+    else
+    {
+      if (pObj->IO.BusType == LSM6DSO_SPI_3WIRES_BUS) /* SPI 3-Wires */
+      {
+        /* Enable the SPI 3-Wires support only the first time */
+        if (pObj->is_initialized == 0U)
+        {
+          /* Enable SPI 3-Wires on the component */
+          uint8_t data = 0x0C;
+
+          if (LSM6DSO_Write_Reg(pObj, LSM6DSO_CTRL3_C, data) != LSM6DSO_OK)
+          {
+            ret = LSM6DSO_ERROR;
+          }
+        }
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Initialize the LSM6DSO sensor
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_Init(LSM6DSO_Object_t *pObj)
+{
+  /* Disable I3C */
+  if (lsm6dso_i3c_disable_set(&(pObj->Ctx), LSM6DSO_I3C_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable register address automatically incremented during a multiple byte
+  access with a serial interface. */
+  if (lsm6dso_auto_increment_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable BDU */
+  if (lsm6dso_block_data_update_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* FIFO mode selection */
+  if (lsm6dso_fifo_mode_set(&(pObj->Ctx), LSM6DSO_BYPASS_MODE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Select default output data rate. */
+  pObj->acc_odr = LSM6DSO_XL_ODR_104Hz;
+
+  /* Output data rate selection - power down. */
+  if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), LSM6DSO_XL_ODR_OFF) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection. */
+  if (lsm6dso_xl_full_scale_set(&(pObj->Ctx), LSM6DSO_2g) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Select default output data rate. */
+  pObj->gyro_odr = LSM6DSO_GY_ODR_104Hz;
+
+  /* Output data rate selection - power down. */
+  if (lsm6dso_gy_data_rate_set(&(pObj->Ctx), LSM6DSO_GY_ODR_OFF) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection. */
+  if (lsm6dso_gy_full_scale_set(&(pObj->Ctx), LSM6DSO_2000dps) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  pObj->is_initialized = 1;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Deinitialize the LSM6DSO sensor
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_DeInit(LSM6DSO_Object_t *pObj)
+{
+  /* Disable the component */
+  if (LSM6DSO_ACC_Disable(pObj) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (LSM6DSO_GYRO_Disable(pObj) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset output data rate. */
+  pObj->acc_odr = LSM6DSO_XL_ODR_OFF;
+  pObj->gyro_odr = LSM6DSO_GY_ODR_OFF;
+
+  pObj->is_initialized = 0;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Read component ID
+  * @param  pObj the device pObj
+  * @param  Id the WHO_AM_I value
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ReadID(LSM6DSO_Object_t *pObj, uint8_t *Id)
+{
+  if (lsm6dso_device_id_get(&(pObj->Ctx), Id) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get LSM6DSO sensor capabilities
+  * @param  pObj Component object pointer
+  * @param  Capabilities pointer to LSM6DSO sensor capabilities
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GetCapabilities(LSM6DSO_Object_t *pObj, LSM6DSO_Capabilities_t *Capabilities)
+{
+  /* Prevent unused argument(s) compilation warning */
+  (void)(pObj);
+
+  Capabilities->Acc          = 1;
+  Capabilities->Gyro         = 1;
+  Capabilities->Magneto      = 0;
+  Capabilities->LowPower     = 0;
+  Capabilities->GyroMaxFS    = 2000;
+  Capabilities->AccMaxFS     = 16;
+  Capabilities->MagMaxFS     = 0;
+  Capabilities->GyroMaxOdr   = 6660.0f;
+  Capabilities->AccMaxOdr    = 6660.0f;
+  Capabilities->MagMaxOdr    = 0.0f;
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable the LSM6DSO accelerometer sensor
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable(LSM6DSO_Object_t *pObj)
+{
+  /* Check if the component is already enabled */
+  if (pObj->acc_is_enabled == 1U)
+  {
+    return LSM6DSO_OK;
+  }
+
+  /* Output data rate selection. */
+  if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), pObj->acc_odr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  pObj->acc_is_enabled = 1;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Disable the LSM6DSO accelerometer sensor
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable(LSM6DSO_Object_t *pObj)
+{
+  /* Check if the component is already disabled */
+  if (pObj->acc_is_enabled == 0U)
+  {
+    return LSM6DSO_OK;
+  }
+
+  /* Get current output data rate. */
+  if (lsm6dso_xl_data_rate_get(&(pObj->Ctx), &pObj->acc_odr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Output data rate selection - power down. */
+  if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), LSM6DSO_XL_ODR_OFF) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  pObj->acc_is_enabled = 0;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO accelerometer sensor sensitivity
+  * @param  pObj the device pObj
+  * @param  Sensitivity pointer
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_fs_xl_t full_scale;
+
+  /* Read actual full scale selection from sensor. */
+  if (lsm6dso_xl_full_scale_get(&(pObj->Ctx), &full_scale) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Store the Sensitivity based on actual full scale. */
+  switch (full_scale)
+  {
+    case LSM6DSO_2g:
+      *Sensitivity = LSM6DSO_ACC_SENSITIVITY_FS_2G;
+      break;
+
+    case LSM6DSO_4g:
+      *Sensitivity = LSM6DSO_ACC_SENSITIVITY_FS_4G;
+      break;
+
+    case LSM6DSO_8g:
+      *Sensitivity = LSM6DSO_ACC_SENSITIVITY_FS_8G;
+      break;
+
+    case LSM6DSO_16g:
+      *Sensitivity = LSM6DSO_ACC_SENSITIVITY_FS_16G;
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the LSM6DSO accelerometer sensor output data rate
+  * @param  pObj the device pObj
+  * @param  Odr pointer where the output data rate is written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_odr_xl_t odr_low_level;
+
+  /* Get current output data rate. */
+  if (lsm6dso_xl_data_rate_get(&(pObj->Ctx), &odr_low_level) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  switch (odr_low_level)
+  {
+    case LSM6DSO_XL_ODR_OFF:
+      *Odr = 0.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_1Hz6:
+      *Odr = 1.6f;
+      break;
+
+    case LSM6DSO_XL_ODR_12Hz5:
+      *Odr = 12.5f;
+      break;
+
+    case LSM6DSO_XL_ODR_26Hz:
+      *Odr = 26.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_52Hz:
+      *Odr = 52.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_104Hz:
+      *Odr = 104.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_208Hz:
+      *Odr = 208.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_417Hz:
+      *Odr = 417.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_833Hz:
+      *Odr = 833.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_1667Hz:
+      *Odr = 1667.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_3333Hz:
+      *Odr = 3333.0f;
+      break;
+
+    case LSM6DSO_XL_ODR_6667Hz:
+      *Odr = 6667.0f;
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set the LSM6DSO accelerometer sensor output data rate
+  * @param  pObj the device pObj
+  * @param  Odr the output data rate value to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr)
+{
+  return LSM6DSO_ACC_SetOutputDataRate_With_Mode(pObj, Odr, LSM6DSO_ACC_HIGH_PERFORMANCE_MODE);
+}
+
+/**
+  * @brief  Set the LSM6DSO accelerometer sensor output data rate with operating mode
+  * @param  pObj the device pObj
+  * @param  Odr the output data rate value to be set
+  * @param  Mode the accelerometer operating mode
+  * @note   This function switches off the gyroscope if Ultra Low Power Mode is set
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr, LSM6DSO_ACC_Operating_Mode_t Mode)
+{
+  int32_t ret = LSM6DSO_OK;
+  float_t newOdr = Odr;
+
+  switch (Mode)
+  {
+    case LSM6DSO_ACC_HIGH_PERFORMANCE_MODE:
+    {
+      /* We must uncheck Low Power and Ultra Low Power bits if they are enabled */
+      lsm6dso_ctrl5_c_t val1;
+      lsm6dso_ctrl6_c_t val2;
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val1.xl_ulp_en != 0U)
+      {
+        /* Power off the accelerometer */
+        if (pObj->acc_is_enabled == 1U)
+        {
+          if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), LSM6DSO_XL_ODR_OFF) != LSM6DSO_OK)
+          {
+            return LSM6DSO_ERROR;
+          }
+        }
+
+        val1.xl_ulp_en = 0;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val2.xl_hm_mode != 0U)
+      {
+        val2.xl_hm_mode = 0U;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      /* ODR should be at least 12.5Hz */
+      if (newOdr < 12.5f)
+      {
+        newOdr = 12.5f;
+      }
+      break;
+    }
+    case LSM6DSO_ACC_LOW_POWER_NORMAL_MODE:
+    {
+      /* We must uncheck Ultra Low Power bit if it is enabled */
+      /* and check the Low Power bit if it is unchecked       */
+      lsm6dso_ctrl5_c_t val1;
+      lsm6dso_ctrl6_c_t val2;
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val1.xl_ulp_en != 0U)
+      {
+        /* Power off the accelerometer */
+        if (pObj->acc_is_enabled == 1U)
+        {
+          if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), LSM6DSO_XL_ODR_OFF) != LSM6DSO_OK)
+          {
+            return LSM6DSO_ERROR;
+          }
+        }
+
+        val1.xl_ulp_en = 0;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val2.xl_hm_mode == 0U)
+      {
+        val2.xl_hm_mode = 1U;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      /* Now we need to limit the ODR to 208 Hz if it is higher */
+      if (newOdr > 208.0f)
+      {
+        newOdr = 208.0f;
+      }
+      break;
+    }
+    case LSM6DSO_ACC_ULTRA_LOW_POWER_MODE:
+    {
+      /* We must uncheck Low Power bit if it is enabled                   */
+      /* and check the Ultra Low Power bit if it is unchecked             */
+      /* We must switch off gyro otherwise Ultra Low Power does not work  */
+      lsm6dso_ctrl5_c_t val1;
+      lsm6dso_ctrl6_c_t val2;
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val2.xl_hm_mode != 0U)
+      {
+        val2.xl_hm_mode = 0U;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      /* Disable Gyro */
+      if (pObj->gyro_is_enabled == 1U)
+      {
+        if (LSM6DSO_GYRO_Disable(pObj) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val1.xl_ulp_en == 0U)
+      {
+        /* Power off the accelerometer */
+        if (pObj->acc_is_enabled == 1U)
+        {
+          if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), LSM6DSO_XL_ODR_OFF) != LSM6DSO_OK)
+          {
+            return LSM6DSO_ERROR;
+          }
+        }
+
+        val1.xl_ulp_en = 1U;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      /* Now we need to limit the ODR to 208 Hz if it is higher */
+      if (newOdr > 208.0f)
+      {
+        newOdr = 208.0f;
+      }
+      break;
+    }
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (pObj->acc_is_enabled == 1U)
+  {
+    ret = LSM6DSO_ACC_SetOutputDataRate_When_Enabled(pObj, newOdr);
+  }
+  else
+  {
+    ret = LSM6DSO_ACC_SetOutputDataRate_When_Disabled(pObj, newOdr);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the LSM6DSO accelerometer sensor full scale
+  * @param  pObj the device pObj
+  * @param  FullScale pointer where the full scale is written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_fs_xl_t fs_low_level;
+
+  /* Read actual full scale selection from sensor. */
+  if (lsm6dso_xl_full_scale_get(&(pObj->Ctx), &fs_low_level) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  switch (fs_low_level)
+  {
+    case LSM6DSO_2g:
+      *FullScale =  2;
+      break;
+
+    case LSM6DSO_4g:
+      *FullScale =  4;
+      break;
+
+    case LSM6DSO_8g:
+      *FullScale =  8;
+      break;
+
+    case LSM6DSO_16g:
+      *FullScale = 16;
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set the LSM6DSO accelerometer sensor full scale
+  * @param  pObj the device pObj
+  * @param  FullScale the functional full scale to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale)
+{
+  lsm6dso_fs_xl_t new_fs;
+
+  /* Seems like MISRA C-2012 rule 14.3a violation but only from single file statical analysis point of view because
+     the parameter passed to the function is not known at the moment of analysis */
+  new_fs = (FullScale <= 2) ? LSM6DSO_2g
+           : (FullScale <= 4) ? LSM6DSO_4g
+           : (FullScale <= 8) ? LSM6DSO_8g
+           :                    LSM6DSO_16g;
+
+  if (lsm6dso_xl_full_scale_set(&(pObj->Ctx), new_fs) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO accelerometer sensor raw axes
+  * @param  pObj the device pObj
+  * @param  Value pointer where the raw values of the axes are written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value)
+{
+  lsm6dso_axis3bit16_t data_raw;
+
+  /* Read raw data values. */
+  if (lsm6dso_acceleration_raw_get(&(pObj->Ctx), data_raw.i16bit) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Format the data. */
+  Value->x = data_raw.i16bit[0];
+  Value->y = data_raw.i16bit[1];
+  Value->z = data_raw.i16bit[2];
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO accelerometer sensor axes
+  * @param  pObj the device pObj
+  * @param  Acceleration pointer where the values of the axes are written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration)
+{
+  lsm6dso_axis3bit16_t data_raw;
+  float_t sensitivity = 0.0f;
+
+  /* Read raw data values. */
+  if (lsm6dso_acceleration_raw_get(&(pObj->Ctx), data_raw.i16bit) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Get LSM6DSO actual sensitivity. */
+  if (LSM6DSO_ACC_GetSensitivity(pObj, &sensitivity) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Calculate the data. */
+  Acceleration->x = (int32_t)((float_t)((float_t)data_raw.i16bit[0] * sensitivity));
+  Acceleration->y = (int32_t)((float_t)((float_t)data_raw.i16bit[1] * sensitivity));
+  Acceleration->z = (int32_t)((float_t)((float_t)data_raw.i16bit[2] * sensitivity));
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable the LSM6DSO gyroscope sensor
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Enable(LSM6DSO_Object_t *pObj)
+{
+  /* Check if the component is already enabled */
+  if (pObj->gyro_is_enabled == 1U)
+  {
+    return LSM6DSO_OK;
+  }
+
+  /* Output data rate selection. */
+  if (lsm6dso_gy_data_rate_set(&(pObj->Ctx), pObj->gyro_odr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  pObj->gyro_is_enabled = 1;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Disable the LSM6DSO gyroscope sensor
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Disable(LSM6DSO_Object_t *pObj)
+{
+  /* Check if the component is already disabled */
+  if (pObj->gyro_is_enabled == 0U)
+  {
+    return LSM6DSO_OK;
+  }
+
+  /* Get current output data rate. */
+  if (lsm6dso_gy_data_rate_get(&(pObj->Ctx), &pObj->gyro_odr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Output data rate selection - power down. */
+  if (lsm6dso_gy_data_rate_set(&(pObj->Ctx), LSM6DSO_GY_ODR_OFF) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  pObj->gyro_is_enabled = 0;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO gyroscope sensor sensitivity
+  * @param  pObj the device pObj
+  * @param  Sensitivity pointer
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_fs_g_t full_scale;
+
+  /* Read actual full scale selection from sensor. */
+  if (lsm6dso_gy_full_scale_get(&(pObj->Ctx), &full_scale) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Store the sensitivity based on actual full scale. */
+  switch (full_scale)
+  {
+    case LSM6DSO_125dps:
+      *Sensitivity = LSM6DSO_GYRO_SENSITIVITY_FS_125DPS;
+      break;
+
+    case LSM6DSO_250dps:
+      *Sensitivity = LSM6DSO_GYRO_SENSITIVITY_FS_250DPS;
+      break;
+
+    case LSM6DSO_500dps:
+      *Sensitivity = LSM6DSO_GYRO_SENSITIVITY_FS_500DPS;
+      break;
+
+    case LSM6DSO_1000dps:
+      *Sensitivity = LSM6DSO_GYRO_SENSITIVITY_FS_1000DPS;
+      break;
+
+    case LSM6DSO_2000dps:
+      *Sensitivity = LSM6DSO_GYRO_SENSITIVITY_FS_2000DPS;
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the LSM6DSO gyroscope sensor output data rate
+  * @param  pObj the device pObj
+  * @param  Odr pointer where the output data rate is written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_odr_g_t odr_low_level;
+
+  /* Get current output data rate. */
+  if (lsm6dso_gy_data_rate_get(&(pObj->Ctx), &odr_low_level) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  switch (odr_low_level)
+  {
+    case LSM6DSO_GY_ODR_OFF:
+      *Odr = 0.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_12Hz5:
+      *Odr = 12.5f;
+      break;
+
+    case LSM6DSO_GY_ODR_26Hz:
+      *Odr = 26.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_52Hz:
+      *Odr = 52.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_104Hz:
+      *Odr = 104.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_208Hz:
+      *Odr = 208.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_417Hz:
+      *Odr = 417.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_833Hz:
+      *Odr = 833.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_1667Hz:
+      *Odr = 1667.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_3333Hz:
+      *Odr = 3333.0f;
+      break;
+
+    case LSM6DSO_GY_ODR_6667Hz:
+      *Odr = 6667.0f;
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope sensor output data rate
+  * @param  pObj the device pObj
+  * @param  Odr the output data rate value to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr)
+{
+  return LSM6DSO_GYRO_SetOutputDataRate_With_Mode(pObj, Odr, LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE);
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope sensor output data rate with operating mode
+  * @param  pObj the device pObj
+  * @param  Odr the output data rate value to be set
+  * @param  Mode the gyroscope operating mode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr,
+                                                 LSM6DSO_GYRO_Operating_Mode_t Mode)
+{
+  int32_t ret = LSM6DSO_OK;
+  float_t newOdr = Odr;
+
+  switch (Mode)
+  {
+    case LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE:
+    {
+      /* We must uncheck Low Power bit if it is enabled */
+      lsm6dso_ctrl7_g_t val1;
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val1.g_hm_mode != 0U)
+      {
+        val1.g_hm_mode = 0U;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+      break;
+    }
+    case LSM6DSO_GYRO_LOW_POWER_NORMAL_MODE:
+    {
+      /* We must check the Low Power bit if it is unchecked */
+      lsm6dso_ctrl7_g_t val1;
+
+      if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      if (val1.g_hm_mode == 0U)
+      {
+        val1.g_hm_mode = 1U;
+        if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != LSM6DSO_OK)
+        {
+          return LSM6DSO_ERROR;
+        }
+      }
+
+      /* Now we need to limit the ODR to 208 Hz if it is higher */
+      if (newOdr > 208.0f)
+      {
+        newOdr = 208.0f;
+      }
+      break;
+    }
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (pObj->gyro_is_enabled == 1U)
+  {
+    ret = LSM6DSO_GYRO_SetOutputDataRate_When_Enabled(pObj, newOdr);
+  }
+  else
+  {
+    ret = LSM6DSO_GYRO_SetOutputDataRate_When_Disabled(pObj, newOdr);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the LSM6DSO gyroscope sensor full scale
+  * @param  pObj the device pObj
+  * @param  FullScale pointer where the full scale is written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_GetFullScale(LSM6DSO_Object_t *pObj, int32_t  *FullScale)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_fs_g_t fs_low_level;
+
+  /* Read actual full scale selection from sensor. */
+  if (lsm6dso_gy_full_scale_get(&(pObj->Ctx), &fs_low_level) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  switch (fs_low_level)
+  {
+    case LSM6DSO_125dps:
+      *FullScale =  125;
+      break;
+
+    case LSM6DSO_250dps:
+      *FullScale =  250;
+      break;
+
+    case LSM6DSO_500dps:
+      *FullScale =  500;
+      break;
+
+    case LSM6DSO_1000dps:
+      *FullScale = 1000;
+      break;
+
+    case LSM6DSO_2000dps:
+      *FullScale = 2000;
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope sensor full scale
+  * @param  pObj the device pObj
+  * @param  FullScale the functional full scale to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale)
+{
+  lsm6dso_fs_g_t new_fs;
+
+  new_fs = (FullScale <= 125)  ? LSM6DSO_125dps
+           : (FullScale <= 250)  ? LSM6DSO_250dps
+           : (FullScale <= 500)  ? LSM6DSO_500dps
+           : (FullScale <= 1000) ? LSM6DSO_1000dps
+           :                       LSM6DSO_2000dps;
+
+  if (lsm6dso_gy_full_scale_set(&(pObj->Ctx), new_fs) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO gyroscope sensor raw axes
+  * @param  pObj the device pObj
+  * @param  Value pointer where the raw values of the axes are written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value)
+{
+  lsm6dso_axis3bit16_t data_raw;
+
+  /* Read raw data values. */
+  if (lsm6dso_angular_rate_raw_get(&(pObj->Ctx), data_raw.i16bit) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Format the data. */
+  Value->x = data_raw.i16bit[0];
+  Value->y = data_raw.i16bit[1];
+  Value->z = data_raw.i16bit[2];
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO gyroscope sensor axes
+  * @param  pObj the device pObj
+  * @param  AngularRate pointer where the values of the axes are written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularRate)
+{
+  lsm6dso_axis3bit16_t data_raw;
+  float_t sensitivity;
+
+  /* Read raw data values. */
+  if (lsm6dso_angular_rate_raw_get(&(pObj->Ctx), data_raw.i16bit) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Get LSM6DSO actual sensitivity. */
+  if (LSM6DSO_GYRO_GetSensitivity(pObj, &sensitivity) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Calculate the data. */
+  AngularRate->x = (int32_t)((float_t)((float_t)data_raw.i16bit[0] * sensitivity));
+  AngularRate->y = (int32_t)((float_t)((float_t)data_raw.i16bit[1] * sensitivity));
+  AngularRate->z = (int32_t)((float_t)((float_t)data_raw.i16bit[2] * sensitivity));
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO register value
+  * @param  pObj the device pObj
+  * @param  Reg address to be read
+  * @param  Data pointer where the value is written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_Read_Reg(LSM6DSO_Object_t *pObj, uint8_t Reg, uint8_t *Data)
+{
+  if (lsm6dso_read_reg(&(pObj->Ctx), Reg, Data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO register value
+  * @param  pObj the device pObj
+  * @param  Reg address to be written
+  * @param  Data value to be written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_Write_Reg(LSM6DSO_Object_t *pObj, uint8_t Reg, uint8_t Data)
+{
+  if (lsm6dso_write_reg(&(pObj->Ctx), Reg, &Data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the interrupt latch
+  * @param  pObj the device pObj
+  * @param  Status value to be written
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_Set_Interrupt_Latch(LSM6DSO_Object_t *pObj, uint8_t Status)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_lir_t newStatus = LSM6DSO_ALL_INT_PULSED;
+
+  switch (Status)
+  {
+    case 0:
+      newStatus = LSM6DSO_ALL_INT_PULSED;
+      break;
+    case 1:
+      newStatus = LSM6DSO_BASE_LATCHED_EMB_PULSED;
+      break;
+    case 2:
+      newStatus = LSM6DSO_BASE_PULSED_EMB_LATCHED;
+      break;
+    case 3:
+      newStatus = LSM6DSO_ALL_INT_LATCHED;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (Status > 1U)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_int_notification_set(&(pObj->Ctx), newStatus) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable free fall detection
+  * @param  pObj the device pObj
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Free_Fall_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 417.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* FF_DUR setting */
+  if (lsm6dso_ff_dur_set(&(pObj->Ctx), 0x06) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* WAKE_DUR setting */
+  if (lsm6dso_wkup_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* SLEEP_DUR setting */
+  if (lsm6dso_act_sleep_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* FF_THS setting */
+  if (lsm6dso_ff_threshold_set(&(pObj->Ctx), LSM6DSO_FF_TSH_312mg) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable free fall event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.free_fall = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    case LSM6DSO_INT2_PIN:
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.free_fall = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable free fall detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Free_Fall_Detection(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Disable free fall event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.free_fall = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.free_fall = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* FF_DUR setting */
+  if (lsm6dso_ff_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* FF_THS setting */
+  if (lsm6dso_ff_threshold_set(&(pObj->Ctx), LSM6DSO_FF_TSH_156mg) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set free fall threshold
+  * @param  pObj the device pObj
+  * @param  Threshold free fall detection threshold
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Free_Fall_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_ff_ths_t newThreshold = LSM6DSO_FF_TSH_156mg;
+
+  switch (Threshold)
+  {
+    case 0:
+      newThreshold = LSM6DSO_FF_TSH_156mg;
+      break;
+    case 1:
+      newThreshold = LSM6DSO_FF_TSH_219mg;
+      break;
+    case 2:
+      newThreshold = LSM6DSO_FF_TSH_250mg;
+      break;
+    case 3:
+      newThreshold = LSM6DSO_FF_TSH_312mg;
+      break;
+    case 4:
+      newThreshold = LSM6DSO_FF_TSH_344mg;
+      break;
+    case 5:
+      newThreshold = LSM6DSO_FF_TSH_406mg;
+      break;
+    case 6:
+      newThreshold = LSM6DSO_FF_TSH_469mg;
+      break;
+    case 7:
+      newThreshold = LSM6DSO_FF_TSH_500mg;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_ff_threshold_set(&(pObj->Ctx), newThreshold) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set free fall duration
+  * @param  pObj the device pObj
+  * @param  Duration free fall detection duration
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Free_Fall_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
+{
+  if (lsm6dso_ff_dur_set(&(pObj->Ctx), Duration) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable pedometer
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Pedometer(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val;
+  lsm6dso_emb_sens_t emb_sens;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 26.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Save current embedded features */
+  if (lsm6dso_embedded_sens_get(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Turn off embedded features */
+  if (lsm6dso_embedded_sens_off(&(pObj->Ctx)) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Wait for 10 ms */
+  LSM6DSO_Delay(pObj, 10);
+
+  /* Enable pedometer algorithm. */
+  emb_sens.step = PROPERTY_ENABLE;
+
+  if (lsm6dso_pedo_sens_set(&(pObj->Ctx), LSM6DSO_PEDO_BASE_MODE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Turn on embedded features */
+  if (lsm6dso_embedded_sens_set(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable step detector on INT1 pin */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val.step_detector = PROPERTY_ENABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Disable pedometer
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Pedometer(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_emb_sens_t emb_sens;
+
+  /* Disable step detector on INT1 pin */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.step_detector = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Save current embedded features */
+  if (lsm6dso_embedded_sens_get(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable pedometer algorithm. */
+  emb_sens.step = PROPERTY_DISABLE;
+
+  if (lsm6dso_embedded_sens_set(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get step count
+  * @param  pObj the device pObj
+  * @param  StepCount step counter
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_Step_Count(LSM6DSO_Object_t *pObj, uint16_t *StepCount)
+{
+  if (lsm6dso_number_of_steps_get(&(pObj->Ctx), StepCount) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable step counter reset
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Step_Counter_Reset(LSM6DSO_Object_t *pObj)
+{
+  if (lsm6dso_steps_reset(&(pObj->Ctx)) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable tilt detection
+  * @param  pObj the device pObj
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Tilt_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+  lsm6dso_emb_sens_t emb_sens;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 26.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Save current embedded features */
+  if (lsm6dso_embedded_sens_get(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Turn off embedded features */
+  if (lsm6dso_embedded_sens_off(&(pObj->Ctx)) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Wait for 10 ms */
+  LSM6DSO_Delay(pObj, 10);
+
+  /* Enable tilt algorithm. */
+  emb_sens.tilt = PROPERTY_ENABLE;
+
+  /* Turn on embedded features */
+  if (lsm6dso_embedded_sens_set(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable tilt event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.tilt = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    case LSM6DSO_INT2_PIN:
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.tilt = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable tilt detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Tilt_Detection(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+  lsm6dso_emb_sens_t emb_sens;
+
+  /* Disable tilt event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.tilt = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.tilt = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Save current embedded features */
+  if (lsm6dso_embedded_sens_get(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable tilt algorithm. */
+  emb_sens.tilt = PROPERTY_DISABLE;
+
+  if (lsm6dso_embedded_sens_set(&(pObj->Ctx), &emb_sens) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable wake up detection
+  * @param  pObj the device pObj
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Wake_Up_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 417.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* WAKE_DUR setting */
+  if (lsm6dso_wkup_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set wake up threshold. */
+  if (lsm6dso_wkup_threshold_set(&(pObj->Ctx), 0x02) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable wake up event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.wake_up = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    case LSM6DSO_INT2_PIN:
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.wake_up = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable wake up detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Wake_Up_Detection(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Disable wake up event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.wake_up = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.wake_up = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset wake up threshold. */
+  if (lsm6dso_wkup_threshold_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* WAKE_DUR setting */
+  if (lsm6dso_wkup_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set wake up threshold
+  * @param  pObj the device pObj
+  * @param  Threshold wake up detection threshold
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Wake_Up_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
+{
+  /* Set wake up threshold. */
+  if (lsm6dso_wkup_threshold_set(&(pObj->Ctx), Threshold) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set wake up duration
+  * @param  pObj the device pObj
+  * @param  Duration wake up detection duration
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Wake_Up_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
+{
+  /* Set wake up duration. */
+  if (lsm6dso_wkup_dur_set(&(pObj->Ctx), Duration) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable single tap detection
+  * @param  pObj the device pObj
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Single_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 417.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable X direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_x_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable Y direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_y_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable Z direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_z_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap threshold. */
+  if (lsm6dso_tap_threshold_x_set(&(pObj->Ctx), 0x08) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap shock time window. */
+  if (lsm6dso_tap_shock_set(&(pObj->Ctx), 0x02) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap quiet time window. */
+  if (lsm6dso_tap_quiet_set(&(pObj->Ctx), 0x01) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* _NOTE_: Tap duration time window - don't care for single tap. */
+
+  /* _NOTE_: Single/Double Tap event - don't care of this flag for single tap. */
+
+  /* Enable single tap event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.single_tap = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    case LSM6DSO_INT2_PIN:
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.single_tap = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable single tap detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Single_Tap_Detection(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Disable single tap event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.single_tap = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.single_tap = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap quiet time window. */
+  if (lsm6dso_tap_quiet_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap shock time window. */
+  if (lsm6dso_tap_shock_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap threshold. */
+  if (lsm6dso_tap_threshold_x_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable Z direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_z_set(&(pObj->Ctx), PROPERTY_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable Y direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_y_set(&(pObj->Ctx), PROPERTY_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable X direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_x_set(&(pObj->Ctx), PROPERTY_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable double tap detection
+  * @param  pObj the device pObj
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Double_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 417.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable X direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_x_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable Y direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_y_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable Z direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_z_set(&(pObj->Ctx), PROPERTY_ENABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap threshold. */
+  if (lsm6dso_tap_threshold_x_set(&(pObj->Ctx), 0x08) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap shock time window. */
+  if (lsm6dso_tap_shock_set(&(pObj->Ctx), 0x03) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap quiet time window. */
+  if (lsm6dso_tap_quiet_set(&(pObj->Ctx), 0x03) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set tap duration time window. */
+  if (lsm6dso_tap_dur_set(&(pObj->Ctx), 0x08) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Single and double tap enabled. */
+  if (lsm6dso_tap_mode_set(&(pObj->Ctx), LSM6DSO_BOTH_SINGLE_DOUBLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable double tap event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.double_tap = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    case LSM6DSO_INT2_PIN:
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.double_tap = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable double tap detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Double_Tap_Detection(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Disable double tap event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.double_tap = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.double_tap = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Only single tap enabled. */
+  if (lsm6dso_tap_mode_set(&(pObj->Ctx), LSM6DSO_ONLY_SINGLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap duration time window. */
+  if (lsm6dso_tap_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap quiet time window. */
+  if (lsm6dso_tap_quiet_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap shock time window. */
+  if (lsm6dso_tap_shock_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset tap threshold. */
+  if (lsm6dso_tap_threshold_x_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable Z direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_z_set(&(pObj->Ctx), PROPERTY_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable Y direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_y_set(&(pObj->Ctx), PROPERTY_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable X direction in tap recognition. */
+  if (lsm6dso_tap_detection_on_x_set(&(pObj->Ctx), PROPERTY_DISABLE) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set tap threshold
+  * @param  pObj the device pObj
+  * @param  Threshold tap threshold
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Tap_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
+{
+  /* Set tap threshold. */
+  if (lsm6dso_tap_threshold_x_set(&(pObj->Ctx), Threshold) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set tap shock time
+  * @param  pObj the device pObj
+  * @param  Time tap shock time
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Tap_Shock_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
+{
+  /* Set tap shock time window. */
+  if (lsm6dso_tap_shock_set(&(pObj->Ctx), Time) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set tap quiet time
+  * @param  pObj the device pObj
+  * @param  Time tap quiet time
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Tap_Quiet_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
+{
+  /* Set tap quiet time window. */
+  if (lsm6dso_tap_quiet_set(&(pObj->Ctx), Time) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set tap duration time
+  * @param  pObj the device pObj
+  * @param  Time tap duration time
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Tap_Duration_Time(LSM6DSO_Object_t *pObj, uint8_t Time)
+{
+  /* Set tap duration time window. */
+  if (lsm6dso_tap_dur_set(&(pObj->Ctx), Time) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable 6D orientation detection
+  * @param  pObj the device pObj
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_6D_Orientation(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Output Data Rate selection */
+  if (LSM6DSO_ACC_SetOutputDataRate(pObj, 417.0f) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* 6D orientation enabled. */
+  if (lsm6dso_6d_threshold_set(&(pObj->Ctx), LSM6DSO_DEG_60) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable 6D orientation event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.six_d = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    case LSM6DSO_INT2_PIN:
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.six_d = PROPERTY_ENABLE;
+
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable 6D orientation detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_6D_Orientation(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Disable 6D orientation event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.six_d = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.six_d = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Reset 6D orientation. */
+  if (lsm6dso_6d_threshold_set(&(pObj->Ctx), LSM6DSO_DEG_80) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set 6D orientation threshold
+  * @param  pObj the device pObj
+  * @param  Threshold 6D Orientation detection threshold
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_6D_Orientation_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_sixd_ths_t newThreshold = LSM6DSO_DEG_80;
+
+  switch (Threshold)
+  {
+    case 0:
+      newThreshold = LSM6DSO_DEG_80;
+      break;
+    case 1:
+      newThreshold = LSM6DSO_DEG_70;
+      break;
+    case 2:
+      newThreshold = LSM6DSO_DEG_60;
+      break;
+    case 3:
+      newThreshold = LSM6DSO_DEG_50;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_6d_threshold_set(&(pObj->Ctx), newThreshold) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of XLow orientation
+  * @param  pObj the device pObj
+  * @param  XLow the status of XLow orientation
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_6D_Orientation_XL(LSM6DSO_Object_t *pObj, uint8_t *XLow)
+{
+  lsm6dso_d6d_src_t data;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *XLow = data.xl;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of XHigh orientation
+  * @param  pObj the device pObj
+  * @param  XHigh the status of XHigh orientation
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_6D_Orientation_XH(LSM6DSO_Object_t *pObj, uint8_t *XHigh)
+{
+  lsm6dso_d6d_src_t data;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *XHigh = data.xh;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of YLow orientation
+  * @param  pObj the device pObj
+  * @param  YLow the status of YLow orientation
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_6D_Orientation_YL(LSM6DSO_Object_t *pObj, uint8_t *YLow)
+{
+  lsm6dso_d6d_src_t data;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *YLow = data.yl;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of YHigh orientation
+  * @param  pObj the device pObj
+  * @param  YHigh the status of YHigh orientation
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_6D_Orientation_YH(LSM6DSO_Object_t *pObj, uint8_t *YHigh)
+{
+  lsm6dso_d6d_src_t data;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *YHigh = data.yh;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of ZLow orientation
+  * @param  pObj the device pObj
+  * @param  ZLow the status of ZLow orientation
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_6D_Orientation_ZL(LSM6DSO_Object_t *pObj, uint8_t *ZLow)
+{
+  lsm6dso_d6d_src_t data;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *ZLow = data.zl;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of ZHigh orientation
+  * @param  pObj the device pObj
+  * @param  ZHigh the status of ZHigh orientation
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_6D_Orientation_ZH(LSM6DSO_Object_t *pObj, uint8_t *ZHigh)
+{
+  lsm6dso_d6d_src_t data;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&data, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *ZHigh = data.zh;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO ACC data ready bit value
+  * @param  pObj the device pObj
+  * @param  Status the status of data ready bit
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
+{
+  if (lsm6dso_xl_flag_data_ready_get(&(pObj->Ctx), Status) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the status of all hardware events
+  * @param  pObj the device pObj
+  * @param  Status the status of all hardware events
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Get_Event_Status(LSM6DSO_Object_t *pObj, LSM6DSO_Event_Status_t *Status)
+{
+  uint8_t tilt_ia;
+  lsm6dso_wake_up_src_t wake_up_src;
+  lsm6dso_tap_src_t tap_src;
+  lsm6dso_d6d_src_t d6d_src;
+  lsm6dso_emb_func_src_t func_src;
+  lsm6dso_md1_cfg_t md1_cfg;
+  lsm6dso_md2_cfg_t md2_cfg;
+  lsm6dso_emb_func_int1_t int1_ctrl;
+  lsm6dso_emb_func_int2_t int2_ctrl;
+
+  (void)memset((void *)Status, 0x0, sizeof(LSM6DSO_Event_Status_t));
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_WAKE_UP_SRC, (uint8_t *)&wake_up_src, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_TAP_SRC, (uint8_t *)&tap_src, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_D6D_SRC, (uint8_t *)&d6d_src, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_mem_bank_set(&(pObj->Ctx), LSM6DSO_EMBEDDED_FUNC_BANK) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&func_src, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_EMB_FUNC_INT1, (uint8_t *)&int1_ctrl, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_EMB_FUNC_INT2, (uint8_t *)&int2_ctrl, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_mem_bank_set(&(pObj->Ctx), LSM6DSO_USER_BANK) != 0)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_MD1_CFG, (uint8_t *)&md1_cfg, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_tilt_flag_data_ready_get(&(pObj->Ctx), &tilt_ia) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if ((md1_cfg.int1_ff == 1U) || (md2_cfg.int2_ff == 1U))
+  {
+    if (wake_up_src.ff_ia == 1U)
+    {
+      Status->FreeFallStatus = 1;
+    }
+  }
+
+  if ((md1_cfg.int1_wu == 1U) || (md2_cfg.int2_wu == 1U))
+  {
+    if (wake_up_src.wu_ia == 1U)
+    {
+      Status->WakeUpStatus = 1;
+    }
+  }
+
+  if ((md1_cfg.int1_single_tap == 1U) || (md2_cfg.int2_single_tap == 1U))
+  {
+    if (tap_src.single_tap == 1U)
+    {
+      Status->TapStatus = 1;
+    }
+  }
+
+  if ((md1_cfg.int1_double_tap == 1U) || (md2_cfg.int2_double_tap == 1U))
+  {
+    if (tap_src.double_tap == 1U)
+    {
+      Status->DoubleTapStatus = 1;
+    }
+  }
+
+  if ((md1_cfg.int1_6d == 1U) || (md2_cfg.int2_6d == 1U))
+  {
+    if (d6d_src.d6d_ia == 1U)
+    {
+      Status->D6DOrientationStatus = 1;
+    }
+  }
+
+  if (int1_ctrl.int1_step_detector == 1U)
+  {
+    if (func_src.step_detected == 1U)
+    {
+      Status->StepStatus = 1;
+    }
+  }
+
+  if ((int1_ctrl.int1_tilt == 1U) || (int2_ctrl.int2_tilt == 1U))
+  {
+    if (tilt_ia == 1U)
+    {
+      Status->TiltStatus = 1;
+    }
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set self test
+  * @param  pObj the device pObj
+  * @param  val the value of st_xl in reg CTRL5_C
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t val)
+{
+  lsm6dso_st_xl_t reg;
+
+  reg = (val == 0U)  ? LSM6DSO_XL_ST_DISABLE
+        : (val == 1U)  ? LSM6DSO_XL_ST_POSITIVE
+        : (val == 2U)  ? LSM6DSO_XL_ST_NEGATIVE
+        :                LSM6DSO_XL_ST_DISABLE;
+
+  if (lsm6dso_xl_self_test_set(&(pObj->Ctx), reg) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO GYRO data ready bit value
+  * @param  pObj the device pObj
+  * @param  Status the status of data ready bit
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
+{
+  if (lsm6dso_gy_flag_data_ready_get(&(pObj->Ctx), Status) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set self test
+  * @param  pObj the device pObj
+  * @param  val the value of st_xl in reg CTRL5_C
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t val)
+{
+  lsm6dso_st_g_t reg;
+
+  reg = (val == 0U)  ? LSM6DSO_GY_ST_DISABLE
+        : (val == 1U)  ? LSM6DSO_GY_ST_POSITIVE
+        : (val == 2U)  ? LSM6DSO_GY_ST_NEGATIVE
+        :                LSM6DSO_GY_ST_DISABLE;
+
+
+  if (lsm6dso_gy_self_test_set(&(pObj->Ctx), reg) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO FIFO number of samples
+  * @param  pObj the device pObj
+  * @param  NumSamples number of samples
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Get_Num_Samples(LSM6DSO_Object_t *pObj, uint16_t *NumSamples)
+{
+  if (lsm6dso_fifo_data_level_get(&(pObj->Ctx), NumSamples) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO FIFO full status
+  * @param  pObj the device pObj
+  * @param  Status FIFO full status
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Get_Full_Status(LSM6DSO_Object_t *pObj, uint8_t *Status)
+{
+  lsm6dso_reg_t reg;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_FIFO_STATUS2, &reg.byte, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *Status = reg.fifo_status2.fifo_full_ia;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO FIFO full interrupt on INT1 pin
+  * @param  pObj the device pObj
+  * @param  Status FIFO full interrupt on INT1 pin status
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Set_INT1_FIFO_Full(LSM6DSO_Object_t *pObj, uint8_t Status)
+{
+  lsm6dso_reg_t reg;
+
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_INT1_CTRL, &reg.byte, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  reg.int1_ctrl.int1_fifo_full = Status;
+
+  if (lsm6dso_write_reg(&(pObj->Ctx), LSM6DSO_INT1_CTRL, &reg.byte, 1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO FIFO watermark level
+  * @param  pObj the device pObj
+  * @param  Watermark FIFO watermark level
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Set_Watermark_Level(LSM6DSO_Object_t *pObj, uint16_t Watermark)
+{
+  if (lsm6dso_fifo_watermark_set(&(pObj->Ctx), Watermark) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO FIFO stop on watermark
+  * @param  pObj the device pObj
+  * @param  Status FIFO stop on watermark status
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Set_Stop_On_Fth(LSM6DSO_Object_t *pObj, uint8_t Status)
+{
+  if (lsm6dso_fifo_stop_on_wtm_set(&(pObj->Ctx), Status) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO FIFO mode
+  * @param  pObj the device pObj
+  * @param  Mode FIFO mode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_fifo_mode_t newMode = LSM6DSO_BYPASS_MODE;
+
+  switch (Mode)
+  {
+    case 0:
+      newMode = LSM6DSO_BYPASS_MODE;
+      break;
+    case 1:
+      newMode = LSM6DSO_FIFO_MODE;
+      break;
+    case 3:
+      newMode = LSM6DSO_STREAM_TO_FIFO_MODE;
+      break;
+    case 4:
+      newMode = LSM6DSO_BYPASS_TO_STREAM_MODE;
+      break;
+    case 6:
+      newMode = LSM6DSO_STREAM_MODE;
+      break;
+    case 7:
+      newMode = LSM6DSO_BYPASS_TO_FIFO_MODE;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_fifo_mode_set(&(pObj->Ctx), newMode) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the LSM6DSO FIFO tag
+  * @param  pObj the device pObj
+  * @param  Tag FIFO tag
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Get_Tag(LSM6DSO_Object_t *pObj, uint8_t *Tag)
+{
+  lsm6dso_fifo_tag_t tag_local;
+
+  if (lsm6dso_fifo_sensor_tag_get(&(pObj->Ctx), &tag_local) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  *Tag = (uint8_t)tag_local;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO FIFO raw data
+  * @param  pObj the device pObj
+  * @param  Data FIFO raw data array [6]
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_Get_Data(LSM6DSO_Object_t *pObj, uint8_t *Data)
+{
+  if (lsm6dso_read_reg(&(pObj->Ctx), LSM6DSO_FIFO_DATA_OUT_X_L, Data, 6) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO FIFO accelero single sample (16-bit data per 3 axes) and calculate acceleration [mg]
+  * @param  pObj the device pObj
+  * @param  Acceleration FIFO accelero axes [mg]
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_ACC_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration)
+{
+  lsm6dso_axis3bit16_t data_raw;
+  float_t sensitivity = 0.0f;
+  float_t acceleration_float_t[3];
+
+  if (LSM6DSO_FIFO_Get_Data(pObj, data_raw.u8bit) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (LSM6DSO_ACC_GetSensitivity(pObj, &sensitivity) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  acceleration_float_t[0] = (float_t)data_raw.i16bit[0] * sensitivity;
+  acceleration_float_t[1] = (float_t)data_raw.i16bit[1] * sensitivity;
+  acceleration_float_t[2] = (float_t)data_raw.i16bit[2] * sensitivity;
+
+  Acceleration->x = (int32_t)acceleration_float_t[0];
+  Acceleration->y = (int32_t)acceleration_float_t[1];
+  Acceleration->z = (int32_t)acceleration_float_t[2];
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO FIFO accelero BDR value
+  * @param  pObj the device pObj
+  * @param  Bdr FIFO accelero BDR value
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_ACC_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr)
+{
+  lsm6dso_bdr_xl_t new_bdr;
+
+  new_bdr = (Bdr <=    0.0f) ? LSM6DSO_XL_NOT_BATCHED
+            : (Bdr <=   12.5f) ? LSM6DSO_XL_BATCHED_AT_12Hz5
+            : (Bdr <=   26.0f) ? LSM6DSO_XL_BATCHED_AT_26Hz
+            : (Bdr <=   52.0f) ? LSM6DSO_XL_BATCHED_AT_52Hz
+            : (Bdr <=  104.0f) ? LSM6DSO_XL_BATCHED_AT_104Hz
+            : (Bdr <=  208.0f) ? LSM6DSO_XL_BATCHED_AT_208Hz
+            : (Bdr <=  417.0f) ? LSM6DSO_XL_BATCHED_AT_417Hz
+            : (Bdr <=  833.0f) ? LSM6DSO_XL_BATCHED_AT_833Hz
+            : (Bdr <= 1667.0f) ? LSM6DSO_XL_BATCHED_AT_1667Hz
+            : (Bdr <= 3333.0f) ? LSM6DSO_XL_BATCHED_AT_3333Hz
+            :                    LSM6DSO_XL_BATCHED_AT_6667Hz;
+
+  if (lsm6dso_fifo_xl_batch_set(&(pObj->Ctx), new_bdr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Get the LSM6DSO FIFO gyro single sample (16-bit data per 3 axes) and calculate angular velocity [mDPS]
+  * @param  pObj the device pObj
+  * @param  AngularVelocity FIFO gyro axes [mDPS]
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_GYRO_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularVelocity)
+{
+  lsm6dso_axis3bit16_t data_raw;
+  float_t sensitivity = 0.0f;
+  float_t angular_velocity_float_t[3];
+
+  if (LSM6DSO_FIFO_Get_Data(pObj, data_raw.u8bit) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (LSM6DSO_GYRO_GetSensitivity(pObj, &sensitivity) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  angular_velocity_float_t[0] = (float_t)data_raw.i16bit[0] * sensitivity;
+  angular_velocity_float_t[1] = (float_t)data_raw.i16bit[1] * sensitivity;
+  angular_velocity_float_t[2] = (float_t)data_raw.i16bit[2] * sensitivity;
+
+  AngularVelocity->x = (int32_t)angular_velocity_float_t[0];
+  AngularVelocity->y = (int32_t)angular_velocity_float_t[1];
+  AngularVelocity->z = (int32_t)angular_velocity_float_t[2];
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO FIFO gyro BDR value
+  * @param  pObj the device pObj
+  * @param  Bdr FIFO gyro BDR value
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_FIFO_GYRO_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr)
+{
+  lsm6dso_bdr_gy_t new_bdr;
+
+  new_bdr = (Bdr <=    0.0f) ? LSM6DSO_GY_NOT_BATCHED
+            : (Bdr <=   12.5f) ? LSM6DSO_GY_BATCHED_AT_12Hz5
+            : (Bdr <=   26.0f) ? LSM6DSO_GY_BATCHED_AT_26Hz
+            : (Bdr <=   52.0f) ? LSM6DSO_GY_BATCHED_AT_52Hz
+            : (Bdr <=  104.0f) ? LSM6DSO_GY_BATCHED_AT_104Hz
+            : (Bdr <=  208.0f) ? LSM6DSO_GY_BATCHED_AT_208Hz
+            : (Bdr <=  417.0f) ? LSM6DSO_GY_BATCHED_AT_417Hz
+            : (Bdr <=  833.0f) ? LSM6DSO_GY_BATCHED_AT_833Hz
+            : (Bdr <= 1667.0f) ? LSM6DSO_GY_BATCHED_AT_1667Hz
+            : (Bdr <= 3333.0f) ? LSM6DSO_GY_BATCHED_AT_3333Hz
+            :                    LSM6DSO_GY_BATCHED_AT_6667Hz;
+
+  if (lsm6dso_fifo_gy_batch_set(&(pObj->Ctx), new_bdr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable LSM6DSO accelerometer DRDY interrupt on INT1
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_DRDY_On_INT1(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t pin_int1_route;
+
+  /* Enable accelerometer DRDY Interrupt on INT1 */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &pin_int1_route) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+  pin_int1_route.drdy_xl = 1;
+  pin_int1_route.drdy_g = 0;
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), pin_int1_route) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Disable LSM6DSO accelerometer DRDY interrupt on INT1
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_DRDY_On_INT1(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t pin_int1_route;
+
+  /* Disable accelerometer DRDY Interrupt on INT1 */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &pin_int1_route) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+  pin_int1_route.drdy_xl = 0;
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), pin_int1_route) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO accelerometer power mode
+  * @param  pObj the device pObj
+  * @param  PowerMode Value of the powerMode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_xl_hm_mode_t newPowerMode = LSM6DSO_HIGH_PERFORMANCE_MD;
+
+  switch (PowerMode)
+  {
+    case 0:
+      newPowerMode = LSM6DSO_HIGH_PERFORMANCE_MD;
+      break;
+    case 1:
+      newPowerMode = LSM6DSO_LOW_NORMAL_POWER_MD;
+      break;
+    case 2:
+      newPowerMode = LSM6DSO_ULTRA_LOW_POWER_MD;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_xl_power_mode_set(&(pObj->Ctx), newPowerMode) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO accelerometer filter mode
+  * @param  pObj the device pObj
+  * @param  LowHighPassFlag 0/1 for setting low-pass/high-pass filter mode
+  * @param  FilterMode Value of the filter Mode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_hp_slope_xl_en_t newFilterMode = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
+
+  switch (FilterMode)
+  {
+    case 0x00:
+      newFilterMode = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
+      break;
+    case 0x01:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_10;
+      break;
+    case 0x02:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_20;
+      break;
+    case 0x03:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_45;
+      break;
+    case 0x04:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_100;
+      break;
+    case 0x05:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_200;
+      break;
+    case 0x06:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_400;
+      break;
+    case 0x07:
+      newFilterMode = LSM6DSO_LP_ODR_DIV_800;
+      break;
+    case 0x10:
+      newFilterMode = LSM6DSO_SLOPE_ODR_DIV_4;
+      break;
+    case 0x11:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_10;
+      break;
+    case 0x12:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_20;
+      break;
+    case 0x13:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_45;
+      break;
+    case 0x14:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_100;
+      break;
+    case 0x15:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_200;
+      break;
+    case 0x16:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_400;
+      break;
+    case 0x17:
+      newFilterMode = LSM6DSO_HP_ODR_DIV_800;
+      break;
+    case 0x31:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_10;
+      break;
+    case 0x32:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_20;
+      break;
+    case 0x33:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_45;
+      break;
+    case 0x34:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_100;
+      break;
+    case 0x35:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_200;
+      break;
+    case 0x36:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_400;
+      break;
+    case 0x37:
+      newFilterMode = LSM6DSO_HP_REF_MD_ODR_DIV_800;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (LowHighPassFlag == 0U)
+  {
+    /*Set accelerometer low_pass filter-mode*/
+
+    /*Set to 1 LPF2 bit (CTRL8_XL)*/
+    if (lsm6dso_xl_filter_lp2_set(&(pObj->Ctx), 1) != LSM6DSO_OK)
+    {
+      return LSM6DSO_ERROR;
+    }
+    if (lsm6dso_xl_hp_path_on_out_set(&(pObj->Ctx), newFilterMode) != LSM6DSO_OK)
+    {
+      return LSM6DSO_ERROR;
+    }
+  }
+  else
+  {
+    /*Set accelerometer high_pass filter-mode*/
+    if (lsm6dso_xl_hp_path_on_out_set(&(pObj->Ctx), newFilterMode) != LSM6DSO_OK)
+    {
+      return LSM6DSO_ERROR;
+    }
+  }
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable LSM6DSO accelerometer inactivity detection
+  * @param  pObj the device pObj
+  * @param  InactMode inactivity detection mode
+  * @param  IntPin interrupt pin line to be used
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_inact_en_t InactMode,
+                                                LSM6DSO_SensorIntPin_t IntPin)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+  int32_t ret = LSM6DSO_OK;
+
+  /* Full scale selection */
+  if (LSM6DSO_ACC_SetFullScale(pObj, 2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+  if (LSM6DSO_GYRO_SetFullScale(pObj, 250) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* SLEEP_DUR setting */
+  if (lsm6dso_act_sleep_dur_set(&(pObj->Ctx), 0x01) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable inactivity detection. */
+  switch (InactMode)
+  {
+    case LSM6DSO_XL_AND_GY_NOT_AFFECTED:
+    {
+      if (lsm6dso_act_mode_set(&(pObj->Ctx), LSM6DSO_XL_AND_GY_NOT_AFFECTED) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+    }
+    case LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED:
+    {
+      if (lsm6dso_act_mode_set(&(pObj->Ctx), LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+    }
+    case LSM6DSO_XL_12Hz5_GY_SLEEP:
+    {
+      if (lsm6dso_act_mode_set(&(pObj->Ctx), LSM6DSO_XL_12Hz5_GY_SLEEP) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+    }
+    case LSM6DSO_XL_12Hz5_GY_PD:
+    {
+      if (lsm6dso_act_mode_set(&(pObj->Ctx), LSM6DSO_XL_12Hz5_GY_PD) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+    }
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Enable Inactivity event on either INT1 or INT2 pin */
+  switch (IntPin)
+  {
+    case LSM6DSO_INT1_PIN:
+    {
+      if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val1.sleep_change = PROPERTY_ENABLE;
+      if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+    }
+    case LSM6DSO_INT2_PIN:
+    {
+      if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+
+      val2.sleep_change = PROPERTY_ENABLE;
+      if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+      {
+        return LSM6DSO_ERROR;
+      }
+      break;
+    }
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable LSM6DSO accelerometer inactivity detection
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Disable_Inactivity_Detection(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int1_route_t val1;
+  lsm6dso_pin_int2_route_t val2;
+
+  /* Disable inactivity event on both INT1 and INT2 pins */
+  if (lsm6dso_pin_int1_route_get(&(pObj->Ctx), &val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val1.sleep_change = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int1_route_set(&(pObj->Ctx), val1) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  val2.sleep_change = PROPERTY_DISABLE;
+
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, val2) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Disable inactivity detection. */
+  if (lsm6dso_act_mode_set(&(pObj->Ctx), LSM6DSO_XL_AND_GY_NOT_AFFECTED) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* SLEEP_DUR reset */
+  if (lsm6dso_act_sleep_dur_set(&(pObj->Ctx), 0x00) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set LSM6DSO accelerometer sleep duration
+  * @param  pObj the device pObj
+  * @param  Duration wake up detection duration
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_ACC_Set_Sleep_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration)
+{
+  /* Set wake up duration. */
+  if (lsm6dso_act_sleep_dur_set(&(pObj->Ctx), Duration) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Enable LSM6DSO gyroscope DRDY interrupt on INT2
+  * @param  pObj the device pObj
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Enable_DRDY_On_INT2(LSM6DSO_Object_t *pObj)
+{
+  lsm6dso_pin_int2_route_t pin_int2_route;
+
+  /* Enable gyroscope DRDY Interrupts on INT2 */
+  if (lsm6dso_pin_int2_route_get(&(pObj->Ctx), NULL, &pin_int2_route) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+  pin_int2_route.drdy_xl = 0;
+  pin_int2_route.drdy_g = 1;
+  if (lsm6dso_pin_int2_route_set(&(pObj->Ctx), NULL, pin_int2_route) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope power mode
+  * @param  pObj the device pObj
+  * @param  PowerMode Value of the powerMode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_g_hm_mode_t newPowerMode = LSM6DSO_GY_HIGH_PERFORMANCE;
+
+  switch (PowerMode)
+  {
+    case 0:
+      newPowerMode = LSM6DSO_GY_HIGH_PERFORMANCE;
+      break;
+    case 1:
+      newPowerMode = LSM6DSO_GY_NORMAL;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  if (lsm6dso_gy_power_mode_set(&(pObj->Ctx), newPowerMode) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope filter mode
+  * @param  pObj the device pObj
+  * @param  LowHighPassFlag 0/1 for setting low-pass/high-pass filter mode
+  * @param  FilterMode Value of the filter Mode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_GYRO_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode)
+{
+  int32_t ret = LSM6DSO_OK;
+
+  if (LowHighPassFlag == 0U)
+  {
+    lsm6dso_ftype_t newFilterMode = LSM6DSO_ULTRA_LIGHT;
+
+    switch (FilterMode)
+    {
+      case 0:
+        newFilterMode = LSM6DSO_ULTRA_LIGHT;
+        break;
+      case 1:
+        newFilterMode = LSM6DSO_VERY_LIGHT;
+        break;
+      case 2:
+        newFilterMode = LSM6DSO_LIGHT;
+        break;
+      case 3:
+        newFilterMode = LSM6DSO_MEDIUM;
+        break;
+      case 4:
+        newFilterMode = LSM6DSO_STRONG;
+        break;
+      case 5:
+        newFilterMode = LSM6DSO_VERY_STRONG;
+        break;
+      case 6:
+        newFilterMode = LSM6DSO_AGGRESSIVE;
+        break;
+      case 7:
+        newFilterMode = LSM6DSO_XTREME;
+        break;
+      default:
+        ret = LSM6DSO_ERROR;
+        break;
+    }
+
+    if (ret == LSM6DSO_ERROR)
+    {
+      return LSM6DSO_ERROR;
+    }
+    /*Set gyroscope low_pass 1 filter-mode*/
+    /* Enable low-pass filter */
+    if (lsm6dso_gy_filter_lp1_set(&(pObj->Ctx), 1) != LSM6DSO_OK)
+    {
+      return LSM6DSO_ERROR;
+    }
+    if (lsm6dso_gy_lp1_bandwidth_set(&(pObj->Ctx), newFilterMode) != LSM6DSO_OK)
+    {
+      return LSM6DSO_ERROR;
+    }
+  }
+  else
+  {
+    lsm6dso_hpm_g_t newFilterMode = LSM6DSO_HP_FILTER_NONE;
+
+    switch (FilterMode)
+    {
+      case 0x00:
+        newFilterMode = LSM6DSO_HP_FILTER_NONE;
+        break;
+      case 0x80:
+        newFilterMode = LSM6DSO_HP_FILTER_16mHz;
+        break;
+      case 0x81:
+        newFilterMode = LSM6DSO_HP_FILTER_65mHz;
+        break;
+      case 0x82:
+        newFilterMode = LSM6DSO_HP_FILTER_260mHz;
+        break;
+      case 0x83:
+        newFilterMode = LSM6DSO_HP_FILTER_1Hz04;
+        break;
+      default:
+        ret = LSM6DSO_ERROR;
+        break;
+    }
+
+    if (ret == LSM6DSO_ERROR)
+    {
+      return LSM6DSO_ERROR;
+    }
+
+    /*Set gyroscope high_pass filter-mode*/
+    /* Enable high-pass filter */
+    if (lsm6dso_gy_hp_path_internal_set(&(pObj->Ctx), newFilterMode) != LSM6DSO_OK)
+    {
+      return LSM6DSO_ERROR;
+    }
+  }
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set LSM6DSO DRDY mode
+  * @param  pObj the device pObj
+  * @param  Mode DRDY mode
+  * @retval 0 in case of success, an error code otherwise
+  */
+int32_t LSM6DSO_DRDY_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode)
+{
+  int32_t ret = LSM6DSO_OK;
+  lsm6dso_dataready_pulsed_t newMode = LSM6DSO_DRDY_LATCHED;
+
+  switch (Mode)
+  {
+    case 0:
+      newMode = LSM6DSO_DRDY_LATCHED;
+      break;
+    case 1:
+      newMode = LSM6DSO_DRDY_PULSED;
+      break;
+    default:
+      ret = LSM6DSO_ERROR;
+      break;
+  }
+
+  if (ret == LSM6DSO_ERROR)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  /* Set DRDY mode */
+  if (lsm6dso_data_ready_mode_set(&(pObj->Ctx), newMode) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup LSM6DSO_Private_Functions LSM6DSO Private Functions
+  * @{
+  */
+
+/**
+  * @brief  Set the LSM6DSO accelerometer sensor output data rate when enabled
+  * @param  pObj the device pObj
+  * @param  Odr the functional output data rate to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr)
+{
+  lsm6dso_odr_xl_t new_odr;
+
+  new_odr = (Odr <=    1.6f) ? LSM6DSO_XL_ODR_1Hz6
+            : (Odr <=   12.5f) ? LSM6DSO_XL_ODR_12Hz5
+            : (Odr <=   26.0f) ? LSM6DSO_XL_ODR_26Hz
+            : (Odr <=   52.0f) ? LSM6DSO_XL_ODR_52Hz
+            : (Odr <=  104.0f) ? LSM6DSO_XL_ODR_104Hz
+            : (Odr <=  208.0f) ? LSM6DSO_XL_ODR_208Hz
+            : (Odr <=  417.0f) ? LSM6DSO_XL_ODR_417Hz
+            : (Odr <=  833.0f) ? LSM6DSO_XL_ODR_833Hz
+            : (Odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
+            : (Odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
+            :                    LSM6DSO_XL_ODR_6667Hz;
+
+  /* Output data rate selection. */
+  if (lsm6dso_xl_data_rate_set(&(pObj->Ctx), new_odr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO accelerometer sensor output data rate when disabled
+  * @param  pObj the device pObj
+  * @param  Odr the functional output data rate to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+static int32_t LSM6DSO_ACC_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr)
+{
+  pObj->acc_odr = (Odr <=    1.6f) ? LSM6DSO_XL_ODR_1Hz6
+                  : (Odr <=   12.5f) ? LSM6DSO_XL_ODR_12Hz5
+                  : (Odr <=   26.0f) ? LSM6DSO_XL_ODR_26Hz
+                  : (Odr <=   52.0f) ? LSM6DSO_XL_ODR_52Hz
+                  : (Odr <=  104.0f) ? LSM6DSO_XL_ODR_104Hz
+                  : (Odr <=  208.0f) ? LSM6DSO_XL_ODR_208Hz
+                  : (Odr <=  417.0f) ? LSM6DSO_XL_ODR_417Hz
+                  : (Odr <=  833.0f) ? LSM6DSO_XL_ODR_833Hz
+                  : (Odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
+                  : (Odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
+                  :                    LSM6DSO_XL_ODR_6667Hz;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope sensor output data rate when enabled
+  * @param  pObj the device pObj
+  * @param  Odr the functional output data rate to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Enabled(LSM6DSO_Object_t *pObj, float_t Odr)
+{
+  lsm6dso_odr_g_t new_odr;
+
+  new_odr = (Odr <=   12.5f) ? LSM6DSO_GY_ODR_12Hz5
+            : (Odr <=   26.0f) ? LSM6DSO_GY_ODR_26Hz
+            : (Odr <=   52.0f) ? LSM6DSO_GY_ODR_52Hz
+            : (Odr <=  104.0f) ? LSM6DSO_GY_ODR_104Hz
+            : (Odr <=  208.0f) ? LSM6DSO_GY_ODR_208Hz
+            : (Odr <=  417.0f) ? LSM6DSO_GY_ODR_417Hz
+            : (Odr <=  833.0f) ? LSM6DSO_GY_ODR_833Hz
+            : (Odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
+            : (Odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
+            :                    LSM6DSO_GY_ODR_6667Hz;
+
+  /* Output data rate selection. */
+  if (lsm6dso_gy_data_rate_set(&(pObj->Ctx), new_odr) != LSM6DSO_OK)
+  {
+    return LSM6DSO_ERROR;
+  }
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  Set the LSM6DSO gyroscope sensor output data rate when disabled
+  * @param  pObj the device pObj
+  * @param  Odr the functional output data rate to be set
+  * @retval 0 in case of success, an error code otherwise
+  */
+static int32_t LSM6DSO_GYRO_SetOutputDataRate_When_Disabled(LSM6DSO_Object_t *pObj, float_t Odr)
+{
+  pObj->gyro_odr = (Odr <=   12.5f) ? LSM6DSO_GY_ODR_12Hz5
+                   : (Odr <=   26.0f) ? LSM6DSO_GY_ODR_26Hz
+                   : (Odr <=   52.0f) ? LSM6DSO_GY_ODR_52Hz
+                   : (Odr <=  104.0f) ? LSM6DSO_GY_ODR_104Hz
+                   : (Odr <=  208.0f) ? LSM6DSO_GY_ODR_208Hz
+                   : (Odr <=  417.0f) ? LSM6DSO_GY_ODR_417Hz
+                   : (Odr <=  833.0f) ? LSM6DSO_GY_ODR_833Hz
+                   : (Odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
+                   : (Odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
+                   :                    LSM6DSO_GY_ODR_6667Hz;
+
+  return LSM6DSO_OK;
+}
+
+/**
+  * @brief  This function provides a minimum delay based on Tick counter
+  * @param  pObj the device pObj
+  * @param  msDelay delay expressed in ms
+  * @retval None
+  */
+static void LSM6DSO_Delay(LSM6DSO_Object_t *pObj, uint32_t msDelay)
+{
+  uint32_t tickstart = pObj->IO.GetTick();
+
+  while ((pObj->IO.GetTick() - tickstart) < msDelay)
+  {
+  }
+}
+
+/**
+  * @brief  Wrap Read register component function to Bus IO function
+  * @param  Handle the device handler
+  * @param  Reg the register address
+  * @param  pData the stored data pointer
+  * @param  Length the length
+  * @retval 0 in case of success, an error code otherwise
+  */
+static int32_t ReadRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length)
+{
+  LSM6DSO_Object_t *pObj = (LSM6DSO_Object_t *)Handle;
+
+  return pObj->IO.ReadReg(pObj->IO.Address, Reg, pData, Length);
+}
+
+/**
+  * @brief  Wrap Write register component function to Bus IO function
+  * @param  Handle the device handler
+  * @param  Reg the register address
+  * @param  pData the stored data pointer
+  * @param  Length the length
+  * @retval 0 in case of success, an error code otherwise
+  */
+static int32_t WriteRegWrap(void *Handle, uint8_t Reg, uint8_t *pData, uint16_t Length)
+{
+  LSM6DSO_Object_t *pObj = (LSM6DSO_Object_t *)Handle;
+
+  return pObj->IO.WriteReg(pObj->IO.Address, Reg, pData, Length);
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */

lib/lsm6dso-api/lsm6dso.h

@@ -0,0 +1,369 @@
+/**
+  ******************************************************************************
+  * @file    lsm6dso.h
+  * @author  MEMS Software Solutions Team
+  * @brief   LSM6DSO header driver file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef LSM6DSO_H
+#define LSM6DSO_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "lsm6dso_reg.h"
+#include <string.h>
+
+/** @addtogroup BSP BSP
+  * @{
+  */
+
+/** @addtogroup Component Component
+  * @{
+  */
+
+/** @addtogroup LSM6DSO LSM6DSO
+  * @{
+  */
+
+/** @defgroup LSM6DSO_Exported_Types LSM6DSO Exported Types
+  * @{
+  */
+
+typedef int32_t (*LSM6DSO_Init_Func)(void);
+typedef int32_t (*LSM6DSO_DeInit_Func)(void);
+typedef int32_t (*LSM6DSO_GetTick_Func)(void);
+typedef void    (*LSM6DSO_Delay_Func)(uint32_t);
+typedef int32_t (*LSM6DSO_WriteReg_Func)(uint16_t, uint16_t, uint8_t *, uint16_t);
+typedef int32_t (*LSM6DSO_ReadReg_Func)(uint16_t, uint16_t, uint8_t *, uint16_t);
+
+typedef enum
+{
+  LSM6DSO_INT1_PIN,
+  LSM6DSO_INT2_PIN,
+} LSM6DSO_SensorIntPin_t;
+
+typedef enum
+{
+  LSM6DSO_ACC_HIGH_PERFORMANCE_MODE,
+  LSM6DSO_ACC_LOW_POWER_NORMAL_MODE,
+  LSM6DSO_ACC_ULTRA_LOW_POWER_MODE
+} LSM6DSO_ACC_Operating_Mode_t;
+
+typedef enum
+{
+  LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE,
+  LSM6DSO_GYRO_LOW_POWER_NORMAL_MODE
+} LSM6DSO_GYRO_Operating_Mode_t;
+
+typedef struct
+{
+  LSM6DSO_Init_Func          Init;
+  LSM6DSO_DeInit_Func        DeInit;
+  uint32_t                   BusType; /*0 means I2C, 1 means SPI 4-Wires, 2 means SPI-3-Wires */
+  uint8_t                    Address;
+  LSM6DSO_WriteReg_Func      WriteReg;
+  LSM6DSO_ReadReg_Func       ReadReg;
+  LSM6DSO_GetTick_Func       GetTick;
+  LSM6DSO_Delay_Func         Delay;
+} LSM6DSO_IO_t;
+
+
+typedef struct
+{
+  int16_t x;
+  int16_t y;
+  int16_t z;
+} LSM6DSO_AxesRaw_t;
+
+typedef struct
+{
+  int32_t x;
+  int32_t y;
+  int32_t z;
+} LSM6DSO_Axes_t;
+
+typedef struct
+{
+  unsigned int FreeFallStatus : 1;
+  unsigned int TapStatus : 1;
+  unsigned int DoubleTapStatus : 1;
+  unsigned int WakeUpStatus : 1;
+  unsigned int StepStatus : 1;
+  unsigned int TiltStatus : 1;
+  unsigned int D6DOrientationStatus : 1;
+  unsigned int SleepStatus : 1;
+} LSM6DSO_Event_Status_t;
+
+typedef struct
+{
+  LSM6DSO_IO_t        IO;
+  stmdev_ctx_t        Ctx;
+  uint8_t             is_initialized;
+  uint8_t             acc_is_enabled;
+  uint8_t             gyro_is_enabled;
+  lsm6dso_odr_xl_t    acc_odr;
+  lsm6dso_odr_g_t     gyro_odr;
+} LSM6DSO_Object_t;
+
+typedef struct
+{
+  uint8_t   Acc;
+  uint8_t   Gyro;
+  uint8_t   Magneto;
+  uint8_t   LowPower;
+  uint32_t  GyroMaxFS;
+  uint32_t  AccMaxFS;
+  uint32_t  MagMaxFS;
+  float_t     GyroMaxOdr;
+  float_t     AccMaxOdr;
+  float_t     MagMaxOdr;
+} LSM6DSO_Capabilities_t;
+
+typedef struct
+{
+  int32_t (*Init)(LSM6DSO_Object_t *);
+  int32_t (*DeInit)(LSM6DSO_Object_t *);
+  int32_t (*ReadID)(LSM6DSO_Object_t *, uint8_t *);
+  int32_t (*GetCapabilities)(LSM6DSO_Object_t *, LSM6DSO_Capabilities_t *);
+} LSM6DSO_CommonDrv_t;
+
+typedef struct
+{
+  int32_t (*Enable)(LSM6DSO_Object_t *);
+  int32_t (*Disable)(LSM6DSO_Object_t *);
+  int32_t (*GetSensitivity)(LSM6DSO_Object_t *, float_t *);
+  int32_t (*GetOutputDataRate)(LSM6DSO_Object_t *, float_t *);
+  int32_t (*SetOutputDataRate)(LSM6DSO_Object_t *, float_t);
+  int32_t (*GetFullScale)(LSM6DSO_Object_t *, int32_t *);
+  int32_t (*SetFullScale)(LSM6DSO_Object_t *, int32_t);
+  int32_t (*GetAxes)(LSM6DSO_Object_t *, LSM6DSO_Axes_t *);
+  int32_t (*GetAxesRaw)(LSM6DSO_Object_t *, LSM6DSO_AxesRaw_t *);
+} LSM6DSO_ACC_Drv_t;
+
+typedef struct
+{
+  int32_t (*Enable)(LSM6DSO_Object_t *);
+  int32_t (*Disable)(LSM6DSO_Object_t *);
+  int32_t (*GetSensitivity)(LSM6DSO_Object_t *, float_t *);
+  int32_t (*GetOutputDataRate)(LSM6DSO_Object_t *, float_t *);
+  int32_t (*SetOutputDataRate)(LSM6DSO_Object_t *, float_t);
+  int32_t (*GetFullScale)(LSM6DSO_Object_t *, int32_t *);
+  int32_t (*SetFullScale)(LSM6DSO_Object_t *, int32_t);
+  int32_t (*GetAxes)(LSM6DSO_Object_t *, LSM6DSO_Axes_t *);
+  int32_t (*GetAxesRaw)(LSM6DSO_Object_t *, LSM6DSO_AxesRaw_t *);
+} LSM6DSO_GYRO_Drv_t;
+
+typedef union
+{
+  int16_t i16bit[3];
+  uint8_t u8bit[6];
+} lsm6dso_axis3bit16_t;
+
+typedef union
+{
+  int16_t i16bit;
+  uint8_t u8bit[2];
+} lsm6dso_axis1bit16_t;
+
+typedef union
+{
+  int32_t i32bit[3];
+  uint8_t u8bit[12];
+} lsm6dso_axis3bit32_t;
+
+typedef union
+{
+  int32_t i32bit;
+  uint8_t u8bit[4];
+} lsm6dso_axis1bit32_t;
+
+/**
+  * @}
+  */
+
+/** @defgroup LSM6DSO_Exported_Constants LSM6DSO Exported Constants
+  * @{
+  */
+
+#define LSM6DSO_OK                       0
+#define LSM6DSO_ERROR                   -1
+
+#define LSM6DSO_I2C_BUS                 0U
+#define LSM6DSO_SPI_4WIRES_BUS          1U
+#define LSM6DSO_SPI_3WIRES_BUS          2U
+
+#define LSM6DSO_ACC_SENSITIVITY_FS_2G   0.061f
+#define LSM6DSO_ACC_SENSITIVITY_FS_4G   0.122f
+#define LSM6DSO_ACC_SENSITIVITY_FS_8G   0.244f
+#define LSM6DSO_ACC_SENSITIVITY_FS_16G  0.488f
+
+#define LSM6DSO_GYRO_SENSITIVITY_FS_125DPS    4.375f
+#define LSM6DSO_GYRO_SENSITIVITY_FS_250DPS    8.750f
+#define LSM6DSO_GYRO_SENSITIVITY_FS_500DPS   17.500f
+#define LSM6DSO_GYRO_SENSITIVITY_FS_1000DPS  35.000f
+#define LSM6DSO_GYRO_SENSITIVITY_FS_2000DPS  70.000f
+
+/**
+  * @}
+  */
+
+/** @addtogroup LSM6DSO_Exported_Functions LSM6DSO Exported Functions
+  * @{
+  */
+
+int32_t LSM6DSO_RegisterBusIO(LSM6DSO_Object_t *pObj, LSM6DSO_IO_t *pIO);
+int32_t LSM6DSO_Init(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_DeInit(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ReadID(LSM6DSO_Object_t *pObj, uint8_t *Id);
+int32_t LSM6DSO_GetCapabilities(LSM6DSO_Object_t *pObj, LSM6DSO_Capabilities_t *Capabilities);
+
+int32_t LSM6DSO_ACC_Enable(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Disable(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity);
+int32_t LSM6DSO_ACC_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr);
+int32_t LSM6DSO_ACC_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr);
+int32_t LSM6DSO_ACC_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr, LSM6DSO_ACC_Operating_Mode_t Mode);
+int32_t LSM6DSO_ACC_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale);
+int32_t LSM6DSO_ACC_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale);
+int32_t LSM6DSO_ACC_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value);
+int32_t LSM6DSO_ACC_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration);
+
+int32_t LSM6DSO_GYRO_Enable(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_GYRO_Disable(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_GYRO_GetSensitivity(LSM6DSO_Object_t *pObj, float_t *Sensitivity);
+int32_t LSM6DSO_GYRO_GetOutputDataRate(LSM6DSO_Object_t *pObj, float_t *Odr);
+int32_t LSM6DSO_GYRO_SetOutputDataRate(LSM6DSO_Object_t *pObj, float_t Odr);
+int32_t LSM6DSO_GYRO_SetOutputDataRate_With_Mode(LSM6DSO_Object_t *pObj, float_t Odr,
+                                                 LSM6DSO_GYRO_Operating_Mode_t Mode);
+int32_t LSM6DSO_GYRO_GetFullScale(LSM6DSO_Object_t *pObj, int32_t *FullScale);
+int32_t LSM6DSO_GYRO_SetFullScale(LSM6DSO_Object_t *pObj, int32_t FullScale);
+int32_t LSM6DSO_GYRO_GetAxesRaw(LSM6DSO_Object_t *pObj, LSM6DSO_AxesRaw_t *Value);
+int32_t LSM6DSO_GYRO_GetAxes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularRate);
+
+int32_t LSM6DSO_Read_Reg(LSM6DSO_Object_t *pObj, uint8_t reg, uint8_t *Data);
+int32_t LSM6DSO_Write_Reg(LSM6DSO_Object_t *pObj, uint8_t reg, uint8_t Data);
+int32_t LSM6DSO_Set_Interrupt_Latch(LSM6DSO_Object_t *pObj, uint8_t Status);
+
+int32_t LSM6DSO_ACC_Enable_Free_Fall_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_Free_Fall_Detection(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Set_Free_Fall_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold);
+int32_t LSM6DSO_ACC_Set_Free_Fall_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration);
+
+int32_t LSM6DSO_ACC_Enable_Pedometer(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Disable_Pedometer(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Get_Step_Count(LSM6DSO_Object_t *pObj, uint16_t *StepCount);
+int32_t LSM6DSO_ACC_Step_Counter_Reset(LSM6DSO_Object_t *pObj);
+
+int32_t LSM6DSO_ACC_Enable_Tilt_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_Tilt_Detection(LSM6DSO_Object_t *pObj);
+
+int32_t LSM6DSO_ACC_Enable_Wake_Up_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_Wake_Up_Detection(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Set_Wake_Up_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold);
+int32_t LSM6DSO_ACC_Set_Wake_Up_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration);
+
+int32_t LSM6DSO_ACC_Enable_Single_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_Single_Tap_Detection(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Enable_Double_Tap_Detection(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_Double_Tap_Detection(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Set_Tap_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold);
+int32_t LSM6DSO_ACC_Set_Tap_Shock_Time(LSM6DSO_Object_t *pObj, uint8_t Time);
+int32_t LSM6DSO_ACC_Set_Tap_Quiet_Time(LSM6DSO_Object_t *pObj, uint8_t Time);
+int32_t LSM6DSO_ACC_Set_Tap_Duration_Time(LSM6DSO_Object_t *pObj, uint8_t Time);
+
+int32_t LSM6DSO_ACC_Enable_6D_Orientation(LSM6DSO_Object_t *pObj, LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_6D_Orientation(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Set_6D_Orientation_Threshold(LSM6DSO_Object_t *pObj, uint8_t Threshold);
+int32_t LSM6DSO_ACC_Get_6D_Orientation_XL(LSM6DSO_Object_t *pObj, uint8_t *XLow);
+int32_t LSM6DSO_ACC_Get_6D_Orientation_XH(LSM6DSO_Object_t *pObj, uint8_t *XHigh);
+int32_t LSM6DSO_ACC_Get_6D_Orientation_YL(LSM6DSO_Object_t *pObj, uint8_t *YLow);
+int32_t LSM6DSO_ACC_Get_6D_Orientation_YH(LSM6DSO_Object_t *pObj, uint8_t *YHigh);
+int32_t LSM6DSO_ACC_Get_6D_Orientation_ZL(LSM6DSO_Object_t *pObj, uint8_t *ZLow);
+int32_t LSM6DSO_ACC_Get_6D_Orientation_ZH(LSM6DSO_Object_t *pObj, uint8_t *ZHigh);
+
+int32_t LSM6DSO_ACC_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status);
+int32_t LSM6DSO_ACC_Get_Event_Status(LSM6DSO_Object_t *pObj, LSM6DSO_Event_Status_t *Status);
+int32_t LSM6DSO_ACC_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t Status);
+
+int32_t LSM6DSO_GYRO_Get_DRDY_Status(LSM6DSO_Object_t *pObj, uint8_t *Status);
+int32_t LSM6DSO_GYRO_Set_SelfTest(LSM6DSO_Object_t *pObj, uint8_t Status);
+
+int32_t LSM6DSO_FIFO_Get_Num_Samples(LSM6DSO_Object_t *pObj, uint16_t *NumSamples);
+int32_t LSM6DSO_FIFO_Get_Full_Status(LSM6DSO_Object_t *pObj, uint8_t *Status);
+int32_t LSM6DSO_FIFO_Set_INT1_FIFO_Full(LSM6DSO_Object_t *pObj, uint8_t Status);
+int32_t LSM6DSO_FIFO_Set_Watermark_Level(LSM6DSO_Object_t *pObj, uint16_t Watermark);
+int32_t LSM6DSO_FIFO_Set_Stop_On_Fth(LSM6DSO_Object_t *pObj, uint8_t Status);
+int32_t LSM6DSO_FIFO_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode);
+int32_t LSM6DSO_FIFO_Get_Tag(LSM6DSO_Object_t *pObj, uint8_t *Tag);
+int32_t LSM6DSO_FIFO_Get_Data(LSM6DSO_Object_t *pObj, uint8_t *Data);
+int32_t LSM6DSO_FIFO_Get_Empty_Status(LSM6DSO_Object_t *pObj, uint8_t *Status);
+int32_t LSM6DSO_FIFO_Get_Overrun_Status(LSM6DSO_Object_t *pObj, uint8_t *Status);
+int32_t LSM6DSO_FIFO_ACC_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *Acceleration);
+int32_t LSM6DSO_FIFO_ACC_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr);
+int32_t LSM6DSO_FIFO_GYRO_Get_Axes(LSM6DSO_Object_t *pObj, LSM6DSO_Axes_t *AngularVelocity);
+int32_t LSM6DSO_FIFO_GYRO_Set_BDR(LSM6DSO_Object_t *pObj, float_t Bdr);
+
+int32_t LSM6DSO_ACC_Enable_DRDY_On_INT1(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Disable_DRDY_On_INT1(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode);
+int32_t LSM6DSO_ACC_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode);
+int32_t LSM6DSO_ACC_Enable_Inactivity_Detection(LSM6DSO_Object_t *pObj, lsm6dso_inact_en_t InactMode,
+                                                LSM6DSO_SensorIntPin_t IntPin);
+int32_t LSM6DSO_ACC_Disable_Inactivity_Detection(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_ACC_Set_Sleep_Duration(LSM6DSO_Object_t *pObj, uint8_t Duration);
+
+int32_t LSM6DSO_GYRO_Enable_DRDY_On_INT2(LSM6DSO_Object_t *pObj);
+int32_t LSM6DSO_GYRO_Set_Power_Mode(LSM6DSO_Object_t *pObj, uint8_t PowerMode);
+int32_t LSM6DSO_GYRO_Set_Filter_Mode(LSM6DSO_Object_t *pObj, uint8_t LowHighPassFlag, uint8_t FilterMode);
+
+int32_t LSM6DSO_DRDY_Set_Mode(LSM6DSO_Object_t *pObj, uint8_t Mode);
+
+/**
+  * @}
+  */
+
+/** @addtogroup LSM6DSO_Exported_Variables LSM6DSO Exported Variables
+  * @{
+  */
+
+extern LSM6DSO_CommonDrv_t LSM6DSO_COMMON_Driver;
+extern LSM6DSO_ACC_Drv_t LSM6DSO_ACC_Driver;
+extern LSM6DSO_GYRO_Drv_t LSM6DSO_GYRO_Driver;
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */

lib/lsm6dso-api/lsm6dso_reg.c

@@ -0,0 +1,13139 @@
+/**
+  ******************************************************************************
+  * @file    lsm6dso_reg.c
+  * @author  Sensors Software Solution Team
+  * @brief   LSM6DSO driver file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+#include "lsm6dso_reg.h"
+#include <stddef.h>
+
+/**
+  * @defgroup  LSM6DSO
+  * @brief     This file provides a set of functions needed to drive the
+  *            lsm6dso enhanced inertial module.
+  * @{
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Interfaces_Functions
+  * @brief     This section provide a set of functions used to read and
+  *            write a generic register of the device.
+  *            MANDATORY: return 0 -> no Error.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Read generic device register
+  *
+  * @param  ctx   read / write interface definitions(ptr)
+  * @param  reg   register to read
+  * @param  data  pointer to buffer that store the data read(ptr)
+  * @param  len   number of consecutive register to read
+  * @retval          interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t __weak lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
+                                uint8_t *data,
+                                uint16_t len)
+{
+  int32_t ret;
+
+  ret = ctx->read_reg(ctx->handle, reg, data, len);
+
+  return ret;
+}
+
+/**
+  * @brief  Write generic device register
+  *
+  * @param  ctx   read / write interface definitions(ptr)
+  * @param  reg   register to write
+  * @param  data  pointer to data to write in register reg(ptr)
+  * @param  len   number of consecutive register to write
+  * @retval          interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t __weak lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
+                                 uint8_t *data,
+                                 uint16_t len)
+{
+  int32_t ret;
+
+  ret = ctx->write_reg(ctx->handle, reg, data, len);
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSOX_Private_functions
+  * @brief     Section collect all the utility functions needed by APIs.
+  * @{
+  *
+  */
+
+static void bytecpy(uint8_t *target, uint8_t *source)
+{
+  if ((target != NULL) && (source != NULL))
+  {
+    *target = *source;
+  }
+}
+
+/**
+  * @defgroup  LSM6DSO_Sensitivity
+  * @brief     These functions convert raw-data into engineering units.
+  * @{
+  *
+  */
+float_t lsm6dso_from_fs2_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb) * 0.061f;
+}
+
+float_t lsm6dso_from_fs4_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb) * 0.122f;
+}
+
+float_t lsm6dso_from_fs8_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb) * 0.244f;
+}
+
+float_t lsm6dso_from_fs16_to_mg(int16_t lsb)
+{
+  return ((float_t)lsb) * 0.488f;
+}
+
+float_t lsm6dso_from_fs125_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb) * 4.375f;
+}
+
+float_t lsm6dso_from_fs500_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb) * 17.50f;
+}
+
+float_t lsm6dso_from_fs250_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb) * 8.750f;
+}
+
+float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb) * 35.0f;
+}
+
+float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb)
+{
+  return ((float_t)lsb) * 70.0f;
+}
+
+float_t lsm6dso_from_lsb_to_celsius(int16_t lsb)
+{
+  return (((float_t)lsb / 256.0f) + 25.0f);
+}
+
+float_t lsm6dso_from_lsb_to_nsec(int16_t lsb)
+{
+  return ((float_t)lsb * 25000.0f);
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Data_Generation
+  * @brief     This section groups all the functions concerning
+  *            data generation.
+  *
+  */
+
+/**
+  * @brief  Accelerometer full-scale selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fs_xl in reg CTRL1_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_xl_t val)
+{
+  lsm6dso_ctrl1_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fs_xl = (uint8_t) val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer full-scale selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fs_xl in reg CTRL1_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_xl_t *val)
+{
+  lsm6dso_ctrl1_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+
+  switch (reg.fs_xl)
+  {
+    case LSM6DSO_2g:
+      *val = LSM6DSO_2g;
+      break;
+
+    case LSM6DSO_16g:
+      *val = LSM6DSO_16g;
+      break;
+
+    case LSM6DSO_4g:
+      *val = LSM6DSO_4g;
+      break;
+
+    case LSM6DSO_8g:
+      *val = LSM6DSO_8g;
+      break;
+
+    default:
+      *val = LSM6DSO_2g;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer UI data rate selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of odr_xl in reg CTRL1_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_xl_t val)
+{
+  lsm6dso_odr_xl_t odr_xl =  val;
+  lsm6dso_emb_fsm_enable_t fsm_enable;
+  lsm6dso_fsm_odr_t fsm_odr;
+  lsm6dso_ctrl1_xl_t reg;
+  int32_t ret;
+
+  /* Check the Finite State Machine data rate constraints */
+  ret =  lsm6dso_fsm_enable_get(ctx, &fsm_enable);
+
+  if (ret == 0)
+  {
+    if ((fsm_enable.fsm_enable_a.fsm1_en  |
+         fsm_enable.fsm_enable_a.fsm2_en  |
+         fsm_enable.fsm_enable_a.fsm3_en  |
+         fsm_enable.fsm_enable_a.fsm4_en  |
+         fsm_enable.fsm_enable_a.fsm5_en  |
+         fsm_enable.fsm_enable_a.fsm6_en  |
+         fsm_enable.fsm_enable_a.fsm7_en  |
+         fsm_enable.fsm_enable_a.fsm8_en  |
+         fsm_enable.fsm_enable_b.fsm9_en  |
+         fsm_enable.fsm_enable_b.fsm10_en |
+         fsm_enable.fsm_enable_b.fsm11_en |
+         fsm_enable.fsm_enable_b.fsm12_en |
+         fsm_enable.fsm_enable_b.fsm13_en |
+         fsm_enable.fsm_enable_b.fsm14_en |
+         fsm_enable.fsm_enable_b.fsm15_en |
+         fsm_enable.fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
+    {
+      ret =  lsm6dso_fsm_data_rate_get(ctx, &fsm_odr);
+
+      if (ret == 0)
+      {
+        switch (fsm_odr)
+        {
+          case LSM6DSO_ODR_FSM_12Hz5:
+            if (val == LSM6DSO_XL_ODR_OFF)
+            {
+              odr_xl = LSM6DSO_XL_ODR_12Hz5;
+            }
+
+            else
+            {
+              odr_xl = val;
+            }
+
+            break;
+
+          case LSM6DSO_ODR_FSM_26Hz:
+            if (val == LSM6DSO_XL_ODR_OFF)
+            {
+              odr_xl = LSM6DSO_XL_ODR_26Hz;
+            }
+
+            else if (val == LSM6DSO_XL_ODR_12Hz5)
+            {
+              odr_xl = LSM6DSO_XL_ODR_26Hz;
+            }
+
+            else
+            {
+              odr_xl = val;
+            }
+
+            break;
+
+          case LSM6DSO_ODR_FSM_52Hz:
+            if (val == LSM6DSO_XL_ODR_OFF)
+            {
+              odr_xl = LSM6DSO_XL_ODR_52Hz;
+            }
+
+            else if (val == LSM6DSO_XL_ODR_12Hz5)
+            {
+              odr_xl = LSM6DSO_XL_ODR_52Hz;
+            }
+
+            else if (val == LSM6DSO_XL_ODR_26Hz)
+            {
+              odr_xl = LSM6DSO_XL_ODR_52Hz;
+            }
+
+            else
+            {
+              odr_xl = val;
+            }
+
+            break;
+
+          case LSM6DSO_ODR_FSM_104Hz:
+            if (val == LSM6DSO_XL_ODR_OFF)
+            {
+              odr_xl = LSM6DSO_XL_ODR_104Hz;
+            }
+
+            else if (val == LSM6DSO_XL_ODR_12Hz5)
+            {
+              odr_xl = LSM6DSO_XL_ODR_104Hz;
+            }
+
+            else if (val == LSM6DSO_XL_ODR_26Hz)
+            {
+              odr_xl = LSM6DSO_XL_ODR_104Hz;
+            }
+
+            else if (val == LSM6DSO_XL_ODR_52Hz)
+            {
+              odr_xl = LSM6DSO_XL_ODR_104Hz;
+            }
+
+            else
+            {
+              odr_xl = val;
+            }
+
+            break;
+
+          default:
+            odr_xl = val;
+            break;
+        }
+      }
+    }
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.odr_xl = (uint8_t) odr_xl;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer UI data rate selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of odr_xl in reg CTRL1_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_xl_t *val)
+{
+  lsm6dso_ctrl1_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+
+  switch (reg.odr_xl)
+  {
+    case LSM6DSO_XL_ODR_OFF:
+      *val = LSM6DSO_XL_ODR_OFF;
+      break;
+
+    case LSM6DSO_XL_ODR_12Hz5:
+      *val = LSM6DSO_XL_ODR_12Hz5;
+      break;
+
+    case LSM6DSO_XL_ODR_26Hz:
+      *val = LSM6DSO_XL_ODR_26Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_52Hz:
+      *val = LSM6DSO_XL_ODR_52Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_104Hz:
+      *val = LSM6DSO_XL_ODR_104Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_208Hz:
+      *val = LSM6DSO_XL_ODR_208Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_417Hz:
+      *val = LSM6DSO_XL_ODR_417Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_833Hz:
+      *val = LSM6DSO_XL_ODR_833Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_1667Hz:
+      *val = LSM6DSO_XL_ODR_1667Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_3333Hz:
+      *val = LSM6DSO_XL_ODR_3333Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_6667Hz:
+      *val = LSM6DSO_XL_ODR_6667Hz;
+      break;
+
+    case LSM6DSO_XL_ODR_1Hz6:
+      *val = LSM6DSO_XL_ODR_1Hz6;
+      break;
+
+    default:
+      *val = LSM6DSO_XL_ODR_OFF;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope UI chain full-scale selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fs_g in reg CTRL2_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_g_t val)
+{
+  lsm6dso_ctrl2_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fs_g = (uint8_t) val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope UI chain full-scale selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fs_g in reg CTRL2_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_g_t *val)
+{
+  lsm6dso_ctrl2_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
+
+  switch (reg.fs_g)
+  {
+    case LSM6DSO_250dps:
+      *val = LSM6DSO_250dps;
+      break;
+
+    case LSM6DSO_125dps:
+      *val = LSM6DSO_125dps;
+      break;
+
+    case LSM6DSO_500dps:
+      *val = LSM6DSO_500dps;
+      break;
+
+    case LSM6DSO_1000dps:
+      *val = LSM6DSO_1000dps;
+      break;
+
+    case LSM6DSO_2000dps:
+      *val = LSM6DSO_2000dps;
+      break;
+
+    default:
+      *val = LSM6DSO_250dps;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope UI data rate selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of odr_g in reg CTRL2_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_g_t val)
+{
+  lsm6dso_odr_g_t odr_gy =  val;
+  lsm6dso_emb_fsm_enable_t fsm_enable;
+  lsm6dso_fsm_odr_t fsm_odr;
+  lsm6dso_ctrl2_g_t reg;
+  int32_t ret;
+
+  /* Check the Finite State Machine data rate constraints */
+  ret =  lsm6dso_fsm_enable_get(ctx, &fsm_enable);
+
+  if (ret == 0)
+  {
+    if ((fsm_enable.fsm_enable_a.fsm1_en  |
+         fsm_enable.fsm_enable_a.fsm2_en  |
+         fsm_enable.fsm_enable_a.fsm3_en  |
+         fsm_enable.fsm_enable_a.fsm4_en  |
+         fsm_enable.fsm_enable_a.fsm5_en  |
+         fsm_enable.fsm_enable_a.fsm6_en  |
+         fsm_enable.fsm_enable_a.fsm7_en  |
+         fsm_enable.fsm_enable_a.fsm8_en  |
+         fsm_enable.fsm_enable_b.fsm9_en  |
+         fsm_enable.fsm_enable_b.fsm10_en |
+         fsm_enable.fsm_enable_b.fsm11_en |
+         fsm_enable.fsm_enable_b.fsm12_en |
+         fsm_enable.fsm_enable_b.fsm13_en |
+         fsm_enable.fsm_enable_b.fsm14_en |
+         fsm_enable.fsm_enable_b.fsm15_en |
+         fsm_enable.fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
+    {
+      ret =  lsm6dso_fsm_data_rate_get(ctx, &fsm_odr);
+
+      if (ret == 0)
+      {
+        switch (fsm_odr)
+        {
+          case LSM6DSO_ODR_FSM_12Hz5:
+            if (val == LSM6DSO_GY_ODR_OFF)
+            {
+              odr_gy = LSM6DSO_GY_ODR_12Hz5;
+            }
+
+            else
+            {
+              odr_gy = val;
+            }
+
+            break;
+
+          case LSM6DSO_ODR_FSM_26Hz:
+            if (val == LSM6DSO_GY_ODR_OFF)
+            {
+              odr_gy = LSM6DSO_GY_ODR_26Hz;
+            }
+
+            else if (val == LSM6DSO_GY_ODR_12Hz5)
+            {
+              odr_gy = LSM6DSO_GY_ODR_26Hz;
+            }
+
+            else
+            {
+              odr_gy = val;
+            }
+
+            break;
+
+          case LSM6DSO_ODR_FSM_52Hz:
+            if (val == LSM6DSO_GY_ODR_OFF)
+            {
+              odr_gy = LSM6DSO_GY_ODR_52Hz;
+            }
+
+            else if (val == LSM6DSO_GY_ODR_12Hz5)
+            {
+              odr_gy = LSM6DSO_GY_ODR_52Hz;
+            }
+
+            else if (val == LSM6DSO_GY_ODR_26Hz)
+            {
+              odr_gy = LSM6DSO_GY_ODR_52Hz;
+            }
+
+            else
+            {
+              odr_gy = val;
+            }
+
+            break;
+
+          case LSM6DSO_ODR_FSM_104Hz:
+            if (val == LSM6DSO_GY_ODR_OFF)
+            {
+              odr_gy = LSM6DSO_GY_ODR_104Hz;
+            }
+
+            else if (val == LSM6DSO_GY_ODR_12Hz5)
+            {
+              odr_gy = LSM6DSO_GY_ODR_104Hz;
+            }
+
+            else if (val == LSM6DSO_GY_ODR_26Hz)
+            {
+              odr_gy = LSM6DSO_GY_ODR_104Hz;
+            }
+
+            else if (val == LSM6DSO_GY_ODR_52Hz)
+            {
+              odr_gy = LSM6DSO_GY_ODR_104Hz;
+            }
+
+            else
+            {
+              odr_gy = val;
+            }
+
+            break;
+
+          default:
+            odr_gy = val;
+            break;
+        }
+      }
+    }
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.odr_g = (uint8_t) odr_gy;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope UI data rate selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of odr_g in reg CTRL2_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_data_rate_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_g_t *val)
+{
+  lsm6dso_ctrl2_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)&reg, 1);
+
+  switch (reg.odr_g)
+  {
+    case LSM6DSO_GY_ODR_OFF:
+      *val = LSM6DSO_GY_ODR_OFF;
+      break;
+
+    case LSM6DSO_GY_ODR_12Hz5:
+      *val = LSM6DSO_GY_ODR_12Hz5;
+      break;
+
+    case LSM6DSO_GY_ODR_26Hz:
+      *val = LSM6DSO_GY_ODR_26Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_52Hz:
+      *val = LSM6DSO_GY_ODR_52Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_104Hz:
+      *val = LSM6DSO_GY_ODR_104Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_208Hz:
+      *val = LSM6DSO_GY_ODR_208Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_417Hz:
+      *val = LSM6DSO_GY_ODR_417Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_833Hz:
+      *val = LSM6DSO_GY_ODR_833Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_1667Hz:
+      *val = LSM6DSO_GY_ODR_1667Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_3333Hz:
+      *val = LSM6DSO_GY_ODR_3333Hz;
+      break;
+
+    case LSM6DSO_GY_ODR_6667Hz:
+      *val = LSM6DSO_GY_ODR_6667Hz;
+      break;
+
+    default:
+      *val = LSM6DSO_GY_ODR_OFF;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Block data update.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of bdu in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.bdu = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Block data update.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of bdu in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  *val = reg.bdu;
+
+  return ret;
+}
+
+/**
+  * @brief  Weight of XL user offset bits of registers X_OFS_USR (73h),
+  *         Y_OFS_USR (74h), Z_OFS_USR (75h).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of usr_off_w in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_usr_off_w_t val)
+{
+  lsm6dso_ctrl6_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.usr_off_w = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief    Weight of XL user offset bits of registers X_OFS_USR (73h),
+  *           Y_OFS_USR (74h), Z_OFS_USR (75h).[get]
+  *
+  * @param    ctx      read / write interface definitions
+  * @param    val      Get the values of usr_off_w in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_usr_off_w_t *val)
+{
+  lsm6dso_ctrl6_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+
+  switch (reg.usr_off_w)
+  {
+    case LSM6DSO_LSb_1mg:
+      *val = LSM6DSO_LSb_1mg;
+      break;
+
+    case LSM6DSO_LSb_16mg:
+      *val = LSM6DSO_LSb_16mg;
+      break;
+
+    default:
+      *val = LSM6DSO_LSb_1mg;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer power mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of xl_hm_mode in
+  *                               reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_xl_hm_mode_t val)
+{
+  lsm6dso_ctrl5_c_t ctrl5_c;
+  lsm6dso_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x02U) >> 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ctrl6_c.xl_hm_mode = (uint8_t)val & 0x01U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer power mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of xl_hm_mode in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_xl_hm_mode_t *val)
+{
+  lsm6dso_ctrl5_c_t ctrl5_c;
+  lsm6dso_ctrl6_c_t ctrl6_c;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
+
+    switch ((ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode)
+    {
+      case LSM6DSO_HIGH_PERFORMANCE_MD:
+        *val = LSM6DSO_HIGH_PERFORMANCE_MD;
+        break;
+
+      case LSM6DSO_LOW_NORMAL_POWER_MD:
+        *val = LSM6DSO_LOW_NORMAL_POWER_MD;
+        break;
+
+      case LSM6DSO_ULTRA_LOW_POWER_MD:
+        *val = LSM6DSO_ULTRA_LOW_POWER_MD;
+        break;
+
+      default:
+        *val = LSM6DSO_HIGH_PERFORMANCE_MD;
+        break;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Operating mode for gyroscope.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of g_hm_mode in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_power_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_g_hm_mode_t val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.g_hm_mode = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Operating mode for gyroscope.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of g_hm_mode in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_power_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_g_hm_mode_t *val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  switch (reg.g_hm_mode)
+  {
+    case LSM6DSO_GY_HIGH_PERFORMANCE:
+      *val = LSM6DSO_GY_HIGH_PERFORMANCE;
+      break;
+
+    case LSM6DSO_GY_NORMAL:
+      *val = LSM6DSO_GY_NORMAL;
+      break;
+
+    default:
+      *val = LSM6DSO_GY_HIGH_PERFORMANCE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  The STATUS_REG register is read by the primary interface.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      register STATUS_REG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_status_reg_get(stmdev_ctx_t *ctx,
+                               lsm6dso_status_reg_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *) val, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer new data available.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of xlda in reg STATUS_REG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6dso_status_reg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
+  *val = reg.xlda;
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope new data available.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of gda in reg STATUS_REG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6dso_status_reg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
+  *val = reg.gda;
+
+  return ret;
+}
+
+/**
+  * @brief  Temperature new data available.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tda in reg STATUS_REG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_temp_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val)
+{
+  lsm6dso_status_reg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)&reg, 1);
+  *val = reg.tda;
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer X-axis user offset correction expressed in
+  *         two's complement, weight depends on USR_OFF_W in CTRL6_C (15h).
+  *         The value must be in the range [-127 127].[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_x_set(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_write_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer X-axis user offset correction expressed in two's
+  *         complement, weight depends on USR_OFF_W in CTRL6_C (15h).
+  *         The value must be in the range [-127 127].[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_x_get(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer Y-axis user offset correction expressed in two's
+  *         complement, weight depends on USR_OFF_W in CTRL6_C (15h).
+  *         The value must be in the range [-127 127].[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_y_set(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_write_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer Y-axis user offset correction expressed in two's
+  *         complement, weight depends on USR_OFF_W in CTRL6_C (15h).
+  *         The value must be in the range [-127 127].[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer Z-axis user offset correction expressed in two's
+  *         complement, weight depends on USR_OFF_W in CTRL6_C (15h).
+  *         The value must be in the range [-127 127].[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_z_set(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_write_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer Z-axis user offset correction expressed in two's
+  *         complement, weight depends on USR_OFF_W in CTRL6_C (15h).
+  *         The value must be in the range [-127 127].[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Enables user offset on out.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of usr_off_on_out in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.usr_off_on_out = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  User offset on out flag.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      values of usr_off_on_out in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+  *val = reg.usr_off_on_out;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Timestamp
+  * @brief     This section groups all the functions that manage the
+  *            timestamp generation.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Reset timestamp counter.[set]
+  *
+  * @param  ctx    Read / write interface definitions.(ptr)
+  * @retval        Interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_timestamp_rst(stmdev_ctx_t *ctx)
+{
+  uint8_t rst_val = 0xAA;
+  return lsm6dso_write_reg(ctx, LSM6DSO_TIMESTAMP2, &rst_val, 1);
+}
+
+/**
+  * @brief  Enables timestamp counter.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of timestamp_en in reg CTRL10_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_timestamp_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl10_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.timestamp_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables timestamp counter.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of timestamp_en in reg CTRL10_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl10_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)&reg, 1);
+  *val = reg.timestamp_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Timestamp first data output register (r).
+  *         The value is expressed as a 32-bit word and the bit
+  *         resolution is 25 us.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val)
+{
+  uint8_t buff[4];
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TIMESTAMP0, buff, 4);
+  *val = buff[3];
+  *val = (*val * 256U) +  buff[2];
+  *val = (*val * 256U) +  buff[1];
+  *val = (*val * 256U) +  buff[0];
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Data output
+  * @brief     This section groups all the data output functions.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Circular burst-mode (rounding) read of the output
+  *         registers.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of rounding in reg CTRL5_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_rounding_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_rounding_t val)
+{
+  lsm6dso_ctrl5_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.rounding = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope UI chain full-scale selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of rounding in reg CTRL5_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_rounding_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_rounding_t *val)
+{
+  lsm6dso_ctrl5_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+
+  switch (reg.rounding)
+  {
+    case LSM6DSO_NO_ROUND:
+      *val = LSM6DSO_NO_ROUND;
+      break;
+
+    case LSM6DSO_ROUND_XL:
+      *val = LSM6DSO_ROUND_XL;
+      break;
+
+    case LSM6DSO_ROUND_GY:
+      *val = LSM6DSO_ROUND_GY;
+      break;
+
+    case LSM6DSO_ROUND_GY_XL:
+      *val = LSM6DSO_ROUND_GY_XL;
+      break;
+
+    default:
+      *val = LSM6DSO_NO_ROUND;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Temperature data output register (r).
+  *         L and H registers together express a 16-bit word in two's
+  *         complement.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_temperature_raw_get(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 2);
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+
+  return ret;
+}
+
+/**
+  * @brief  Angular rate sensor. The value is expressed as a 16-bit
+  *         word in two's complement.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_angular_rate_raw_get(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_G, buff, 6);
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+  val[1] = (int16_t)buff[3];
+  val[1] = (val[1] * 256) + (int16_t)buff[2];
+  val[2] = (int16_t)buff[5];
+  val[2] = (val[2] * 256) + (int16_t)buff[4];
+
+  return ret;
+}
+
+/**
+  * @brief  Linear acceleration output register.
+  *         The value is expressed as a 16-bit word in two's complement.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_acceleration_raw_get(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_A, buff, 6);
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+  val[1] = (int16_t)buff[3];
+  val[1] = (val[1] * 256) + (int16_t)buff[2];
+  val[2] = (int16_t)buff[5];
+  val[2] = (val[2] * 256) + (int16_t)buff[4];
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO data output [get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_X_L, buff, 6);
+
+  return ret;
+}
+
+/**
+  * @brief  Step counter output register.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_number_of_steps_get(stmdev_ctx_t *ctx, uint16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_STEP_COUNTER_L, buff, 2);
+  }
+
+  if (ret == 0)
+  {
+    *val = buff[1];
+    *val = (*val * 256U) +  buff[0];
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Reset step counter register.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx)
+{
+  lsm6dso_emb_func_src_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.pedo_rst_step = PROPERTY_ENABLE;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_common
+  * @brief   This section groups common useful functions.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Difference in percentage of the effective ODR(and timestamp rate)
+  *         with respect to the typical.
+  *         Step:  0.15%. 8-bit format, 2's complement.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of freq_fine in reg
+  *                      INTERNAL_FREQ_FINE
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_internal_freq_fine_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
+                         (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.freq_fine = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
+                            (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Difference in percentage of the effective ODR(and timestamp rate)
+  *         with respect to the typical.
+  *         Step:  0.15%. 8-bit format, 2's complement.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of freq_fine in reg INTERNAL_FREQ_FINE
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_internal_freq_fine_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
+                         (uint8_t *)&reg, 1);
+  *val = reg.freq_fine;
+
+  return ret;
+}
+
+
+/**
+  * @brief  Enable access to the embedded functions/sensor
+  *         hub configuration registers.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of reg_access in
+  *                               reg FUNC_CFG_ACCESS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mem_bank_set(stmdev_ctx_t *ctx,
+                             lsm6dso_reg_access_t val)
+{
+  lsm6dso_func_cfg_access_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.reg_access = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable access to the embedded functions/sensor
+  *         hub configuration registers.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of reg_access in
+  *                               reg FUNC_CFG_ACCESS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx,
+                             lsm6dso_reg_access_t *val)
+{
+  lsm6dso_func_cfg_access_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)&reg, 1);
+
+  switch (reg.reg_access)
+  {
+    case LSM6DSO_USER_BANK:
+      *val = LSM6DSO_USER_BANK;
+      break;
+
+    case LSM6DSO_SENSOR_HUB_BANK:
+      *val = LSM6DSO_SENSOR_HUB_BANK;
+      break;
+
+    case LSM6DSO_EMBEDDED_FUNC_BANK:
+      *val = LSM6DSO_EMBEDDED_FUNC_BANK;
+      break;
+
+    default:
+      *val = LSM6DSO_USER_BANK;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Write a line(byte) in a page.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  uint8_t address: page line address
+  * @param  val      value to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address,
+                                 uint8_t *val)
+{
+  lsm6dso_page_rw_t page_rw;
+  lsm6dso_page_sel_t page_sel;
+  lsm6dso_page_address_t page_address;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.page_rw = 0x02; /* page_write enable */
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
+    page_sel.not_used_01 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_address.page_addr = (uint8_t)address & 0xFFU;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
+                            (uint8_t *)&page_address, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.page_rw = 0x00; /* page_write disable */
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Write buffer in a page.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  uint8_t address: page line address
+  * @param  uint8_t *buf: buffer to write
+  * @param  uint8_t len: buffer len
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
+                            uint8_t *buf, uint8_t len)
+{
+  lsm6dso_page_rw_t page_rw;
+  lsm6dso_page_sel_t page_sel;
+  lsm6dso_page_address_t  page_address;
+  uint16_t addr_pointed;
+  int32_t ret;
+
+  uint8_t i ;
+  addr_pointed = address;
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.page_rw = 0x02; /* page_write enable*/
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
+    page_sel.not_used_01 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_address.page_addr = (uint8_t)(addr_pointed & 0x00FFU);
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
+                            (uint8_t *)&page_address, 1);
+  }
+
+  if (ret == 0)
+  {
+    for (i = 0; ((i < len) && (ret == 0)); i++)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, &buf[i], 1);
+      addr_pointed++;
+
+      /* Check if page wrap */
+      if (((addr_pointed % 0x0100U) == 0x00U) && (ret == 0))
+      {
+        ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *)&page_sel, 1);
+
+        if (ret == 0)
+        {
+          page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
+          page_sel.not_used_01 = 1;
+          ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL,
+                                  (uint8_t *)&page_sel, 1);
+        }
+      }
+    }
+
+    page_sel.page_sel = 0;
+    page_sel.not_used_01 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.page_rw = 0x00; /* page_write disable */
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Read a line(byte) in a page.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  uint8_t address: page line address
+  * @param  val      read value
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
+                                uint8_t *val)
+{
+  lsm6dso_page_rw_t page_rw;
+  lsm6dso_page_sel_t page_sel;
+  lsm6dso_page_address_t  page_address;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.page_rw = 0x01; /* page_read enable*/
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
+    page_sel.not_used_01 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_address.page_addr = (uint8_t)address & 0x00FFU;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
+                            (uint8_t *)&page_address, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.page_rw = 0x00; /* page_read disable */
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Data-ready pulsed / letched mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of
+  *                                     dataready_pulsed in
+  *                                     reg COUNTER_BDR_REG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_data_ready_mode_set(stmdev_ctx_t *ctx,
+                                    lsm6dso_dataready_pulsed_t val)
+{
+  lsm6dso_counter_bdr_reg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.dataready_pulsed = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+                            (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Data-ready pulsed / letched mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of
+  *                                     dataready_pulsed in
+  *                                     reg COUNTER_BDR_REG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_data_ready_mode_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_dataready_pulsed_t *val)
+{
+  lsm6dso_counter_bdr_reg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
+
+  switch (reg.dataready_pulsed)
+  {
+    case LSM6DSO_DRDY_LATCHED:
+      *val = LSM6DSO_DRDY_LATCHED;
+      break;
+
+    case LSM6DSO_DRDY_PULSED:
+      *val = LSM6DSO_DRDY_PULSED;
+      break;
+
+    default:
+      *val = LSM6DSO_DRDY_LATCHED;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Device "Who am I".[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I, buff, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Software reset. Restore the default values
+  *         in user registers[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sw_reset in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_reset_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sw_reset = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Software reset. Restore the default values in user registers.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sw_reset in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  *val = reg.sw_reset;
+
+  return ret;
+}
+
+/**
+  * @brief  Register address automatically incremented during a multiple byte
+  *         access with a serial interface.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of if_inc in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.if_inc = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Register address automatically incremented during a multiple byte
+  *         access with a serial interface.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of if_inc in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  *val = reg.if_inc;
+
+  return ret;
+}
+
+/**
+  * @brief  Reboot memory content. Reload the calibration parameters.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of boot in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_boot_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.boot = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Reboot memory content. Reload the calibration parameters.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of boot in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_boot_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  *val = reg.boot;
+
+  return ret;
+}
+
+/**
+  * @brief  Linear acceleration sensor self-test enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of st_xl in reg CTRL5_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_xl_t val)
+{
+  lsm6dso_ctrl5_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.st_xl = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Linear acceleration sensor self-test enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of st_xl in reg CTRL5_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_xl_t *val)
+{
+  lsm6dso_ctrl5_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+
+  switch (reg.st_xl)
+  {
+    case LSM6DSO_XL_ST_DISABLE:
+      *val = LSM6DSO_XL_ST_DISABLE;
+      break;
+
+    case LSM6DSO_XL_ST_POSITIVE:
+      *val = LSM6DSO_XL_ST_POSITIVE;
+      break;
+
+    case LSM6DSO_XL_ST_NEGATIVE:
+      *val = LSM6DSO_XL_ST_NEGATIVE;
+      break;
+
+    default:
+      *val = LSM6DSO_XL_ST_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Angular rate sensor self-test enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of st_g in reg CTRL5_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_self_test_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_g_t val)
+{
+  lsm6dso_ctrl5_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.st_g = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Angular rate sensor self-test enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of st_g in reg CTRL5_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_self_test_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_g_t *val)
+{
+  lsm6dso_ctrl5_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)&reg, 1);
+
+  switch (reg.st_g)
+  {
+    case LSM6DSO_GY_ST_DISABLE:
+      *val = LSM6DSO_GY_ST_DISABLE;
+      break;
+
+    case LSM6DSO_GY_ST_POSITIVE:
+      *val = LSM6DSO_GY_ST_POSITIVE;
+      break;
+
+    case LSM6DSO_GY_ST_NEGATIVE:
+      *val = LSM6DSO_GY_ST_NEGATIVE;
+      break;
+
+    default:
+      *val = LSM6DSO_GY_ST_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_filters
+  * @brief     This section group all the functions concerning the
+  *            filters configuration
+  * @{
+  *
+  */
+
+/**
+  * @brief  Accelerometer output from LPF2 filtering stage selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of lpf2_xl_en in reg CTRL1_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl1_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.lpf2_xl_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer output from LPF2 filtering stage selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of lpf2_xl_en in reg CTRL1_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl1_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 1);
+  *val = reg.lpf2_xl_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
+  *         the bandwidth can be selected through FTYPE [2:0]
+  *         in CTRL6_C (15h).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of lpf1_sel_g in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.lpf1_sel_g = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
+  *         the bandwidth can be selected through FTYPE [2:0]
+  *         in CTRL6_C (15h).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of lpf1_sel_g in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  *val = reg.lpf1_sel_g;
+
+  return ret;
+}
+
+/**
+  * @brief  Mask DRDY on pin (both XL & Gyro) until filter settling ends
+  *         (XL and Gyro independently masked).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of drdy_mask in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
+                                         uint8_t val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.drdy_mask = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Mask DRDY on pin (both XL & Gyro) until filter settling ends
+  *         (XL and Gyro independently masked).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of drdy_mask in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  *val = reg.drdy_mask;
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope lp1 bandwidth.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ftype in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_ftype_t val)
+{
+  lsm6dso_ctrl6_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.ftype = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Gyroscope lp1 bandwidth.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val       Get the values of ftype in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_ftype_t *val)
+{
+  lsm6dso_ctrl6_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+
+  switch (reg.ftype)
+  {
+    case LSM6DSO_ULTRA_LIGHT:
+      *val = LSM6DSO_ULTRA_LIGHT;
+      break;
+
+    case LSM6DSO_VERY_LIGHT:
+      *val = LSM6DSO_VERY_LIGHT;
+      break;
+
+    case LSM6DSO_LIGHT:
+      *val = LSM6DSO_LIGHT;
+      break;
+
+    case LSM6DSO_MEDIUM:
+      *val = LSM6DSO_MEDIUM;
+      break;
+
+    case LSM6DSO_STRONG:
+      *val = LSM6DSO_STRONG;
+      break;
+
+    case LSM6DSO_VERY_STRONG:
+      *val = LSM6DSO_VERY_STRONG;
+      break;
+
+    case LSM6DSO_AGGRESSIVE:
+      *val = LSM6DSO_AGGRESSIVE;
+      break;
+
+    case LSM6DSO_XTREME:
+      *val = LSM6DSO_XTREME;
+      break;
+
+    default:
+      *val = LSM6DSO_ULTRA_LIGHT;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Low pass filter 2 on 6D function selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of low_pass_on_6d in reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.low_pass_on_6d = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Low pass filter 2 on 6D function selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of low_pass_on_6d in reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+  *val = reg.low_pass_on_6d;
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer slope filter / high-pass filter selection
+  *         on output.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of hp_slope_xl_en
+  *                                   in reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_hp_slope_xl_en_t val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.hp_slope_xl_en = ((uint8_t)val & 0x10U) >> 4;
+    reg.hp_ref_mode_xl = ((uint8_t)val & 0x20U) >> 5;
+    reg.hpcf_xl = (uint8_t)val & 0x07U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer slope filter / high-pass filter selection
+  *         on output.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of hp_slope_xl_en
+  *                                   in reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_hp_slope_xl_en_t *val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+
+  switch ((reg.hp_ref_mode_xl << 5) | (reg.hp_slope_xl_en << 4) |
+          reg.hpcf_xl)
+  {
+    case LSM6DSO_HP_PATH_DISABLE_ON_OUT:
+      *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
+      break;
+
+    case LSM6DSO_SLOPE_ODR_DIV_4:
+      *val = LSM6DSO_SLOPE_ODR_DIV_4;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_10:
+      *val = LSM6DSO_HP_ODR_DIV_10;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_20:
+      *val = LSM6DSO_HP_ODR_DIV_20;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_45:
+      *val = LSM6DSO_HP_ODR_DIV_45;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_100:
+      *val = LSM6DSO_HP_ODR_DIV_100;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_200:
+      *val = LSM6DSO_HP_ODR_DIV_200;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_400:
+      *val = LSM6DSO_HP_ODR_DIV_400;
+      break;
+
+    case LSM6DSO_HP_ODR_DIV_800:
+      *val = LSM6DSO_HP_ODR_DIV_800;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_10:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_10;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_20:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_20;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_45:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_45;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_100:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_100;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_200:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_200;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_400:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_400;
+      break;
+
+    case LSM6DSO_HP_REF_MD_ODR_DIV_800:
+      *val = LSM6DSO_HP_REF_MD_ODR_DIV_800;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_10:
+      *val = LSM6DSO_LP_ODR_DIV_10;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_20:
+      *val = LSM6DSO_LP_ODR_DIV_20;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_45:
+      *val = LSM6DSO_LP_ODR_DIV_45;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_100:
+      *val = LSM6DSO_LP_ODR_DIV_100;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_200:
+      *val = LSM6DSO_LP_ODR_DIV_200;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_400:
+      *val = LSM6DSO_LP_ODR_DIV_400;
+      break;
+
+    case LSM6DSO_LP_ODR_DIV_800:
+      *val = LSM6DSO_LP_ODR_DIV_800;
+      break;
+
+    default:
+      *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables accelerometer LPF2 and HPF fast-settling mode.
+  *         The filter sets the second samples after writing this bit.
+  *         Active only during device exit from power-down mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fastsettl_mode_xl in
+  *                  reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fastsettl_mode_xl = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables accelerometer LPF2 and HPF fast-settling mode.
+  *         The filter sets the second samples after writing this bit.
+  *         Active only during device exit from power-down mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fastsettl_mode_xl in reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+  *val = reg.fastsettl_mode_xl;
+
+  return ret;
+}
+
+/**
+  * @brief  HPF or SLOPE filter selection on wake-up and Activity/Inactivity
+  *         functions.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of slope_fds in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
+                                        lsm6dso_slope_fds_t val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.slope_fds = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  HPF or SLOPE filter selection on wake-up and Activity/Inactivity
+  *         functions.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of slope_fds in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
+                                        lsm6dso_slope_fds_t *val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  switch (reg.slope_fds)
+  {
+    case LSM6DSO_USE_SLOPE:
+      *val = LSM6DSO_USE_SLOPE;
+      break;
+
+    case LSM6DSO_USE_HPF:
+      *val = LSM6DSO_USE_HPF;
+      break;
+
+    default:
+      *val = LSM6DSO_USE_SLOPE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables gyroscope digital high-pass filter. The filter is
+  *         enabled only if the gyro is in HP mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of hp_en_g and hp_en_g
+  *                            in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_g_t val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
+    reg.hpm_g = (uint8_t)val & 0x03U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables gyroscope digital high-pass filter. The filter is
+  *         enabled only if the gyro is in HP mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of hp_en_g and hp_en_g
+  *                            in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_g_t *val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  switch ((reg.hp_en_g << 7) + reg.hpm_g)
+  {
+    case LSM6DSO_HP_FILTER_NONE:
+      *val = LSM6DSO_HP_FILTER_NONE;
+      break;
+
+    case LSM6DSO_HP_FILTER_16mHz:
+      *val = LSM6DSO_HP_FILTER_16mHz;
+      break;
+
+    case LSM6DSO_HP_FILTER_65mHz:
+      *val = LSM6DSO_HP_FILTER_65mHz;
+      break;
+
+    case LSM6DSO_HP_FILTER_260mHz:
+      *val = LSM6DSO_HP_FILTER_260mHz;
+      break;
+
+    case LSM6DSO_HP_FILTER_1Hz04:
+      *val = LSM6DSO_HP_FILTER_1Hz04;
+      break;
+
+    default:
+      *val = LSM6DSO_HP_FILTER_NONE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_ Auxiliary_interface
+  * @brief     This section groups all the functions concerning
+  *            auxiliary interface.
+  * @{
+  *
+  */
+
+/**
+  * @brief  aOn auxiliary interface connect/disconnect SDO and OCS
+  *         internal pull-up.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ois_pu_dis in
+  *                               reg PIN_CTRL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_ois_pu_dis_t val)
+{
+  lsm6dso_pin_ctrl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.ois_pu_dis = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  On auxiliary interface connect/disconnect SDO and OCS
+  *         internal pull-up.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of ois_pu_dis in reg PIN_CTRL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_ois_pu_dis_t *val)
+{
+  lsm6dso_pin_ctrl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
+
+  switch (reg.ois_pu_dis)
+  {
+    case LSM6DSO_AUX_PULL_UP_DISC:
+      *val = LSM6DSO_AUX_PULL_UP_DISC;
+      break;
+
+    case LSM6DSO_AUX_PULL_UP_CONNECT:
+      *val = LSM6DSO_AUX_PULL_UP_CONNECT;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_PULL_UP_DISC;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  OIS chain on aux interface power on mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ois_on in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_ois_on_t val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.ois_on_en = (uint8_t)val & 0x01U;
+    reg.ois_on = (uint8_t)val & 0x01U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  aux_pw_on_ctrl: [get]  OIS chain on aux interface power on mode
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of ois_on in reg CTRL7_G
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_ois_on_t *val)
+{
+  lsm6dso_ctrl7_g_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)&reg, 1);
+
+  switch (reg.ois_on)
+  {
+    case LSM6DSO_AUX_ON:
+      *val = LSM6DSO_AUX_ON;
+      break;
+
+    case LSM6DSO_AUX_ON_BY_AUX_INTERFACE:
+      *val = LSM6DSO_AUX_ON_BY_AUX_INTERFACE;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_ON;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer full-scale management between UI chain and
+  *         OIS chain. When XL UI is on, the full scale is the same
+  *         between UI/OIS and is chosen by the UI CTRL registers;
+  *         when XL UI is in PD, the OIS can choose the FS.
+  *         Full scales are independent between the UI/OIS chain
+  *         but both bound to 8 g.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of xl_fs_mode in
+  *                               reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_fs_mode_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_xl_fs_mode_t val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.xl_fs_mode = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Accelerometer full-scale management between UI chain and
+  *         OIS chain. When XL UI is on, the full scale is the same
+  *         between UI/OIS and is chosen by the UI CTRL registers;
+  *         when XL UI is in PD, the OIS can choose the FS.
+  *         Full scales are independent between the UI/OIS chain
+  *         but both bound to 8 g.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of xl_fs_mode in reg CTRL8_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_fs_mode_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_xl_fs_mode_t *val)
+{
+  lsm6dso_ctrl8_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)&reg, 1);
+
+  switch (reg.xl_fs_mode)
+  {
+    case LSM6DSO_USE_SAME_XL_FS:
+      *val = LSM6DSO_USE_SAME_XL_FS;
+      break;
+
+    case LSM6DSO_USE_DIFFERENT_XL_FS:
+      *val = LSM6DSO_USE_DIFFERENT_XL_FS;
+      break;
+
+    default:
+      *val = LSM6DSO_USE_SAME_XL_FS;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  The STATUS_SPIAux register is read by the auxiliary SPI.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  lsm6dso_status_spiaux_t: registers STATUS_SPIAUX
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_status_reg_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_status_spiaux_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *) val, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  aux_xl_flag_data_ready: [get]  AUX accelerometer data available
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of xlda in reg STATUS_SPIAUX
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6dso_status_spiaux_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
+  *val = reg.xlda;
+
+  return ret;
+}
+
+/**
+  * @brief  aux_gy_flag_data_ready: [get]  AUX gyroscope data available.
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of gda in reg STATUS_SPIAUX
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6dso_status_spiaux_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
+  *val = reg.gda;
+
+  return ret;
+}
+
+/**
+  * @brief  High when the gyroscope output is in the settling phase.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of gyro_settling in reg STATUS_SPIAUX
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val)
+{
+  lsm6dso_status_spiaux_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)&reg, 1);
+  *val = reg.gyro_settling;
+
+  return ret;
+}
+
+/**
+  * @brief  Selects accelerometer self-test. Effective only if XL OIS
+  *         chain is enabled.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of st_xl_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_xl_ois_t val)
+{
+  lsm6dso_int_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.st_xl_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects accelerometer self-test. Effective only if XL OIS
+  *         chain is enabled.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of st_xl_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_xl_ois_t *val)
+{
+  lsm6dso_int_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.st_xl_ois)
+  {
+    case LSM6DSO_AUX_XL_DISABLE:
+      *val = LSM6DSO_AUX_XL_DISABLE;
+      break;
+
+    case LSM6DSO_AUX_XL_POS:
+      *val = LSM6DSO_AUX_XL_POS;
+      break;
+
+    case LSM6DSO_AUX_XL_NEG:
+      *val = LSM6DSO_AUX_XL_NEG;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_XL_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Indicates polarity of DEN signal on OIS chain.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_lh_ois in
+  *                  reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_den_lh_ois_t val)
+{
+  lsm6dso_int_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_lh_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Indicates polarity of DEN signal on OIS chain.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of den_lh_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_den_lh_ois_t *val)
+{
+  lsm6dso_int_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.den_lh_ois)
+  {
+    case LSM6DSO_AUX_DEN_ACTIVE_LOW:
+      *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
+      break;
+
+    case LSM6DSO_AUX_DEN_ACTIVE_HIGH:
+      *val = LSM6DSO_AUX_DEN_ACTIVE_HIGH;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure DEN mode on the OIS chain.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of lvl2_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_den_mode_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_lvl2_ois_t val)
+{
+  lsm6dso_ctrl1_ois_t ctrl1_ois;
+  lsm6dso_int_ois_t int_ois;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
+
+  if (ret == 0)
+  {
+    int_ois.lvl2_ois = (uint8_t)val & 0x01U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
+  }
+
+  if (ret == 0)
+  {
+    ctrl1_ois.lvl1_ois = ((uint8_t)val & 0x02U) >> 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS,
+                            (uint8_t *) &ctrl1_ois, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure DEN mode on the OIS chain.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of lvl2_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_lvl2_ois_t *val)
+{
+  lsm6dso_ctrl1_ois_t ctrl1_ois;
+  lsm6dso_int_ois_t int_ois;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
+
+    switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois)
+    {
+      case LSM6DSO_AUX_DEN_DISABLE:
+        *val = LSM6DSO_AUX_DEN_DISABLE;
+        break;
+
+      case LSM6DSO_AUX_DEN_LEVEL_LATCH:
+        *val = LSM6DSO_AUX_DEN_LEVEL_LATCH;
+        break;
+
+      case LSM6DSO_AUX_DEN_LEVEL_TRIG:
+        *val = LSM6DSO_AUX_DEN_LEVEL_TRIG;
+        break;
+
+      default:
+        *val = LSM6DSO_AUX_DEN_DISABLE;
+        break;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables/Disable OIS chain DRDY on INT2 pin.
+  *         This setting has priority over all other INT2 settings.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of int2_drdy_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_drdy_on_int2_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_int_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.int2_drdy_ois = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables/Disable OIS chain DRDY on INT2 pin.
+  *         This setting has priority over all other INT2 settings.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of int2_drdy_ois in reg INT_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_drdy_on_int2_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_int_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)&reg, 1);
+  *val = reg.int2_drdy_ois;
+
+  return ret;
+}
+
+/**
+  * @brief  Enables OIS chain data processing for gyro in Mode 3 and Mode 4
+  *         (mode4_en = 1) and accelerometer data in and Mode 4 (mode4_en = 1).
+  *         When the OIS chain is enabled, the OIS outputs are available
+  *         through the SPI2 in registers OUTX_L_G (22h) through
+  *         OUTZ_H_G (27h) and STATUS_REG (1Eh) / STATUS_SPIAux, and
+  *         LPF1 is dedicated to this chain.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ois_en_spi2 in
+  *                                reg CTRL1_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_ois_en_spi2_t val)
+{
+  lsm6dso_ctrl1_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.ois_en_spi2 = (uint8_t)val & 0x01U;
+    reg.mode4_en = ((uint8_t)val & 0x02U) >> 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables OIS chain data processing for gyro in Mode 3 and Mode 4
+  *         (mode4_en = 1) and accelerometer data in and Mode 4 (mode4_en = 1).
+  *         When the OIS chain is enabled, the OIS outputs are available
+  *         through the SPI2 in registers OUTX_L_G (22h) through
+  *         OUTZ_H_G (27h) and STATUS_REG (1Eh) / STATUS_SPIAux, and
+  *         LPF1 is dedicated to this chain.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of ois_en_spi2 in
+  *                                reg CTRL1_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_ois_en_spi2_t *val)
+{
+  lsm6dso_ctrl1_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+
+  switch ((reg.mode4_en << 1) | reg.ois_en_spi2)
+  {
+    case LSM6DSO_AUX_DISABLE:
+      *val = LSM6DSO_AUX_DISABLE;
+      break;
+
+    case LSM6DSO_MODE_3_GY:
+      *val = LSM6DSO_MODE_3_GY;
+      break;
+
+    case LSM6DSO_MODE_4_GY_XL:
+      *val = LSM6DSO_MODE_4_GY_XL;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope OIS chain full-scale.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fs_g_ois in reg CTRL1_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_g_ois_t val)
+{
+  lsm6dso_ctrl1_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fs_g_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope OIS chain full-scale.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fs_g_ois in reg CTRL1_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_g_ois_t *val)
+{
+  lsm6dso_ctrl1_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.fs_g_ois)
+  {
+    case LSM6DSO_250dps_AUX:
+      *val = LSM6DSO_250dps_AUX;
+      break;
+
+    case LSM6DSO_125dps_AUX:
+      *val = LSM6DSO_125dps_AUX;
+      break;
+
+    case LSM6DSO_500dps_AUX:
+      *val = LSM6DSO_500dps_AUX;
+      break;
+
+    case LSM6DSO_1000dps_AUX:
+      *val = LSM6DSO_1000dps_AUX;
+      break;
+
+    case LSM6DSO_2000dps_AUX:
+      *val = LSM6DSO_2000dps_AUX;
+      break;
+
+    default:
+      *val = LSM6DSO_250dps_AUX;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  SPI2 3- or 4-wire interface.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sim_ois in reg CTRL1_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_sim_ois_t val)
+{
+  lsm6dso_ctrl1_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sim_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  SPI2 3- or 4-wire interface.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of sim_ois in reg CTRL1_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_sim_ois_t *val)
+{
+  lsm6dso_ctrl1_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.sim_ois)
+  {
+    case LSM6DSO_AUX_SPI_4_WIRE:
+      *val = LSM6DSO_AUX_SPI_4_WIRE;
+      break;
+
+    case LSM6DSO_AUX_SPI_3_WIRE:
+      *val = LSM6DSO_AUX_SPI_3_WIRE;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_SPI_4_WIRE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope digital LPF1 filter bandwidth.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ftype_ois in
+  *                              reg CTRL2_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
+                                         lsm6dso_ftype_ois_t val)
+{
+  lsm6dso_ctrl2_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.ftype_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope digital LPF1 filter bandwidth.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of ftype_ois in reg CTRL2_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
+                                         lsm6dso_ftype_ois_t *val)
+{
+  lsm6dso_ctrl2_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.ftype_ois)
+  {
+    case LSM6DSO_351Hz39:
+      *val = LSM6DSO_351Hz39;
+      break;
+
+    case LSM6DSO_236Hz63:
+      *val = LSM6DSO_236Hz63;
+      break;
+
+    case LSM6DSO_172Hz70:
+      *val = LSM6DSO_172Hz70;
+      break;
+
+    case LSM6DSO_937Hz91:
+      *val = LSM6DSO_937Hz91;
+      break;
+
+    default:
+      *val = LSM6DSO_351Hz39;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope OIS chain digital high-pass filter cutoff.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of hpm_ois in reg CTRL2_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_ois_t val)
+{
+  lsm6dso_ctrl2_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.hpm_ois = (uint8_t)val & 0x03U;
+    reg.hp_en_ois = ((uint8_t)val & 0x10U) >> 4;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope OIS chain digital high-pass filter cutoff.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of hpm_ois in reg CTRL2_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_ois_t *val)
+{
+  lsm6dso_ctrl2_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)&reg, 1);
+
+  switch ((reg.hp_en_ois << 4) | reg.hpm_ois)
+  {
+    case LSM6DSO_AUX_HP_DISABLE:
+      *val = LSM6DSO_AUX_HP_DISABLE;
+      break;
+
+    case LSM6DSO_AUX_HP_Hz016:
+      *val = LSM6DSO_AUX_HP_Hz016;
+      break;
+
+    case LSM6DSO_AUX_HP_Hz065:
+      *val = LSM6DSO_AUX_HP_Hz065;
+      break;
+
+    case LSM6DSO_AUX_HP_Hz260:
+      *val = LSM6DSO_AUX_HP_Hz260;
+      break;
+
+    case LSM6DSO_AUX_HP_1Hz040:
+      *val = LSM6DSO_AUX_HP_1Hz040;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_HP_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable / Disables OIS chain clamp.
+  *         Enable: All OIS chain outputs = 8000h
+  *         during self-test; Disable: OIS chain self-test
+  *         outputs dependent from the aux gyro full
+  *         scale selected.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of st_ois_clampdis in
+  *                                    reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_ois_clampdis_t val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.st_ois_clampdis = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable / Disables OIS chain clamp.
+  *         Enable: All OIS chain outputs = 8000h
+  *         during self-test; Disable: OIS chain self-test
+  *         outputs dependent from the aux gyro full
+  *         scale selected.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of st_ois_clampdis in
+  *                                    reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_ois_clampdis_t *val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.st_ois_clampdis)
+  {
+    case LSM6DSO_ENABLE_CLAMP:
+      *val = LSM6DSO_ENABLE_CLAMP;
+      break;
+
+    case LSM6DSO_DISABLE_CLAMP:
+      *val = LSM6DSO_DISABLE_CLAMP;
+      break;
+
+    default:
+      *val = LSM6DSO_ENABLE_CLAMP;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope OIS chain self-test.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of st_ois in reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_ois_t val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.st_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects gyroscope OIS chain self-test.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of st_ois in reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_ois_t *val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.st_ois)
+  {
+    case LSM6DSO_AUX_GY_DISABLE:
+      *val = LSM6DSO_AUX_GY_DISABLE;
+      break;
+
+    case LSM6DSO_AUX_GY_POS:
+      *val = LSM6DSO_AUX_GY_POS;
+      break;
+
+    case LSM6DSO_AUX_GY_NEG:
+      *val = LSM6DSO_AUX_GY_NEG;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_GY_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects accelerometer OIS channel bandwidth.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of
+  *                                       filter_xl_conf_ois in reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_filter_xl_conf_ois_t val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.filter_xl_conf_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects accelerometer OIS channel bandwidth.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of
+  *                                       filter_xl_conf_ois in reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_filter_xl_conf_ois_t *val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.filter_xl_conf_ois)
+  {
+    case LSM6DSO_289Hz:
+      *val = LSM6DSO_289Hz;
+      break;
+
+    case LSM6DSO_258Hz:
+      *val = LSM6DSO_258Hz;
+      break;
+
+    case LSM6DSO_120Hz:
+      *val = LSM6DSO_120Hz;
+      break;
+
+    case LSM6DSO_65Hz2:
+      *val = LSM6DSO_65Hz2;
+      break;
+
+    case LSM6DSO_33Hz2:
+      *val = LSM6DSO_33Hz2;
+      break;
+
+    case LSM6DSO_16Hz6:
+      *val = LSM6DSO_16Hz6;
+      break;
+
+    case LSM6DSO_8Hz30:
+      *val = LSM6DSO_8Hz30;
+      break;
+
+    case LSM6DSO_4Hz15:
+      *val = LSM6DSO_4Hz15;
+      break;
+
+    default:
+      *val = LSM6DSO_289Hz;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects accelerometer OIS channel full-scale.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fs_xl_ois in
+  *                              reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_xl_ois_t val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fs_xl_ois = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects accelerometer OIS channel full-scale.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fs_xl_ois in reg CTRL3_OIS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_xl_ois_t *val)
+{
+  lsm6dso_ctrl3_ois_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)&reg, 1);
+
+  switch (reg.fs_xl_ois)
+  {
+    case LSM6DSO_AUX_2g:
+      *val = LSM6DSO_AUX_2g;
+      break;
+
+    case LSM6DSO_AUX_16g:
+      *val = LSM6DSO_AUX_16g;
+      break;
+
+    case LSM6DSO_AUX_4g:
+      *val = LSM6DSO_AUX_4g;
+      break;
+
+    case LSM6DSO_AUX_8g:
+      *val = LSM6DSO_AUX_8g;
+      break;
+
+    default:
+      *val = LSM6DSO_AUX_2g;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_ main_serial_interface
+  * @brief     This section groups all the functions concerning main
+  *            serial interface management (not auxiliary)
+  * @{
+  *
+  */
+
+/**
+  * @brief  Connect/Disconnect SDO/SA0 internal pull-up.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sdo_pu_en in
+  *                              reg PIN_CTRL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_sdo_pu_en_t val)
+{
+  lsm6dso_pin_ctrl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sdo_pu_en = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Connect/Disconnect SDO/SA0 internal pull-up.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of sdo_pu_en in reg PIN_CTRL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_sdo_pu_en_t *val)
+{
+  lsm6dso_pin_ctrl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&reg, 1);
+
+  switch (reg.sdo_pu_en)
+  {
+    case LSM6DSO_PULL_UP_DISC:
+      *val = LSM6DSO_PULL_UP_DISC;
+      break;
+
+    case LSM6DSO_PULL_UP_CONNECT:
+      *val = LSM6DSO_PULL_UP_CONNECT;
+      break;
+
+    default:
+      *val = LSM6DSO_PULL_UP_DISC;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  SPI Serial Interface Mode selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sim in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sim = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  SPI Serial Interface Mode selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of sim in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  switch (reg.sim)
+  {
+    case LSM6DSO_SPI_4_WIRE:
+      *val = LSM6DSO_SPI_4_WIRE;
+      break;
+
+    case LSM6DSO_SPI_3_WIRE:
+      *val = LSM6DSO_SPI_3_WIRE;
+      break;
+
+    default:
+      *val = LSM6DSO_SPI_4_WIRE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable / Enable I2C interface.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of i2c_disable in
+  *                                reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_i2c_disable_t val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.i2c_disable = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Disable / Enable I2C interface.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of i2c_disable in
+  *                                reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_i2c_disable_t *val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+
+  switch (reg.i2c_disable)
+  {
+    case LSM6DSO_I2C_ENABLE:
+      *val = LSM6DSO_I2C_ENABLE;
+      break;
+
+    case LSM6DSO_I2C_DISABLE:
+      *val = LSM6DSO_I2C_DISABLE;
+      break;
+
+    default:
+      *val = LSM6DSO_I2C_ENABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  I3C Enable/Disable communication protocol[.set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of i3c_disable
+  *                                    in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
+                                lsm6dso_i3c_disable_t val)
+{
+  lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+  lsm6dso_ctrl9_xl_t ctrl9_xl;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ctrl9_xl.i3c_disable = ((uint8_t)val & 0x80U) >> 7;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                           (uint8_t *)&i3c_bus_avb, 1);
+  }
+
+  if (ret == 0)
+  {
+    i3c_bus_avb.i3c_bus_avb_sel = (uint8_t)val & 0x03U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                            (uint8_t *)&i3c_bus_avb, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  I3C Enable/Disable communication protocol.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of i3c_disable in
+  *                                reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
+                                lsm6dso_i3c_disable_t *val)
+{
+  lsm6dso_ctrl9_xl_t ctrl9_xl;
+  lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                           (uint8_t *)&i3c_bus_avb, 1);
+
+    switch ((ctrl9_xl.i3c_disable << 7) | i3c_bus_avb.i3c_bus_avb_sel)
+    {
+      case LSM6DSO_I3C_DISABLE:
+        *val = LSM6DSO_I3C_DISABLE;
+        break;
+
+      case LSM6DSO_I3C_ENABLE_T_50us:
+        *val = LSM6DSO_I3C_ENABLE_T_50us;
+        break;
+
+      case LSM6DSO_I3C_ENABLE_T_2us:
+        *val = LSM6DSO_I3C_ENABLE_T_2us;
+        break;
+
+      case LSM6DSO_I3C_ENABLE_T_1ms:
+        *val = LSM6DSO_I3C_ENABLE_T_1ms;
+        break;
+
+      case LSM6DSO_I3C_ENABLE_T_25ms:
+        *val = LSM6DSO_I3C_ENABLE_T_25ms;
+        break;
+
+      default:
+        *val = LSM6DSO_I3C_DISABLE;
+        break;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_interrupt_pins
+  * @brief     This section groups all the functions that manage interrupt pins
+  * @{
+  *
+  */
+
+/**
+  * @brief  Connect/Disconnect INT1 internal pull-down.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of pd_dis_int1 in reg I3C_BUS_AVB
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
+                              lsm6dso_int1_pd_en_t val)
+{
+  lsm6dso_i3c_bus_avb_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.pd_dis_int1 = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Connect/Disconnect INT1 internal pull-down.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of pd_dis_int1 in reg I3C_BUS_AVB
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
+                              lsm6dso_int1_pd_en_t *val)
+{
+  lsm6dso_i3c_bus_avb_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)&reg, 1);
+
+  switch (reg.pd_dis_int1)
+  {
+    case LSM6DSO_PULL_DOWN_DISC:
+      *val = LSM6DSO_PULL_DOWN_DISC;
+      break;
+
+    case LSM6DSO_PULL_DOWN_CONNECT:
+      *val = LSM6DSO_PULL_DOWN_CONNECT;
+      break;
+
+    default:
+      *val = LSM6DSO_PULL_DOWN_DISC;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Push-pull/open drain selection on interrupt pads.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of pp_od in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_pp_od_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.pp_od = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Push-pull/open drain selection on interrupt pads.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of pp_od in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_pp_od_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  switch (reg.pp_od)
+  {
+    case LSM6DSO_PUSH_PULL:
+      *val = LSM6DSO_PUSH_PULL;
+      break;
+
+    case LSM6DSO_OPEN_DRAIN:
+      *val = LSM6DSO_OPEN_DRAIN;
+      break;
+
+    default:
+      *val = LSM6DSO_PUSH_PULL;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt active-high/low.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of h_lactive in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_polarity_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_h_lactive_t val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.h_lactive = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt active-high/low.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of h_lactive in reg CTRL3_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_h_lactive_t *val)
+{
+  lsm6dso_ctrl3_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&reg, 1);
+
+  switch (reg.h_lactive)
+  {
+    case LSM6DSO_ACTIVE_HIGH:
+      *val = LSM6DSO_ACTIVE_HIGH;
+      break;
+
+    case LSM6DSO_ACTIVE_LOW:
+      *val = LSM6DSO_ACTIVE_LOW;
+      break;
+
+    default:
+      *val = LSM6DSO_ACTIVE_HIGH;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  All interrupt signals become available on INT1 pin.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of int2_on_int1 in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.int2_on_int1 = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  All interrupt signals become available on INT1 pin.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of int2_on_int1 in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  *val = reg.int2_on_int1;
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt notification mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of lir in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_lir_t val)
+{
+  lsm6dso_tap_cfg0_t tap_cfg0;
+  lsm6dso_page_rw_t page_rw;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
+
+  if (ret == 0)
+  {
+    tap_cfg0.lir = (uint8_t)val & 0x01U;
+    tap_cfg0.int_clr_on_read = (uint8_t)val & 0x01U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.emb_func_lir = ((uint8_t)val & 0x02U) >> 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt notification mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of lir in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_lir_t *val)
+{
+  lsm6dso_tap_cfg0_t tap_cfg0;
+  lsm6dso_page_rw_t page_rw;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  if (ret == 0)
+  {
+    switch ((page_rw.emb_func_lir << 1) | tap_cfg0.lir)
+    {
+      case LSM6DSO_ALL_INT_PULSED:
+        *val = LSM6DSO_ALL_INT_PULSED;
+        break;
+
+      case LSM6DSO_BASE_LATCHED_EMB_PULSED:
+        *val = LSM6DSO_BASE_LATCHED_EMB_PULSED;
+        break;
+
+      case LSM6DSO_BASE_PULSED_EMB_LATCHED:
+        *val = LSM6DSO_BASE_PULSED_EMB_LATCHED;
+        break;
+
+      case LSM6DSO_ALL_INT_LATCHED:
+        *val = LSM6DSO_ALL_INT_LATCHED;
+        break;
+
+      default:
+        *val = LSM6DSO_ALL_INT_PULSED;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Wake_Up_event
+  * @brief     This section groups all the functions that manage the Wake Up
+  *            event generation.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Weight of 1 LSB of wakeup threshold.[set]
+  *         0: 1 LSB =FS_XL  /  64
+  *         1: 1 LSB = FS_XL / 256
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wake_ths_w in
+  *                                 reg WAKE_UP_DUR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_wkup_ths_weight_set(stmdev_ctx_t *ctx,
+                                    lsm6dso_wake_ths_w_t val)
+{
+  lsm6dso_wake_up_dur_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.wake_ths_w = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Weight of 1 LSB of wakeup threshold.[get]
+  *         0: 1 LSB =FS_XL  /  64
+  *         1: 1 LSB = FS_XL / 256
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of wake_ths_w in
+  *                                 reg WAKE_UP_DUR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_wkup_ths_weight_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_wake_ths_w_t *val)
+{
+  lsm6dso_wake_up_dur_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+
+  switch (reg.wake_ths_w)
+  {
+    case LSM6DSO_LSb_FS_DIV_64:
+      *val = LSM6DSO_LSb_FS_DIV_64;
+      break;
+
+    case LSM6DSO_LSb_FS_DIV_256:
+      *val = LSM6DSO_LSb_FS_DIV_256;
+      break;
+
+    default:
+      *val = LSM6DSO_LSb_FS_DIV_64;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in
+  *         WAKE_UP_DUR.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wk_ths in reg WAKE_UP_THS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_wake_up_ths_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.wk_ths = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in
+  *         WAKE_UP_DUR.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wk_ths in reg WAKE_UP_THS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_wake_up_ths_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+  *val = reg.wk_ths;
+
+  return ret;
+}
+
+/**
+  * @brief  Wake up duration event.[set]
+  *         1LSb = 1 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of usr_off_on_wu in reg WAKE_UP_THS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
+                                          uint8_t val)
+{
+  lsm6dso_wake_up_ths_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.usr_off_on_wu = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Wake up duration event.[get]
+  *         1LSb = 1 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of usr_off_on_wu in reg WAKE_UP_THS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
+                                          uint8_t *val)
+{
+  lsm6dso_wake_up_ths_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+  *val = reg.usr_off_on_wu;
+
+  return ret;
+}
+
+/**
+  * @brief  Wake up duration event.[set]
+  *         1LSb = 1 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wake_dur in reg WAKE_UP_DUR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_wake_up_dur_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.wake_dur = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Wake up duration event.[get]
+  *         1LSb = 1 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wake_dur in reg WAKE_UP_DUR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_wake_up_dur_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+  *val = reg.wake_dur;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_ Activity/Inactivity_detection
+  * @brief     This section groups all the functions concerning
+  *            activity/inactivity detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enables gyroscope Sleep mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sleep_g in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sleep_g = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables gyroscope Sleep mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sleep_g in reg CTRL4_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl4_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&reg, 1);
+  *val = reg.sleep_g;
+
+  return ret;
+}
+
+/**
+  * @brief  Drives the sleep status instead of
+  *         sleep change on INT pins
+  *         (only if INT1_SLEEP_CHANGE or
+  *         INT2_SLEEP_CHANGE bits are enabled).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sleep_status_on_int in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
+                                         lsm6dso_sleep_status_on_int_t val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sleep_status_on_int = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Drives the sleep status instead of
+  *         sleep change on INT pins (only if
+  *         INT1_SLEEP_CHANGE or
+  *         INT2_SLEEP_CHANGE bits are enabled).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of sleep_status_on_int in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
+                                         lsm6dso_sleep_status_on_int_t *val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  switch (reg.sleep_status_on_int)
+  {
+    case LSM6DSO_DRIVE_SLEEP_CHG_EVENT:
+      *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
+      break;
+
+    case LSM6DSO_DRIVE_SLEEP_STATUS:
+      *val = LSM6DSO_DRIVE_SLEEP_STATUS;
+      break;
+
+    default:
+      *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable inactivity function.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of inact_en in reg TAP_CFG2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_act_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_inact_en_t val)
+{
+  lsm6dso_tap_cfg2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.inact_en = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable inactivity function.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of inact_en in reg TAP_CFG2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_act_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_inact_en_t *val)
+{
+  lsm6dso_tap_cfg2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
+
+  switch (reg.inact_en)
+  {
+    case LSM6DSO_XL_AND_GY_NOT_AFFECTED:
+      *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
+      break;
+
+    case LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED:
+      *val = LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED;
+      break;
+
+    case LSM6DSO_XL_12Hz5_GY_SLEEP:
+      *val = LSM6DSO_XL_12Hz5_GY_SLEEP;
+      break;
+
+    case LSM6DSO_XL_12Hz5_GY_PD:
+      *val = LSM6DSO_XL_12Hz5_GY_PD;
+      break;
+
+    default:
+      *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Duration to go in sleep mode.[set]
+  *         1 LSb = 512 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sleep_dur in reg WAKE_UP_DUR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_wake_up_dur_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sleep_dur = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Duration to go in sleep mode.[get]
+  *         1 LSb = 512 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sleep_dur in reg WAKE_UP_DUR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_wake_up_dur_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&reg, 1);
+  *val = reg.sleep_dur;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_tap_generator
+  * @brief     This section groups all the functions that manage the
+  *            tap and double tap event generation.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable Z direction in tap recognition.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_z_en in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_detection_on_z_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_z_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Z direction in tap recognition.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_z_en in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_detection_on_z_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  *val = reg.tap_z_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Y direction in tap recognition.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_y_en in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_detection_on_y_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_y_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable Y direction in tap recognition.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_y_en in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_detection_on_y_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  *val = reg.tap_y_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enable X direction in tap recognition.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_x_en in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_detection_on_x_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_x_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable X direction in tap recognition.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_x_en in reg TAP_CFG0
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val)
+{
+  lsm6dso_tap_cfg0_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)&reg, 1);
+  *val = reg.tap_x_en;
+
+  return ret;
+}
+
+/**
+  * @brief  X-axis tap recognition threshold.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_ths_x in reg TAP_CFG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_cfg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_ths_x = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  X-axis tap recognition threshold.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_ths_x in reg TAP_CFG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_tap_cfg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
+  *val = reg.tap_ths_x;
+
+  return ret;
+}
+
+/**
+  * @brief  Selection of axis priority for TAP detection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_priority in
+  *                                 reg TAP_CFG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_axis_priority_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_tap_priority_t val)
+{
+  lsm6dso_tap_cfg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_priority = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selection of axis priority for TAP detection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of tap_priority in
+  *                                 reg TAP_CFG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_axis_priority_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_tap_priority_t *val)
+{
+  lsm6dso_tap_cfg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)&reg, 1);
+
+  switch (reg.tap_priority)
+  {
+    case LSM6DSO_XYZ:
+      *val = LSM6DSO_XYZ;
+      break;
+
+    case LSM6DSO_YXZ:
+      *val = LSM6DSO_YXZ;
+      break;
+
+    case LSM6DSO_XZY:
+      *val = LSM6DSO_XZY;
+      break;
+
+    case LSM6DSO_ZYX:
+      *val = LSM6DSO_ZYX;
+      break;
+
+    case LSM6DSO_YZX:
+      *val = LSM6DSO_YZX;
+      break;
+
+    case LSM6DSO_ZXY:
+      *val = LSM6DSO_ZXY;
+      break;
+
+    default:
+      *val = LSM6DSO_XYZ;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Y-axis tap recognition threshold.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_ths_y in reg TAP_CFG2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_cfg2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_ths_y = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Y-axis tap recognition threshold.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_ths_y in reg TAP_CFG2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_threshold_y_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_tap_cfg2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)&reg, 1);
+  *val = reg.tap_ths_y;
+
+  return ret;
+}
+
+/**
+  * @brief  Z-axis recognition threshold.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_ths_z in reg TAP_THS_6D
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_ths_6d_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.tap_ths_z = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Z-axis recognition threshold.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tap_ths_z in reg TAP_THS_6D
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_threshold_z_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_tap_ths_6d_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+  *val = reg.tap_ths_z;
+
+  return ret;
+}
+
+/**
+  * @brief  Maximum duration is the maximum time of an
+  *         over threshold signal detection to be recognized
+  *         as a tap event. The default value of these bits
+  *         is 00b which corresponds to 4*ODR_XL time.
+  *         If the SHOCK[1:0] bits are set to a different
+  *         value, 1LSB corresponds to 8*ODR_XL time.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of shock in reg INT_DUR2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_int_dur2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.shock = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Maximum duration is the maximum time of an
+  *         over threshold signal detection to be recognized
+  *         as a tap event. The default value of these bits
+  *         is 00b which corresponds to 4*ODR_XL time.
+  *         If the SHOCK[1:0] bits are set to a different
+  *         value, 1LSB corresponds to 8*ODR_XL time.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of shock in reg INT_DUR2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_int_dur2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+  *val = reg.shock;
+
+  return ret;
+}
+
+/**
+  * @brief   Quiet time is the time after the first detected
+  *          tap in which there must not be any over threshold
+  *          event.
+  *          The default value of these bits is 00b which
+  *          corresponds to 2*ODR_XL time. If the QUIET[1:0]
+  *          bits are set to a different value,
+  *          1LSB corresponds to 4*ODR_XL time.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of quiet in reg INT_DUR2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_int_dur2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.quiet = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Quiet time is the time after the first detected
+  *         tap in which there must not be any over threshold
+  *         event.
+  *         The default value of these bits is 00b which
+  *         corresponds to 2*ODR_XL time.
+  *         If the QUIET[1:0] bits are set to a different
+  *         value, 1LSB corresponds to 4*ODR_XL time.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of quiet in reg INT_DUR2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_int_dur2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+  *val = reg.quiet;
+
+  return ret;
+}
+
+/**
+  * @brief  When double tap recognition is enabled,
+  *         this register expresses the maximum time
+  *         between two consecutive detected taps to
+  *         determine a double tap event.
+  *         The default value of these bits is 0000b which
+  *         corresponds to 16*ODR_XL time.
+  *         If the DUR[3:0] bits are set to a different value,
+  *         1LSB corresponds to 32*ODR_XL time.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of dur in reg INT_DUR2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_int_dur2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.dur = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  When double tap recognition is enabled,
+  *         this register expresses the maximum time
+  *         between two consecutive detected taps to
+  *         determine a double tap event.
+  *         The default value of these bits is 0000b which
+  *         corresponds to 16*ODR_XL time. If the DUR[3:0]
+  *         bits are set to a different value,
+  *         1LSB corresponds to 32*ODR_XL time.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of dur in reg INT_DUR2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_int_dur2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)&reg, 1);
+  *val = reg.dur;
+
+  return ret;
+}
+
+/**
+  * @brief  Single/double-tap event enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of single_double_tap in reg WAKE_UP_THS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_single_double_tap_t val)
+{
+  lsm6dso_wake_up_ths_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.single_double_tap = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Single/double-tap event enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of single_double_tap in reg WAKE_UP_THS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_single_double_tap_t *val)
+{
+  lsm6dso_wake_up_ths_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)&reg, 1);
+
+  switch (reg.single_double_tap)
+  {
+    case LSM6DSO_ONLY_SINGLE:
+      *val = LSM6DSO_ONLY_SINGLE;
+      break;
+
+    case LSM6DSO_BOTH_SINGLE_DOUBLE:
+      *val = LSM6DSO_BOTH_SINGLE_DOUBLE;
+      break;
+
+    default:
+      *val = LSM6DSO_ONLY_SINGLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_ Six_position_detection(6D/4D)
+  * @brief   This section groups all the functions concerning six position
+  *          detection (6D).
+  * @{
+  *
+  */
+
+/**
+  * @brief  Threshold for 4D/6D function.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of sixd_ths in reg TAP_THS_6D
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_6d_threshold_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_sixd_ths_t val)
+{
+  lsm6dso_tap_ths_6d_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.sixd_ths = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Threshold for 4D/6D function.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of sixd_ths in reg TAP_THS_6D
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_sixd_ths_t *val)
+{
+  lsm6dso_tap_ths_6d_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+
+  switch (reg.sixd_ths)
+  {
+    case LSM6DSO_DEG_80:
+      *val = LSM6DSO_DEG_80;
+      break;
+
+    case LSM6DSO_DEG_70:
+      *val = LSM6DSO_DEG_70;
+      break;
+
+    case LSM6DSO_DEG_60:
+      *val = LSM6DSO_DEG_60;
+      break;
+
+    case LSM6DSO_DEG_50:
+      *val = LSM6DSO_DEG_50;
+      break;
+
+    default:
+      *val = LSM6DSO_DEG_80;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  4D orientation detection enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of d4d_en in reg TAP_THS_6D
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_tap_ths_6d_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.d4d_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  4D orientation detection enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of d4d_en in reg TAP_THS_6D
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_tap_ths_6d_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)&reg, 1);
+  *val = reg.d4d_en;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_free_fall
+  * @brief   This section group all the functions concerning the free
+  *          fall detection.
+  * @{
+  *
+  */
+/**
+  * @brief  Free fall threshold setting.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ff_ths in reg FREE_FALL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ff_threshold_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_ff_ths_t val)
+{
+  lsm6dso_free_fall_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.ff_ths = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Free fall threshold setting.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of ff_ths in reg FREE_FALL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ff_threshold_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_ff_ths_t *val)
+{
+  lsm6dso_free_fall_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&reg, 1);
+
+  switch (reg.ff_ths)
+  {
+    case LSM6DSO_FF_TSH_156mg:
+      *val = LSM6DSO_FF_TSH_156mg;
+      break;
+
+    case LSM6DSO_FF_TSH_219mg:
+      *val = LSM6DSO_FF_TSH_219mg;
+      break;
+
+    case LSM6DSO_FF_TSH_250mg:
+      *val = LSM6DSO_FF_TSH_250mg;
+      break;
+
+    case LSM6DSO_FF_TSH_312mg:
+      *val = LSM6DSO_FF_TSH_312mg;
+      break;
+
+    case LSM6DSO_FF_TSH_344mg:
+      *val = LSM6DSO_FF_TSH_344mg;
+      break;
+
+    case LSM6DSO_FF_TSH_406mg:
+      *val = LSM6DSO_FF_TSH_406mg;
+      break;
+
+    case LSM6DSO_FF_TSH_469mg:
+      *val = LSM6DSO_FF_TSH_469mg;
+      break;
+
+    case LSM6DSO_FF_TSH_500mg:
+      *val = LSM6DSO_FF_TSH_500mg;
+      break;
+
+    default:
+      *val = LSM6DSO_FF_TSH_156mg;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Free-fall duration event.[set]
+  *         1LSb = 1 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ff_dur in reg FREE_FALL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_wake_up_dur_t wake_up_dur;
+  lsm6dso_free_fall_t free_fall;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR,
+                         (uint8_t *)&wake_up_dur, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
+  }
+
+  if (ret == 0)
+  {
+    wake_up_dur.ff_dur = ((uint8_t)val & 0x20U) >> 5;
+    free_fall.ff_dur = (uint8_t)val & 0x1FU;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR,
+                            (uint8_t *)&wake_up_dur, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Free-fall duration event.[get]
+  *         1LSb = 1 / ODR
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of ff_dur in reg FREE_FALL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_wake_up_dur_t wake_up_dur;
+  lsm6dso_free_fall_t free_fall;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR,
+                         (uint8_t *)&wake_up_dur, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
+    *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_fifo
+  * @brief   This section group all the functions concerning the fifo usage
+  * @{
+  *
+  */
+
+/**
+  * @brief  FIFO watermark level selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wtm in reg FIFO_CTRL1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val)
+{
+  lsm6dso_fifo_ctrl1_t fifo_ctrl1;
+  lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
+                         (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl1.wtm = 0x00FFU & (uint8_t)val;
+    fifo_ctrl2.wtm = (uint8_t)((0x0100U & val) >> 8);
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL1,
+                            (uint8_t *)&fifo_ctrl1, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2,
+                            (uint8_t *)&fifo_ctrl2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO watermark level selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of wtm in reg FIFO_CTRL1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val)
+{
+  lsm6dso_fifo_ctrl1_t fifo_ctrl1;
+  lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL1,
+                         (uint8_t *)&fifo_ctrl1, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
+                           (uint8_t *)&fifo_ctrl2, 1);
+    *val = ((uint16_t)fifo_ctrl2.wtm << 8) + (uint16_t)fifo_ctrl1.wtm;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO compression feature initialization request [set].
+  *
+  * @param  ctx       read / write interface definitions
+  * @param  val       change the values of FIFO_COMPR_INIT in
+  *                   reg EMB_FUNC_INIT_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx,
+                                          uint8_t val)
+{
+  lsm6dso_emb_func_init_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.fifo_compr_init = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO compression feature initialization request [get].
+  *
+  * @param  ctx    read / write interface definitions
+  * @param  val    change the values of FIFO_COMPR_INIT in
+  *                reg EMB_FUNC_INIT_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx,
+                                          uint8_t *val)
+{
+  lsm6dso_emb_func_init_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.fifo_compr_init;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable and configure compression algo.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of uncoptr_rate in
+  *                  reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_compression_algo_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_uncoptr_rate_t val)
+{
+  lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
+                         (uint8_t *)&fifo_ctrl2, 1);
+
+  if (ret == 0)
+  {
+    fifo_ctrl2.fifo_compr_rt_en = ((uint8_t)val & 0x04U) >> 2;
+    fifo_ctrl2.uncoptr_rate = (uint8_t)val & 0x03U;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2,
+                            (uint8_t *)&fifo_ctrl2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable and configure compression algo.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of uncoptr_rate in
+  *                  reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_compression_algo_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_uncoptr_rate_t *val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+
+  switch ((reg.fifo_compr_rt_en << 2) | reg.uncoptr_rate)
+  {
+    case LSM6DSO_CMP_DISABLE:
+      *val = LSM6DSO_CMP_DISABLE;
+      break;
+
+    case LSM6DSO_CMP_ALWAYS:
+      *val = LSM6DSO_CMP_ALWAYS;
+      break;
+
+    case LSM6DSO_CMP_8_TO_1:
+      *val = LSM6DSO_CMP_8_TO_1;
+      break;
+
+    case LSM6DSO_CMP_16_TO_1:
+      *val = LSM6DSO_CMP_16_TO_1;
+      break;
+
+    case LSM6DSO_CMP_32_TO_1:
+      *val = LSM6DSO_CMP_32_TO_1;
+      break;
+
+    default:
+      *val = LSM6DSO_CMP_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables ODR CHANGE virtual sensor to be batched in FIFO.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of odrchg_en in reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
+                                              uint8_t val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.odrchg_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enables ODR CHANGE virtual sensor to be batched in FIFO.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of odrchg_en in reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
+                                              uint8_t *val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+  *val = reg.odrchg_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Enables/Disables compression algorithm runtime.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fifo_compr_rt_en in
+  *                  reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_compression_algo_real_time_set(stmdev_ctx_t *ctx,
+                                               uint8_t val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fifo_compr_rt_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Enables/Disables compression algorithm runtime. [get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fifo_compr_rt_en in reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
+                                               uint8_t *val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+  *val = reg.fifo_compr_rt_en;
+
+  return ret;
+}
+
+/**
+  * @brief  Sensing chain FIFO stop values memorization at
+  *         threshold level.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of stop_on_wtm in reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.stop_on_wtm = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensing chain FIFO stop values memorization at
+  *         threshold level.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of stop_on_wtm in reg FIFO_CTRL2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_fifo_ctrl2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&reg, 1);
+  *val = reg.stop_on_wtm;
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for accelerometer data.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of bdr_xl in reg FIFO_CTRL3
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_xl_t val)
+{
+  lsm6dso_fifo_ctrl3_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.bdr_xl = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for accelerometer data.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of bdr_xl in reg FIFO_CTRL3
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_xl_t *val)
+{
+  lsm6dso_fifo_ctrl3_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
+
+  switch (reg.bdr_xl)
+  {
+    case LSM6DSO_XL_NOT_BATCHED:
+      *val = LSM6DSO_XL_NOT_BATCHED;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_12Hz5:
+      *val = LSM6DSO_XL_BATCHED_AT_12Hz5;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_26Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_26Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_52Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_52Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_104Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_104Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_208Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_208Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_417Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_417Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_833Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_833Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_1667Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_1667Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_3333Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_3333Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_6667Hz:
+      *val = LSM6DSO_XL_BATCHED_AT_6667Hz;
+      break;
+
+    case LSM6DSO_XL_BATCHED_AT_6Hz5:
+      *val = LSM6DSO_XL_BATCHED_AT_6Hz5;
+      break;
+
+    default:
+      *val = LSM6DSO_XL_NOT_BATCHED;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for gyroscope data.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of bdr_gy in reg FIFO_CTRL3
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_gy_t val)
+{
+  lsm6dso_fifo_ctrl3_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.bdr_gy = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for gyroscope data.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of bdr_gy in reg FIFO_CTRL3
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_gy_t *val)
+{
+  lsm6dso_fifo_ctrl3_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)&reg, 1);
+
+  switch (reg.bdr_gy)
+  {
+    case LSM6DSO_GY_NOT_BATCHED:
+      *val = LSM6DSO_GY_NOT_BATCHED;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_12Hz5:
+      *val = LSM6DSO_GY_BATCHED_AT_12Hz5;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_26Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_26Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_52Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_52Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_104Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_104Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_208Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_208Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_417Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_417Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_833Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_833Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_1667Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_1667Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_3333Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_3333Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_6667Hz:
+      *val = LSM6DSO_GY_BATCHED_AT_6667Hz;
+      break;
+
+    case LSM6DSO_GY_BATCHED_AT_6Hz5:
+      *val = LSM6DSO_GY_BATCHED_AT_6Hz5;
+      break;
+
+    default:
+      *val = LSM6DSO_GY_NOT_BATCHED;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO mode selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fifo_mode in reg FIFO_CTRL4
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx,
+                              lsm6dso_fifo_mode_t val)
+{
+  lsm6dso_fifo_ctrl4_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.fifo_mode = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO mode selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fifo_mode in reg FIFO_CTRL4
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx,
+                              lsm6dso_fifo_mode_t *val)
+{
+  lsm6dso_fifo_ctrl4_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+
+  switch (reg.fifo_mode)
+  {
+    case LSM6DSO_BYPASS_MODE:
+      *val = LSM6DSO_BYPASS_MODE;
+      break;
+
+    case LSM6DSO_FIFO_MODE:
+      *val = LSM6DSO_FIFO_MODE;
+      break;
+
+    case LSM6DSO_STREAM_TO_FIFO_MODE:
+      *val = LSM6DSO_STREAM_TO_FIFO_MODE;
+      break;
+
+    case LSM6DSO_BYPASS_TO_STREAM_MODE:
+      *val = LSM6DSO_BYPASS_TO_STREAM_MODE;
+      break;
+
+    case LSM6DSO_STREAM_MODE:
+      *val = LSM6DSO_STREAM_MODE;
+      break;
+
+    case LSM6DSO_BYPASS_TO_FIFO_MODE:
+      *val = LSM6DSO_BYPASS_TO_FIFO_MODE;
+      break;
+
+    default:
+      *val = LSM6DSO_BYPASS_MODE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for temperature data.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of odr_t_batch in reg FIFO_CTRL4
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
+                                    lsm6dso_odr_t_batch_t val)
+{
+  lsm6dso_fifo_ctrl4_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.odr_t_batch = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
+  *         for temperature data.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of odr_t_batch in reg FIFO_CTRL4
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_odr_t_batch_t *val)
+{
+  lsm6dso_fifo_ctrl4_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+
+  switch (reg.odr_t_batch)
+  {
+    case LSM6DSO_TEMP_NOT_BATCHED:
+      *val = LSM6DSO_TEMP_NOT_BATCHED;
+      break;
+
+    case LSM6DSO_TEMP_BATCHED_AT_1Hz6:
+      *val = LSM6DSO_TEMP_BATCHED_AT_1Hz6;
+      break;
+
+    case LSM6DSO_TEMP_BATCHED_AT_12Hz5:
+      *val = LSM6DSO_TEMP_BATCHED_AT_12Hz5;
+      break;
+
+    case LSM6DSO_TEMP_BATCHED_AT_52Hz:
+      *val = LSM6DSO_TEMP_BATCHED_AT_52Hz;
+      break;
+
+    default:
+      *val = LSM6DSO_TEMP_NOT_BATCHED;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects decimation for timestamp batching in FIFO.
+  *         Writing rate will be the maximum rate between XL and
+  *         GYRO BDR divided by decimation decoder.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of odr_ts_batch in reg FIFO_CTRL4
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
+                                              lsm6dso_odr_ts_batch_t val)
+{
+  lsm6dso_fifo_ctrl4_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.odr_ts_batch = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Selects decimation for timestamp batching in FIFO.
+  *          Writing rate will be the maximum rate between XL and
+  *          GYRO BDR divided by decimation decoder.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of odr_ts_batch in reg FIFO_CTRL4
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
+                                              lsm6dso_odr_ts_batch_t *val)
+{
+  lsm6dso_fifo_ctrl4_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)&reg, 1);
+
+  switch (reg.odr_ts_batch)
+  {
+    case LSM6DSO_NO_DECIMATION:
+      *val = LSM6DSO_NO_DECIMATION;
+      break;
+
+    case LSM6DSO_DEC_1:
+      *val = LSM6DSO_DEC_1;
+      break;
+
+    case LSM6DSO_DEC_8:
+      *val = LSM6DSO_DEC_8;
+      break;
+
+    case LSM6DSO_DEC_32:
+      *val = LSM6DSO_DEC_32;
+      break;
+
+    default:
+      *val = LSM6DSO_NO_DECIMATION;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects the trigger for the internal counter of batching events
+  *         between XL and gyro.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of trig_counter_bdr
+  *                  in reg COUNTER_BDR_REG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
+                                         lsm6dso_trig_counter_bdr_t val)
+{
+  lsm6dso_counter_bdr_reg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.trig_counter_bdr = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+                            (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Selects the trigger for the internal counter of batching events
+  *         between XL and gyro.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of trig_counter_bdr
+  *                                     in reg COUNTER_BDR_REG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
+                                         lsm6dso_trig_counter_bdr_t *val)
+{
+  lsm6dso_counter_bdr_reg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
+
+  switch (reg.trig_counter_bdr)
+  {
+    case LSM6DSO_XL_BATCH_EVENT:
+      *val = LSM6DSO_XL_BATCH_EVENT;
+      break;
+
+    case LSM6DSO_GYRO_BATCH_EVENT:
+      *val = LSM6DSO_GYRO_BATCH_EVENT;
+      break;
+
+    default:
+      *val = LSM6DSO_XL_BATCH_EVENT;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Resets the internal counter of batching vents for a single sensor.
+  *         This bit is automatically reset to zero if it was set to '1'.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of rst_counter_bdr in
+  *                      reg COUNTER_BDR_REG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_rst_batch_counter_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_counter_bdr_reg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.rst_counter_bdr = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+                            (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Resets the internal counter of batching events for a single sensor.
+  *         This bit is automatically reset to zero if it was set to '1'.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of rst_counter_bdr in
+  *                  reg COUNTER_BDR_REG1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_counter_bdr_reg1_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)&reg, 1);
+  *val = reg.rst_counter_bdr;
+
+  return ret;
+}
+
+/**
+  * @brief  Batch data rate counter.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of cnt_bdr_th in
+  *                  reg COUNTER_BDR_REG2 and COUNTER_BDR_REG1.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_batch_counter_threshold_set(stmdev_ctx_t *ctx,
+                                            uint16_t val)
+{
+  lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
+  lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+                         (uint8_t *)&counter_bdr_reg1, 1);
+
+  if (ret == 0)
+  {
+    counter_bdr_reg2.cnt_bdr_th =  0x00FFU & (uint8_t)val;
+    counter_bdr_reg1.cnt_bdr_th = (uint8_t)(0x0700U & val) >> 8;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+                            (uint8_t *)&counter_bdr_reg1, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
+                            (uint8_t *)&counter_bdr_reg2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Batch data rate counter.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of cnt_bdr_th in
+  *                  reg COUNTER_BDR_REG2 and COUNTER_BDR_REG1.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_batch_counter_threshold_get(stmdev_ctx_t *ctx,
+                                            uint16_t *val)
+{
+  lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
+  lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+                         (uint8_t *)&counter_bdr_reg1, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
+                           (uint8_t *)&counter_bdr_reg2, 1);
+    *val = ((uint16_t)counter_bdr_reg1.cnt_bdr_th << 8)
+           + (uint16_t)counter_bdr_reg2.cnt_bdr_th;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Number of unread sensor data(TAG + 6 bytes) stored in FIFO.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of diff_fifo in reg FIFO_STATUS1
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val)
+{
+  lsm6dso_fifo_status1_t fifo_status1;
+  lsm6dso_fifo_status2_t fifo_status2;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS1,
+                         (uint8_t *)&fifo_status1, 1);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2,
+                           (uint8_t *)&fifo_status2, 1);
+    *val = ((uint16_t)fifo_status2.diff_fifo << 8) +
+           (uint16_t)fifo_status1.diff_fifo;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO status.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      registers FIFO_STATUS2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_status_get(stmdev_ctx_t *ctx,
+                                lsm6dso_fifo_status2_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *) val, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Smart FIFO full status.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fifo_full_ia in reg FIFO_STATUS2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_fifo_status2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)&reg, 1);
+  *val = reg.fifo_full_ia;
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO overrun status.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  fifo_over_run_latched in
+  *                  reg FIFO_STATUS2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_fifo_status2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)&reg, 1);
+  *val = reg.fifo_ovr_ia;
+
+  return ret;
+}
+
+/**
+  * @brief  FIFO watermark status.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fifo_wtm_ia in reg FIFO_STATUS2
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_fifo_status2_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)&reg, 1);
+  *val = reg.fifo_wtm_ia;
+
+  return ret;
+}
+
+/**
+  * @brief  Identifies the sensor in FIFO_DATA_OUT.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of tag_sensor in reg FIFO_DATA_OUT_TAG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_fifo_tag_t *val)
+{
+  lsm6dso_fifo_data_out_tag_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_TAG,
+                         (uint8_t *)&reg, 1);
+
+  switch (reg.tag_sensor)
+  {
+    case LSM6DSO_GYRO_NC_TAG:
+      *val = LSM6DSO_GYRO_NC_TAG;
+      break;
+
+    case LSM6DSO_XL_NC_TAG:
+      *val = LSM6DSO_XL_NC_TAG;
+      break;
+
+    case LSM6DSO_TEMPERATURE_TAG:
+      *val = LSM6DSO_TEMPERATURE_TAG;
+      break;
+
+    case LSM6DSO_CFG_CHANGE_TAG:
+      *val = LSM6DSO_CFG_CHANGE_TAG;
+      break;
+
+    case LSM6DSO_XL_NC_T_2_TAG:
+      *val = LSM6DSO_XL_NC_T_2_TAG;
+      break;
+
+    case LSM6DSO_XL_NC_T_1_TAG:
+      *val = LSM6DSO_XL_NC_T_1_TAG;
+      break;
+
+    case LSM6DSO_XL_2XC_TAG:
+      *val = LSM6DSO_XL_2XC_TAG;
+      break;
+
+    case LSM6DSO_XL_3XC_TAG:
+      *val = LSM6DSO_XL_3XC_TAG;
+      break;
+
+    case LSM6DSO_GYRO_NC_T_2_TAG:
+      *val = LSM6DSO_GYRO_NC_T_2_TAG;
+      break;
+
+    case LSM6DSO_GYRO_NC_T_1_TAG:
+      *val = LSM6DSO_GYRO_NC_T_1_TAG;
+      break;
+
+    case LSM6DSO_GYRO_2XC_TAG:
+      *val = LSM6DSO_GYRO_2XC_TAG;
+      break;
+
+    case LSM6DSO_GYRO_3XC_TAG:
+      *val = LSM6DSO_GYRO_3XC_TAG;
+      break;
+
+    case LSM6DSO_SENSORHUB_SLAVE0_TAG:
+      *val = LSM6DSO_SENSORHUB_SLAVE0_TAG;
+      break;
+
+    case LSM6DSO_SENSORHUB_SLAVE1_TAG:
+      *val = LSM6DSO_SENSORHUB_SLAVE1_TAG;
+      break;
+
+    case LSM6DSO_SENSORHUB_SLAVE2_TAG:
+      *val = LSM6DSO_SENSORHUB_SLAVE2_TAG;
+      break;
+
+    case LSM6DSO_SENSORHUB_SLAVE3_TAG:
+      *val = LSM6DSO_SENSORHUB_SLAVE3_TAG;
+      break;
+
+    case LSM6DSO_STEP_CPUNTER_TAG:
+      *val = LSM6DSO_STEP_CPUNTER_TAG;
+      break;
+
+    case LSM6DSO_GAME_ROTATION_TAG:
+      *val = LSM6DSO_GAME_ROTATION_TAG;
+      break;
+
+    case LSM6DSO_GEOMAG_ROTATION_TAG:
+      *val = LSM6DSO_GEOMAG_ROTATION_TAG;
+      break;
+
+    case LSM6DSO_ROTATION_TAG:
+      *val = LSM6DSO_ROTATION_TAG;
+      break;
+
+    case LSM6DSO_SENSORHUB_NACK_TAG:
+      *val = LSM6DSO_SENSORHUB_NACK_TAG;
+      break;
+
+    default:
+      *val = LSM6DSO_GYRO_NC_TAG;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  :  Enable FIFO batching of pedometer embedded
+  *            function values.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of gbias_fifo_en in
+  *                  reg LSM6DSO_EMB_FUNC_FIFO_CFG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_emb_func_fifo_cfg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
+                           (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.pedo_fifo_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
+                            (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable FIFO batching of pedometer embedded function values.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of pedo_fifo_en in
+  *                  reg LSM6DSO_EMB_FUNC_FIFO_CFG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fifo_pedo_batch_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_emb_func_fifo_cfg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
+                           (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.pedo_fifo_en;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Enable FIFO batching data of first slave.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_0_en in
+  *                  reg SLV0_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_0_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_slv0_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.batch_ext_sens_0_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable FIFO batching data of first slave.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_0_en in
+  *                  reg SLV0_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_0_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_slv0_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.batch_ext_sens_0_en;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable FIFO batching data of second slave.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_1_en in
+  *                  reg SLV1_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_1_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_slv1_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.batch_ext_sens_1_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Enable FIFO batching data of second slave.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_1_en in
+  *                  reg SLV1_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_1_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_slv1_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)&reg, 1);
+    *val = reg.batch_ext_sens_1_en;
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable FIFO batching data of third slave.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_2_en in
+  *                  reg SLV2_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_2_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_slv2_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.batch_ext_sens_2_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable FIFO batching data of third slave.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_2_en in
+  *                  reg SLV2_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_slv2_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.batch_ext_sens_2_en;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Enable FIFO batching data of fourth slave.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_3_en
+  *                  in reg SLV3_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_slv3_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.batch_ext_sens_3_en = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable FIFO batching data of fourth slave.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of  batch_ext_sens_3_en in
+  *                  reg SLV3_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_slv3_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.batch_ext_sens_3_en;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_DEN_functionality
+  * @brief     This section groups all the functions concerning
+  *            DEN functionality.
+  * @{
+  *
+  */
+
+/**
+  * @brief  DEN functionality marking mode.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_mode in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_den_mode_t val)
+{
+  lsm6dso_ctrl6_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_mode = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN functionality marking mode.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of den_mode in reg CTRL6_C
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_den_mode_t *val)
+{
+  lsm6dso_ctrl6_c_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)&reg, 1);
+
+  switch (reg.den_mode)
+  {
+    case LSM6DSO_DEN_DISABLE:
+      *val = LSM6DSO_DEN_DISABLE;
+      break;
+
+    case LSM6DSO_LEVEL_FIFO:
+      *val = LSM6DSO_LEVEL_FIFO;
+      break;
+
+    case LSM6DSO_LEVEL_LETCHED:
+      *val = LSM6DSO_LEVEL_LETCHED;
+      break;
+
+    case LSM6DSO_LEVEL_TRIGGER:
+      *val = LSM6DSO_LEVEL_TRIGGER;
+      break;
+
+    case LSM6DSO_EDGE_TRIGGER:
+      *val = LSM6DSO_EDGE_TRIGGER;
+      break;
+
+    default:
+      *val = LSM6DSO_DEN_DISABLE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN active level configuration.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_lh in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_den_lh_t val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_lh = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN active level configuration.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of den_lh in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_den_lh_t *val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  switch (reg.den_lh)
+  {
+    case LSM6DSO_DEN_ACT_LOW:
+      *val = LSM6DSO_DEN_ACT_LOW;
+      break;
+
+    case LSM6DSO_DEN_ACT_HIGH:
+      *val = LSM6DSO_DEN_ACT_HIGH;
+      break;
+
+    default:
+      *val = LSM6DSO_DEN_ACT_LOW;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_xl_g in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_enable_set(stmdev_ctx_t *ctx,
+                               lsm6dso_den_xl_g_t val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_xl_g = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of den_xl_g in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_enable_get(stmdev_ctx_t *ctx,
+                               lsm6dso_den_xl_g_t *val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  switch (reg.den_xl_g)
+  {
+    case LSM6DSO_STAMP_IN_GY_DATA:
+      *val = LSM6DSO_STAMP_IN_GY_DATA;
+      break;
+
+    case LSM6DSO_STAMP_IN_XL_DATA:
+      *val = LSM6DSO_STAMP_IN_XL_DATA;
+      break;
+
+    case LSM6DSO_STAMP_IN_GY_XL_DATA:
+      *val = LSM6DSO_STAMP_IN_GY_XL_DATA;
+      break;
+
+    default:
+      *val = LSM6DSO_STAMP_IN_GY_DATA;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of X-axis.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_z in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_z = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of X-axis.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_z in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  *val = reg.den_z;
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Y-axis.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_y in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_y = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Y-axis.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_y in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  *val = reg.den_y;
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Z-axis.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_x in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+
+  if (ret == 0)
+  {
+    reg.den_x = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  DEN value stored in LSB of Z-axis.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of den_x in reg CTRL9_XL
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_ctrl9_xl_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&reg, 1);
+  *val = reg.den_x;
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Pedometer
+  * @brief     This section groups all the functions that manage pedometer.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Enable pedometer algorithm.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      turn on and configure pedometer
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_sens_set(stmdev_ctx_t *ctx,
+                              lsm6dso_pedo_md_t val)
+{
+  lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+                                (uint8_t *)&pedo_cmd_reg);
+
+  if (ret == 0)
+  {
+    pedo_cmd_reg.fp_rejection_en = ((uint8_t)val & 0x10U) >> 4;
+    pedo_cmd_reg.ad_det_en = ((uint8_t)val & 0x20U) >> 5;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+                                   (uint8_t *)&pedo_cmd_reg);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Enable pedometer algorithm.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      turn on and configure pedometer
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_sens_get(stmdev_ctx_t *ctx,
+                              lsm6dso_pedo_md_t *val)
+{
+  lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+                                (uint8_t *)&pedo_cmd_reg);
+
+  switch ((pedo_cmd_reg.ad_det_en << 5) | (pedo_cmd_reg.fp_rejection_en
+                                           << 4))
+  {
+    case LSM6DSO_PEDO_BASE_MODE:
+      *val = LSM6DSO_PEDO_BASE_MODE;
+      break;
+
+    case LSM6DSO_FALSE_STEP_REJ:
+      *val = LSM6DSO_FALSE_STEP_REJ;
+      break;
+
+    case LSM6DSO_FALSE_STEP_REJ_ADV_MODE:
+      *val = LSM6DSO_FALSE_STEP_REJ_ADV_MODE;
+      break;
+
+    default:
+      *val = LSM6DSO_PEDO_BASE_MODE;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt status bit for step detection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of is_step_det in reg EMB_FUNC_STATUS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_step_detect_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_emb_func_status_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.is_step_det;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Pedometer debounce configuration register (r/w).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_debounce_steps_set(stmdev_ctx_t *ctx,
+                                        uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF,
+                                 buff);
+
+  return ret;
+}
+
+/**
+  * @brief  Pedometer debounce configuration register (r/w).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_debounce_steps_get(stmdev_ctx_t *ctx,
+                                        uint8_t *buff)
+{
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF, buff);
+
+  return ret;
+}
+
+/**
+  * @brief  Time period register for step detection on delta time (r/w).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_steps_period_set(stmdev_ctx_t *ctx, uint16_t val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  buff[1] = (uint8_t)(val / 256U);
+  buff[0] = (uint8_t)(val - (buff[1] * 256U));
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L,
+                                 &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
+                                   &buff[1]);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Time period register for step detection on delta time (r/w).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx,
+                                      uint16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L,
+                                &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
+                                  &buff[1]);
+    *val = buff[1];
+    *val = (*val * 256U) +  buff[0];
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set when user wants to generate interrupt on count overflow
+  *         event/every step.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of carry_count_en in reg PEDO_CMD_REG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_int_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_carry_count_en_t val)
+{
+  lsm6dso_pedo_cmd_reg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+                                (uint8_t *)&reg);
+
+  if (ret == 0)
+  {
+    reg.carry_count_en = (uint8_t)val;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+                                   (uint8_t *)&reg);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Set when user wants to generate interrupt on count overflow
+  *         event/every step.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of carry_count_en in reg PEDO_CMD_REG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pedo_int_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_carry_count_en_t *val)
+{
+  lsm6dso_pedo_cmd_reg_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+                                (uint8_t *)&reg);
+
+  switch (reg.carry_count_en)
+  {
+    case LSM6DSO_EVERY_STEP:
+      *val = LSM6DSO_EVERY_STEP;
+      break;
+
+    case LSM6DSO_COUNT_OVERFLOW:
+      *val = LSM6DSO_COUNT_OVERFLOW;
+      break;
+
+    default:
+      *val = LSM6DSO_EVERY_STEP;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_significant_motion
+  * @brief   This section groups all the functions that manage the
+  *          significant motion detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief   Interrupt status bit for significant motion detection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of is_sigmot in reg EMB_FUNC_STATUS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  lsm6dso_emb_func_status_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.is_sigmot;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_tilt_detection
+  * @brief     This section groups all the functions that manage the tilt
+  *            event detection.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Interrupt status bit for tilt detection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of is_tilt in reg EMB_FUNC_STATUS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val)
+{
+  lsm6dso_emb_func_status_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.is_tilt;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_ magnetometer_sensor
+  * @brief     This section groups all the functions that manage additional
+  *            magnetometer sensor.
+  * @{
+  *
+  */
+
+/**
+  * @brief  External magnetometer sensitivity value register.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_sensitivity_set(stmdev_ctx_t *ctx, uint16_t val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  buff[1] = (uint8_t)(val / 256U);
+  buff[0] = (uint8_t)(val - (buff[1] * 256U));
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
+                                 &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
+                                   &buff[1]);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  External magnetometer sensitivity value register.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
+                                &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
+                                  &buff[1]);
+    *val = buff[1];
+    *val = (*val * 256U) +  buff[0];
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Offset for hard-iron compensation register (r/w).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_offset_set(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
+  buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
+  buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
+  buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
+  buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
+  buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[1]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[2]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[3]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[4]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[5]);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Offset for hard-iron compensation register (r/w).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[6];
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[1]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[2]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[3]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[4]);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[5]);
+    val[0] = (int16_t)buff[1];
+    val[0] = (val[0] * 256) + (int16_t)buff[0];
+    val[1] = (int16_t)buff[3];
+    val[1] = (val[1] * 256) + (int16_t)buff[2];
+    val[2] = (int16_t)buff[5];
+    val[2] = (val[2] * 256) + (int16_t)buff[4];
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Soft-iron (3x3 symmetric) matrix correction
+  *         register (r/w). The value is expressed as
+  *         half-precision floating-point format:
+  *         SEEEEEFFFFFFFFFF
+  *         S: 1 sign bit;
+  *         E: 5 exponent bits;
+  *         F: 10 fraction bits).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[12];
+  int32_t ret;
+
+  uint8_t index;
+  buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
+  buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
+  buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
+  buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
+  buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
+  buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
+  buff[7] = (uint8_t)((uint16_t)val[3] / 256U);
+  buff[6] = (uint8_t)((uint16_t)val[3] - (buff[7] * 256U));
+  buff[9] = (uint8_t)((uint16_t)val[4] / 256U);
+  buff[8] = (uint8_t)((uint16_t)val[4] - (buff[9] * 256U));
+  buff[11] = (uint8_t)((uint16_t)val[5] / 256U);
+  buff[10] = (uint8_t)((uint16_t)val[5] - (buff[11] * 256U));
+  index = 0x00U;
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_L,
+                                 &buff[index]);
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_H,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_L,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_H,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_L,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_H,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_L,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_H,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_L,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_H,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_L,
+                                   &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_H,
+                                   &buff[index]);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Soft-iron (3x3 symmetric) matrix
+  *         correction register (r/w).
+  *         The value is expressed as half-precision
+  *         floating-point format:
+  *         SEEEEEFFFFFFFFFF
+  *         S: 1 sign bit;
+  *         E: 5 exponent bits;
+  *         F: 10 fraction bits.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val)
+{
+  uint8_t buff[12];
+  int32_t ret;
+
+  uint8_t index;
+  index = 0x00U;
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_L, &buff[index]);
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_H, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_L, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_H, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_L, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_H, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_L, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_H, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_L, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_H, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_L, &buff[index]);
+  }
+
+  if (ret == 0)
+  {
+    index++;
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_H, &buff[index]);
+  }
+
+  val[0] = (int16_t)buff[1];
+  val[0] = (val[0] * 256) + (int16_t)buff[0];
+  val[1] = (int16_t)buff[3];
+  val[1] = (val[1] * 256) + (int16_t)buff[2];
+  val[2] = (int16_t)buff[5];
+  val[2] = (val[2] * 256) + (int16_t)buff[4];
+  val[3] = (int16_t)buff[7];
+  val[3] = (val[3] * 256) + (int16_t)buff[6];
+  val[4] = (int16_t)buff[9];
+  val[4] = (val[4] * 256) + (int16_t)buff[8];
+  val[5] = (int16_t)buff[11];
+  val[5] = (val[5] * 256) + (int16_t)buff[10];
+
+  return ret;
+}
+
+/**
+  * @brief  Magnetometer Z-axis coordinates
+  *         rotation (to be aligned to
+  *         accelerometer/gyroscope axes
+  *         orientation).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of mag_z_axis in reg MAG_CFG_A
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_z_axis_t val)
+{
+  lsm6dso_mag_cfg_a_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
+                                (uint8_t *)&reg);
+
+  if (ret == 0)
+  {
+    reg.mag_z_axis = (uint8_t) val;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A,
+                                   (uint8_t *)&reg);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Magnetometer Z-axis coordinates
+  *         rotation (to be aligned to
+  *         accelerometer/gyroscope axes
+  *         orientation).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of mag_z_axis in reg MAG_CFG_A
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_z_axis_t *val)
+{
+  lsm6dso_mag_cfg_a_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
+                                (uint8_t *)&reg);
+
+  switch (reg.mag_z_axis)
+  {
+    case LSM6DSO_Z_EQ_Y:
+      *val = LSM6DSO_Z_EQ_Y;
+      break;
+
+    case LSM6DSO_Z_EQ_MIN_Y:
+      *val = LSM6DSO_Z_EQ_MIN_Y;
+      break;
+
+    case LSM6DSO_Z_EQ_X:
+      *val = LSM6DSO_Z_EQ_X;
+      break;
+
+    case LSM6DSO_Z_EQ_MIN_X:
+      *val = LSM6DSO_Z_EQ_MIN_X;
+      break;
+
+    case LSM6DSO_Z_EQ_MIN_Z:
+      *val = LSM6DSO_Z_EQ_MIN_Z;
+      break;
+
+    case LSM6DSO_Z_EQ_Z:
+      *val = LSM6DSO_Z_EQ_Z;
+      break;
+
+    default:
+      *val = LSM6DSO_Z_EQ_Y;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Magnetometer Y-axis coordinates
+  *          rotation (to be aligned to
+  *          accelerometer/gyroscope axes
+  *          orientation).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of mag_y_axis in reg MAG_CFG_A
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_y_axis_t val)
+{
+  lsm6dso_mag_cfg_a_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
+                                (uint8_t *)&reg);
+
+  if (ret == 0)
+  {
+    reg.mag_y_axis = (uint8_t)val;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A,
+                                   (uint8_t *) &reg);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Magnetometer Y-axis coordinates
+  *         rotation (to be aligned to
+  *         accelerometer/gyroscope axes
+  *         orientation).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of mag_y_axis in reg MAG_CFG_A
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_y_axis_t *val)
+{
+  lsm6dso_mag_cfg_a_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A,
+                                (uint8_t *)&reg);
+
+  switch (reg.mag_y_axis)
+  {
+    case LSM6DSO_Y_EQ_Y:
+      *val = LSM6DSO_Y_EQ_Y;
+      break;
+
+    case LSM6DSO_Y_EQ_MIN_Y:
+      *val = LSM6DSO_Y_EQ_MIN_Y;
+      break;
+
+    case LSM6DSO_Y_EQ_X:
+      *val = LSM6DSO_Y_EQ_X;
+      break;
+
+    case LSM6DSO_Y_EQ_MIN_X:
+      *val = LSM6DSO_Y_EQ_MIN_X;
+      break;
+
+    case LSM6DSO_Y_EQ_MIN_Z:
+      *val = LSM6DSO_Y_EQ_MIN_Z;
+      break;
+
+    case LSM6DSO_Y_EQ_Z:
+      *val = LSM6DSO_Y_EQ_Z;
+      break;
+
+    default:
+      *val = LSM6DSO_Y_EQ_Y;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Magnetometer X-axis coordinates
+  *         rotation (to be aligned to
+  *         accelerometer/gyroscope axes
+  *         orientation).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of mag_x_axis in reg MAG_CFG_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_x_orient_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_x_axis_t val)
+{
+  lsm6dso_mag_cfg_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B,
+                                (uint8_t *)&reg);
+
+  if (ret == 0)
+  {
+    reg.mag_x_axis = (uint8_t)val;
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_B,
+                                   (uint8_t *)&reg);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief   Magnetometer X-axis coordinates
+  *          rotation (to be aligned to
+  *          accelerometer/gyroscope axes
+  *          orientation).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of mag_x_axis in reg MAG_CFG_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_x_axis_t *val)
+{
+  lsm6dso_mag_cfg_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B,
+                                (uint8_t *)&reg);
+
+  switch (reg.mag_x_axis)
+  {
+    case LSM6DSO_X_EQ_Y:
+      *val = LSM6DSO_X_EQ_Y;
+      break;
+
+    case LSM6DSO_X_EQ_MIN_Y:
+      *val = LSM6DSO_X_EQ_MIN_Y;
+      break;
+
+    case LSM6DSO_X_EQ_X:
+      *val = LSM6DSO_X_EQ_X;
+      break;
+
+    case LSM6DSO_X_EQ_MIN_X:
+      *val = LSM6DSO_X_EQ_MIN_X;
+      break;
+
+    case LSM6DSO_X_EQ_MIN_Z:
+      *val = LSM6DSO_X_EQ_MIN_Z;
+      break;
+
+    case LSM6DSO_X_EQ_Z:
+      *val = LSM6DSO_X_EQ_Z;
+      break;
+
+    default:
+      *val = LSM6DSO_X_EQ_Y;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_finite_state_machine
+  * @brief     This section groups all the functions that manage the
+  *            state_machine.
+  * @{
+  *
+  */
+
+/**
+  * @brief   Interrupt status bit for FSM long counter
+  *          timeout interrupt event.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of is_fsm_lc in reg EMB_FUNC_STATUS
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                             uint8_t *val)
+{
+  lsm6dso_emb_func_status_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.is_fsm_lc;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Final State Machine enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      union of registers from FSM_ENABLE_A to FSM_ENABLE_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_enable_set(stmdev_ctx_t *ctx,
+                               lsm6dso_emb_fsm_enable_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_A,
+                            (uint8_t *)&val->fsm_enable_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_B,
+                            (uint8_t *)&val->fsm_enable_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Final State Machine enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      union of registers from FSM_ENABLE_A to FSM_ENABLE_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_enable_get(stmdev_ctx_t *ctx,
+                               lsm6dso_emb_fsm_enable_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, (uint8_t *) val, 2);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM long counter status register. Long counter value is an
+  *         unsigned integer value (16-bit format).[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that contains data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  buff[1] = (uint8_t)(val / 256U);
+  buff[0] = (uint8_t)(val - (buff[1] * 256U));
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM long counter status register. Long counter value is an
+  *         unsigned integer value (16-bit format).[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  buff     buffer that stores data read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+    *val = buff[1];
+    *val = (*val * 256U) +  buff[0];
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Clear FSM long counter value.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fsm_lc_clr in
+  *                  reg FSM_LONG_COUNTER_CLEAR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx,
+                             lsm6dso_fsm_lc_clr_t val)
+{
+  lsm6dso_fsm_long_counter_clear_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
+                           (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg. fsm_lc_clr = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
+                            (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Clear FSM long counter value.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fsm_lc_clr in
+  *                  reg FSM_LONG_COUNTER_CLEAR
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
+                             lsm6dso_fsm_lc_clr_t *val)
+{
+  lsm6dso_fsm_long_counter_clear_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
+                           (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.fsm_lc_clr)
+    {
+      case LSM6DSO_LC_NORMAL:
+        *val = LSM6DSO_LC_NORMAL;
+        break;
+
+      case LSM6DSO_LC_CLEAR:
+        *val = LSM6DSO_LC_CLEAR;
+        break;
+
+      case LSM6DSO_LC_CLEAR_DONE:
+        *val = LSM6DSO_LC_CLEAR_DONE;
+        break;
+
+      default:
+        *val = LSM6DSO_LC_NORMAL;
+        break;
+    }
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM output registers[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      struct of registers from FSM_OUTS1 to FSM_OUTS16
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_out_get(stmdev_ctx_t *ctx, lsm6dso_fsm_out_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_OUTS1, (uint8_t *)val, 16);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Finite State Machine ODR configuration.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fsm_odr in reg EMB_FUNC_ODR_CFG_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_fsm_odr_t val)
+{
+  lsm6dso_emb_func_odr_cfg_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
+                           (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.not_used_01 = 3; /* set default values */
+    reg.not_used_02 = 2; /* set default values */
+    reg.fsm_odr = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
+                            (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Finite State Machine ODR configuration.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of fsm_odr in reg EMB_FUNC_ODR_CFG_B
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_data_rate_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_fsm_odr_t *val)
+{
+  lsm6dso_emb_func_odr_cfg_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
+                           (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.fsm_odr)
+    {
+      case LSM6DSO_ODR_FSM_12Hz5:
+        *val = LSM6DSO_ODR_FSM_12Hz5;
+        break;
+
+      case LSM6DSO_ODR_FSM_26Hz:
+        *val = LSM6DSO_ODR_FSM_26Hz;
+        break;
+
+      case LSM6DSO_ODR_FSM_52Hz:
+        *val = LSM6DSO_ODR_FSM_52Hz;
+        break;
+
+      case LSM6DSO_ODR_FSM_104Hz:
+        *val = LSM6DSO_ODR_FSM_104Hz;
+        break;
+
+      default:
+        *val = LSM6DSO_ODR_FSM_12Hz5;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM initialization request.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fsm_init in reg FSM_INIT
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_emb_func_init_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.fsm_init = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM initialization request.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of fsm_init in reg FSM_INIT
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_emb_func_init_b_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.fsm_init;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM long counter timeout register (r/w). The long counter
+  *         timeout value is an unsigned integer value (16-bit format).
+  *         When the long counter value reached this value,
+  *         the FSM generates an interrupt.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      the value of long counter
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_cnt_int_value_set(stmdev_ctx_t *ctx,
+                                       uint16_t val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  buff[1] = (uint8_t)(val / 256U);
+  buff[0] = (uint8_t)(val - (buff[1] * 256U));
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L,
+                                 &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H,
+                                   &buff[1]);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM long counter timeout register (r/w). The long counter
+  *         timeout value is an unsigned integer value (16-bit format).
+  *         When the long counter value reached this value,
+  *         the FSM generates an interrupt.[get]
+  *
+  * @param  ctx     read / write interface definitions
+  * @param  val     buffer that stores the value of long counter
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_long_cnt_int_value_get(stmdev_ctx_t *ctx,
+                                       uint16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L,
+                                &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H,
+                                  &buff[1]);
+    *val = buff[1];
+    *val = (*val * 256U) +  buff[0];
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM number of programs register.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      value to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_number_of_programs_set(stmdev_ctx_t *ctx,
+                                           uint8_t val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_PROGRAMS, &val);
+
+  return ret;
+}
+
+/**
+  * @brief  FSM number of programs register.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      buffer that stores data read.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_number_of_programs_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_PROGRAMS, val);
+
+  return ret;
+}
+
+/**
+  * @brief  FSM start address register (r/w).
+  *         First available address is 0x033C.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      the value of start address
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_start_address_set(stmdev_ctx_t *ctx, uint16_t val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  buff[1] = (uint8_t)(val / 256U);
+  buff[0] = (uint8_t)(val - (buff[1] * 256U));
+  ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_L,
+                                 &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_H,
+                                   &buff[1]);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  FSM start address register (r/w).
+  *         First available address is 0x033C.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      buffer the value of start address.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
+                                      uint16_t *val)
+{
+  uint8_t buff[2];
+  int32_t ret;
+
+  ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_L, &buff[0]);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_H, &buff[1]);
+    *val = buff[1];
+    *val = (*val * 256U) +  buff[0];
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  LSM6DSO_Sensor_hub
+  * @brief     This section groups all the functions that manage the
+  *            sensor hub.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Sensor hub output registers.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      values read from registers SENSOR_HUB_1 to SENSOR_HUB_18
+  * @param  len      number of consecutive register to read (max 18)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_read_data_raw_get(stmdev_ctx_t *ctx, uint8_t *val,
+                                     uint8_t len)
+{
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SENSOR_HUB_1, (uint8_t *) val,
+                           len);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Number of external sensors to be read by the sensor hub.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of aux_sens_on in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_slave_connected_set(stmdev_ctx_t *ctx,
+                                       lsm6dso_aux_sens_on_t val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.aux_sens_on = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Number of external sensors to be read by the sensor hub.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of aux_sens_on in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
+                                       lsm6dso_aux_sens_on_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.aux_sens_on)
+    {
+      case LSM6DSO_SLV_0:
+        *val = LSM6DSO_SLV_0;
+        break;
+
+      case LSM6DSO_SLV_0_1:
+        *val = LSM6DSO_SLV_0_1;
+        break;
+
+      case LSM6DSO_SLV_0_1_2:
+        *val = LSM6DSO_SLV_0_1_2;
+        break;
+
+      case LSM6DSO_SLV_0_1_2_3:
+        *val = LSM6DSO_SLV_0_1_2_3;
+        break;
+
+      default:
+        *val = LSM6DSO_SLV_0;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub I2C master enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of master_on in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_master_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.master_on = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub I2C master enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of master_on in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.master_on;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Master I2C pull-up enable.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of shub_pu_en in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_pin_mode_set(stmdev_ctx_t *ctx,
+                                lsm6dso_shub_pu_en_t val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.shub_pu_en = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Master I2C pull-up enable.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of shub_pu_en in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx,
+                                lsm6dso_shub_pu_en_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.shub_pu_en)
+    {
+      case LSM6DSO_EXT_PULL_UP:
+        *val = LSM6DSO_EXT_PULL_UP;
+        break;
+
+      case LSM6DSO_INTERNAL_PULL_UP:
+        *val = LSM6DSO_INTERNAL_PULL_UP;
+        break;
+
+      default:
+        *val = LSM6DSO_EXT_PULL_UP;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  I2C interface pass-through.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of pass_through_mode in
+  *                  reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.pass_through_mode = val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  I2C interface pass-through.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of pass_through_mode in
+  *                  reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.pass_through_mode;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub trigger signal selection.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of start_config in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_start_config_t val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.start_config = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub trigger signal selection.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of start_config in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_start_config_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.start_config)
+    {
+      case LSM6DSO_EXT_ON_INT2_PIN:
+        *val = LSM6DSO_EXT_ON_INT2_PIN;
+        break;
+
+      case LSM6DSO_XL_GY_DRDY:
+        *val = LSM6DSO_XL_GY_DRDY;
+        break;
+
+      default:
+        *val = LSM6DSO_EXT_ON_INT2_PIN;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Slave 0 write operation is performed only at the first
+  *         sensor hub cycle.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of write_once in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_write_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_write_once_t val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.write_once = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Slave 0 write operation is performed only at the first sensor
+  *         hub cycle.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of write_once in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_write_once_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.write_once)
+    {
+      case LSM6DSO_EACH_SH_CYCLE:
+        *val = LSM6DSO_EACH_SH_CYCLE;
+        break;
+
+      case LSM6DSO_ONLY_FIRST_CYCLE:
+        *val = LSM6DSO_ONLY_FIRST_CYCLE;
+        break;
+
+      default:
+        *val = LSM6DSO_EACH_SH_CYCLE;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Reset Master logic and output registers.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_reset_set(stmdev_ctx_t *ctx)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.rst_master_regs = PROPERTY_ENABLE;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.rst_master_regs = PROPERTY_DISABLE;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Reset Master logic and output registers.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of rst_master_regs in reg MASTER_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
+{
+  lsm6dso_master_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    *val = reg.rst_master_regs;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Rate at which the master communicates.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of shub_odr in reg slv1_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_shub_odr_t val)
+{
+  lsm6dso_slv0_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    reg.shub_odr = (uint8_t)val;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Rate at which the master communicates.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Get the values of shub_odr in reg slv1_CONFIG
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_shub_odr_t *val)
+{
+  lsm6dso_slv0_config_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    switch (reg.shub_odr)
+    {
+      case LSM6DSO_SH_ODR_104Hz:
+        *val = LSM6DSO_SH_ODR_104Hz;
+        break;
+
+      case LSM6DSO_SH_ODR_52Hz:
+        *val = LSM6DSO_SH_ODR_52Hz;
+        break;
+
+      case LSM6DSO_SH_ODR_26Hz:
+        *val = LSM6DSO_SH_ODR_26Hz;
+        break;
+
+      case LSM6DSO_SH_ODR_13Hz:
+        *val = LSM6DSO_SH_ODR_13Hz;
+        break;
+
+      default:
+        *val = LSM6DSO_SH_ODR_104Hz;
+        break;
+    }
+
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 0 for perform a write.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      a structure that contain
+  *                      - uint8_t slv1_add;    8 bit i2c device address
+  *                      - uint8_t slv1_subadd; 8 bit register device address
+  *                      - uint8_t slv1_data;   8 bit data to write
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx,
+                             lsm6dso_sh_cfg_write_t *val)
+{
+  lsm6dso_slv0_add_t reg;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    reg.slave0 = val->slv0_add;
+    reg.rw_0 = 0;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)&reg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
+                            &(val->slv0_subadd), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_DATAWRITE_SLV0,
+                            &(val->slv0_data), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 0 for perform a read.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Structure that contain
+  *                      - uint8_t slv1_add;    8 bit i2c device address
+  *                      - uint8_t slv1_subadd; 8 bit register device address
+  *                      - uint8_t slv1_len;    num of bit to read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val)
+{
+  lsm6dso_slv0_add_t slv0_add;
+  lsm6dso_slv0_config_t slv0_config;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    slv0_add.slave0 = val->slv_add;
+    slv0_add.rw_0 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)&slv0_add, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
+                            &(val->slv_subadd), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG,
+                           (uint8_t *)&slv0_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    slv0_config.slave0_numop = val->slv_len;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG,
+                            (uint8_t *)&slv0_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 0 for perform a write/read.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Structure that contain
+  *                      - uint8_t slv1_add;    8 bit i2c device address
+  *                      - uint8_t slv1_subadd; 8 bit register device address
+  *                      - uint8_t slv1_len;    num of bit to read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val)
+{
+  lsm6dso_slv1_add_t slv1_add;
+  lsm6dso_slv1_config_t slv1_config;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    slv1_add.slave1_add = val->slv_add;
+    slv1_add.r_1 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_ADD, (uint8_t *)&slv1_add, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_SUBADD,
+                            &(val->slv_subadd), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG,
+                           (uint8_t *)&slv1_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    slv1_config.slave1_numop = val->slv_len;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG,
+                            (uint8_t *)&slv1_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure slave 0 for perform a write/read.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Structure that contain
+  *                      - uint8_t slv2_add;    8 bit i2c device address
+  *                      - uint8_t slv2_subadd; 8 bit register device address
+  *                      - uint8_t slv2_len;    num of bit to read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val)
+{
+  lsm6dso_slv2_add_t slv2_add;
+  lsm6dso_slv2_config_t slv2_config;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    slv2_add.slave2_add = val->slv_add;
+    slv2_add.r_2 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_ADD, (uint8_t *)&slv2_add, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_SUBADD,
+                            &(val->slv_subadd), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG,
+                           (uint8_t *)&slv2_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    slv2_config.slave2_numop = val->slv_len;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG,
+                            (uint8_t *)&slv2_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief Configure slave 0 for perform a write/read.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      Structure that contain
+  *                      - uint8_t slv3_add;    8 bit i2c device address
+  *                      - uint8_t slv3_subadd; 8 bit register device address
+  *                      - uint8_t slv3_len;    num of bit to read
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val)
+{
+  lsm6dso_slv3_add_t slv3_add;
+  lsm6dso_slv3_config_t slv3_config;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    slv3_add.slave3_add = val->slv_add;
+    slv3_add.r_3 = 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_ADD, (uint8_t *)&slv3_add, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_SUBADD,
+                            &(val->slv_subadd), 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG,
+                           (uint8_t *)&slv3_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    slv3_config.slave3_numop = val->slv_len;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG,
+                            (uint8_t *)&slv3_config, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor hub source register.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      union of registers from STATUS_MASTER to
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_sh_status_get(stmdev_ctx_t *ctx,
+                              lsm6dso_status_master_t *val)
+{
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER, (uint8_t *) val, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @defgroup  Basic configuration
+  * @brief     This section groups all the functions concerning
+  *            device basic configuration.
+  * @{
+  *
+  */
+
+/**
+  * @brief  Device "Who am I".[get]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          ID values read from the two interfaces. ID values
+  *                      will be the same.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_id_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                       lsm6dso_id_t *val)
+{
+  int32_t ret = 0;
+
+  if (ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I,
+                           (uint8_t *) & (val->ui), 1);
+  }
+
+  if (aux_ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_WHO_AM_I,
+                             (uint8_t *) & (val->aux), 1);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Re-initialize the device.[set]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          re-initialization mode. Refer to datasheet
+  *                      and application note for more information
+  *                      about differencies between boot and sw_reset
+  *                      procedure.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_init_set(stmdev_ctx_t *ctx, lsm6dso_init_t val)
+{
+  lsm6dso_emb_func_init_a_t emb_func_init_a;
+  lsm6dso_emb_func_init_b_t emb_func_init_b;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B,
+                           (uint8_t *)&emb_func_init_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    emb_func_init_b.fifo_compr_init = (uint8_t)val
+                                      & ((uint8_t)LSM6DSO_FIFO_COMP >> 2);
+    emb_func_init_b.fsm_init = (uint8_t)val
+                               & ((uint8_t)LSM6DSO_FSM >> 3);
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B,
+                            (uint8_t *)&emb_func_init_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_A,
+                           (uint8_t *)&emb_func_init_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    emb_func_init_a.step_det_init = ((uint8_t)val
+                                     & (uint8_t)LSM6DSO_PEDO) >> 5;
+    emb_func_init_a.tilt_init = ((uint8_t)val
+                                 & (uint8_t)LSM6DSO_TILT) >> 6;
+    emb_func_init_a.sig_mot_init = ((uint8_t)val
+                                    & (uint8_t)LSM6DSO_SMOTION) >> 7;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_A,
+                            (uint8_t *)&emb_func_init_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  if (((val == LSM6DSO_BOOT) || (val == LSM6DSO_RESET)) &&
+      (ret == 0))
+  {
+    ctrl3_c.boot = (uint8_t)val & (uint8_t)LSM6DSO_BOOT;
+    ctrl3_c.sw_reset = ((uint8_t)val & (uint8_t)LSM6DSO_RESET) >> 1;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  if ((val == LSM6DSO_DRV_RDY)
+      && ((ctrl3_c.bdu == PROPERTY_DISABLE)
+          || (ctrl3_c.if_inc == PROPERTY_DISABLE)) && (ret == 0))
+  {
+    ctrl3_c.bdu = PROPERTY_ENABLE;
+    ctrl3_c.if_inc = PROPERTY_ENABLE;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configures the bus operating mode.[set]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          configures the bus operating mode for both the
+  *                      main and the auxiliary interface.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_bus_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                             lsm6dso_bus_mode_t val)
+{
+  lsm6dso_ctrl1_ois_t ctrl1_ois;
+  lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+  lsm6dso_ctrl9_xl_t ctrl9_xl;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  lsm6dso_ctrl4_c_t ctrl4_c;
+  uint8_t bit_val;
+  int32_t ret;
+
+  ret = 0;
+
+  if (aux_ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
+                           (uint8_t *)&ctrl1_ois, 1);
+    bit_val = ((uint8_t)val.aux_bus_md & 0x04U) >> 2;
+
+    if ((ret == 0) && (ctrl1_ois.sim_ois != bit_val))
+    {
+      ctrl1_ois.sim_ois = bit_val;
+      ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
+                              (uint8_t *)&ctrl1_ois, 1);
+    }
+  }
+
+  if (ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+    }
+
+    bit_val = ((uint8_t)val.ui_bus_md & 0x04U) >> 2;
+
+    if ((ret == 0) && (ctrl9_xl.i3c_disable != bit_val))
+    {
+      ctrl9_xl.i3c_disable = bit_val;
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL,
+                              (uint8_t *)&ctrl9_xl, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                             (uint8_t *)&i3c_bus_avb, 1);
+    }
+
+    bit_val = ((uint8_t)val.ui_bus_md & 0x30U) >> 4;
+
+    if ((ret == 0) && (i3c_bus_avb.i3c_bus_avb_sel != bit_val))
+    {
+      i3c_bus_avb.i3c_bus_avb_sel = bit_val;
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                              (uint8_t *)&i3c_bus_avb, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+    }
+
+    bit_val = ((uint8_t)val.ui_bus_md & 0x02U) >> 1;
+
+    if ((ret == 0) && (ctrl4_c.i2c_disable != bit_val))
+    {
+      ctrl4_c.i2c_disable = bit_val;
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C,
+                              (uint8_t *)&ctrl4_c, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+    }
+
+    bit_val = (uint8_t)val.ui_bus_md & 0x01U;
+
+    if ((ret == 0) && (ctrl3_c.sim != bit_val))
+    {
+      ctrl3_c.sim = bit_val;
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C,
+                              (uint8_t *)&ctrl3_c, 1);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the bus operating mode.[get]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          retrieves the bus operating mode for both the main
+  *                      and the auxiliary interface.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                             lsm6dso_bus_mode_t *val)
+{
+  lsm6dso_ctrl1_ois_t ctrl1_ois;
+  lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+  lsm6dso_ctrl9_xl_t ctrl9_xl;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  lsm6dso_ctrl4_c_t ctrl4_c;
+  int32_t ret = 0;
+
+  if (aux_ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
+                           (uint8_t *)&ctrl1_ois, 1);
+
+    switch (ctrl1_ois.sim_ois)
+    {
+      case LSM6DSO_SPI_4W_AUX:
+        val->aux_bus_md = LSM6DSO_SPI_4W_AUX;
+        break;
+
+      case LSM6DSO_SPI_3W_AUX:
+        val->aux_bus_md = LSM6DSO_SPI_3W_AUX;
+        break;
+
+      default:
+        val->aux_bus_md = LSM6DSO_SPI_4W_AUX;
+        break;
+    }
+  }
+
+  if (ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL,
+                             (uint8_t *)&ctrl9_xl, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                             (uint8_t *)&i3c_bus_avb, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C,
+                             (uint8_t *)&ctrl4_c, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C,
+                             (uint8_t *)&ctrl3_c, 1);
+
+      switch ((i3c_bus_avb.i3c_bus_avb_sel << 4) &
+              (ctrl9_xl.i3c_disable << 2) &
+              (ctrl4_c.i2c_disable << 1) & ctrl3_c.sim)
+      {
+        case LSM6DSO_SEL_BY_HW:
+          val->ui_bus_md = LSM6DSO_SEL_BY_HW;
+          break;
+
+        case LSM6DSO_SPI_4W:
+          val->ui_bus_md = LSM6DSO_SPI_4W;
+          break;
+
+        case LSM6DSO_SPI_3W:
+          val->ui_bus_md = LSM6DSO_SPI_3W;
+          break;
+
+        case LSM6DSO_I2C:
+          val->ui_bus_md = LSM6DSO_I2C;
+          break;
+
+        case LSM6DSO_I3C_T_50us:
+          val->ui_bus_md = LSM6DSO_I3C_T_50us;
+          break;
+
+        case LSM6DSO_I3C_T_2us:
+          val->ui_bus_md = LSM6DSO_I3C_T_2us;
+          break;
+
+        case LSM6DSO_I3C_T_1ms:
+          val->ui_bus_md = LSM6DSO_I3C_T_1ms;
+          break;
+
+        case LSM6DSO_I3C_T_25ms:
+          val->ui_bus_md = LSM6DSO_I3C_T_25ms;
+          break;
+
+        default:
+          val->ui_bus_md = LSM6DSO_SEL_BY_HW;
+          break;
+      }
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the status of the device.[get]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          the status of the device.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                           lsm6dso_status_t *val)
+{
+  lsm6dso_status_spiaux_t       status_spiaux;
+  lsm6dso_status_reg_t          status_reg;
+  lsm6dso_ctrl3_c_t             ctrl3_c;
+  int32_t                       ret;
+  ret = 0;
+
+  if (aux_ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_STATUS_SPIAUX,
+                           (uint8_t *)&status_spiaux, 1);
+    val->ois_drdy_xl        = status_spiaux.xlda;
+    val->ois_drdy_g         = status_spiaux.gda;
+    val->ois_gyro_settling  = status_spiaux.gyro_settling;
+  }
+
+  if (ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+    val->sw_reset = ctrl3_c.sw_reset;
+    val->boot = ctrl3_c.boot;
+
+    if ((ret == 0) && (ctrl3_c.sw_reset == PROPERTY_DISABLE) &&
+        (ctrl3_c.boot == PROPERTY_DISABLE))
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG,
+                             (uint8_t *)&status_reg, 1);
+      val->drdy_xl   = status_reg.xlda;
+      val->drdy_g    = status_reg.gda;
+      val->drdy_temp = status_reg.tda;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Electrical pin configuration.[set]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the electrical settings for the configurable
+  *                      pins.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_conf_set(stmdev_ctx_t *ctx,
+                             lsm6dso_pin_conf_t val)
+{
+  lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+  lsm6dso_pin_ctrl_t pin_ctrl;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
+
+  if (ret == 0)
+  {
+    pin_ctrl.ois_pu_dis = ~val.aux_sdo_ocs_pull_up;
+    pin_ctrl.sdo_pu_en  = val.sdo_sa0_pull_up;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ctrl3_c.pp_od = ~val.int1_int2_push_pull;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                           (uint8_t *)&i3c_bus_avb, 1);
+  }
+
+  if (ret == 0)
+  {
+    i3c_bus_avb.pd_dis_int1 = ~val.int1_pull_down;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                            (uint8_t *)&i3c_bus_avb, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Electrical pin configuration.[get]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the electrical settings for the configurable
+  *                      pins.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_conf_get(stmdev_ctx_t *ctx,
+                             lsm6dso_pin_conf_t *val)
+{
+  lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+  lsm6dso_pin_ctrl_t pin_ctrl;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)&pin_ctrl, 1);
+
+  if (ret == 0)
+  {
+    val->aux_sdo_ocs_pull_up = ~pin_ctrl.ois_pu_dis;
+    val->aux_sdo_ocs_pull_up =  pin_ctrl.sdo_pu_en;
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    val->int1_int2_push_pull = ~ctrl3_c.pp_od;
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+                           (uint8_t *)&i3c_bus_avb, 1);
+  }
+
+  if (ret == 0)
+  {
+    val->int1_pull_down = ~i3c_bus_avb.pd_dis_int1;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt pins hardware signal configuration.[set]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the pins hardware signal settings.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_interrupt_mode_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_int_mode_t val)
+{
+  lsm6dso_tap_cfg0_t tap_cfg0;
+  lsm6dso_page_rw_t page_rw;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.h_lactive = val.active_low;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
+  }
+
+  if (ret == 0)
+  {
+    tap_cfg0.lir = val.base_latched;
+    tap_cfg0.int_clr_on_read = val.base_latched | val.emb_latched;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.emb_func_lir = val.emb_latched;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Interrupt pins hardware signal configuration.[get]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the pins hardware signal settings.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_interrupt_mode_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_int_mode_t *val)
+{
+  lsm6dso_tap_cfg0_t tap_cfg0;
+  lsm6dso_page_rw_t page_rw;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  int32_t ret;
+
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)&ctrl3_c, 1);
+
+  if (ret == 0)
+  {
+    ctrl3_c.h_lactive = val->active_low;
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
+  }
+
+  if (ret == 0)
+  {
+    tap_cfg0.lir = val->base_latched;
+    tap_cfg0.int_clr_on_read = val->base_latched | val->emb_latched;
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    page_rw.emb_func_lir = val->emb_latched;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Route interrupt signals on int1 pin.[set]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the signals to route on int1 pin.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_pin_int1_route_t val)
+{
+  lsm6dso_pin_int2_route_t  pin_int2_route;
+  lsm6dso_emb_func_int1_t   emb_func_int1;
+  lsm6dso_fsm_int1_a_t      fsm_int1_a;
+  lsm6dso_fsm_int1_b_t      fsm_int1_b;
+  lsm6dso_int1_ctrl_t       int1_ctrl;
+  lsm6dso_int2_ctrl_t       int2_ctrl;
+  lsm6dso_tap_cfg2_t        tap_cfg2;
+  lsm6dso_md2_cfg_t         md2_cfg;
+  lsm6dso_md1_cfg_t         md1_cfg;
+  lsm6dso_ctrl4_c_t         ctrl4_c;
+  int32_t                    ret;
+  int1_ctrl.int1_drdy_xl   = val.drdy_xl;
+  int1_ctrl.int1_drdy_g    = val.drdy_g;
+  int1_ctrl.int1_boot      = val.boot;
+  int1_ctrl.int1_fifo_th   = val.fifo_th;
+  int1_ctrl.int1_fifo_ovr  = val.fifo_ovr;
+  int1_ctrl.int1_fifo_full = val.fifo_full;
+  int1_ctrl.int1_cnt_bdr   = val.fifo_bdr;
+  int1_ctrl.den_drdy_flag  = val.den_flag;
+  md1_cfg.int1_shub         = val.sh_endop;
+  md1_cfg.int1_6d           = val.six_d;
+  md1_cfg.int1_double_tap   = val.double_tap;
+  md1_cfg.int1_ff           = val.free_fall;
+  md1_cfg.int1_wu           = val.wake_up;
+  md1_cfg.int1_single_tap   = val.single_tap;
+  md1_cfg.int1_sleep_change = val.sleep_change;
+  emb_func_int1.not_used_01 = 0;
+  emb_func_int1.int1_step_detector = val.step_detector;
+  emb_func_int1.int1_tilt          = val.tilt;
+  emb_func_int1.int1_sig_mot       = val.sig_mot;
+  emb_func_int1.not_used_02 = 0;
+  emb_func_int1.int1_fsm_lc        = val.fsm_lc;
+  fsm_int1_a.int1_fsm1 = val.fsm1;
+  fsm_int1_a.int1_fsm2 = val.fsm2;
+  fsm_int1_a.int1_fsm3 = val.fsm3;
+  fsm_int1_a.int1_fsm4 = val.fsm4;
+  fsm_int1_a.int1_fsm5 = val.fsm5;
+  fsm_int1_a.int1_fsm6 = val.fsm6;
+  fsm_int1_a.int1_fsm7 = val.fsm7;
+  fsm_int1_a.int1_fsm8 = val.fsm8;
+  fsm_int1_b.int1_fsm9  = val.fsm9 ;
+  fsm_int1_b.int1_fsm10 = val.fsm10;
+  fsm_int1_b.int1_fsm11 = val.fsm11;
+  fsm_int1_b.int1_fsm12 = val.fsm12;
+  fsm_int1_b.int1_fsm13 = val.fsm13;
+  fsm_int1_b.int1_fsm14 = val.fsm14;
+  fsm_int1_b.int1_fsm15 = val.fsm15;
+  fsm_int1_b.int1_fsm16 = val.fsm16;
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
+
+  if (ret == 0)
+  {
+    if ((val.drdy_temp | val.timestamp) != PROPERTY_DISABLE)
+    {
+      ctrl4_c.int2_on_int1 = PROPERTY_ENABLE;
+    }
+
+    else
+    {
+      ctrl4_c.int2_on_int1 = PROPERTY_DISABLE;
+    }
+
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
+                            (uint8_t *)&emb_func_int1, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_A,
+                            (uint8_t *)&fsm_int1_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_B,
+                            (uint8_t *)&fsm_int1_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  if (ret == 0)
+  {
+    if ((emb_func_int1.int1_fsm_lc
+         | emb_func_int1.int1_sig_mot
+         | emb_func_int1.int1_step_detector
+         | emb_func_int1.int1_tilt
+         | fsm_int1_a.int1_fsm1
+         | fsm_int1_a.int1_fsm2
+         | fsm_int1_a.int1_fsm3
+         | fsm_int1_a.int1_fsm4
+         | fsm_int1_a.int1_fsm5
+         | fsm_int1_a.int1_fsm6
+         | fsm_int1_a.int1_fsm7
+         | fsm_int1_a.int1_fsm8
+         | fsm_int1_b.int1_fsm9
+         | fsm_int1_b.int1_fsm10
+         | fsm_int1_b.int1_fsm11
+         | fsm_int1_b.int1_fsm12
+         | fsm_int1_b.int1_fsm13
+         | fsm_int1_b.int1_fsm14
+         | fsm_int1_b.int1_fsm15
+         | fsm_int1_b.int1_fsm16) != PROPERTY_DISABLE)
+    {
+      md1_cfg.int1_emb_func = PROPERTY_ENABLE;
+    }
+
+    else
+    {
+      md1_cfg.int1_emb_func = PROPERTY_DISABLE;
+    }
+
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT1_CTRL,
+                            (uint8_t *)&int1_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t *)&md1_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    int2_ctrl.int2_drdy_temp = val.drdy_temp;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    md2_cfg.int2_timestamp = val.timestamp;
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_pin_int2_route_get(ctx, NULL, &pin_int2_route);
+  }
+
+  if (ret == 0)
+  {
+    if ((pin_int2_route.fifo_bdr
+         | pin_int2_route.drdy_g
+         | pin_int2_route.drdy_temp
+         | pin_int2_route.drdy_xl
+         | pin_int2_route.fifo_full
+         | pin_int2_route.fifo_ovr
+         | pin_int2_route.fifo_th
+         | pin_int2_route.six_d
+         | pin_int2_route.double_tap
+         | pin_int2_route.free_fall
+         | pin_int2_route.wake_up
+         | pin_int2_route.single_tap
+         | pin_int2_route.sleep_change
+         | int1_ctrl.den_drdy_flag
+         | int1_ctrl.int1_boot
+         | int1_ctrl.int1_cnt_bdr
+         | int1_ctrl.int1_drdy_g
+         | int1_ctrl.int1_drdy_xl
+         | int1_ctrl.int1_fifo_full
+         | int1_ctrl.int1_fifo_ovr
+         | int1_ctrl.int1_fifo_th
+         | md1_cfg.int1_shub
+         | md1_cfg.int1_6d
+         | md1_cfg.int1_double_tap
+         | md1_cfg.int1_ff
+         | md1_cfg.int1_wu
+         | md1_cfg.int1_single_tap
+         | md1_cfg.int1_sleep_change) != PROPERTY_DISABLE)
+    {
+      tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
+    }
+
+    else
+    {
+      tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
+    }
+
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Route interrupt signals on int1 pin.[get]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the signals that are routed on int1 pin.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_pin_int1_route_t *val)
+{
+  lsm6dso_emb_func_int1_t   emb_func_int1;
+  lsm6dso_fsm_int1_a_t      fsm_int1_a;
+  lsm6dso_fsm_int1_b_t      fsm_int1_b;
+  lsm6dso_int1_ctrl_t       int1_ctrl;
+  lsm6dso_int2_ctrl_t       int2_ctrl;
+  lsm6dso_md2_cfg_t         md2_cfg;
+  lsm6dso_md1_cfg_t         md1_cfg;
+  lsm6dso_ctrl4_c_t         ctrl4_c;
+  int32_t                    ret;
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
+                           (uint8_t *)&emb_func_int1, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_A,
+                           (uint8_t *)&fsm_int1_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_B,
+                           (uint8_t *)&fsm_int1_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_INT1_CTRL,
+                           (uint8_t *)&int1_ctrl, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t *)&md1_cfg, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
+  }
+
+  if (ctrl4_c.int2_on_int1 == PROPERTY_ENABLE)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
+      val->drdy_temp = int2_ctrl.int2_drdy_temp;
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
+      val->timestamp = md2_cfg.int2_timestamp;
+    }
+  }
+
+  else
+  {
+    val->drdy_temp = PROPERTY_DISABLE;
+    val->timestamp = PROPERTY_DISABLE;
+  }
+
+  val->drdy_xl   = int1_ctrl.int1_drdy_xl;
+  val->drdy_g    = int1_ctrl.int1_drdy_g;
+  val->boot      = int1_ctrl.int1_boot;
+  val->fifo_th   = int1_ctrl.int1_fifo_th;
+  val->fifo_ovr  = int1_ctrl.int1_fifo_ovr;
+  val->fifo_full = int1_ctrl.int1_fifo_full;
+  val->fifo_bdr  = int1_ctrl.int1_cnt_bdr;
+  val->den_flag  = int1_ctrl.den_drdy_flag;
+  val->sh_endop     = md1_cfg.int1_shub;
+  val->six_d        = md1_cfg.int1_6d;
+  val->double_tap   = md1_cfg.int1_double_tap;
+  val->free_fall    = md1_cfg.int1_ff;
+  val->wake_up      = md1_cfg.int1_wu;
+  val->single_tap   = md1_cfg.int1_single_tap;
+  val->sleep_change = md1_cfg.int1_sleep_change;
+  val->step_detector = emb_func_int1.int1_step_detector;
+  val->tilt          = emb_func_int1.int1_tilt;
+  val->sig_mot       = emb_func_int1.int1_sig_mot;
+  val->fsm_lc        = emb_func_int1.int1_fsm_lc;
+  val->fsm1 = fsm_int1_a.int1_fsm1;
+  val->fsm2 = fsm_int1_a.int1_fsm2;
+  val->fsm3 = fsm_int1_a.int1_fsm3;
+  val->fsm4 = fsm_int1_a.int1_fsm4;
+  val->fsm5 = fsm_int1_a.int1_fsm5;
+  val->fsm6 = fsm_int1_a.int1_fsm6;
+  val->fsm7 = fsm_int1_a.int1_fsm7;
+  val->fsm8 = fsm_int1_a.int1_fsm8;
+  val->fsm9  = fsm_int1_b.int1_fsm9;
+  val->fsm10 = fsm_int1_b.int1_fsm10;
+  val->fsm11 = fsm_int1_b.int1_fsm11;
+  val->fsm12 = fsm_int1_b.int1_fsm12;
+  val->fsm13 = fsm_int1_b.int1_fsm13;
+  val->fsm14 = fsm_int1_b.int1_fsm14;
+  val->fsm15 = fsm_int1_b.int1_fsm15;
+  val->fsm16 = fsm_int1_b.int1_fsm16;
+
+  return ret;
+}
+
+/**
+  * @brief  Route interrupt signals on int2 pin.[set]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          the signals to route on int2 pin.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
+                                   stmdev_ctx_t *aux_ctx,
+                                   lsm6dso_pin_int2_route_t val)
+{
+  lsm6dso_pin_int1_route_t pin_int1_route;
+  lsm6dso_emb_func_int2_t  emb_func_int2;
+  lsm6dso_fsm_int2_a_t     fsm_int2_a;
+  lsm6dso_fsm_int2_b_t     fsm_int2_b;
+  lsm6dso_int2_ctrl_t      int2_ctrl;
+  lsm6dso_tap_cfg2_t       tap_cfg2;
+  lsm6dso_md2_cfg_t        md2_cfg;
+  lsm6dso_ctrl4_c_t        ctrl4_c;
+  lsm6dso_int_ois_t        int_ois;
+  int32_t                  ret;
+  ret = 0;
+
+  if (aux_ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_INT_OIS,
+                           (uint8_t *)&int_ois, 1);
+
+    if (ret == 0)
+    {
+      int_ois.int2_drdy_ois = val.drdy_ois;
+      ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_INT_OIS,
+                              (uint8_t *)&int_ois, 1);
+    }
+  }
+
+  if (ctx != NULL)
+  {
+    int2_ctrl.int2_drdy_xl   = val.drdy_xl;
+    int2_ctrl.int2_drdy_g    = val.drdy_g;
+    int2_ctrl.int2_drdy_temp = val.drdy_temp;
+    int2_ctrl.int2_fifo_th   = val.fifo_th;
+    int2_ctrl.int2_fifo_ovr  = val.fifo_ovr;
+    int2_ctrl.int2_fifo_full = val.fifo_full;
+    int2_ctrl.int2_cnt_bdr   = val.fifo_bdr;
+    int2_ctrl.not_used_01    = 0;
+    md2_cfg.int2_timestamp    = val.timestamp;
+    md2_cfg.int2_6d           = val.six_d;
+    md2_cfg.int2_double_tap   = val.double_tap;
+    md2_cfg.int2_ff           = val.free_fall;
+    md2_cfg.int2_wu           = val.wake_up;
+    md2_cfg.int2_single_tap   = val.single_tap;
+    md2_cfg.int2_sleep_change = val.sleep_change;
+    emb_func_int2.not_used_01 = 0;
+    emb_func_int2. int2_step_detector = val.step_detector;
+    emb_func_int2.int2_tilt           = val.tilt;
+    emb_func_int2.int2_sig_mot        = val.sig_mot;
+    emb_func_int2.not_used_02 = 0;
+    emb_func_int2.int2_fsm_lc         = val.fsm_lc;
+    fsm_int2_a.int2_fsm1 = val.fsm1;
+    fsm_int2_a.int2_fsm2 = val.fsm2;
+    fsm_int2_a.int2_fsm3 = val.fsm3;
+    fsm_int2_a.int2_fsm4 = val.fsm4;
+    fsm_int2_a.int2_fsm5 = val.fsm5;
+    fsm_int2_a.int2_fsm6 = val.fsm6;
+    fsm_int2_a.int2_fsm7 = val.fsm7;
+    fsm_int2_a.int2_fsm8 = val.fsm8;
+    fsm_int2_b.int2_fsm9  = val.fsm9 ;
+    fsm_int2_b.int2_fsm10 = val.fsm10;
+    fsm_int2_b.int2_fsm11 = val.fsm11;
+    fsm_int2_b.int2_fsm12 = val.fsm12;
+    fsm_int2_b.int2_fsm13 = val.fsm13;
+    fsm_int2_b.int2_fsm14 = val.fsm14;
+    fsm_int2_b.int2_fsm15 = val.fsm15;
+    fsm_int2_b.int2_fsm16 = val.fsm16;
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
+
+      if (ret == 0)
+      {
+        if ((val.drdy_temp | val.timestamp) != PROPERTY_DISABLE)
+        {
+          ctrl4_c.int2_on_int1 = PROPERTY_DISABLE;
+        }
+
+        ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
+      }
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
+                              (uint8_t *)&emb_func_int2, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_A,
+                              (uint8_t *)&fsm_int2_a, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_B,
+                              (uint8_t *)&fsm_int2_b, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+    }
+
+    if (ret == 0)
+    {
+      if ((emb_func_int2.int2_fsm_lc
+           | emb_func_int2.int2_sig_mot
+           | emb_func_int2.int2_step_detector
+           | emb_func_int2.int2_tilt
+           | fsm_int2_a.int2_fsm1
+           | fsm_int2_a.int2_fsm2
+           | fsm_int2_a.int2_fsm3
+           | fsm_int2_a.int2_fsm4
+           | fsm_int2_a.int2_fsm5
+           | fsm_int2_a.int2_fsm6
+           | fsm_int2_a.int2_fsm7
+           | fsm_int2_a.int2_fsm8
+           | fsm_int2_b.int2_fsm9
+           | fsm_int2_b.int2_fsm10
+           | fsm_int2_b.int2_fsm11
+           | fsm_int2_b.int2_fsm12
+           | fsm_int2_b.int2_fsm13
+           | fsm_int2_b.int2_fsm14
+           | fsm_int2_b.int2_fsm15
+           | fsm_int2_b.int2_fsm16) != PROPERTY_DISABLE)
+      {
+        md2_cfg.int2_emb_func = PROPERTY_ENABLE;
+      }
+
+      else
+      {
+        md2_cfg.int2_emb_func = PROPERTY_DISABLE;
+      }
+
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL,
+                              (uint8_t *)&int2_ctrl, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_pin_int1_route_get(ctx, &pin_int1_route);
+    }
+
+    if (ret == 0)
+    {
+      if ((val.fifo_bdr
+           | val.drdy_g
+           | val.drdy_temp
+           | val.drdy_xl
+           | val.fifo_full
+           | val.fifo_ovr
+           | val.fifo_th
+           | val.six_d
+           | val.double_tap
+           | val.free_fall
+           | val.wake_up
+           | val.single_tap
+           | val.sleep_change
+           | pin_int1_route.den_flag
+           | pin_int1_route.boot
+           | pin_int1_route.fifo_bdr
+           | pin_int1_route.drdy_g
+           | pin_int1_route.drdy_xl
+           | pin_int1_route.fifo_full
+           | pin_int1_route.fifo_ovr
+           | pin_int1_route.fifo_th
+           | pin_int1_route.six_d
+           | pin_int1_route.double_tap
+           | pin_int1_route.free_fall
+           | pin_int1_route.wake_up
+           | pin_int1_route.single_tap
+           | pin_int1_route.sleep_change) != PROPERTY_DISABLE)
+      {
+        tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
+      }
+
+      else
+      {
+        tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
+      }
+
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Route interrupt signals on int2 pin.[get]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          the signals that are routed on int2 pin.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
+                                   stmdev_ctx_t *aux_ctx,
+                                   lsm6dso_pin_int2_route_t *val)
+{
+  lsm6dso_emb_func_int2_t  emb_func_int2;
+  lsm6dso_fsm_int2_a_t     fsm_int2_a;
+  lsm6dso_fsm_int2_b_t     fsm_int2_b;
+  lsm6dso_int2_ctrl_t      int2_ctrl;
+  lsm6dso_md2_cfg_t        md2_cfg;
+  lsm6dso_ctrl4_c_t        ctrl4_c;
+  lsm6dso_int_ois_t        int_ois;
+  int32_t                   ret;
+  ret = 0;
+
+  if (aux_ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_INT_OIS,
+                           (uint8_t *)&int_ois, 1);
+    val->drdy_ois = int_ois.int2_drdy_ois;
+  }
+
+  if (ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
+                             (uint8_t *)&emb_func_int2, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_A,
+                             (uint8_t *)&fsm_int2_a, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_B,
+                             (uint8_t *)&fsm_int2_b, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
+                             (uint8_t *)&int2_ctrl, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG,
+                             (uint8_t *)&md2_cfg, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)&ctrl4_c, 1);
+    }
+
+    if (ctrl4_c.int2_on_int1 == PROPERTY_DISABLE)
+    {
+      if (ret == 0)
+      {
+        ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
+                               (uint8_t *)&int2_ctrl, 1);
+        val->drdy_temp = int2_ctrl.int2_drdy_temp;
+      }
+
+      if (ret == 0)
+      {
+        ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&md2_cfg, 1);
+        val->timestamp = md2_cfg.int2_timestamp;
+      }
+    }
+
+    else
+    {
+      val->drdy_temp = PROPERTY_DISABLE;
+      val->timestamp = PROPERTY_DISABLE;
+    }
+
+    val->drdy_xl   = int2_ctrl.int2_drdy_xl;
+    val->drdy_g    = int2_ctrl.int2_drdy_g;
+    val->drdy_temp = int2_ctrl.int2_drdy_temp;
+    val->fifo_th   = int2_ctrl.int2_fifo_th;
+    val->fifo_ovr  = int2_ctrl.int2_fifo_ovr;
+    val->fifo_full = int2_ctrl.int2_fifo_full;
+    val->fifo_bdr   = int2_ctrl.int2_cnt_bdr;
+    val->timestamp    = md2_cfg.int2_timestamp;
+    val->six_d        = md2_cfg.int2_6d;
+    val->double_tap   = md2_cfg.int2_double_tap;
+    val->free_fall    = md2_cfg.int2_ff;
+    val->wake_up      = md2_cfg.int2_wu;
+    val->single_tap   = md2_cfg.int2_single_tap;
+    val->sleep_change = md2_cfg.int2_sleep_change;
+    val->step_detector = emb_func_int2. int2_step_detector;
+    val->tilt          = emb_func_int2.int2_tilt;
+    val->fsm_lc        = emb_func_int2.int2_fsm_lc;
+    val->fsm1 = fsm_int2_a.int2_fsm1;
+    val->fsm2 = fsm_int2_a.int2_fsm2;
+    val->fsm3 = fsm_int2_a.int2_fsm3;
+    val->fsm4 = fsm_int2_a.int2_fsm4;
+    val->fsm5 = fsm_int2_a.int2_fsm5;
+    val->fsm6 = fsm_int2_a.int2_fsm6;
+    val->fsm7 = fsm_int2_a.int2_fsm7;
+    val->fsm8 = fsm_int2_a.int2_fsm8;
+    val->fsm9  = fsm_int2_b.int2_fsm9;
+    val->fsm10 = fsm_int2_b.int2_fsm10;
+    val->fsm11 = fsm_int2_b.int2_fsm11;
+    val->fsm12 = fsm_int2_b.int2_fsm12;
+    val->fsm13 = fsm_int2_b.int2_fsm13;
+    val->fsm14 = fsm_int2_b.int2_fsm14;
+    val->fsm15 = fsm_int2_b.int2_fsm15;
+    val->fsm16 = fsm_int2_b.int2_fsm16;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get the status of all the interrupt sources.[get]
+  *
+  * @param  ctx          communication interface handler.(ptr)
+  * @param  val          the status of all the interrupt sources.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
+                                lsm6dso_all_sources_t *val)
+{
+  lsm6dso_emb_func_status_mainpage_t emb_func_status_mainpage;
+  lsm6dso_status_master_mainpage_t   status_master_mainpage;
+  lsm6dso_fsm_status_a_mainpage_t    fsm_status_a_mainpage;
+  lsm6dso_fsm_status_b_mainpage_t    fsm_status_b_mainpage;
+  lsm6dso_fifo_status1_t             fifo_status1;
+  lsm6dso_fifo_status2_t             fifo_status2;
+  lsm6dso_all_int_src_t              all_int_src;
+  lsm6dso_wake_up_src_t              wake_up_src;
+  lsm6dso_status_reg_t               status_reg;
+  lsm6dso_tap_src_t                  tap_src;
+  lsm6dso_d6d_src_t                  d6d_src;
+  uint8_t                            reg[5];
+  int32_t                            ret;
+  ret = lsm6dso_read_reg(ctx, LSM6DSO_ALL_INT_SRC, reg, 5);
+
+  if (ret == 0)
+  {
+    bytecpy((uint8_t *)&all_int_src, &reg[0]);
+    bytecpy((uint8_t *)&wake_up_src, &reg[1]);
+    bytecpy((uint8_t *)&tap_src, &reg[2]);
+    bytecpy((uint8_t *)&d6d_src, &reg[3]);
+    bytecpy((uint8_t *)&status_reg, &reg[4]);
+    val->timestamp = all_int_src.timestamp_endcount;
+    val->wake_up_z    = wake_up_src.z_wu;
+    val->wake_up_y    = wake_up_src.y_wu;
+    val->wake_up_x    = wake_up_src.x_wu;
+    val->wake_up      = wake_up_src.wu_ia;
+    val->sleep_state  = wake_up_src.sleep_state;
+    val->free_fall    = wake_up_src.ff_ia;
+    val->sleep_change = wake_up_src.sleep_change_ia;
+    val->tap_x      = tap_src.x_tap;
+    val->tap_y      = tap_src.y_tap;
+    val->tap_z      = tap_src.z_tap;
+    val->tap_sign   = tap_src.tap_sign;
+    val->double_tap = tap_src.double_tap;
+    val->single_tap = tap_src.single_tap;
+    val->six_d_xl = d6d_src.xl;
+    val->six_d_xh = d6d_src.xh;
+    val->six_d_yl = d6d_src.yl;
+    val->six_d_yh = d6d_src.yh;
+    val->six_d_zl = d6d_src.zl;
+    val->six_d_zh = d6d_src.zh;
+    val->six_d    = d6d_src.d6d_ia;
+    val->den_flag = d6d_src.den_drdy;
+    val->drdy_xl   = status_reg.xlda;
+    val->drdy_g    = status_reg.gda;
+    val->drdy_temp = status_reg.tda;
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS_MAINPAGE, reg, 3);
+  }
+
+  if (ret == 0)
+  {
+    bytecpy((uint8_t *)&emb_func_status_mainpage, &reg[0]);
+    bytecpy((uint8_t *)&fsm_status_a_mainpage, &reg[1]);
+    bytecpy((uint8_t *)&fsm_status_b_mainpage, &reg[2]);
+    val->step_detector = emb_func_status_mainpage.is_step_det;
+    val->tilt          = emb_func_status_mainpage.is_tilt;
+    val->sig_mot       = emb_func_status_mainpage.is_sigmot;
+    val->fsm_lc        = emb_func_status_mainpage.is_fsm_lc;
+    val->fsm1 = fsm_status_a_mainpage.is_fsm1;
+    val->fsm2 = fsm_status_a_mainpage.is_fsm2;
+    val->fsm3 = fsm_status_a_mainpage.is_fsm3;
+    val->fsm4 = fsm_status_a_mainpage.is_fsm4;
+    val->fsm5 = fsm_status_a_mainpage.is_fsm5;
+    val->fsm6 = fsm_status_a_mainpage.is_fsm6;
+    val->fsm7 = fsm_status_a_mainpage.is_fsm7;
+    val->fsm8 = fsm_status_a_mainpage.is_fsm8;
+    val->fsm9  = fsm_status_b_mainpage.is_fsm9;
+    val->fsm10 = fsm_status_b_mainpage.is_fsm10;
+    val->fsm11 = fsm_status_b_mainpage.is_fsm11;
+    val->fsm12 = fsm_status_b_mainpage.is_fsm12;
+    val->fsm13 = fsm_status_b_mainpage.is_fsm13;
+    val->fsm14 = fsm_status_b_mainpage.is_fsm14;
+    val->fsm15 = fsm_status_b_mainpage.is_fsm15;
+    val->fsm16 = fsm_status_b_mainpage.is_fsm16;
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER_MAINPAGE, reg, 3);
+  }
+
+  if (ret == 0)
+  {
+    bytecpy((uint8_t *)&status_master_mainpage, &reg[0]);
+    bytecpy((uint8_t *)&fifo_status1, &reg[1]);
+    bytecpy((uint8_t *)&fifo_status2, &reg[2]);
+    val->sh_endop       = status_master_mainpage.sens_hub_endop;
+    val->sh_slave0_nack = status_master_mainpage.slave0_nack;
+    val->sh_slave1_nack = status_master_mainpage.slave1_nack;
+    val->sh_slave2_nack = status_master_mainpage.slave2_nack;
+    val->sh_slave3_nack = status_master_mainpage.slave3_nack;
+    val->sh_wr_once     = status_master_mainpage.wr_once_done;
+    val->fifo_diff = (256U * fifo_status2.diff_fifo) +
+                     fifo_status1.diff_fifo;
+    val->fifo_ovr_latched = fifo_status2.over_run_latched;
+    val->fifo_bdr         = fifo_status2.counter_bdr_ia;
+    val->fifo_full        = fifo_status2.fifo_full_ia;
+    val->fifo_ovr         = fifo_status2.fifo_ovr_ia;
+    val->fifo_th          = fifo_status2.fifo_wtm_ia;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor conversion parameters selection.[set]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          set the sensor conversion parameters by checking
+  *                      the constraints of the device.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                         lsm6dso_md_t *val)
+{
+  lsm6dso_func_cfg_access_t func_cfg_access;
+  lsm6dso_ctrl1_ois_t ctrl1_ois;
+  lsm6dso_ctrl2_ois_t ctrl2_ois;
+  lsm6dso_ctrl3_ois_t ctrl3_ois;
+  lsm6dso_ctrl1_xl_t ctrl1_xl;
+  lsm6dso_ctrl8_xl_t ctrl8_xl;
+  lsm6dso_ctrl2_g_t ctrl2_g;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  lsm6dso_ctrl4_c_t ctrl4_c;
+  lsm6dso_ctrl5_c_t ctrl5_c;
+  lsm6dso_ctrl6_c_t ctrl6_c;
+  lsm6dso_ctrl7_g_t ctrl7_g;
+  uint8_t xl_hm_mode;
+  uint8_t g_hm_mode;
+  uint8_t xl_ulp_en;
+  uint8_t odr_gy;
+  uint8_t odr_xl;
+  uint8_t reg[8];
+  int32_t ret;
+
+  ret = 0;
+  /* FIXME: Remove warnings with STM32CubeIDE */
+  ctrl3_c.not_used_01 = 0;
+  ctrl4_c.not_used_01 = 0;
+  ctrl5_c.xl_ulp_en = 0;
+  /* reading input configuration */
+  xl_hm_mode = ((uint8_t)val->ui.xl.odr & 0x10U) >> 4;
+  xl_ulp_en = ((uint8_t)val->ui.xl.odr & 0x20U) >> 5;
+  odr_xl = (uint8_t)val->ui.xl.odr & 0x0FU;
+
+  /* if enable xl ultra low power mode disable gy and OIS chain */
+  if (xl_ulp_en == PROPERTY_ENABLE)
+  {
+    val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+    val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+    val->ui.gy.odr  = LSM6DSO_GY_UI_OFF;
+  }
+
+  /* if OIS xl is enabled also gyro OIS is enabled */
+  if (val->ois.xl.odr == LSM6DSO_XL_OIS_6667Hz_HP)
+  {
+    val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
+  }
+
+  g_hm_mode = ((uint8_t)val->ui.gy.odr & 0x10U) >> 4;
+  odr_gy = (uint8_t)val->ui.gy.odr & 0x0FU;
+
+  /* reading registers to be configured */
+  if (ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, reg, 8);
+    bytecpy((uint8_t *)&ctrl1_xl, &reg[0]);
+    bytecpy((uint8_t *)&ctrl2_g,  &reg[1]);
+    bytecpy((uint8_t *)&ctrl3_c,  &reg[2]);
+    bytecpy((uint8_t *)&ctrl4_c,  &reg[3]);
+    bytecpy((uint8_t *)&ctrl5_c,  &reg[4]);
+    bytecpy((uint8_t *)&ctrl6_c,  &reg[5]);
+    bytecpy((uint8_t *)&ctrl7_g,  &reg[6]);
+    bytecpy((uint8_t *)&ctrl8_xl, &reg[7]);
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
+                             (uint8_t *)&func_cfg_access, 1);
+    }
+
+    /* if toggle xl ultra low power mode, turn off xl before reconfigure */
+    if (ctrl5_c.xl_ulp_en != xl_ulp_en)
+    {
+      ctrl1_xl.odr_xl = (uint8_t) 0x00U;
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL,
+                              (uint8_t *)&ctrl1_xl, 1);
+    }
+  }
+
+  /* reading OIS registers to be configured */
+  if (aux_ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+    }
+
+    bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
+    bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
+    bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
+  }
+
+  else
+  {
+    if (ctx != NULL)
+    {
+      if (ret == 0)
+      {
+        ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+      }
+
+      bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
+      bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
+      bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
+    }
+  }
+
+  /* Check the Finite State Machine data rate constraints */
+  if (val->fsm.sens != LSM6DSO_FSM_DISABLE)
+  {
+    switch (val->fsm.odr)
+    {
+      case LSM6DSO_FSM_12Hz5:
+        if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl == 0x00U))
+        {
+          odr_xl = 0x01U;
+        }
+
+        if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy == 0x00U))
+        {
+          xl_ulp_en = PROPERTY_DISABLE;
+          odr_gy = 0x01U;
+        }
+
+        break;
+
+      case LSM6DSO_FSM_26Hz:
+        if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x02U))
+        {
+          odr_xl = 0x02U;
+        }
+
+        if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x02U))
+        {
+          xl_ulp_en = PROPERTY_DISABLE;
+          odr_gy = 0x02U;
+        }
+
+        break;
+
+      case LSM6DSO_FSM_52Hz:
+        if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x03U))
+        {
+          odr_xl = 0x03U;
+        }
+
+        if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x03U))
+        {
+          xl_ulp_en = PROPERTY_DISABLE;
+          odr_gy = 0x03U;
+        }
+
+        break;
+
+      case LSM6DSO_FSM_104Hz:
+        if ((val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x04U))
+        {
+          odr_xl = 0x04U;
+        }
+
+        if ((val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x04U))
+        {
+          xl_ulp_en = PROPERTY_DISABLE;
+          odr_gy = 0x04U;
+        }
+
+        break;
+
+      default:
+        odr_xl = 0x00U;
+        odr_gy = 0x00U;
+        break;
+    }
+  }
+
+  /* Updating the accelerometer data rate configuration */
+  switch ((ctrl5_c.xl_ulp_en << 5) | (ctrl6_c.xl_hm_mode << 4) |
+          ctrl1_xl.odr_xl)
+  {
+    case LSM6DSO_XL_UI_OFF:
+      val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+      break;
+
+    case LSM6DSO_XL_UI_12Hz5_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_HP;
+      break;
+
+    case LSM6DSO_XL_UI_26Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_52Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_104Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_208Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_416Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_416Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_833Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_833Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_1667Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_1667Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_3333Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_3333Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_6667Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_6667Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_1Hz6_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_LP;
+      break;
+
+    case LSM6DSO_XL_UI_12Hz5_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_LP;
+      break;
+
+    case LSM6DSO_XL_UI_26Hz_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_LP;
+      break;
+
+    case LSM6DSO_XL_UI_52Hz_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_LP;
+      break;
+
+    case LSM6DSO_XL_UI_104Hz_NM:
+      val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_NM;
+      break;
+
+    case LSM6DSO_XL_UI_208Hz_NM:
+      val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_NM;
+      break;
+
+    case LSM6DSO_XL_UI_1Hz6_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_12Hz5_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_26Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_52Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_104Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_208Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_ULP;
+      break;
+
+    default:
+      val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+      break;
+  }
+
+  /* Updating the accelerometer data rate configuration */
+  switch ((ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g)
+  {
+    case LSM6DSO_GY_UI_OFF:
+      val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+      break;
+
+    case LSM6DSO_GY_UI_12Hz5_LP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_LP;
+      break;
+
+    case LSM6DSO_GY_UI_12Hz5_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_HP;
+      break;
+
+    case LSM6DSO_GY_UI_26Hz_LP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_LP;
+      break;
+
+    case LSM6DSO_GY_UI_26Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_52Hz_LP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_LP;
+      break;
+
+    case LSM6DSO_GY_UI_52Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_104Hz_NM:
+      val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_NM;
+      break;
+
+    case LSM6DSO_GY_UI_104Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_208Hz_NM:
+      val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_NM;
+      break;
+
+    case LSM6DSO_GY_UI_208Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_416Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_416Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_833Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_833Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_1667Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_1667Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_3333Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_3333Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_6667Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_6667Hz_HP;
+      break;
+
+    default:
+      val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+      break;
+  }
+
+  /* Check accelerometer full scale constraints */
+  /* Full scale of 16g must be the same for UI and OIS */
+  if ((val->ui.xl.fs == LSM6DSO_XL_UI_16g) ||
+      (val->ois.xl.fs == LSM6DSO_XL_OIS_16g))
+  {
+    val->ui.xl.fs = LSM6DSO_XL_UI_16g;
+    val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
+  }
+
+  /* prapare new configuration */
+
+  /* Full scale of 16g must be the same for UI and OIS */
+  if (val->ui.xl.fs == LSM6DSO_XL_UI_16g)
+  {
+    ctrl8_xl.xl_fs_mode = PROPERTY_DISABLE;
+  }
+
+  else
+  {
+    ctrl8_xl.xl_fs_mode = PROPERTY_ENABLE;
+  }
+
+  /* OIS new configuration */
+  ctrl7_g.ois_on_en = val->ois.ctrl_md & 0x01U;
+
+  switch (val->ois.ctrl_md)
+  {
+    case LSM6DSO_OIS_ONLY_AUX:
+      ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+      ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr |
+                              (uint8_t)val->ois.xl.odr;
+      ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+      ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+      break;
+
+    case LSM6DSO_OIS_MIXED:
+      ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+      ctrl7_g.ois_on = (uint8_t)val->ois.gy.odr | (uint8_t)val->ois.xl.odr;
+      ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+      ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+      break;
+
+    default:
+      ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+      ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr |
+                              (uint8_t)val->ois.xl.odr;
+      ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+      ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+      break;
+  }
+
+  /* UI new configuration */
+  ctrl1_xl.odr_xl = odr_xl;
+  ctrl1_xl.fs_xl = (uint8_t)val->ui.xl.fs;
+  ctrl5_c.xl_ulp_en = xl_ulp_en;
+  ctrl6_c.xl_hm_mode = xl_hm_mode;
+  ctrl7_g.g_hm_mode = g_hm_mode;
+  ctrl2_g.odr_g = odr_gy;
+  ctrl2_g.fs_g = (uint8_t) val->ui.gy.fs;
+
+  /* writing checked configuration */
+  if (ctx != NULL)
+  {
+    bytecpy(&reg[0], (uint8_t *)&ctrl1_xl);
+    bytecpy(&reg[1], (uint8_t *)&ctrl2_g);
+    bytecpy(&reg[2], (uint8_t *)&ctrl3_c);
+    bytecpy(&reg[3], (uint8_t *)&ctrl4_c);
+    bytecpy(&reg[4], (uint8_t *)&ctrl5_c);
+    bytecpy(&reg[5], (uint8_t *)&ctrl6_c);
+    bytecpy(&reg[6], (uint8_t *)&ctrl7_g);
+    bytecpy(&reg[7], (uint8_t *)&ctrl8_xl);
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)&reg, 8);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
+                              (uint8_t *)&func_cfg_access, 1);
+    }
+  }
+
+  /* writing OIS checked configuration */
+  if (aux_ctx != NULL)
+  {
+    bytecpy(&reg[0], (uint8_t *)&ctrl1_ois);
+    bytecpy(&reg[1], (uint8_t *)&ctrl2_ois);
+    bytecpy(&reg[2], (uint8_t *)&ctrl3_ois);
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Sensor conversion parameters selection.[get]
+  *
+  * @param  ctx          communication interface handler. Use NULL to ignore
+  *                      this interface.(ptr)
+  * @param  aux_ctx      auxiliary communication interface handler. Use NULL
+  *                      to ignore this interface.(ptr)
+  * @param  val          get the sensor conversion parameters.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                         lsm6dso_md_t *val)
+{
+  lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
+  lsm6dso_func_cfg_access_t func_cfg_access;
+  lsm6dso_emb_func_en_b_t emb_func_en_b;
+  lsm6dso_fsm_enable_a_t fsm_enable_a;
+  lsm6dso_fsm_enable_b_t fsm_enable_b;
+  lsm6dso_ctrl1_ois_t ctrl1_ois;
+  lsm6dso_ctrl2_ois_t ctrl2_ois;
+  lsm6dso_ctrl3_ois_t ctrl3_ois;
+  lsm6dso_ctrl1_xl_t ctrl1_xl;
+  lsm6dso_ctrl2_g_t ctrl2_g;
+  lsm6dso_ctrl3_c_t ctrl3_c;
+  lsm6dso_ctrl4_c_t ctrl4_c;
+  lsm6dso_ctrl5_c_t ctrl5_c;
+  lsm6dso_ctrl6_c_t ctrl6_c;
+  lsm6dso_ctrl7_g_t ctrl7_g;
+  uint8_t reg[8];
+  int32_t ret;
+
+  ret = 0;
+
+  /* reading the registers of the device */
+  if (ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, reg, 7);
+    bytecpy((uint8_t *)&ctrl1_xl, &reg[0]);
+    bytecpy((uint8_t *)&ctrl2_g,  &reg[1]);
+    bytecpy((uint8_t *)&ctrl3_c,  &reg[2]);
+    bytecpy((uint8_t *)&ctrl4_c,  &reg[3]);
+    bytecpy((uint8_t *)&ctrl5_c,  &reg[4]);
+    bytecpy((uint8_t *)&ctrl6_c,  &reg[5]);
+    bytecpy((uint8_t *)&ctrl7_g,  &reg[6]);
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
+                             (uint8_t *)&func_cfg_access, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B, reg, 1);
+      bytecpy((uint8_t *)&emb_func_odr_cfg_b, &reg[0]);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+                             (uint8_t *)&emb_func_en_b, 1);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, reg, 2);
+      bytecpy((uint8_t *)&fsm_enable_a, &reg[0]);
+      bytecpy((uint8_t *)&fsm_enable_b, &reg[1]);
+    }
+
+    if (ret == 0)
+    {
+      ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+    }
+  }
+
+  if (aux_ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+    }
+
+    bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
+    bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
+    bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
+  }
+
+  else
+  {
+    if (ctx != NULL)
+    {
+      if (ret == 0)
+      {
+        ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+      }
+
+      bytecpy((uint8_t *)&ctrl1_ois, &reg[0]);
+      bytecpy((uint8_t *)&ctrl2_ois, &reg[1]);
+      bytecpy((uint8_t *)&ctrl3_ois, &reg[2]);
+    }
+  }
+
+  /* fill the input structure */
+
+  /* get accelerometer configuration */
+  switch ((ctrl5_c.xl_ulp_en << 5) | (ctrl6_c.xl_hm_mode << 4) |
+          ctrl1_xl.odr_xl)
+  {
+    case LSM6DSO_XL_UI_OFF:
+      val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+      break;
+
+    case LSM6DSO_XL_UI_12Hz5_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_HP;
+      break;
+
+    case LSM6DSO_XL_UI_26Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_52Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_104Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_208Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_416Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_416Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_833Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_833Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_1667Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_1667Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_3333Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_3333Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_6667Hz_HP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_6667Hz_HP;
+      break;
+
+    case LSM6DSO_XL_UI_1Hz6_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_LP;
+      break;
+
+    case LSM6DSO_XL_UI_12Hz5_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_LP;
+      break;
+
+    case LSM6DSO_XL_UI_26Hz_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_LP;
+      break;
+
+    case LSM6DSO_XL_UI_52Hz_LP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_LP;
+      break;
+
+    case LSM6DSO_XL_UI_104Hz_NM:
+      val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_NM;
+      break;
+
+    case LSM6DSO_XL_UI_208Hz_NM:
+      val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_NM;
+      break;
+
+    case LSM6DSO_XL_UI_1Hz6_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_12Hz5_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_26Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_52Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_104Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_ULP;
+      break;
+
+    case LSM6DSO_XL_UI_208Hz_ULP:
+      val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_ULP;
+      break;
+
+    default:
+      val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+      break;
+  }
+
+  switch (ctrl1_xl.fs_xl)
+  {
+    case LSM6DSO_XL_UI_2g:
+      val->ui.xl.fs = LSM6DSO_XL_UI_2g;
+      break;
+
+    case LSM6DSO_XL_UI_4g:
+      val->ui.xl.fs = LSM6DSO_XL_UI_4g;
+      break;
+
+    case LSM6DSO_XL_UI_8g:
+      val->ui.xl.fs = LSM6DSO_XL_UI_8g;
+      break;
+
+    case LSM6DSO_XL_UI_16g:
+      val->ui.xl.fs = LSM6DSO_XL_UI_16g;
+      break;
+
+    default:
+      val->ui.xl.fs = LSM6DSO_XL_UI_2g;
+      break;
+  }
+
+  /* get gyroscope configuration */
+  switch ((ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g)
+  {
+    case LSM6DSO_GY_UI_OFF:
+      val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+      break;
+
+    case LSM6DSO_GY_UI_12Hz5_LP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_LP;
+      break;
+
+    case LSM6DSO_GY_UI_12Hz5_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_HP;
+      break;
+
+    case LSM6DSO_GY_UI_26Hz_LP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_LP;
+      break;
+
+    case LSM6DSO_GY_UI_26Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_52Hz_LP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_LP;
+      break;
+
+    case LSM6DSO_GY_UI_52Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_104Hz_NM:
+      val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_NM;
+      break;
+
+    case LSM6DSO_GY_UI_104Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_208Hz_NM:
+      val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_NM;
+      break;
+
+    case LSM6DSO_GY_UI_208Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_416Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_416Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_833Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_833Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_1667Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_1667Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_3333Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_3333Hz_HP;
+      break;
+
+    case LSM6DSO_GY_UI_6667Hz_HP:
+      val->ui.gy.odr = LSM6DSO_GY_UI_6667Hz_HP;
+      break;
+
+    default:
+      val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+      break;
+  }
+
+  switch (ctrl2_g.fs_g)
+  {
+    case LSM6DSO_GY_UI_125dps:
+      val->ui.gy.fs = LSM6DSO_GY_UI_125dps;
+      break;
+
+    case LSM6DSO_GY_UI_250dps:
+      val->ui.gy.fs = LSM6DSO_GY_UI_250dps;
+      break;
+
+    case LSM6DSO_GY_UI_500dps:
+      val->ui.gy.fs = LSM6DSO_GY_UI_500dps;
+      break;
+
+    case LSM6DSO_GY_UI_1000dps:
+      val->ui.gy.fs = LSM6DSO_GY_UI_1000dps;
+      break;
+
+    case LSM6DSO_GY_UI_2000dps:
+      val->ui.gy.fs = LSM6DSO_GY_UI_2000dps;
+      break;
+
+    default:
+      val->ui.gy.fs = LSM6DSO_GY_UI_125dps;
+      break;
+  }
+
+  /* get finite state machine configuration */
+  if ((fsm_enable_a.fsm1_en | fsm_enable_a.fsm2_en |
+       fsm_enable_a.fsm3_en |
+       fsm_enable_a.fsm4_en | fsm_enable_a.fsm5_en | fsm_enable_a.fsm6_en |
+       fsm_enable_a.fsm7_en | fsm_enable_a.fsm8_en | fsm_enable_b.fsm9_en |
+       fsm_enable_b.fsm10_en | fsm_enable_b.fsm11_en |
+       fsm_enable_b.fsm12_en | fsm_enable_b.fsm13_en |
+       fsm_enable_b.fsm14_en | fsm_enable_b.fsm15_en |
+       fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
+  {
+    switch (emb_func_odr_cfg_b.fsm_odr)
+    {
+      case LSM6DSO_FSM_12Hz5:
+        val->fsm.odr = LSM6DSO_FSM_12Hz5;
+        break;
+
+      case LSM6DSO_FSM_26Hz:
+        val->fsm.odr = LSM6DSO_FSM_26Hz;
+        break;
+
+      case LSM6DSO_FSM_52Hz:
+        val->fsm.odr = LSM6DSO_FSM_52Hz;
+        break;
+
+      case LSM6DSO_FSM_104Hz:
+        val->fsm.odr = LSM6DSO_FSM_104Hz;
+        break;
+
+      default:
+        val->fsm.odr = LSM6DSO_FSM_12Hz5;
+        break;
+    }
+
+    val->fsm.sens = LSM6DSO_FSM_XL_GY;
+
+    if (val->ui.gy.odr == LSM6DSO_GY_UI_OFF)
+    {
+      val->fsm.sens = LSM6DSO_FSM_XL;
+    }
+
+    if (val->ui.xl.odr == LSM6DSO_XL_UI_OFF)
+    {
+      val->fsm.sens = LSM6DSO_FSM_GY;
+    }
+  }
+
+  else
+  {
+    val->fsm.sens = LSM6DSO_FSM_DISABLE;
+  }
+
+  /* get ois configuration */
+
+  /* OIS configuration mode */
+  switch (ctrl7_g.ois_on_en)
+  {
+    case LSM6DSO_OIS_ONLY_AUX:
+      switch (ctrl3_ois.fs_xl_ois)
+      {
+        case LSM6DSO_XL_OIS_2g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+          break;
+
+        case LSM6DSO_XL_OIS_4g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_4g;
+          break;
+
+        case LSM6DSO_XL_OIS_8g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_8g;
+          break;
+
+        case LSM6DSO_XL_OIS_16g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
+          break;
+
+        default:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+          break;
+      }
+
+      switch (ctrl1_ois.mode4_en)
+      {
+        case LSM6DSO_XL_OIS_OFF:
+          val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+          break;
+
+        case LSM6DSO_XL_OIS_6667Hz_HP:
+          val->ois.xl.odr = LSM6DSO_XL_OIS_6667Hz_HP;
+          break;
+
+        default:
+          val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+          break;
+      }
+
+      switch (ctrl1_ois.fs_g_ois)
+      {
+        case LSM6DSO_GY_OIS_250dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+          break;
+
+        case LSM6DSO_GY_OIS_500dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_500dps;
+          break;
+
+        case LSM6DSO_GY_OIS_1000dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_1000dps;
+          break;
+
+        case LSM6DSO_GY_OIS_2000dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_2000dps;
+          break;
+
+        default:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+          break;
+      }
+
+      switch (ctrl1_ois.ois_en_spi2)
+      {
+        case LSM6DSO_GY_OIS_OFF:
+          val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+          break;
+
+        case LSM6DSO_GY_OIS_6667Hz_HP:
+          val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
+          break;
+
+        default:
+          val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+          break;
+      }
+
+      val->ois.ctrl_md = LSM6DSO_OIS_ONLY_AUX;
+      break;
+
+    case LSM6DSO_OIS_MIXED:
+      switch (ctrl3_ois.fs_xl_ois)
+      {
+        case LSM6DSO_XL_OIS_2g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+          break;
+
+        case LSM6DSO_XL_OIS_4g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_4g;
+          break;
+
+        case LSM6DSO_XL_OIS_8g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_8g;
+          break;
+
+        case LSM6DSO_XL_OIS_16g:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
+          break;
+
+        default:
+          val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+          break;
+      }
+
+      switch (ctrl1_ois.mode4_en)
+      {
+        case LSM6DSO_XL_OIS_OFF:
+          val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+          break;
+
+        case LSM6DSO_XL_OIS_6667Hz_HP:
+          val->ois.xl.odr = LSM6DSO_XL_OIS_6667Hz_HP;
+          break;
+
+        default:
+          val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+          break;
+      }
+
+      switch (ctrl1_ois.fs_g_ois)
+      {
+        case LSM6DSO_GY_OIS_250dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+          break;
+
+        case LSM6DSO_GY_OIS_500dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_500dps;
+          break;
+
+        case LSM6DSO_GY_OIS_1000dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_1000dps;
+          break;
+
+        case LSM6DSO_GY_OIS_2000dps:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_2000dps;
+          break;
+
+        default:
+          val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+          break;
+      }
+
+      switch (ctrl1_ois.ois_en_spi2)
+      {
+        case LSM6DSO_GY_OIS_OFF:
+          val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+          break;
+
+        case LSM6DSO_GY_OIS_6667Hz_HP:
+          val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
+          break;
+
+        default:
+          val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+          break;
+      }
+
+      val->ois.ctrl_md = LSM6DSO_OIS_MIXED;
+      break;
+
+    default:
+      ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+      ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr |
+                              (uint8_t)val->ois.xl.odr;
+      ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+      ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+      val->ois.ctrl_md = LSM6DSO_OIS_ONLY_AUX;
+      break;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Read data in engineering unit.[get]
+  *
+  * @param  ctx     communication interface handler.(ptr)
+  * @param  md      the sensor conversion parameters.(ptr)
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                         lsm6dso_md_t *md, lsm6dso_data_t *data)
+{
+  uint8_t buff[14];
+  int32_t ret;
+
+  uint8_t i;
+  uint8_t j;
+  ret = 0;
+
+  /* read data */
+  if (ctx != NULL)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 14);
+  }
+
+  j = 0;
+  /* temperature conversion */
+  data->ui.heat.raw = (int16_t)buff[j + 1U];
+  data->ui.heat.raw = (((int16_t)data->ui.heat.raw * (int16_t)256) +
+                       (int16_t)buff[j]);
+  j += 2U;
+  data->ui.heat.deg_c = lsm6dso_from_lsb_to_celsius((
+                                                      int16_t)data->ui.heat.raw);
+
+  /* angular rate conversion */
+  for (i = 0U; i < 3U; i++)
+  {
+    data->ui.gy.raw[i] = (int16_t)buff[j + 1U];
+    data->ui.gy.raw[i] = (data->ui.gy.raw[i] * 256) + (int16_t) buff[j];
+    j += 2U;
+
+    switch (md->ui.gy.fs)
+    {
+      case LSM6DSO_GY_UI_250dps:
+        data->ui.gy.mdps[i] = lsm6dso_from_fs250_to_mdps(data->ui.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_125dps:
+        data->ui.gy.mdps[i] = lsm6dso_from_fs125_to_mdps(data->ui.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_500dps:
+        data->ui.gy.mdps[i] = lsm6dso_from_fs500_to_mdps(data->ui.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_1000dps:
+        data->ui.gy.mdps[i] = lsm6dso_from_fs1000_to_mdps(data->ui.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_2000dps:
+        data->ui.gy.mdps[i] = lsm6dso_from_fs2000_to_mdps(data->ui.gy.raw[i]);
+        break;
+
+      default:
+        data->ui.gy.mdps[i] = 0.0f;
+        break;
+    }
+  }
+
+  /* acceleration conversion */
+  for (i = 0U; i < 3U; i++)
+  {
+    data->ui.xl.raw[i] = (int16_t)buff[j + 1U];
+    data->ui.xl.raw[i] = (data->ui.xl.raw[i] * 256) + (int16_t) buff[j];
+    j += 2U;
+
+    switch (md->ui.xl.fs)
+    {
+      case LSM6DSO_XL_UI_2g:
+        data->ui.xl.mg[i] = lsm6dso_from_fs2_to_mg(data->ui.xl.raw[i]);
+        break;
+
+      case LSM6DSO_XL_UI_4g:
+        data->ui.xl.mg[i] = lsm6dso_from_fs4_to_mg(data->ui.xl.raw[i]);
+        break;
+
+      case LSM6DSO_XL_UI_8g:
+        data->ui.xl.mg[i] = lsm6dso_from_fs8_to_mg(data->ui.xl.raw[i]);
+        break;
+
+      case LSM6DSO_XL_UI_16g:
+        data->ui.xl.mg[i] = lsm6dso_from_fs16_to_mg(data->ui.xl.raw[i]);
+        break;
+
+      default:
+        data->ui.xl.mg[i] = 0.0f;
+        break;
+    }
+  }
+
+  /* read data from ois chain */
+  if (aux_ctx != NULL)
+  {
+    if (ret == 0)
+    {
+      ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_OUTX_L_G, buff, 12);
+    }
+  }
+
+  j = 0;
+
+  /* ois angular rate conversion */
+  for (i = 0U; i < 3U; i++)
+  {
+    data->ois.gy.raw[i] = (int16_t) buff[j + 1U];
+    data->ois.gy.raw[i] = (data->ois.gy.raw[i] * 256) + (int16_t) buff[j];
+    j += 2U;
+
+    switch (md->ois.gy.fs)
+    {
+      case LSM6DSO_GY_UI_250dps:
+        data->ois.gy.mdps[i] = lsm6dso_from_fs250_to_mdps(
+                                 data->ois.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_125dps:
+        data->ois.gy.mdps[i] = lsm6dso_from_fs125_to_mdps(
+                                 data->ois.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_500dps:
+        data->ois.gy.mdps[i] = lsm6dso_from_fs500_to_mdps(
+                                 data->ois.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_1000dps:
+        data->ois.gy.mdps[i] = lsm6dso_from_fs1000_to_mdps(
+                                 data->ois.gy.raw[i]);
+        break;
+
+      case LSM6DSO_GY_UI_2000dps:
+        data->ois.gy.mdps[i] = lsm6dso_from_fs2000_to_mdps(
+                                 data->ois.gy.raw[i]);
+        break;
+
+      default:
+        data->ois.gy.mdps[i] = 0.0f;
+        break;
+    }
+  }
+
+  /* ois acceleration conversion */
+  for (i = 0U; i < 3U; i++)
+  {
+    data->ois.xl.raw[i] = (int16_t) buff[j + 1U];
+    data->ois.xl.raw[i] = (data->ois.xl.raw[i] * 256) + (int16_t) buff[j];
+    j += 2U;
+
+    switch (md->ois.xl.fs)
+    {
+      case LSM6DSO_XL_UI_2g:
+        data->ois.xl.mg[i] = lsm6dso_from_fs2_to_mg(data->ois.xl.raw[i]);
+        break;
+
+      case LSM6DSO_XL_UI_4g:
+        data->ois.xl.mg[i] = lsm6dso_from_fs4_to_mg(data->ois.xl.raw[i]);
+        break;
+
+      case LSM6DSO_XL_UI_8g:
+        data->ois.xl.mg[i] = lsm6dso_from_fs8_to_mg(data->ois.xl.raw[i]);
+        break;
+
+      case LSM6DSO_XL_UI_16g:
+        data->ois.xl.mg[i] = lsm6dso_from_fs16_to_mg(data->ois.xl.raw[i]);
+        break;
+
+      default:
+        data->ois.xl.mg[i] = 0.0f;
+        break;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Embedded functions.[set]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      change the values of registers
+  *                  EMB_FUNC_EN_A e EMB_FUNC_EN_B.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_embedded_sens_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_emb_sens_t *val)
+{
+  lsm6dso_emb_func_en_a_t emb_func_en_a;
+  lsm6dso_emb_func_en_b_t emb_func_en_b;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+                           (uint8_t *)&emb_func_en_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+                           (uint8_t *)&emb_func_en_b, 1);
+    emb_func_en_b.fsm_en = val->fsm;
+    emb_func_en_a.tilt_en = val->tilt;
+    emb_func_en_a.pedo_en = val->step;
+    emb_func_en_b.pedo_adv_en = val->step_adv;
+    emb_func_en_a.sign_motion_en = val->sig_mot;
+    emb_func_en_b.fifo_compr_en = val->fifo_compr;
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+                            (uint8_t *)&emb_func_en_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+                            (uint8_t *)&emb_func_en_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Embedded functions.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      get the values of registers
+  *                  EMB_FUNC_EN_A e EMB_FUNC_EN_B.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_embedded_sens_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_emb_sens_t *emb_sens)
+{
+  lsm6dso_emb_func_en_a_t emb_func_en_a;
+  lsm6dso_emb_func_en_b_t emb_func_en_b;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+                           (uint8_t *)&emb_func_en_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+                           (uint8_t *)&emb_func_en_b, 1);
+    emb_sens->fsm = emb_func_en_b.fsm_en;
+    emb_sens->tilt = emb_func_en_a.tilt_en;
+    emb_sens->step = emb_func_en_a.pedo_en;
+    emb_sens->step_adv = emb_func_en_b.pedo_adv_en;
+    emb_sens->sig_mot = emb_func_en_a.sign_motion_en;
+    emb_sens->fifo_compr = emb_func_en_b.fifo_compr_en;
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  turn off all embedded functions.[get]
+  *
+  * @param  ctx      read / write interface definitions
+  * @param  val      get the values of registers
+  *                  EMB_FUNC_EN_A e EMB_FUNC_EN_B.
+  * @retval             interface status (MANDATORY: return 0 -> no Error)
+  *
+  */
+int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx)
+{
+  lsm6dso_emb_func_en_a_t emb_func_en_a;
+  lsm6dso_emb_func_en_b_t emb_func_en_b;
+  int32_t ret;
+
+  ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+                           (uint8_t *)&emb_func_en_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+                           (uint8_t *)&emb_func_en_b, 1);
+    emb_func_en_b.fsm_en = PROPERTY_DISABLE;
+    emb_func_en_a.tilt_en = PROPERTY_DISABLE;
+    emb_func_en_a.pedo_en = PROPERTY_DISABLE;
+    emb_func_en_b.pedo_adv_en = PROPERTY_DISABLE;
+    emb_func_en_a.sign_motion_en = PROPERTY_DISABLE;
+    emb_func_en_b.fifo_compr_en = PROPERTY_DISABLE;
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+                            (uint8_t *)&emb_func_en_a, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+                            (uint8_t *)&emb_func_en_b, 1);
+  }
+
+  if (ret == 0)
+  {
+    ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+  }
+
+  return ret;
+}
+
+/**
+  * @}
+  *
+  */
+
+/**
+  * @}
+  *
+  */

lib/lsm6dso-api/lsm6dso_reg.h

@@ -0,0 +1,4486 @@
+/**
+  ******************************************************************************
+  * @file    lsm6dso_reg.h
+  * @author  Sensors Software Solution Team
+  * @brief   This file contains all the functions prototypes for the
+  *          lsm6dso_reg.c driver.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef LSM6DSO_REGS_H
+#define LSM6DSO_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdint.h>
+#include <stddef.h>
+#include <math.h>
+
+/** @addtogroup LSM6DSO
+  * @{
+  *
+  */
+
+/** @defgroup  Endianness definitions
+  * @{
+  *
+  */
+
+#ifndef DRV_BYTE_ORDER
+#ifndef __BYTE_ORDER__
+
+#define DRV_LITTLE_ENDIAN 1234
+#define DRV_BIG_ENDIAN    4321
+
+/** if _BYTE_ORDER is not defined, choose the endianness of your architecture
+  * by uncommenting the define which fits your platform endianness
+  */
+//#define DRV_BYTE_ORDER    DRV_BIG_ENDIAN
+#define DRV_BYTE_ORDER    DRV_LITTLE_ENDIAN
+
+#else /* defined __BYTE_ORDER__ */
+
+#define DRV_LITTLE_ENDIAN  __ORDER_LITTLE_ENDIAN__
+#define DRV_BIG_ENDIAN     __ORDER_BIG_ENDIAN__
+#define DRV_BYTE_ORDER     __BYTE_ORDER__
+
+#endif /* __BYTE_ORDER__*/
+#endif /* DRV_BYTE_ORDER */
+
+/**
+  * @}
+  *
+  */
+
+/** @defgroup STMicroelectronics sensors common types
+  * @{
+  *
+  */
+
+#ifndef MEMS_SHARED_TYPES
+#define MEMS_SHARED_TYPES
+
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0       : 1;
+  uint8_t bit1       : 1;
+  uint8_t bit2       : 1;
+  uint8_t bit3       : 1;
+  uint8_t bit4       : 1;
+  uint8_t bit5       : 1;
+  uint8_t bit6       : 1;
+  uint8_t bit7       : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7       : 1;
+  uint8_t bit6       : 1;
+  uint8_t bit5       : 1;
+  uint8_t bit4       : 1;
+  uint8_t bit3       : 1;
+  uint8_t bit2       : 1;
+  uint8_t bit1       : 1;
+  uint8_t bit0       : 1;
+#endif /* DRV_BYTE_ORDER */
+} bitwise_t;
+
+#define PROPERTY_DISABLE                (0U)
+#define PROPERTY_ENABLE                 (1U)
+
+/** @addtogroup  Interfaces_Functions
+  * @brief       This section provide a set of functions used to read and
+  *              write a generic register of the device.
+  *              MANDATORY: return 0 -> no Error.
+  * @{
+  *
+  */
+
+typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
+typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
+typedef void (*stmdev_mdelay_ptr)(uint32_t millisec);
+
+typedef struct
+{
+  /** Component mandatory fields **/
+  stmdev_write_ptr  write_reg;
+  stmdev_read_ptr   read_reg;
+  /** Component optional fields **/
+  stmdev_mdelay_ptr   mdelay;
+  /** Customizable optional pointer **/
+  void *handle;
+} stmdev_ctx_t;
+
+#ifndef __weak
+#define __weak __attribute__((weak))
+#endif /* __weak */
+
+/*
+ * These are the basic platform dependent I/O routines to read
+ * and write device registers connected on a standard bus.
+ * The driver keeps offering a default implementation based on function
+ * pointers to read/write routines for backward compatibility.
+ * The __weak directive allows the final application to overwrite
+ * them with a custom implementation.
+ */
+int32_t lsm6dso_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
+                                uint8_t *data,
+                                uint16_t len);
+int32_t lsm6dso_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
+                                 uint8_t *data,
+                                 uint16_t len);
+
+/**
+  * @}
+  *
+  */
+
+#endif /* MEMS_SHARED_TYPES */
+
+#ifndef MEMS_UCF_SHARED_TYPES
+#define MEMS_UCF_SHARED_TYPES
+
+/** @defgroup    Generic address-data structure definition
+  * @brief       This structure is useful to load a predefined configuration
+  *              of a sensor.
+  *              You can create a sensor configuration by your own or using
+  *              Unico / Unicleo tools available on STMicroelectronics
+  *              web site.
+  *
+  * @{
+  *
+  */
+
+typedef struct
+{
+  uint8_t address;
+  uint8_t data;
+} ucf_line_t;
+
+/**
+  * @}
+  *
+  */
+
+#endif /* MEMS_UCF_SHARED_TYPES */
+
+/**
+  * @}
+  *
+  */
+
+/** @defgroup LSM6DSO_Infos
+  * @{
+  *
+  */
+
+/** I2C Device Address 8 bit format  if SA0=0 -> D5 if SA0=1 -> D7 **/
+#define LSM6DSO_I2C_ADD_L                    0xD5
+#define LSM6DSO_I2C_ADD_H                    0xD7
+
+/** Device Identification (Who am I) **/
+#define LSM6DSO_ID                           0x6C
+
+/**
+  * @}
+  *
+  */
+
+#define LSM6DSO_FUNC_CFG_ACCESS              0x01U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 6;
+uint8_t reg_access               :
+  2; /* shub_reg_access + func_cfg_access */
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+uint8_t reg_access               :
+  2; /* shub_reg_access + func_cfg_access */
+  uint8_t not_used_01              : 6;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_func_cfg_access_t;
+
+#define LSM6DSO_PIN_CTRL                     0x02U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 6;
+  uint8_t sdo_pu_en                : 1;
+  uint8_t ois_pu_dis               : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t ois_pu_dis               : 1;
+  uint8_t sdo_pu_en                : 1;
+  uint8_t not_used_01              : 6;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_pin_ctrl_t;
+
+#define LSM6DSO_FIFO_CTRL1                   0x07U
+typedef struct
+{
+  uint8_t wtm                      : 8;
+} lsm6dso_fifo_ctrl1_t;
+
+#define LSM6DSO_FIFO_CTRL2                   0x08U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t wtm                      : 1;
+  uint8_t uncoptr_rate             : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t odrchg_en                : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t fifo_compr_rt_en         : 1;
+  uint8_t stop_on_wtm              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t stop_on_wtm              : 1;
+  uint8_t fifo_compr_rt_en         : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t odrchg_en                : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t uncoptr_rate             : 2;
+  uint8_t wtm                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fifo_ctrl2_t;
+
+#define LSM6DSO_FIFO_CTRL3                   0x09U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bdr_xl                   : 4;
+  uint8_t bdr_gy                   : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bdr_gy                   : 4;
+  uint8_t bdr_xl                   : 4;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fifo_ctrl3_t;
+
+#define LSM6DSO_FIFO_CTRL4                   0x0AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fifo_mode                : 3;
+  uint8_t not_used_01              : 1;
+  uint8_t odr_t_batch              : 2;
+  uint8_t odr_ts_batch             : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t odr_ts_batch             : 2;
+  uint8_t odr_t_batch              : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t fifo_mode                : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fifo_ctrl4_t;
+
+#define LSM6DSO_COUNTER_BDR_REG1             0x0BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t cnt_bdr_th               : 3;
+  uint8_t not_used_01              : 2;
+  uint8_t trig_counter_bdr         : 1;
+  uint8_t rst_counter_bdr          : 1;
+  uint8_t dataready_pulsed         : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t dataready_pulsed         : 1;
+  uint8_t rst_counter_bdr          : 1;
+  uint8_t trig_counter_bdr         : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t cnt_bdr_th               : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_counter_bdr_reg1_t;
+
+#define LSM6DSO_COUNTER_BDR_REG2             0x0CU
+typedef struct
+{
+  uint8_t cnt_bdr_th               : 8;
+} lsm6dso_counter_bdr_reg2_t;
+
+#define LSM6DSO_INT1_CTRL  0x0D
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int1_drdy_xl             : 1;
+  uint8_t int1_drdy_g              : 1;
+  uint8_t int1_boot                : 1;
+  uint8_t int1_fifo_th             : 1;
+  uint8_t int1_fifo_ovr            : 1;
+  uint8_t int1_fifo_full           : 1;
+  uint8_t int1_cnt_bdr             : 1;
+  uint8_t den_drdy_flag            : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_drdy_flag            : 1;
+  uint8_t int1_cnt_bdr             : 1;
+  uint8_t int1_fifo_full           : 1;
+  uint8_t int1_fifo_ovr            : 1;
+  uint8_t int1_fifo_th             : 1;
+  uint8_t int1_boot                : 1;
+  uint8_t int1_drdy_g              : 1;
+  uint8_t int1_drdy_xl             : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_int1_ctrl_t;
+
+#define LSM6DSO_INT2_CTRL                    0x0EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_drdy_xl             : 1;
+  uint8_t int2_drdy_g              : 1;
+  uint8_t int2_drdy_temp           : 1;
+  uint8_t int2_fifo_th             : 1;
+  uint8_t int2_fifo_ovr            : 1;
+  uint8_t int2_fifo_full           : 1;
+  uint8_t int2_cnt_bdr             : 1;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t int2_cnt_bdr             : 1;
+  uint8_t int2_fifo_full           : 1;
+  uint8_t int2_fifo_ovr            : 1;
+  uint8_t int2_fifo_th             : 1;
+  uint8_t int2_drdy_temp           : 1;
+  uint8_t int2_drdy_g              : 1;
+  uint8_t int2_drdy_xl             : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_int2_ctrl_t;
+
+#define LSM6DSO_WHO_AM_I                     0x0FU
+#define LSM6DSO_CTRL1_XL                     0x10U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t lpf2_xl_en               : 1;
+  uint8_t fs_xl                    : 2;
+  uint8_t odr_xl                   : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t odr_xl                   : 4;
+  uint8_t fs_xl                    : 2;
+  uint8_t lpf2_xl_en               : 1;
+  uint8_t not_used_01              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl1_xl_t;
+
+#define LSM6DSO_CTRL2_G                      0x11U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t fs_g                     : 3; /* fs_125 + fs_g */
+  uint8_t odr_g                    : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t odr_g                    : 4;
+  uint8_t fs_g                     : 3; /* fs_125 + fs_g */
+  uint8_t not_used_01              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl2_g_t;
+
+#define LSM6DSO_CTRL3_C                      0x12U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sw_reset                 : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t if_inc                   : 1;
+  uint8_t sim                      : 1;
+  uint8_t pp_od                    : 1;
+  uint8_t h_lactive                : 1;
+  uint8_t bdu                      : 1;
+  uint8_t boot                     : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t boot                     : 1;
+  uint8_t bdu                      : 1;
+  uint8_t h_lactive                : 1;
+  uint8_t pp_od                    : 1;
+  uint8_t sim                      : 1;
+  uint8_t if_inc                   : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t sw_reset                 : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl3_c_t;
+
+#define LSM6DSO_CTRL4_C                      0x13U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t lpf1_sel_g               : 1;
+  uint8_t i2c_disable              : 1;
+  uint8_t drdy_mask                : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t int2_on_int1             : 1;
+  uint8_t sleep_g                  : 1;
+  uint8_t not_used_03              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_03              : 1;
+  uint8_t sleep_g                  : 1;
+  uint8_t int2_on_int1             : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t drdy_mask                : 1;
+  uint8_t i2c_disable              : 1;
+  uint8_t lpf1_sel_g               : 1;
+  uint8_t not_used_01              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl4_c_t;
+
+#define LSM6DSO_CTRL5_C                      0x14U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t st_xl                    : 2;
+  uint8_t st_g                     : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t rounding                 : 2;
+  uint8_t xl_ulp_en                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t xl_ulp_en                : 1;
+  uint8_t rounding                 : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t st_g                     : 2;
+  uint8_t st_xl                    : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl5_c_t;
+
+#define LSM6DSO_CTRL6_C                      0x15U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ftype                    : 3;
+  uint8_t usr_off_w                : 1;
+  uint8_t xl_hm_mode               : 1;
+uint8_t den_mode                 :
+  3;   /* trig_en + lvl1_en + lvl2_en */
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+uint8_t den_mode                 :
+  3;   /* trig_en + lvl1_en + lvl2_en */
+  uint8_t xl_hm_mode               : 1;
+  uint8_t usr_off_w                : 1;
+  uint8_t ftype                    : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl6_c_t;
+
+#define LSM6DSO_CTRL7_G                      0x16U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ois_on                   : 1;
+  uint8_t usr_off_on_out           : 1;
+  uint8_t ois_on_en                : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t hpm_g                    : 2;
+  uint8_t hp_en_g                  : 1;
+  uint8_t g_hm_mode                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t g_hm_mode                : 1;
+  uint8_t hp_en_g                  : 1;
+  uint8_t hpm_g                    : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t ois_on_en                : 1;
+  uint8_t usr_off_on_out           : 1;
+  uint8_t ois_on                   : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl7_g_t;
+
+#define LSM6DSO_CTRL8_XL                     0x17U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t low_pass_on_6d           : 1;
+  uint8_t xl_fs_mode               : 1;
+  uint8_t hp_slope_xl_en           : 1;
+  uint8_t fastsettl_mode_xl        : 1;
+  uint8_t hp_ref_mode_xl           : 1;
+  uint8_t hpcf_xl                  : 3;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t hpcf_xl                  : 3;
+  uint8_t hp_ref_mode_xl           : 1;
+  uint8_t fastsettl_mode_xl        : 1;
+  uint8_t hp_slope_xl_en           : 1;
+  uint8_t xl_fs_mode               : 1;
+  uint8_t low_pass_on_6d           : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl8_xl_t;
+
+#define LSM6DSO_CTRL9_XL                     0x18U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t i3c_disable              : 1;
+  uint8_t den_lh                   : 1;
+  uint8_t den_xl_g                 : 2;   /* den_xl_en + den_xl_g */
+  uint8_t den_z                    : 1;
+  uint8_t den_y                    : 1;
+  uint8_t den_x                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_x                    : 1;
+  uint8_t den_y                    : 1;
+  uint8_t den_z                    : 1;
+  uint8_t den_xl_g                 : 2;   /* den_xl_en + den_xl_g */
+  uint8_t den_lh                   : 1;
+  uint8_t i3c_disable              : 1;
+  uint8_t not_used_01              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl9_xl_t;
+
+#define LSM6DSO_CTRL10_C                     0x19U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t timestamp_en             : 1;
+  uint8_t not_used_02              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 2;
+  uint8_t timestamp_en             : 1;
+  uint8_t not_used_01              : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl10_c_t;
+
+#define LSM6DSO_ALL_INT_SRC                  0x1AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ff_ia                    : 1;
+  uint8_t wu_ia                    : 1;
+  uint8_t single_tap               : 1;
+  uint8_t double_tap               : 1;
+  uint8_t d6d_ia                   : 1;
+  uint8_t sleep_change_ia          : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t timestamp_endcount       : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t timestamp_endcount       : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t sleep_change_ia          : 1;
+  uint8_t d6d_ia                   : 1;
+  uint8_t double_tap               : 1;
+  uint8_t single_tap               : 1;
+  uint8_t wu_ia                    : 1;
+  uint8_t ff_ia                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_all_int_src_t;
+
+#define LSM6DSO_WAKE_UP_SRC                  0x1BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t z_wu                     : 1;
+  uint8_t y_wu                     : 1;
+  uint8_t x_wu                     : 1;
+  uint8_t wu_ia                    : 1;
+  uint8_t sleep_state              : 1;
+  uint8_t ff_ia                    : 1;
+  uint8_t sleep_change_ia          : 1;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t sleep_change_ia          : 1;
+  uint8_t ff_ia                    : 1;
+  uint8_t sleep_state              : 1;
+  uint8_t wu_ia                    : 1;
+  uint8_t x_wu                     : 1;
+  uint8_t y_wu                     : 1;
+  uint8_t z_wu                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_wake_up_src_t;
+
+#define LSM6DSO_TAP_SRC                      0x1CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t z_tap                    : 1;
+  uint8_t y_tap                    : 1;
+  uint8_t x_tap                    : 1;
+  uint8_t tap_sign                 : 1;
+  uint8_t double_tap               : 1;
+  uint8_t single_tap               : 1;
+  uint8_t tap_ia                   : 1;
+  uint8_t not_used_02              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 1;
+  uint8_t tap_ia                   : 1;
+  uint8_t single_tap               : 1;
+  uint8_t double_tap               : 1;
+  uint8_t tap_sign                 : 1;
+  uint8_t x_tap                    : 1;
+  uint8_t y_tap                    : 1;
+  uint8_t z_tap                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_tap_src_t;
+
+#define LSM6DSO_D6D_SRC                      0x1DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t xl                       : 1;
+  uint8_t xh                       : 1;
+  uint8_t yl                       : 1;
+  uint8_t yh                       : 1;
+  uint8_t zl                       : 1;
+  uint8_t zh                       : 1;
+  uint8_t d6d_ia                   : 1;
+  uint8_t den_drdy                 : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t den_drdy                 : 1;
+  uint8_t d6d_ia                   : 1;
+  uint8_t zh                       : 1;
+  uint8_t zl                       : 1;
+  uint8_t yh                       : 1;
+  uint8_t yl                       : 1;
+  uint8_t xh                       : 1;
+  uint8_t xl                       : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_d6d_src_t;
+
+#define LSM6DSO_STATUS_REG                   0x1EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t xlda                     : 1;
+  uint8_t gda                      : 1;
+  uint8_t tda                      : 1;
+  uint8_t not_used_01              : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t tda                      : 1;
+  uint8_t gda                      : 1;
+  uint8_t xlda                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_status_reg_t;
+
+#define LSM6DSO_STATUS_SPIAUX                0x1EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t xlda                     : 1;
+  uint8_t gda                      : 1;
+  uint8_t gyro_settling            : 1;
+  uint8_t not_used_01              : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t gyro_settling            : 1;
+  uint8_t gda                      : 1;
+  uint8_t xlda                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_status_spiaux_t;
+
+#define LSM6DSO_OUT_TEMP_L                   0x20U
+#define LSM6DSO_OUT_TEMP_H                   0x21U
+#define LSM6DSO_OUTX_L_G                     0x22U
+#define LSM6DSO_OUTX_H_G                     0x23U
+#define LSM6DSO_OUTY_L_G                     0x24U
+#define LSM6DSO_OUTY_H_G                     0x25U
+#define LSM6DSO_OUTZ_L_G                     0x26U
+#define LSM6DSO_OUTZ_H_G                     0x27U
+#define LSM6DSO_OUTX_L_A                     0x28U
+#define LSM6DSO_OUTX_H_A                     0x29U
+#define LSM6DSO_OUTY_L_A                     0x2AU
+#define LSM6DSO_OUTY_H_A                     0x2BU
+#define LSM6DSO_OUTZ_L_A                     0x2CU
+#define LSM6DSO_OUTZ_H_A                     0x2DU
+#define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE     0x35U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01             : 3;
+  uint8_t is_step_det             : 1;
+  uint8_t is_tilt                 : 1;
+  uint8_t is_sigmot               : 1;
+  uint8_t not_used_02             : 1;
+  uint8_t is_fsm_lc               : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t is_fsm_lc               : 1;
+  uint8_t not_used_02             : 1;
+  uint8_t is_sigmot               : 1;
+  uint8_t is_tilt                 : 1;
+  uint8_t is_step_det             : 1;
+  uint8_t not_used_01             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_status_mainpage_t;
+
+#define LSM6DSO_FSM_STATUS_A_MAINPAGE        0x36U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t is_fsm1                 : 1;
+  uint8_t is_fsm2                 : 1;
+  uint8_t is_fsm3                 : 1;
+  uint8_t is_fsm4                 : 1;
+  uint8_t is_fsm5                 : 1;
+  uint8_t is_fsm6                 : 1;
+  uint8_t is_fsm7                 : 1;
+  uint8_t is_fsm8                 : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t is_fsm8                 : 1;
+  uint8_t is_fsm7                 : 1;
+  uint8_t is_fsm6                 : 1;
+  uint8_t is_fsm5                 : 1;
+  uint8_t is_fsm4                 : 1;
+  uint8_t is_fsm3                 : 1;
+  uint8_t is_fsm2                 : 1;
+  uint8_t is_fsm1                 : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_status_a_mainpage_t;
+
+#define LSM6DSO_FSM_STATUS_B_MAINPAGE        0x37U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t is_fsm9                 : 1;
+  uint8_t is_fsm10                : 1;
+  uint8_t is_fsm11                : 1;
+  uint8_t is_fsm12                : 1;
+  uint8_t is_fsm13                : 1;
+  uint8_t is_fsm14                : 1;
+  uint8_t is_fsm15                : 1;
+  uint8_t is_fsm16                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t is_fsm16                : 1;
+  uint8_t is_fsm15                : 1;
+  uint8_t is_fsm14                : 1;
+  uint8_t is_fsm13                : 1;
+  uint8_t is_fsm12                : 1;
+  uint8_t is_fsm11                : 1;
+  uint8_t is_fsm10                : 1;
+  uint8_t is_fsm9                 : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_status_b_mainpage_t;
+
+#define LSM6DSO_STATUS_MASTER_MAINPAGE       0x39U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sens_hub_endop          : 1;
+  uint8_t not_used_01             : 2;
+  uint8_t slave0_nack             : 1;
+  uint8_t slave1_nack             : 1;
+  uint8_t slave2_nack             : 1;
+  uint8_t slave3_nack             : 1;
+  uint8_t wr_once_done            : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t wr_once_done            : 1;
+  uint8_t slave3_nack             : 1;
+  uint8_t slave2_nack             : 1;
+  uint8_t slave1_nack             : 1;
+  uint8_t slave0_nack             : 1;
+  uint8_t not_used_01             : 2;
+  uint8_t sens_hub_endop          : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_status_master_mainpage_t;
+
+#define LSM6DSO_FIFO_STATUS1                 0x3AU
+typedef struct
+{
+  uint8_t diff_fifo                : 8;
+} lsm6dso_fifo_status1_t;
+
+#define LSM6DSO_FIFO_STATUS2                 0x3B
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t diff_fifo                : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t over_run_latched         : 1;
+  uint8_t counter_bdr_ia           : 1;
+  uint8_t fifo_full_ia             : 1;
+  uint8_t fifo_ovr_ia              : 1;
+  uint8_t fifo_wtm_ia              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t fifo_wtm_ia              : 1;
+  uint8_t fifo_ovr_ia              : 1;
+  uint8_t fifo_full_ia             : 1;
+  uint8_t counter_bdr_ia           : 1;
+  uint8_t over_run_latched         : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t diff_fifo                : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fifo_status2_t;
+
+#define LSM6DSO_TIMESTAMP0                   0x40U
+#define LSM6DSO_TIMESTAMP1                   0x41U
+#define LSM6DSO_TIMESTAMP2                   0x42U
+#define LSM6DSO_TIMESTAMP3                   0x43U
+#define LSM6DSO_TAP_CFG0                     0x56U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t lir                      : 1;
+  uint8_t tap_z_en                 : 1;
+  uint8_t tap_y_en                 : 1;
+  uint8_t tap_x_en                 : 1;
+  uint8_t slope_fds                : 1;
+  uint8_t sleep_status_on_int      : 1;
+  uint8_t int_clr_on_read          : 1;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t int_clr_on_read          : 1;
+  uint8_t sleep_status_on_int      : 1;
+  uint8_t slope_fds                : 1;
+  uint8_t tap_x_en                 : 1;
+  uint8_t tap_y_en                 : 1;
+  uint8_t tap_z_en                 : 1;
+  uint8_t lir                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_tap_cfg0_t;
+
+#define LSM6DSO_TAP_CFG1                     0x57U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t tap_ths_x                : 5;
+  uint8_t tap_priority             : 3;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t tap_priority             : 3;
+  uint8_t tap_ths_x                : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_tap_cfg1_t;
+
+#define LSM6DSO_TAP_CFG2                     0x58U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t tap_ths_y                : 5;
+  uint8_t inact_en                 : 2;
+  uint8_t interrupts_enable        : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t interrupts_enable        : 1;
+  uint8_t inact_en                 : 2;
+  uint8_t tap_ths_y                : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_tap_cfg2_t;
+
+#define LSM6DSO_TAP_THS_6D                   0x59U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t tap_ths_z                : 5;
+  uint8_t sixd_ths                 : 2;
+  uint8_t d4d_en                   : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t d4d_en                   : 1;
+  uint8_t sixd_ths                 : 2;
+  uint8_t tap_ths_z                : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_tap_ths_6d_t;
+
+#define LSM6DSO_INT_DUR2                     0x5AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t shock                    : 2;
+  uint8_t quiet                    : 2;
+  uint8_t dur                      : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t dur                      : 4;
+  uint8_t quiet                    : 2;
+  uint8_t shock                    : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_int_dur2_t;
+
+#define LSM6DSO_WAKE_UP_THS                  0x5BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t wk_ths                   : 6;
+  uint8_t usr_off_on_wu            : 1;
+  uint8_t single_double_tap        : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t single_double_tap        : 1;
+  uint8_t usr_off_on_wu            : 1;
+  uint8_t wk_ths                   : 6;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_wake_up_ths_t;
+
+#define LSM6DSO_WAKE_UP_DUR                  0x5CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sleep_dur                : 4;
+  uint8_t wake_ths_w               : 1;
+  uint8_t wake_dur                 : 2;
+  uint8_t ff_dur                   : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t ff_dur                   : 1;
+  uint8_t wake_dur                 : 2;
+  uint8_t wake_ths_w               : 1;
+  uint8_t sleep_dur                : 4;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_wake_up_dur_t;
+
+#define LSM6DSO_FREE_FALL                    0x5DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ff_ths                   : 3;
+  uint8_t ff_dur                   : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t ff_dur                   : 5;
+  uint8_t ff_ths                   : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_free_fall_t;
+
+#define LSM6DSO_MD1_CFG                      0x5EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int1_shub                : 1;
+  uint8_t int1_emb_func            : 1;
+  uint8_t int1_6d                  : 1;
+  uint8_t int1_double_tap          : 1;
+  uint8_t int1_ff                  : 1;
+  uint8_t int1_wu                  : 1;
+  uint8_t int1_single_tap          : 1;
+  uint8_t int1_sleep_change        : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int1_sleep_change        : 1;
+  uint8_t int1_single_tap          : 1;
+  uint8_t int1_wu                  : 1;
+  uint8_t int1_ff                  : 1;
+  uint8_t int1_double_tap          : 1;
+  uint8_t int1_6d                  : 1;
+  uint8_t int1_emb_func            : 1;
+  uint8_t int1_shub                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_md1_cfg_t;
+
+#define LSM6DSO_MD2_CFG                      0x5FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_timestamp           : 1;
+  uint8_t int2_emb_func            : 1;
+  uint8_t int2_6d                  : 1;
+  uint8_t int2_double_tap          : 1;
+  uint8_t int2_ff                  : 1;
+  uint8_t int2_wu                  : 1;
+  uint8_t int2_single_tap          : 1;
+  uint8_t int2_sleep_change        : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_sleep_change        : 1;
+  uint8_t int2_single_tap          : 1;
+  uint8_t int2_wu                  : 1;
+  uint8_t int2_ff                  : 1;
+  uint8_t int2_double_tap          : 1;
+  uint8_t int2_6d                  : 1;
+  uint8_t int2_emb_func            : 1;
+  uint8_t int2_timestamp           : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_md2_cfg_t;
+
+#define LSM6DSO_I3C_BUS_AVB                  0x62U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t pd_dis_int1              : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t i3c_bus_avb_sel          : 2;
+  uint8_t not_used_02              : 3;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 3;
+  uint8_t i3c_bus_avb_sel          : 2;
+  uint8_t not_used_01              : 2;
+  uint8_t pd_dis_int1              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_i3c_bus_avb_t;
+
+#define LSM6DSO_INTERNAL_FREQ_FINE           0x63U
+typedef struct
+{
+  uint8_t freq_fine                : 8;
+} lsm6dso_internal_freq_fine_t;
+
+#define LSM6DSO_INT_OIS                      0x6FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t st_xl_ois                : 2;
+  uint8_t not_used_01              : 3;
+  uint8_t den_lh_ois               : 1;
+  uint8_t lvl2_ois                 : 1;
+  uint8_t int2_drdy_ois            : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_drdy_ois            : 1;
+  uint8_t lvl2_ois                 : 1;
+  uint8_t den_lh_ois               : 1;
+  uint8_t not_used_01              : 3;
+  uint8_t st_xl_ois                : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_int_ois_t;
+
+#define LSM6DSO_CTRL1_OIS                    0x70U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ois_en_spi2              : 1;
+  uint8_t fs_g_ois                 : 3; /* fs_125_ois + fs[1:0]_g_ois */
+  uint8_t mode4_en                 : 1;
+  uint8_t sim_ois                  : 1;
+  uint8_t lvl1_ois                 : 1;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t lvl1_ois                 : 1;
+  uint8_t sim_ois                  : 1;
+  uint8_t mode4_en                 : 1;
+  uint8_t fs_g_ois                 : 3; /* fs_125_ois + fs[1:0]_g_ois */
+  uint8_t ois_en_spi2              : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl1_ois_t;
+
+#define LSM6DSO_CTRL2_OIS                    0x71U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t hp_en_ois                : 1;
+  uint8_t ftype_ois                : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t hpm_ois                  : 2;
+  uint8_t not_used_02              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 2;
+  uint8_t hpm_ois                  : 2;
+  uint8_t not_used_01              : 1;
+  uint8_t ftype_ois                : 2;
+  uint8_t hp_en_ois                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl2_ois_t;
+
+#define LSM6DSO_CTRL3_OIS                    0x72U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t st_ois_clampdis          : 1;
+  uint8_t st_ois                   : 2;
+  uint8_t filter_xl_conf_ois       : 3;
+  uint8_t fs_xl_ois                : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t fs_xl_ois                : 2;
+  uint8_t filter_xl_conf_ois       : 3;
+  uint8_t st_ois                   : 2;
+  uint8_t st_ois_clampdis          : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_ctrl3_ois_t;
+
+#define LSM6DSO_X_OFS_USR                    0x73U
+#define LSM6DSO_Y_OFS_USR                    0x74U
+#define LSM6DSO_Z_OFS_USR                    0x75U
+#define LSM6DSO_FIFO_DATA_OUT_TAG            0x78U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t tag_parity               : 1;
+  uint8_t tag_cnt                  : 2;
+  uint8_t tag_sensor               : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t tag_sensor               : 5;
+  uint8_t tag_cnt                  : 2;
+  uint8_t tag_parity               : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fifo_data_out_tag_t;
+
+#define LSM6DSO_FIFO_DATA_OUT_X_L            0x79U
+#define LSM6DSO_FIFO_DATA_OUT_X_H            0x7AU
+#define LSM6DSO_FIFO_DATA_OUT_Y_L            0x7BU
+#define LSM6DSO_FIFO_DATA_OUT_Y_H            0x7CU
+#define LSM6DSO_FIFO_DATA_OUT_Z_L            0x7DU
+#define LSM6DSO_FIFO_DATA_OUT_Z_H            0x7EU
+#define LSM6DSO_PAGE_SEL                     0x02U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 4;
+  uint8_t page_sel                 : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t page_sel                 : 4;
+  uint8_t not_used_01              : 4;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_page_sel_t;
+
+#define LSM6DSO_EMB_FUNC_EN_A                0x04U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 3;
+  uint8_t pedo_en                  : 1;
+  uint8_t tilt_en                  : 1;
+  uint8_t sign_motion_en           : 1;
+  uint8_t not_used_02              : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 2;
+  uint8_t sign_motion_en           : 1;
+  uint8_t tilt_en                  : 1;
+  uint8_t pedo_en                  : 1;
+  uint8_t not_used_01              : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_en_a_t;
+
+#define LSM6DSO_EMB_FUNC_EN_B                0x05U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fsm_en                   : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t fifo_compr_en            : 1;
+  uint8_t pedo_adv_en              : 1;
+  uint8_t not_used_02              : 3;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 3;
+  uint8_t pedo_adv_en              : 1;
+  uint8_t fifo_compr_en            : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t fsm_en                   : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_en_b_t;
+
+#define LSM6DSO_PAGE_ADDRESS                 0x08U
+typedef struct
+{
+  uint8_t page_addr                : 8;
+} lsm6dso_page_address_t;
+
+#define LSM6DSO_PAGE_VALUE                   0x09U
+typedef struct
+{
+  uint8_t page_value               : 8;
+} lsm6dso_page_value_t;
+
+#define LSM6DSO_EMB_FUNC_INT1                0x0AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 3;
+  uint8_t int1_step_detector       : 1;
+  uint8_t int1_tilt                : 1;
+  uint8_t int1_sig_mot             : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t int1_fsm_lc              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int1_fsm_lc              : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t int1_sig_mot             : 1;
+  uint8_t int1_tilt                : 1;
+  uint8_t int1_step_detector       : 1;
+  uint8_t not_used_01              : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_int1_t;
+
+#define LSM6DSO_FSM_INT1_A                   0x0BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int1_fsm1                : 1;
+  uint8_t int1_fsm2                : 1;
+  uint8_t int1_fsm3                : 1;
+  uint8_t int1_fsm4                : 1;
+  uint8_t int1_fsm5                : 1;
+  uint8_t int1_fsm6                : 1;
+  uint8_t int1_fsm7                : 1;
+  uint8_t int1_fsm8                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int1_fsm8                : 1;
+  uint8_t int1_fsm7                : 1;
+  uint8_t int1_fsm6                : 1;
+  uint8_t int1_fsm5                : 1;
+  uint8_t int1_fsm4                : 1;
+  uint8_t int1_fsm3                : 1;
+  uint8_t int1_fsm2                : 1;
+  uint8_t int1_fsm1                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_int1_a_t;
+
+#define LSM6DSO_FSM_INT1_B                   0x0CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int1_fsm9                : 1;
+  uint8_t int1_fsm10               : 1;
+  uint8_t int1_fsm11               : 1;
+  uint8_t int1_fsm12               : 1;
+  uint8_t int1_fsm13               : 1;
+  uint8_t int1_fsm14               : 1;
+  uint8_t int1_fsm15               : 1;
+  uint8_t int1_fsm16               : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int1_fsm16               : 1;
+  uint8_t int1_fsm15               : 1;
+  uint8_t int1_fsm14               : 1;
+  uint8_t int1_fsm13               : 1;
+  uint8_t int1_fsm12               : 1;
+  uint8_t int1_fsm11               : 1;
+  uint8_t int1_fsm10               : 1;
+  uint8_t int1_fsm9                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_int1_b_t;
+
+#define LSM6DSO_EMB_FUNC_INT2                0x0EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 3;
+  uint8_t int2_step_detector       : 1;
+  uint8_t int2_tilt                : 1;
+  uint8_t int2_sig_mot             : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t int2_fsm_lc              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_fsm_lc              : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t int2_sig_mot             : 1;
+  uint8_t int2_tilt                : 1;
+  uint8_t int2_step_detector       : 1;
+  uint8_t not_used_01              : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_int2_t;
+
+#define LSM6DSO_FSM_INT2_A                   0x0FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_fsm1                : 1;
+  uint8_t int2_fsm2                : 1;
+  uint8_t int2_fsm3                : 1;
+  uint8_t int2_fsm4                : 1;
+  uint8_t int2_fsm5                : 1;
+  uint8_t int2_fsm6                : 1;
+  uint8_t int2_fsm7                : 1;
+  uint8_t int2_fsm8                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_fsm8                : 1;
+  uint8_t int2_fsm7                : 1;
+  uint8_t int2_fsm6                : 1;
+  uint8_t int2_fsm5                : 1;
+  uint8_t int2_fsm4                : 1;
+  uint8_t int2_fsm3                : 1;
+  uint8_t int2_fsm2                : 1;
+  uint8_t int2_fsm1                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_int2_a_t;
+
+#define LSM6DSO_FSM_INT2_B                   0x10U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t int2_fsm9                : 1;
+  uint8_t int2_fsm10               : 1;
+  uint8_t int2_fsm11               : 1;
+  uint8_t int2_fsm12               : 1;
+  uint8_t int2_fsm13               : 1;
+  uint8_t int2_fsm14               : 1;
+  uint8_t int2_fsm15               : 1;
+  uint8_t int2_fsm16               : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t int2_fsm16               : 1;
+  uint8_t int2_fsm15               : 1;
+  uint8_t int2_fsm14               : 1;
+  uint8_t int2_fsm13               : 1;
+  uint8_t int2_fsm12               : 1;
+  uint8_t int2_fsm11               : 1;
+  uint8_t int2_fsm10               : 1;
+  uint8_t int2_fsm9                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_int2_b_t;
+
+#define LSM6DSO_EMB_FUNC_STATUS              0x12U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 3;
+  uint8_t is_step_det              : 1;
+  uint8_t is_tilt                  : 1;
+  uint8_t is_sigmot                : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t is_fsm_lc                : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t is_fsm_lc                : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t is_sigmot                : 1;
+  uint8_t is_tilt                  : 1;
+  uint8_t is_step_det              : 1;
+  uint8_t not_used_01              : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_status_t;
+
+#define LSM6DSO_FSM_STATUS_A                 0x13U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t is_fsm1                  : 1;
+  uint8_t is_fsm2                  : 1;
+  uint8_t is_fsm3                  : 1;
+  uint8_t is_fsm4                  : 1;
+  uint8_t is_fsm5                  : 1;
+  uint8_t is_fsm6                  : 1;
+  uint8_t is_fsm7                  : 1;
+  uint8_t is_fsm8                  : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t is_fsm8                  : 1;
+  uint8_t is_fsm7                  : 1;
+  uint8_t is_fsm6                  : 1;
+  uint8_t is_fsm5                  : 1;
+  uint8_t is_fsm4                  : 1;
+  uint8_t is_fsm3                  : 1;
+  uint8_t is_fsm2                  : 1;
+  uint8_t is_fsm1                  : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_status_a_t;
+
+#define LSM6DSO_FSM_STATUS_B                 0x14U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t is_fsm9                  : 1;
+  uint8_t is_fsm10                 : 1;
+  uint8_t is_fsm11                 : 1;
+  uint8_t is_fsm12                 : 1;
+  uint8_t is_fsm13                 : 1;
+  uint8_t is_fsm14                 : 1;
+  uint8_t is_fsm15                 : 1;
+  uint8_t is_fsm16                 : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t is_fsm16                 : 1;
+  uint8_t is_fsm15                 : 1;
+  uint8_t is_fsm14                 : 1;
+  uint8_t is_fsm13                 : 1;
+  uint8_t is_fsm12                 : 1;
+  uint8_t is_fsm11                 : 1;
+  uint8_t is_fsm10                 : 1;
+  uint8_t is_fsm9                  : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_status_b_t;
+
+#define LSM6DSO_PAGE_RW                      0x17U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t page_rw                  : 2;  /* page_write + page_read */
+  uint8_t emb_func_lir             : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t emb_func_lir             : 1;
+  uint8_t page_rw                  : 2;  /* page_write + page_read */
+  uint8_t not_used_01              : 5;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_page_rw_t;
+
+#define LSM6DSO_EMB_FUNC_FIFO_CFG             0x44U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_00              : 6;
+  uint8_t pedo_fifo_en             : 1;
+  uint8_t not_used_01              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 1;
+  uint8_t pedo_fifo_en             : 1;
+  uint8_t not_used_00              : 6;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_fifo_cfg_t;
+
+#define LSM6DSO_FSM_ENABLE_A                 0x46U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fsm1_en                  : 1;
+  uint8_t fsm2_en                  : 1;
+  uint8_t fsm3_en                  : 1;
+  uint8_t fsm4_en                  : 1;
+  uint8_t fsm5_en                  : 1;
+  uint8_t fsm6_en                  : 1;
+  uint8_t fsm7_en                  : 1;
+  uint8_t fsm8_en                  : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t fsm8_en                  : 1;
+  uint8_t fsm7_en                  : 1;
+  uint8_t fsm6_en                  : 1;
+  uint8_t fsm5_en                  : 1;
+  uint8_t fsm4_en                  : 1;
+  uint8_t fsm3_en                  : 1;
+  uint8_t fsm2_en                  : 1;
+  uint8_t fsm1_en                  : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_enable_a_t;
+
+#define LSM6DSO_FSM_ENABLE_B                 0x47U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fsm9_en                  : 1;
+  uint8_t fsm10_en                 : 1;
+  uint8_t fsm11_en                 : 1;
+  uint8_t fsm12_en                 : 1;
+  uint8_t fsm13_en                 : 1;
+  uint8_t fsm14_en                 : 1;
+  uint8_t fsm15_en                 : 1;
+  uint8_t fsm16_en                 : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t fsm16_en                  : 1;
+  uint8_t fsm15_en                 : 1;
+  uint8_t fsm14_en                 : 1;
+  uint8_t fsm13_en                 : 1;
+  uint8_t fsm12_en                 : 1;
+  uint8_t fsm11_en                 : 1;
+  uint8_t fsm10_en                 : 1;
+  uint8_t fsm9_en                  : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_enable_b_t;
+
+#define LSM6DSO_FSM_LONG_COUNTER_L           0x48U
+#define LSM6DSO_FSM_LONG_COUNTER_H           0x49U
+#define LSM6DSO_FSM_LONG_COUNTER_CLEAR       0x4AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+uint8_t fsm_lc_clr               :
+  2;  /* fsm_lc_cleared + fsm_lc_clear */
+  uint8_t not_used_01              : 6;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 6;
+uint8_t fsm_lc_clr               :
+  2;  /* fsm_lc_cleared + fsm_lc_clear */
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_long_counter_clear_t;
+
+#define LSM6DSO_FSM_OUTS1                    0x4CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs1_t;
+
+#define LSM6DSO_FSM_OUTS2                    0x4DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs2_t;
+
+#define LSM6DSO_FSM_OUTS3                    0x4EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs3_t;
+
+#define LSM6DSO_FSM_OUTS4                    0x4FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs4_t;
+
+#define LSM6DSO_FSM_OUTS5                    0x50U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs5_t;
+
+#define LSM6DSO_FSM_OUTS6                    0x51U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs6_t;
+
+#define LSM6DSO_FSM_OUTS7                    0x52U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs7_t;
+
+#define LSM6DSO_FSM_OUTS8                    0x53U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs8_t;
+
+#define LSM6DSO_FSM_OUTS9                    0x54U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs9_t;
+
+#define LSM6DSO_FSM_OUTS10                   0x55U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs10_t;
+
+#define LSM6DSO_FSM_OUTS11                   0x56U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs11_t;
+
+#define LSM6DSO_FSM_OUTS12                   0x57U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs12_t;
+
+#define LSM6DSO_FSM_OUTS13                   0x58U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs13_t;
+
+#define LSM6DSO_FSM_OUTS14                   0x59U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs14_t;
+
+#define LSM6DSO_FSM_OUTS15                   0x5AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs15_t;
+
+#define LSM6DSO_FSM_OUTS16                   0x5BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t n_v                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_x                      : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t p_x                      : 1;
+  uint8_t n_x                      : 1;
+  uint8_t p_y                      : 1;
+  uint8_t n_y                      : 1;
+  uint8_t p_z                      : 1;
+  uint8_t n_z                      : 1;
+  uint8_t p_v                      : 1;
+  uint8_t n_v                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_fsm_outs16_t;
+
+#define LSM6DSO_EMB_FUNC_ODR_CFG_B           0x5FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 3;
+  uint8_t fsm_odr                  : 2;
+  uint8_t not_used_02              : 3;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 3;
+  uint8_t fsm_odr                  : 2;
+  uint8_t not_used_01              : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_odr_cfg_b_t;
+
+#define LSM6DSO_STEP_COUNTER_L               0x62U
+#define LSM6DSO_STEP_COUNTER_H               0x63U
+#define LSM6DSO_EMB_FUNC_SRC                 0x64U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01              : 2;
+  uint8_t stepcounter_bit_set      : 1;
+  uint8_t step_overflow            : 1;
+  uint8_t step_count_delta_ia      : 1;
+  uint8_t step_detected            : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t pedo_rst_step            : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t pedo_rst_step            : 1;
+  uint8_t not_used_02              : 1;
+  uint8_t step_detected            : 1;
+  uint8_t step_count_delta_ia      : 1;
+  uint8_t step_overflow            : 1;
+  uint8_t stepcounter_bit_set      : 1;
+  uint8_t not_used_01              : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_src_t;
+
+#define LSM6DSO_EMB_FUNC_INIT_A              0x66U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t not_used_01               : 3;
+  uint8_t step_det_init             : 1;
+  uint8_t tilt_init                 : 1;
+  uint8_t sig_mot_init              : 1;
+  uint8_t not_used_02               : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02               : 2;
+  uint8_t sig_mot_init              : 1;
+  uint8_t tilt_init                 : 1;
+  uint8_t step_det_init             : 1;
+  uint8_t not_used_01               : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_init_a_t;
+
+#define LSM6DSO_EMB_FUNC_INIT_B              0x67U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t fsm_init                 : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t fifo_compr_init          : 1;
+  uint8_t not_used_02              : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 4;
+  uint8_t fifo_compr_init          : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t fsm_init                 : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_emb_func_init_b_t;
+
+#define LSM6DSO_MAG_SENSITIVITY_L            0xBAU
+#define LSM6DSO_MAG_SENSITIVITY_H            0xBBU
+#define LSM6DSO_MAG_OFFX_L                   0xC0U
+#define LSM6DSO_MAG_OFFX_H                   0xC1U
+#define LSM6DSO_MAG_OFFY_L                   0xC2U
+#define LSM6DSO_MAG_OFFY_H                   0xC3U
+#define LSM6DSO_MAG_OFFZ_L                   0xC4U
+#define LSM6DSO_MAG_OFFZ_H                   0xC5U
+#define LSM6DSO_MAG_SI_XX_L                  0xC6U
+#define LSM6DSO_MAG_SI_XX_H                  0xC7U
+#define LSM6DSO_MAG_SI_XY_L                  0xC8U
+#define LSM6DSO_MAG_SI_XY_H                  0xC9U
+#define LSM6DSO_MAG_SI_XZ_L                  0xCAU
+#define LSM6DSO_MAG_SI_XZ_H                  0xCBU
+#define LSM6DSO_MAG_SI_YY_L                  0xCCU
+#define LSM6DSO_MAG_SI_YY_H                  0xCDU
+#define LSM6DSO_MAG_SI_YZ_L                  0xCEU
+#define LSM6DSO_MAG_SI_YZ_H                  0xCFU
+#define LSM6DSO_MAG_SI_ZZ_L                  0xD0U
+#define LSM6DSO_MAG_SI_ZZ_H                  0xD1U
+#define LSM6DSO_MAG_CFG_A                    0xD4U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t mag_z_axis               : 3;
+  uint8_t not_used_01              : 1;
+  uint8_t mag_y_axis               : 3;
+  uint8_t not_used_02              : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 1;
+  uint8_t mag_y_axis               : 3;
+  uint8_t not_used_01              : 1;
+  uint8_t mag_z_axis               : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_mag_cfg_a_t;
+
+#define LSM6DSO_MAG_CFG_B                    0xD5U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t mag_x_axis               : 3;
+  uint8_t not_used_01              : 5;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 5;
+  uint8_t mag_x_axis               : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_mag_cfg_b_t;
+
+#define LSM6DSO_FSM_LC_TIMEOUT_L             0x17AU
+#define LSM6DSO_FSM_LC_TIMEOUT_H             0x17BU
+#define LSM6DSO_FSM_PROGRAMS                 0x17CU
+#define LSM6DSO_FSM_START_ADD_L              0x17EU
+#define LSM6DSO_FSM_START_ADD_H              0x17FU
+#define LSM6DSO_PEDO_CMD_REG                 0x183U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t ad_det_en                : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t fp_rejection_en          : 1;
+  uint8_t carry_count_en           : 1;
+  uint8_t not_used_02              : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_02              : 4;
+  uint8_t carry_count_en           : 1;
+  uint8_t fp_rejection_en          : 1;
+  uint8_t not_used_01              : 1;
+  uint8_t ad_det_en                : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_pedo_cmd_reg_t;
+
+#define LSM6DSO_PEDO_DEB_STEPS_CONF          0x184U
+#define LSM6DSO_PEDO_SC_DELTAT_L             0x1D0U
+#define LSM6DSO_PEDO_SC_DELTAT_H             0x1D1U
+#define LSM6DSO_SENSOR_HUB_1                 0x02U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_1_t;
+
+#define LSM6DSO_SENSOR_HUB_2                 0x03U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_2_t;
+
+#define LSM6DSO_SENSOR_HUB_3                 0x04U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_3_t;
+
+#define LSM6DSO_SENSOR_HUB_4                 0x05U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_4_t;
+
+#define LSM6DSO_SENSOR_HUB_5                 0x06U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_5_t;
+
+#define LSM6DSO_SENSOR_HUB_6                 0x07U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_6_t;
+
+#define LSM6DSO_SENSOR_HUB_7                 0x08U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_7_t;
+
+#define LSM6DSO_SENSOR_HUB_8                 0x09U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_8_t;
+
+#define LSM6DSO_SENSOR_HUB_9                 0x0AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_9_t;
+
+#define LSM6DSO_SENSOR_HUB_10                0x0BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_10_t;
+
+#define LSM6DSO_SENSOR_HUB_11                0x0CU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_11_t;
+
+#define LSM6DSO_SENSOR_HUB_12                0x0DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_12_t;
+
+#define LSM6DSO_SENSOR_HUB_13                0x0EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_13_t;
+
+#define LSM6DSO_SENSOR_HUB_14                0x0FU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_14_t;
+
+#define LSM6DSO_SENSOR_HUB_15                0x10U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_15_t;
+
+#define LSM6DSO_SENSOR_HUB_16                0x11U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_16_t;
+
+#define LSM6DSO_SENSOR_HUB_17                0x12U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_17_t;
+
+#define LSM6DSO_SENSOR_HUB_18                0x13U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t bit0                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit7                    : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t bit7                    : 1;
+  uint8_t bit6                    : 1;
+  uint8_t bit5                    : 1;
+  uint8_t bit4                    : 1;
+  uint8_t bit3                    : 1;
+  uint8_t bit2                    : 1;
+  uint8_t bit1                    : 1;
+  uint8_t bit0                    : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_sensor_hub_18_t;
+
+#define LSM6DSO_MASTER_CONFIG                0x14U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t aux_sens_on              : 2;
+  uint8_t master_on                : 1;
+  uint8_t shub_pu_en               : 1;
+  uint8_t pass_through_mode        : 1;
+  uint8_t start_config             : 1;
+  uint8_t write_once               : 1;
+  uint8_t rst_master_regs          : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t rst_master_regs          : 1;
+  uint8_t write_once               : 1;
+  uint8_t start_config             : 1;
+  uint8_t pass_through_mode        : 1;
+  uint8_t shub_pu_en               : 1;
+  uint8_t master_on                : 1;
+  uint8_t aux_sens_on              : 2;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_master_config_t;
+
+#define LSM6DSO_SLV0_ADD                     0x15U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t rw_0                     : 1;
+  uint8_t slave0                   : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave0                   : 7;
+  uint8_t rw_0                     : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv0_add_t;
+
+#define LSM6DSO_SLV0_SUBADD                  0x16U
+typedef struct
+{
+  uint8_t slave0_reg               : 8;
+} lsm6dso_slv0_subadd_t;
+
+#define LSM6DSO_SLV0_CONFIG                  0x17U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave0_numop             : 3;
+  uint8_t batch_ext_sens_0_en      : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t shub_odr                 : 2;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t shub_odr                 : 2;
+  uint8_t not_used_01              : 2;
+  uint8_t batch_ext_sens_0_en      : 1;
+  uint8_t slave0_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv0_config_t;
+
+#define LSM6DSO_SLV1_ADD                     0x18U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t r_1                      : 1;
+  uint8_t slave1_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave1_add               : 7;
+  uint8_t r_1                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv1_add_t;
+
+#define LSM6DSO_SLV1_SUBADD                  0x19U
+typedef struct
+{
+  uint8_t slave1_reg               : 8;
+} lsm6dso_slv1_subadd_t;
+
+#define LSM6DSO_SLV1_CONFIG                  0x1AU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave1_numop             : 3;
+  uint8_t batch_ext_sens_1_en      : 1;
+  uint8_t not_used_01              : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 4;
+  uint8_t batch_ext_sens_1_en      : 1;
+  uint8_t slave1_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv1_config_t;
+
+#define LSM6DSO_SLV2_ADD                     0x1BU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t r_2                      : 1;
+  uint8_t slave2_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave2_add               : 7;
+  uint8_t r_2                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv2_add_t;
+
+#define LSM6DSO_SLV2_SUBADD                  0x1CU
+typedef struct
+{
+  uint8_t slave2_reg               : 8;
+} lsm6dso_slv2_subadd_t;
+
+#define LSM6DSO_SLV2_CONFIG                  0x1DU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave2_numop             : 3;
+  uint8_t batch_ext_sens_2_en      : 1;
+  uint8_t not_used_01              : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 4;
+  uint8_t batch_ext_sens_2_en      : 1;
+  uint8_t slave2_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv2_config_t;
+
+#define LSM6DSO_SLV3_ADD                     0x1EU
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t r_3                      : 1;
+  uint8_t slave3_add               : 7;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t slave3_add               : 7;
+  uint8_t r_3                      : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv3_add_t;
+
+#define LSM6DSO_SLV3_SUBADD                  0x1FU
+typedef struct
+{
+  uint8_t slave3_reg               : 8;
+} lsm6dso_slv3_subadd_t;
+
+#define LSM6DSO_SLV3_CONFIG                  0x20U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t slave3_numop             : 3;
+  uint8_t  batch_ext_sens_3_en     : 1;
+  uint8_t not_used_01              : 4;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t not_used_01              : 4;
+  uint8_t  batch_ext_sens_3_en     : 1;
+  uint8_t slave3_numop             : 3;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_slv3_config_t;
+
+#define LSM6DSO_DATAWRITE_SLV0               0x21U
+typedef struct
+{
+  uint8_t slave0_dataw             : 8;
+} lsm6dso_datawrite_src_mode_sub_slv0_t;
+
+#define LSM6DSO_STATUS_MASTER                0x22U
+typedef struct
+{
+#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
+  uint8_t sens_hub_endop           : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t slave0_nack              : 1;
+  uint8_t slave1_nack              : 1;
+  uint8_t slave2_nack              : 1;
+  uint8_t slave3_nack              : 1;
+  uint8_t wr_once_done             : 1;
+#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
+  uint8_t wr_once_done             : 1;
+  uint8_t slave3_nack              : 1;
+  uint8_t slave2_nack              : 1;
+  uint8_t slave1_nack              : 1;
+  uint8_t slave0_nack              : 1;
+  uint8_t not_used_01              : 2;
+  uint8_t sens_hub_endop           : 1;
+#endif /* DRV_BYTE_ORDER */
+} lsm6dso_status_master_t;
+
+#define LSM6DSO_START_FSM_ADD                0x0400U
+
+/**
+  * @defgroup LSM6DSO_Register_Union
+  * @brief    This union group all the registers having a bit-field
+  *           description.
+  *           This union is useful but it's not needed by the driver.
+  *
+  *           REMOVING this union you are compliant with:
+  *           MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
+  *
+  * @{
+  *
+  */
+typedef union
+{
+  lsm6dso_func_cfg_access_t               func_cfg_access;
+  lsm6dso_pin_ctrl_t                      pin_ctrl;
+  lsm6dso_fifo_ctrl1_t                    fifo_ctrl1;
+  lsm6dso_fifo_ctrl2_t                    fifo_ctrl2;
+  lsm6dso_fifo_ctrl3_t                    fifo_ctrl3;
+  lsm6dso_fifo_ctrl4_t                    fifo_ctrl4;
+  lsm6dso_counter_bdr_reg1_t              counter_bdr_reg1;
+  lsm6dso_counter_bdr_reg2_t              counter_bdr_reg2;
+  lsm6dso_int1_ctrl_t                     int1_ctrl;
+  lsm6dso_int2_ctrl_t                     int2_ctrl;
+  lsm6dso_ctrl1_xl_t                      ctrl1_xl;
+  lsm6dso_ctrl2_g_t                       ctrl2_g;
+  lsm6dso_ctrl3_c_t                       ctrl3_c;
+  lsm6dso_ctrl4_c_t                       ctrl4_c;
+  lsm6dso_ctrl5_c_t                       ctrl5_c;
+  lsm6dso_ctrl6_c_t                       ctrl6_c;
+  lsm6dso_ctrl7_g_t                       ctrl7_g;
+  lsm6dso_ctrl8_xl_t                      ctrl8_xl;
+  lsm6dso_ctrl9_xl_t                      ctrl9_xl;
+  lsm6dso_ctrl10_c_t                      ctrl10_c;
+  lsm6dso_all_int_src_t                   all_int_src;
+  lsm6dso_wake_up_src_t                   wake_up_src;
+  lsm6dso_tap_src_t                       tap_src;
+  lsm6dso_d6d_src_t                       d6d_src;
+  lsm6dso_status_reg_t                    status_reg;
+  lsm6dso_status_spiaux_t                 status_spiaux;
+  lsm6dso_fifo_status1_t                  fifo_status1;
+  lsm6dso_fifo_status2_t                  fifo_status2;
+  lsm6dso_tap_cfg0_t                      tap_cfg0;
+  lsm6dso_tap_cfg1_t                      tap_cfg1;
+  lsm6dso_tap_cfg2_t                      tap_cfg2;
+  lsm6dso_tap_ths_6d_t                    tap_ths_6d;
+  lsm6dso_int_dur2_t                      int_dur2;
+  lsm6dso_wake_up_ths_t                   wake_up_ths;
+  lsm6dso_wake_up_dur_t                   wake_up_dur;
+  lsm6dso_free_fall_t                     free_fall;
+  lsm6dso_md1_cfg_t                       md1_cfg;
+  lsm6dso_md2_cfg_t                       md2_cfg;
+  lsm6dso_i3c_bus_avb_t                   i3c_bus_avb;
+  lsm6dso_internal_freq_fine_t            internal_freq_fine;
+  lsm6dso_int_ois_t                       int_ois;
+  lsm6dso_ctrl1_ois_t                     ctrl1_ois;
+  lsm6dso_ctrl2_ois_t                     ctrl2_ois;
+  lsm6dso_ctrl3_ois_t                     ctrl3_ois;
+  lsm6dso_fifo_data_out_tag_t             fifo_data_out_tag;
+  lsm6dso_page_sel_t                      page_sel;
+  lsm6dso_emb_func_en_a_t                 emb_func_en_a;
+  lsm6dso_emb_func_en_b_t                 emb_func_en_b;
+  lsm6dso_page_address_t                  page_address;
+  lsm6dso_page_value_t                    page_value;
+  lsm6dso_emb_func_int1_t                 emb_func_int1;
+  lsm6dso_fsm_int1_a_t                    fsm_int1_a;
+  lsm6dso_fsm_int1_b_t                    fsm_int1_b;
+  lsm6dso_emb_func_int2_t                 emb_func_int2;
+  lsm6dso_fsm_int2_a_t                    fsm_int2_a;
+  lsm6dso_fsm_int2_b_t                    fsm_int2_b;
+  lsm6dso_emb_func_status_t               emb_func_status;
+  lsm6dso_fsm_status_a_t                  fsm_status_a;
+  lsm6dso_fsm_status_b_t                  fsm_status_b;
+  lsm6dso_page_rw_t                       page_rw;
+  lsm6dso_emb_func_fifo_cfg_t              emb_func_fifo_cfg;
+  lsm6dso_fsm_enable_a_t                  fsm_enable_a;
+  lsm6dso_fsm_enable_b_t                  fsm_enable_b;
+  lsm6dso_fsm_long_counter_clear_t        fsm_long_counter_clear;
+  lsm6dso_fsm_outs1_t                     fsm_outs1;
+  lsm6dso_fsm_outs2_t                     fsm_outs2;
+  lsm6dso_fsm_outs3_t                     fsm_outs3;
+  lsm6dso_fsm_outs4_t                     fsm_outs4;
+  lsm6dso_fsm_outs5_t                     fsm_outs5;
+  lsm6dso_fsm_outs6_t                     fsm_outs6;
+  lsm6dso_fsm_outs7_t                     fsm_outs7;
+  lsm6dso_fsm_outs8_t                     fsm_outs8;
+  lsm6dso_fsm_outs9_t                     fsm_outs9;
+  lsm6dso_fsm_outs10_t                    fsm_outs10;
+  lsm6dso_fsm_outs11_t                    fsm_outs11;
+  lsm6dso_fsm_outs12_t                    fsm_outs12;
+  lsm6dso_fsm_outs13_t                    fsm_outs13;
+  lsm6dso_fsm_outs14_t                    fsm_outs14;
+  lsm6dso_fsm_outs15_t                    fsm_outs15;
+  lsm6dso_fsm_outs16_t                    fsm_outs16;
+  lsm6dso_emb_func_odr_cfg_b_t            emb_func_odr_cfg_b;
+  lsm6dso_emb_func_src_t                  emb_func_src;
+  lsm6dso_emb_func_init_a_t               emb_func_init_a;
+  lsm6dso_emb_func_init_b_t               emb_func_init_b;
+  lsm6dso_mag_cfg_a_t                     mag_cfg_a;
+  lsm6dso_mag_cfg_b_t                     mag_cfg_b;
+  lsm6dso_pedo_cmd_reg_t                  pedo_cmd_reg;
+  lsm6dso_sensor_hub_1_t                  sensor_hub_1;
+  lsm6dso_sensor_hub_2_t                  sensor_hub_2;
+  lsm6dso_sensor_hub_3_t                  sensor_hub_3;
+  lsm6dso_sensor_hub_4_t                  sensor_hub_4;
+  lsm6dso_sensor_hub_5_t                  sensor_hub_5;
+  lsm6dso_sensor_hub_6_t                  sensor_hub_6;
+  lsm6dso_sensor_hub_7_t                  sensor_hub_7;
+  lsm6dso_sensor_hub_8_t                  sensor_hub_8;
+  lsm6dso_sensor_hub_9_t                  sensor_hub_9;
+  lsm6dso_sensor_hub_10_t                 sensor_hub_10;
+  lsm6dso_sensor_hub_11_t                 sensor_hub_11;
+  lsm6dso_sensor_hub_12_t                 sensor_hub_12;
+  lsm6dso_sensor_hub_13_t                 sensor_hub_13;
+  lsm6dso_sensor_hub_14_t                 sensor_hub_14;
+  lsm6dso_sensor_hub_15_t                 sensor_hub_15;
+  lsm6dso_sensor_hub_16_t                 sensor_hub_16;
+  lsm6dso_sensor_hub_17_t                 sensor_hub_17;
+  lsm6dso_sensor_hub_18_t                 sensor_hub_18;
+  lsm6dso_master_config_t                 master_config;
+  lsm6dso_slv0_add_t                      slv0_add;
+  lsm6dso_slv0_subadd_t                   slv0_subadd;
+  lsm6dso_slv0_config_t                   slv0_config;
+  lsm6dso_slv1_add_t                      slv1_add;
+  lsm6dso_slv1_subadd_t                   slv1_subadd;
+  lsm6dso_slv1_config_t                   slv1_config;
+  lsm6dso_slv2_add_t                      slv2_add;
+  lsm6dso_slv2_subadd_t                   slv2_subadd;
+  lsm6dso_slv2_config_t                   slv2_config;
+  lsm6dso_slv3_add_t                      slv3_add;
+  lsm6dso_slv3_subadd_t                   slv3_subadd;
+  lsm6dso_slv3_config_t                   slv3_config;
+  lsm6dso_datawrite_src_mode_sub_slv0_t   datawrite_src_mode_sub_slv0;
+  lsm6dso_status_master_t                 status_master;
+  bitwise_t                               bitwise;
+  uint8_t                                 byte;
+} lsm6dso_reg_t;
+
+/**
+  * @}
+  *
+  */
+
+float_t lsm6dso_from_fs2_to_mg(int16_t lsb);
+float_t lsm6dso_from_fs4_to_mg(int16_t lsb);
+float_t lsm6dso_from_fs8_to_mg(int16_t lsb);
+float_t lsm6dso_from_fs16_to_mg(int16_t lsb);
+
+float_t lsm6dso_from_fs125_to_mdps(int16_t lsb);
+float_t lsm6dso_from_fs500_to_mdps(int16_t lsb);
+float_t lsm6dso_from_fs250_to_mdps(int16_t lsb);
+float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb);
+float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb);
+
+float_t lsm6dso_from_lsb_to_celsius(int16_t lsb);
+
+float_t lsm6dso_from_lsb_to_nsec(int16_t lsb);
+
+typedef enum
+{
+  LSM6DSO_2g   = 0,
+  LSM6DSO_16g  = 1, /* if XL_FS_MODE = '1' -> LSM6DSO_2g */
+  LSM6DSO_4g   = 2,
+  LSM6DSO_8g   = 3,
+} lsm6dso_fs_xl_t;
+int32_t lsm6dso_xl_full_scale_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_xl_t val);
+int32_t lsm6dso_xl_full_scale_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_xl_t *val);
+
+typedef enum
+{
+  LSM6DSO_XL_ODR_OFF    = 0,
+  LSM6DSO_XL_ODR_12Hz5  = 1,
+  LSM6DSO_XL_ODR_26Hz   = 2,
+  LSM6DSO_XL_ODR_52Hz   = 3,
+  LSM6DSO_XL_ODR_104Hz  = 4,
+  LSM6DSO_XL_ODR_208Hz  = 5,
+  LSM6DSO_XL_ODR_417Hz  = 6,
+  LSM6DSO_XL_ODR_833Hz  = 7,
+  LSM6DSO_XL_ODR_1667Hz = 8,
+  LSM6DSO_XL_ODR_3333Hz = 9,
+  LSM6DSO_XL_ODR_6667Hz = 10,
+  LSM6DSO_XL_ODR_1Hz6   = 11, /* (low power only) */
+} lsm6dso_odr_xl_t;
+int32_t lsm6dso_xl_data_rate_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_xl_t val);
+int32_t lsm6dso_xl_data_rate_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_xl_t *val);
+
+typedef enum
+{
+  LSM6DSO_250dps   = 0,
+  LSM6DSO_125dps   = 1,
+  LSM6DSO_500dps   = 2,
+  LSM6DSO_1000dps  = 4,
+  LSM6DSO_2000dps  = 6,
+} lsm6dso_fs_g_t;
+int32_t lsm6dso_gy_full_scale_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_g_t val);
+int32_t lsm6dso_gy_full_scale_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_fs_g_t *val);
+
+typedef enum
+{
+  LSM6DSO_GY_ODR_OFF    = 0,
+  LSM6DSO_GY_ODR_12Hz5  = 1,
+  LSM6DSO_GY_ODR_26Hz   = 2,
+  LSM6DSO_GY_ODR_52Hz   = 3,
+  LSM6DSO_GY_ODR_104Hz  = 4,
+  LSM6DSO_GY_ODR_208Hz  = 5,
+  LSM6DSO_GY_ODR_417Hz  = 6,
+  LSM6DSO_GY_ODR_833Hz  = 7,
+  LSM6DSO_GY_ODR_1667Hz = 8,
+  LSM6DSO_GY_ODR_3333Hz = 9,
+  LSM6DSO_GY_ODR_6667Hz = 10,
+} lsm6dso_odr_g_t;
+int32_t lsm6dso_gy_data_rate_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_g_t val);
+int32_t lsm6dso_gy_data_rate_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_odr_g_t *val);
+
+int32_t lsm6dso_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_block_data_update_get(stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_LSb_1mg  = 0,
+  LSM6DSO_LSb_16mg = 1,
+} lsm6dso_usr_off_w_t;
+int32_t lsm6dso_xl_offset_weight_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_usr_off_w_t val);
+int32_t lsm6dso_xl_offset_weight_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_usr_off_w_t *val);
+
+typedef enum
+{
+  LSM6DSO_HIGH_PERFORMANCE_MD  = 0,
+  LSM6DSO_LOW_NORMAL_POWER_MD  = 1,
+  LSM6DSO_ULTRA_LOW_POWER_MD   = 2,
+} lsm6dso_xl_hm_mode_t;
+int32_t lsm6dso_xl_power_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_xl_hm_mode_t val);
+int32_t lsm6dso_xl_power_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_xl_hm_mode_t *val);
+
+typedef enum
+{
+  LSM6DSO_GY_HIGH_PERFORMANCE  = 0,
+  LSM6DSO_GY_NORMAL            = 1,
+} lsm6dso_g_hm_mode_t;
+int32_t lsm6dso_gy_power_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_g_hm_mode_t val);
+int32_t lsm6dso_gy_power_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_g_hm_mode_t *val);
+
+int32_t lsm6dso_status_reg_get(stmdev_ctx_t *ctx,
+                               lsm6dso_status_reg_t *val);
+
+int32_t lsm6dso_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6dso_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6dso_temp_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val);
+
+int32_t lsm6dso_xl_usr_offset_x_set(stmdev_ctx_t *ctx, uint8_t *buff);
+int32_t lsm6dso_xl_usr_offset_x_get(stmdev_ctx_t *ctx, uint8_t *buff);
+
+int32_t lsm6dso_xl_usr_offset_y_set(stmdev_ctx_t *ctx, uint8_t *buff);
+int32_t lsm6dso_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff);
+
+int32_t lsm6dso_xl_usr_offset_z_set(stmdev_ctx_t *ctx, uint8_t *buff);
+int32_t lsm6dso_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff);
+
+int32_t lsm6dso_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_timestamp_rst(stmdev_ctx_t *ctx);
+
+int32_t lsm6dso_timestamp_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val);
+
+typedef enum
+{
+  LSM6DSO_NO_ROUND      = 0,
+  LSM6DSO_ROUND_XL      = 1,
+  LSM6DSO_ROUND_GY      = 2,
+  LSM6DSO_ROUND_GY_XL   = 3,
+} lsm6dso_rounding_t;
+int32_t lsm6dso_rounding_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_rounding_t val);
+int32_t lsm6dso_rounding_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_rounding_t *val);
+
+int32_t lsm6dso_temperature_raw_get(stmdev_ctx_t *ctx,  int16_t *val);
+
+int32_t lsm6dso_angular_rate_raw_get(stmdev_ctx_t *ctx,
+                                     int16_t *val);
+
+int32_t lsm6dso_acceleration_raw_get(stmdev_ctx_t *ctx,
+                                     int16_t *val);
+
+int32_t lsm6dso_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
+
+int32_t lsm6dso_number_of_steps_get(stmdev_ctx_t *ctx, uint16_t *val);
+
+int32_t lsm6dso_steps_reset(stmdev_ctx_t *ctx);
+
+int32_t lsm6dso_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_USER_BANK           = 0,
+  LSM6DSO_SENSOR_HUB_BANK     = 1,
+  LSM6DSO_EMBEDDED_FUNC_BANK  = 2,
+} lsm6dso_reg_access_t;
+int32_t lsm6dso_mem_bank_set(stmdev_ctx_t *ctx,
+                             lsm6dso_reg_access_t val);
+int32_t lsm6dso_mem_bank_get(stmdev_ctx_t *ctx,
+                             lsm6dso_reg_access_t *val);
+
+int32_t lsm6dso_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address,
+                                 uint8_t *val);
+int32_t lsm6dso_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
+                                uint8_t *val);
+int32_t lsm6dso_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
+                            uint8_t *buf, uint8_t len);
+int32_t lsm6dso_ln_pg_read(stmdev_ctx_t *ctx, uint16_t address,
+                           uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_DRDY_LATCHED = 0,
+  LSM6DSO_DRDY_PULSED  = 1,
+} lsm6dso_dataready_pulsed_t;
+int32_t lsm6dso_data_ready_mode_set(stmdev_ctx_t *ctx,
+                                    lsm6dso_dataready_pulsed_t val);
+int32_t lsm6dso_data_ready_mode_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_dataready_pulsed_t *val);
+
+int32_t lsm6dso_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff);
+
+int32_t lsm6dso_reset_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_boot_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_boot_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_XL_ST_DISABLE  = 0,
+  LSM6DSO_XL_ST_POSITIVE = 1,
+  LSM6DSO_XL_ST_NEGATIVE = 2,
+} lsm6dso_st_xl_t;
+int32_t lsm6dso_xl_self_test_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_xl_t val);
+int32_t lsm6dso_xl_self_test_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_xl_t *val);
+
+typedef enum
+{
+  LSM6DSO_GY_ST_DISABLE  = 0,
+  LSM6DSO_GY_ST_POSITIVE = 1,
+  LSM6DSO_GY_ST_NEGATIVE = 3,
+} lsm6dso_st_g_t;
+int32_t lsm6dso_gy_self_test_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_g_t val);
+int32_t lsm6dso_gy_self_test_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_g_t *val);
+
+int32_t lsm6dso_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_filter_settling_mask_set(stmdev_ctx_t *ctx,
+                                         uint8_t val);
+int32_t lsm6dso_filter_settling_mask_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_ULTRA_LIGHT  = 0,
+  LSM6DSO_VERY_LIGHT   = 1,
+  LSM6DSO_LIGHT        = 2,
+  LSM6DSO_MEDIUM       = 3,
+  LSM6DSO_STRONG       = 4, /* not available for data rate > 1k670Hz */
+  LSM6DSO_VERY_STRONG  = 5, /* not available for data rate > 1k670Hz */
+  LSM6DSO_AGGRESSIVE   = 6, /* not available for data rate > 1k670Hz */
+  LSM6DSO_XTREME       = 7, /* not available for data rate > 1k670Hz */
+} lsm6dso_ftype_t;
+int32_t lsm6dso_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_ftype_t val);
+int32_t lsm6dso_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_ftype_t *val);
+
+int32_t lsm6dso_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_HP_PATH_DISABLE_ON_OUT    = 0x00,
+  LSM6DSO_SLOPE_ODR_DIV_4           = 0x10,
+  LSM6DSO_HP_ODR_DIV_10             = 0x11,
+  LSM6DSO_HP_ODR_DIV_20             = 0x12,
+  LSM6DSO_HP_ODR_DIV_45             = 0x13,
+  LSM6DSO_HP_ODR_DIV_100            = 0x14,
+  LSM6DSO_HP_ODR_DIV_200            = 0x15,
+  LSM6DSO_HP_ODR_DIV_400            = 0x16,
+  LSM6DSO_HP_ODR_DIV_800            = 0x17,
+  LSM6DSO_HP_REF_MD_ODR_DIV_10      = 0x31,
+  LSM6DSO_HP_REF_MD_ODR_DIV_20      = 0x32,
+  LSM6DSO_HP_REF_MD_ODR_DIV_45      = 0x33,
+  LSM6DSO_HP_REF_MD_ODR_DIV_100     = 0x34,
+  LSM6DSO_HP_REF_MD_ODR_DIV_200     = 0x35,
+  LSM6DSO_HP_REF_MD_ODR_DIV_400     = 0x36,
+  LSM6DSO_HP_REF_MD_ODR_DIV_800     = 0x37,
+  LSM6DSO_LP_ODR_DIV_10             = 0x01,
+  LSM6DSO_LP_ODR_DIV_20             = 0x02,
+  LSM6DSO_LP_ODR_DIV_45             = 0x03,
+  LSM6DSO_LP_ODR_DIV_100            = 0x04,
+  LSM6DSO_LP_ODR_DIV_200            = 0x05,
+  LSM6DSO_LP_ODR_DIV_400            = 0x06,
+  LSM6DSO_LP_ODR_DIV_800            = 0x07,
+} lsm6dso_hp_slope_xl_en_t;
+int32_t lsm6dso_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_hp_slope_xl_en_t val);
+int32_t lsm6dso_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_hp_slope_xl_en_t *val);
+
+int32_t lsm6dso_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_USE_SLOPE = 0,
+  LSM6DSO_USE_HPF   = 1,
+} lsm6dso_slope_fds_t;
+int32_t lsm6dso_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
+                                        lsm6dso_slope_fds_t val);
+int32_t lsm6dso_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
+                                        lsm6dso_slope_fds_t *val);
+
+typedef enum
+{
+  LSM6DSO_HP_FILTER_NONE     = 0x00,
+  LSM6DSO_HP_FILTER_16mHz    = 0x80,
+  LSM6DSO_HP_FILTER_65mHz    = 0x81,
+  LSM6DSO_HP_FILTER_260mHz   = 0x82,
+  LSM6DSO_HP_FILTER_1Hz04    = 0x83,
+} lsm6dso_hpm_g_t;
+int32_t lsm6dso_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_g_t val);
+int32_t lsm6dso_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_g_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_PULL_UP_DISC       = 0,
+  LSM6DSO_AUX_PULL_UP_CONNECT    = 1,
+} lsm6dso_ois_pu_dis_t;
+int32_t lsm6dso_aux_sdo_ocs_mode_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_ois_pu_dis_t val);
+int32_t lsm6dso_aux_sdo_ocs_mode_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_ois_pu_dis_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_ON                    = 1,
+  LSM6DSO_AUX_ON_BY_AUX_INTERFACE   = 0,
+} lsm6dso_ois_on_t;
+int32_t lsm6dso_aux_pw_on_ctrl_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_ois_on_t val);
+int32_t lsm6dso_aux_pw_on_ctrl_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_ois_on_t *val);
+
+typedef enum
+{
+  LSM6DSO_USE_SAME_XL_FS        = 0,
+  LSM6DSO_USE_DIFFERENT_XL_FS   = 1,
+} lsm6dso_xl_fs_mode_t;
+int32_t lsm6dso_aux_xl_fs_mode_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_xl_fs_mode_t val);
+int32_t lsm6dso_aux_xl_fs_mode_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_xl_fs_mode_t *val);
+
+int32_t lsm6dso_aux_status_reg_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_status_spiaux_t *val);
+
+int32_t lsm6dso_aux_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6dso_aux_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6dso_aux_gy_flag_settling_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_XL_DISABLE = 0,
+  LSM6DSO_AUX_XL_POS     = 1,
+  LSM6DSO_AUX_XL_NEG     = 2,
+} lsm6dso_st_xl_ois_t;
+int32_t lsm6dso_aux_xl_self_test_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_xl_ois_t val);
+int32_t lsm6dso_aux_xl_self_test_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_xl_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_DEN_ACTIVE_LOW     = 0,
+  LSM6DSO_AUX_DEN_ACTIVE_HIGH    = 1,
+} lsm6dso_den_lh_ois_t;
+int32_t lsm6dso_aux_den_polarity_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_den_lh_ois_t val);
+int32_t lsm6dso_aux_den_polarity_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_den_lh_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_DEN_DISABLE         = 0,
+  LSM6DSO_AUX_DEN_LEVEL_LATCH     = 3,
+  LSM6DSO_AUX_DEN_LEVEL_TRIG      = 2,
+} lsm6dso_lvl2_ois_t;
+int32_t lsm6dso_aux_den_mode_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_lvl2_ois_t val);
+int32_t lsm6dso_aux_den_mode_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_lvl2_ois_t *val);
+
+int32_t lsm6dso_aux_drdy_on_int2_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_aux_drdy_on_int2_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_DISABLE  = 0,
+  LSM6DSO_MODE_3_GY    = 1,
+  LSM6DSO_MODE_4_GY_XL = 3,
+} lsm6dso_ois_en_spi2_t;
+int32_t lsm6dso_aux_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_ois_en_spi2_t val);
+int32_t lsm6dso_aux_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_ois_en_spi2_t *val);
+
+typedef enum
+{
+  LSM6DSO_250dps_AUX  = 0,
+  LSM6DSO_125dps_AUX  = 1,
+  LSM6DSO_500dps_AUX  = 2,
+  LSM6DSO_1000dps_AUX = 4,
+  LSM6DSO_2000dps_AUX = 6,
+} lsm6dso_fs_g_ois_t;
+int32_t lsm6dso_aux_gy_full_scale_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_g_ois_t val);
+int32_t lsm6dso_aux_gy_full_scale_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_g_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_SPI_4_WIRE = 0,
+  LSM6DSO_AUX_SPI_3_WIRE = 1,
+} lsm6dso_sim_ois_t;
+int32_t lsm6dso_aux_spi_mode_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_sim_ois_t val);
+int32_t lsm6dso_aux_spi_mode_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_sim_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_351Hz39 = 0,
+  LSM6DSO_236Hz63 = 1,
+  LSM6DSO_172Hz70 = 2,
+  LSM6DSO_937Hz91 = 3,
+} lsm6dso_ftype_ois_t;
+int32_t lsm6dso_aux_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
+                                         lsm6dso_ftype_ois_t val);
+int32_t lsm6dso_aux_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
+                                         lsm6dso_ftype_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_HP_DISABLE = 0x00,
+  LSM6DSO_AUX_HP_Hz016   = 0x10,
+  LSM6DSO_AUX_HP_Hz065   = 0x11,
+  LSM6DSO_AUX_HP_Hz260   = 0x12,
+  LSM6DSO_AUX_HP_1Hz040  = 0x13,
+} lsm6dso_hpm_ois_t;
+int32_t lsm6dso_aux_gy_hp_bandwidth_set(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_ois_t val);
+int32_t lsm6dso_aux_gy_hp_bandwidth_get(stmdev_ctx_t *ctx,
+                                        lsm6dso_hpm_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_ENABLE_CLAMP  = 0,
+  LSM6DSO_DISABLE_CLAMP = 1,
+} lsm6dso_st_ois_clampdis_t;
+int32_t lsm6dso_aux_gy_clamp_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_ois_clampdis_t val);
+int32_t lsm6dso_aux_gy_clamp_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_st_ois_clampdis_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_GY_DISABLE = 0,
+  LSM6DSO_AUX_GY_POS     = 1,
+  LSM6DSO_AUX_GY_NEG     = 3,
+} lsm6dso_st_ois_t;
+int32_t lsm6dso_aux_gy_self_test_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_ois_t val);
+int32_t lsm6dso_aux_gy_self_test_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_st_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_289Hz = 0,
+  LSM6DSO_258Hz = 1,
+  LSM6DSO_120Hz = 2,
+  LSM6DSO_65Hz2 = 3,
+  LSM6DSO_33Hz2 = 4,
+  LSM6DSO_16Hz6 = 5,
+  LSM6DSO_8Hz30 = 6,
+  LSM6DSO_4Hz15 = 7,
+} lsm6dso_filter_xl_conf_ois_t;
+int32_t lsm6dso_aux_xl_bandwidth_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_filter_xl_conf_ois_t val);
+int32_t lsm6dso_aux_xl_bandwidth_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_filter_xl_conf_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_AUX_2g  = 0,
+  LSM6DSO_AUX_16g = 1,
+  LSM6DSO_AUX_4g  = 2,
+  LSM6DSO_AUX_8g  = 3,
+} lsm6dso_fs_xl_ois_t;
+int32_t lsm6dso_aux_xl_full_scale_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_xl_ois_t val);
+int32_t lsm6dso_aux_xl_full_scale_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_fs_xl_ois_t *val);
+
+typedef enum
+{
+  LSM6DSO_PULL_UP_DISC       = 0,
+  LSM6DSO_PULL_UP_CONNECT    = 1,
+} lsm6dso_sdo_pu_en_t;
+int32_t lsm6dso_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_sdo_pu_en_t val);
+int32_t lsm6dso_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_sdo_pu_en_t *val);
+
+typedef enum
+{
+  LSM6DSO_SPI_4_WIRE = 0,
+  LSM6DSO_SPI_3_WIRE = 1,
+} lsm6dso_sim_t;
+int32_t lsm6dso_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso_sim_t val);
+int32_t lsm6dso_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso_sim_t *val);
+
+typedef enum
+{
+  LSM6DSO_I2C_ENABLE  = 0,
+  LSM6DSO_I2C_DISABLE = 1,
+} lsm6dso_i2c_disable_t;
+int32_t lsm6dso_i2c_interface_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_i2c_disable_t val);
+int32_t lsm6dso_i2c_interface_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_i2c_disable_t *val);
+
+typedef enum
+{
+  LSM6DSO_I3C_DISABLE         = 0x80,
+  LSM6DSO_I3C_ENABLE_T_50us   = 0x00,
+  LSM6DSO_I3C_ENABLE_T_2us    = 0x01,
+  LSM6DSO_I3C_ENABLE_T_1ms    = 0x02,
+  LSM6DSO_I3C_ENABLE_T_25ms   = 0x03,
+} lsm6dso_i3c_disable_t;
+int32_t lsm6dso_i3c_disable_set(stmdev_ctx_t *ctx,
+                                lsm6dso_i3c_disable_t val);
+int32_t lsm6dso_i3c_disable_get(stmdev_ctx_t *ctx,
+                                lsm6dso_i3c_disable_t *val);
+
+typedef enum
+{
+  LSM6DSO_PULL_DOWN_DISC       = 0,
+  LSM6DSO_PULL_DOWN_CONNECT    = 1,
+} lsm6dso_int1_pd_en_t;
+int32_t lsm6dso_int1_mode_set(stmdev_ctx_t *ctx,
+                              lsm6dso_int1_pd_en_t val);
+int32_t lsm6dso_int1_mode_get(stmdev_ctx_t *ctx,
+                              lsm6dso_int1_pd_en_t *val);
+
+typedef enum
+{
+  LSM6DSO_PUSH_PULL   = 0,
+  LSM6DSO_OPEN_DRAIN  = 1,
+} lsm6dso_pp_od_t;
+int32_t lsm6dso_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso_pp_od_t val);
+int32_t lsm6dso_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso_pp_od_t *val);
+
+typedef enum
+{
+  LSM6DSO_ACTIVE_HIGH = 0,
+  LSM6DSO_ACTIVE_LOW  = 1,
+} lsm6dso_h_lactive_t;
+int32_t lsm6dso_pin_polarity_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_h_lactive_t val);
+int32_t lsm6dso_pin_polarity_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_h_lactive_t *val);
+
+int32_t lsm6dso_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_ALL_INT_PULSED            = 0,
+  LSM6DSO_BASE_LATCHED_EMB_PULSED   = 1,
+  LSM6DSO_BASE_PULSED_EMB_LATCHED   = 2,
+  LSM6DSO_ALL_INT_LATCHED           = 3,
+} lsm6dso_lir_t;
+int32_t lsm6dso_int_notification_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_lir_t val);
+int32_t lsm6dso_int_notification_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_lir_t *val);
+
+typedef enum
+{
+  LSM6DSO_LSb_FS_DIV_64       = 0,
+  LSM6DSO_LSb_FS_DIV_256      = 1,
+} lsm6dso_wake_ths_w_t;
+int32_t lsm6dso_wkup_ths_weight_set(stmdev_ctx_t *ctx,
+                                    lsm6dso_wake_ths_w_t val);
+int32_t lsm6dso_wkup_ths_weight_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_wake_ths_w_t *val);
+
+int32_t lsm6dso_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
+                                          uint8_t val);
+int32_t lsm6dso_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
+                                          uint8_t *val);
+
+int32_t lsm6dso_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0,
+  LSM6DSO_DRIVE_SLEEP_STATUS    = 1,
+} lsm6dso_sleep_status_on_int_t;
+int32_t lsm6dso_act_pin_notification_set(stmdev_ctx_t *ctx,
+                                         lsm6dso_sleep_status_on_int_t val);
+int32_t lsm6dso_act_pin_notification_get(stmdev_ctx_t *ctx,
+                                         lsm6dso_sleep_status_on_int_t *val);
+
+typedef enum
+{
+  LSM6DSO_XL_AND_GY_NOT_AFFECTED      = 0,
+  LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED    = 1,
+  LSM6DSO_XL_12Hz5_GY_SLEEP           = 2,
+  LSM6DSO_XL_12Hz5_GY_PD              = 3,
+} lsm6dso_inact_en_t;
+int32_t lsm6dso_act_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_inact_en_t val);
+int32_t lsm6dso_act_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_inact_en_t *val);
+
+int32_t lsm6dso_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_tap_detection_on_z_set(stmdev_ctx_t *ctx,
+                                       uint8_t val);
+int32_t lsm6dso_tap_detection_on_z_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6dso_tap_detection_on_y_set(stmdev_ctx_t *ctx,
+                                       uint8_t val);
+int32_t lsm6dso_tap_detection_on_y_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6dso_tap_detection_on_x_set(stmdev_ctx_t *ctx,
+                                       uint8_t val);
+int32_t lsm6dso_tap_detection_on_x_get(stmdev_ctx_t *ctx,
+                                       uint8_t *val);
+
+int32_t lsm6dso_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_XYZ = 0,
+  LSM6DSO_YXZ = 1,
+  LSM6DSO_XZY = 2,
+  LSM6DSO_ZYX = 3,
+  LSM6DSO_YZX = 5,
+  LSM6DSO_ZXY = 6,
+} lsm6dso_tap_priority_t;
+int32_t lsm6dso_tap_axis_priority_set(stmdev_ctx_t *ctx,
+                                      lsm6dso_tap_priority_t val);
+int32_t lsm6dso_tap_axis_priority_get(stmdev_ctx_t *ctx,
+                                      lsm6dso_tap_priority_t *val);
+
+int32_t lsm6dso_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_tap_threshold_y_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_tap_threshold_z_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_ONLY_SINGLE = 0,
+  LSM6DSO_BOTH_SINGLE_DOUBLE = 1,
+} lsm6dso_single_double_tap_t;
+int32_t lsm6dso_tap_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_single_double_tap_t val);
+int32_t lsm6dso_tap_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_single_double_tap_t *val);
+
+typedef enum
+{
+  LSM6DSO_DEG_80  = 0,
+  LSM6DSO_DEG_70  = 1,
+  LSM6DSO_DEG_60  = 2,
+  LSM6DSO_DEG_50  = 3,
+} lsm6dso_sixd_ths_t;
+int32_t lsm6dso_6d_threshold_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_sixd_ths_t val);
+int32_t lsm6dso_6d_threshold_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_sixd_ths_t *val);
+
+int32_t lsm6dso_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_FF_TSH_156mg = 0,
+  LSM6DSO_FF_TSH_219mg = 1,
+  LSM6DSO_FF_TSH_250mg = 2,
+  LSM6DSO_FF_TSH_312mg = 3,
+  LSM6DSO_FF_TSH_344mg = 4,
+  LSM6DSO_FF_TSH_406mg = 5,
+  LSM6DSO_FF_TSH_469mg = 6,
+  LSM6DSO_FF_TSH_500mg = 7,
+} lsm6dso_ff_ths_t;
+int32_t lsm6dso_ff_threshold_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_ff_ths_t val);
+int32_t lsm6dso_ff_threshold_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_ff_ths_t *val);
+
+int32_t lsm6dso_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val);
+int32_t lsm6dso_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val);
+
+int32_t lsm6dso_compression_algo_init_set(stmdev_ctx_t *ctx,
+                                          uint8_t val);
+int32_t lsm6dso_compression_algo_init_get(stmdev_ctx_t *ctx,
+                                          uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_CMP_DISABLE  = 0x00,
+  LSM6DSO_CMP_ALWAYS   = 0x04,
+  LSM6DSO_CMP_8_TO_1   = 0x05,
+  LSM6DSO_CMP_16_TO_1  = 0x06,
+  LSM6DSO_CMP_32_TO_1  = 0x07,
+} lsm6dso_uncoptr_rate_t;
+int32_t lsm6dso_compression_algo_set(stmdev_ctx_t *ctx,
+                                     lsm6dso_uncoptr_rate_t val);
+int32_t lsm6dso_compression_algo_get(stmdev_ctx_t *ctx,
+                                     lsm6dso_uncoptr_rate_t *val);
+
+int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
+                                              uint8_t val);
+int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
+                                              uint8_t *val);
+
+int32_t lsm6dso_compression_algo_real_time_set(stmdev_ctx_t *ctx,
+                                               uint8_t val);
+int32_t lsm6dso_compression_algo_real_time_get(stmdev_ctx_t *ctx,
+                                               uint8_t *val);
+
+int32_t lsm6dso_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_XL_NOT_BATCHED       =  0,
+  LSM6DSO_XL_BATCHED_AT_12Hz5   =  1,
+  LSM6DSO_XL_BATCHED_AT_26Hz    =  2,
+  LSM6DSO_XL_BATCHED_AT_52Hz    =  3,
+  LSM6DSO_XL_BATCHED_AT_104Hz   =  4,
+  LSM6DSO_XL_BATCHED_AT_208Hz   =  5,
+  LSM6DSO_XL_BATCHED_AT_417Hz   =  6,
+  LSM6DSO_XL_BATCHED_AT_833Hz   =  7,
+  LSM6DSO_XL_BATCHED_AT_1667Hz  =  8,
+  LSM6DSO_XL_BATCHED_AT_3333Hz  =  9,
+  LSM6DSO_XL_BATCHED_AT_6667Hz  = 10,
+  LSM6DSO_XL_BATCHED_AT_6Hz5    = 11,
+} lsm6dso_bdr_xl_t;
+int32_t lsm6dso_fifo_xl_batch_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_xl_t val);
+int32_t lsm6dso_fifo_xl_batch_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_xl_t *val);
+
+typedef enum
+{
+  LSM6DSO_GY_NOT_BATCHED         = 0,
+  LSM6DSO_GY_BATCHED_AT_12Hz5    = 1,
+  LSM6DSO_GY_BATCHED_AT_26Hz     = 2,
+  LSM6DSO_GY_BATCHED_AT_52Hz     = 3,
+  LSM6DSO_GY_BATCHED_AT_104Hz    = 4,
+  LSM6DSO_GY_BATCHED_AT_208Hz    = 5,
+  LSM6DSO_GY_BATCHED_AT_417Hz    = 6,
+  LSM6DSO_GY_BATCHED_AT_833Hz    = 7,
+  LSM6DSO_GY_BATCHED_AT_1667Hz   = 8,
+  LSM6DSO_GY_BATCHED_AT_3333Hz   = 9,
+  LSM6DSO_GY_BATCHED_AT_6667Hz   = 10,
+  LSM6DSO_GY_BATCHED_AT_6Hz5     = 11,
+} lsm6dso_bdr_gy_t;
+int32_t lsm6dso_fifo_gy_batch_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_gy_t val);
+int32_t lsm6dso_fifo_gy_batch_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_bdr_gy_t *val);
+
+typedef enum
+{
+  LSM6DSO_BYPASS_MODE             = 0,
+  LSM6DSO_FIFO_MODE               = 1,
+  LSM6DSO_STREAM_TO_FIFO_MODE     = 3,
+  LSM6DSO_BYPASS_TO_STREAM_MODE   = 4,
+  LSM6DSO_STREAM_MODE             = 6,
+  LSM6DSO_BYPASS_TO_FIFO_MODE     = 7,
+} lsm6dso_fifo_mode_t;
+int32_t lsm6dso_fifo_mode_set(stmdev_ctx_t *ctx,
+                              lsm6dso_fifo_mode_t val);
+int32_t lsm6dso_fifo_mode_get(stmdev_ctx_t *ctx,
+                              lsm6dso_fifo_mode_t *val);
+
+typedef enum
+{
+  LSM6DSO_TEMP_NOT_BATCHED        = 0,
+  LSM6DSO_TEMP_BATCHED_AT_1Hz6    = 1,
+  LSM6DSO_TEMP_BATCHED_AT_12Hz5   = 2,
+  LSM6DSO_TEMP_BATCHED_AT_52Hz    = 3,
+} lsm6dso_odr_t_batch_t;
+int32_t lsm6dso_fifo_temp_batch_set(stmdev_ctx_t *ctx,
+                                    lsm6dso_odr_t_batch_t val);
+int32_t lsm6dso_fifo_temp_batch_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_odr_t_batch_t *val);
+
+typedef enum
+{
+  LSM6DSO_NO_DECIMATION = 0,
+  LSM6DSO_DEC_1         = 1,
+  LSM6DSO_DEC_8         = 2,
+  LSM6DSO_DEC_32        = 3,
+} lsm6dso_odr_ts_batch_t;
+int32_t lsm6dso_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
+                                              lsm6dso_odr_ts_batch_t val);
+int32_t lsm6dso_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
+                                              lsm6dso_odr_ts_batch_t *val);
+
+typedef enum
+{
+  LSM6DSO_XL_BATCH_EVENT   = 0,
+  LSM6DSO_GYRO_BATCH_EVENT = 1,
+} lsm6dso_trig_counter_bdr_t;
+
+typedef enum
+{
+  LSM6DSO_GYRO_NC_TAG    = 1,
+  LSM6DSO_XL_NC_TAG,
+  LSM6DSO_TEMPERATURE_TAG,
+  LSM6DSO_TIMESTAMP_TAG,
+  LSM6DSO_CFG_CHANGE_TAG,
+  LSM6DSO_XL_NC_T_2_TAG,
+  LSM6DSO_XL_NC_T_1_TAG,
+  LSM6DSO_XL_2XC_TAG,
+  LSM6DSO_XL_3XC_TAG,
+  LSM6DSO_GYRO_NC_T_2_TAG,
+  LSM6DSO_GYRO_NC_T_1_TAG,
+  LSM6DSO_GYRO_2XC_TAG,
+  LSM6DSO_GYRO_3XC_TAG,
+  LSM6DSO_SENSORHUB_SLAVE0_TAG,
+  LSM6DSO_SENSORHUB_SLAVE1_TAG,
+  LSM6DSO_SENSORHUB_SLAVE2_TAG,
+  LSM6DSO_SENSORHUB_SLAVE3_TAG,
+  LSM6DSO_STEP_CPUNTER_TAG,
+  LSM6DSO_GAME_ROTATION_TAG,
+  LSM6DSO_GEOMAG_ROTATION_TAG,
+  LSM6DSO_ROTATION_TAG,
+  LSM6DSO_SENSORHUB_NACK_TAG  = 0x19,
+} lsm6dso_fifo_tag_t;
+int32_t lsm6dso_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
+                                         lsm6dso_trig_counter_bdr_t val);
+int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
+                                         lsm6dso_trig_counter_bdr_t *val);
+
+int32_t lsm6dso_rst_batch_counter_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_rst_batch_counter_get(stmdev_ctx_t *ctx,
+                                      uint8_t *val);
+
+int32_t lsm6dso_batch_counter_threshold_set(stmdev_ctx_t *ctx,
+                                            uint16_t val);
+int32_t lsm6dso_batch_counter_threshold_get(stmdev_ctx_t *ctx,
+                                            uint16_t *val);
+
+int32_t lsm6dso_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val);
+
+int32_t lsm6dso_fifo_status_get(stmdev_ctx_t *ctx,
+                                lsm6dso_fifo_status2_t *val);
+
+int32_t lsm6dso_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
+                                    lsm6dso_fifo_tag_t *val);
+
+int32_t lsm6dso_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_fifo_pedo_batch_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_sh_batch_slave_0_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_sh_batch_slave_0_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_sh_batch_slave_1_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_sh_batch_slave_1_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_sh_batch_slave_2_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_DEN_DISABLE    = 0,
+  LSM6DSO_LEVEL_FIFO     = 6,
+  LSM6DSO_LEVEL_LETCHED  = 3,
+  LSM6DSO_LEVEL_TRIGGER  = 2,
+  LSM6DSO_EDGE_TRIGGER   = 4,
+} lsm6dso_den_mode_t;
+int32_t lsm6dso_den_mode_set(stmdev_ctx_t *ctx,
+                             lsm6dso_den_mode_t val);
+int32_t lsm6dso_den_mode_get(stmdev_ctx_t *ctx,
+                             lsm6dso_den_mode_t *val);
+
+typedef enum
+{
+  LSM6DSO_DEN_ACT_LOW  = 0,
+  LSM6DSO_DEN_ACT_HIGH = 1,
+} lsm6dso_den_lh_t;
+int32_t lsm6dso_den_polarity_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_den_lh_t val);
+int32_t lsm6dso_den_polarity_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_den_lh_t *val);
+
+typedef enum
+{
+  LSM6DSO_STAMP_IN_GY_DATA     = 0,
+  LSM6DSO_STAMP_IN_XL_DATA     = 1,
+  LSM6DSO_STAMP_IN_GY_XL_DATA  = 2,
+} lsm6dso_den_xl_g_t;
+int32_t lsm6dso_den_enable_set(stmdev_ctx_t *ctx,
+                               lsm6dso_den_xl_g_t val);
+int32_t lsm6dso_den_enable_get(stmdev_ctx_t *ctx,
+                               lsm6dso_den_xl_g_t *val);
+
+int32_t lsm6dso_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_PEDO_BASE_MODE            = 0x00,
+  LSM6DSO_FALSE_STEP_REJ            = 0x10,
+  LSM6DSO_FALSE_STEP_REJ_ADV_MODE   = 0x30,
+} lsm6dso_pedo_md_t;
+int32_t lsm6dso_pedo_sens_set(stmdev_ctx_t *ctx,
+                              lsm6dso_pedo_md_t val);
+int32_t lsm6dso_pedo_sens_get(stmdev_ctx_t *ctx,
+                              lsm6dso_pedo_md_t *val);
+
+int32_t lsm6dso_pedo_step_detect_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_pedo_debounce_steps_set(stmdev_ctx_t *ctx,
+                                        uint8_t *buff);
+int32_t lsm6dso_pedo_debounce_steps_get(stmdev_ctx_t *ctx,
+                                        uint8_t *buff);
+
+int32_t lsm6dso_pedo_steps_period_set(stmdev_ctx_t *ctx,
+                                      uint16_t val);
+int32_t lsm6dso_pedo_steps_period_get(stmdev_ctx_t *ctx,
+                                      uint16_t *val);
+
+typedef enum
+{
+  LSM6DSO_EVERY_STEP     = 0,
+  LSM6DSO_COUNT_OVERFLOW = 1,
+} lsm6dso_carry_count_en_t;
+int32_t lsm6dso_pedo_int_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_carry_count_en_t val);
+int32_t lsm6dso_pedo_int_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_carry_count_en_t *val);
+
+int32_t lsm6dso_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6dso_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                         uint8_t *val);
+
+int32_t lsm6dso_mag_sensitivity_set(stmdev_ctx_t *ctx, uint16_t val);
+int32_t lsm6dso_mag_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val);
+
+int32_t lsm6dso_mag_offset_set(stmdev_ctx_t *ctx, int16_t *val);
+int32_t lsm6dso_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val);
+
+int32_t lsm6dso_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val);
+int32_t lsm6dso_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val);
+
+typedef enum
+{
+  LSM6DSO_Z_EQ_Y     = 0,
+  LSM6DSO_Z_EQ_MIN_Y = 1,
+  LSM6DSO_Z_EQ_X     = 2,
+  LSM6DSO_Z_EQ_MIN_X = 3,
+  LSM6DSO_Z_EQ_MIN_Z = 4,
+  LSM6DSO_Z_EQ_Z     = 5,
+} lsm6dso_mag_z_axis_t;
+int32_t lsm6dso_mag_z_orient_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_z_axis_t val);
+int32_t lsm6dso_mag_z_orient_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_z_axis_t *val);
+
+typedef enum
+{
+  LSM6DSO_Y_EQ_Y     = 0,
+  LSM6DSO_Y_EQ_MIN_Y = 1,
+  LSM6DSO_Y_EQ_X     = 2,
+  LSM6DSO_Y_EQ_MIN_X = 3,
+  LSM6DSO_Y_EQ_MIN_Z = 4,
+  LSM6DSO_Y_EQ_Z     = 5,
+} lsm6dso_mag_y_axis_t;
+int32_t lsm6dso_mag_y_orient_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_y_axis_t val);
+int32_t lsm6dso_mag_y_orient_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_y_axis_t *val);
+
+typedef enum
+{
+  LSM6DSO_X_EQ_Y     = 0,
+  LSM6DSO_X_EQ_MIN_Y = 1,
+  LSM6DSO_X_EQ_X     = 2,
+  LSM6DSO_X_EQ_MIN_X = 3,
+  LSM6DSO_X_EQ_MIN_Z = 4,
+  LSM6DSO_X_EQ_Z     = 5,
+} lsm6dso_mag_x_axis_t;
+int32_t lsm6dso_mag_x_orient_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_x_axis_t val);
+int32_t lsm6dso_mag_x_orient_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_mag_x_axis_t *val);
+
+int32_t lsm6dso_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
+                                             uint8_t *val);
+
+typedef struct
+{
+  lsm6dso_fsm_enable_a_t          fsm_enable_a;
+  lsm6dso_fsm_enable_b_t          fsm_enable_b;
+} lsm6dso_emb_fsm_enable_t;
+int32_t lsm6dso_fsm_enable_set(stmdev_ctx_t *ctx,
+                               lsm6dso_emb_fsm_enable_t *val);
+int32_t lsm6dso_fsm_enable_get(stmdev_ctx_t *ctx,
+                               lsm6dso_emb_fsm_enable_t *val);
+
+int32_t lsm6dso_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val);
+int32_t lsm6dso_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val);
+
+typedef enum
+{
+  LSM6DSO_LC_NORMAL     = 0,
+  LSM6DSO_LC_CLEAR      = 1,
+  LSM6DSO_LC_CLEAR_DONE = 2,
+} lsm6dso_fsm_lc_clr_t;
+int32_t lsm6dso_long_clr_set(stmdev_ctx_t *ctx,
+                             lsm6dso_fsm_lc_clr_t val);
+int32_t lsm6dso_long_clr_get(stmdev_ctx_t *ctx,
+                             lsm6dso_fsm_lc_clr_t *val);
+
+typedef struct
+{
+  lsm6dso_fsm_outs1_t    fsm_outs1;
+  lsm6dso_fsm_outs2_t    fsm_outs2;
+  lsm6dso_fsm_outs3_t    fsm_outs3;
+  lsm6dso_fsm_outs4_t    fsm_outs4;
+  lsm6dso_fsm_outs5_t    fsm_outs5;
+  lsm6dso_fsm_outs6_t    fsm_outs6;
+  lsm6dso_fsm_outs7_t    fsm_outs7;
+  lsm6dso_fsm_outs8_t    fsm_outs8;
+  lsm6dso_fsm_outs9_t    fsm_outs9;
+  lsm6dso_fsm_outs10_t   fsm_outs10;
+  lsm6dso_fsm_outs11_t   fsm_outs11;
+  lsm6dso_fsm_outs12_t   fsm_outs12;
+  lsm6dso_fsm_outs13_t   fsm_outs13;
+  lsm6dso_fsm_outs14_t   fsm_outs14;
+  lsm6dso_fsm_outs15_t   fsm_outs15;
+  lsm6dso_fsm_outs16_t   fsm_outs16;
+} lsm6dso_fsm_out_t;
+int32_t lsm6dso_fsm_out_get(stmdev_ctx_t *ctx,
+                            lsm6dso_fsm_out_t *val);
+
+typedef enum
+{
+  LSM6DSO_ODR_FSM_12Hz5 = 0,
+  LSM6DSO_ODR_FSM_26Hz  = 1,
+  LSM6DSO_ODR_FSM_52Hz  = 2,
+  LSM6DSO_ODR_FSM_104Hz = 3,
+} lsm6dso_fsm_odr_t;
+int32_t lsm6dso_fsm_data_rate_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_fsm_odr_t val);
+int32_t lsm6dso_fsm_data_rate_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_fsm_odr_t *val);
+
+int32_t lsm6dso_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+int32_t lsm6dso_long_cnt_int_value_set(stmdev_ctx_t *ctx,
+                                       uint16_t val);
+int32_t lsm6dso_long_cnt_int_value_get(stmdev_ctx_t *ctx,
+                                       uint16_t *val);
+
+int32_t lsm6dso_fsm_number_of_programs_set(stmdev_ctx_t *ctx,
+                                           uint8_t val);
+int32_t lsm6dso_fsm_number_of_programs_get(stmdev_ctx_t *ctx,
+                                           uint8_t *val);
+
+int32_t lsm6dso_fsm_start_address_set(stmdev_ctx_t *ctx,
+                                      uint16_t val);
+int32_t lsm6dso_fsm_start_address_get(stmdev_ctx_t *ctx,
+                                      uint16_t *val);
+
+int32_t lsm6dso_sh_read_data_raw_get(stmdev_ctx_t *ctx, uint8_t *val,
+                                     uint8_t len);
+
+typedef enum
+{
+  LSM6DSO_SLV_0       = 0,
+  LSM6DSO_SLV_0_1     = 1,
+  LSM6DSO_SLV_0_1_2   = 2,
+  LSM6DSO_SLV_0_1_2_3 = 3,
+} lsm6dso_aux_sens_on_t;
+int32_t lsm6dso_sh_slave_connected_set(stmdev_ctx_t *ctx,
+                                       lsm6dso_aux_sens_on_t val);
+int32_t lsm6dso_sh_slave_connected_get(stmdev_ctx_t *ctx,
+                                       lsm6dso_aux_sens_on_t *val);
+
+int32_t lsm6dso_sh_master_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_EXT_PULL_UP      = 0,
+  LSM6DSO_INTERNAL_PULL_UP = 1,
+} lsm6dso_shub_pu_en_t;
+int32_t lsm6dso_sh_pin_mode_set(stmdev_ctx_t *ctx,
+                                lsm6dso_shub_pu_en_t val);
+int32_t lsm6dso_sh_pin_mode_get(stmdev_ctx_t *ctx,
+                                lsm6dso_shub_pu_en_t *val);
+
+int32_t lsm6dso_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val);
+int32_t lsm6dso_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_EXT_ON_INT2_PIN = 1,
+  LSM6DSO_XL_GY_DRDY      = 0,
+} lsm6dso_start_config_t;
+int32_t lsm6dso_sh_syncro_mode_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_start_config_t val);
+int32_t lsm6dso_sh_syncro_mode_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_start_config_t *val);
+
+typedef enum
+{
+  LSM6DSO_EACH_SH_CYCLE    = 0,
+  LSM6DSO_ONLY_FIRST_CYCLE = 1,
+} lsm6dso_write_once_t;
+int32_t lsm6dso_sh_write_mode_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_write_once_t val);
+int32_t lsm6dso_sh_write_mode_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_write_once_t *val);
+
+int32_t lsm6dso_sh_reset_set(stmdev_ctx_t *ctx);
+int32_t lsm6dso_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
+
+typedef enum
+{
+  LSM6DSO_SH_ODR_104Hz = 0,
+  LSM6DSO_SH_ODR_52Hz  = 1,
+  LSM6DSO_SH_ODR_26Hz  = 2,
+  LSM6DSO_SH_ODR_13Hz  = 3,
+} lsm6dso_shub_odr_t;
+int32_t lsm6dso_sh_data_rate_set(stmdev_ctx_t *ctx,
+                                 lsm6dso_shub_odr_t val);
+int32_t lsm6dso_sh_data_rate_get(stmdev_ctx_t *ctx,
+                                 lsm6dso_shub_odr_t *val);
+
+typedef struct
+{
+  uint8_t   slv0_add;
+  uint8_t   slv0_subadd;
+  uint8_t   slv0_data;
+} lsm6dso_sh_cfg_write_t;
+int32_t lsm6dso_sh_cfg_write(stmdev_ctx_t *ctx,
+                             lsm6dso_sh_cfg_write_t *val);
+
+typedef struct
+{
+  uint8_t   slv_add;
+  uint8_t   slv_subadd;
+  uint8_t   slv_len;
+} lsm6dso_sh_cfg_read_t;
+int32_t lsm6dso_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val);
+int32_t lsm6dso_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val);
+int32_t lsm6dso_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val);
+int32_t lsm6dso_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
+                                 lsm6dso_sh_cfg_read_t *val);
+
+int32_t lsm6dso_sh_status_get(stmdev_ctx_t *ctx,
+                              lsm6dso_status_master_t *val);
+
+
+typedef struct
+{
+  uint8_t ui;
+  uint8_t aux;
+} lsm6dso_id_t;
+int32_t lsm6dso_id_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                       lsm6dso_id_t *val);
+
+typedef enum
+{
+  LSM6DSO_SEL_BY_HW   = 0x00, /* bus mode select by HW (SPI 3W disable) */
+  LSM6DSO_SPI_4W      = 0x06, /* Only SPI: SDO / SDI separated pins */
+  LSM6DSO_SPI_3W      = 0x07, /* Only SPI: SDO / SDI share the same pin */
+  LSM6DSO_I2C         = 0x04, /* Only I2C */
+  LSM6DSO_I3C_T_50us  = 0x02, /* I3C: available time equal to 50 us */
+  LSM6DSO_I3C_T_2us   = 0x12, /* I3C: available time equal to 2 us */
+  LSM6DSO_I3C_T_1ms   = 0x22, /* I3C: available time equal to 1 ms */
+  LSM6DSO_I3C_T_25ms  = 0x32, /* I3C: available time equal to 25 ms */
+} lsm6dso_ui_bus_md_t;
+
+typedef enum
+{
+  LSM6DSO_SPI_4W_AUX  = 0x00,
+  LSM6DSO_SPI_3W_AUX  = 0x01,
+} lsm6dso_aux_bus_md_t;
+
+typedef struct
+{
+  lsm6dso_ui_bus_md_t ui_bus_md;
+  lsm6dso_aux_bus_md_t aux_bus_md;
+} lsm6dso_bus_mode_t;
+int32_t lsm6dso_bus_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                             lsm6dso_bus_mode_t val);
+int32_t lsm6dso_bus_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                             lsm6dso_bus_mode_t *val);
+
+typedef enum
+{
+  LSM6DSO_DRV_RDY   = 0x00, /* Initialize the device for driver usage */
+  LSM6DSO_BOOT      = 0x01, /* Restore calib. param. ( it takes 10ms ) */
+  LSM6DSO_RESET     = 0x02, /* Reset configuration registers */
+  LSM6DSO_FIFO_COMP = 0x04, /* FIFO compression initialization request. */
+  LSM6DSO_FSM       = 0x08, /* Finite State Machine initialization request */
+  LSM6DSO_PEDO      = 0x20, /* Pedometer algo initialization request. */
+  LSM6DSO_TILT      = 0x40, /* Tilt algo initialization request */
+  LSM6DSO_SMOTION   = 0x80, /* Significant Motion initialization request */
+} lsm6dso_init_t;
+int32_t lsm6dso_init_set(stmdev_ctx_t *ctx, lsm6dso_init_t val);
+
+typedef struct
+{
+uint8_t sw_reset           :
+  1; /* Restoring configuration registers */
+  uint8_t boot               : 1; /* Restoring calibration parameters */
+  uint8_t drdy_xl            : 1; /* Accelerometer data ready */
+  uint8_t drdy_g             : 1; /* Gyroscope data ready */
+  uint8_t drdy_temp          : 1; /* Temperature data ready */
+  uint8_t ois_drdy_xl        : 1; /* Accelerometer data ready on OIS */
+  uint8_t ois_drdy_g         : 1; /* Gyroscope data ready on OIS */
+uint8_t ois_gyro_settling  :
+  1; /* Gyroscope is in the settling phase */
+} lsm6dso_status_t;
+int32_t lsm6dso_status_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                           lsm6dso_status_t *val);
+
+typedef struct
+{
+  uint8_t sdo_sa0_pull_up     : 1; /* 1 = pull-up on SDO/SA0 pin */
+uint8_t aux_sdo_ocs_pull_up :
+  1; /* 1 = pull-up on OCS_Aux/SDO_Aux pins */
+  uint8_t int1_int2_push_pull : 1; /* 1 = push-pull / 0 = open-drain*/
+uint8_t int1_pull_down      :
+  1; /* 1 = pull-down always disabled (0=auto) */
+} lsm6dso_pin_conf_t;
+int32_t lsm6dso_pin_conf_set(stmdev_ctx_t *ctx,
+                             lsm6dso_pin_conf_t val);
+int32_t lsm6dso_pin_conf_get(stmdev_ctx_t *ctx,
+                             lsm6dso_pin_conf_t *val);
+
+typedef struct
+{
+  uint8_t active_low   : 1; /* 1 = active low / 0 = active high */
+uint8_t base_latched :
+  1; /* base functions are: FF, WU, 6D, Tap, Act/Inac */
+uint8_t emb_latched  :
+  1; /* emb functions are: Pedo, Tilt, SMot, Timestamp */
+} lsm6dso_int_mode_t;
+int32_t lsm6dso_interrupt_mode_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_int_mode_t val);
+int32_t lsm6dso_interrupt_mode_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_int_mode_t *val);
+
+typedef struct
+{
+  uint8_t drdy_xl       : 1; /* Accelerometer data ready */
+  uint8_t drdy_g        : 1; /* Gyroscope data ready */
+uint8_t drdy_temp     :
+  1; /* Temperature data ready (1 = int2 pin disable) */
+  uint8_t boot          : 1; /* Restoring calibration parameters */
+  uint8_t fifo_th       : 1; /* FIFO threshold reached */
+  uint8_t fifo_ovr      : 1; /* FIFO overrun */
+  uint8_t fifo_full     : 1; /* FIFO full */
+  uint8_t fifo_bdr      : 1; /* FIFO Batch counter threshold reached */
+uint8_t den_flag      :
+  1; /* external trigger level recognition (DEN) */
+  uint8_t sh_endop      : 1; /* sensor hub end operation */
+uint8_t timestamp     :
+  1; /* timestamp overflow (1 = int2 pin disable) */
+  uint8_t six_d         : 1; /* orientation change (6D/4D detection) */
+  uint8_t double_tap    : 1; /* double-tap event */
+  uint8_t free_fall     : 1; /* free fall event */
+  uint8_t wake_up       : 1; /* wake up event */
+  uint8_t single_tap    : 1; /* single-tap event */
+uint8_t sleep_change  :
+  1; /* Act/Inact (or Vice-versa) status changed */
+  uint8_t step_detector : 1; /* Step detected */
+  uint8_t tilt          : 1; /* Relative tilt event detected */
+  uint8_t sig_mot       : 1; /* "significant motion" event detected */
+uint8_t fsm_lc        :
+  1; /* fsm long counter timeout interrupt event */
+  uint8_t fsm1          : 1; /* fsm 1 interrupt event */
+  uint8_t fsm2          : 1; /* fsm 2 interrupt event */
+  uint8_t fsm3          : 1; /* fsm 3 interrupt event */
+  uint8_t fsm4          : 1; /* fsm 4 interrupt event */
+  uint8_t fsm5          : 1; /* fsm 5 interrupt event */
+  uint8_t fsm6          : 1; /* fsm 6 interrupt event */
+  uint8_t fsm7          : 1; /* fsm 7 interrupt event */
+  uint8_t fsm8          : 1; /* fsm 8 interrupt event */
+  uint8_t fsm9          : 1; /* fsm 9 interrupt event */
+  uint8_t fsm10         : 1; /* fsm 10 interrupt event */
+  uint8_t fsm11         : 1; /* fsm 11 interrupt event */
+  uint8_t fsm12         : 1; /* fsm 12 interrupt event */
+  uint8_t fsm13         : 1; /* fsm 13 interrupt event */
+  uint8_t fsm14         : 1; /* fsm 14 interrupt event */
+  uint8_t fsm15         : 1; /* fsm 15 interrupt event */
+  uint8_t fsm16         : 1; /* fsm 16 interrupt event */
+  uint8_t mlc1          : 1; /* mlc 1 interrupt event */
+  uint8_t mlc2          : 1; /* mlc 2 interrupt event */
+  uint8_t mlc3          : 1; /* mlc 3 interrupt event */
+  uint8_t mlc4          : 1; /* mlc 4 interrupt event */
+  uint8_t mlc5          : 1; /* mlc 5 interrupt event */
+  uint8_t mlc6          : 1; /* mlc 6 interrupt event */
+  uint8_t mlc7          : 1; /* mlc 7 interrupt event */
+  uint8_t mlc8          : 1; /* mlc 8 interrupt event */
+} lsm6dso_pin_int1_route_t;
+
+int32_t lsm6dso_pin_int1_route_set(stmdev_ctx_t *ctx,
+                                   lsm6dso_pin_int1_route_t val);
+int32_t lsm6dso_pin_int1_route_get(stmdev_ctx_t *ctx,
+                                   lsm6dso_pin_int1_route_t *val);
+
+typedef struct
+{
+  uint8_t drdy_ois      : 1; /* OIS chain data ready */
+  uint8_t drdy_xl       : 1; /* Accelerometer data ready */
+  uint8_t drdy_g        : 1; /* Gyroscope data ready */
+  uint8_t drdy_temp     : 1; /* Temperature data ready */
+  uint8_t fifo_th       : 1; /* FIFO threshold reached */
+  uint8_t fifo_ovr      : 1; /* FIFO overrun */
+  uint8_t fifo_full     : 1; /* FIFO full */
+  uint8_t fifo_bdr      : 1; /* FIFO Batch counter threshold reached */
+  uint8_t timestamp     : 1; /* timestamp overflow */
+  uint8_t six_d         : 1; /* orientation change (6D/4D detection) */
+  uint8_t double_tap    : 1; /* double-tap event */
+  uint8_t free_fall     : 1; /* free fall event */
+  uint8_t wake_up       : 1; /* wake up event */
+  uint8_t single_tap    : 1; /* single-tap event */
+uint8_t sleep_change  :
+  1; /* Act/Inact (or Vice-versa) status changed */
+  uint8_t step_detector : 1; /* Step detected */
+  uint8_t tilt          : 1; /* Relative tilt event detected */
+  uint8_t sig_mot       : 1; /* "significant motion" event detected */
+uint8_t fsm_lc        :
+  1; /* fsm long counter timeout interrupt event */
+  uint8_t fsm1          : 1; /* fsm 1 interrupt event */
+  uint8_t fsm2          : 1; /* fsm 2 interrupt event */
+  uint8_t fsm3          : 1; /* fsm 3 interrupt event */
+  uint8_t fsm4          : 1; /* fsm 4 interrupt event */
+  uint8_t fsm5          : 1; /* fsm 5 interrupt event */
+  uint8_t fsm6          : 1; /* fsm 6 interrupt event */
+  uint8_t fsm7          : 1; /* fsm 7 interrupt event */
+  uint8_t fsm8          : 1; /* fsm 8 interrupt event */
+  uint8_t fsm9          : 1; /* fsm 9 interrupt event */
+  uint8_t fsm10         : 1; /* fsm 10 interrupt event */
+  uint8_t fsm11         : 1; /* fsm 11 interrupt event */
+  uint8_t fsm12         : 1; /* fsm 12 interrupt event */
+  uint8_t fsm13         : 1; /* fsm 13 interrupt event */
+  uint8_t fsm14         : 1; /* fsm 14 interrupt event */
+  uint8_t fsm15         : 1; /* fsm 15 interrupt event */
+  uint8_t fsm16         : 1; /* fsm 16 interrupt event */
+  uint8_t mlc1          : 1; /* mlc 1 interrupt event */
+  uint8_t mlc2          : 1; /* mlc 2 interrupt event */
+  uint8_t mlc3          : 1; /* mlc 3 interrupt event */
+  uint8_t mlc4          : 1; /* mlc 4 interrupt event */
+  uint8_t mlc5          : 1; /* mlc 5 interrupt event */
+  uint8_t mlc6          : 1; /* mlc 6 interrupt event */
+  uint8_t mlc7          : 1; /* mlc 7 interrupt event */
+  uint8_t mlc8          : 1; /* mlc 8 interrupt event */
+} lsm6dso_pin_int2_route_t;
+
+int32_t lsm6dso_pin_int2_route_set(stmdev_ctx_t *ctx,
+                                   stmdev_ctx_t *aux_ctx,
+                                   lsm6dso_pin_int2_route_t val);
+int32_t lsm6dso_pin_int2_route_get(stmdev_ctx_t *ctx,
+                                   stmdev_ctx_t *aux_ctx,
+                                   lsm6dso_pin_int2_route_t *val);
+
+typedef struct
+{
+  uint8_t drdy_xl          :  1; /* Accelerometer data ready */
+  uint8_t drdy_g           :  1; /* Gyroscope data ready */
+  uint8_t drdy_temp        :  1; /* Temperature data ready */
+uint8_t den_flag         :
+  1; /* external trigger level recognition (DEN) */
+uint8_t timestamp        :
+  1; /* timestamp overflow (1 = int2 pin disable) */
+  uint8_t free_fall        :  1; /* free fall event */
+  uint8_t wake_up          :  1; /* wake up event */
+  uint8_t wake_up_z        :  1; /* wake up on Z axis event */
+  uint8_t wake_up_y        :  1; /* wake up on Y axis event */
+  uint8_t wake_up_x        :  1; /* wake up on X axis event */
+  uint8_t single_tap       :  1; /* single-tap event */
+  uint8_t double_tap       :  1; /* double-tap event */
+  uint8_t tap_z            :  1; /* single-tap on Z axis event */
+  uint8_t tap_y            :  1; /* single-tap on Y axis event */
+  uint8_t tap_x            :  1; /* single-tap on X axis event */
+  uint8_t tap_sign         :  1; /* sign of tap event (0-pos / 1-neg) */
+uint8_t six_d            :
+  1; /* orientation change (6D/4D detection) */
+uint8_t six_d_xl         :
+  1; /* X-axis low 6D/4D event (under threshold) */
+uint8_t six_d_xh         :
+  1; /* X-axis high 6D/4D event (over threshold) */
+uint8_t six_d_yl         :
+  1; /* Y-axis low 6D/4D event (under threshold) */
+uint8_t six_d_yh         :
+  1; /* Y-axis high 6D/4D event (over threshold) */
+uint8_t six_d_zl         :
+  1; /* Z-axis low 6D/4D event (under threshold) */
+uint8_t six_d_zh         :
+  1; /* Z-axis high 6D/4D event (over threshold) */
+uint8_t sleep_change     :
+  1; /* Act/Inact (or Vice-versa) status changed */
+uint8_t sleep_state      :
+  1; /* Act/Inact status flag (0-Act / 1-Inact) */
+  uint8_t step_detector    :  1; /* Step detected */
+  uint8_t tilt             :  1; /* Relative tilt event detected */
+uint8_t sig_mot          :
+  1; /* "significant motion" event detected */
+uint8_t fsm_lc           :
+  1; /* fsm long counter timeout interrupt event */
+  uint8_t fsm1             :  1; /* fsm 1 interrupt event */
+  uint8_t fsm2             :  1; /* fsm 2 interrupt event */
+  uint8_t fsm3             :  1; /* fsm 3 interrupt event */
+  uint8_t fsm4             :  1; /* fsm 4 interrupt event */
+  uint8_t fsm5             :  1; /* fsm 5 interrupt event */
+  uint8_t fsm6             :  1; /* fsm 6 interrupt event */
+  uint8_t fsm7             :  1; /* fsm 7 interrupt event */
+  uint8_t fsm8             :  1; /* fsm 8 interrupt event */
+  uint8_t fsm9             :  1; /* fsm 9 interrupt event */
+  uint8_t fsm10            :  1; /* fsm 10 interrupt event */
+  uint8_t fsm11            :  1; /* fsm 11 interrupt event */
+  uint8_t fsm12            :  1; /* fsm 12 interrupt event */
+  uint8_t fsm13            :  1; /* fsm 13 interrupt event */
+  uint8_t fsm14            :  1; /* fsm 14 interrupt event */
+  uint8_t fsm15            :  1; /* fsm 15 interrupt event */
+  uint8_t fsm16            :  1; /* fsm 16 interrupt event */
+  uint8_t mlc1             :  1; /* mlc 1 interrupt event */
+  uint8_t mlc2             :  1; /* mlc 2 interrupt event */
+  uint8_t mlc3             :  1; /* mlc 3 interrupt event */
+  uint8_t mlc4             :  1; /* mlc 4 interrupt event */
+  uint8_t mlc5             :  1; /* mlc 5 interrupt event */
+  uint8_t mlc6             :  1; /* mlc 6 interrupt event */
+  uint8_t mlc7             :  1; /* mlc 7 interrupt event */
+  uint8_t mlc8             :  1; /* mlc 8 interrupt event */
+  uint8_t sh_endop         :  1; /* sensor hub end operation */
+uint8_t sh_slave0_nack   :
+  1; /* Not acknowledge on sensor hub slave 0 */
+uint8_t sh_slave1_nack   :
+  1; /* Not acknowledge on sensor hub slave 1 */
+uint8_t sh_slave2_nack   :
+  1; /* Not acknowledge on sensor hub slave 2 */
+uint8_t sh_slave3_nack   :
+  1; /* Not acknowledge on sensor hub slave 3 */
+uint8_t sh_wr_once       :
+  1; /* "WRITE_ONCE" end on sensor hub slave 0 */
+uint16_t fifo_diff       :
+  10; /* Number of unread sensor data in FIFO*/
+  uint8_t fifo_ovr_latched :  1; /* Latched FIFO overrun status */
+uint8_t fifo_bdr         :
+  1; /* FIFO Batch counter threshold reached */
+  uint8_t fifo_full        :  1; /* FIFO full */
+  uint8_t fifo_ovr         :  1; /* FIFO overrun */
+  uint8_t fifo_th          :  1; /* FIFO threshold reached */
+} lsm6dso_all_sources_t;
+int32_t lsm6dso_all_sources_get(stmdev_ctx_t *ctx,
+                                lsm6dso_all_sources_t *val);
+
+typedef struct
+{
+  uint8_t odr_fine_tune;
+} dev_cal_t;
+int32_t lsm6dso_calibration_get(stmdev_ctx_t *ctx, dev_cal_t *val);
+
+typedef enum
+{
+  LSM6DSO_XL_UI_OFF       = 0x00, /* in power down */
+  LSM6DSO_XL_UI_1Hz6_LP   = 0x1B, /* @1Hz6 (low power) */
+  LSM6DSO_XL_UI_1Hz6_ULP  = 0x2B, /* @1Hz6 (ultra low/Gy, OIS imu off) */
+  LSM6DSO_XL_UI_12Hz5_HP  = 0x01, /* @12Hz5 (high performance) */
+  LSM6DSO_XL_UI_12Hz5_LP  = 0x11, /* @12Hz5 (low power) */
+  LSM6DSO_XL_UI_12Hz5_ULP = 0x21, /* @12Hz5 (ultra low/Gy, OIS imu off) */
+  LSM6DSO_XL_UI_26Hz_HP   = 0x02, /* @26Hz  (high performance) */
+  LSM6DSO_XL_UI_26Hz_LP   = 0x12, /* @26Hz  (low power) */
+  LSM6DSO_XL_UI_26Hz_ULP  = 0x22, /* @26Hz  (ultra low/Gy, OIS imu off) */
+  LSM6DSO_XL_UI_52Hz_HP   = 0x03, /* @52Hz  (high performance) */
+  LSM6DSO_XL_UI_52Hz_LP   = 0x13, /* @52Hz  (low power) */
+  LSM6DSO_XL_UI_52Hz_ULP  = 0x23, /* @52Hz  (ultra low/Gy, OIS imu off) */
+  LSM6DSO_XL_UI_104Hz_HP  = 0x04, /* @104Hz (high performance) */
+  LSM6DSO_XL_UI_104Hz_NM  = 0x14, /* @104Hz (normal mode) */
+  LSM6DSO_XL_UI_104Hz_ULP = 0x24, /* @104Hz (ultra low/Gy, OIS imu off) */
+  LSM6DSO_XL_UI_208Hz_HP  = 0x05, /* @208Hz (high performance) */
+  LSM6DSO_XL_UI_208Hz_NM  = 0x15, /* @208Hz (normal mode) */
+  LSM6DSO_XL_UI_208Hz_ULP = 0x25, /* @208Hz (ultra low/Gy, OIS imu off) */
+  LSM6DSO_XL_UI_416Hz_HP  = 0x06, /* @416Hz (high performance) */
+  LSM6DSO_XL_UI_833Hz_HP  = 0x07, /* @833Hz (high performance) */
+  LSM6DSO_XL_UI_1667Hz_HP = 0x08, /* @1kHz66 (high performance) */
+  LSM6DSO_XL_UI_3333Hz_HP = 0x09, /* @3kHz33 (high performance) */
+  LSM6DSO_XL_UI_6667Hz_HP = 0x0A, /* @6kHz66 (high performance) */
+} lsm6dso_odr_xl_ui_t;
+
+typedef enum
+{
+  LSM6DSO_XL_UI_2g   = 0,
+  LSM6DSO_XL_UI_4g   = 2,
+  LSM6DSO_XL_UI_8g   = 3,
+  LSM6DSO_XL_UI_16g  = 1, /* OIS full scale is also forced to be 16g */
+} lsm6dso_fs_xl_ui_t;
+
+typedef enum
+{
+  LSM6DSO_GY_UI_OFF       = 0x00, /* gy in power down */
+  LSM6DSO_GY_UI_12Hz5_LP  = 0x11, /* gy @12Hz5 (low power) */
+  LSM6DSO_GY_UI_12Hz5_HP  = 0x01, /* gy @12Hz5 (high performance) */
+  LSM6DSO_GY_UI_26Hz_LP   = 0x12, /* gy @26Hz  (low power) */
+  LSM6DSO_GY_UI_26Hz_HP   = 0x02, /* gy @26Hz  (high performance) */
+  LSM6DSO_GY_UI_52Hz_LP   = 0x13, /* gy @52Hz  (low power) */
+  LSM6DSO_GY_UI_52Hz_HP   = 0x03, /* gy @52Hz  (high performance) */
+  LSM6DSO_GY_UI_104Hz_NM  = 0x14, /* gy @104Hz (low power) */
+  LSM6DSO_GY_UI_104Hz_HP  = 0x04, /* gy @104Hz (high performance) */
+  LSM6DSO_GY_UI_208Hz_NM  = 0x15, /* gy @208Hz (low power) */
+  LSM6DSO_GY_UI_208Hz_HP  = 0x05, /* gy @208Hz (high performance) */
+  LSM6DSO_GY_UI_416Hz_HP  = 0x06, /* gy @416Hz (high performance) */
+  LSM6DSO_GY_UI_833Hz_HP  = 0x07, /* gy @833Hz (high performance) */
+  LSM6DSO_GY_UI_1667Hz_HP = 0x08, /* gy @1kHz66 (high performance) */
+  LSM6DSO_GY_UI_3333Hz_HP = 0x09, /* gy @3kHz33 (high performance) */
+  LSM6DSO_GY_UI_6667Hz_HP = 0x0A, /* gy @6kHz66 (high performance) */
+} lsm6dso_odr_g_ui_t;
+
+typedef enum
+{
+  LSM6DSO_GY_UI_250dps   = 0,
+  LSM6DSO_GY_UI_125dps   = 1,
+  LSM6DSO_GY_UI_500dps   = 2,
+  LSM6DSO_GY_UI_1000dps  = 4,
+  LSM6DSO_GY_UI_2000dps  = 6,
+} lsm6dso_fs_g_ui_t;
+
+typedef enum
+{
+  LSM6DSO_OIS_ONLY_AUX    = 0x00, /* Auxiliary SPI full control */
+  LSM6DSO_OIS_MIXED       = 0x01, /* Enabling by UI / read-config by AUX */
+} lsm6dso_ctrl_md_t;
+
+typedef enum
+{
+  LSM6DSO_XL_OIS_OFF       = 0x00, /* in power down */
+  LSM6DSO_XL_OIS_6667Hz_HP = 0x01, /* @6kHz OIS imu active/NO ULP on UI */
+} lsm6dso_odr_xl_ois_noaux_t;
+
+typedef enum
+{
+  LSM6DSO_XL_OIS_2g   = 0,
+  LSM6DSO_XL_OIS_4g   = 2,
+  LSM6DSO_XL_OIS_8g   = 3,
+  LSM6DSO_XL_OIS_16g  = 1, /* UI full scale is also forced to be 16g */
+} lsm6dso_fs_xl_ois_noaux_t;
+
+typedef enum
+{
+  LSM6DSO_GY_OIS_OFF       = 0x00, /* in power down */
+  LSM6DSO_GY_OIS_6667Hz_HP = 0x01, /* @6kHz No Ultra Low Power*/
+} lsm6dso_odr_g_ois_noaux_t;
+
+typedef enum
+{
+  LSM6DSO_GY_OIS_250dps   = 0,
+  LSM6DSO_GY_OIS_125dps   = 1,
+  LSM6DSO_GY_OIS_500dps   = 2,
+  LSM6DSO_GY_OIS_1000dps  = 4,
+  LSM6DSO_GY_OIS_2000dps  = 6,
+} lsm6dso_fs_g_ois_noaux_t;
+
+typedef enum
+{
+  LSM6DSO_FSM_DISABLE = 0x00,
+  LSM6DSO_FSM_XL      = 0x01,
+  LSM6DSO_FSM_GY      = 0x02,
+  LSM6DSO_FSM_XL_GY   = 0x03,
+} lsm6dso_sens_fsm_t;
+
+typedef enum
+{
+  LSM6DSO_FSM_12Hz5 = 0x00,
+  LSM6DSO_FSM_26Hz  = 0x01,
+  LSM6DSO_FSM_52Hz  = 0x02,
+  LSM6DSO_FSM_104Hz = 0x03,
+} lsm6dso_odr_fsm_t;
+
+typedef struct
+{
+  struct
+  {
+    struct
+    {
+      lsm6dso_odr_xl_ui_t odr;
+      lsm6dso_fs_xl_ui_t fs;
+    } xl;
+    struct
+    {
+      lsm6dso_odr_g_ui_t odr;
+      lsm6dso_fs_g_ui_t fs;
+    } gy;
+  } ui;
+  struct
+  {
+    lsm6dso_ctrl_md_t ctrl_md;
+    struct
+    {
+      lsm6dso_odr_xl_ois_noaux_t odr;
+      lsm6dso_fs_xl_ois_noaux_t fs;
+    } xl;
+    struct
+    {
+      lsm6dso_odr_g_ois_noaux_t odr;
+      lsm6dso_fs_g_ois_noaux_t fs;
+    } gy;
+  } ois;
+  struct
+  {
+    lsm6dso_sens_fsm_t sens;
+    lsm6dso_odr_fsm_t odr;
+  } fsm;
+} lsm6dso_md_t;
+int32_t lsm6dso_mode_set(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                         lsm6dso_md_t *val);
+int32_t lsm6dso_mode_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                         lsm6dso_md_t *val);
+typedef struct
+{
+  struct
+  {
+    struct
+    {
+      float_t mg[3];
+      int16_t raw[3];
+    } xl;
+    struct
+    {
+      float_t mdps[3];
+      int16_t raw[3];
+    } gy;
+    struct
+    {
+      float_t deg_c;
+      int16_t raw;
+    } heat;
+  } ui;
+  struct
+  {
+    struct
+    {
+      float_t mg[3];
+      int16_t raw[3];
+    } xl;
+    struct
+    {
+      float_t mdps[3];
+      int16_t raw[3];
+    } gy;
+  } ois;
+} lsm6dso_data_t;
+int32_t lsm6dso_data_get(stmdev_ctx_t *ctx, stmdev_ctx_t *aux_ctx,
+                         lsm6dso_md_t *md, lsm6dso_data_t *data);
+
+typedef struct
+{
+  uint8_t sig_mot      : 1; /* significant motion */
+  uint8_t tilt         : 1; /* tilt detection  */
+  uint8_t step         : 1; /* step counter/detector */
+  uint8_t step_adv     : 1; /* step counter advanced mode */
+  uint8_t fsm          : 1; /* finite state machine */
+  uint8_t fifo_compr   : 1; /* FIFO compression */
+} lsm6dso_emb_sens_t;
+int32_t lsm6dso_embedded_sens_set(stmdev_ctx_t *ctx,
+                                  lsm6dso_emb_sens_t *emb_sens);
+int32_t lsm6dso_embedded_sens_get(stmdev_ctx_t *ctx,
+                                  lsm6dso_emb_sens_t *emb_sens);
+int32_t lsm6dso_embedded_sens_off(stmdev_ctx_t *ctx);
+
+/**
+  * @}
+  *
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*LSM6DSO_DRIVER_H */

tracking/imu/bmi160.c

@@ -1,5988 +1,86 @@
-/**
-* Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
-*
-* BSD-3-Clause
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-*    notice, this list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright
-*    notice, this list of conditions and the following disclaimer in the
-*    documentation and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its
-*    contributors may be used to endorse or promote products derived from
-*    this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
-* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-*
-* @file       bmi160.c
-* @date       2021-10-05
-* @version    v3.9.2
-*
-*/
+#include "imu.h"
+#include "../../lib/bmi160-api/bmi160.h"
 
-#include "bmi160.h"
+#define BMI160_TAG "BMI160"
+#define BMI160_DEV_ADDR (0x69 << 1)
 
-/* Below look up table follows the enum bmi160_int_types.
- * Hence any change should match to the enum bmi160_int_types
- */
-const uint8_t int_mask_lookup_table[13] = {
-    BMI160_INT1_SLOPE_MASK,
-    BMI160_INT1_SLOPE_MASK,
-    BMI160_INT2_LOW_STEP_DETECT_MASK,
-    BMI160_INT1_DOUBLE_TAP_MASK,
-    BMI160_INT1_SINGLE_TAP_MASK,
-    BMI160_INT1_ORIENT_MASK,
-    BMI160_INT1_FLAT_MASK,
-    BMI160_INT1_HIGH_G_MASK,
-    BMI160_INT1_LOW_G_MASK,
-    BMI160_INT1_NO_MOTION_MASK,
-    BMI160_INT2_DATA_READY_MASK,
-    BMI160_INT2_FIFO_FULL_MASK,
-    BMI160_INT2_FIFO_WM_MASK};
+struct bmi160_dev bmi160dev;
+struct bmi160_sensor_data bmi160_accel;
+struct bmi160_sensor_data bmi160_gyro;
 
-/*********************************************************************/
-/* Static function declarations */
-
-/*!
- * @brief This API configures the pins to fire the
- * interrupt signal when it occurs
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_intr_pin_config(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the any-motion interrupt of the sensor.
- * This interrupt occurs when accel values exceeds preset threshold
- * for a certain period of time.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_any_motion_int(struct bmi160_int_settg* int_config, struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets tap interrupts.Interrupt is fired when
- * tap movements happen.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t set_accel_tap_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the data ready interrupt for both accel and gyro.
- * This interrupt occurs when new accel and gyro data come.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t set_accel_gyro_data_ready_int(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the significant motion interrupt of the sensor.This
- * interrupt occurs when there is change in user location.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_sig_motion_int(struct bmi160_int_settg* int_config, struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the no motion/slow motion interrupt of the sensor.
- * Slow motion is similar to any motion interrupt.No motion interrupt
- * occurs when slope bet. two accel values falls below preset threshold
- * for preset duration.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_no_motion_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the step detection interrupt.This interrupt
- * occurs when the single step causes accel values to go above
- * preset threshold.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_step_detect_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the orientation interrupt of the sensor.This
- * interrupt occurs when there is orientation change in the sensor
- * with respect to gravitational field vector g.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_orientation_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the flat interrupt of the sensor.This interrupt
- * occurs in case of flat orientation
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_flat_detect_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the low-g interrupt of the sensor.This interrupt
- * occurs during free-fall.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_low_g_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the high-g interrupt of the sensor.The interrupt
- * occurs if the absolute value of acceleration data of any enabled axis
- * exceeds the programmed threshold and the sign of the value does not
- * change for a preset duration.
- *
- * @param[in] int_config  : Structure instance of bmi160_int_settg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t
-    set_accel_high_g_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the default configuration parameters of accel & gyro.
- * Also maintain the previous state of configurations.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static void default_param_settg(struct bmi160_dev* dev);
-
-/*!
- * @brief This API is used to validate the device structure pointer for
- * null conditions.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t null_ptr_check(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API set the accel configuration.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t set_accel_conf(struct bmi160_dev* dev);
-
-/*!
- * @brief This API gets the accel configuration.
- *
- * @param[out] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t get_accel_conf(struct bmi160_dev* dev);
-
-/*!
- * @brief This API check the accel configuration.
- *
- * @param[in] data        : Pointer to store the updated accel config.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t check_accel_config(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the accel odr.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_accel_odr(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the accel bandwidth.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_accel_bw(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the accel range.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_accel_range(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API checks the invalid settings for ODR & Bw for Accel and Gyro.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t check_invalid_settg(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API set the gyro configuration.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t set_gyro_conf(struct bmi160_dev* dev);
-
-/*!
- * @brief This API get the gyro configuration.
- *
- * @param[out] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t get_gyro_conf(struct bmi160_dev* dev);
-
-/*!
- * @brief This API check the gyro configuration.
- *
- * @param[in] data        : Pointer to store the updated gyro config.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t check_gyro_config(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the gyro odr.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_gyro_odr(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the gyro bandwidth.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_gyro_bw(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the gyro range.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_gyro_range(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the accel power mode.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t set_accel_pwr(struct bmi160_dev* dev);
-
-/*!
- * @brief This API process the undersampling setting of Accel.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t process_under_sampling(uint8_t* data, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API sets the gyro power mode.
- *
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error.
- */
-static int8_t set_gyro_pwr(struct bmi160_dev* dev);
-
-/*!
- * @brief This API reads accel data along with sensor time if time is requested
- * by user. Kindly refer the user guide(README.md) for more info.
- *
- * @param[in] len    : len to read no of bytes
- * @param[out] accel    : Structure pointer to store accel data
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    get_accel_data(uint8_t len, struct bmi160_sensor_data* accel, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API reads accel data along with sensor time if time is requested
- * by user. Kindly refer the user guide(README.md) for more info.
- *
- * @param[in] len    : len to read no of bytes
- * @param[out] gyro    : Structure pointer to store accel data
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    get_gyro_data(uint8_t len, struct bmi160_sensor_data* gyro, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API reads accel and gyro data along with sensor time
- * if time is requested by user.
- * Kindly refer the user guide(README.md) for more info.
- *
- * @param[in] len    : len to read no of bytes
- * @param[out] accel    : Structure pointer to store accel data
- * @param[out] gyro    : Structure pointer to store accel data
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t get_accel_gyro_data(
-    uint8_t len,
-    struct bmi160_sensor_data* accel,
-    struct bmi160_sensor_data* gyro,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the any-motion interrupt for accel.
- *
- * @param[in] any_motion_int_cfg   : Structure instance of
- *                   bmi160_acc_any_mot_int_cfg.
- * @param[in] dev          : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_accel_any_motion_int(
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    struct bmi160_dev* dev);
-
-/*!
- * @brief This API disable the sig-motion interrupt.
- *
- * @param[in] dev   : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t disable_sig_motion_int(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for any-motion interrupt.
- *
- * @param[in] any_motion_int_cfg  : Structure instance of
- *                  bmi160_acc_any_mot_int_cfg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_any_motion_src(
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the duration and threshold of
- * any-motion interrupt.
- *
- * @param[in] any_motion_int_cfg  : Structure instance of
- *                  bmi160_acc_any_mot_int_cfg.
- * @param[in] dev         : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_any_dur_threshold(
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure necessary setting of any-motion interrupt.
- *
- * @param[in] int_config       : Structure instance of bmi160_int_settg.
- * @param[in] any_motion_int_cfg   : Structure instance of
- *                   bmi160_acc_any_mot_int_cfg.
- * @param[in] dev          : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_any_motion_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enable the data ready interrupt.
- *
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_data_ready_int(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the no motion/slow motion interrupt.
- *
- * @param[in] no_mot_int_cfg    : Structure instance of
- *                bmi160_acc_no_motion_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_no_motion_int(
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the interrupt PIN setting for
- * no motion/slow motion interrupt.
- *
- * @param[in] int_config    : structure instance of bmi160_int_settg.
- * @param[in] no_mot_int_cfg    : Structure instance of
- *                bmi160_acc_no_motion_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_no_motion_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the source of interrupt for no motion.
- *
- * @param[in] no_mot_int_cfg    : Structure instance of
- *                bmi160_acc_no_motion_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_no_motion_data_src(
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the duration and threshold of
- * no motion/slow motion interrupt along with selection of no/slow motion.
- *
- * @param[in] no_mot_int_cfg    : Structure instance of
- *                bmi160_acc_no_motion_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_no_motion_dur_thr(
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the sig-motion motion interrupt.
- *
- * @param[in] sig_mot_int_cfg   : Structure instance of
- *                bmi160_acc_sig_mot_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_sig_motion_int(
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the interrupt PIN setting for
- * significant motion interrupt.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] sig_mot_int_cfg   : Structure instance of
- *                bmi160_acc_sig_mot_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_sig_motion_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for sig motion interrupt.
- *
- * @param[in] sig_mot_int_cfg   : Structure instance of
- *                bmi160_acc_sig_mot_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_sig_motion_data_src(
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the threshold, skip and proof time of
- * sig motion interrupt.
- *
- * @param[in] sig_mot_int_cfg   : Structure instance of
- *                bmi160_acc_sig_mot_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_sig_dur_threshold(
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the step detector interrupt.
- *
- * @param[in] step_detect_int_cfg   : Structure instance of
- *                    bmi160_acc_step_detect_int_cfg.
- * @param[in] dev           : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_step_detect_int(
-    const struct bmi160_acc_step_detect_int_cfg* step_detect_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the step detector parameter.
- *
- * @param[in] step_detect_int_cfg   : Structure instance of
- *                    bmi160_acc_step_detect_int_cfg.
- * @param[in] dev           : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_step_detect(
-    const struct bmi160_acc_step_detect_int_cfg* step_detect_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the single/double tap interrupt.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_tap_int(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the interrupt PIN setting for
- * tap interrupt.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] tap_int_cfg   : Structure instance of bmi160_acc_tap_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_tap_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for tap interrupt.
- *
- * @param[in] tap_int_cfg   : Structure instance of bmi160_acc_tap_int_cfg.
- * @param[in] dev       : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_tap_data_src(
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the  parameters of tap interrupt.
- * Threshold, quite, shock, and duration.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] tap_int_cfg   : Structure instance of bmi160_acc_tap_int_cfg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_tap_param(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enable the external mode configuration.
- *
- * @param[in] dev   : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_sec_if(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the ODR of the auxiliary sensor.
- *
- * @param[in] dev   : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_aux_odr(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API maps the actual burst read length set by user.
- *
- * @param[in] len   : Pointer to store the read length.
- * @param[in] dev   : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t map_read_len(uint16_t* len, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the settings of auxiliary sensor.
- *
- * @param[in] dev   : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_aux_settg(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API extract the read data from auxiliary sensor.
- *
- * @param[in] map_len     : burst read value.
- * @param[in] reg_addr    : Address of register to read.
- * @param[in] aux_data    : Pointer to store the read data.
- * @param[in] len     : length to read the data.
- * @param[in] dev         : Structure instance of bmi160_dev.
- * @note : Refer user guide for detailed info.
- *
- * @return Result of API execution status
- * @retval zero -> Success / -ve value -> Error
- */
-static int8_t extract_aux_read(
-    uint16_t map_len,
-    uint8_t reg_addr,
-    uint8_t* aux_data,
-    uint16_t len,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the orient interrupt.
- *
- * @param[in] orient_int_cfg : Structure instance of bmi160_acc_orient_int_cfg.
- * @param[in] dev        : Structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_orient_int(
-    const struct bmi160_acc_orient_int_cfg* orient_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the necessary setting of orientation interrupt.
- *
- * @param[in] orient_int_cfg : Structure instance of bmi160_acc_orient_int_cfg.
- * @param[in] dev        : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_orient_int_settg(
-    const struct bmi160_acc_orient_int_cfg* orient_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the flat interrupt.
- *
- * @param[in] flat_int  : Structure instance of bmi160_acc_flat_detect_int_cfg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_flat_int(
-    const struct bmi160_acc_flat_detect_int_cfg* flat_int,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the necessary setting of flat interrupt.
- *
- * @param[in] flat_int  : Structure instance of bmi160_acc_flat_detect_int_cfg.
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_flat_int_settg(
-    const struct bmi160_acc_flat_detect_int_cfg* flat_int,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the Low-g interrupt.
- *
- * @param[in] low_g_int : Structure instance of bmi160_acc_low_g_int_cfg.
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_low_g_int(
-    const struct bmi160_acc_low_g_int_cfg* low_g_int,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter) for low-g interrupt.
- *
- * @param[in] low_g_int : Structure instance of bmi160_acc_low_g_int_cfg.
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_low_g_data_src(
-    const struct bmi160_acc_low_g_int_cfg* low_g_int,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the necessary setting of low-g interrupt.
- *
- * @param[in] low_g_int : Structure instance of bmi160_acc_low_g_int_cfg.
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_low_g_int_settg(
-    const struct bmi160_acc_low_g_int_cfg* low_g_int,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the high-g interrupt.
- *
- * @param[in] high_g_int_cfg : Structure instance of bmi160_acc_high_g_int_cfg.
- * @param[in] dev        : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_high_g_int(
-    const struct bmi160_acc_high_g_int_cfg* high_g_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for high-g interrupt.
- *
- * @param[in] high_g_int_cfg : Structure instance of bmi160_acc_high_g_int_cfg.
- * @param[in] dev        : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_high_g_data_src(
-    const struct bmi160_acc_high_g_int_cfg* high_g_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the necessary setting of high-g interrupt.
- *
- * @param[in] high_g_int_cfg : Structure instance of bmi160_acc_high_g_int_cfg.
- * @param[in] dev        : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t config_high_g_int_settg(
-    const struct bmi160_acc_high_g_int_cfg* high_g_int_cfg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the behavioural setting of interrupt pin.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    config_int_out_ctrl(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API configure the mode(input enable, latch or non-latch) of interrupt pin.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    config_int_latch(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API performs the self test for accelerometer of BMI160
- *
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t perform_accel_self_test(struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables to perform the accel self test by setting proper
- * configurations to facilitate accel self test
- *
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_accel_self_test(struct bmi160_dev* dev);
-
-/*!
- * @brief This API performs accel self test with positive excitation
- *
- * @param[in] accel_pos : Structure pointer to store accel data
- *                        for positive excitation
- * @param[in] dev   : structure instance of bmi160_dev
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t accel_self_test_positive_excitation(
-    struct bmi160_sensor_data* accel_pos,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API performs accel self test with negative excitation
- *
- * @param[in] accel_neg : Structure pointer to store accel data
- *                        for negative excitation
- * @param[in] dev   : structure instance of bmi160_dev
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t accel_self_test_negative_excitation(
-    struct bmi160_sensor_data* accel_neg,
-    const struct bmi160_dev* dev);
-
-/*!
- * @brief This API validates the accel self test results
- *
- * @param[in] accel_pos : Structure pointer to store accel data
- *                        for positive excitation
- * @param[in] accel_neg : Structure pointer to store accel data
- *                        for negative excitation
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error / +ve value -> Self test fail
- */
-static int8_t validate_accel_self_test(
-    const struct bmi160_sensor_data* accel_pos,
-    const struct bmi160_sensor_data* accel_neg);
-
-/*!
- * @brief This API performs the self test for gyroscope of BMI160
- *
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t perform_gyro_self_test(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API enables the self test bit to trigger self test for gyro
- *
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t enable_gyro_self_test(const struct bmi160_dev* dev);
-
-/*!
- * @brief This API validates the self test results of gyro
- *
- * @param[in] dev   : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t validate_gyro_self_test(const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API sets FIFO full interrupt of the sensor.This interrupt
- *  occurs when the FIFO is full and the next full data sample would cause
- *  a FIFO overflow, which may delete the old samples.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    set_fifo_full_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This enable the FIFO full interrupt engine.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    enable_fifo_full_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API sets FIFO watermark interrupt of the sensor.The FIFO
- *  watermark interrupt is fired, when the FIFO fill level is above a fifo
- *  watermark.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    set_fifo_watermark_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This enable the FIFO watermark interrupt engine.
- *
- * @param[in] int_config    : Structure instance of bmi160_int_settg.
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    enable_fifo_wtm_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- * @brief This API is used to reset the FIFO related configurations
- *  in the fifo_frame structure.
- *
- * @param[in] dev       : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static void reset_fifo_data_structure(const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to read number of bytes filled
- *  currently in FIFO buffer.
- *
- *  @param[in] bytes_to_read  : Number of bytes available in FIFO at the
- *                              instant which is obtained from FIFO counter.
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success / -ve value -> Error.
- *  @retval Any non zero value -> Fail
- *
- */
-static int8_t get_fifo_byte_counter(uint16_t* bytes_to_read, struct bmi160_dev const* dev);
-
-/*!
- *  @brief This API is used to compute the number of bytes of accel FIFO data
- *  which is to be parsed in header-less mode
- *
- *  @param[out] data_index        : The start index for parsing data
- *  @param[out] data_read_length  : Number of bytes to be parsed
- *  @param[in]  acc_frame_count   : Number of accelerometer frames to be read
- *  @param[in]  dev               : Structure instance of bmi160_dev.
- *
- */
-static void get_accel_len_to_parse(
-    uint16_t* data_index,
-    uint16_t* data_read_length,
-    const uint8_t* acc_frame_count,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the accelerometer data from the
- *  FIFO data in both header mode and header-less mode.
- *  It updates the idx value which is used to store the index of
- *  the current data byte which is parsed.
- *
- *  @param[in,out] acc      : structure instance of sensor data
- *  @param[in,out] idx      : Index value of number of bytes parsed
- *  @param[in,out] acc_idx  : Index value of accelerometer data
- *                                (x,y,z axes) frames parsed
- *  @param[in] frame_info       : It consists of either fifo_data_enable
- *                                parameter in header-less mode or
- *                                frame header data in header mode
- *  @param[in] dev      : structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_accel_frame(
-    struct bmi160_sensor_data* acc,
-    uint16_t* idx,
-    uint8_t* acc_idx,
-    uint8_t frame_info,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the accelerometer data from the
- *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
- *
- * @param[in,out] accel_data        : structure instance of sensor data
- * @param[in,out] data_start_index  : Index value of number of bytes parsed
- * @param[in] dev           : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_accel_data(
-    struct bmi160_sensor_data* accel_data,
-    uint16_t data_start_index,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the accelerometer data from the
- *  FIFO data in header mode.
- *
- *  @param[in,out] accel_data    : Structure instance of sensor data
- *  @param[in,out] accel_length  : Number of accelerometer frames
- *  @param[in] dev               : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void extract_accel_header_mode(
-    struct bmi160_sensor_data* accel_data,
-    uint8_t* accel_length,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API computes the number of bytes of gyro FIFO data
- *  which is to be parsed in header-less mode
- *
- *  @param[out] data_index       : The start index for parsing data
- *  @param[out] data_read_length : No of bytes to be parsed from FIFO buffer
- *  @param[in] gyro_frame_count  : Number of Gyro data frames to be read
- *  @param[in] dev               : Structure instance of bmi160_dev.
- */
-static void get_gyro_len_to_parse(
-    uint16_t* data_index,
-    uint16_t* data_read_length,
-    const uint8_t* gyro_frame_count,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the gyroscope's data from the
- *  FIFO data in both header mode and header-less mode.
- *  It updates the idx value which is used to store the index of
- *  the current data byte which is parsed.
- *
- *  @param[in,out] gyro     : structure instance of sensor data
- *  @param[in,out] idx      : Index value of number of bytes parsed
- *  @param[in,out] gyro_idx : Index value of gyro data
- *                                (x,y,z axes) frames parsed
- *  @param[in] frame_info       : It consists of either fifo_data_enable
- *                                parameter in header-less mode or
- *                                frame header data in header mode
- *  @param[in] dev      : structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_gyro_frame(
-    struct bmi160_sensor_data* gyro,
-    uint16_t* idx,
-    uint8_t* gyro_idx,
-    uint8_t frame_info,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the gyro data from the
- *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
- *
- *  @param[in,out] gyro_data         : structure instance of sensor data
- *  @param[in,out] data_start_index  : Index value of number of bytes parsed
- *  @param[in] dev           : structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_gyro_data(
-    struct bmi160_sensor_data* gyro_data,
-    uint16_t data_start_index,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the gyro data from the
- *  FIFO data in header mode.
- *
- *  @param[in,out] gyro_data     : Structure instance of sensor data
- *  @param[in,out] gyro_length   : Number of gyro frames
- *  @param[in] dev               : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void extract_gyro_header_mode(
-    struct bmi160_sensor_data* gyro_data,
-    uint8_t* gyro_length,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API computes the number of bytes of aux FIFO data
- *  which is to be parsed in header-less mode
- *
- *  @param[out] data_index       : The start index for parsing data
- *  @param[out] data_read_length : No of bytes to be parsed from FIFO buffer
- *  @param[in] aux_frame_count   : Number of Aux data frames to be read
- *  @param[in] dev               : Structure instance of bmi160_dev.
- */
-static void get_aux_len_to_parse(
-    uint16_t* data_index,
-    uint16_t* data_read_length,
-    const uint8_t* aux_frame_count,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the aux's data from the
- *  FIFO data in both header mode and header-less mode.
- *  It updates the idx value which is used to store the index of
- *  the current data byte which is parsed
- *
- *  @param[in,out] aux_data : structure instance of sensor data
- *  @param[in,out] idx      : Index value of number of bytes parsed
- *  @param[in,out] aux_index    : Index value of gyro data
- *                                (x,y,z axes) frames parsed
- *  @param[in] frame_info       : It consists of either fifo_data_enable
- *                                parameter in header-less mode or
- *                                frame header data in header mode
- *  @param[in] dev      : structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_aux_frame(
-    struct bmi160_aux_data* aux_data,
-    uint16_t* idx,
-    uint8_t* aux_index,
-    uint8_t frame_info,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the aux data from the
- *  FIFO data and store it in the instance of the structure bmi160_aux_data.
- *
- * @param[in,out] aux_data      : structure instance of sensor data
- * @param[in,out] data_start_index  : Index value of number of bytes parsed
- * @param[in] dev           : structure instance of bmi160_dev.
- *
- * @return Result of API execution status
- * @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_aux_data(
-    struct bmi160_aux_data* aux_data,
-    uint16_t data_start_index,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse the aux data from the
- *  FIFO data in header mode.
- *
- *  @param[in,out] aux_data     : Structure instance of sensor data
- *  @param[in,out] aux_length   : Number of aux frames
- *  @param[in] dev              : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void extract_aux_header_mode(
-    struct bmi160_aux_data* aux_data,
-    uint8_t* aux_length,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API checks the presence of non-valid frames in the read fifo data.
- *
- *  @param[in,out] data_index    : The index of the current data to
- *                                be parsed from fifo data
- *  @param[in] dev               : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void check_frame_validity(uint16_t* data_index, const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to move the data index ahead of the
- *  current_frame_length parameter when unnecessary FIFO data appears while
- *  extracting the user specified data.
- *
- *  @param[in,out] data_index       : Index of the FIFO data which
- *                                  is to be moved ahead of the
- *                                  current_frame_length
- *  @param[in] current_frame_length : Number of bytes in a particular frame
- *  @param[in] dev                  : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void move_next_frame(
-    uint16_t* data_index,
-    uint8_t current_frame_length,
-    const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse and store the sensor time from the
- *  FIFO data in the structure instance dev.
- *
- *  @param[in,out] data_index : Index of the FIFO data which
- *                              has the sensor time.
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_sensortime_frame(uint16_t* data_index, const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to parse and store the skipped_frame_count from
- *  the FIFO data in the structure instance dev.
- *
- *  @param[in,out] data_index   : Index of the FIFO data which
- *                                    has the skipped frame count.
- *  @param[in] dev              : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static void unpack_skipped_frame(uint16_t* data_index, const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to get the FOC status from the sensor
- *
- *  @param[in,out] foc_status   : Result of FOC status.
- *  @param[in] dev              : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static int8_t get_foc_status(uint8_t* foc_status, struct bmi160_dev const* dev);
-
-/*!
- *  @brief This API is used to configure the offset enable bits in the sensor
- *
- *  @param[in,out] foc_conf   : Structure instance of bmi160_foc_conf which
- *                                   has the FOC and offset configurations
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    configure_offset_enable(const struct bmi160_foc_conf* foc_conf, struct bmi160_dev const* dev);
-
-/*!
- *  @brief This API is used to trigger the FOC in the sensor
- *
- *  @param[in,out] offset     : Structure instance of bmi160_offsets which
- *                              reads and stores the offset values after FOC
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static int8_t trigger_foc(struct bmi160_offsets* offset, struct bmi160_dev const* dev);
-
-/*!
- *  @brief This API is used to map/unmap the Dataready(Accel & Gyro), FIFO full
- *  and FIFO watermark interrupt
- *
- *  @param[in] int_config     : Structure instance of bmi160_int_settg which
- *                              stores the interrupt type and interrupt channel
- *              configurations to map/unmap the interrupt pins
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    map_hardware_interrupt(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*!
- *  @brief This API is used to map/unmap the Any/Sig motion, Step det/Low-g,
- *  Double tap, Single tap, Orientation, Flat, High-G, Nomotion interrupt pins.
- *
- *  @param[in] int_config     : Structure instance of bmi160_int_settg which
- *                              stores the interrupt type and interrupt channel
- *              configurations to map/unmap the interrupt pins
- *  @param[in] dev            : Structure instance of bmi160_dev.
- *
- *  @return Result of API execution status
- *  @retval zero -> Success  / -ve value -> Error
- */
-static int8_t
-    map_feature_interrupt(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev);
-
-/*********************** User function definitions ****************************/
-
-/*!
- * @brief This API reads the data from the given register address
- * of sensor.
- */
-int8_t
-    bmi160_get_regs(uint8_t reg_addr, uint8_t* data, uint16_t len, const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->read == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else if(len == 0) {
-        rslt = BMI160_E_READ_WRITE_LENGTH_INVALID;
-    } else {
-        /* Configuring reg_addr for SPI Interface */
-        if(dev->intf == BMI160_SPI_INTF) {
-            reg_addr = (reg_addr | BMI160_SPI_RD_MASK);
-        }
-
-        rslt = dev->read(dev->id, reg_addr, data, len);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API writes the given data to the register address
- * of sensor.
- */
-int8_t
-    bmi160_set_regs(uint8_t reg_addr, uint8_t* data, uint16_t len, const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-    uint8_t count = 0;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->write == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else if(len == 0) {
-        rslt = BMI160_E_READ_WRITE_LENGTH_INVALID;
-    } else {
-        /* Configuring reg_addr for SPI Interface */
-        if(dev->intf == BMI160_SPI_INTF) {
-            reg_addr = (reg_addr & BMI160_SPI_WR_MASK);
-        }
-
-        if((dev->prev_accel_cfg.power == BMI160_ACCEL_NORMAL_MODE) ||
-           (dev->prev_gyro_cfg.power == BMI160_GYRO_NORMAL_MODE)) {
-            rslt = dev->write(dev->id, reg_addr, data, len);
-
-            /* Kindly refer bmi160 data sheet section 3.2.4 */
-            dev->delay_ms(1);
-
-        } else {
-            /*Burst write is not allowed in
-             * suspend & low power mode */
-            for(; count < len; count++) {
-                rslt = dev->write(dev->id, reg_addr, &data[count], 1);
-                reg_addr++;
-
-                /* Kindly refer bmi160 data sheet section 3.2.4 */
-                dev->delay_ms(1);
-            }
-        }
-
-        if(rslt != BMI160_OK) {
-            rslt = BMI160_E_COM_FAIL;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API is the entry point for sensor.It performs
- *  the selection of I2C/SPI read mechanism according to the
- *  selected interface and reads the chip-id of bmi160 sensor.
- */
-int8_t bmi160_init(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data;
-    uint8_t try = 3;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-
-    /* Dummy read of 0x7F register to enable SPI Interface
-     * if SPI is used */
-    if((rslt == BMI160_OK) && (dev->intf == BMI160_SPI_INTF)) {
-        rslt = bmi160_get_regs(BMI160_SPI_COMM_TEST_ADDR, &data, 1, dev);
-    }
-
-    if(rslt == BMI160_OK) {
-        /* Assign chip id as zero */
-        dev->chip_id = 0;
-
-        while((try--) && (dev->chip_id != BMI160_CHIP_ID)) {
-            /* Read chip_id */
-            rslt = bmi160_get_regs(BMI160_CHIP_ID_ADDR, &dev->chip_id, 1, dev);
-        }
-
-        if((rslt == BMI160_OK) && (dev->chip_id == BMI160_CHIP_ID)) {
-            dev->any_sig_sel = BMI160_BOTH_ANY_SIG_MOTION_DISABLED;
-
-            /* Soft reset */
-            rslt = bmi160_soft_reset(dev);
-        } else {
-            rslt = BMI160_E_DEV_NOT_FOUND;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API resets and restarts the device.
- * All register values are overwritten with default parameters.
- */
-int8_t bmi160_soft_reset(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = BMI160_SOFT_RESET_CMD;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Reset the device */
-        rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &data, 1, dev);
-        dev->delay_ms(BMI160_SOFT_RESET_DELAY_MS);
-        if((rslt == BMI160_OK) && (dev->intf == BMI160_SPI_INTF)) {
-            /* Dummy read of 0x7F register to enable SPI Interface
-             * if SPI is used */
-            rslt = bmi160_get_regs(BMI160_SPI_COMM_TEST_ADDR, &data, 1, dev);
-        }
-
-        if(rslt == BMI160_OK) {
-            /* Update the default parameters */
-            default_param_settg(dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configures the power mode, range and bandwidth
- * of sensor.
- */
-int8_t bmi160_set_sens_conf(struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = set_accel_conf(dev);
-        if(rslt == BMI160_OK) {
-            rslt = set_gyro_conf(dev);
-            if(rslt == BMI160_OK) {
-                /* write power mode for accel and gyro */
-                rslt = bmi160_set_power_mode(dev);
-                if(rslt == BMI160_OK) {
-                    rslt = check_invalid_settg(dev);
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API gets accel and gyro configurations.
- */
-int8_t bmi160_get_sens_conf(struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = get_accel_conf(dev);
-        if(rslt == BMI160_OK) {
-            rslt = get_gyro_conf(dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the power mode of the sensor.
- */
-int8_t bmi160_set_power_mode(struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = set_accel_pwr(dev);
-        if(rslt == BMI160_OK) {
-            rslt = set_gyro_pwr(dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API gets the power mode of the sensor.
- */
-int8_t bmi160_get_power_mode(struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t power_mode = 0;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_get_regs(BMI160_PMU_STATUS_ADDR, &power_mode, 1, dev);
-        if(rslt == BMI160_OK) {
-            /* Power mode of the accel, gyro sensor is obtained */
-            dev->gyro_cfg.power = BMI160_GET_BITS(power_mode, BMI160_GYRO_POWER_MODE);
-            dev->accel_cfg.power = BMI160_GET_BITS(power_mode, BMI160_ACCEL_POWER_MODE);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads sensor data, stores it in
- * the bmi160_sensor_data structure pointer passed by the user.
- */
-int8_t bmi160_get_sensor_data(
-    uint8_t select_sensor,
-    struct bmi160_sensor_data* accel,
-    struct bmi160_sensor_data* gyro,
-    const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-    uint8_t time_sel;
-    uint8_t sen_sel;
-    uint8_t len = 0;
-
-    /*Extract the sensor  and time select information*/
-    sen_sel = select_sensor & BMI160_SEN_SEL_MASK;
-    time_sel = ((sen_sel & BMI160_TIME_SEL) >> 2);
-    sen_sel = sen_sel & (BMI160_ACCEL_SEL | BMI160_GYRO_SEL);
-    if(time_sel == 1) {
-        len = 3;
-    }
-
-    /* Null-pointer check */
-    if(dev != NULL) {
-        switch(sen_sel) {
-        case BMI160_ACCEL_ONLY:
-
-            /* Null-pointer check */
-            if(accel == NULL) {
-                rslt = BMI160_E_NULL_PTR;
-            } else {
-                rslt = get_accel_data(len, accel, dev);
-            }
-
-            break;
-        case BMI160_GYRO_ONLY:
-
-            /* Null-pointer check */
-            if(gyro == NULL) {
-                rslt = BMI160_E_NULL_PTR;
-            } else {
-                rslt = get_gyro_data(len, gyro, dev);
-            }
-
-            break;
-        case BMI160_BOTH_ACCEL_AND_GYRO:
-
-            /* Null-pointer check */
-            if((gyro == NULL) || (accel == NULL)) {
-                rslt = BMI160_E_NULL_PTR;
-            } else {
-                rslt = get_accel_gyro_data(len, accel, gyro, dev);
-            }
-
-            break;
-        default:
-            rslt = BMI160_E_INVALID_INPUT;
-            break;
-        }
-    } else {
-        rslt = BMI160_E_NULL_PTR;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configures the necessary interrupt based on
- *  the user settings in the bmi160_int_settg structure instance.
- */
-int8_t bmi160_set_int_config(struct bmi160_int_settg* int_config, struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    switch(int_config->int_type) {
-    case BMI160_ACC_ANY_MOTION_INT:
-
-        /*Any-motion  interrupt*/
-        rslt = set_accel_any_motion_int(int_config, dev);
-        break;
-    case BMI160_ACC_SIG_MOTION_INT:
-
-        /* Significant motion interrupt */
-        rslt = set_accel_sig_motion_int(int_config, dev);
-        break;
-    case BMI160_ACC_SLOW_NO_MOTION_INT:
-
-        /* Slow or no motion interrupt */
-        rslt = set_accel_no_motion_int(int_config, dev);
-        break;
-    case BMI160_ACC_DOUBLE_TAP_INT:
-    case BMI160_ACC_SINGLE_TAP_INT:
-
-        /* Double tap and single tap Interrupt */
-        rslt = set_accel_tap_int(int_config, dev);
-        break;
-    case BMI160_STEP_DETECT_INT:
-
-        /* Step detector interrupt */
-        rslt = set_accel_step_detect_int(int_config, dev);
-        break;
-    case BMI160_ACC_ORIENT_INT:
-
-        /* Orientation interrupt */
-        rslt = set_accel_orientation_int(int_config, dev);
-        break;
-    case BMI160_ACC_FLAT_INT:
-
-        /* Flat detection interrupt */
-        rslt = set_accel_flat_detect_int(int_config, dev);
-        break;
-    case BMI160_ACC_LOW_G_INT:
-
-        /* Low-g interrupt */
-        rslt = set_accel_low_g_int(int_config, dev);
-        break;
-    case BMI160_ACC_HIGH_G_INT:
-
-        /* High-g interrupt */
-        rslt = set_accel_high_g_int(int_config, dev);
-        break;
-    case BMI160_ACC_GYRO_DATA_RDY_INT:
-
-        /* Data ready interrupt */
-        rslt = set_accel_gyro_data_ready_int(int_config, dev);
-        break;
-    case BMI160_ACC_GYRO_FIFO_FULL_INT:
-
-        /* Fifo full interrupt */
-        rslt = set_fifo_full_int(int_config, dev);
-        break;
-    case BMI160_ACC_GYRO_FIFO_WATERMARK_INT:
-
-        /* Fifo water-mark interrupt */
-        rslt = set_fifo_watermark_int(int_config, dev);
-        break;
-    case BMI160_FIFO_TAG_INT_PIN:
-
-        /* Fifo tagging feature support */
-        /* Configure Interrupt pins */
-        rslt = set_intr_pin_config(int_config, dev);
-        break;
-    default:
-        break;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables or disable the step counter feature.
- * 1 - enable step counter (0 - disable)
- */
-int8_t bmi160_set_step_counter(uint8_t step_cnt_enable, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_get_regs(BMI160_INT_STEP_CONFIG_1_ADDR, &data, 1, dev);
-        if(rslt == BMI160_OK) {
-            if(step_cnt_enable == BMI160_ENABLE) {
-                data |= (uint8_t)(step_cnt_enable << 3);
-            } else {
-                data &= ~BMI160_STEP_COUNT_EN_BIT_MASK;
-            }
-
-            rslt = bmi160_set_regs(BMI160_INT_STEP_CONFIG_1_ADDR, &data, 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads the step counter value.
- */
-int8_t bmi160_read_step_counter(uint16_t* step_val, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[2] = {0, 0};
-    uint16_t msb = 0;
-    uint8_t lsb = 0;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_get_regs(BMI160_INT_STEP_CNT_0_ADDR, data, 2, dev);
-        if(rslt == BMI160_OK) {
-            lsb = data[0];
-            msb = data[1] << 8;
-            *step_val = msb | lsb;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads the mention no of byte of data from the given
- * register address of auxiliary sensor.
- */
-int8_t bmi160_aux_read(
-    uint8_t reg_addr,
-    uint8_t* aux_data,
-    uint16_t len,
-    const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-    uint16_t map_len = 0;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->read == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        if(dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE) {
-            rslt = map_read_len(&map_len, dev);
-            if(rslt == BMI160_OK) {
-                rslt = extract_aux_read(map_len, reg_addr, aux_data, len, dev);
-            }
-        } else {
-            rslt = BMI160_E_INVALID_INPUT;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API writes the mention no of byte of data to the given
- * register address of auxiliary sensor.
- */
-int8_t bmi160_aux_write(
-    uint8_t reg_addr,
-    uint8_t* aux_data,
-    uint16_t len,
-    const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-    uint8_t count = 0;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->write == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        for(; count < len; count++) {
-            /* set data to write */
-            rslt = bmi160_set_regs(BMI160_AUX_IF_4_ADDR, aux_data, 1, dev);
-            dev->delay_ms(BMI160_AUX_COM_DELAY);
-            if(rslt == BMI160_OK) {
-                /* set address to write */
-                rslt = bmi160_set_regs(BMI160_AUX_IF_3_ADDR, &reg_addr, 1, dev);
-                dev->delay_ms(BMI160_AUX_COM_DELAY);
-                if(rslt == BMI160_OK && (count < len - 1)) {
-                    aux_data++;
-                    reg_addr++;
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API initialize the auxiliary sensor
- * in order to access it.
- */
-int8_t bmi160_aux_init(const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        if(dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE) {
-            /* Configures the auxiliary sensor interface settings */
-            rslt = config_aux_settg(dev);
-        } else {
-            rslt = BMI160_E_INVALID_INPUT;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API is used to setup the auxiliary sensor of bmi160 in auto mode
- * Thus enabling the auto update of 8 bytes of data from auxiliary sensor
- * to BMI160 register address 0x04 to 0x0B
- */
-int8_t bmi160_set_aux_auto_mode(uint8_t* data_addr, struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        if(dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE) {
-            /* Write the aux. address to read in 0x4D of BMI160*/
-            rslt = bmi160_set_regs(BMI160_AUX_IF_2_ADDR, data_addr, 1, dev);
-            dev->delay_ms(BMI160_AUX_COM_DELAY);
-            if(rslt == BMI160_OK) {
-                /* Configure the polling ODR for
-                 * auxiliary sensor */
-                rslt = config_aux_odr(dev);
-                if(rslt == BMI160_OK) {
-                    /* Disable the aux. manual mode, i.e aux.
-                     * sensor is in auto-mode (data-mode) */
-                    dev->aux_cfg.manual_enable = BMI160_DISABLE;
-                    rslt = bmi160_config_aux_mode(dev);
-
-                    /*  Auxiliary sensor data is obtained
-                     * in auto mode from this point */
-                }
-            }
-        } else {
-            rslt = BMI160_E_INVALID_INPUT;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configures the 0x4C register and settings like
- * Auxiliary sensor manual enable/ disable and aux burst read length.
- */
-int8_t bmi160_config_aux_mode(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t aux_if[2] = {(uint8_t)(dev->aux_cfg.aux_i2c_addr * 2), 0};
-
-    rslt = bmi160_get_regs(BMI160_AUX_IF_1_ADDR, &aux_if[1], 1, dev);
-    if(rslt == BMI160_OK) {
-        /* update the Auxiliary interface to manual/auto mode */
-        aux_if[1] = BMI160_SET_BITS(aux_if[1], BMI160_MANUAL_MODE_EN, dev->aux_cfg.manual_enable);
-
-        /* update the burst read length defined by user */
-        aux_if[1] =
-            BMI160_SET_BITS_POS_0(aux_if[1], BMI160_AUX_READ_BURST, dev->aux_cfg.aux_rd_burst_len);
-
-        /* Set the secondary interface address and manual mode
-         * along with burst read length */
-        rslt = bmi160_set_regs(BMI160_AUX_IF_0_ADDR, &aux_if[0], 2, dev);
-        dev->delay_ms(BMI160_AUX_COM_DELAY);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API is used to read the raw uncompensated auxiliary sensor
- * data of 8 bytes from BMI160 register address 0x04 to 0x0B
- */
-int8_t bmi160_read_aux_data_auto_mode(uint8_t* aux_data, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        if((dev->aux_cfg.aux_sensor_enable == BMI160_ENABLE) &&
-           (dev->aux_cfg.manual_enable == BMI160_DISABLE)) {
-            /* Read the aux. sensor's raw data */
-            rslt = bmi160_get_regs(BMI160_AUX_DATA_ADDR, aux_data, 8, dev);
-        } else {
-            rslt = BMI160_E_INVALID_INPUT;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This is used to perform self test of accel/gyro of the BMI160 sensor
- */
-int8_t bmi160_perform_self_test(uint8_t select_sensor, struct bmi160_dev* dev) {
-    int8_t rslt;
-    int8_t self_test_rslt = 0;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Proceed if null check is fine */
-        switch(select_sensor) {
-        case BMI160_ACCEL_ONLY:
-            rslt = perform_accel_self_test(dev);
-            break;
-        case BMI160_GYRO_ONLY:
-
-            /* Set the power mode as normal mode */
-            dev->gyro_cfg.power = BMI160_GYRO_NORMAL_MODE;
-            rslt = bmi160_set_power_mode(dev);
-
-            /* Perform gyro self test */
-            if(rslt == BMI160_OK) {
-                /* Perform gyro self test */
-                rslt = perform_gyro_self_test(dev);
-            }
-
-            break;
-        default:
-            rslt = BMI160_E_INVALID_INPUT;
-            break;
-        }
-
-        /* Check to ensure bus error does not occur */
-        if(rslt >= BMI160_OK) {
-            /* Store the status of self test result */
-            self_test_rslt = rslt;
-
-            /* Perform soft reset */
-            rslt = bmi160_soft_reset(dev);
-        }
-
-        /* Check to ensure bus operations are success */
-        if(rslt == BMI160_OK) {
-            /* Restore self_test_rslt as return value */
-            rslt = self_test_rslt;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads the data from fifo buffer.
- */
-int8_t bmi160_get_fifo_data(struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-    uint16_t bytes_to_read = 0;
-    uint16_t user_fifo_len = 0;
-
-    /* check the bmi160 structure as NULL*/
-    if((dev == NULL) || (dev->fifo->data == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        reset_fifo_data_structure(dev);
-
-        /* get current FIFO fill-level*/
-        rslt = get_fifo_byte_counter(&bytes_to_read, dev);
-        if(rslt == BMI160_OK) {
-            user_fifo_len = dev->fifo->length;
-            if((dev->fifo->length > bytes_to_read)) {
-                /* Handling the case where user requests
-                 * more data than available in FIFO */
-                dev->fifo->length = bytes_to_read;
-            }
-
-            if((dev->fifo->fifo_time_enable == BMI160_FIFO_TIME_ENABLE) &&
-               (bytes_to_read + BMI160_FIFO_BYTES_OVERREAD <= user_fifo_len)) {
-                /* Handling case of sensor time availability*/
-                dev->fifo->length = dev->fifo->length + BMI160_FIFO_BYTES_OVERREAD;
-            }
-
-            /* read only the filled bytes in the FIFO Buffer */
-            rslt = bmi160_get_regs(BMI160_FIFO_DATA_ADDR, dev->fifo->data, dev->fifo->length, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API writes fifo_flush command to command register.This
- *  action clears all data in the Fifo without changing fifo configuration
- *  settings
- */
-int8_t bmi160_set_fifo_flush(const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t data = BMI160_FIFO_FLUSH_VALUE;
-    uint8_t reg_addr = BMI160_COMMAND_REG_ADDR;
-
-    /* Check the bmi160_dev structure for NULL address*/
-    if(dev == NULL) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the FIFO configuration in the sensor.
- */
-int8_t bmi160_set_fifo_config(uint8_t config, uint8_t enable, struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-    uint8_t data = 0;
-    uint8_t reg_addr = BMI160_FIFO_CONFIG_1_ADDR;
-    uint8_t fifo_config = config & BMI160_FIFO_CONFIG_1_MASK;
-
-    /* Check the bmi160_dev structure for NULL address*/
-    if(dev == NULL) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_get_regs(reg_addr, &data, BMI160_ONE, dev);
-        if(rslt == BMI160_OK) {
-            if(fifo_config > 0) {
-                if(enable == BMI160_ENABLE) {
-                    data = data | fifo_config;
-                } else {
-                    data = data & (~fifo_config);
-                }
-            }
-
-            /* write fifo frame content configuration*/
-            rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
-            if(rslt == BMI160_OK) {
-                /* read fifo frame content configuration*/
-                rslt = bmi160_get_regs(reg_addr, &data, BMI160_ONE, dev);
-                if(rslt == BMI160_OK) {
-                    /* extract fifo header enabled status */
-                    dev->fifo->fifo_header_enable = data & BMI160_FIFO_HEAD_ENABLE;
-
-                    /* extract accel/gyr/aux. data enabled status */
-                    dev->fifo->fifo_data_enable = data & BMI160_FIFO_M_G_A_ENABLE;
-
-                    /* extract fifo sensor time enabled status */
-                    dev->fifo->fifo_time_enable = data & BMI160_FIFO_TIME_ENABLE;
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*! @brief This API is used to configure the down sampling ratios of
- *  the accel and gyro data for FIFO.Also, it configures filtered or
- *  pre-filtered data for accel and gyro.
- *
- */
-int8_t bmi160_set_fifo_down(uint8_t fifo_down, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t data = 0;
-    uint8_t reg_addr = BMI160_FIFO_DOWN_ADDR;
-
-    /* Check the bmi160_dev structure for NULL address*/
-    if(dev == NULL) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_get_regs(reg_addr, &data, BMI160_ONE, dev);
-        if(rslt == BMI160_OK) {
-            data = data | fifo_down;
-            rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API sets the FIFO watermark level in the sensor.
- *
- */
-int8_t bmi160_set_fifo_wm(uint8_t fifo_wm, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t data = fifo_wm;
-    uint8_t reg_addr = BMI160_FIFO_CONFIG_0_ADDR;
-
-    /* Check the bmi160_dev structure for NULL address*/
-    if(dev == NULL) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = bmi160_set_regs(reg_addr, &data, BMI160_ONE, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API parses and extracts the accelerometer frames from
- *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
- *  the "accel_data" structure instance.
- */
-int8_t bmi160_extract_accel(
-    struct bmi160_sensor_data* accel_data,
-    uint8_t* accel_length,
-    struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-    uint16_t data_index = 0;
-    uint16_t data_read_length = 0;
-    uint8_t accel_index = 0;
-    uint8_t fifo_data_enable = 0;
-
-    if(dev == NULL || dev->fifo == NULL || dev->fifo->data == NULL) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Parsing the FIFO data in header-less mode */
-        if(dev->fifo->fifo_header_enable == 0) {
-            /* Number of bytes to be parsed from FIFO */
-            get_accel_len_to_parse(&data_index, &data_read_length, accel_length, dev);
-            for(; data_index < data_read_length;) {
-                /*Check for the availability of next two bytes of FIFO data */
-                check_frame_validity(&data_index, dev);
-                fifo_data_enable = dev->fifo->fifo_data_enable;
-                unpack_accel_frame(accel_data, &data_index, &accel_index, fifo_data_enable, dev);
-            }
-
-            /* update number of accel data read*/
-            *accel_length = accel_index;
-
-            /*update the accel byte index*/
-            dev->fifo->accel_byte_start_idx = data_index;
-        } else {
-            /* Parsing the FIFO data in header mode */
-            extract_accel_header_mode(accel_data, accel_length, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API parses and extracts the gyro frames from
- *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
- *  the "gyro_data" structure instance.
- */
-int8_t bmi160_extract_gyro(
-    struct bmi160_sensor_data* gyro_data,
-    uint8_t* gyro_length,
-    struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-    uint16_t data_index = 0;
-    uint16_t data_read_length = 0;
-    uint8_t gyro_index = 0;
-    uint8_t fifo_data_enable = 0;
-
-    if(dev == NULL || dev->fifo->data == NULL) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Parsing the FIFO data in header-less mode */
-        if(dev->fifo->fifo_header_enable == 0) {
-            /* Number of bytes to be parsed from FIFO */
-            get_gyro_len_to_parse(&data_index, &data_read_length, gyro_length, dev);
-            for(; data_index < data_read_length;) {
-                /*Check for the availability of next two bytes of FIFO data */
-                check_frame_validity(&data_index, dev);
-                fifo_data_enable = dev->fifo->fifo_data_enable;
-                unpack_gyro_frame(gyro_data, &data_index, &gyro_index, fifo_data_enable, dev);
-            }
-
-            /* update number of gyro data read */
-            *gyro_length = gyro_index;
-
-            /* update the gyro byte index */
-            dev->fifo->gyro_byte_start_idx = data_index;
-        } else {
-            /* Parsing the FIFO data in header mode */
-            extract_gyro_header_mode(gyro_data, gyro_length, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API parses and extracts the aux frames from
- *  FIFO data read by the "bmi160_get_fifo_data" API and stores it in
- *  the "aux_data" structure instance.
- */
-int8_t bmi160_extract_aux(
-    struct bmi160_aux_data* aux_data,
-    uint8_t* aux_len,
-    struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-    uint16_t data_index = 0;
-    uint16_t data_read_length = 0;
-    uint8_t aux_index = 0;
-    uint8_t fifo_data_enable = 0;
-
-    if((dev == NULL) || (dev->fifo->data == NULL) || (aux_data == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Parsing the FIFO data in header-less mode */
-        if(dev->fifo->fifo_header_enable == 0) {
-            /* Number of bytes to be parsed from FIFO */
-            get_aux_len_to_parse(&data_index, &data_read_length, aux_len, dev);
-            for(; data_index < data_read_length;) {
-                /* Check for the availability of next two
-                 * bytes of FIFO data */
-                check_frame_validity(&data_index, dev);
-                fifo_data_enable = dev->fifo->fifo_data_enable;
-                unpack_aux_frame(aux_data, &data_index, &aux_index, fifo_data_enable, dev);
-            }
-
-            /* update number of aux data read */
-            *aux_len = aux_index;
-
-            /* update the aux byte index */
-            dev->fifo->aux_byte_start_idx = data_index;
-        } else {
-            /* Parsing the FIFO data in header mode */
-            extract_aux_header_mode(aux_data, aux_len, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API starts the FOC of accel and gyro
- *
- *  @note FOC should not be used in low-power mode of sensor
- *
- *  @note Accel FOC targets values of +1g , 0g , -1g
- *  Gyro FOC always targets value of 0 dps
- */
-int8_t bmi160_start_foc(
-    const struct bmi160_foc_conf* foc_conf,
-    struct bmi160_offsets* offset,
-    struct bmi160_dev const* dev) {
-    int8_t rslt;
-    uint8_t data;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Set the offset enable bits */
-        rslt = configure_offset_enable(foc_conf, dev);
-        if(rslt == BMI160_OK) {
-            /* Read the FOC config from the sensor */
-            rslt = bmi160_get_regs(BMI160_FOC_CONF_ADDR, &data, 1, dev);
-
-            /* Set the FOC config for gyro */
-            data = BMI160_SET_BITS(data, BMI160_GYRO_FOC_EN, foc_conf->foc_gyr_en);
-
-            /* Set the FOC config for accel xyz axes */
-            data = BMI160_SET_BITS(data, BMI160_ACCEL_FOC_X_CONF, foc_conf->foc_acc_x);
-            data = BMI160_SET_BITS(data, BMI160_ACCEL_FOC_Y_CONF, foc_conf->foc_acc_y);
-            data = BMI160_SET_BITS_POS_0(data, BMI160_ACCEL_FOC_Z_CONF, foc_conf->foc_acc_z);
-            if(rslt == BMI160_OK) {
-                /* Set the FOC config in the sensor */
-                rslt = bmi160_set_regs(BMI160_FOC_CONF_ADDR, &data, 1, dev);
-                if(rslt == BMI160_OK) {
-                    /* Procedure to trigger
-                     * FOC and check status */
-                    rslt = trigger_foc(offset, dev);
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API reads and stores the offset values of accel and gyro
- */
-int8_t bmi160_get_offsets(struct bmi160_offsets* offset, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[7];
-    uint8_t lsb, msb;
-    int16_t offset_msb, offset_lsb;
-    int16_t offset_data;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Read the FOC config from the sensor */
-        rslt = bmi160_get_regs(BMI160_OFFSET_ADDR, data, 7, dev);
-
-        /* Accel offsets */
-        offset->off_acc_x = (int8_t)data[0];
-        offset->off_acc_y = (int8_t)data[1];
-        offset->off_acc_z = (int8_t)data[2];
-
-        /* Gyro x-axis offset */
-        lsb = data[3];
-        msb = BMI160_GET_BITS_POS_0(data[6], BMI160_GYRO_OFFSET_X);
-        offset_msb = (int16_t)(msb << 14);
-        offset_lsb = lsb << 6;
-        offset_data = offset_msb | offset_lsb;
-
-        /* Divide by 64 to get the Right shift by 6 value */
-        offset->off_gyro_x = (int16_t)(offset_data / 64);
-
-        /* Gyro y-axis offset */
-        lsb = data[4];
-        msb = BMI160_GET_BITS(data[6], BMI160_GYRO_OFFSET_Y);
-        offset_msb = (int16_t)(msb << 14);
-        offset_lsb = lsb << 6;
-        offset_data = offset_msb | offset_lsb;
-
-        /* Divide by 64 to get the Right shift by 6 value */
-        offset->off_gyro_y = (int16_t)(offset_data / 64);
-
-        /* Gyro z-axis offset */
-        lsb = data[5];
-        msb = BMI160_GET_BITS(data[6], BMI160_GYRO_OFFSET_Z);
-        offset_msb = (int16_t)(msb << 14);
-        offset_lsb = lsb << 6;
-        offset_data = offset_msb | offset_lsb;
-
-        /* Divide by 64 to get the Right shift by 6 value */
-        offset->off_gyro_z = (int16_t)(offset_data / 64);
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API writes the offset values of accel and gyro to
- *  the sensor but these values will be reset on POR or soft reset.
- */
-int8_t bmi160_set_offsets(
-    const struct bmi160_foc_conf* foc_conf,
-    const struct bmi160_offsets* offset,
-    struct bmi160_dev const* dev) {
-    int8_t rslt;
-    uint8_t data[7];
-    uint8_t x_msb, y_msb, z_msb;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Update the accel offset */
-        data[0] = (uint8_t)offset->off_acc_x;
-        data[1] = (uint8_t)offset->off_acc_y;
-        data[2] = (uint8_t)offset->off_acc_z;
-
-        /* Update the LSB of gyro offset */
-        data[3] = BMI160_GET_LSB(offset->off_gyro_x);
-        data[4] = BMI160_GET_LSB(offset->off_gyro_y);
-        data[5] = BMI160_GET_LSB(offset->off_gyro_z);
-
-        /* Update the MSB of gyro offset */
-        x_msb = BMI160_GET_BITS(offset->off_gyro_x, BMI160_GYRO_OFFSET);
-        y_msb = BMI160_GET_BITS(offset->off_gyro_y, BMI160_GYRO_OFFSET);
-        z_msb = BMI160_GET_BITS(offset->off_gyro_z, BMI160_GYRO_OFFSET);
-        data[6] = (uint8_t)(z_msb << 4 | y_msb << 2 | x_msb);
-
-        /* Set the offset enable/disable for gyro and accel */
-        data[6] = BMI160_SET_BITS(data[6], BMI160_GYRO_OFFSET_EN, foc_conf->gyro_off_en);
-        data[6] = BMI160_SET_BITS(data[6], BMI160_ACCEL_OFFSET_EN, foc_conf->acc_off_en);
-
-        /* Set the offset config and values in the sensor */
-        rslt = bmi160_set_regs(BMI160_OFFSET_ADDR, data, 7, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API writes the image registers values to NVM which is
- *  stored even after POR or soft reset
- */
-int8_t bmi160_update_nvm(struct bmi160_dev const* dev) {
-    int8_t rslt;
-    uint8_t data;
-    uint8_t cmd = BMI160_NVM_BACKUP_EN;
-
-    /* Read the nvm_prog_en configuration */
-    rslt = bmi160_get_regs(BMI160_CONF_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        data = BMI160_SET_BITS(data, BMI160_NVM_UPDATE, 1);
-
-        /* Set the nvm_prog_en bit in the sensor */
-        rslt = bmi160_set_regs(BMI160_CONF_ADDR, &data, 1, dev);
-        if(rslt == BMI160_OK) {
-            /* Update NVM */
-            rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &cmd, 1, dev);
-            if(rslt == BMI160_OK) {
-                /* Check for NVM ready status */
-                rslt = bmi160_get_regs(BMI160_STATUS_ADDR, &data, 1, dev);
-                if(rslt == BMI160_OK) {
-                    data = BMI160_GET_BITS(data, BMI160_NVM_STATUS);
-                    if(data != BMI160_ENABLE) {
-                        /* Delay to update NVM */
-                        dev->delay_ms(25);
-                    }
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API gets the interrupt status from the sensor.
- */
-int8_t bmi160_get_int_status(
-    enum bmi160_int_status_sel int_status_sel,
-    union bmi160_int_status* int_status,
-    struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-
-    /* To get the status of all interrupts */
-    if(int_status_sel == BMI160_INT_STATUS_ALL) {
-        rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR, &int_status->data[0], 4, dev);
-    } else {
-        if(int_status_sel & BMI160_INT_STATUS_0) {
-            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR, &int_status->data[0], 1, dev);
-        }
-
-        if(int_status_sel & BMI160_INT_STATUS_1) {
-            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR + 1, &int_status->data[1], 1, dev);
-        }
-
-        if(int_status_sel & BMI160_INT_STATUS_2) {
-            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR + 2, &int_status->data[2], 1, dev);
-        }
-
-        if(int_status_sel & BMI160_INT_STATUS_3) {
-            rslt = bmi160_get_regs(BMI160_INT_STATUS_ADDR + 3, &int_status->data[3], 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*********************** Local function definitions ***************************/
-
-/*!
- * @brief This API sets the any-motion interrupt of the sensor.
- * This interrupt occurs when accel values exceeds preset threshold
- * for a certain period of time.
- */
-static int8_t
-    set_accel_any_motion_int(struct bmi160_int_settg* int_config, struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg =
-            &(int_config->int_type_cfg.acc_any_motion_int);
-        rslt = enable_accel_any_motion_int(any_motion_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            rslt = config_any_motion_int_settg(int_config, any_motion_int_cfg, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets tap interrupts.Interrupt is fired when
- * tap movements happen.
- */
-static int8_t
-    set_accel_tap_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_tap_int_cfg* tap_int_cfg = &(int_config->int_type_cfg.acc_tap_int);
-        rslt = enable_tap_int(int_config, tap_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                rslt = config_tap_int_settg(int_config, tap_int_cfg, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the data ready interrupt for both accel and gyro.
- * This interrupt occurs when new accel and gyro data comes.
- */
-static int8_t set_accel_gyro_data_ready_int(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        rslt = enable_data_ready_int(dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                rslt = map_hardware_interrupt(int_config, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the significant motion interrupt of the sensor.This
- * interrupt occurs when there is change in user location.
- */
-static int8_t
-    set_accel_sig_motion_int(struct bmi160_int_settg* int_config, struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg =
-            &(int_config->int_type_cfg.acc_sig_motion_int);
-        rslt = enable_sig_motion_int(sig_mot_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            rslt = config_sig_motion_int_settg(int_config, sig_mot_int_cfg, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the no motion/slow motion interrupt of the sensor.
- * Slow motion is similar to any motion interrupt.No motion interrupt
- * occurs when slope bet. two accel values falls below preset threshold
- * for preset duration.
- */
-static int8_t
-    set_accel_no_motion_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg =
-            &(int_config->int_type_cfg.acc_no_motion_int);
-        rslt = enable_no_motion_int(no_mot_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure the INT PIN settings*/
-            rslt = config_no_motion_int_settg(int_config, no_mot_int_cfg, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the step detection interrupt.This interrupt
- * occurs when the single step causes accel values to go above
- * preset threshold.
- */
-static int8_t
-    set_accel_step_detect_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_step_detect_int_cfg* step_detect_int_cfg =
-            &(int_config->int_type_cfg.acc_step_detect_int);
-        rslt = enable_step_detect_int(step_detect_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                rslt = map_feature_interrupt(int_config, dev);
-                if(rslt == BMI160_OK) {
-                    rslt = config_step_detect(step_detect_int_cfg, dev);
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the orientation interrupt of the sensor.This
- * interrupt occurs when there is orientation change in the sensor
- * with respect to gravitational field vector g.
- */
-static int8_t
-    set_accel_orientation_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_orient_int_cfg* orient_int_cfg =
-            &(int_config->int_type_cfg.acc_orient_int);
-        rslt = enable_orient_int(orient_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                /* map INT pin to orient interrupt */
-                rslt = map_feature_interrupt(int_config, dev);
-                if(rslt == BMI160_OK) {
-                    /* configure the
-                     * orientation setting*/
-                    rslt = config_orient_int_settg(orient_int_cfg, dev);
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the flat interrupt of the sensor.This interrupt
- * occurs in case of flat orientation
- */
-static int8_t
-    set_accel_flat_detect_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_flat_detect_int_cfg* flat_detect_int =
-            &(int_config->int_type_cfg.acc_flat_int);
-
-        /* enable the flat interrupt */
-        rslt = enable_flat_int(flat_detect_int, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                /* map INT pin to flat interrupt */
-                rslt = map_feature_interrupt(int_config, dev);
-                if(rslt == BMI160_OK) {
-                    /* configure the flat setting*/
-                    rslt = config_flat_int_settg(flat_detect_int, dev);
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the low-g interrupt of the sensor.This interrupt
- * occurs during free-fall.
- */
-static int8_t
-    set_accel_low_g_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_low_g_int_cfg* low_g_int = &(int_config->int_type_cfg.acc_low_g_int);
-
-        /* Enable the low-g interrupt*/
-        rslt = enable_low_g_int(low_g_int, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                /* Map INT pin to low-g interrupt */
-                rslt = map_feature_interrupt(int_config, dev);
-                if(rslt == BMI160_OK) {
-                    /* configure the data source
-                     * for low-g interrupt*/
-                    rslt = config_low_g_data_src(low_g_int, dev);
-                    if(rslt == BMI160_OK) {
-                        rslt = config_low_g_int_settg(low_g_int, dev);
-                    }
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the high-g interrupt of the sensor.The interrupt
- * occurs if the absolute value of acceleration data of any enabled axis
- * exceeds the programmed threshold and the sign of the value does not
- * change for a preset duration.
- */
-static int8_t
-    set_accel_high_g_int(struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if((rslt != BMI160_OK) || (int_config == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* updating the interrupt structure to local structure */
-        struct bmi160_acc_high_g_int_cfg* high_g_int_cfg =
-            &(int_config->int_type_cfg.acc_high_g_int);
-
-        /* Enable the high-g interrupt */
-        rslt = enable_high_g_int(high_g_int_cfg, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                /* Map INT pin to high-g interrupt */
-                rslt = map_feature_interrupt(int_config, dev);
-                if(rslt == BMI160_OK) {
-                    /* configure the data source
-                     * for high-g interrupt*/
-                    rslt = config_high_g_data_src(high_g_int_cfg, dev);
-                    if(rslt == BMI160_OK) {
-                        rslt = config_high_g_int_settg(high_g_int_cfg, dev);
-                    }
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configures the pins to fire the
- * interrupt signal when it occurs.
- */
-static int8_t
-    set_intr_pin_config(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* configure the behavioural settings of interrupt pin */
-    rslt = config_int_out_ctrl(int_config, dev);
-    if(rslt == BMI160_OK) {
-        rslt = config_int_latch(int_config, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This internal API is used to validate the device structure pointer for
- * null conditions.
- */
-static int8_t null_ptr_check(const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    if((dev == NULL) || (dev->read == NULL) || (dev->write == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Device structure is fine */
-        rslt = BMI160_OK;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the default configuration parameters of accel & gyro.
- * Also maintain the previous state of configurations.
- */
-static void default_param_settg(struct bmi160_dev* dev) {
-    /* Initializing accel and gyro params with
-     * default values */
-    dev->accel_cfg.bw = BMI160_ACCEL_BW_NORMAL_AVG4;
-    dev->accel_cfg.odr = BMI160_ACCEL_ODR_100HZ;
-    dev->accel_cfg.power = BMI160_ACCEL_SUSPEND_MODE;
-    dev->accel_cfg.range = BMI160_ACCEL_RANGE_2G;
-    dev->gyro_cfg.bw = BMI160_GYRO_BW_NORMAL_MODE;
-    dev->gyro_cfg.odr = BMI160_GYRO_ODR_100HZ;
-    dev->gyro_cfg.power = BMI160_GYRO_SUSPEND_MODE;
-    dev->gyro_cfg.range = BMI160_GYRO_RANGE_2000_DPS;
-
-    /* To maintain the previous state of accel configuration */
-    dev->prev_accel_cfg = dev->accel_cfg;
-
-    /* To maintain the previous state of gyro configuration */
-    dev->prev_gyro_cfg = dev->gyro_cfg;
-}
-
-/*!
- * @brief This API set the accel configuration.
- */
-static int8_t set_accel_conf(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[2] = {0};
-
-    rslt = check_accel_config(data, dev);
-    if(rslt == BMI160_OK) {
-        /* Write output data rate and bandwidth */
-        rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, &data[0], 1, dev);
-        if(rslt == BMI160_OK) {
-            dev->prev_accel_cfg.odr = dev->accel_cfg.odr;
-            dev->prev_accel_cfg.bw = dev->accel_cfg.bw;
-
-            /* write accel range */
-            rslt = bmi160_set_regs(BMI160_ACCEL_RANGE_ADDR, &data[1], 1, dev);
-            if(rslt == BMI160_OK) {
-                dev->prev_accel_cfg.range = dev->accel_cfg.range;
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API gets the accel configuration.
- */
-static int8_t get_accel_conf(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[2] = {0};
-
-    /* Get accel configurations */
-    rslt = bmi160_get_regs(BMI160_ACCEL_CONFIG_ADDR, data, 2, dev);
-    if(rslt == BMI160_OK) {
-        dev->accel_cfg.odr = (data[0] & BMI160_ACCEL_ODR_MASK);
-        dev->accel_cfg.bw = (data[0] & BMI160_ACCEL_BW_MASK) >> BMI160_ACCEL_BW_POS;
-        dev->accel_cfg.range = (data[1] & BMI160_ACCEL_RANGE_MASK);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API check the accel configuration.
- */
-static int8_t check_accel_config(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* read accel Output data rate and bandwidth */
-    rslt = bmi160_get_regs(BMI160_ACCEL_CONFIG_ADDR, data, 2, dev);
-    if(rslt == BMI160_OK) {
-        rslt = process_accel_odr(&data[0], dev);
-        if(rslt == BMI160_OK) {
-            rslt = process_accel_bw(&data[0], dev);
-            if(rslt == BMI160_OK) {
-                rslt = process_accel_range(&data[1], dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the accel odr.
- */
-static int8_t process_accel_odr(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t temp = 0;
-    uint8_t odr = 0;
-
-    if(dev->accel_cfg.odr <= BMI160_ACCEL_ODR_1600HZ) {
-        if(dev->accel_cfg.odr != dev->prev_accel_cfg.odr) {
-            odr = (uint8_t)dev->accel_cfg.odr;
-            temp = *data & ~BMI160_ACCEL_ODR_MASK;
-
-            /* Adding output data rate */
-            *data = temp | (odr & BMI160_ACCEL_ODR_MASK);
-        }
-    } else {
-        rslt = BMI160_E_OUT_OF_RANGE;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the accel bandwidth.
- */
-static int8_t process_accel_bw(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t temp = 0;
-    uint8_t bw = 0;
-
-    if(dev->accel_cfg.bw <= BMI160_ACCEL_BW_RES_AVG128) {
-        if(dev->accel_cfg.bw != dev->prev_accel_cfg.bw) {
-            bw = (uint8_t)dev->accel_cfg.bw;
-            temp = *data & ~BMI160_ACCEL_BW_MASK;
-
-            /* Adding bandwidth */
-            *data = temp | ((bw << 4) & BMI160_ACCEL_BW_MASK);
-        }
-    } else {
-        rslt = BMI160_E_OUT_OF_RANGE;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the accel range.
- */
-static int8_t process_accel_range(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t temp = 0;
-    uint8_t range = 0;
-
-    if(dev->accel_cfg.range <= BMI160_ACCEL_RANGE_16G) {
-        if(dev->accel_cfg.range != dev->prev_accel_cfg.range) {
-            range = (uint8_t)dev->accel_cfg.range;
-            temp = *data & ~BMI160_ACCEL_RANGE_MASK;
-
-            /* Adding range */
-            *data = temp | (range & BMI160_ACCEL_RANGE_MASK);
-        }
-    } else {
-        rslt = BMI160_E_OUT_OF_RANGE;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API checks the invalid settings for ODR & Bw for
- * Accel and Gyro.
- */
-static int8_t check_invalid_settg(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-
-    /* read the error reg */
-    rslt = bmi160_get_regs(BMI160_ERROR_REG_ADDR, &data, 1, dev);
-    data = data >> 1;
-    data = data & BMI160_ERR_REG_MASK;
-    if(data == 1) {
-        rslt = BMI160_E_ACCEL_ODR_BW_INVALID;
-    } else if(data == 2) {
-        rslt = BMI160_E_GYRO_ODR_BW_INVALID;
-    } else if(data == 3) {
-        rslt = BMI160_E_LWP_PRE_FLTR_INT_INVALID;
-    } else if(data == 7) {
-        rslt = BMI160_E_LWP_PRE_FLTR_INVALID;
-    }
-
-    return rslt;
-}
-static int8_t set_gyro_conf(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[2] = {0};
-
-    rslt = check_gyro_config(data, dev);
-    if(rslt == BMI160_OK) {
-        /* Write output data rate and bandwidth */
-        rslt = bmi160_set_regs(BMI160_GYRO_CONFIG_ADDR, &data[0], 1, dev);
-        if(rslt == BMI160_OK) {
-            dev->prev_gyro_cfg.odr = dev->gyro_cfg.odr;
-            dev->prev_gyro_cfg.bw = dev->gyro_cfg.bw;
-
-            /* Write gyro range */
-            rslt = bmi160_set_regs(BMI160_GYRO_RANGE_ADDR, &data[1], 1, dev);
-            if(rslt == BMI160_OK) {
-                dev->prev_gyro_cfg.range = dev->gyro_cfg.range;
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API gets the gyro configuration.
- */
-static int8_t get_gyro_conf(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[2] = {0};
-
-    /* Get accel configurations */
-    rslt = bmi160_get_regs(BMI160_GYRO_CONFIG_ADDR, data, 2, dev);
-    if(rslt == BMI160_OK) {
-        dev->gyro_cfg.odr = (data[0] & BMI160_GYRO_ODR_MASK);
-        dev->gyro_cfg.bw = (data[0] & BMI160_GYRO_BW_MASK) >> BMI160_GYRO_BW_POS;
-        dev->gyro_cfg.range = (data[1] & BMI160_GYRO_RANGE_MASK);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API check the gyro configuration.
- */
-static int8_t check_gyro_config(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* read gyro Output data rate and bandwidth */
-    rslt = bmi160_get_regs(BMI160_GYRO_CONFIG_ADDR, data, 2, dev);
-    if(rslt == BMI160_OK) {
-        rslt = process_gyro_odr(&data[0], dev);
-        if(rslt == BMI160_OK) {
-            rslt = process_gyro_bw(&data[0], dev);
-            if(rslt == BMI160_OK) {
-                rslt = process_gyro_range(&data[1], dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the gyro odr.
- */
-static int8_t process_gyro_odr(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t temp = 0;
-    uint8_t odr = 0;
-
-    if(dev->gyro_cfg.odr <= BMI160_GYRO_ODR_3200HZ) {
-        if(dev->gyro_cfg.odr != dev->prev_gyro_cfg.odr) {
-            odr = (uint8_t)dev->gyro_cfg.odr;
-            temp = (*data & ~BMI160_GYRO_ODR_MASK);
-
-            /* Adding output data rate */
-            *data = temp | (odr & BMI160_GYRO_ODR_MASK);
-        }
-    } else {
-        rslt = BMI160_E_OUT_OF_RANGE;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the gyro bandwidth.
- */
-static int8_t process_gyro_bw(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t temp = 0;
-    uint8_t bw = 0;
-
-    if(dev->gyro_cfg.bw <= BMI160_GYRO_BW_NORMAL_MODE) {
-        bw = (uint8_t)dev->gyro_cfg.bw;
-        temp = *data & ~BMI160_GYRO_BW_MASK;
-
-        /* Adding bandwidth */
-        *data = temp | ((bw << 4) & BMI160_GYRO_BW_MASK);
-    } else {
-        rslt = BMI160_E_OUT_OF_RANGE;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the gyro range.
- */
-static int8_t process_gyro_range(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t temp = 0;
-    uint8_t range = 0;
-
-    if(dev->gyro_cfg.range <= BMI160_GYRO_RANGE_125_DPS) {
-        if(dev->gyro_cfg.range != dev->prev_gyro_cfg.range) {
-            range = (uint8_t)dev->gyro_cfg.range;
-            temp = *data & ~BMI160_GYRO_RANGE_MASK;
-
-            /* Adding range */
-            *data = temp | (range & BMI160_GYRO_RANGE_MASK);
-        }
-    } else {
-        rslt = BMI160_E_OUT_OF_RANGE;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the accel power.
- */
-static int8_t set_accel_pwr(struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-    uint8_t data = 0;
-
-    if((dev->accel_cfg.power >= BMI160_ACCEL_SUSPEND_MODE) &&
-       (dev->accel_cfg.power <= BMI160_ACCEL_LOWPOWER_MODE)) {
-        if(dev->accel_cfg.power != dev->prev_accel_cfg.power) {
-            rslt = process_under_sampling(&data, dev);
-            if(rslt == BMI160_OK) {
-                /* Write accel power */
-                rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &dev->accel_cfg.power, 1, dev);
-
-                /* Add delay of 3.8 ms - refer data sheet table 24*/
-                if(dev->prev_accel_cfg.power == BMI160_ACCEL_SUSPEND_MODE) {
-                    dev->delay_ms(BMI160_ACCEL_DELAY_MS);
-                }
-
-                dev->prev_accel_cfg.power = dev->accel_cfg.power;
-            }
-        }
-    } else {
-        rslt = BMI160_E_INVALID_CONFIG;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API process the undersampling setting of Accel.
- */
-static int8_t process_under_sampling(uint8_t* data, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t pre_filter[2] = {0};
-
-    rslt = bmi160_get_regs(BMI160_ACCEL_CONFIG_ADDR, data, 1, dev);
-    if(rslt == BMI160_OK) {
-        if(dev->accel_cfg.power == BMI160_ACCEL_LOWPOWER_MODE) {
-            temp = *data & ~BMI160_ACCEL_UNDERSAMPLING_MASK;
-
-            /* Set under-sampling parameter */
-            *data = temp | ((1 << 7) & BMI160_ACCEL_UNDERSAMPLING_MASK);
-
-            /* Write data */
-            rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, data, 1, dev);
-
-            /* Disable the pre-filter data in low power mode */
-            if(rslt == BMI160_OK) {
-                /* Disable the Pre-filter data*/
-                rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, pre_filter, 2, dev);
-            }
-        } else if(*data & BMI160_ACCEL_UNDERSAMPLING_MASK) {
-            temp = *data & ~BMI160_ACCEL_UNDERSAMPLING_MASK;
-
-            /* Disable under-sampling parameter if already enabled */
-            *data = temp;
-
-            /* Write data */
-            rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, data, 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API sets the gyro power mode.
- */
-static int8_t set_gyro_pwr(struct bmi160_dev* dev) {
-    int8_t rslt = 0;
-
-    if((dev->gyro_cfg.power == BMI160_GYRO_SUSPEND_MODE) ||
-       (dev->gyro_cfg.power == BMI160_GYRO_NORMAL_MODE) ||
-       (dev->gyro_cfg.power == BMI160_GYRO_FASTSTARTUP_MODE)) {
-        if(dev->gyro_cfg.power != dev->prev_gyro_cfg.power) {
-            /* Write gyro power */
-            rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &dev->gyro_cfg.power, 1, dev);
-            if(dev->prev_gyro_cfg.power == BMI160_GYRO_SUSPEND_MODE) {
-                /* Delay of 80 ms - datasheet Table 24 */
-                dev->delay_ms(BMI160_GYRO_DELAY_MS);
-            } else if(
-                (dev->prev_gyro_cfg.power == BMI160_GYRO_FASTSTARTUP_MODE) &&
-                (dev->gyro_cfg.power == BMI160_GYRO_NORMAL_MODE)) {
-                /* This delay is required for transition from
-                 * fast-startup mode to normal mode - datasheet Table 3 */
-                dev->delay_ms(10);
-            } else {
-                /* do nothing */
-            }
-
-            dev->prev_gyro_cfg.power = dev->gyro_cfg.power;
-        }
-    } else {
-        rslt = BMI160_E_INVALID_CONFIG;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads accel data along with sensor time if time is requested
- * by user. Kindly refer the user guide(README.md) for more info.
- */
-static int8_t
-    get_accel_data(uint8_t len, struct bmi160_sensor_data* accel, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t idx = 0;
-    uint8_t data_array[9] = {0};
-    uint8_t time_0 = 0;
-    uint16_t time_1 = 0;
-    uint32_t time_2 = 0;
-    uint8_t lsb;
-    uint8_t msb;
-    int16_t msblsb;
-
-    /* read accel sensor data along with time if requested */
-    rslt = bmi160_get_regs(BMI160_ACCEL_DATA_ADDR, data_array, 6 + len, dev);
-    if(rslt == BMI160_OK) {
-        /* Accel Data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        accel->x = msblsb; /* Data in X axis */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        accel->y = msblsb; /* Data in Y axis */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        accel->z = msblsb; /* Data in Z axis */
-        if(len == 3) {
-            time_0 = data_array[idx++];
-            time_1 = (uint16_t)(data_array[idx++] << 8);
-            time_2 = (uint32_t)(data_array[idx++] << 16);
-            accel->sensortime = (uint32_t)(time_2 | time_1 | time_0);
-        } else {
-            accel->sensortime = 0;
-        }
-    } else {
-        rslt = BMI160_E_COM_FAIL;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads accel data along with sensor time if time is requested
- * by user. Kindly refer the user guide(README.md) for more info.
- */
-static int8_t
-    get_gyro_data(uint8_t len, struct bmi160_sensor_data* gyro, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t idx = 0;
-    uint8_t data_array[15] = {0};
-    uint8_t time_0 = 0;
-    uint16_t time_1 = 0;
-    uint32_t time_2 = 0;
-    uint8_t lsb;
-    uint8_t msb;
-    int16_t msblsb;
-
-    if(len == 0) {
-        /* read gyro data only */
-        rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 6, dev);
-        if(rslt == BMI160_OK) {
-            /* Gyro Data */
-            lsb = data_array[idx++];
-            msb = data_array[idx++];
-            msblsb = (int16_t)((msb << 8) | lsb);
-            gyro->x = msblsb; /* Data in X axis */
-            lsb = data_array[idx++];
-            msb = data_array[idx++];
-            msblsb = (int16_t)((msb << 8) | lsb);
-            gyro->y = msblsb; /* Data in Y axis */
-            lsb = data_array[idx++];
-            msb = data_array[idx++];
-            msblsb = (int16_t)((msb << 8) | lsb);
-            gyro->z = msblsb; /* Data in Z axis */
-            gyro->sensortime = 0;
-        } else {
-            rslt = BMI160_E_COM_FAIL;
-        }
-    } else {
-        /* read gyro sensor data along with time */
-        rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 12 + len, dev);
-        if(rslt == BMI160_OK) {
-            /* Gyro Data */
-            lsb = data_array[idx++];
-            msb = data_array[idx++];
-            msblsb = (int16_t)((msb << 8) | lsb);
-            gyro->x = msblsb; /* gyro X axis data */
-            lsb = data_array[idx++];
-            msb = data_array[idx++];
-            msblsb = (int16_t)((msb << 8) | lsb);
-            gyro->y = msblsb; /* gyro Y axis data */
-            lsb = data_array[idx++];
-            msb = data_array[idx++];
-            msblsb = (int16_t)((msb << 8) | lsb);
-            gyro->z = msblsb; /* gyro Z axis data */
-            idx = idx + 6;
-            time_0 = data_array[idx++];
-            time_1 = (uint16_t)(data_array[idx++] << 8);
-            time_2 = (uint32_t)(data_array[idx++] << 16);
-            gyro->sensortime = (uint32_t)(time_2 | time_1 | time_0);
-        } else {
-            rslt = BMI160_E_COM_FAIL;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API reads accel and gyro data along with sensor time
- * if time is requested by user.
- *  Kindly refer the user guide(README.md) for more info.
- */
-static int8_t get_accel_gyro_data(
-    uint8_t len,
-    struct bmi160_sensor_data* accel,
-    struct bmi160_sensor_data* gyro,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t idx = 0;
-    uint8_t data_array[15] = {0};
-    uint8_t time_0 = 0;
-    uint16_t time_1 = 0;
-    uint32_t time_2 = 0;
-    uint8_t lsb;
-    uint8_t msb;
-    int16_t msblsb;
-
-    /* read both accel and gyro sensor data
-     * along with time if requested */
-    rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 12 + len, dev);
-    if(rslt == BMI160_OK) {
-        /* Gyro Data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        gyro->x = msblsb; /* gyro X axis data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        gyro->y = msblsb; /* gyro Y axis data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        gyro->z = msblsb; /* gyro Z axis data */
-        /* Accel Data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        accel->x = (int16_t)msblsb; /* accel X axis data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        accel->y = (int16_t)msblsb; /* accel Y axis data */
-        lsb = data_array[idx++];
-        msb = data_array[idx++];
-        msblsb = (int16_t)((msb << 8) | lsb);
-        accel->z = (int16_t)msblsb; /* accel Z axis data */
-        if(len == 3) {
-            time_0 = data_array[idx++];
-            time_1 = (uint16_t)(data_array[idx++] << 8);
-            time_2 = (uint32_t)(data_array[idx++] << 16);
-            accel->sensortime = (uint32_t)(time_2 | time_1 | time_0);
-            gyro->sensortime = (uint32_t)(time_2 | time_1 | time_0);
-        } else {
-            accel->sensortime = 0;
-            gyro->sensortime = 0;
-        }
-    } else {
-        rslt = BMI160_E_COM_FAIL;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the any-motion interrupt for accel.
- */
-static int8_t enable_accel_any_motion_int(
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable any motion x, any motion y, any motion z
-     * in Int Enable 0 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        if(any_motion_int_cfg->anymotion_en == BMI160_ENABLE) {
-            temp = data & ~BMI160_ANY_MOTION_X_INT_EN_MASK;
-
-            /* Adding Any_motion x axis */
-            data = temp | (any_motion_int_cfg->anymotion_x & BMI160_ANY_MOTION_X_INT_EN_MASK);
-            temp = data & ~BMI160_ANY_MOTION_Y_INT_EN_MASK;
-
-            /* Adding Any_motion y axis */
-            data = temp |
-                   ((any_motion_int_cfg->anymotion_y << 1) & BMI160_ANY_MOTION_Y_INT_EN_MASK);
-            temp = data & ~BMI160_ANY_MOTION_Z_INT_EN_MASK;
-
-            /* Adding Any_motion z axis */
-            data = temp |
-                   ((any_motion_int_cfg->anymotion_z << 2) & BMI160_ANY_MOTION_Z_INT_EN_MASK);
-
-            /* any-motion feature selected*/
-            dev->any_sig_sel = BMI160_ANY_MOTION_ENABLED;
-        } else {
-            data = data & ~BMI160_ANY_MOTION_ALL_INT_EN_MASK;
-
-            /* neither any-motion feature nor sig-motion selected */
-            dev->any_sig_sel = BMI160_BOTH_ANY_SIG_MOTION_DISABLED;
-        }
-
-        /* write data to Int Enable 0 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API disable the sig-motion interrupt.
- */
-static int8_t disable_sig_motion_int(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Disabling Significant motion interrupt if enabled */
-    rslt = bmi160_get_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = (data & BMI160_SIG_MOTION_SEL_MASK);
-        if(temp) {
-            temp = data & ~BMI160_SIG_MOTION_SEL_MASK;
-            data = temp;
-
-            /* Write data to register */
-            rslt = bmi160_set_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API is used to map/unmap the Any/Sig motion, Step det/Low-g,
- *  Double tap, Single tap, Orientation, Flat, High-G, Nomotion interrupt pins.
- */
-static int8_t
-    map_feature_interrupt(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data[3] = {0, 0, 0};
-    uint8_t temp[3] = {0, 0, 0};
-
-    rslt = bmi160_get_regs(BMI160_INT_MAP_0_ADDR, data, 3, dev);
-    if(rslt == BMI160_OK) {
-        temp[0] = data[0] & ~int_mask_lookup_table[int_config->int_type];
-        temp[2] = data[2] & ~int_mask_lookup_table[int_config->int_type];
-        switch(int_config->int_channel) {
-        case BMI160_INT_CHANNEL_NONE:
-            data[0] = temp[0];
-            data[2] = temp[2];
-            break;
-        case BMI160_INT_CHANNEL_1:
-            data[0] = temp[0] | int_mask_lookup_table[int_config->int_type];
-            data[2] = temp[2];
-            break;
-        case BMI160_INT_CHANNEL_2:
-            data[2] = temp[2] | int_mask_lookup_table[int_config->int_type];
-            data[0] = temp[0];
-            break;
-        case BMI160_INT_CHANNEL_BOTH:
-            data[0] = temp[0] | int_mask_lookup_table[int_config->int_type];
-            data[2] = temp[2] | int_mask_lookup_table[int_config->int_type];
-            break;
-        default:
-            rslt = BMI160_E_OUT_OF_RANGE;
-        }
-        if(rslt == BMI160_OK) {
-            rslt = bmi160_set_regs(BMI160_INT_MAP_0_ADDR, data, 3, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API is used to map/unmap the Dataready(Accel & Gyro), FIFO full
- *  and FIFO watermark interrupt.
- */
-static int8_t map_hardware_interrupt(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    rslt = bmi160_get_regs(BMI160_INT_MAP_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~int_mask_lookup_table[int_config->int_type];
-        temp = temp & ~((uint8_t)(int_mask_lookup_table[int_config->int_type] << 4));
-        switch(int_config->int_channel) {
-        case BMI160_INT_CHANNEL_NONE:
-            data = temp;
-            break;
-        case BMI160_INT_CHANNEL_1:
-            data = temp | (uint8_t)((int_mask_lookup_table[int_config->int_type]) << 4);
-            break;
-        case BMI160_INT_CHANNEL_2:
-            data = temp | int_mask_lookup_table[int_config->int_type];
-            break;
-        case BMI160_INT_CHANNEL_BOTH:
-            data = temp | int_mask_lookup_table[int_config->int_type];
-            data = data | (uint8_t)((int_mask_lookup_table[int_config->int_type]) << 4);
-            break;
-        default:
-            rslt = BMI160_E_OUT_OF_RANGE;
-        }
-        if(rslt == BMI160_OK) {
-            rslt = bmi160_set_regs(BMI160_INT_MAP_1_ADDR, &data, 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for any-motion interrupt.
- */
-static int8_t config_any_motion_src(
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Configure Int data 1 register to add source of interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_MOTION_SRC_INT_MASK;
-        data = temp | ((any_motion_int_cfg->anymotion_data_src << 7) & BMI160_MOTION_SRC_INT_MASK);
-
-        /* Write data to DATA 1 address */
-        rslt = bmi160_set_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the duration and threshold of
- * any-motion interrupt.
- */
-static int8_t config_any_dur_threshold(
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-    uint8_t data_array[2] = {0};
-    uint8_t dur;
-
-    /* Configure Int Motion 0 register */
-    rslt = bmi160_get_regs(BMI160_INT_MOTION_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* slope duration */
-        dur = (uint8_t)any_motion_int_cfg->anymotion_dur;
-        temp = data & ~BMI160_SLOPE_INT_DUR_MASK;
-        data = temp | (dur & BMI160_MOTION_SRC_INT_MASK);
-        data_array[0] = data;
-
-        /* add slope threshold */
-        data_array[1] = any_motion_int_cfg->anymotion_thr;
-
-        /* INT MOTION 0 and INT MOTION 1 address lie consecutively,
-         * hence writing data to respective registers at one go */
-
-        /* Writing to Int_motion 0 and
-         * Int_motion 1 Address simultaneously */
-        rslt = bmi160_set_regs(BMI160_INT_MOTION_0_ADDR, data_array, 2, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure necessary setting of any-motion interrupt.
- */
-static int8_t config_any_motion_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_any_mot_int_cfg* any_motion_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Configure Interrupt pins */
-    rslt = set_intr_pin_config(int_config, dev);
-    if(rslt == BMI160_OK) {
-        rslt = disable_sig_motion_int(dev);
-        if(rslt == BMI160_OK) {
-            rslt = map_feature_interrupt(int_config, dev);
-            if(rslt == BMI160_OK) {
-                rslt = config_any_motion_src(any_motion_int_cfg, dev);
-                if(rslt == BMI160_OK) {
-                    rslt = config_any_dur_threshold(any_motion_int_cfg, dev);
-                }
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enable the data ready interrupt.
- */
-static int8_t enable_data_ready_int(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable data ready interrupt in Int Enable 1 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_DATA_RDY_INT_EN_MASK;
-        data = temp | ((1 << 4) & BMI160_DATA_RDY_INT_EN_MASK);
-
-        /* Writing data to INT ENABLE 1 Address */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the no motion/slow motion interrupt.
- */
-static int8_t enable_no_motion_int(
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable no motion x, no motion y, no motion z
-     * in Int Enable 2 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        if(no_mot_int_cfg->no_motion_x == 1) {
-            temp = data & ~BMI160_NO_MOTION_X_INT_EN_MASK;
-
-            /* Adding No_motion x axis */
-            data = temp | (1 & BMI160_NO_MOTION_X_INT_EN_MASK);
-        }
-
-        if(no_mot_int_cfg->no_motion_y == 1) {
-            temp = data & ~BMI160_NO_MOTION_Y_INT_EN_MASK;
-
-            /* Adding No_motion x axis */
-            data = temp | ((1 << 1) & BMI160_NO_MOTION_Y_INT_EN_MASK);
-        }
-
-        if(no_mot_int_cfg->no_motion_z == 1) {
-            temp = data & ~BMI160_NO_MOTION_Z_INT_EN_MASK;
-
-            /* Adding No_motion x axis */
-            data = temp | ((1 << 2) & BMI160_NO_MOTION_Z_INT_EN_MASK);
-        }
-
-        /* write data to Int Enable 2 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the interrupt PIN setting for
- * no motion/slow motion interrupt.
- */
-static int8_t config_no_motion_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Configure Interrupt pins */
-    rslt = set_intr_pin_config(int_config, dev);
-    if(rslt == BMI160_OK) {
-        rslt = map_feature_interrupt(int_config, dev);
-        if(rslt == BMI160_OK) {
-            rslt = config_no_motion_data_src(no_mot_int_cfg, dev);
-            if(rslt == BMI160_OK) {
-                rslt = config_no_motion_dur_thr(no_mot_int_cfg, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the source of interrupt for no motion.
- */
-static int8_t config_no_motion_data_src(
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Configure Int data 1 register to add source of interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_MOTION_SRC_INT_MASK;
-        data = temp | ((no_mot_int_cfg->no_motion_src << 7) & BMI160_MOTION_SRC_INT_MASK);
-
-        /* Write data to DATA 1 address */
-        rslt = bmi160_set_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the duration and threshold of
- * no motion/slow motion interrupt along with selection of no/slow motion.
- */
-static int8_t config_no_motion_dur_thr(
-    const struct bmi160_acc_no_motion_int_cfg* no_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-    uint8_t temp_1 = 0;
-    uint8_t reg_addr;
-    uint8_t data_array[2] = {0};
-
-    /* Configuring INT_MOTION register */
-    reg_addr = BMI160_INT_MOTION_0_ADDR;
-    rslt = bmi160_get_regs(reg_addr, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_NO_MOTION_INT_DUR_MASK;
-
-        /* Adding no_motion duration */
-        data = temp | ((no_mot_int_cfg->no_motion_dur << 2) & BMI160_NO_MOTION_INT_DUR_MASK);
-
-        /* Write data to NO_MOTION 0 address */
-        rslt = bmi160_set_regs(reg_addr, &data, 1, dev);
-        if(rslt == BMI160_OK) {
-            reg_addr = BMI160_INT_MOTION_3_ADDR;
-            rslt = bmi160_get_regs(reg_addr, &data, 1, dev);
-            if(rslt == BMI160_OK) {
-                temp = data & ~BMI160_NO_MOTION_SEL_BIT_MASK;
-
-                /* Adding no_motion_sel bit */
-                temp_1 = (no_mot_int_cfg->no_motion_sel & BMI160_NO_MOTION_SEL_BIT_MASK);
-                data = (temp | temp_1);
-                data_array[1] = data;
-
-                /* Adding no motion threshold */
-                data_array[0] = no_mot_int_cfg->no_motion_thres;
-                reg_addr = BMI160_INT_MOTION_2_ADDR;
-
-                /* writing data to INT_MOTION 2 and INT_MOTION 3
-                 * address simultaneously */
-                rslt = bmi160_set_regs(reg_addr, data_array, 2, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the sig-motion motion interrupt.
- */
-static int8_t enable_sig_motion_int(
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* For significant motion,enable any motion x,any motion y,
-     * any motion z in Int Enable 0 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        if(sig_mot_int_cfg->sig_en == BMI160_ENABLE) {
-            temp = data & ~BMI160_SIG_MOTION_INT_EN_MASK;
-            data = temp | (7 & BMI160_SIG_MOTION_INT_EN_MASK);
-
-            /* sig-motion feature selected*/
-            dev->any_sig_sel = BMI160_SIG_MOTION_ENABLED;
-        } else {
-            data = data & ~BMI160_SIG_MOTION_INT_EN_MASK;
-
-            /* neither any-motion feature nor sig-motion selected */
-            dev->any_sig_sel = BMI160_BOTH_ANY_SIG_MOTION_DISABLED;
-        }
-
-        /* write data to Int Enable 0 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the interrupt PIN setting for
- * significant motion interrupt.
- */
-static int8_t config_sig_motion_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Configure Interrupt pins */
-    rslt = set_intr_pin_config(int_config, dev);
-    if(rslt == BMI160_OK) {
-        rslt = map_feature_interrupt(int_config, dev);
-        if(rslt == BMI160_OK) {
-            rslt = config_sig_motion_data_src(sig_mot_int_cfg, dev);
-            if(rslt == BMI160_OK) {
-                rslt = config_sig_dur_threshold(sig_mot_int_cfg, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for sig motion interrupt.
- */
-static int8_t config_sig_motion_data_src(
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Configure Int data 1 register to add source of interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_MOTION_SRC_INT_MASK;
-        data = temp | ((sig_mot_int_cfg->sig_data_src << 7) & BMI160_MOTION_SRC_INT_MASK);
-
-        /* Write data to DATA 1 address */
-        rslt = bmi160_set_regs(BMI160_INT_DATA_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the threshold, skip and proof time of
- * sig motion interrupt.
- */
-static int8_t config_sig_dur_threshold(
-    const struct bmi160_acc_sig_mot_int_cfg* sig_mot_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data;
-    uint8_t temp = 0;
-
-    /* Configuring INT_MOTION registers */
-
-    /* Write significant motion threshold.
-     * This threshold is same as any motion threshold */
-    data = sig_mot_int_cfg->sig_mot_thres;
-
-    /* Write data to INT_MOTION 1 address */
-    rslt = bmi160_set_regs(BMI160_INT_MOTION_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        rslt = bmi160_get_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
-        if(rslt == BMI160_OK) {
-            temp = data & ~BMI160_SIG_MOTION_SKIP_MASK;
-
-            /* adding skip time of sig_motion interrupt*/
-            data = temp | ((sig_mot_int_cfg->sig_mot_skip << 2) & BMI160_SIG_MOTION_SKIP_MASK);
-            temp = data & ~BMI160_SIG_MOTION_PROOF_MASK;
-
-            /* adding proof time of sig_motion interrupt */
-            data = temp | ((sig_mot_int_cfg->sig_mot_proof << 4) & BMI160_SIG_MOTION_PROOF_MASK);
-
-            /* configure the int_sig_mot_sel bit to select
-             * significant motion interrupt */
-            temp = data & ~BMI160_SIG_MOTION_SEL_MASK;
-            data = temp | ((sig_mot_int_cfg->sig_en << 1) & BMI160_SIG_MOTION_SEL_MASK);
-            rslt = bmi160_set_regs(BMI160_INT_MOTION_3_ADDR, &data, 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the step detector interrupt.
- */
-static int8_t enable_step_detect_int(
-    const struct bmi160_acc_step_detect_int_cfg* step_detect_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable data ready interrupt in Int Enable 2 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_STEP_DETECT_INT_EN_MASK;
-        data = temp |
-               ((step_detect_int_cfg->step_detector_en << 3) & BMI160_STEP_DETECT_INT_EN_MASK);
-
-        /* Writing data to INT ENABLE 2 Address */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_2_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the step detector parameter.
- */
-static int8_t config_step_detect(
-    const struct bmi160_acc_step_detect_int_cfg* step_detect_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t data_array[2] = {0};
-
-    if(step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_NORMAL) {
-        /* Normal mode setting */
-        data_array[0] = 0x15;
-        data_array[1] = 0x03;
-    } else if(step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_SENSITIVE) {
-        /* Sensitive mode setting */
-        data_array[0] = 0x2D;
-        data_array[1] = 0x00;
-    } else if(step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_ROBUST) {
-        /* Robust mode setting */
-        data_array[0] = 0x1D;
-        data_array[1] = 0x07;
-    } else if(step_detect_int_cfg->step_detector_mode == BMI160_STEP_DETECT_USER_DEFINE) {
-        /* Non recommended User defined setting */
-        /* Configuring STEP_CONFIG register */
-        rslt = bmi160_get_regs(BMI160_INT_STEP_CONFIG_0_ADDR, &data_array[0], 2, dev);
-        if(rslt == BMI160_OK) {
-            temp = data_array[0] & ~BMI160_STEP_DETECT_MIN_THRES_MASK;
-
-            /* Adding min_threshold */
-            data_array[0] = temp | ((step_detect_int_cfg->min_threshold << 3) &
-                                    BMI160_STEP_DETECT_MIN_THRES_MASK);
-            temp = data_array[0] & ~BMI160_STEP_DETECT_STEPTIME_MIN_MASK;
-
-            /* Adding steptime_min */
-            data_array[0] = temp | ((step_detect_int_cfg->steptime_min) &
-                                    BMI160_STEP_DETECT_STEPTIME_MIN_MASK);
-            temp = data_array[1] & ~BMI160_STEP_MIN_BUF_MASK;
-
-            /* Adding steptime_min */
-            data_array[1] = temp |
-                            ((step_detect_int_cfg->step_min_buf) & BMI160_STEP_MIN_BUF_MASK);
-        }
-    }
-
-    /* Write data to STEP_CONFIG register */
-    rslt = bmi160_set_regs(BMI160_INT_STEP_CONFIG_0_ADDR, data_array, 2, dev);
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the single/double tap interrupt.
- */
-static int8_t enable_tap_int(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable single tap or double tap interrupt in Int Enable 0 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        if(int_config->int_type == BMI160_ACC_SINGLE_TAP_INT) {
-            temp = data & ~BMI160_SINGLE_TAP_INT_EN_MASK;
-            data = temp | ((tap_int_cfg->tap_en << 5) & BMI160_SINGLE_TAP_INT_EN_MASK);
-        } else {
-            temp = data & ~BMI160_DOUBLE_TAP_INT_EN_MASK;
-            data = temp | ((tap_int_cfg->tap_en << 4) & BMI160_DOUBLE_TAP_INT_EN_MASK);
-        }
-
-        /* Write to Enable 0 Address */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the interrupt PIN setting for
- * tap interrupt.
- */
-static int8_t config_tap_int_settg(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Configure Interrupt pins */
-    rslt = set_intr_pin_config(int_config, dev);
-    if(rslt == BMI160_OK) {
-        rslt = map_feature_interrupt(int_config, dev);
-        if(rslt == BMI160_OK) {
-            rslt = config_tap_data_src(tap_int_cfg, dev);
-            if(rslt == BMI160_OK) {
-                rslt = config_tap_param(int_config, tap_int_cfg, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for tap interrupt.
- */
-static int8_t config_tap_data_src(
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Configure Int data 0 register to add source of interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_TAP_SRC_INT_MASK;
-        data = temp | ((tap_int_cfg->tap_data_src << 3) & BMI160_TAP_SRC_INT_MASK);
-
-        /* Write data to Data 0 address */
-        rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the  parameters of tap interrupt.
- * Threshold, quite, shock, and duration.
- */
-static int8_t config_tap_param(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_acc_tap_int_cfg* tap_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t data = 0;
-    uint8_t data_array[2] = {0};
-    uint8_t count = 0;
-    uint8_t dur, shock, quiet, thres;
-
-    /* Configure tap 0 register for tap shock,tap quiet duration
-     * in case of single tap interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_TAP_0_ADDR, data_array, 2, dev);
-    if(rslt == BMI160_OK) {
-        data = data_array[count];
-        if(int_config->int_type == BMI160_ACC_DOUBLE_TAP_INT) {
-            dur = (uint8_t)tap_int_cfg->tap_dur;
-            temp = (data & ~BMI160_TAP_DUR_MASK);
-
-            /* Add tap duration data in case of
-             * double tap interrupt */
-            data = temp | (dur & BMI160_TAP_DUR_MASK);
-        }
-
-        shock = (uint8_t)tap_int_cfg->tap_shock;
-        temp = data & ~BMI160_TAP_SHOCK_DUR_MASK;
-        data = temp | ((shock << 6) & BMI160_TAP_SHOCK_DUR_MASK);
-        quiet = (uint8_t)tap_int_cfg->tap_quiet;
-        temp = data & ~BMI160_TAP_QUIET_DUR_MASK;
-        data = temp | ((quiet << 7) & BMI160_TAP_QUIET_DUR_MASK);
-        data_array[count++] = data;
-        data = data_array[count];
-        thres = (uint8_t)tap_int_cfg->tap_thr;
-        temp = data & ~BMI160_TAP_THRES_MASK;
-        data = temp | (thres & BMI160_TAP_THRES_MASK);
-        data_array[count++] = data;
-
-        /* TAP 0 and TAP 1 address lie consecutively,
-         * hence writing data to respective registers at one go */
-
-        /* Writing to Tap 0 and Tap 1 Address simultaneously */
-        rslt = bmi160_set_regs(BMI160_INT_TAP_0_ADDR, data_array, count, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the secondary interface.
- */
-static int8_t config_sec_if(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t if_conf = 0;
-    uint8_t cmd = BMI160_AUX_NORMAL_MODE;
-
-    /* set the aux power mode to normal*/
-    rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &cmd, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* 0.5ms delay - refer datasheet table 24*/
-        dev->delay_ms(1);
-        rslt = bmi160_get_regs(BMI160_IF_CONF_ADDR, &if_conf, 1, dev);
-        if_conf |= (uint8_t)(1 << 5);
-        if(rslt == BMI160_OK) {
-            /*enable the secondary interface also*/
-            rslt = bmi160_set_regs(BMI160_IF_CONF_ADDR, &if_conf, 1, dev);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the ODR of the auxiliary sensor.
- */
-static int8_t config_aux_odr(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t aux_odr;
-
-    rslt = bmi160_get_regs(BMI160_AUX_ODR_ADDR, &aux_odr, 1, dev);
-    if(rslt == BMI160_OK) {
-        aux_odr = (uint8_t)(dev->aux_cfg.aux_odr);
-
-        /* Set the secondary interface ODR
-         * i.e polling rate of secondary sensor */
-        rslt = bmi160_set_regs(BMI160_AUX_ODR_ADDR, &aux_odr, 1, dev);
-        dev->delay_ms(BMI160_AUX_COM_DELAY);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API maps the actual burst read length set by user.
- */
-static int8_t map_read_len(uint16_t* len, const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    switch(dev->aux_cfg.aux_rd_burst_len) {
-    case BMI160_AUX_READ_LEN_0:
-        *len = 1;
-        break;
-    case BMI160_AUX_READ_LEN_1:
-        *len = 2;
-        break;
-    case BMI160_AUX_READ_LEN_2:
-        *len = 6;
-        break;
-    case BMI160_AUX_READ_LEN_3:
-        *len = 8;
-        break;
-    default:
-        rslt = BMI160_E_INVALID_INPUT;
-        break;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the settings of auxiliary sensor.
- */
-static int8_t config_aux_settg(const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    rslt = config_sec_if(dev);
-    if(rslt == BMI160_OK) {
-        /* Configures the auxiliary interface settings */
-        rslt = bmi160_config_aux_mode(dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API extract the read data from auxiliary sensor.
- */
-static int8_t extract_aux_read(
-    uint16_t map_len,
-    uint8_t reg_addr,
-    uint8_t* aux_data,
-    uint16_t len,
-    const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-    uint8_t data[8] = {
-        0,
-    };
-    uint8_t read_addr = BMI160_AUX_DATA_ADDR;
-    uint8_t count = 0;
-    uint8_t read_count;
-    uint8_t read_len = (uint8_t)map_len;
-
-    for(; count < len;) {
-        /* set address to read */
-        rslt = bmi160_set_regs(BMI160_AUX_IF_2_ADDR, &reg_addr, 1, dev);
-        dev->delay_ms(BMI160_AUX_COM_DELAY);
-        if(rslt == BMI160_OK) {
-            rslt = bmi160_get_regs(read_addr, data, map_len, dev);
-            if(rslt == BMI160_OK) {
-                read_count = 0;
-
-                /* if read len is less the burst read len
-                 * mention by user*/
-                if(len < map_len) {
-                    read_len = (uint8_t)len;
-                } else if((len - count) < map_len) {
-                    read_len = (uint8_t)(len - count);
-                }
-
-                for(; read_count < read_len; read_count++) {
-                    aux_data[count + read_count] = data[read_count];
-                }
-
-                reg_addr += (uint8_t)map_len;
-                count += (uint8_t)map_len;
-            } else {
-                rslt = BMI160_E_COM_FAIL;
-                break;
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the orient interrupt.
- */
-static int8_t enable_orient_int(
-    const struct bmi160_acc_orient_int_cfg* orient_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable data ready interrupt in Int Enable 0 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_ORIENT_INT_EN_MASK;
-        data = temp | ((orient_int_cfg->orient_en << 6) & BMI160_ORIENT_INT_EN_MASK);
-
-        /* write data to Int Enable 0 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the necessary setting of orientation interrupt.
- */
-static int8_t config_orient_int_settg(
-    const struct bmi160_acc_orient_int_cfg* orient_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-    uint8_t data_array[2] = {0, 0};
-
-    /* Configuring INT_ORIENT registers */
-    rslt = bmi160_get_regs(BMI160_INT_ORIENT_0_ADDR, data_array, 2, dev);
-    if(rslt == BMI160_OK) {
-        data = data_array[0];
-        temp = data & ~BMI160_ORIENT_MODE_MASK;
-
-        /* Adding Orientation mode */
-        data = temp | ((orient_int_cfg->orient_mode) & BMI160_ORIENT_MODE_MASK);
-        temp = data & ~BMI160_ORIENT_BLOCK_MASK;
-
-        /* Adding Orientation blocking */
-        data = temp | ((orient_int_cfg->orient_blocking << 2) & BMI160_ORIENT_BLOCK_MASK);
-        temp = data & ~BMI160_ORIENT_HYST_MASK;
-
-        /* Adding Orientation hysteresis */
-        data = temp | ((orient_int_cfg->orient_hyst << 4) & BMI160_ORIENT_HYST_MASK);
-        data_array[0] = data;
-        data = data_array[1];
-        temp = data & ~BMI160_ORIENT_THETA_MASK;
-
-        /* Adding Orientation threshold */
-        data = temp | ((orient_int_cfg->orient_theta) & BMI160_ORIENT_THETA_MASK);
-        temp = data & ~BMI160_ORIENT_UD_ENABLE;
-
-        /* Adding Orient_ud_en */
-        data = temp | ((orient_int_cfg->orient_ud_en << 6) & BMI160_ORIENT_UD_ENABLE);
-        temp = data & ~BMI160_AXES_EN_MASK;
-
-        /* Adding axes_en */
-        data = temp | ((orient_int_cfg->axes_ex << 7) & BMI160_AXES_EN_MASK);
-        data_array[1] = data;
-
-        /* Writing data to INT_ORIENT 0 and INT_ORIENT 1
-         * registers simultaneously */
-        rslt = bmi160_set_regs(BMI160_INT_ORIENT_0_ADDR, data_array, 2, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the flat interrupt.
- */
-static int8_t enable_flat_int(
-    const struct bmi160_acc_flat_detect_int_cfg* flat_int,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable flat interrupt in Int Enable 0 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_FLAT_INT_EN_MASK;
-        data = temp | ((flat_int->flat_en << 7) & BMI160_FLAT_INT_EN_MASK);
-
-        /* write data to Int Enable 0 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the necessary setting of flat interrupt.
- */
-static int8_t config_flat_int_settg(
-    const struct bmi160_acc_flat_detect_int_cfg* flat_int,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-    uint8_t data_array[2] = {0, 0};
-
-    /* Configuring INT_FLAT register */
-    rslt = bmi160_get_regs(BMI160_INT_FLAT_0_ADDR, data_array, 2, dev);
-    if(rslt == BMI160_OK) {
-        data = data_array[0];
-        temp = data & ~BMI160_FLAT_THRES_MASK;
-
-        /* Adding flat theta */
-        data = temp | ((flat_int->flat_theta) & BMI160_FLAT_THRES_MASK);
-        data_array[0] = data;
-        data = data_array[1];
-        temp = data & ~BMI160_FLAT_HOLD_TIME_MASK;
-
-        /* Adding flat hold time */
-        data = temp | ((flat_int->flat_hold_time << 4) & BMI160_FLAT_HOLD_TIME_MASK);
-        temp = data & ~BMI160_FLAT_HYST_MASK;
-
-        /* Adding flat hysteresis */
-        data = temp | ((flat_int->flat_hy) & BMI160_FLAT_HYST_MASK);
-        data_array[1] = data;
-
-        /* Writing data to INT_FLAT 0 and INT_FLAT 1
-         * registers simultaneously */
-        rslt = bmi160_set_regs(BMI160_INT_FLAT_0_ADDR, data_array, 2, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the Low-g interrupt.
- */
-static int8_t enable_low_g_int(
-    const struct bmi160_acc_low_g_int_cfg* low_g_int,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable low-g interrupt in Int Enable 1 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_LOW_G_INT_EN_MASK;
-        data = temp | ((low_g_int->low_en << 3) & BMI160_LOW_G_INT_EN_MASK);
-
-        /* write data to Int Enable 0 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for low-g interrupt.
- */
-static int8_t config_low_g_data_src(
-    const struct bmi160_acc_low_g_int_cfg* low_g_int,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Configure Int data 0 register to add source of interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_LOW_HIGH_SRC_INT_MASK;
-        data = temp | ((low_g_int->low_data_src << 7) & BMI160_LOW_HIGH_SRC_INT_MASK);
-
-        /* Write data to Data 0 address */
-        rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the necessary setting of low-g interrupt.
- */
-static int8_t config_low_g_int_settg(
-    const struct bmi160_acc_low_g_int_cfg* low_g_int,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t data_array[3] = {0, 0, 0};
-
-    /* Configuring INT_LOWHIGH register for low-g interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_LOWHIGH_2_ADDR, &data_array[2], 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data_array[2] & ~BMI160_LOW_G_HYST_MASK;
-
-        /* Adding low-g hysteresis */
-        data_array[2] = temp | (low_g_int->low_hyst & BMI160_LOW_G_HYST_MASK);
-        temp = data_array[2] & ~BMI160_LOW_G_LOW_MODE_MASK;
-
-        /* Adding low-mode */
-        data_array[2] = temp | ((low_g_int->low_mode << 2) & BMI160_LOW_G_LOW_MODE_MASK);
-
-        /* Adding low-g threshold */
-        data_array[1] = low_g_int->low_thres;
-
-        /* Adding low-g interrupt delay */
-        data_array[0] = low_g_int->low_dur;
-
-        /* Writing data to INT_LOWHIGH 0,1,2 registers simultaneously*/
-        rslt = bmi160_set_regs(BMI160_INT_LOWHIGH_0_ADDR, data_array, 3, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the high-g interrupt.
- */
-static int8_t enable_high_g_int(
-    const struct bmi160_acc_high_g_int_cfg* high_g_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Enable low-g interrupt in Int Enable 1 register */
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* Adding high-g X-axis */
-        temp = data & ~BMI160_HIGH_G_X_INT_EN_MASK;
-        data = temp | (high_g_int_cfg->high_g_x & BMI160_HIGH_G_X_INT_EN_MASK);
-
-        /* Adding high-g Y-axis */
-        temp = data & ~BMI160_HIGH_G_Y_INT_EN_MASK;
-        data = temp | ((high_g_int_cfg->high_g_y << 1) & BMI160_HIGH_G_Y_INT_EN_MASK);
-
-        /* Adding high-g Z-axis */
-        temp = data & ~BMI160_HIGH_G_Z_INT_EN_MASK;
-        data = temp | ((high_g_int_cfg->high_g_z << 2) & BMI160_HIGH_G_Z_INT_EN_MASK);
-
-        /* write data to Int Enable 0 register */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the source of data(filter & pre-filter)
- * for high-g interrupt.
- */
-static int8_t config_high_g_data_src(
-    const struct bmi160_acc_high_g_int_cfg* high_g_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-    uint8_t temp = 0;
-
-    /* Configure Int data 0 register to add source of interrupt */
-    rslt = bmi160_get_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data & ~BMI160_LOW_HIGH_SRC_INT_MASK;
-        data = temp | ((high_g_int_cfg->high_data_src << 7) & BMI160_LOW_HIGH_SRC_INT_MASK);
-
-        /* Write data to Data 0 address */
-        rslt = bmi160_set_regs(BMI160_INT_DATA_0_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the necessary setting of high-g interrupt.
- */
-static int8_t config_high_g_int_settg(
-    const struct bmi160_acc_high_g_int_cfg* high_g_int_cfg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t data_array[3] = {0, 0, 0};
-
-    rslt = bmi160_get_regs(BMI160_INT_LOWHIGH_2_ADDR, &data_array[0], 1, dev);
-    if(rslt == BMI160_OK) {
-        temp = data_array[0] & ~BMI160_HIGH_G_HYST_MASK;
-
-        /* Adding high-g hysteresis */
-        data_array[0] = temp | ((high_g_int_cfg->high_hy << 6) & BMI160_HIGH_G_HYST_MASK);
-
-        /* Adding high-g duration */
-        data_array[1] = high_g_int_cfg->high_dur;
-
-        /* Adding high-g threshold */
-        data_array[2] = high_g_int_cfg->high_thres;
-        rslt = bmi160_set_regs(BMI160_INT_LOWHIGH_2_ADDR, data_array, 3, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the behavioural setting of interrupt pin.
- */
-static int8_t
-    config_int_out_ctrl(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t data = 0;
-
-    /* Configuration of output interrupt signals on pins INT1 and INT2 are
-     * done in BMI160_INT_OUT_CTRL_ADDR register*/
-    rslt = bmi160_get_regs(BMI160_INT_OUT_CTRL_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* updating the interrupt pin structure to local structure */
-        const struct bmi160_int_pin_settg* intr_pin_sett = &(int_config->int_pin_settg);
-
-        /* Configuring channel 1 */
-        if(int_config->int_channel == BMI160_INT_CHANNEL_1) {
-            /* Output enable */
-            temp = data & ~BMI160_INT1_OUTPUT_EN_MASK;
-            data = temp | ((intr_pin_sett->output_en << 3) & BMI160_INT1_OUTPUT_EN_MASK);
-
-            /* Output mode */
-            temp = data & ~BMI160_INT1_OUTPUT_MODE_MASK;
-            data = temp | ((intr_pin_sett->output_mode << 2) & BMI160_INT1_OUTPUT_MODE_MASK);
-
-            /* Output type */
-            temp = data & ~BMI160_INT1_OUTPUT_TYPE_MASK;
-            data = temp | ((intr_pin_sett->output_type << 1) & BMI160_INT1_OUTPUT_TYPE_MASK);
-
-            /* edge control */
-            temp = data & ~BMI160_INT1_EDGE_CTRL_MASK;
-            data = temp | ((intr_pin_sett->edge_ctrl) & BMI160_INT1_EDGE_CTRL_MASK);
-        } else {
-            /* Configuring channel 2 */
-            /* Output enable */
-            temp = data & ~BMI160_INT2_OUTPUT_EN_MASK;
-            data = temp | ((intr_pin_sett->output_en << 7) & BMI160_INT2_OUTPUT_EN_MASK);
-
-            /* Output mode */
-            temp = data & ~BMI160_INT2_OUTPUT_MODE_MASK;
-            data = temp | ((intr_pin_sett->output_mode << 6) & BMI160_INT2_OUTPUT_MODE_MASK);
-
-            /* Output type */
-            temp = data & ~BMI160_INT2_OUTPUT_TYPE_MASK;
-            data = temp | ((intr_pin_sett->output_type << 5) & BMI160_INT2_OUTPUT_TYPE_MASK);
-
-            /* edge control */
-            temp = data & ~BMI160_INT2_EDGE_CTRL_MASK;
-            data = temp | ((intr_pin_sett->edge_ctrl << 4) & BMI160_INT2_EDGE_CTRL_MASK);
-        }
-
-        rslt = bmi160_set_regs(BMI160_INT_OUT_CTRL_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API configure the mode(input enable, latch or non-latch) of interrupt pin.
- */
-static int8_t
-    config_int_latch(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t temp = 0;
-    uint8_t data = 0;
-
-    /* Configuration of latch on pins INT1 and INT2 are done in
-     * BMI160_INT_LATCH_ADDR register*/
-    rslt = bmi160_get_regs(BMI160_INT_LATCH_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* updating the interrupt pin structure to local structure */
-        const struct bmi160_int_pin_settg* intr_pin_sett = &(int_config->int_pin_settg);
-        if(int_config->int_channel == BMI160_INT_CHANNEL_1) {
-            /* Configuring channel 1 */
-            /* Input enable */
-            temp = data & ~BMI160_INT1_INPUT_EN_MASK;
-            data = temp | ((intr_pin_sett->input_en << 4) & BMI160_INT1_INPUT_EN_MASK);
-        } else {
-            /* Configuring channel 2 */
-            /* Input enable */
-            temp = data & ~BMI160_INT2_INPUT_EN_MASK;
-            data = temp | ((intr_pin_sett->input_en << 5) & BMI160_INT2_INPUT_EN_MASK);
-        }
-
-        /* In case of latch interrupt,update the latch duration */
-
-        /* Latching holds the interrupt for the amount of latch
-         * duration time */
-        temp = data & ~BMI160_INT_LATCH_MASK;
-        data = temp | (intr_pin_sett->latch_dur & BMI160_INT_LATCH_MASK);
-
-        /* OUT_CTRL_INT and LATCH_INT address lie consecutively,
-         * hence writing data to respective registers at one go */
-        rslt = bmi160_set_regs(BMI160_INT_LATCH_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API performs the self test for accelerometer of BMI160
- */
-static int8_t perform_accel_self_test(struct bmi160_dev* dev) {
-    int8_t rslt;
-    struct bmi160_sensor_data accel_pos, accel_neg;
-
-    /* Enable Gyro self test bit */
-    rslt = enable_accel_self_test(dev);
-    if(rslt == BMI160_OK) {
-        /* Perform accel self test with positive excitation */
-        rslt = accel_self_test_positive_excitation(&accel_pos, dev);
-        if(rslt == BMI160_OK) {
-            /* Perform accel self test with negative excitation */
-            rslt = accel_self_test_negative_excitation(&accel_neg, dev);
-            if(rslt == BMI160_OK) {
-                /* Validate the self test result */
-                rslt = validate_accel_self_test(&accel_pos, &accel_neg);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables to perform the accel self test by setting proper
- * configurations to facilitate accel self test
- */
-static int8_t enable_accel_self_test(struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t reg_data;
-
-    /* Set the Accel power mode as normal mode */
-    dev->accel_cfg.power = BMI160_ACCEL_NORMAL_MODE;
-
-    /* Set the sensor range configuration as 8G */
-    dev->accel_cfg.range = BMI160_ACCEL_RANGE_8G;
-    rslt = bmi160_set_sens_conf(dev);
-    if(rslt == BMI160_OK) {
-        /* Accel configurations are set to facilitate self test
-         * acc_odr - 1600Hz ; acc_bwp = 2 ; acc_us = 0 */
-        reg_data = BMI160_ACCEL_SELF_TEST_CONFIG;
-        rslt = bmi160_set_regs(BMI160_ACCEL_CONFIG_ADDR, &reg_data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API performs accel self test with positive excitation
- */
-static int8_t accel_self_test_positive_excitation(
-    struct bmi160_sensor_data* accel_pos,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t reg_data;
-
-    /* Enable accel self test with positive self-test excitation
-     * and with amplitude of deflection set as high */
-    reg_data = BMI160_ACCEL_SELF_TEST_POSITIVE_EN;
-    rslt = bmi160_set_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* Read the data after a delay of 50ms - refer datasheet  2.8.1 accel self test*/
-        dev->delay_ms(BMI160_ACCEL_SELF_TEST_DELAY);
-        rslt = bmi160_get_sensor_data(BMI160_ACCEL_ONLY, accel_pos, NULL, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API performs accel self test with negative excitation
- */
-static int8_t accel_self_test_negative_excitation(
-    struct bmi160_sensor_data* accel_neg,
-    const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t reg_data;
-
-    /* Enable accel self test with negative self-test excitation
-     * and with amplitude of deflection set as high */
-    reg_data = BMI160_ACCEL_SELF_TEST_NEGATIVE_EN;
-    rslt = bmi160_set_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* Read the data after a delay of 50ms */
-        dev->delay_ms(BMI160_ACCEL_SELF_TEST_DELAY);
-        rslt = bmi160_get_sensor_data(BMI160_ACCEL_ONLY, accel_neg, NULL, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API validates the accel self test results
- */
-static int8_t validate_accel_self_test(
-    const struct bmi160_sensor_data* accel_pos,
-    const struct bmi160_sensor_data* accel_neg) {
-    int8_t rslt;
-
-    /* Validate the results of self test */
-    if(((accel_neg->x - accel_pos->x) > BMI160_ACCEL_SELF_TEST_LIMIT) &&
-       ((accel_neg->y - accel_pos->y) > BMI160_ACCEL_SELF_TEST_LIMIT) &&
-       ((accel_neg->z - accel_pos->z) > BMI160_ACCEL_SELF_TEST_LIMIT)) {
-        /* Self test pass condition */
-        rslt = BMI160_OK;
-    } else {
-        rslt = BMI160_W_ACCEl_SELF_TEST_FAIL;
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API performs the self test for gyroscope of BMI160
- */
-static int8_t perform_gyro_self_test(const struct bmi160_dev* dev) {
-    int8_t rslt;
-
-    /* Enable Gyro self test bit */
-    rslt = enable_gyro_self_test(dev);
-    if(rslt == BMI160_OK) {
-        /* Validate the gyro self test a delay of 50ms */
-        dev->delay_ms(50);
-
-        /* Validate the gyro self test results */
-        rslt = validate_gyro_self_test(dev);
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API enables the self test bit to trigger self test for Gyro
- */
-static int8_t enable_gyro_self_test(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t reg_data;
-
-    /* Enable the Gyro self test bit to trigger the self test */
-    rslt = bmi160_get_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
-    if(rslt == BMI160_OK) {
-        reg_data = BMI160_SET_BITS(reg_data, BMI160_GYRO_SELF_TEST, 1);
-        rslt = bmi160_set_regs(BMI160_SELF_TEST_ADDR, &reg_data, 1, dev);
-        if(rslt == BMI160_OK) {
-            /* Delay to enable gyro self test */
-            dev->delay_ms(15);
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This API validates the self test results of Gyro
- */
-static int8_t validate_gyro_self_test(const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t reg_data;
-
-    /* Validate the Gyro self test result */
-    rslt = bmi160_get_regs(BMI160_STATUS_ADDR, &reg_data, 1, dev);
-    if(rslt == BMI160_OK) {
-        reg_data = BMI160_GET_BITS(reg_data, BMI160_GYRO_SELF_TEST_STATUS);
-        if(reg_data == BMI160_ENABLE) {
-            /* Gyro self test success case */
-            rslt = BMI160_OK;
-        } else {
-            rslt = BMI160_W_GYRO_SELF_TEST_FAIL;
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API sets FIFO full interrupt of the sensor.This interrupt
- *  occurs when the FIFO is full and the next full data sample would cause
- *  a FIFO overflow, which may delete the old samples.
- */
-static int8_t
-    set_fifo_full_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    /* Null-pointer check */
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /*enable the fifo full interrupt */
-        rslt = enable_fifo_full_int(int_config, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                rslt = map_hardware_interrupt(int_config, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This enable the FIFO full interrupt engine.
- */
-static int8_t
-    enable_fifo_full_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        data = BMI160_SET_BITS(data, BMI160_FIFO_FULL_INT, int_config->fifo_full_int_en);
-
-        /* Writing data to INT ENABLE 1 Address */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API sets FIFO watermark interrupt of the sensor.The FIFO
- *  watermark interrupt is fired, when the FIFO fill level is above a fifo
- *  watermark.
- */
-static int8_t set_fifo_watermark_int(
-    const struct bmi160_int_settg* int_config,
-    const struct bmi160_dev* dev) {
-    int8_t rslt = BMI160_OK;
-
-    if((dev == NULL) || (dev->delay_ms == NULL)) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Enable fifo-watermark interrupt in Int Enable 1 register */
-        rslt = enable_fifo_wtm_int(int_config, dev);
-        if(rslt == BMI160_OK) {
-            /* Configure Interrupt pins */
-            rslt = set_intr_pin_config(int_config, dev);
-            if(rslt == BMI160_OK) {
-                rslt = map_hardware_interrupt(int_config, dev);
-            }
-        }
-    }
-
-    return rslt;
-}
-
-/*!
- * @brief This enable the FIFO watermark interrupt engine.
- */
-static int8_t
-    enable_fifo_wtm_int(const struct bmi160_int_settg* int_config, const struct bmi160_dev* dev) {
-    int8_t rslt;
-    uint8_t data = 0;
-
-    rslt = bmi160_get_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        data = BMI160_SET_BITS(data, BMI160_FIFO_WTM_INT, int_config->fifo_wtm_int_en);
-
-        /* Writing data to INT ENABLE 1 Address */
-        rslt = bmi160_set_regs(BMI160_INT_ENABLE_1_ADDR, &data, 1, dev);
-    }
-
-    return rslt;
-}
-
-/*!
- *  @brief This API is used to reset the FIFO related configurations
- *  in the fifo_frame structure.
- */
-static void reset_fifo_data_structure(const struct bmi160_dev* dev) {
-    /*Prepare for next FIFO read by resetting FIFO's
-     * internal data structures*/
-    dev->fifo->accel_byte_start_idx = 0;
-    dev->fifo->gyro_byte_start_idx = 0;
-    dev->fifo->aux_byte_start_idx = 0;
-    dev->fifo->sensor_time = 0;
-    dev->fifo->skipped_frame_count = 0;
-}
-
-/*!
- *  @brief This API is used to read fifo_byte_counter value (i.e)
- *  current fill-level in Fifo buffer.
- */
-static int8_t get_fifo_byte_counter(uint16_t* bytes_to_read, struct bmi160_dev const* dev) {
-    int8_t rslt = 0;
-    uint8_t data[2];
-    uint8_t addr = BMI160_FIFO_LENGTH_ADDR;
-
-    rslt |= bmi160_get_regs(addr, data, 2, dev);
-    data[1] = data[1] & BMI160_FIFO_BYTE_COUNTER_MASK;
-
-    /* Available data in FIFO is stored in bytes_to_read*/
-    *bytes_to_read = (((uint16_t)data[1] << 8) | ((uint16_t)data[0]));
-
-    return rslt;
-}
-
-/*!
- *  @brief This API is used to compute the number of bytes of accel FIFO data
- *  which is to be parsed in header-less mode
- */
-static void get_accel_len_to_parse(
-    uint16_t* data_index,
-    uint16_t* data_read_length,
-    const uint8_t* acc_frame_count,
-    const struct bmi160_dev* dev) {
-    /* Data start index */
-    *data_index = dev->fifo->accel_byte_start_idx;
-    if(dev->fifo->fifo_data_enable == BMI160_FIFO_A_ENABLE) {
-        *data_read_length = (*acc_frame_count) * BMI160_FIFO_A_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_G_A_ENABLE) {
-        *data_read_length = (*acc_frame_count) * BMI160_FIFO_GA_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_A_ENABLE) {
-        *data_read_length = (*acc_frame_count) * BMI160_FIFO_MA_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_A_ENABLE) {
-        *data_read_length = (*acc_frame_count) * BMI160_FIFO_MGA_LENGTH;
-    } else {
-        /* When accel is not enabled ,there will be no accel data.
-         * so we update the data index as complete */
-        *data_index = dev->fifo->length;
-    }
-
-    if(*data_read_length > dev->fifo->length) {
-        /* Handling the case where more data is requested
-         * than that is available*/
-        *data_read_length = dev->fifo->length;
-    }
-}
-
-/*!
- *  @brief This API is used to parse the accelerometer data from the
- *  FIFO data in both header mode and header-less mode.
- *  It updates the idx value which is used to store the index of
- *  the current data byte which is parsed.
- */
-static void unpack_accel_frame(
-    struct bmi160_sensor_data* acc,
-    uint16_t* idx,
-    uint8_t* acc_idx,
-    uint8_t frame_info,
-    const struct bmi160_dev* dev) {
-    switch(frame_info) {
-    case BMI160_FIFO_HEAD_A:
-    case BMI160_FIFO_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_A_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into the structure instance "acc" */
-        unpack_accel_data(&acc[*acc_idx], *idx, dev);
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_A_LENGTH;
-        (*acc_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_G_A:
-    case BMI160_FIFO_G_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_GA_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into structure instance "acc"*/
-        unpack_accel_data(&acc[*acc_idx], *idx + BMI160_FIFO_G_LENGTH, dev);
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_GA_LENGTH;
-        (*acc_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_M_A:
-    case BMI160_FIFO_M_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_MA_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into structure instance "acc"*/
-        unpack_accel_data(&acc[*acc_idx], *idx + BMI160_FIFO_M_LENGTH, dev);
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_MA_LENGTH;
-        (*acc_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_M_G_A:
-    case BMI160_FIFO_M_G_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_MGA_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into structure instance "acc"*/
-        unpack_accel_data(&acc[*acc_idx], *idx + BMI160_FIFO_MG_LENGTH, dev);
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_MGA_LENGTH;
-        (*acc_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_M:
-    case BMI160_FIFO_M_ENABLE:
-        (*idx) = (*idx) + BMI160_FIFO_M_LENGTH;
-        break;
-    case BMI160_FIFO_HEAD_G:
-    case BMI160_FIFO_G_ENABLE:
-        (*idx) = (*idx) + BMI160_FIFO_G_LENGTH;
-        break;
-    case BMI160_FIFO_HEAD_M_G:
-    case BMI160_FIFO_M_G_ENABLE:
-        (*idx) = (*idx) + BMI160_FIFO_MG_LENGTH;
-        break;
-    default:
-        break;
-    }
-}
-
-/*!
- *  @brief This API is used to parse the accelerometer data from the
- *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
- */
-static void unpack_accel_data(
-    struct bmi160_sensor_data* accel_data,
-    uint16_t data_start_index,
-    const struct bmi160_dev* dev) {
-    uint16_t data_lsb;
-    uint16_t data_msb;
-
-    /* Accel raw x data */
-    data_lsb = dev->fifo->data[data_start_index++];
-    data_msb = dev->fifo->data[data_start_index++];
-    accel_data->x = (int16_t)((data_msb << 8) | data_lsb);
-
-    /* Accel raw y data */
-    data_lsb = dev->fifo->data[data_start_index++];
-    data_msb = dev->fifo->data[data_start_index++];
-    accel_data->y = (int16_t)((data_msb << 8) | data_lsb);
-
-    /* Accel raw z data */
-    data_lsb = dev->fifo->data[data_start_index++];
-    data_msb = dev->fifo->data[data_start_index++];
-    accel_data->z = (int16_t)((data_msb << 8) | data_lsb);
-}
-
-/*!
- *  @brief This API is used to parse the accelerometer data from the
- *  FIFO data in header mode.
- */
-static void extract_accel_header_mode(
-    struct bmi160_sensor_data* accel_data,
-    uint8_t* accel_length,
-    const struct bmi160_dev* dev) {
-    uint8_t frame_header = 0;
-    uint16_t data_index;
-    uint8_t accel_index = 0;
-
-    for(data_index = dev->fifo->accel_byte_start_idx; data_index < dev->fifo->length;) {
-        /* extracting Frame header */
-        frame_header = (dev->fifo->data[data_index] & BMI160_FIFO_TAG_INTR_MASK);
-
-        /*Index is moved to next byte where the data is starting*/
-        data_index++;
-        switch(frame_header) {
-        /* Accel frame */
-        case BMI160_FIFO_HEAD_A:
-        case BMI160_FIFO_HEAD_M_A:
-        case BMI160_FIFO_HEAD_G_A:
-        case BMI160_FIFO_HEAD_M_G_A:
-            unpack_accel_frame(accel_data, &data_index, &accel_index, frame_header, dev);
-            break;
-        case BMI160_FIFO_HEAD_M:
-            move_next_frame(&data_index, BMI160_FIFO_M_LENGTH, dev);
-            break;
-        case BMI160_FIFO_HEAD_G:
-            move_next_frame(&data_index, BMI160_FIFO_G_LENGTH, dev);
-            break;
-        case BMI160_FIFO_HEAD_M_G:
-            move_next_frame(&data_index, BMI160_FIFO_MG_LENGTH, dev);
-            break;
-
-        /* Sensor time frame */
-        case BMI160_FIFO_HEAD_SENSOR_TIME:
-            unpack_sensortime_frame(&data_index, dev);
-            break;
-
-        /* Skip frame */
-        case BMI160_FIFO_HEAD_SKIP_FRAME:
-            unpack_skipped_frame(&data_index, dev);
-            break;
-
-        /* Input config frame */
-        case BMI160_FIFO_HEAD_INPUT_CONFIG:
-            move_next_frame(&data_index, 1, dev);
-            break;
-        case BMI160_FIFO_HEAD_OVER_READ:
-
-            /* Update the data index as complete in case of Over read */
-            data_index = dev->fifo->length;
-            break;
-        default:
-            break;
-        }
-        if(*accel_length == accel_index) {
-            /* Number of frames to read completed */
-            break;
-        }
-    }
-
-    /*Update number of accel data read*/
-    *accel_length = accel_index;
-
-    /*Update the accel frame index*/
-    dev->fifo->accel_byte_start_idx = data_index;
-}
-
-/*!
- *  @brief This API computes the number of bytes of gyro FIFO data
- *  which is to be parsed in header-less mode
- */
-static void get_gyro_len_to_parse(
-    uint16_t* data_index,
-    uint16_t* data_read_length,
-    const uint8_t* gyro_frame_count,
-    const struct bmi160_dev* dev) {
-    /* Data start index */
-    *data_index = dev->fifo->gyro_byte_start_idx;
-    if(dev->fifo->fifo_data_enable == BMI160_FIFO_G_ENABLE) {
-        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_G_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_G_A_ENABLE) {
-        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_GA_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_ENABLE) {
-        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_MG_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_A_ENABLE) {
-        *data_read_length = (*gyro_frame_count) * BMI160_FIFO_MGA_LENGTH;
-    } else {
-        /* When gyro is not enabled ,there will be no gyro data.
-         * so we update the data index as complete */
-        *data_index = dev->fifo->length;
-    }
-
-    if(*data_read_length > dev->fifo->length) {
-        /* Handling the case where more data is requested
-         * than that is available*/
-        *data_read_length = dev->fifo->length;
-    }
-}
-
-/*!
- *  @brief This API is used to parse the gyroscope's data from the
- *  FIFO data in both header mode and header-less mode.
- *  It updates the idx value which is used to store the index of
- *  the current data byte which is parsed.
- */
-static void unpack_gyro_frame(
-    struct bmi160_sensor_data* gyro,
-    uint16_t* idx,
-    uint8_t* gyro_idx,
-    uint8_t frame_info,
-    const struct bmi160_dev* dev) {
-    switch(frame_info) {
-    case BMI160_FIFO_HEAD_G:
-    case BMI160_FIFO_G_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_G_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into structure instance "gyro"*/
-        unpack_gyro_data(&gyro[*gyro_idx], *idx, dev);
-
-        /*Move the data index*/
-        (*idx) = (*idx) + BMI160_FIFO_G_LENGTH;
-        (*gyro_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_G_A:
-    case BMI160_FIFO_G_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_GA_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /* Unpack the data array into structure instance "gyro" */
-        unpack_gyro_data(&gyro[*gyro_idx], *idx, dev);
-
-        /* Move the data index */
-        *idx = *idx + BMI160_FIFO_GA_LENGTH;
-        (*gyro_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_M_G_A:
-    case BMI160_FIFO_M_G_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_MGA_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into structure instance "gyro"*/
-        unpack_gyro_data(&gyro[*gyro_idx], *idx + BMI160_FIFO_M_LENGTH, dev);
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_MGA_LENGTH;
-        (*gyro_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_M_A:
-    case BMI160_FIFO_M_A_ENABLE:
-
-        /* Move the data index */
-        *idx = *idx + BMI160_FIFO_MA_LENGTH;
-        break;
-    case BMI160_FIFO_HEAD_M:
-    case BMI160_FIFO_M_ENABLE:
-        (*idx) = (*idx) + BMI160_FIFO_M_LENGTH;
-        break;
-    case BMI160_FIFO_HEAD_M_G:
-    case BMI160_FIFO_M_G_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_MG_LENGTH) > dev->fifo->length) {
-            /*Update the data index as complete*/
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /*Unpack the data array into structure instance "gyro"*/
-        unpack_gyro_data(&gyro[*gyro_idx], *idx + BMI160_FIFO_M_LENGTH, dev);
-
-        /*Move the data index*/
-        (*idx) = (*idx) + BMI160_FIFO_MG_LENGTH;
-        (*gyro_idx)++;
-        break;
-    case BMI160_FIFO_HEAD_A:
-    case BMI160_FIFO_A_ENABLE:
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_A_LENGTH;
-        break;
-    default:
-        break;
-    }
-}
-
-/*!
- *  @brief This API is used to parse the gyro data from the
- *  FIFO data and store it in the instance of the structure bmi160_sensor_data.
- */
-static void unpack_gyro_data(
-    struct bmi160_sensor_data* gyro_data,
-    uint16_t data_start_index,
-    const struct bmi160_dev* dev) {
-    uint16_t data_lsb;
-    uint16_t data_msb;
-
-    /* Gyro raw x data */
-    data_lsb = dev->fifo->data[data_start_index++];
-    data_msb = dev->fifo->data[data_start_index++];
-    gyro_data->x = (int16_t)((data_msb << 8) | data_lsb);
-
-    /* Gyro raw y data */
-    data_lsb = dev->fifo->data[data_start_index++];
-    data_msb = dev->fifo->data[data_start_index++];
-    gyro_data->y = (int16_t)((data_msb << 8) | data_lsb);
-
-    /* Gyro raw z data */
-    data_lsb = dev->fifo->data[data_start_index++];
-    data_msb = dev->fifo->data[data_start_index++];
-    gyro_data->z = (int16_t)((data_msb << 8) | data_lsb);
-}
-
-/*!
- *  @brief This API is used to parse the gyro data from the
- *  FIFO data in header mode.
- */
-static void extract_gyro_header_mode(
-    struct bmi160_sensor_data* gyro_data,
-    uint8_t* gyro_length,
-    const struct bmi160_dev* dev) {
-    uint8_t frame_header = 0;
-    uint16_t data_index;
-    uint8_t gyro_index = 0;
-
-    for(data_index = dev->fifo->gyro_byte_start_idx; data_index < dev->fifo->length;) {
-        /* extracting Frame header */
-        frame_header = (dev->fifo->data[data_index] & BMI160_FIFO_TAG_INTR_MASK);
-
-        /*Index is moved to next byte where the data is starting*/
-        data_index++;
-        switch(frame_header) {
-        /* GYRO frame */
-        case BMI160_FIFO_HEAD_G:
-        case BMI160_FIFO_HEAD_G_A:
-        case BMI160_FIFO_HEAD_M_G:
-        case BMI160_FIFO_HEAD_M_G_A:
-            unpack_gyro_frame(gyro_data, &data_index, &gyro_index, frame_header, dev);
-            break;
-        case BMI160_FIFO_HEAD_A:
-            move_next_frame(&data_index, BMI160_FIFO_A_LENGTH, dev);
-            break;
-        case BMI160_FIFO_HEAD_M:
-            move_next_frame(&data_index, BMI160_FIFO_M_LENGTH, dev);
-            break;
-        case BMI160_FIFO_HEAD_M_A:
-            move_next_frame(&data_index, BMI160_FIFO_M_LENGTH, dev);
-            break;
-
-        /* Sensor time frame */
-        case BMI160_FIFO_HEAD_SENSOR_TIME:
-            unpack_sensortime_frame(&data_index, dev);
-            break;
-
-        /* Skip frame */
-        case BMI160_FIFO_HEAD_SKIP_FRAME:
-            unpack_skipped_frame(&data_index, dev);
-            break;
-
-        /* Input config frame */
-        case BMI160_FIFO_HEAD_INPUT_CONFIG:
-            move_next_frame(&data_index, 1, dev);
-            break;
-        case BMI160_FIFO_HEAD_OVER_READ:
-
-            /* Update the data index as complete in case of over read */
-            data_index = dev->fifo->length;
-            break;
-        default:
-            break;
-        }
-        if(*gyro_length == gyro_index) {
-            /*Number of frames to read completed*/
-            break;
-        }
-    }
-
-    /*Update number of gyro data read*/
-    *gyro_length = gyro_index;
-
-    /*Update the gyro frame index*/
-    dev->fifo->gyro_byte_start_idx = data_index;
+int8_t bmi160_write_i2c(uint8_t dev_addr, uint8_t reg_addr, uint8_t* data, uint16_t len) {
+    if(furi_hal_i2c_write_mem(&furi_hal_i2c_handle_external, dev_addr, reg_addr, data, len, 50))
+        return BMI160_OK;
+    return BMI160_E_COM_FAIL;
 }
 
-/*!
- *  @brief This API computes the number of bytes of aux FIFO data
- *  which is to be parsed in header-less mode
- */
-static void get_aux_len_to_parse(
-    uint16_t* data_index,
-    uint16_t* data_read_length,
-    const uint8_t* aux_frame_count,
-    const struct bmi160_dev* dev) {
-    /* Data start index */
-    *data_index = dev->fifo->gyro_byte_start_idx;
-    if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_ENABLE) {
-        *data_read_length = (*aux_frame_count) * BMI160_FIFO_M_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_A_ENABLE) {
-        *data_read_length = (*aux_frame_count) * BMI160_FIFO_MA_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_ENABLE) {
-        *data_read_length = (*aux_frame_count) * BMI160_FIFO_MG_LENGTH;
-    } else if(dev->fifo->fifo_data_enable == BMI160_FIFO_M_G_A_ENABLE) {
-        *data_read_length = (*aux_frame_count) * BMI160_FIFO_MGA_LENGTH;
-    } else {
-        /* When aux is not enabled ,there will be no aux data.
-         * so we update the data index as complete */
-        *data_index = dev->fifo->length;
-    }
-
-    if(*data_read_length > dev->fifo->length) {
-        /* Handling the case where more data is requested
-         * than that is available */
-        *data_read_length = dev->fifo->length;
-    }
+int8_t bmi160_read_i2c(uint8_t dev_addr, uint8_t reg_addr, uint8_t* read_data, uint16_t len) {
+    if(furi_hal_i2c_read_mem(&furi_hal_i2c_handle_external, dev_addr, reg_addr, read_data, len, 50))
+        return BMI160_OK;
+    return BMI160_E_COM_FAIL;
 }
 
-/*!
- *  @brief This API is used to parse the aux's data from the
- *  FIFO data in both header mode and header-less mode.
- *  It updates the idx value which is used to store the index of
- *  the current data byte which is parsed
- */
-static void unpack_aux_frame(
-    struct bmi160_aux_data* aux_data,
-    uint16_t* idx,
-    uint8_t* aux_index,
-    uint8_t frame_info,
-    const struct bmi160_dev* dev) {
-    switch(frame_info) {
-    case BMI160_FIFO_HEAD_M:
-    case BMI160_FIFO_M_ENABLE:
-
-        /* Partial read, then skip the data */
-        if((*idx + BMI160_FIFO_M_LENGTH) > dev->fifo->length) {
-            /* Update the data index as complete */
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /* Unpack the data array into structure instance */
-        unpack_aux_data(&aux_data[*aux_index], *idx, dev);
-
-        /* Move the data index */
-        *idx = *idx + BMI160_FIFO_M_LENGTH;
-        (*aux_index)++;
-        break;
-    case BMI160_FIFO_HEAD_M_A:
-    case BMI160_FIFO_M_A_ENABLE:
-
-        /* Partial read, then skip the data */
-        if((*idx + BMI160_FIFO_MA_LENGTH) > dev->fifo->length) {
-            /* Update the data index as complete */
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /* Unpack the data array into structure instance */
-        unpack_aux_data(&aux_data[*aux_index], *idx, dev);
-
-        /* Move the data index */
-        *idx = *idx + BMI160_FIFO_MA_LENGTH;
-        (*aux_index)++;
-        break;
-    case BMI160_FIFO_HEAD_M_G:
-    case BMI160_FIFO_M_G_ENABLE:
-
-        /* Partial read, then skip the data */
-        if((*idx + BMI160_FIFO_MG_LENGTH) > dev->fifo->length) {
-            /* Update the data index as complete */
-            *idx = dev->fifo->length;
-            break;
-        }
+bool bmi160_begin() {
+    FURI_LOG_I(BMI160_TAG, "Init BMI160");
 
-        /* Unpack the data array into structure instance */
-        unpack_aux_data(&aux_data[*aux_index], *idx, dev);
-
-        /* Move the data index */
-        (*idx) = (*idx) + BMI160_FIFO_MG_LENGTH;
-        (*aux_index)++;
-        break;
-    case BMI160_FIFO_HEAD_M_G_A:
-    case BMI160_FIFO_M_G_A_ENABLE:
-
-        /*Partial read, then skip the data*/
-        if((*idx + BMI160_FIFO_MGA_LENGTH) > dev->fifo->length) {
-            /* Update the data index as complete */
-            *idx = dev->fifo->length;
-            break;
-        }
-
-        /* Unpack the data array into structure instance */
-        unpack_aux_data(&aux_data[*aux_index], *idx, dev);
-
-        /*Move the data index*/
-        *idx = *idx + BMI160_FIFO_MGA_LENGTH;
-        (*aux_index)++;
-        break;
-    case BMI160_FIFO_HEAD_G:
-    case BMI160_FIFO_G_ENABLE:
-
-        /* Move the data index */
-        (*idx) = (*idx) + BMI160_FIFO_G_LENGTH;
-        break;
-    case BMI160_FIFO_HEAD_G_A:
-    case BMI160_FIFO_G_A_ENABLE:
-
-        /* Move the data index */
-        *idx = *idx + BMI160_FIFO_GA_LENGTH;
-        break;
-    case BMI160_FIFO_HEAD_A:
-    case BMI160_FIFO_A_ENABLE:
-
-        /* Move the data index */
-        *idx = *idx + BMI160_FIFO_A_LENGTH;
-        break;
-    default:
-        break;
+    if(!furi_hal_i2c_is_device_ready(&furi_hal_i2c_handle_external, BMI160_DEV_ADDR, 50)) {
+        FURI_LOG_E(BMI160_TAG, "Device not ready!");
+        return false;
     }
-}
 
-/*!
- *  @brief This API is used to parse the aux data from the
- *  FIFO data and store it in the instance of the structure bmi160_aux_data.
- */
-static void unpack_aux_data(
-    struct bmi160_aux_data* aux_data,
-    uint16_t data_start_index,
-    const struct bmi160_dev* dev) {
-    /* Aux data bytes */
-    aux_data->data[0] = dev->fifo->data[data_start_index++];
-    aux_data->data[1] = dev->fifo->data[data_start_index++];
-    aux_data->data[2] = dev->fifo->data[data_start_index++];
-    aux_data->data[3] = dev->fifo->data[data_start_index++];
-    aux_data->data[4] = dev->fifo->data[data_start_index++];
-    aux_data->data[5] = dev->fifo->data[data_start_index++];
-    aux_data->data[6] = dev->fifo->data[data_start_index++];
-    aux_data->data[7] = dev->fifo->data[data_start_index++];
-}
-
-/*!
- *  @brief This API is used to parse the aux data from the
- *  FIFO data in header mode.
- */
-static void extract_aux_header_mode(
-    struct bmi160_aux_data* aux_data,
-    uint8_t* aux_length,
-    const struct bmi160_dev* dev) {
-    uint8_t frame_header = 0;
-    uint16_t data_index;
-    uint8_t aux_index = 0;
-
-    for(data_index = dev->fifo->aux_byte_start_idx; data_index < dev->fifo->length;) {
-        /* extracting Frame header */
-        frame_header = (dev->fifo->data[data_index] & BMI160_FIFO_TAG_INTR_MASK);
-
-        /*Index is moved to next byte where the data is starting*/
-        data_index++;
-        switch(frame_header) {
-        /* Aux frame */
-        case BMI160_FIFO_HEAD_M:
-        case BMI160_FIFO_HEAD_M_A:
-        case BMI160_FIFO_HEAD_M_G:
-        case BMI160_FIFO_HEAD_M_G_A:
-            unpack_aux_frame(aux_data, &data_index, &aux_index, frame_header, dev);
-            break;
-        case BMI160_FIFO_HEAD_G:
-            move_next_frame(&data_index, BMI160_FIFO_G_LENGTH, dev);
-            break;
-        case BMI160_FIFO_HEAD_G_A:
-            move_next_frame(&data_index, BMI160_FIFO_GA_LENGTH, dev);
-            break;
-        case BMI160_FIFO_HEAD_A:
-            move_next_frame(&data_index, BMI160_FIFO_A_LENGTH, dev);
-            break;
+    FURI_LOG_I(BMI160_TAG, "Device ready!");
 
-        /* Sensor time frame */
-        case BMI160_FIFO_HEAD_SENSOR_TIME:
-            unpack_sensortime_frame(&data_index, dev);
-            break;
+    bmi160dev.id = BMI160_DEV_ADDR;
+    bmi160dev.intf = BMI160_I2C_INTF;
+    bmi160dev.read = bmi160_read_i2c;
+    bmi160dev.write = bmi160_write_i2c;
+    bmi160dev.delay_ms = furi_delay_ms;
 
-        /* Skip frame */
-        case BMI160_FIFO_HEAD_SKIP_FRAME:
-            unpack_skipped_frame(&data_index, dev);
-            break;
-
-        /* Input config frame */
-        case BMI160_FIFO_HEAD_INPUT_CONFIG:
-            move_next_frame(&data_index, 1, dev);
-            break;
-        case BMI160_FIFO_HEAD_OVER_READ:
-
-            /* Update the data index as complete in case
-                 * of over read */
-            data_index = dev->fifo->length;
-            break;
-        default:
-
-            /* Update the data index as complete in case of
-                 * getting other headers like 0x00 */
-            data_index = dev->fifo->length;
-            break;
-        }
-        if(*aux_length == aux_index) {
-            /*Number of frames to read completed*/
-            break;
-        }
+    if(bmi160_init(&bmi160dev) != BMI160_OK) {
+        FURI_LOG_E(BMI160_TAG, "Initialization failure!");
+        FURI_LOG_E(BMI160_TAG, "Chip ID 0x%X", bmi160dev.chip_id);
+        return false;
     }
 
-    /* Update number of aux data read */
-    *aux_length = aux_index;
-
-    /* Update the aux frame index */
-    dev->fifo->aux_byte_start_idx = data_index;
-}
-
-/*!
- *  @brief This API checks the presence of non-valid frames in the read fifo data.
- */
-static void check_frame_validity(uint16_t* data_index, const struct bmi160_dev* dev) {
-    if((*data_index + 2) < dev->fifo->length) {
-        /* Check if FIFO is empty */
-        if((dev->fifo->data[*data_index] == FIFO_CONFIG_MSB_CHECK) &&
-           (dev->fifo->data[*data_index + 1] == FIFO_CONFIG_LSB_CHECK)) {
-            /*Update the data index as complete*/
-            *data_index = dev->fifo->length;
-        }
-    }
-}
+    bmi160dev.accel_cfg.odr = BMI160_ACCEL_ODR_400HZ;
+    bmi160dev.accel_cfg.range = BMI160_ACCEL_RANGE_4G;
+    bmi160dev.accel_cfg.bw = BMI160_ACCEL_BW_NORMAL_AVG4;
+    bmi160dev.accel_cfg.power = BMI160_ACCEL_NORMAL_MODE;
+    bmi160dev.gyro_cfg.odr = BMI160_GYRO_ODR_400HZ;
+    bmi160dev.gyro_cfg.range = BMI160_GYRO_RANGE_2000_DPS;
+    bmi160dev.gyro_cfg.bw = BMI160_GYRO_BW_NORMAL_MODE;
+    bmi160dev.gyro_cfg.power = BMI160_GYRO_NORMAL_MODE;
 
-/*!
- *  @brief This API is used to move the data index ahead of the
- *  current_frame_length parameter when unnecessary FIFO data appears while
- *  extracting the user specified data.
- */
-static void move_next_frame(
-    uint16_t* data_index,
-    uint8_t current_frame_length,
-    const struct bmi160_dev* dev) {
-    /*Partial read, then move the data index to last data*/
-    if((*data_index + current_frame_length) > dev->fifo->length) {
-        /*Update the data index as complete*/
-        *data_index = dev->fifo->length;
-    } else {
-        /*Move the data index to next frame*/
-        *data_index = *data_index + current_frame_length;
+    if(bmi160_set_sens_conf(&bmi160dev) != BMI160_OK) {
+        FURI_LOG_E(BMI160_TAG, "Initialization failure!");
+        FURI_LOG_E(BMI160_TAG, "Chip ID 0x%X", bmi160dev.chip_id);
+        return false;
     }
-}
-
-/*!
- *  @brief This API is used to parse and store the sensor time from the
- *  FIFO data in the structure instance dev.
- */
-static void unpack_sensortime_frame(uint16_t* data_index, const struct bmi160_dev* dev) {
-    uint32_t sensor_time_byte3 = 0;
-    uint16_t sensor_time_byte2 = 0;
-    uint8_t sensor_time_byte1 = 0;
 
-    /*Partial read, then move the data index to last data*/
-    if((*data_index + BMI160_SENSOR_TIME_LENGTH) > dev->fifo->length) {
-        /*Update the data index as complete*/
-        *data_index = dev->fifo->length;
-    } else {
-        sensor_time_byte3 = dev->fifo->data[(*data_index) + BMI160_SENSOR_TIME_MSB_BYTE] << 16;
-        sensor_time_byte2 = dev->fifo->data[(*data_index) + BMI160_SENSOR_TIME_XLSB_BYTE] << 8;
-        sensor_time_byte1 = dev->fifo->data[(*data_index)];
+    FURI_LOG_I(BMI160_TAG, "Initialization success!");
+    FURI_LOG_I(BMI160_TAG, "Chip ID 0x%X", bmi160dev.chip_id);
 
-        /* Sensor time */
-        dev->fifo->sensor_time =
-            (uint32_t)(sensor_time_byte3 | sensor_time_byte2 | sensor_time_byte1);
-        *data_index = (*data_index) + BMI160_SENSOR_TIME_LENGTH;
-    }
+    return true;
 }
 
-/*!
- *  @brief This API is used to parse and store the skipped_frame_count from
- *  the FIFO data in the structure instance dev.
- */
-static void unpack_skipped_frame(uint16_t* data_index, const struct bmi160_dev* dev) {
-    /*Partial read, then move the data index to last data*/
-    if(*data_index >= dev->fifo->length) {
-        /*Update the data index as complete*/
-        *data_index = dev->fifo->length;
-    } else {
-        dev->fifo->skipped_frame_count = dev->fifo->data[*data_index];
-
-        /*Move the data index*/
-        *data_index = (*data_index) + 1;
+int bmi160_read(double* vec) {
+    if(bmi160_get_sensor_data(
+           (BMI160_ACCEL_SEL | BMI160_GYRO_SEL), &bmi160_accel, &bmi160_gyro, &bmi160dev) !=
+       BMI160_OK) {
+        return 0;
     }
-}
-
-/*!
- *  @brief This API is used to get the FOC status from the sensor
- */
-static int8_t get_foc_status(uint8_t* foc_status, struct bmi160_dev const* dev) {
-    int8_t rslt;
-    uint8_t data;
 
-    /* Read the FOC status from sensor */
-    rslt = bmi160_get_regs(BMI160_STATUS_ADDR, &data, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* Get the foc_status bit */
-        *foc_status = BMI160_GET_BITS(data, BMI160_FOC_STATUS);
-    }
+    vec[0] = ((double)bmi160_accel.x * 4 / 32768) * GRAVITY;
+    vec[1] = ((double)bmi160_accel.y * 4 / 32768) * GRAVITY;
+    vec[2] = ((double)bmi160_accel.z * 4 / 32768) * GRAVITY;
+    vec[3] = ((double)bmi160_gyro.x * 2000 / 32768) * DEG_TO_RAD;
+    vec[4] = ((double)bmi160_gyro.y * 2000 / 32768) * DEG_TO_RAD;
+    vec[5] = ((double)bmi160_gyro.z * 2000 / 32768) * DEG_TO_RAD;
 
-    return rslt;
+    return ACC_DATA_READY | GYR_DATA_READY;
 }
 
-/*!
- *  @brief This API is used to configure the offset enable bits in the sensor
- */
-static int8_t
-    configure_offset_enable(const struct bmi160_foc_conf* foc_conf, struct bmi160_dev const* dev) {
-    int8_t rslt;
-    uint8_t data;
-
-    /* Null-pointer check */
-    rslt = null_ptr_check(dev);
-    if(rslt != BMI160_OK) {
-        rslt = BMI160_E_NULL_PTR;
-    } else {
-        /* Read the FOC config from the sensor */
-        rslt = bmi160_get_regs(BMI160_OFFSET_CONF_ADDR, &data, 1, dev);
-        if(rslt == BMI160_OK) {
-            /* Set the offset enable/disable for gyro */
-            data = BMI160_SET_BITS(data, BMI160_GYRO_OFFSET_EN, foc_conf->gyro_off_en);
-
-            /* Set the offset enable/disable for accel */
-            data = BMI160_SET_BITS(data, BMI160_ACCEL_OFFSET_EN, foc_conf->acc_off_en);
-
-            /* Set the offset config in the sensor */
-            rslt = bmi160_set_regs(BMI160_OFFSET_CONF_ADDR, &data, 1, dev);
-        }
-    }
-
-    return rslt;
+void bmi160_end() {
 }
 
-static int8_t trigger_foc(struct bmi160_offsets* offset, struct bmi160_dev const* dev) {
-    int8_t rslt;
-    uint8_t foc_status = BMI160_ENABLE;
-    uint8_t cmd = BMI160_START_FOC_CMD;
-    uint8_t timeout = 0;
-    uint8_t data_array[20];
-
-    /* Start the FOC process */
-    rslt = bmi160_set_regs(BMI160_COMMAND_REG_ADDR, &cmd, 1, dev);
-    if(rslt == BMI160_OK) {
-        /* Check the FOC status*/
-        rslt = get_foc_status(&foc_status, dev);
-
-        if((rslt != BMI160_OK) || (foc_status != BMI160_ENABLE)) {
-            while((foc_status != BMI160_ENABLE) && (timeout < 11)) {
-                /* Maximum time of 250ms is given in 10
-                 * steps of 25ms each - 250ms refer datasheet 2.9.1 */
-                dev->delay_ms(25);
-
-                /* Check the FOC status*/
-                rslt = get_foc_status(&foc_status, dev);
-                timeout++;
-            }
-
-            if((rslt == BMI160_OK) && (foc_status == BMI160_ENABLE)) {
-                /* Get offset values from sensor */
-                rslt = bmi160_get_offsets(offset, dev);
-            } else {
-                /* FOC failure case */
-                rslt = BMI160_E_FOC_FAILURE;
-            }
-        }
-
-        if(rslt == BMI160_OK) {
-            /* Read registers 0x04-0x17 */
-            rslt = bmi160_get_regs(BMI160_GYRO_DATA_ADDR, data_array, 20, dev);
-        }
-    }
-
-    return rslt;
-}
+struct imu_t imu_bmi160 = {BMI160_DEV_ADDR, bmi160_begin, bmi160_end, bmi160_read, BMI160_TAG};

tracking/imu/bmi160_defs.h

@@ -1,1619 +0,0 @@
-/**
-* Copyright (c) 2021 Bosch Sensortec GmbH. All rights reserved.
-*
-* BSD-3-Clause
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-*    notice, this list of conditions and the following disclaimer.
-*
-* 2. Redistributions in binary form must reproduce the above copyright
-*    notice, this list of conditions and the following disclaimer in the
-*    documentation and/or other materials provided with the distribution.
-*
-* 3. Neither the name of the copyright holder nor the names of its
-*    contributors may be used to endorse or promote products derived from
-*    this software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
-* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-*
-* @file       bmi160_defs.h
-* @date       2021-10-05
-* @version    v3.9.2
-*
-*/
-
-#ifndef BMI160_DEFS_H_
-#define BMI160_DEFS_H_
-
-/*************************** C types headers *****************************/
-#ifdef __KERNEL__
-#include <linux/types.h>
-#include <linux/kernel.h>
-#else
-#include <stdint.h>
-#include <stddef.h>
-#endif
-
-/*************************** Common macros   *****************************/
-
-#if !defined(UINT8_C) && !defined(INT8_C)
-#define INT8_C(x) S8_C(x)
-#define UINT8_C(x) U8_C(x)
-#endif
-
-#if !defined(UINT16_C) && !defined(INT16_C)
-#define INT16_C(x) S16_C(x)
-#define UINT16_C(x) U16_C(x)
-#endif
-
-#if !defined(INT32_C) && !defined(UINT32_C)
-#define INT32_C(x) S32_C(x)
-#define UINT32_C(x) U32_C(x)
-#endif
-
-#if !defined(INT64_C) && !defined(UINT64_C)
-#define INT64_C(x) S64_C(x)
-#define UINT64_C(x) U64_C(x)
-#endif
-
-/**@}*/
-/**\name C standard macros */
-#ifndef NULL
-#ifdef __cplusplus
-#define NULL 0
-#else
-#define NULL ((void*)0)
-#endif
-#endif
-
-/*************************** Sensor macros   *****************************/
-/* Test for an endian machine */
-#ifndef __ORDER_LITTLE_ENDIAN__
-#define __ORDER_LITTLE_ENDIAN__ 0
-#endif
-
-#ifndef __BYTE_ORDER__
-#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__
-#endif
-
-#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-#ifndef LITTLE_ENDIAN
-#define LITTLE_ENDIAN 1
-#endif
-#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#ifndef BIG_ENDIAN
-#define BIG_ENDIAN 1
-#endif
-#else
-#error "Code does not support Endian format of the processor"
-#endif
-
-/** Mask definitions */
-#define BMI160_ACCEL_BW_MASK UINT8_C(0x70)
-#define BMI160_ACCEL_ODR_MASK UINT8_C(0x0F)
-#define BMI160_ACCEL_UNDERSAMPLING_MASK UINT8_C(0x80)
-#define BMI160_ACCEL_RANGE_MASK UINT8_C(0x0F)
-#define BMI160_GYRO_BW_MASK UINT8_C(0x30)
-#define BMI160_GYRO_ODR_MASK UINT8_C(0x0F)
-#define BMI160_GYRO_RANGE_MASK UINT8_C(0x07)
-
-#define BMI160_ACCEL_BW_POS UINT8_C(4)
-#define BMI160_GYRO_BW_POS UINT8_C(4)
-
-/** Mask definitions for INT_EN registers */
-#define BMI160_ANY_MOTION_X_INT_EN_MASK UINT8_C(0x01)
-#define BMI160_HIGH_G_X_INT_EN_MASK UINT8_C(0x01)
-#define BMI160_NO_MOTION_X_INT_EN_MASK UINT8_C(0x01)
-#define BMI160_ANY_MOTION_Y_INT_EN_MASK UINT8_C(0x02)
-#define BMI160_HIGH_G_Y_INT_EN_MASK UINT8_C(0x02)
-#define BMI160_NO_MOTION_Y_INT_EN_MASK UINT8_C(0x02)
-#define BMI160_ANY_MOTION_Z_INT_EN_MASK UINT8_C(0x04)
-#define BMI160_HIGH_G_Z_INT_EN_MASK UINT8_C(0x04)
-#define BMI160_NO_MOTION_Z_INT_EN_MASK UINT8_C(0x04)
-#define BMI160_SIG_MOTION_INT_EN_MASK UINT8_C(0x07)
-#define BMI160_ANY_MOTION_ALL_INT_EN_MASK UINT8_C(0x07)
-#define BMI160_STEP_DETECT_INT_EN_MASK UINT8_C(0x08)
-#define BMI160_DOUBLE_TAP_INT_EN_MASK UINT8_C(0x10)
-#define BMI160_SINGLE_TAP_INT_EN_MASK UINT8_C(0x20)
-#define BMI160_FIFO_FULL_INT_EN_MASK UINT8_C(0x20)
-#define BMI160_ORIENT_INT_EN_MASK UINT8_C(0x40)
-#define BMI160_FIFO_WATERMARK_INT_EN_MASK UINT8_C(0x40)
-#define BMI160_LOW_G_INT_EN_MASK UINT8_C(0x08)
-#define BMI160_STEP_DETECT_EN_MASK UINT8_C(0x08)
-#define BMI160_FLAT_INT_EN_MASK UINT8_C(0x80)
-#define BMI160_DATA_RDY_INT_EN_MASK UINT8_C(0x10)
-
-/** PMU status Macros */
-#define BMI160_AUX_PMU_SUSPEND UINT8_C(0x00)
-#define BMI160_AUX_PMU_NORMAL UINT8_C(0x01)
-#define BMI160_AUX_PMU_LOW_POWER UINT8_C(0x02)
-
-#define BMI160_GYRO_PMU_SUSPEND UINT8_C(0x00)
-#define BMI160_GYRO_PMU_NORMAL UINT8_C(0x01)
-#define BMI160_GYRO_PMU_FSU UINT8_C(0x03)
-
-#define BMI160_ACCEL_PMU_SUSPEND UINT8_C(0x00)
-#define BMI160_ACCEL_PMU_NORMAL UINT8_C(0x01)
-#define BMI160_ACCEL_PMU_LOW_POWER UINT8_C(0x02)
-
-/** Mask definitions for INT_OUT_CTRL register */
-#define BMI160_INT1_EDGE_CTRL_MASK UINT8_C(0x01)
-#define BMI160_INT1_OUTPUT_MODE_MASK UINT8_C(0x04)
-#define BMI160_INT1_OUTPUT_TYPE_MASK UINT8_C(0x02)
-#define BMI160_INT1_OUTPUT_EN_MASK UINT8_C(0x08)
-#define BMI160_INT2_EDGE_CTRL_MASK UINT8_C(0x10)
-#define BMI160_INT2_OUTPUT_MODE_MASK UINT8_C(0x40)
-#define BMI160_INT2_OUTPUT_TYPE_MASK UINT8_C(0x20)
-#define BMI160_INT2_OUTPUT_EN_MASK UINT8_C(0x80)
-
-/** Mask definitions for INT_LATCH register */
-#define BMI160_INT1_INPUT_EN_MASK UINT8_C(0x10)
-#define BMI160_INT2_INPUT_EN_MASK UINT8_C(0x20)
-#define BMI160_INT_LATCH_MASK UINT8_C(0x0F)
-
-/** Mask definitions for INT_MAP register */
-#define BMI160_INT1_LOW_G_MASK UINT8_C(0x01)
-#define BMI160_INT1_HIGH_G_MASK UINT8_C(0x02)
-#define BMI160_INT1_SLOPE_MASK UINT8_C(0x04)
-#define BMI160_INT1_NO_MOTION_MASK UINT8_C(0x08)
-#define BMI160_INT1_DOUBLE_TAP_MASK UINT8_C(0x10)
-#define BMI160_INT1_SINGLE_TAP_MASK UINT8_C(0x20)
-#define BMI160_INT1_FIFO_FULL_MASK UINT8_C(0x20)
-#define BMI160_INT1_FIFO_WM_MASK UINT8_C(0x40)
-#define BMI160_INT1_ORIENT_MASK UINT8_C(0x40)
-#define BMI160_INT1_FLAT_MASK UINT8_C(0x80)
-#define BMI160_INT1_DATA_READY_MASK UINT8_C(0x80)
-#define BMI160_INT2_LOW_G_MASK UINT8_C(0x01)
-#define BMI160_INT1_LOW_STEP_DETECT_MASK UINT8_C(0x01)
-#define BMI160_INT2_LOW_STEP_DETECT_MASK UINT8_C(0x01)
-#define BMI160_INT2_HIGH_G_MASK UINT8_C(0x02)
-#define BMI160_INT2_FIFO_FULL_MASK UINT8_C(0x02)
-#define BMI160_INT2_FIFO_WM_MASK UINT8_C(0x04)
-#define BMI160_INT2_SLOPE_MASK UINT8_C(0x04)
-#define BMI160_INT2_DATA_READY_MASK UINT8_C(0x08)
-#define BMI160_INT2_NO_MOTION_MASK UINT8_C(0x08)
-#define BMI160_INT2_DOUBLE_TAP_MASK UINT8_C(0x10)
-#define BMI160_INT2_SINGLE_TAP_MASK UINT8_C(0x20)
-#define BMI160_INT2_ORIENT_MASK UINT8_C(0x40)
-#define BMI160_INT2_FLAT_MASK UINT8_C(0x80)
-
-/** Mask definitions for INT_DATA register */
-#define BMI160_TAP_SRC_INT_MASK UINT8_C(0x08)
-#define BMI160_LOW_HIGH_SRC_INT_MASK UINT8_C(0x80)
-#define BMI160_MOTION_SRC_INT_MASK UINT8_C(0x80)
-
-/** Mask definitions for INT_MOTION register */
-#define BMI160_SLOPE_INT_DUR_MASK UINT8_C(0x03)
-#define BMI160_NO_MOTION_INT_DUR_MASK UINT8_C(0xFC)
-#define BMI160_NO_MOTION_SEL_BIT_MASK UINT8_C(0x01)
-
-/** Mask definitions for INT_TAP register */
-#define BMI160_TAP_DUR_MASK UINT8_C(0x07)
-#define BMI160_TAP_SHOCK_DUR_MASK UINT8_C(0x40)
-#define BMI160_TAP_QUIET_DUR_MASK UINT8_C(0x80)
-#define BMI160_TAP_THRES_MASK UINT8_C(0x1F)
-
-/** Mask definitions for INT_FLAT register */
-#define BMI160_FLAT_THRES_MASK UINT8_C(0x3F)
-#define BMI160_FLAT_HOLD_TIME_MASK UINT8_C(0x30)
-#define BMI160_FLAT_HYST_MASK UINT8_C(0x07)
-
-/** Mask definitions for INT_LOWHIGH register */
-#define BMI160_LOW_G_HYST_MASK UINT8_C(0x03)
-#define BMI160_LOW_G_LOW_MODE_MASK UINT8_C(0x04)
-#define BMI160_HIGH_G_HYST_MASK UINT8_C(0xC0)
-
-/** Mask definitions for INT_SIG_MOTION register */
-#define BMI160_SIG_MOTION_SEL_MASK UINT8_C(0x02)
-#define BMI160_SIG_MOTION_SKIP_MASK UINT8_C(0x0C)
-#define BMI160_SIG_MOTION_PROOF_MASK UINT8_C(0x30)
-
-/** Mask definitions for INT_ORIENT register */
-#define BMI160_ORIENT_MODE_MASK UINT8_C(0x03)
-#define BMI160_ORIENT_BLOCK_MASK UINT8_C(0x0C)
-#define BMI160_ORIENT_HYST_MASK UINT8_C(0xF0)
-#define BMI160_ORIENT_THETA_MASK UINT8_C(0x3F)
-#define BMI160_ORIENT_UD_ENABLE UINT8_C(0x40)
-#define BMI160_AXES_EN_MASK UINT8_C(0x80)
-
-/** Mask definitions for FIFO_CONFIG register */
-#define BMI160_FIFO_GYRO UINT8_C(0x80)
-#define BMI160_FIFO_ACCEL UINT8_C(0x40)
-#define BMI160_FIFO_AUX UINT8_C(0x20)
-#define BMI160_FIFO_TAG_INT1 UINT8_C(0x08)
-#define BMI160_FIFO_TAG_INT2 UINT8_C(0x04)
-#define BMI160_FIFO_TIME UINT8_C(0x02)
-#define BMI160_FIFO_HEADER UINT8_C(0x10)
-#define BMI160_FIFO_CONFIG_1_MASK UINT8_C(0xFE)
-
-/** Mask definitions for STEP_CONF register */
-#define BMI160_STEP_COUNT_EN_BIT_MASK UINT8_C(0x08)
-#define BMI160_STEP_DETECT_MIN_THRES_MASK UINT8_C(0x18)
-#define BMI160_STEP_DETECT_STEPTIME_MIN_MASK UINT8_C(0x07)
-#define BMI160_STEP_MIN_BUF_MASK UINT8_C(0x07)
-
-/** Mask definition for FIFO Header Data Tag */
-#define BMI160_FIFO_TAG_INTR_MASK UINT8_C(0xFC)
-
-/** Fifo byte counter mask definitions */
-#define BMI160_FIFO_BYTE_COUNTER_MASK UINT8_C(0x07)
-
-/** Enable/disable bit value */
-#define BMI160_ENABLE UINT8_C(0x01)
-#define BMI160_DISABLE UINT8_C(0x00)
-
-/** Latch Duration */
-#define BMI160_LATCH_DUR_NONE UINT8_C(0x00)
-#define BMI160_LATCH_DUR_312_5_MICRO_SEC UINT8_C(0x01)
-#define BMI160_LATCH_DUR_625_MICRO_SEC UINT8_C(0x02)
-#define BMI160_LATCH_DUR_1_25_MILLI_SEC UINT8_C(0x03)
-#define BMI160_LATCH_DUR_2_5_MILLI_SEC UINT8_C(0x04)
-#define BMI160_LATCH_DUR_5_MILLI_SEC UINT8_C(0x05)
-#define BMI160_LATCH_DUR_10_MILLI_SEC UINT8_C(0x06)
-#define BMI160_LATCH_DUR_20_MILLI_SEC UINT8_C(0x07)
-#define BMI160_LATCH_DUR_40_MILLI_SEC UINT8_C(0x08)
-#define BMI160_LATCH_DUR_80_MILLI_SEC UINT8_C(0x09)
-#define BMI160_LATCH_DUR_160_MILLI_SEC UINT8_C(0x0A)
-#define BMI160_LATCH_DUR_320_MILLI_SEC UINT8_C(0x0B)
-#define BMI160_LATCH_DUR_640_MILLI_SEC UINT8_C(0x0C)
-#define BMI160_LATCH_DUR_1_28_SEC UINT8_C(0x0D)
-#define BMI160_LATCH_DUR_2_56_SEC UINT8_C(0x0E)
-#define BMI160_LATCHED UINT8_C(0x0F)
-
-/** BMI160 Register map */
-#define BMI160_CHIP_ID_ADDR UINT8_C(0x00)
-#define BMI160_ERROR_REG_ADDR UINT8_C(0x02)
-#define BMI160_PMU_STATUS_ADDR UINT8_C(0x03)
-#define BMI160_AUX_DATA_ADDR UINT8_C(0x04)
-#define BMI160_GYRO_DATA_ADDR UINT8_C(0x0C)
-#define BMI160_ACCEL_DATA_ADDR UINT8_C(0x12)
-#define BMI160_STATUS_ADDR UINT8_C(0x1B)
-#define BMI160_INT_STATUS_ADDR UINT8_C(0x1C)
-#define BMI160_FIFO_LENGTH_ADDR UINT8_C(0x22)
-#define BMI160_FIFO_DATA_ADDR UINT8_C(0x24)
-#define BMI160_ACCEL_CONFIG_ADDR UINT8_C(0x40)
-#define BMI160_ACCEL_RANGE_ADDR UINT8_C(0x41)
-#define BMI160_GYRO_CONFIG_ADDR UINT8_C(0x42)
-#define BMI160_GYRO_RANGE_ADDR UINT8_C(0x43)
-#define BMI160_AUX_ODR_ADDR UINT8_C(0x44)
-#define BMI160_FIFO_DOWN_ADDR UINT8_C(0x45)
-#define BMI160_FIFO_CONFIG_0_ADDR UINT8_C(0x46)
-#define BMI160_FIFO_CONFIG_1_ADDR UINT8_C(0x47)
-#define BMI160_AUX_IF_0_ADDR UINT8_C(0x4B)
-#define BMI160_AUX_IF_1_ADDR UINT8_C(0x4C)
-#define BMI160_AUX_IF_2_ADDR UINT8_C(0x4D)
-#define BMI160_AUX_IF_3_ADDR UINT8_C(0x4E)
-#define BMI160_AUX_IF_4_ADDR UINT8_C(0x4F)
-#define BMI160_INT_ENABLE_0_ADDR UINT8_C(0x50)
-#define BMI160_INT_ENABLE_1_ADDR UINT8_C(0x51)
-#define BMI160_INT_ENABLE_2_ADDR UINT8_C(0x52)
-#define BMI160_INT_OUT_CTRL_ADDR UINT8_C(0x53)
-#define BMI160_INT_LATCH_ADDR UINT8_C(0x54)
-#define BMI160_INT_MAP_0_ADDR UINT8_C(0x55)
-#define BMI160_INT_MAP_1_ADDR UINT8_C(0x56)
-#define BMI160_INT_MAP_2_ADDR UINT8_C(0x57)
-#define BMI160_INT_DATA_0_ADDR UINT8_C(0x58)
-#define BMI160_INT_DATA_1_ADDR UINT8_C(0x59)
-#define BMI160_INT_LOWHIGH_0_ADDR UINT8_C(0x5A)
-#define BMI160_INT_LOWHIGH_1_ADDR UINT8_C(0x5B)
-#define BMI160_INT_LOWHIGH_2_ADDR UINT8_C(0x5C)
-#define BMI160_INT_LOWHIGH_3_ADDR UINT8_C(0x5D)
-#define BMI160_INT_LOWHIGH_4_ADDR UINT8_C(0x5E)
-#define BMI160_INT_MOTION_0_ADDR UINT8_C(0x5F)
-#define BMI160_INT_MOTION_1_ADDR UINT8_C(0x60)
-#define BMI160_INT_MOTION_2_ADDR UINT8_C(0x61)
-#define BMI160_INT_MOTION_3_ADDR UINT8_C(0x62)
-#define BMI160_INT_TAP_0_ADDR UINT8_C(0x63)
-#define BMI160_INT_TAP_1_ADDR UINT8_C(0x64)
-#define BMI160_INT_ORIENT_0_ADDR UINT8_C(0x65)
-#define BMI160_INT_ORIENT_1_ADDR UINT8_C(0x66)
-#define BMI160_INT_FLAT_0_ADDR UINT8_C(0x67)
-#define BMI160_INT_FLAT_1_ADDR UINT8_C(0x68)
-#define BMI160_FOC_CONF_ADDR UINT8_C(0x69)
-#define BMI160_CONF_ADDR UINT8_C(0x6A)
-
-#define BMI160_IF_CONF_ADDR UINT8_C(0x6B)
-#define BMI160_SELF_TEST_ADDR UINT8_C(0x6D)
-#define BMI160_OFFSET_ADDR UINT8_C(0x71)
-#define BMI160_OFFSET_CONF_ADDR UINT8_C(0x77)
-#define BMI160_INT_STEP_CNT_0_ADDR UINT8_C(0x78)
-#define BMI160_INT_STEP_CONFIG_0_ADDR UINT8_C(0x7A)
-#define BMI160_INT_STEP_CONFIG_1_ADDR UINT8_C(0x7B)
-#define BMI160_COMMAND_REG_ADDR UINT8_C(0x7E)
-#define BMI160_SPI_COMM_TEST_ADDR UINT8_C(0x7F)
-#define BMI160_INTL_PULLUP_CONF_ADDR UINT8_C(0x85)
-
-/** Error code definitions */
-#define BMI160_OK INT8_C(0)
-#define BMI160_E_NULL_PTR INT8_C(-1)
-#define BMI160_E_COM_FAIL INT8_C(-2)
-#define BMI160_E_DEV_NOT_FOUND INT8_C(-3)
-#define BMI160_E_OUT_OF_RANGE INT8_C(-4)
-#define BMI160_E_INVALID_INPUT INT8_C(-5)
-#define BMI160_E_ACCEL_ODR_BW_INVALID INT8_C(-6)
-#define BMI160_E_GYRO_ODR_BW_INVALID INT8_C(-7)
-#define BMI160_E_LWP_PRE_FLTR_INT_INVALID INT8_C(-8)
-#define BMI160_E_LWP_PRE_FLTR_INVALID INT8_C(-9)
-#define BMI160_E_AUX_NOT_FOUND INT8_C(-10)
-#define BMI160_E_FOC_FAILURE INT8_C(-11)
-#define BMI160_E_READ_WRITE_LENGTH_INVALID INT8_C(-12)
-#define BMI160_E_INVALID_CONFIG INT8_C(-13)
-
-/**\name API warning codes */
-#define BMI160_W_GYRO_SELF_TEST_FAIL INT8_C(1)
-#define BMI160_W_ACCEl_SELF_TEST_FAIL INT8_C(2)
-
-/** BMI160 unique chip identifier */
-#define BMI160_CHIP_ID UINT8_C(0xD1)
-
-/** Soft reset command */
-#define BMI160_SOFT_RESET_CMD UINT8_C(0xb6)
-#define BMI160_SOFT_RESET_DELAY_MS UINT8_C(1)
-
-/** Start FOC command */
-#define BMI160_START_FOC_CMD UINT8_C(0x03)
-
-/** NVM backup enabling command */
-#define BMI160_NVM_BACKUP_EN UINT8_C(0xA0)
-
-/* Delay in ms settings */
-#define BMI160_ACCEL_DELAY_MS UINT8_C(5)
-#define BMI160_GYRO_DELAY_MS UINT8_C(80)
-#define BMI160_ONE_MS_DELAY UINT8_C(1)
-#define BMI160_AUX_COM_DELAY UINT8_C(10)
-#define BMI160_GYRO_SELF_TEST_DELAY UINT8_C(20)
-#define BMI160_ACCEL_SELF_TEST_DELAY UINT8_C(50)
-
-/** Self test configurations */
-#define BMI160_ACCEL_SELF_TEST_CONFIG UINT8_C(0x2C)
-#define BMI160_ACCEL_SELF_TEST_POSITIVE_EN UINT8_C(0x0D)
-#define BMI160_ACCEL_SELF_TEST_NEGATIVE_EN UINT8_C(0x09)
-#define BMI160_ACCEL_SELF_TEST_LIMIT UINT16_C(8192)
-
-/** Power mode settings */
-/* Accel power mode */
-#define BMI160_ACCEL_NORMAL_MODE UINT8_C(0x11)
-#define BMI160_ACCEL_LOWPOWER_MODE UINT8_C(0x12)
-#define BMI160_ACCEL_SUSPEND_MODE UINT8_C(0x10)
-
-/* Gyro power mode */
-#define BMI160_GYRO_SUSPEND_MODE UINT8_C(0x14)
-#define BMI160_GYRO_NORMAL_MODE UINT8_C(0x15)
-#define BMI160_GYRO_FASTSTARTUP_MODE UINT8_C(0x17)
-
-/* Aux power mode */
-#define BMI160_AUX_SUSPEND_MODE UINT8_C(0x18)
-#define BMI160_AUX_NORMAL_MODE UINT8_C(0x19)
-#define BMI160_AUX_LOWPOWER_MODE UINT8_C(0x1A)
-
-/** Range settings */
-/* Accel Range */
-#define BMI160_ACCEL_RANGE_2G UINT8_C(0x03)
-#define BMI160_ACCEL_RANGE_4G UINT8_C(0x05)
-#define BMI160_ACCEL_RANGE_8G UINT8_C(0x08)
-#define BMI160_ACCEL_RANGE_16G UINT8_C(0x0C)
-
-/* Gyro Range */
-#define BMI160_GYRO_RANGE_2000_DPS UINT8_C(0x00)
-#define BMI160_GYRO_RANGE_1000_DPS UINT8_C(0x01)
-#define BMI160_GYRO_RANGE_500_DPS UINT8_C(0x02)
-#define BMI160_GYRO_RANGE_250_DPS UINT8_C(0x03)
-#define BMI160_GYRO_RANGE_125_DPS UINT8_C(0x04)
-
-/** Bandwidth settings */
-/* Accel Bandwidth */
-#define BMI160_ACCEL_BW_OSR4_AVG1 UINT8_C(0x00)
-#define BMI160_ACCEL_BW_OSR2_AVG2 UINT8_C(0x01)
-#define BMI160_ACCEL_BW_NORMAL_AVG4 UINT8_C(0x02)
-#define BMI160_ACCEL_BW_RES_AVG8 UINT8_C(0x03)
-#define BMI160_ACCEL_BW_RES_AVG16 UINT8_C(0x04)
-#define BMI160_ACCEL_BW_RES_AVG32 UINT8_C(0x05)
-#define BMI160_ACCEL_BW_RES_AVG64 UINT8_C(0x06)
-#define BMI160_ACCEL_BW_RES_AVG128 UINT8_C(0x07)
-
-#define BMI160_GYRO_BW_OSR4_MODE UINT8_C(0x00)
-#define BMI160_GYRO_BW_OSR2_MODE UINT8_C(0x01)
-#define BMI160_GYRO_BW_NORMAL_MODE UINT8_C(0x02)
-
-/* Output Data Rate settings */
-/* Accel Output data rate */
-#define BMI160_ACCEL_ODR_RESERVED UINT8_C(0x00)
-#define BMI160_ACCEL_ODR_0_78HZ UINT8_C(0x01)
-#define BMI160_ACCEL_ODR_1_56HZ UINT8_C(0x02)
-#define BMI160_ACCEL_ODR_3_12HZ UINT8_C(0x03)
-#define BMI160_ACCEL_ODR_6_25HZ UINT8_C(0x04)
-#define BMI160_ACCEL_ODR_12_5HZ UINT8_C(0x05)
-#define BMI160_ACCEL_ODR_25HZ UINT8_C(0x06)
-#define BMI160_ACCEL_ODR_50HZ UINT8_C(0x07)
-#define BMI160_ACCEL_ODR_100HZ UINT8_C(0x08)
-#define BMI160_ACCEL_ODR_200HZ UINT8_C(0x09)
-#define BMI160_ACCEL_ODR_400HZ UINT8_C(0x0A)
-#define BMI160_ACCEL_ODR_800HZ UINT8_C(0x0B)
-#define BMI160_ACCEL_ODR_1600HZ UINT8_C(0x0C)
-#define BMI160_ACCEL_ODR_RESERVED0 UINT8_C(0x0D)
-#define BMI160_ACCEL_ODR_RESERVED1 UINT8_C(0x0E)
-#define BMI160_ACCEL_ODR_RESERVED2 UINT8_C(0x0F)
-
-/* Gyro Output data rate */
-#define BMI160_GYRO_ODR_RESERVED UINT8_C(0x00)
-#define BMI160_GYRO_ODR_25HZ UINT8_C(0x06)
-#define BMI160_GYRO_ODR_50HZ UINT8_C(0x07)
-#define BMI160_GYRO_ODR_100HZ UINT8_C(0x08)
-#define BMI160_GYRO_ODR_200HZ UINT8_C(0x09)
-#define BMI160_GYRO_ODR_400HZ UINT8_C(0x0A)
-#define BMI160_GYRO_ODR_800HZ UINT8_C(0x0B)
-#define BMI160_GYRO_ODR_1600HZ UINT8_C(0x0C)
-#define BMI160_GYRO_ODR_3200HZ UINT8_C(0x0D)
-
-/* Auxiliary sensor Output data rate */
-#define BMI160_AUX_ODR_RESERVED UINT8_C(0x00)
-#define BMI160_AUX_ODR_0_78HZ UINT8_C(0x01)
-#define BMI160_AUX_ODR_1_56HZ UINT8_C(0x02)
-#define BMI160_AUX_ODR_3_12HZ UINT8_C(0x03)
-#define BMI160_AUX_ODR_6_25HZ UINT8_C(0x04)
-#define BMI160_AUX_ODR_12_5HZ UINT8_C(0x05)
-#define BMI160_AUX_ODR_25HZ UINT8_C(0x06)
-#define BMI160_AUX_ODR_50HZ UINT8_C(0x07)
-#define BMI160_AUX_ODR_100HZ UINT8_C(0x08)
-#define BMI160_AUX_ODR_200HZ UINT8_C(0x09)
-#define BMI160_AUX_ODR_400HZ UINT8_C(0x0A)
-#define BMI160_AUX_ODR_800HZ UINT8_C(0x0B)
-
-/** FIFO_CONFIG Definitions */
-#define BMI160_FIFO_TIME_ENABLE UINT8_C(0x02)
-#define BMI160_FIFO_TAG_INT2_ENABLE UINT8_C(0x04)
-#define BMI160_FIFO_TAG_INT1_ENABLE UINT8_C(0x08)
-#define BMI160_FIFO_HEAD_ENABLE UINT8_C(0x10)
-#define BMI160_FIFO_M_ENABLE UINT8_C(0x20)
-#define BMI160_FIFO_A_ENABLE UINT8_C(0x40)
-#define BMI160_FIFO_M_A_ENABLE UINT8_C(0x60)
-#define BMI160_FIFO_G_ENABLE UINT8_C(0x80)
-#define BMI160_FIFO_M_G_ENABLE UINT8_C(0xA0)
-#define BMI160_FIFO_G_A_ENABLE UINT8_C(0xC0)
-#define BMI160_FIFO_M_G_A_ENABLE UINT8_C(0xE0)
-
-/* Macro to specify the number of bytes over-read from the
- * FIFO in order to get the sensor time at the end of FIFO */
-#ifndef BMI160_FIFO_BYTES_OVERREAD
-#define BMI160_FIFO_BYTES_OVERREAD UINT8_C(25)
-#endif
-
-/* Accel, gyro and aux. sensor length and also their combined
- * length definitions in FIFO */
-#define BMI160_FIFO_G_LENGTH UINT8_C(6)
-#define BMI160_FIFO_A_LENGTH UINT8_C(6)
-#define BMI160_FIFO_M_LENGTH UINT8_C(8)
-#define BMI160_FIFO_GA_LENGTH UINT8_C(12)
-#define BMI160_FIFO_MA_LENGTH UINT8_C(14)
-#define BMI160_FIFO_MG_LENGTH UINT8_C(14)
-#define BMI160_FIFO_MGA_LENGTH UINT8_C(20)
-
-/** FIFO Header Data definitions */
-#define BMI160_FIFO_HEAD_SKIP_FRAME UINT8_C(0x40)
-#define BMI160_FIFO_HEAD_SENSOR_TIME UINT8_C(0x44)
-#define BMI160_FIFO_HEAD_INPUT_CONFIG UINT8_C(0x48)
-#define BMI160_FIFO_HEAD_OVER_READ UINT8_C(0x80)
-#define BMI160_FIFO_HEAD_A UINT8_C(0x84)
-#define BMI160_FIFO_HEAD_G UINT8_C(0x88)
-#define BMI160_FIFO_HEAD_G_A UINT8_C(0x8C)
-#define BMI160_FIFO_HEAD_M UINT8_C(0x90)
-#define BMI160_FIFO_HEAD_M_A UINT8_C(0x94)
-#define BMI160_FIFO_HEAD_M_G UINT8_C(0x98)
-#define BMI160_FIFO_HEAD_M_G_A UINT8_C(0x9C)
-
-/** FIFO sensor time length definitions */
-#define BMI160_SENSOR_TIME_LENGTH UINT8_C(3)
-
-/** FIFO DOWN selection */
-/* Accel fifo down-sampling values*/
-#define BMI160_ACCEL_FIFO_DOWN_ZERO UINT8_C(0x00)
-#define BMI160_ACCEL_FIFO_DOWN_ONE UINT8_C(0x10)
-#define BMI160_ACCEL_FIFO_DOWN_TWO UINT8_C(0x20)
-#define BMI160_ACCEL_FIFO_DOWN_THREE UINT8_C(0x30)
-#define BMI160_ACCEL_FIFO_DOWN_FOUR UINT8_C(0x40)
-#define BMI160_ACCEL_FIFO_DOWN_FIVE UINT8_C(0x50)
-#define BMI160_ACCEL_FIFO_DOWN_SIX UINT8_C(0x60)
-#define BMI160_ACCEL_FIFO_DOWN_SEVEN UINT8_C(0x70)
-
-/* Gyro fifo down-smapling values*/
-#define BMI160_GYRO_FIFO_DOWN_ZERO UINT8_C(0x00)
-#define BMI160_GYRO_FIFO_DOWN_ONE UINT8_C(0x01)
-#define BMI160_GYRO_FIFO_DOWN_TWO UINT8_C(0x02)
-#define BMI160_GYRO_FIFO_DOWN_THREE UINT8_C(0x03)
-#define BMI160_GYRO_FIFO_DOWN_FOUR UINT8_C(0x04)
-#define BMI160_GYRO_FIFO_DOWN_FIVE UINT8_C(0x05)
-#define BMI160_GYRO_FIFO_DOWN_SIX UINT8_C(0x06)
-#define BMI160_GYRO_FIFO_DOWN_SEVEN UINT8_C(0x07)
-
-/* Accel Fifo filter enable*/
-#define BMI160_ACCEL_FIFO_FILT_EN UINT8_C(0x80)
-
-/* Gyro Fifo filter enable*/
-#define BMI160_GYRO_FIFO_FILT_EN UINT8_C(0x08)
-
-/** Definitions to check validity of FIFO frames */
-#define FIFO_CONFIG_MSB_CHECK UINT8_C(0x80)
-#define FIFO_CONFIG_LSB_CHECK UINT8_C(0x00)
-
-/*! BMI160 accel FOC configurations */
-#define BMI160_FOC_ACCEL_DISABLED UINT8_C(0x00)
-#define BMI160_FOC_ACCEL_POSITIVE_G UINT8_C(0x01)
-#define BMI160_FOC_ACCEL_NEGATIVE_G UINT8_C(0x02)
-#define BMI160_FOC_ACCEL_0G UINT8_C(0x03)
-
-/** Array Parameter DefinItions */
-#define BMI160_SENSOR_TIME_LSB_BYTE UINT8_C(0)
-#define BMI160_SENSOR_TIME_XLSB_BYTE UINT8_C(1)
-#define BMI160_SENSOR_TIME_MSB_BYTE UINT8_C(2)
-
-/** Interface settings */
-#define BMI160_SPI_INTF UINT8_C(1)
-#define BMI160_I2C_INTF UINT8_C(0)
-#define BMI160_SPI_RD_MASK UINT8_C(0x80)
-#define BMI160_SPI_WR_MASK UINT8_C(0x7F)
-
-/* Sensor & time select definition*/
-#define BMI160_ACCEL_SEL UINT8_C(0x01)
-#define BMI160_GYRO_SEL UINT8_C(0x02)
-#define BMI160_TIME_SEL UINT8_C(0x04)
-
-/* Sensor select mask*/
-#define BMI160_SEN_SEL_MASK UINT8_C(0x07)
-
-/* Error code mask */
-#define BMI160_ERR_REG_MASK UINT8_C(0x0F)
-
-/* BMI160 I2C address */
-#define BMI160_I2C_ADDR UINT8_C(0x68)
-
-/* BMI160 secondary IF address */
-#define BMI160_AUX_BMM150_I2C_ADDR UINT8_C(0x10)
-
-/** BMI160 Length definitions */
-#define BMI160_ONE UINT8_C(1)
-#define BMI160_TWO UINT8_C(2)
-#define BMI160_THREE UINT8_C(3)
-#define BMI160_FOUR UINT8_C(4)
-#define BMI160_FIVE UINT8_C(5)
-
-/** BMI160 fifo level Margin */
-#define BMI160_FIFO_LEVEL_MARGIN UINT8_C(16)
-
-/** BMI160 fifo flush Command */
-#define BMI160_FIFO_FLUSH_VALUE UINT8_C(0xB0)
-
-/** BMI160 offset values for xyz axes of accel */
-#define BMI160_ACCEL_MIN_OFFSET INT8_C(-128)
-#define BMI160_ACCEL_MAX_OFFSET INT8_C(127)
-
-/** BMI160 offset values for xyz axes of gyro */
-#define BMI160_GYRO_MIN_OFFSET INT16_C(-512)
-#define BMI160_GYRO_MAX_OFFSET INT16_C(511)
-
-/** BMI160 fifo full interrupt position and mask */
-#define BMI160_FIFO_FULL_INT_POS UINT8_C(5)
-#define BMI160_FIFO_FULL_INT_MSK UINT8_C(0x20)
-#define BMI160_FIFO_WTM_INT_POS UINT8_C(6)
-#define BMI160_FIFO_WTM_INT_MSK UINT8_C(0x40)
-
-#define BMI160_FIFO_FULL_INT_PIN1_POS UINT8_C(5)
-#define BMI160_FIFO_FULL_INT_PIN1_MSK UINT8_C(0x20)
-#define BMI160_FIFO_FULL_INT_PIN2_POS UINT8_C(1)
-#define BMI160_FIFO_FULL_INT_PIN2_MSK UINT8_C(0x02)
-
-#define BMI160_FIFO_WTM_INT_PIN1_POS UINT8_C(6)
-#define BMI160_FIFO_WTM_INT_PIN1_MSK UINT8_C(0x40)
-#define BMI160_FIFO_WTM_INT_PIN2_POS UINT8_C(2)
-#define BMI160_FIFO_WTM_INT_PIN2_MSK UINT8_C(0x04)
-
-#define BMI160_MANUAL_MODE_EN_POS UINT8_C(7)
-#define BMI160_MANUAL_MODE_EN_MSK UINT8_C(0x80)
-#define BMI160_AUX_READ_BURST_POS UINT8_C(0)
-#define BMI160_AUX_READ_BURST_MSK UINT8_C(0x03)
-
-#define BMI160_GYRO_SELF_TEST_POS UINT8_C(4)
-#define BMI160_GYRO_SELF_TEST_MSK UINT8_C(0x10)
-#define BMI160_GYRO_SELF_TEST_STATUS_POS UINT8_C(1)
-#define BMI160_GYRO_SELF_TEST_STATUS_MSK UINT8_C(0x02)
-
-#define BMI160_GYRO_FOC_EN_POS UINT8_C(6)
-#define BMI160_GYRO_FOC_EN_MSK UINT8_C(0x40)
-
-#define BMI160_ACCEL_FOC_X_CONF_POS UINT8_C(4)
-#define BMI160_ACCEL_FOC_X_CONF_MSK UINT8_C(0x30)
-
-#define BMI160_ACCEL_FOC_Y_CONF_POS UINT8_C(2)
-#define BMI160_ACCEL_FOC_Y_CONF_MSK UINT8_C(0x0C)
-
-#define BMI160_ACCEL_FOC_Z_CONF_MSK UINT8_C(0x03)
-
-#define BMI160_FOC_STATUS_POS UINT8_C(3)
-#define BMI160_FOC_STATUS_MSK UINT8_C(0x08)
-
-#define BMI160_GYRO_OFFSET_X_MSK UINT8_C(0x03)
-
-#define BMI160_GYRO_OFFSET_Y_POS UINT8_C(2)
-#define BMI160_GYRO_OFFSET_Y_MSK UINT8_C(0x0C)
-
-#define BMI160_GYRO_OFFSET_Z_POS UINT8_C(4)
-#define BMI160_GYRO_OFFSET_Z_MSK UINT8_C(0x30)
-
-#define BMI160_GYRO_OFFSET_EN_POS UINT8_C(7)
-#define BMI160_GYRO_OFFSET_EN_MSK UINT8_C(0x80)
-
-#define BMI160_ACCEL_OFFSET_EN_POS UINT8_C(6)
-#define BMI160_ACCEL_OFFSET_EN_MSK UINT8_C(0x40)
-
-#define BMI160_GYRO_OFFSET_POS UINT16_C(8)
-#define BMI160_GYRO_OFFSET_MSK UINT16_C(0x0300)
-
-#define BMI160_NVM_UPDATE_POS UINT8_C(1)
-#define BMI160_NVM_UPDATE_MSK UINT8_C(0x02)
-
-#define BMI160_NVM_STATUS_POS UINT8_C(4)
-#define BMI160_NVM_STATUS_MSK UINT8_C(0x10)
-
-#define BMI160_MAG_POWER_MODE_MSK UINT8_C(0x03)
-
-#define BMI160_ACCEL_POWER_MODE_MSK UINT8_C(0x30)
-#define BMI160_ACCEL_POWER_MODE_POS UINT8_C(4)
-
-#define BMI160_GYRO_POWER_MODE_MSK UINT8_C(0x0C)
-#define BMI160_GYRO_POWER_MODE_POS UINT8_C(2)
-
-/* BIT SLICE GET AND SET FUNCTIONS */
-#define BMI160_GET_BITS(regvar, bitname) ((regvar & bitname##_MSK) >> bitname##_POS)
-#define BMI160_SET_BITS(regvar, bitname, val) \
-    ((regvar & ~bitname##_MSK) | ((val << bitname##_POS) & bitname##_MSK))
-
-#define BMI160_SET_BITS_POS_0(reg_data, bitname, data) \
-    ((reg_data & ~(bitname##_MSK)) | (data & bitname##_MSK))
-
-#define BMI160_GET_BITS_POS_0(reg_data, bitname) (reg_data & (bitname##_MSK))
-
-/**\name UTILITY MACROS */
-#define BMI160_SET_LOW_BYTE UINT16_C(0x00FF)
-#define BMI160_SET_HIGH_BYTE UINT16_C(0xFF00)
-
-#define BMI160_GET_LSB(var) (uint8_t)(var & BMI160_SET_LOW_BYTE)
-#define BMI160_GET_MSB(var) (uint8_t)((var & BMI160_SET_HIGH_BYTE) >> 8)
-
-/*****************************************************************************/
-/* type definitions */
-
-/*!
- * @brief Bus communication function pointer which should be mapped to
- * the platform specific read functions of the user
- */
-typedef int8_t (
-    *bmi160_read_fptr_t)(uint8_t dev_addr, uint8_t reg_addr, uint8_t* data, uint16_t len);
-
-/*!
- * @brief Bus communication function pointer which should be mapped to
- * the platform specific write functions of the user
- */
-typedef int8_t (
-    *bmi160_write_fptr_t)(uint8_t dev_addr, uint8_t reg_addr, uint8_t* read_data, uint16_t len);
-typedef void (*bmi160_delay_fptr_t)(uint32_t period);
-
-/*************************** Data structures *********************************/
-
-/*!
- * @brief bmi160 interrupt status selection enum.
- */
-enum bmi160_int_status_sel {
-    BMI160_INT_STATUS_0 = 1,
-    BMI160_INT_STATUS_1 = 2,
-    BMI160_INT_STATUS_2 = 4,
-    BMI160_INT_STATUS_3 = 8,
-    BMI160_INT_STATUS_ALL = 15
-};
-
-/*!
- * @brief bmi160 interrupt status bits structure
- */
-struct bmi160_int_status_bits {
-#ifdef LITTLE_ENDIAN
-
-    uint32_t step : 1;
-    uint32_t sigmot : 1;
-    uint32_t anym : 1;
-
-    /* pmu trigger will be handled later */
-    uint32_t pmu_trigger_reserved : 1;
-    uint32_t d_tap : 1;
-    uint32_t s_tap : 1;
-    uint32_t orient : 1;
-    uint32_t flat_int : 1;
-    uint32_t reserved : 2;
-    uint32_t high_g : 1;
-    uint32_t low_g : 1;
-    uint32_t drdy : 1;
-    uint32_t ffull : 1;
-    uint32_t fwm : 1;
-    uint32_t nomo : 1;
-    uint32_t anym_first_x : 1;
-    uint32_t anym_first_y : 1;
-    uint32_t anym_first_z : 1;
-    uint32_t anym_sign : 1;
-    uint32_t tap_first_x : 1;
-    uint32_t tap_first_y : 1;
-    uint32_t tap_first_z : 1;
-    uint32_t tap_sign : 1;
-    uint32_t high_first_x : 1;
-    uint32_t high_first_y : 1;
-    uint32_t high_first_z : 1;
-    uint32_t high_sign : 1;
-    uint32_t orient_1_0 : 2;
-    uint32_t orient_2 : 1;
-    uint32_t flat : 1;
-#else
-    uint32_t high_first_x : 1;
-    uint32_t high_first_y : 1;
-    uint32_t high_first_z : 1;
-    uint32_t high_sign : 1;
-    uint32_t orient_1_0 : 2;
-    uint32_t orient_2 : 1;
-    uint32_t flat : 1;
-    uint32_t anym_first_x : 1;
-    uint32_t anym_first_y : 1;
-    uint32_t anym_first_z : 1;
-    uint32_t anym_sign : 1;
-    uint32_t tap_first_x : 1;
-    uint32_t tap_first_y : 1;
-    uint32_t tap_first_z : 1;
-    uint32_t tap_sign : 1;
-    uint32_t reserved : 2;
-    uint32_t high_g : 1;
-    uint32_t low_g : 1;
-    uint32_t drdy : 1;
-    uint32_t ffull : 1;
-    uint32_t fwm : 1;
-    uint32_t nomo : 1;
-    uint32_t step : 1;
-    uint32_t sigmot : 1;
-    uint32_t anym : 1;
-
-    /* pmu trigger will be handled later */
-    uint32_t pmu_trigger_reserved : 1;
-    uint32_t d_tap : 1;
-    uint32_t s_tap : 1;
-    uint32_t orient : 1;
-    uint32_t flat_int : 1;
-#endif
-};
-
-/*!
- * @brief bmi160 interrupt status structure
- */
-union bmi160_int_status {
-    uint8_t data[4];
-    struct bmi160_int_status_bits bit;
-};
-
-/*!
- * @brief bmi160 sensor data structure which comprises of accel data
- */
-struct bmi160_sensor_data {
-    /*! X-axis sensor data */
-    int16_t x;
-
-    /*! Y-axis sensor data */
-    int16_t y;
-
-    /*! Z-axis sensor data */
-    int16_t z;
-
-    /*! sensor time */
-    uint32_t sensortime;
-};
-
-/*!
- * @brief bmi160 aux data structure which comprises of 8 bytes of accel data
- */
-struct bmi160_aux_data {
-    /*! Auxiliary data */
-    uint8_t data[8];
-};
-
-/*!
- * @brief bmi160 FOC configuration structure
- */
-struct bmi160_foc_conf {
-    /*! Enabling FOC in gyro
-     * Assignable macros :
-     *  - BMI160_ENABLE
-     *  - BMI160_DISABLE
-     */
-    uint8_t foc_gyr_en;
-
-    /*! Accel FOC configurations
-     * Assignable macros :
-     *  - BMI160_FOC_ACCEL_DISABLED
-     *  - BMI160_FOC_ACCEL_POSITIVE_G
-     *  - BMI160_FOC_ACCEL_NEGATIVE_G
-     *  - BMI160_FOC_ACCEL_0G
-     */
-    uint8_t foc_acc_x;
-    uint8_t foc_acc_y;
-    uint8_t foc_acc_z;
-
-    /*! Enabling offset compensation for accel in data registers
-     * Assignable macros :
-     *  - BMI160_ENABLE
-     *  - BMI160_DISABLE
-     */
-    uint8_t acc_off_en;
-
-    /*! Enabling offset compensation for gyro in data registers
-     * Assignable macros :
-     *  - BMI160_ENABLE
-     *  - BMI160_DISABLE
-     */
-    uint8_t gyro_off_en;
-};
-
-/*!
- * @brief bmi160 accel gyro offsets
- */
-struct bmi160_offsets {
-    /*! Accel offset for x axis */
-    int8_t off_acc_x;
-
-    /*! Accel offset for y axis */
-    int8_t off_acc_y;
-
-    /*! Accel offset for z axis */
-    int8_t off_acc_z;
-
-    /*! Gyro offset for x axis */
-    int16_t off_gyro_x;
-
-    /*! Gyro offset for y axis */
-    int16_t off_gyro_y;
-
-    /*! Gyro offset for z axis */
-    int16_t off_gyro_z;
-};
-
-/*!
- * @brief FIFO aux. sensor data structure
- */
-struct bmi160_aux_fifo_data {
-    /*! The value of aux. sensor x LSB data */
-    uint8_t aux_x_lsb;
-
-    /*! The value of aux. sensor x MSB data */
-    uint8_t aux_x_msb;
-
-    /*! The value of aux. sensor y LSB data */
-    uint8_t aux_y_lsb;
-
-    /*! The value of aux. sensor y MSB data */
-    uint8_t aux_y_msb;
-
-    /*! The value of aux. sensor z LSB data */
-    uint8_t aux_z_lsb;
-
-    /*! The value of aux. sensor z MSB data */
-    uint8_t aux_z_msb;
-
-    /*! The value of aux. sensor r for BMM150 LSB data */
-    uint8_t aux_r_y2_lsb;
-
-    /*! The value of aux. sensor r for BMM150 MSB data */
-    uint8_t aux_r_y2_msb;
-};
-
-/*!
- * @brief bmi160 sensor select structure
- */
-enum bmi160_select_sensor { BMI160_ACCEL_ONLY = 1, BMI160_GYRO_ONLY, BMI160_BOTH_ACCEL_AND_GYRO };
-
-/*!
- * @brief bmi160 sensor step detector mode structure
- */
-enum bmi160_step_detect_mode {
-    BMI160_STEP_DETECT_NORMAL,
-    BMI160_STEP_DETECT_SENSITIVE,
-    BMI160_STEP_DETECT_ROBUST,
-
-    /*! Non recommended User defined setting */
-    BMI160_STEP_DETECT_USER_DEFINE
-};
-
-/*!
- * @brief enum for auxiliary burst read selection
- */
-enum bmi160_aux_read_len {
-    BMI160_AUX_READ_LEN_0,
-    BMI160_AUX_READ_LEN_1,
-    BMI160_AUX_READ_LEN_2,
-    BMI160_AUX_READ_LEN_3
-};
-
-/*!
- * @brief bmi160 sensor configuration structure
- */
-struct bmi160_cfg {
-    /*! power mode */
-    uint8_t power;
-
-    /*! output data rate */
-    uint8_t odr;
-
-    /*! range */
-    uint8_t range;
-
-    /*! bandwidth */
-    uint8_t bw;
-};
-
-/*!
- * @brief Aux sensor configuration structure
- */
-struct bmi160_aux_cfg {
-    /*! Aux sensor, 1 - enable 0 - disable */
-    uint8_t aux_sensor_enable : 1;
-
-    /*! Aux manual/auto mode status */
-    uint8_t manual_enable : 1;
-
-    /*! Aux read burst length */
-    uint8_t aux_rd_burst_len : 2;
-
-    /*! output data rate */
-    uint8_t aux_odr : 4;
-
-    /*! i2c addr of auxiliary sensor */
-    uint8_t aux_i2c_addr;
-};
-
-/*!
- * @brief bmi160 interrupt channel selection structure
- */
-enum bmi160_int_channel {
-    /*! Un-map both channels */
-    BMI160_INT_CHANNEL_NONE,
-
-    /*! interrupt Channel 1 */
-    BMI160_INT_CHANNEL_1,
-
-    /*! interrupt Channel 2 */
-    BMI160_INT_CHANNEL_2,
-
-    /*! Map both channels */
-    BMI160_INT_CHANNEL_BOTH
-};
-enum bmi160_int_types {
-    /*! Slope/Any-motion interrupt */
-    BMI160_ACC_ANY_MOTION_INT,
-
-    /*! Significant motion interrupt */
-    BMI160_ACC_SIG_MOTION_INT,
-
-    /*! Step detector interrupt */
-    BMI160_STEP_DETECT_INT,
-
-    /*! double tap interrupt */
-    BMI160_ACC_DOUBLE_TAP_INT,
-
-    /*! single tap interrupt */
-    BMI160_ACC_SINGLE_TAP_INT,
-
-    /*! orientation interrupt */
-    BMI160_ACC_ORIENT_INT,
-
-    /*! flat interrupt */
-    BMI160_ACC_FLAT_INT,
-
-    /*! high-g interrupt */
-    BMI160_ACC_HIGH_G_INT,
-
-    /*! low-g interrupt */
-    BMI160_ACC_LOW_G_INT,
-
-    /*! slow/no-motion interrupt */
-    BMI160_ACC_SLOW_NO_MOTION_INT,
-
-    /*! data ready interrupt  */
-    BMI160_ACC_GYRO_DATA_RDY_INT,
-
-    /*! fifo full interrupt */
-    BMI160_ACC_GYRO_FIFO_FULL_INT,
-
-    /*! fifo watermark interrupt */
-    BMI160_ACC_GYRO_FIFO_WATERMARK_INT,
-
-    /*! fifo tagging feature support */
-    BMI160_FIFO_TAG_INT_PIN
-};
-
-/*!
- * @brief bmi160 active state of any & sig motion interrupt.
- */
-enum bmi160_any_sig_motion_active_interrupt_state {
-    /*! Both any & sig motion are disabled */
-    BMI160_BOTH_ANY_SIG_MOTION_DISABLED = -1,
-
-    /*! Any-motion selected */
-    BMI160_ANY_MOTION_ENABLED,
-
-    /*! Sig-motion selected */
-    BMI160_SIG_MOTION_ENABLED
-};
-struct bmi160_acc_tap_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! tap threshold */
-    uint16_t tap_thr : 5;
-
-    /*! tap shock */
-    uint16_t tap_shock : 1;
-
-    /*! tap quiet */
-    uint16_t tap_quiet : 1;
-
-    /*! tap duration */
-    uint16_t tap_dur : 3;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint16_t tap_data_src : 1;
-
-    /*! tap enable, 1 - enable, 0 - disable */
-    uint16_t tap_en : 1;
-#else
-
-    /*! tap enable, 1 - enable, 0 - disable */
-    uint16_t tap_en : 1;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint16_t tap_data_src : 1;
-
-    /*! tap duration */
-    uint16_t tap_dur : 3;
-
-    /*! tap quiet */
-    uint16_t tap_quiet : 1;
-
-    /*! tap shock */
-    uint16_t tap_shock : 1;
-
-    /*! tap threshold */
-    uint16_t tap_thr : 5;
-#endif
-};
-struct bmi160_acc_any_mot_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! 1 any-motion enable, 0 - any-motion disable */
-    uint8_t anymotion_en : 1;
-
-    /*! slope interrupt x, 1 - enable, 0 - disable */
-    uint8_t anymotion_x : 1;
-
-    /*! slope interrupt y, 1 - enable, 0 - disable */
-    uint8_t anymotion_y : 1;
-
-    /*! slope interrupt z, 1 - enable, 0 - disable */
-    uint8_t anymotion_z : 1;
-
-    /*! slope duration */
-    uint8_t anymotion_dur : 2;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint8_t anymotion_data_src : 1;
-
-    /*! slope threshold */
-    uint8_t anymotion_thr;
-#else
-
-    /*! slope threshold */
-    uint8_t anymotion_thr;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint8_t anymotion_data_src : 1;
-
-    /*! slope duration */
-    uint8_t anymotion_dur : 2;
-
-    /*! slope interrupt z, 1 - enable, 0 - disable */
-    uint8_t anymotion_z : 1;
-
-    /*! slope interrupt y, 1 - enable, 0 - disable */
-    uint8_t anymotion_y : 1;
-
-    /*! slope interrupt x, 1 - enable, 0 - disable */
-    uint8_t anymotion_x : 1;
-
-    /*! 1 any-motion enable, 0 - any-motion disable */
-    uint8_t anymotion_en : 1;
-#endif
-};
-struct bmi160_acc_sig_mot_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! skip time of sig-motion interrupt */
-    uint8_t sig_mot_skip : 2;
-
-    /*! proof time of sig-motion interrupt */
-    uint8_t sig_mot_proof : 2;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint8_t sig_data_src : 1;
-
-    /*! 1 - enable sig, 0 - disable sig & enable anymotion */
-    uint8_t sig_en : 1;
-
-    /*! sig-motion threshold */
-    uint8_t sig_mot_thres;
-#else
-
-    /*! sig-motion threshold */
-    uint8_t sig_mot_thres;
-
-    /*! 1 - enable sig, 0 - disable sig & enable anymotion */
-    uint8_t sig_en : 1;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint8_t sig_data_src : 1;
-
-    /*! proof time of sig-motion interrupt */
-    uint8_t sig_mot_proof : 2;
-
-    /*! skip time of sig-motion interrupt */
-    uint8_t sig_mot_skip : 2;
-#endif
-};
-struct bmi160_acc_step_detect_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! 1- step detector enable, 0- step detector disable */
-    uint16_t step_detector_en : 1;
-
-    /*! minimum threshold */
-    uint16_t min_threshold : 2;
-
-    /*! minimal detectable step time */
-    uint16_t steptime_min : 3;
-
-    /*! enable step counter mode setting */
-    uint16_t step_detector_mode : 2;
-
-    /*! minimum step buffer size*/
-    uint16_t step_min_buf : 3;
-#else
-
-    /*! minimum step buffer size*/
-    uint16_t step_min_buf : 3;
-
-    /*! enable step counter mode setting */
-    uint16_t step_detector_mode : 2;
-
-    /*! minimal detectable step time */
-    uint16_t steptime_min : 3;
-
-    /*! minimum threshold */
-    uint16_t min_threshold : 2;
-
-    /*! 1- step detector enable, 0- step detector disable */
-    uint16_t step_detector_en : 1;
-#endif
-};
-struct bmi160_acc_no_motion_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! no motion interrupt x */
-    uint16_t no_motion_x : 1;
-
-    /*! no motion interrupt y */
-    uint16_t no_motion_y : 1;
-
-    /*! no motion interrupt z */
-    uint16_t no_motion_z : 1;
-
-    /*! no motion duration */
-    uint16_t no_motion_dur : 6;
-
-    /*! no motion sel , 1 - enable no-motion ,0- enable slow-motion */
-    uint16_t no_motion_sel : 1;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint16_t no_motion_src : 1;
-
-    /*! no motion threshold */
-    uint8_t no_motion_thres;
-#else
-
-    /*! no motion threshold */
-    uint8_t no_motion_thres;
-
-    /*! data source 0- filter & 1 pre-filter*/
-    uint16_t no_motion_src : 1;
-
-    /*! no motion sel , 1 - enable no-motion ,0- enable slow-motion */
-    uint16_t no_motion_sel : 1;
-
-    /*! no motion duration */
-    uint16_t no_motion_dur : 6;
-
-    /* no motion interrupt z */
-    uint16_t no_motion_z : 1;
-
-    /*! no motion interrupt y */
-    uint16_t no_motion_y : 1;
-
-    /*! no motion interrupt x */
-    uint16_t no_motion_x : 1;
-#endif
-};
-struct bmi160_acc_orient_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! thresholds for switching between the different orientations */
-    uint16_t orient_mode : 2;
-
-    /*! blocking_mode */
-    uint16_t orient_blocking : 2;
-
-    /*! Orientation interrupt hysteresis */
-    uint16_t orient_hyst : 4;
-
-    /*! Orientation interrupt theta */
-    uint16_t orient_theta : 6;
-
-    /*! Enable/disable Orientation interrupt */
-    uint16_t orient_ud_en : 1;
-
-    /*! exchange x- and z-axis in algorithm ,0 - z, 1 - x */
-    uint16_t axes_ex : 1;
-
-    /*! 1 - orient enable, 0 - orient disable */
-    uint8_t orient_en : 1;
-#else
-
-    /*! 1 - orient enable, 0 - orient disable */
-    uint8_t orient_en : 1;
-
-    /*! exchange x- and z-axis in algorithm ,0 - z, 1 - x */
-    uint16_t axes_ex : 1;
-
-    /*! Enable/disable Orientation interrupt */
-    uint16_t orient_ud_en : 1;
-
-    /*! Orientation interrupt theta */
-    uint16_t orient_theta : 6;
-
-    /*! Orientation interrupt hysteresis */
-    uint16_t orient_hyst : 4;
-
-    /*! blocking_mode */
-    uint16_t orient_blocking : 2;
-
-    /*! thresholds for switching between the different orientations */
-    uint16_t orient_mode : 2;
-#endif
-};
-struct bmi160_acc_flat_detect_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! flat threshold */
-    uint16_t flat_theta : 6;
-
-    /*! flat interrupt hysteresis */
-    uint16_t flat_hy : 3;
-
-    /*! delay time for which the flat value must remain stable for the
-     * flat interrupt to be generated */
-    uint16_t flat_hold_time : 2;
-
-    /*! 1 - flat enable, 0 - flat disable */
-    uint16_t flat_en : 1;
-#else
-
-    /*! 1 - flat enable, 0 - flat disable */
-    uint16_t flat_en : 1;
-
-    /*! delay time for which the flat value must remain stable for the
-     * flat interrupt to be generated */
-    uint16_t flat_hold_time : 2;
-
-    /*! flat interrupt hysteresis */
-    uint16_t flat_hy : 3;
-
-    /*! flat threshold */
-    uint16_t flat_theta : 6;
-#endif
-};
-struct bmi160_acc_low_g_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! low-g interrupt trigger delay */
-    uint8_t low_dur;
-
-    /*! low-g interrupt trigger threshold */
-    uint8_t low_thres;
-
-    /*! hysteresis of low-g interrupt */
-    uint8_t low_hyst : 2;
-
-    /*! 0 - single-axis mode ,1 - axis-summing mode */
-    uint8_t low_mode : 1;
-
-    /*! data source 0- filter & 1 pre-filter */
-    uint8_t low_data_src : 1;
-
-    /*! 1 - enable low-g, 0 - disable low-g */
-    uint8_t low_en : 1;
-#else
-
-    /*! 1 - enable low-g, 0 - disable low-g */
-    uint8_t low_en : 1;
-
-    /*! data source 0- filter & 1 pre-filter */
-    uint8_t low_data_src : 1;
-
-    /*! 0 - single-axis mode ,1 - axis-summing mode */
-    uint8_t low_mode : 1;
-
-    /*! hysteresis of low-g interrupt */
-    uint8_t low_hyst : 2;
-
-    /*! low-g interrupt trigger threshold */
-    uint8_t low_thres;
-
-    /*! low-g interrupt trigger delay */
-    uint8_t low_dur;
-#endif
-};
-struct bmi160_acc_high_g_int_cfg {
-#ifdef LITTLE_ENDIAN
-
-    /*! High-g interrupt x, 1 - enable, 0 - disable */
-    uint8_t high_g_x : 1;
-
-    /*! High-g interrupt y, 1 - enable, 0 - disable */
-    uint8_t high_g_y : 1;
-
-    /*! High-g interrupt z, 1 - enable, 0 - disable */
-    uint8_t high_g_z : 1;
-
-    /*! High-g hysteresis  */
-    uint8_t high_hy : 2;
-
-    /*! data source 0- filter & 1 pre-filter */
-    uint8_t high_data_src : 1;
-
-    /*! High-g threshold */
-    uint8_t high_thres;
-
-    /*! High-g duration */
-    uint8_t high_dur;
-#else
-
-    /*! High-g duration */
-    uint8_t high_dur;
-
-    /*! High-g threshold */
-    uint8_t high_thres;
-
-    /*! data source 0- filter & 1 pre-filter */
-    uint8_t high_data_src : 1;
-
-    /*! High-g hysteresis  */
-    uint8_t high_hy : 2;
-
-    /*! High-g interrupt z, 1 - enable, 0 - disable */
-    uint8_t high_g_z : 1;
-
-    /*! High-g interrupt y, 1 - enable, 0 - disable */
-    uint8_t high_g_y : 1;
-
-    /*! High-g interrupt x, 1 - enable, 0 - disable */
-    uint8_t high_g_x : 1;
-#endif
-};
-struct bmi160_int_pin_settg {
-#ifdef LITTLE_ENDIAN
-
-    /*! To enable either INT1 or INT2 pin as output.
-     * 0- output disabled ,1- output enabled */
-    uint16_t output_en : 1;
-
-    /*! 0 - push-pull 1- open drain,only valid if output_en is set 1 */
-    uint16_t output_mode : 1;
-
-    /*! 0 - active low , 1 - active high level.
-     * if output_en is 1,this applies to interrupts,else PMU_trigger */
-    uint16_t output_type : 1;
-
-    /*! 0 - level trigger , 1 - edge trigger  */
-    uint16_t edge_ctrl : 1;
-
-    /*! To enable either INT1 or INT2 pin as input.
-     * 0 - input disabled ,1 - input enabled */
-    uint16_t input_en : 1;
-
-    /*! latch duration*/
-    uint16_t latch_dur : 4;
-#else
-
-    /*! latch duration*/
-    uint16_t latch_dur : 4;
-
-    /*! Latched,non-latched or temporary interrupt modes */
-    uint16_t input_en : 1;
-
-    /*! 1 - edge trigger, 0 - level trigger */
-    uint16_t edge_ctrl : 1;
-
-    /*! 0 - active low , 1 - active high level.
-     * if output_en is 1,this applies to interrupts,else PMU_trigger */
-    uint16_t output_type : 1;
-
-    /*! 0 - push-pull , 1 - open drain,only valid if output_en is set 1 */
-    uint16_t output_mode : 1;
-
-    /*! To enable either INT1 or INT2 pin as output.
-     * 0 - output disabled , 1 - output enabled */
-    uint16_t output_en : 1;
-#endif
-};
-union bmi160_int_type_cfg {
-    /*! Tap interrupt structure */
-    struct bmi160_acc_tap_int_cfg acc_tap_int;
-
-    /*! Slope interrupt structure */
-    struct bmi160_acc_any_mot_int_cfg acc_any_motion_int;
-
-    /*! Significant motion interrupt structure */
-    struct bmi160_acc_sig_mot_int_cfg acc_sig_motion_int;
-
-    /*! Step detector interrupt structure */
-    struct bmi160_acc_step_detect_int_cfg acc_step_detect_int;
-
-    /*! No motion interrupt structure */
-    struct bmi160_acc_no_motion_int_cfg acc_no_motion_int;
-
-    /*! Orientation interrupt structure */
-    struct bmi160_acc_orient_int_cfg acc_orient_int;
-
-    /*! Flat interrupt structure */
-    struct bmi160_acc_flat_detect_int_cfg acc_flat_int;
-
-    /*! Low-g interrupt structure */
-    struct bmi160_acc_low_g_int_cfg acc_low_g_int;
-
-    /*! High-g interrupt structure */
-    struct bmi160_acc_high_g_int_cfg acc_high_g_int;
-};
-struct bmi160_int_settg {
-    /*! Interrupt channel */
-    enum bmi160_int_channel int_channel;
-
-    /*! Select Interrupt */
-    enum bmi160_int_types int_type;
-
-    /*! Structure configuring Interrupt pins */
-    struct bmi160_int_pin_settg int_pin_settg;
-
-    /*! Union configures required interrupt */
-    union bmi160_int_type_cfg int_type_cfg;
-
-    /*! FIFO FULL INT 1-enable, 0-disable */
-    uint8_t fifo_full_int_en : 1;
-
-    /*! FIFO WTM INT 1-enable, 0-disable */
-    uint8_t fifo_wtm_int_en : 1;
-};
-
-/*!
- *  @brief This structure holds the information for usage of
- *  FIFO by the user.
- */
-struct bmi160_fifo_frame {
-    /*! Data buffer of user defined length is to be mapped here */
-    uint8_t* data;
-
-    /*! While calling the API  "bmi160_get_fifo_data" , length stores
-     *  number of bytes in FIFO to be read (specified by user as input)
-     *  and after execution of the API ,number of FIFO data bytes
-     *  available is provided as an output to user
-     */
-    uint16_t length;
-
-    /*! FIFO time enable */
-    uint8_t fifo_time_enable;
-
-    /*! Enabling of the FIFO header to stream in header mode */
-    uint8_t fifo_header_enable;
-
-    /*! Streaming of the Accelerometer, Gyroscope
-     * sensor data or both in FIFO */
-    uint8_t fifo_data_enable;
-
-    /*! Will be equal to length when no more frames are there to parse */
-    uint16_t accel_byte_start_idx;
-
-    /*! Will be equal to length when no more frames are there to parse */
-    uint16_t gyro_byte_start_idx;
-
-    /*! Will be equal to length when no more frames are there to parse */
-    uint16_t aux_byte_start_idx;
-
-    /*! Value of FIFO sensor time time */
-    uint32_t sensor_time;
-
-    /*! Value of Skipped frame counts */
-    uint8_t skipped_frame_count;
-};
-struct bmi160_dev {
-    /*! Chip Id */
-    uint8_t chip_id;
-
-    /*! Device Id */
-    uint8_t id;
-
-    /*! 0 - I2C , 1 - SPI Interface */
-    uint8_t intf;
-
-    /*! Hold active interrupts status for any and sig motion
-     *  0 - Any-motion enable, 1 - Sig-motion enable,
-     *  -1 neither any-motion nor sig-motion selected */
-    enum bmi160_any_sig_motion_active_interrupt_state any_sig_sel;
-
-    /*! Structure to configure Accel sensor */
-    struct bmi160_cfg accel_cfg;
-
-    /*! Structure to hold previous/old accel config parameters.
-     * This is used at driver level to prevent overwriting of same
-     * data, hence user does not change it in the code */
-    struct bmi160_cfg prev_accel_cfg;
-
-    /*! Structure to configure Gyro sensor */
-    struct bmi160_cfg gyro_cfg;
-
-    /*! Structure to hold previous/old gyro config parameters.
-     * This is used at driver level to prevent overwriting of same
-     * data, hence user does not change it in the code */
-    struct bmi160_cfg prev_gyro_cfg;
-
-    /*! Structure to configure the auxiliary sensor */
-    struct bmi160_aux_cfg aux_cfg;
-
-    /*! Structure to hold previous/old aux config parameters.
-     * This is used at driver level to prevent overwriting of same
-     * data, hence user does not change it in the code */
-    struct bmi160_aux_cfg prev_aux_cfg;
-
-    /*! FIFO related configurations */
-    struct bmi160_fifo_frame* fifo;
-
-    /*! Read function pointer */
-    bmi160_read_fptr_t read;
-
-    /*! Write function pointer */
-    bmi160_write_fptr_t write;
-
-    /*!  Delay function pointer */
-    bmi160_delay_fptr_t delay_ms;
-
-    /*! User set read/write length */
-    uint16_t read_write_len;
-};
-
-#endif /* BMI160_DEFS_H_ */

tracking/imu/imu.c

@@ -1,29 +1,54 @@
 #include "imu.h"
-#include <furi_hal.h>
 
-bool bmi160_begin();
-int bmi160_read(double* vec);
+#define IMU_TAG "IMU_H"
 
-bool lsm6ds3trc_begin();
-void lsm6ds3trc_end();
-int lsm6ds3trc_read(double* vec);
+extern struct imu_t imu_bmi160;
+extern struct imu_t imu_lsm6ds3trc;
+extern struct imu_t imu_lsm6dso;
+
+struct imu_t* imu_types[] = {&imu_bmi160, &imu_lsm6ds3trc, &imu_lsm6dso};
+
+static const int imu_count = sizeof(imu_types) / sizeof(struct imu_t*);
+
+static struct imu_t* imu_found;
+
+struct imu_t* find_imu() {
+    unsigned int i;
+    for(i = 0; i < imu_count; i++) {
+        if(furi_hal_i2c_is_device_ready(&furi_hal_i2c_handle_external, imu_types[i]->address, 50)) {
+            FURI_LOG_E(IMU_TAG, "found i2c device address 0x%X", imu_types[i]->address);
+            return imu_types[i];
+        }
+    }
+    return NULL;
+}
 
 bool imu_begin() {
+    bool ret = false;
     furi_hal_i2c_acquire(&furi_hal_i2c_handle_external);
-    bool ret = bmi160_begin(); // lsm6ds3trc_begin();
+
+    if(imu_found == NULL) {
+        imu_found = find_imu();
+        if(imu_found != NULL) FURI_LOG_E(IMU_TAG, "Found Device %s", imu_found->name);
+    }
+
+    if(imu_found != NULL) ret = imu_found->begin();
+
     furi_hal_i2c_release(&furi_hal_i2c_handle_external);
     return ret;
 }
 
 void imu_end() {
-    // furi_hal_i2c_acquire(&furi_hal_i2c_handle_external);
-    // lsm6ds3trc_end();
-    // furi_hal_i2c_release(&furi_hal_i2c_handle_external);
+    if(imu_found == NULL) return;
+    furi_hal_i2c_acquire(&furi_hal_i2c_handle_external);
+    imu_found->end();
+    furi_hal_i2c_release(&furi_hal_i2c_handle_external);
 }
 
 int imu_read(double* vec) {
+    if(imu_found == NULL) return 0;
     furi_hal_i2c_acquire(&furi_hal_i2c_handle_external);
-    int ret = bmi160_read(vec); // lsm6ds3trc_read(vec);
+    int ret = imu_found->read(vec);
     furi_hal_i2c_release(&furi_hal_i2c_handle_external);
     return ret;
 }

tracking/imu/imu.h

@@ -1,14 +1,27 @@
-#pragma once
+#ifndef IMU_H
+#define IMU_H
 
 #include <stdbool.h>
+#include <furi_hal.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+struct imu_t {
+    unsigned int address;
+    bool (*begin)(void);
+    void (*end)(void);
+    int (*read)(double* vec);
+    char* name;
+};
+
 #define ACC_DATA_READY (1 << 0)
 #define GYR_DATA_READY (1 << 1)
 
+static const double DEG_TO_RAD = 0.017453292519943295769236907684886;
+static const double GRAVITY = 9.81;
+
 bool imu_begin();
 void imu_end();
 int imu_read(double* vec);
@@ -16,3 +29,4 @@ int imu_read(double* vec);
 #ifdef __cplusplus
 }
 #endif
+#endif // IMU_H

tracking/imu/imu_bmi160.c

@@ -1,88 +0,0 @@
-#include "bmi160.h"
-
-#include <furi_hal.h>
-
-#include "imu.h"
-
-#define TAG "BMI160"
-
-#define BMI160_DEV_ADDR (0x69 << 1)
-
-static const double DEG_TO_RAD = 0.017453292519943295769236907684886;
-static const double G = 9.81;
-
-struct bmi160_dev bmi160dev;
-struct bmi160_sensor_data bmi160_accel;
-struct bmi160_sensor_data bmi160_gyro;
-
-int8_t bmi160_write_i2c(uint8_t dev_addr, uint8_t reg_addr, uint8_t* data, uint16_t len) {
-    if(furi_hal_i2c_write_mem(&furi_hal_i2c_handle_external, dev_addr, reg_addr, data, len, 50))
-        return BMI160_OK;
-    return BMI160_E_COM_FAIL;
-}
-
-int8_t bmi160_read_i2c(uint8_t dev_addr, uint8_t reg_addr, uint8_t* read_data, uint16_t len) {
-    if(furi_hal_i2c_read_mem(&furi_hal_i2c_handle_external, dev_addr, reg_addr, read_data, len, 50))
-        return BMI160_OK;
-    return BMI160_E_COM_FAIL;
-}
-
-bool bmi160_begin() {
-    FURI_LOG_I(TAG, "Init BMI160");
-
-    if(!furi_hal_i2c_is_device_ready(&furi_hal_i2c_handle_external, BMI160_DEV_ADDR, 50)) {
-        FURI_LOG_E(TAG, "Device not ready!");
-        return false;
-    }
-
-    FURI_LOG_I(TAG, "Device ready!");
-
-    bmi160dev.id = BMI160_DEV_ADDR;
-    bmi160dev.intf = BMI160_I2C_INTF;
-    bmi160dev.read = bmi160_read_i2c;
-    bmi160dev.write = bmi160_write_i2c;
-    bmi160dev.delay_ms = furi_delay_ms;
-
-    if(bmi160_init(&bmi160dev) != BMI160_OK) {
-        FURI_LOG_E(TAG, "Initialization failure!");
-        FURI_LOG_E(TAG, "Chip ID 0x%X", bmi160dev.chip_id);
-        return false;
-    }
-
-    bmi160dev.accel_cfg.odr = BMI160_ACCEL_ODR_400HZ;
-    bmi160dev.accel_cfg.range = BMI160_ACCEL_RANGE_4G;
-    bmi160dev.accel_cfg.bw = BMI160_ACCEL_BW_NORMAL_AVG4;
-    bmi160dev.accel_cfg.power = BMI160_ACCEL_NORMAL_MODE;
-    bmi160dev.gyro_cfg.odr = BMI160_GYRO_ODR_400HZ;
-    bmi160dev.gyro_cfg.range = BMI160_GYRO_RANGE_2000_DPS;
-    bmi160dev.gyro_cfg.bw = BMI160_GYRO_BW_NORMAL_MODE;
-    bmi160dev.gyro_cfg.power = BMI160_GYRO_NORMAL_MODE;
-
-    if(bmi160_set_sens_conf(&bmi160dev) != BMI160_OK) {
-        FURI_LOG_E(TAG, "Initialization failure!");
-        FURI_LOG_E(TAG, "Chip ID 0x%X", bmi160dev.chip_id);
-        return false;
-    }
-
-    FURI_LOG_I(TAG, "Initialization success!");
-    FURI_LOG_I(TAG, "Chip ID 0x%X", bmi160dev.chip_id);
-
-    return true;
-}
-
-int bmi160_read(double* vec) {
-    if(bmi160_get_sensor_data(
-           (BMI160_ACCEL_SEL | BMI160_GYRO_SEL), &bmi160_accel, &bmi160_gyro, &bmi160dev) !=
-       BMI160_OK) {
-        return 0;
-    }
-
-    vec[0] = ((double)bmi160_accel.x * 4 / 32768) * G;
-    vec[1] = ((double)bmi160_accel.y * 4 / 32768) * G;
-    vec[2] = ((double)bmi160_accel.z * 4 / 32768) * G;
-    vec[3] = ((double)bmi160_gyro.x * 2000 / 32768) * DEG_TO_RAD;
-    vec[4] = ((double)bmi160_gyro.y * 2000 / 32768) * DEG_TO_RAD;
-    vec[5] = ((double)bmi160_gyro.z * 2000 / 32768) * DEG_TO_RAD;
-
-    return ACC_DATA_READY | GYR_DATA_READY;
-}

tracking/imu/lsm6ds3tr_c_reg.c

@@ -1,7105 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    lsm6ds3tr_c_reg.c
-  * @author  Sensors Software Solution Team
-  * @brief   LSM6DS3TR_C driver file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-#include "lsm6ds3tr_c_reg.h"
-
-/**
-  * @defgroup    LSM6DS3TR_C
-  * @brief       This file provides a set of functions needed to drive the
-  *              lsm6ds3tr_c enanced inertial module.
-  * @{
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_interfaces_functions
-  * @brief       This section provide a set of functions used to read and
-  *              write a generic register of the device.
-  *              MANDATORY: return 0 -> no Error.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Read generic device register
-  *
-  * @param  ctx   read / write interface definitions(ptr)
-  * @param  reg   register to read
-  * @param  data  pointer to buffer that store the data read(ptr)
-  * @param  len   number of consecutive register to read
-  * @retval       interface status (MANDATORY: return 0 -> no Error)
-  *
-  */
-int32_t lsm6ds3tr_c_read_reg(stmdev_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len) {
-    int32_t ret;
-
-    ret = ctx->read_reg(ctx->handle, reg, data, len);
-
-    return ret;
-}
-
-/**
-  * @brief  Write generic device register
-  *
-  * @param  ctx   read / write interface definitions(ptr)
-  * @param  reg   register to write
-  * @param  data  pointer to data to write in register reg(ptr)
-  * @param  len   number of consecutive register to write
-  * @retval       interface status (MANDATORY: return 0 -> no Error)
-  *
-  */
-int32_t lsm6ds3tr_c_write_reg(stmdev_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len) {
-    int32_t ret;
-
-    ret = ctx->write_reg(ctx->handle, reg, data, len);
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Sensitivity
-  * @brief       These functions convert raw-data into engineering units.
-  * @{
-  *
-  */
-
-float_t lsm6ds3tr_c_from_fs2g_to_mg(int16_t lsb) {
-    return ((float_t)lsb * 0.061f);
-}
-
-float_t lsm6ds3tr_c_from_fs4g_to_mg(int16_t lsb) {
-    return ((float_t)lsb * 0.122f);
-}
-
-float_t lsm6ds3tr_c_from_fs8g_to_mg(int16_t lsb) {
-    return ((float_t)lsb * 0.244f);
-}
-
-float_t lsm6ds3tr_c_from_fs16g_to_mg(int16_t lsb) {
-    return ((float_t)lsb * 0.488f);
-}
-
-float_t lsm6ds3tr_c_from_fs125dps_to_mdps(int16_t lsb) {
-    return ((float_t)lsb * 4.375f);
-}
-
-float_t lsm6ds3tr_c_from_fs250dps_to_mdps(int16_t lsb) {
-    return ((float_t)lsb * 8.750f);
-}
-
-float_t lsm6ds3tr_c_from_fs500dps_to_mdps(int16_t lsb) {
-    return ((float_t)lsb * 17.50f);
-}
-
-float_t lsm6ds3tr_c_from_fs1000dps_to_mdps(int16_t lsb) {
-    return ((float_t)lsb * 35.0f);
-}
-
-float_t lsm6ds3tr_c_from_fs2000dps_to_mdps(int16_t lsb) {
-    return ((float_t)lsb * 70.0f);
-}
-
-float_t lsm6ds3tr_c_from_lsb_to_celsius(int16_t lsb) {
-    return (((float_t)lsb / 256.0f) + 25.0f);
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_data_generation
-  * @brief       This section groups all the functions concerning data
-  *              generation
-  * @{
-  *
-  */
-
-/**
-  * @brief  Accelerometer full-scale selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fs_xl in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_full_scale_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_xl_t val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    if(ret == 0) {
-        ctrl1_xl.fs_xl = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer full-scale selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of fs_xl in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_full_scale_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_xl_t* val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    switch(ctrl1_xl.fs_xl) {
-    case LSM6DS3TR_C_2g:
-        *val = LSM6DS3TR_C_2g;
-        break;
-
-    case LSM6DS3TR_C_16g:
-        *val = LSM6DS3TR_C_16g;
-        break;
-
-    case LSM6DS3TR_C_4g:
-        *val = LSM6DS3TR_C_4g;
-        break;
-
-    case LSM6DS3TR_C_8g:
-        *val = LSM6DS3TR_C_8g;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_XL_FS_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer data rate selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of odr_xl in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_data_rate_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_xl_t val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    if(ret == 0) {
-        ctrl1_xl.odr_xl = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer data rate selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of odr_xl in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_data_rate_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_xl_t* val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    switch(ctrl1_xl.odr_xl) {
-    case LSM6DS3TR_C_XL_ODR_OFF:
-        *val = LSM6DS3TR_C_XL_ODR_OFF;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_12Hz5:
-        *val = LSM6DS3TR_C_XL_ODR_12Hz5;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_26Hz:
-        *val = LSM6DS3TR_C_XL_ODR_26Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_52Hz:
-        *val = LSM6DS3TR_C_XL_ODR_52Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_104Hz:
-        *val = LSM6DS3TR_C_XL_ODR_104Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_208Hz:
-        *val = LSM6DS3TR_C_XL_ODR_208Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_416Hz:
-        *val = LSM6DS3TR_C_XL_ODR_416Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_833Hz:
-        *val = LSM6DS3TR_C_XL_ODR_833Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_1k66Hz:
-        *val = LSM6DS3TR_C_XL_ODR_1k66Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_3k33Hz:
-        *val = LSM6DS3TR_C_XL_ODR_3k33Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_6k66Hz:
-        *val = LSM6DS3TR_C_XL_ODR_6k66Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ODR_1Hz6:
-        *val = LSM6DS3TR_C_XL_ODR_1Hz6;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_XL_ODR_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Gyroscope chain full-scale selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fs_g in reg CTRL2_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_full_scale_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_g_t val) {
-    lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G, (uint8_t*)&ctrl2_g, 1);
-
-    if(ret == 0) {
-        ctrl2_g.fs_g = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL2_G, (uint8_t*)&ctrl2_g, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Gyroscope chain full-scale selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of fs_g in reg CTRL2_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_full_scale_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_g_t* val) {
-    lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G, (uint8_t*)&ctrl2_g, 1);
-
-    switch(ctrl2_g.fs_g) {
-    case LSM6DS3TR_C_250dps:
-        *val = LSM6DS3TR_C_250dps;
-        break;
-
-    case LSM6DS3TR_C_125dps:
-        *val = LSM6DS3TR_C_125dps;
-        break;
-
-    case LSM6DS3TR_C_500dps:
-        *val = LSM6DS3TR_C_500dps;
-        break;
-
-    case LSM6DS3TR_C_1000dps:
-        *val = LSM6DS3TR_C_1000dps;
-        break;
-
-    case LSM6DS3TR_C_2000dps:
-        *val = LSM6DS3TR_C_2000dps;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_GY_FS_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Gyroscope data rate selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of odr_g in reg CTRL2_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_data_rate_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_g_t val) {
-    lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G, (uint8_t*)&ctrl2_g, 1);
-
-    if(ret == 0) {
-        ctrl2_g.odr_g = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL2_G, (uint8_t*)&ctrl2_g, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Gyroscope data rate selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of odr_g in reg CTRL2_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_data_rate_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_g_t* val) {
-    lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL2_G, (uint8_t*)&ctrl2_g, 1);
-
-    switch(ctrl2_g.odr_g) {
-    case LSM6DS3TR_C_GY_ODR_OFF:
-        *val = LSM6DS3TR_C_GY_ODR_OFF;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_12Hz5:
-        *val = LSM6DS3TR_C_GY_ODR_12Hz5;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_26Hz:
-        *val = LSM6DS3TR_C_GY_ODR_26Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_52Hz:
-        *val = LSM6DS3TR_C_GY_ODR_52Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_104Hz:
-        *val = LSM6DS3TR_C_GY_ODR_104Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_208Hz:
-        *val = LSM6DS3TR_C_GY_ODR_208Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_416Hz:
-        *val = LSM6DS3TR_C_GY_ODR_416Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_833Hz:
-        *val = LSM6DS3TR_C_GY_ODR_833Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_1k66Hz:
-        *val = LSM6DS3TR_C_GY_ODR_1k66Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_3k33Hz:
-        *val = LSM6DS3TR_C_GY_ODR_3k33Hz;
-        break;
-
-    case LSM6DS3TR_C_GY_ODR_6k66Hz:
-        *val = LSM6DS3TR_C_GY_ODR_6k66Hz;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_GY_ODR_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Block data update.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of bdu in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_block_data_update_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.bdu = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Block data update.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of bdu in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_block_data_update_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    *val = ctrl3_c.bdu;
-
-    return ret;
-}
-
-/**
-  * @brief  Weight of XL user offset bits of registers
-  *         X_OFS_USR(73h), Y_OFS_USR(74h), Z_OFS_USR(75h).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of usr_off_w in reg CTRL6_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_offset_weight_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_usr_off_w_t val) {
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    if(ret == 0) {
-        ctrl6_c.usr_off_w = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Weight of XL user offset bits of registers
-  *         X_OFS_USR(73h), Y_OFS_USR(74h), Z_OFS_USR(75h).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of usr_off_w in reg CTRL6_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_offset_weight_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_usr_off_w_t* val) {
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    switch(ctrl6_c.usr_off_w) {
-    case LSM6DS3TR_C_LSb_1mg:
-        *val = LSM6DS3TR_C_LSb_1mg;
-        break;
-
-    case LSM6DS3TR_C_LSb_16mg:
-        *val = LSM6DS3TR_C_LSb_16mg;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_WEIGHT_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  High-performance operating mode for accelerometer[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of xl_hm_mode in reg CTRL6_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_power_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_xl_hm_mode_t val) {
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    if(ret == 0) {
-        ctrl6_c.xl_hm_mode = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  High-performance operating mode for accelerometer.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of xl_hm_mode in reg CTRL6_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_power_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_xl_hm_mode_t* val) {
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    switch(ctrl6_c.xl_hm_mode) {
-    case LSM6DS3TR_C_XL_HIGH_PERFORMANCE:
-        *val = LSM6DS3TR_C_XL_HIGH_PERFORMANCE;
-        break;
-
-    case LSM6DS3TR_C_XL_NORMAL:
-        *val = LSM6DS3TR_C_XL_NORMAL;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_XL_PW_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Source register rounding function on WAKE_UP_SRC (1Bh),
-  *         TAP_SRC (1Ch), D6D_SRC (1Dh), STATUS_REG (1Eh) and
-  *         FUNC_SRC1 (53h) registers in the primary interface.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of rounding_status in reg CTRL7_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_rounding_on_status_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_status_t val) {
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-    if(ret == 0) {
-        ctrl7_g.rounding_status = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Source register rounding function on WAKE_UP_SRC (1Bh),
-  *         TAP_SRC (1Ch), D6D_SRC (1Dh), STATUS_REG (1Eh) and
-  *         FUNC_SRC1 (53h) registers in the primary interface.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of rounding_status in reg CTRL7_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_rounding_on_status_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_status_t* val) {
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-    switch(ctrl7_g.rounding_status) {
-    case LSM6DS3TR_C_STAT_RND_DISABLE:
-        *val = LSM6DS3TR_C_STAT_RND_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_STAT_RND_ENABLE:
-        *val = LSM6DS3TR_C_STAT_RND_ENABLE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_STAT_RND_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  High-performance operating mode disable for gyroscope.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of g_hm_mode in reg CTRL7_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_power_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_g_hm_mode_t val) {
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-    if(ret == 0) {
-        ctrl7_g.g_hm_mode = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  High-performance operating mode disable for gyroscope.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of g_hm_mode in reg CTRL7_G
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_power_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_g_hm_mode_t* val) {
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-    switch(ctrl7_g.g_hm_mode) {
-    case LSM6DS3TR_C_GY_HIGH_PERFORMANCE:
-        *val = LSM6DS3TR_C_GY_HIGH_PERFORMANCE;
-        break;
-
-    case LSM6DS3TR_C_GY_NORMAL:
-        *val = LSM6DS3TR_C_GY_NORMAL;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_GY_PW_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Read all the interrupt/status flag of the device.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    WAKE_UP_SRC, TAP_SRC, D6D_SRC, STATUS_REG,
-  *                FUNC_SRC1, FUNC_SRC2, WRIST_TILT_IA, A_WRIST_TILT_Mask
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_all_sources_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_all_sources_t* val) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_SRC, (uint8_t*)&(val->wake_up_src), 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_SRC, (uint8_t*)&(val->tap_src), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_D6D_SRC, (uint8_t*)&(val->d6d_src), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG, (uint8_t*)&(val->status_reg), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_SRC1, (uint8_t*)&(val->func_src1), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_SRC2, (uint8_t*)&(val->func_src2), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_WRIST_TILT_IA, (uint8_t*)&(val->wrist_tilt_ia), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_A_WRIST_TILT_MASK, (uint8_t*)&(val->a_wrist_tilt_mask), 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-    }
-
-    return ret;
-}
-/**
-  * @brief  The STATUS_REG register is read by the primary interface[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Registers STATUS_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_status_reg_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_status_reg_t* val) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG, (uint8_t*)val, 1);
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer new data available.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of xlda in reg STATUS_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_flag_data_ready_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_status_reg_t status_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG, (uint8_t*)&status_reg, 1);
-    *val = status_reg.xlda;
-
-    return ret;
-}
-
-/**
-  * @brief  Gyroscope new data available.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of gda in reg STATUS_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_flag_data_ready_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_status_reg_t status_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG, (uint8_t*)&status_reg, 1);
-    *val = status_reg.gda;
-
-    return ret;
-}
-
-/**
-  * @brief  Temperature new data available.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tda in reg STATUS_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_temp_flag_data_ready_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_status_reg_t status_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STATUS_REG, (uint8_t*)&status_reg, 1);
-    *val = status_reg.tda;
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer axis user offset correction expressed in two’s
-  *         complement, weight depends on USR_OFF_W in CTRL6_C.
-  *         The value must be in the range [-127 127].[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that contains data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_usr_offset_set(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_X_OFS_USR, buff, 3);
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer axis user offset correction xpressed in two’s
-  *         complement, weight depends on USR_OFF_W in CTRL6_C.
-  *         The value must be in the range [-127 127].[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_usr_offset_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_X_OFS_USR, buff, 3);
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Timestamp
-  * @brief       This section groups all the functions that manage the
-  *              timestamp generation.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enable timestamp count. The count is saved in TIMESTAMP0_REG (40h),
-  *         TIMESTAMP1_REG (41h) and TIMESTAMP2_REG (42h).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of timer_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_timestamp_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.timer_en = val;
-
-        if(val != 0x00U) {
-            ctrl10_c.func_en = val;
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable timestamp count. The count is saved in TIMESTAMP0_REG (40h),
-  *         TIMESTAMP1_REG (41h) and TIMESTAMP2_REG (42h).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of timer_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_timestamp_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    *val = ctrl10_c.timer_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Timestamp register resolution setting.
-  *         Configuration of this bit affects
-  *         TIMESTAMP0_REG(40h), TIMESTAMP1_REG(41h),
-  *         TIMESTAMP2_REG(42h), STEP_TIMESTAMP_L(49h),
-  *         STEP_TIMESTAMP_H(4Ah) and
-  *         STEP_COUNT_DELTA(15h) registers.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of timer_hr in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_timestamp_res_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_timer_hr_t val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-
-    if(ret == 0) {
-        wake_up_dur.timer_hr = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Timestamp register resolution setting.
-  *         Configuration of this bit affects
-  *         TIMESTAMP0_REG(40h), TIMESTAMP1_REG(41h),
-  *         TIMESTAMP2_REG(42h), STEP_TIMESTAMP_L(49h),
-  *         STEP_TIMESTAMP_H(4Ah) and
-  *         STEP_COUNT_DELTA(15h) registers.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of timer_hr in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_timestamp_res_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_timer_hr_t* val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-
-    switch(wake_up_dur.timer_hr) {
-    case LSM6DS3TR_C_LSB_6ms4:
-        *val = LSM6DS3TR_C_LSB_6ms4;
-        break;
-
-    case LSM6DS3TR_C_LSB_25us:
-        *val = LSM6DS3TR_C_LSB_25us;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_TS_RES_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Dataoutput
-  * @brief       This section groups all the data output functions.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Circular burst-mode (rounding) read from output registers
-  *         through the primary interface.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of rounding in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_rounding_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_t val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    if(ret == 0) {
-        ctrl5_c.rounding = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Circular burst-mode (rounding) read from output registers
-  *         through the primary interface.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of rounding in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_rounding_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_t* val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    switch(ctrl5_c.rounding) {
-    case LSM6DS3TR_C_ROUND_DISABLE:
-        *val = LSM6DS3TR_C_ROUND_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_ROUND_XL:
-        *val = LSM6DS3TR_C_ROUND_XL;
-        break;
-
-    case LSM6DS3TR_C_ROUND_GY:
-        *val = LSM6DS3TR_C_ROUND_GY;
-        break;
-
-    case LSM6DS3TR_C_ROUND_GY_XL:
-        *val = LSM6DS3TR_C_ROUND_GY_XL;
-        break;
-
-    case LSM6DS3TR_C_ROUND_SH1_TO_SH6:
-        *val = LSM6DS3TR_C_ROUND_SH1_TO_SH6;
-        break;
-
-    case LSM6DS3TR_C_ROUND_XL_SH1_TO_SH6:
-        *val = LSM6DS3TR_C_ROUND_XL_SH1_TO_SH6;
-        break;
-
-    case LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH12:
-        *val = LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH12;
-        break;
-
-    case LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH6:
-        *val = LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH6;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_ROUND_OUT_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Temperature data output register (r). L and H registers together
-  *         express a 16-bit word in two’s complement.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_temperature_raw_get(stmdev_ctx_t* ctx, int16_t* val) {
-    uint8_t buff[2];
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUT_TEMP_L, buff, 2);
-    *val = (int16_t)buff[1];
-    *val = (*val * 256) + (int16_t)buff[0];
-
-    return ret;
-}
-
-/**
-  * @brief  Angular rate sensor. The value is expressed as a 16-bit word in
-  *         two’s complement.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_angular_rate_raw_get(stmdev_ctx_t* ctx, int16_t* val) {
-    uint8_t buff[6];
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUTX_L_G, buff, 6);
-    val[0] = (int16_t)buff[1];
-    val[0] = (val[0] * 256) + (int16_t)buff[0];
-    val[1] = (int16_t)buff[3];
-    val[1] = (val[1] * 256) + (int16_t)buff[2];
-    val[2] = (int16_t)buff[5];
-    val[2] = (val[2] * 256) + (int16_t)buff[4];
-
-    return ret;
-}
-
-/**
-  * @brief  Linear acceleration output register. The value is expressed
-  *         as a 16-bit word in two’s complement.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_acceleration_raw_get(stmdev_ctx_t* ctx, int16_t* val) {
-    uint8_t buff[6];
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUTX_L_XL, buff, 6);
-    val[0] = (int16_t)buff[1];
-    val[0] = (val[0] * 256) + (int16_t)buff[0];
-    val[1] = (int16_t)buff[3];
-    val[1] = (val[1] * 256) + (int16_t)buff[2];
-    val[2] = (int16_t)buff[5];
-    val[2] = (val[2] * 256) + (int16_t)buff[4];
-
-    return ret;
-}
-
-/**
-  * @brief  External magnetometer raw data.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_calibrated_raw_get(stmdev_ctx_t* ctx, int16_t* val) {
-    uint8_t buff[6];
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_OUT_MAG_RAW_X_L, buff, 6);
-    val[0] = (int16_t)buff[1];
-    val[0] = (val[0] * 256) + (int16_t)buff[0];
-    val[1] = (int16_t)buff[3];
-    val[1] = (val[1] * 256) + (int16_t)buff[2];
-    val[2] = (int16_t)buff[5];
-    val[2] = (val[2] * 256) + (int16_t)buff[4];
-
-    return ret;
-}
-
-/**
-  * @brief  Read data in FIFO.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buffer Data buffer to store FIFO data.
-  * @param  len    Number of data to read from FIFO.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_raw_data_get(stmdev_ctx_t* ctx, uint8_t* buffer, uint8_t len) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_DATA_OUT_L, buffer, len);
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_common
-  * @brief       This section groups common useful functions.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enable access to the embedded functions/sensor hub
-  *         configuration registers[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of func_cfg_en in reg FUNC_CFG_ACCESS
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mem_bank_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_func_cfg_en_t val) {
-    lsm6ds3tr_c_func_cfg_access_t func_cfg_access;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_CFG_ACCESS, (uint8_t*)&func_cfg_access, 1);
-
-    if(ret == 0) {
-        func_cfg_access.func_cfg_en = (uint8_t)val;
-        ret =
-            lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FUNC_CFG_ACCESS, (uint8_t*)&func_cfg_access, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable access to the embedded functions/sensor hub configuration
-  *         registers[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of func_cfg_en in reg FUNC_CFG_ACCESS
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mem_bank_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_func_cfg_en_t* val) {
-    lsm6ds3tr_c_func_cfg_access_t func_cfg_access;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FUNC_CFG_ACCESS, (uint8_t*)&func_cfg_access, 1);
-
-    switch(func_cfg_access.func_cfg_en) {
-    case LSM6DS3TR_C_USER_BANK:
-        *val = LSM6DS3TR_C_USER_BANK;
-        break;
-
-    case LSM6DS3TR_C_BANK_B:
-        *val = LSM6DS3TR_C_BANK_B;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_BANK_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Data-ready pulsed / letched mode[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of drdy_pulsed in reg DRDY_PULSE_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_data_ready_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_drdy_pulsed_g_t val) {
-    lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G, (uint8_t*)&drdy_pulse_cfg_g, 1);
-
-    if(ret == 0) {
-        drdy_pulse_cfg_g.drdy_pulsed = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(
-            ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G, (uint8_t*)&drdy_pulse_cfg_g, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Data-ready pulsed / letched mode[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of drdy_pulsed in reg DRDY_PULSE_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_data_ready_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_drdy_pulsed_g_t* val) {
-    lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G, (uint8_t*)&drdy_pulse_cfg_g, 1);
-
-    switch(drdy_pulse_cfg_g.drdy_pulsed) {
-    case LSM6DS3TR_C_DRDY_LATCHED:
-        *val = LSM6DS3TR_C_DRDY_LATCHED;
-        break;
-
-    case LSM6DS3TR_C_DRDY_PULSED:
-        *val = LSM6DS3TR_C_DRDY_PULSED;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_DRDY_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DeviceWhoamI.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_device_id_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WHO_AM_I, buff, 1);
-
-    return ret;
-}
-
-/**
-  * @brief  Software reset. Restore the default values in user registers[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sw_reset in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_reset_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.sw_reset = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Software reset. Restore the default values in user registers[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sw_reset in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_reset_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    *val = ctrl3_c.sw_reset;
-
-    return ret;
-}
-
-/**
-  * @brief  Big/Little Endian Data selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of ble in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_data_format_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_ble_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.ble = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Big/Little Endian Data selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of ble in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_data_format_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_ble_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    switch(ctrl3_c.ble) {
-    case LSM6DS3TR_C_LSB_AT_LOW_ADD:
-        *val = LSM6DS3TR_C_LSB_AT_LOW_ADD;
-        break;
-
-    case LSM6DS3TR_C_MSB_AT_LOW_ADD:
-        *val = LSM6DS3TR_C_MSB_AT_LOW_ADD;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_DATA_FMT_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Register address automatically incremented during a multiple byte
-  *         access with a serial interface.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of if_inc in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_auto_increment_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.if_inc = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Register address automatically incremented during a multiple byte
-  *         access with a serial interface.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of if_inc in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_auto_increment_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    *val = ctrl3_c.if_inc;
-
-    return ret;
-}
-
-/**
-  * @brief  Reboot memory content. Reload the calibration parameters.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of boot in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_boot_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.boot = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Reboot memory content. Reload the calibration parameters.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of boot in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_boot_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    *val = ctrl3_c.boot;
-
-    return ret;
-}
-
-/**
-  * @brief  Linear acceleration sensor self-test enable.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of st_xl in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_self_test_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_xl_t val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    if(ret == 0) {
-        ctrl5_c.st_xl = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Linear acceleration sensor self-test enable.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of st_xl in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_self_test_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_xl_t* val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    switch(ctrl5_c.st_xl) {
-    case LSM6DS3TR_C_XL_ST_DISABLE:
-        *val = LSM6DS3TR_C_XL_ST_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_XL_ST_POSITIVE:
-        *val = LSM6DS3TR_C_XL_ST_POSITIVE;
-        break;
-
-    case LSM6DS3TR_C_XL_ST_NEGATIVE:
-        *val = LSM6DS3TR_C_XL_ST_NEGATIVE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_XL_ST_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Angular rate sensor self-test enable.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of st_g in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_self_test_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_g_t val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    if(ret == 0) {
-        ctrl5_c.st_g = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Angular rate sensor self-test enable.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of st_g in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_self_test_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_g_t* val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    switch(ctrl5_c.st_g) {
-    case LSM6DS3TR_C_GY_ST_DISABLE:
-        *val = LSM6DS3TR_C_GY_ST_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_GY_ST_POSITIVE:
-        *val = LSM6DS3TR_C_GY_ST_POSITIVE;
-        break;
-
-    case LSM6DS3TR_C_GY_ST_NEGATIVE:
-        *val = LSM6DS3TR_C_GY_ST_NEGATIVE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_GY_ST_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_filters
-  * @brief       This section group all the functions concerning the filters
-  *              configuration that impact both accelerometer and gyro.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Mask DRDY on pin (both XL & Gyro) until filter settling ends
-  *         (XL and Gyro independently masked).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of drdy_mask in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_filter_settling_mask_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-    if(ret == 0) {
-        ctrl4_c.drdy_mask = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Mask DRDY on pin (both XL & Gyro) until filter settling ends
-  *         (XL and Gyro independently masked).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of drdy_mask in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_filter_settling_mask_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    *val = ctrl4_c.drdy_mask;
-
-    return ret;
-}
-
-/**
-  * @brief  HPF or SLOPE filter selection on wake-up and Activity/Inactivity
-  *         functions.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of slope_fds in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_hp_path_internal_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slope_fds_t val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    if(ret == 0) {
-        tap_cfg.slope_fds = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  HPF or SLOPE filter selection on wake-up and Activity/Inactivity
-  *         functions.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of slope_fds in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_hp_path_internal_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slope_fds_t* val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    switch(tap_cfg.slope_fds) {
-    case LSM6DS3TR_C_USE_SLOPE:
-        *val = LSM6DS3TR_C_USE_SLOPE;
-        break;
-
-    case LSM6DS3TR_C_USE_HPF:
-        *val = LSM6DS3TR_C_USE_HPF;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_HP_PATH_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_accelerometer_filters
-  * @brief       This section group all the functions concerning the filters
-  *              configuration that impact accelerometer in every mode.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Accelerometer analog chain bandwidth selection (only for
-  *         accelerometer ODR ≥ 1.67 kHz).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of bw0_xl in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_filter_analog_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_bw0_xl_t val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    if(ret == 0) {
-        ctrl1_xl.bw0_xl = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer analog chain bandwidth selection (only for
-  *         accelerometer ODR ≥ 1.67 kHz).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of bw0_xl in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_filter_analog_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_bw0_xl_t* val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    switch(ctrl1_xl.bw0_xl) {
-    case LSM6DS3TR_C_XL_ANA_BW_1k5Hz:
-        *val = LSM6DS3TR_C_XL_ANA_BW_1k5Hz;
-        break;
-
-    case LSM6DS3TR_C_XL_ANA_BW_400Hz:
-        *val = LSM6DS3TR_C_XL_ANA_BW_400Hz;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_XL_ANA_BW_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_accelerometer_filters
-  * @brief       This section group all the functions concerning the filters
-  *              configuration that impact accelerometer.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Accelerometer digital LPF (LPF1) bandwidth selection LPF2 is
-  *         not used.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of lpf1_bw_sel in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_lp1_bandwidth_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_bw_sel_t val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-    if(ret == 0) {
-        ctrl1_xl.lpf1_bw_sel = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-            if(ret == 0) {
-                ctrl8_xl.lpf2_xl_en = 0;
-                ctrl8_xl.hp_slope_xl_en = 0;
-                ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Accelerometer digital LPF (LPF1) bandwidth selection LPF2
-  *         is not used.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of lpf1_bw_sel in reg CTRL1_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_lp1_bandwidth_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_bw_sel_t* val) {
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ret == 0) {
-        if((ctrl8_xl.lpf2_xl_en != 0x00U) || (ctrl8_xl.hp_slope_xl_en != 0x00U)) {
-            *val = LSM6DS3TR_C_XL_LP1_NA;
-        }
-
-        else {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL1_XL, (uint8_t*)&ctrl1_xl, 1);
-
-            switch(ctrl1_xl.lpf1_bw_sel) {
-            case LSM6DS3TR_C_XL_LP1_ODR_DIV_2:
-                *val = LSM6DS3TR_C_XL_LP1_ODR_DIV_2;
-                break;
-
-            case LSM6DS3TR_C_XL_LP1_ODR_DIV_4:
-                *val = LSM6DS3TR_C_XL_LP1_ODR_DIV_4;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_XL_LP1_NA;
-                break;
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  LPF2 on outputs[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of input_composite in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_lp2_bandwidth_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_input_composite_t val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ret == 0) {
-        ctrl8_xl.input_composite = ((uint8_t)val & 0x10U) >> 4;
-        ctrl8_xl.hpcf_xl = (uint8_t)val & 0x03U;
-        ctrl8_xl.lpf2_xl_en = 1;
-        ctrl8_xl.hp_slope_xl_en = 0;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  LPF2 on outputs[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of input_composite in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_lp2_bandwidth_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_input_composite_t* val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ret == 0) {
-        if((ctrl8_xl.lpf2_xl_en == 0x00U) || (ctrl8_xl.hp_slope_xl_en != 0x00U)) {
-            *val = LSM6DS3TR_C_XL_LP_NA;
-        }
-
-        else {
-            switch((ctrl8_xl.input_composite << 4) + ctrl8_xl.hpcf_xl) {
-            case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_50:
-                *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_50;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_100:
-                *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_100;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_9:
-                *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_9;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_400:
-                *val = LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_400;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_50:
-                *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_50;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_100:
-                *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_100;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_9:
-                *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_9;
-                break;
-
-            case LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_400:
-                *val = LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_400;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_XL_LP_NA;
-                break;
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable HP filter reference mode.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of hp_ref_mode in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_reference_mode_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ret == 0) {
-        ctrl8_xl.hp_ref_mode = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable HP filter reference mode.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of hp_ref_mode in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_reference_mode_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-    *val = ctrl8_xl.hp_ref_mode;
-
-    return ret;
-}
-
-/**
-  * @brief  High pass/Slope on outputs.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of hpcf_xl in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_hp_bandwidth_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_hpcf_xl_t val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ret == 0) {
-        ctrl8_xl.input_composite = 0;
-        ctrl8_xl.hpcf_xl = (uint8_t)val & 0x03U;
-        ctrl8_xl.hp_slope_xl_en = 1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  High pass/Slope on outputs.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of hpcf_xl in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_xl_hp_bandwidth_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_hpcf_xl_t* val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ctrl8_xl.hp_slope_xl_en == 0x00U) {
-        *val = LSM6DS3TR_C_XL_HP_NA;
-    }
-
-    switch(ctrl8_xl.hpcf_xl) {
-    case LSM6DS3TR_C_XL_HP_ODR_DIV_4:
-        *val = LSM6DS3TR_C_XL_HP_ODR_DIV_4;
-        break;
-
-    case LSM6DS3TR_C_XL_HP_ODR_DIV_100:
-        *val = LSM6DS3TR_C_XL_HP_ODR_DIV_100;
-        break;
-
-    case LSM6DS3TR_C_XL_HP_ODR_DIV_9:
-        *val = LSM6DS3TR_C_XL_HP_ODR_DIV_9;
-        break;
-
-    case LSM6DS3TR_C_XL_HP_ODR_DIV_400:
-        *val = LSM6DS3TR_C_XL_HP_ODR_DIV_400;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_XL_HP_NA;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_gyroscope_filters
-  * @brief       This section group all the functions concerning the filters
-  *              configuration that impact gyroscope.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Gyroscope low pass path bandwidth.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    gyroscope filtering chain configuration.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_band_pass_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_sel_g_t val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-    if(ret == 0) {
-        ctrl7_g.hpm_g = ((uint8_t)val & 0x30U) >> 4;
-        ctrl7_g.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-            if(ret == 0) {
-                ctrl6_c.ftype = (uint8_t)val & 0x03U;
-                ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-                if(ret == 0) {
-                    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-                    if(ret == 0) {
-                        ctrl4_c.lpf1_sel_g = ((uint8_t)val & 0x08U) >> 3;
-                        ret =
-                            lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-                    }
-                }
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Gyroscope low pass path bandwidth.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    gyroscope filtering chain
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_band_pass_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_sel_g_t* val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL7_G, (uint8_t*)&ctrl7_g, 1);
-
-            switch((ctrl7_g.hp_en_g << 7) + (ctrl7_g.hpm_g << 4) + (ctrl4_c.lpf1_sel_g << 3) +
-                   ctrl6_c.ftype) {
-            case LSM6DS3TR_C_HP_16mHz_LP2:
-                *val = LSM6DS3TR_C_HP_16mHz_LP2;
-                break;
-
-            case LSM6DS3TR_C_HP_65mHz_LP2:
-                *val = LSM6DS3TR_C_HP_65mHz_LP2;
-                break;
-
-            case LSM6DS3TR_C_HP_260mHz_LP2:
-                *val = LSM6DS3TR_C_HP_260mHz_LP2;
-                break;
-
-            case LSM6DS3TR_C_HP_1Hz04_LP2:
-                *val = LSM6DS3TR_C_HP_1Hz04_LP2;
-                break;
-
-            case LSM6DS3TR_C_HP_DISABLE_LP1_LIGHT:
-                *val = LSM6DS3TR_C_HP_DISABLE_LP1_LIGHT;
-                break;
-
-            case LSM6DS3TR_C_HP_DISABLE_LP1_NORMAL:
-                *val = LSM6DS3TR_C_HP_DISABLE_LP1_NORMAL;
-                break;
-
-            case LSM6DS3TR_C_HP_DISABLE_LP_STRONG:
-                *val = LSM6DS3TR_C_HP_DISABLE_LP_STRONG;
-                break;
-
-            case LSM6DS3TR_C_HP_DISABLE_LP1_AGGRESSIVE:
-                *val = LSM6DS3TR_C_HP_DISABLE_LP1_AGGRESSIVE;
-                break;
-
-            case LSM6DS3TR_C_HP_16mHz_LP1_LIGHT:
-                *val = LSM6DS3TR_C_HP_16mHz_LP1_LIGHT;
-                break;
-
-            case LSM6DS3TR_C_HP_65mHz_LP1_NORMAL:
-                *val = LSM6DS3TR_C_HP_65mHz_LP1_NORMAL;
-                break;
-
-            case LSM6DS3TR_C_HP_260mHz_LP1_STRONG:
-                *val = LSM6DS3TR_C_HP_260mHz_LP1_STRONG;
-                break;
-
-            case LSM6DS3TR_C_HP_1Hz04_LP1_AGGRESSIVE:
-                *val = LSM6DS3TR_C_HP_1Hz04_LP1_AGGRESSIVE;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_HP_GY_BAND_NA;
-                break;
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_serial_interface
-  * @brief       This section groups all the functions concerning serial
-  *              interface management
-  * @{
-  *
-  */
-
-/**
-  * @brief  SPI Serial Interface Mode selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sim in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_spi_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_sim_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.sim = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  SPI Serial Interface Mode selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of sim in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_spi_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_sim_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    switch(ctrl3_c.sim) {
-    case LSM6DS3TR_C_SPI_4_WIRE:
-        *val = LSM6DS3TR_C_SPI_4_WIRE;
-        break;
-
-    case LSM6DS3TR_C_SPI_3_WIRE:
-        *val = LSM6DS3TR_C_SPI_3_WIRE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_SPI_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Disable / Enable I2C interface.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of i2c_disable in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_i2c_interface_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_i2c_disable_t val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-    if(ret == 0) {
-        ctrl4_c.i2c_disable = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Disable / Enable I2C interface.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of i2c_disable in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_i2c_interface_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_i2c_disable_t* val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-    switch(ctrl4_c.i2c_disable) {
-    case LSM6DS3TR_C_I2C_ENABLE:
-        *val = LSM6DS3TR_C_I2C_ENABLE;
-        break;
-
-    case LSM6DS3TR_C_I2C_DISABLE:
-        *val = LSM6DS3TR_C_I2C_DISABLE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_I2C_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_interrupt_pins
-  * @brief       This section groups all the functions that manage
-  *              interrupt pins
-  * @{
-  *
-  */
-
-/**
-  * @brief  Select the signal that need to route on int1 pad[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    configure INT1_CTRL, MD1_CFG, CTRL4_C(den_drdy_int1),
-  *                MASTER_CONFIG(drdy_on_int1)
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_int1_route_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_int1_route_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    lsm6ds3tr_c_int1_ctrl_t int1_ctrl;
-    lsm6ds3tr_c_md1_cfg_t md1_cfg;
-    lsm6ds3tr_c_md2_cfg_t md2_cfg;
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT1_CTRL, (uint8_t*)&int1_ctrl, 1);
-
-    if(ret == 0) {
-        int1_ctrl.int1_drdy_xl = val.int1_drdy_xl;
-        int1_ctrl.int1_drdy_g = val.int1_drdy_g;
-        int1_ctrl.int1_boot = val.int1_boot;
-        int1_ctrl.int1_fth = val.int1_fth;
-        int1_ctrl.int1_fifo_ovr = val.int1_fifo_ovr;
-        int1_ctrl.int1_full_flag = val.int1_full_flag;
-        int1_ctrl.int1_sign_mot = val.int1_sign_mot;
-        int1_ctrl.int1_step_detector = val.int1_step_detector;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT1_CTRL, (uint8_t*)&int1_ctrl, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD1_CFG, (uint8_t*)&md1_cfg, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD2_CFG, (uint8_t*)&md2_cfg, 1);
-    }
-
-    if(ret == 0) {
-        md1_cfg.int1_timer = val.int1_timer;
-        md1_cfg.int1_tilt = val.int1_tilt;
-        md1_cfg.int1_6d = val.int1_6d;
-        md1_cfg.int1_double_tap = val.int1_double_tap;
-        md1_cfg.int1_ff = val.int1_ff;
-        md1_cfg.int1_wu = val.int1_wu;
-        md1_cfg.int1_single_tap = val.int1_single_tap;
-        md1_cfg.int1_inact_state = val.int1_inact_state;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MD1_CFG, (uint8_t*)&md1_cfg, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    }
-
-    if(ret == 0) {
-        ctrl4_c.den_drdy_int1 = val.den_drdy_int1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    if(ret == 0) {
-        master_config.drdy_on_int1 = val.den_drdy_int1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-        if((val.int1_6d != 0x00U) || (val.int1_ff != 0x00U) || (val.int1_wu != 0x00U) ||
-           (val.int1_single_tap != 0x00U) || (val.int1_double_tap != 0x00U) ||
-           (val.int1_inact_state != 0x00U) || (md2_cfg.int2_6d != 0x00U) ||
-           (md2_cfg.int2_ff != 0x00U) || (md2_cfg.int2_wu != 0x00U) ||
-           (md2_cfg.int2_single_tap != 0x00U) || (md2_cfg.int2_double_tap != 0x00U) ||
-           (md2_cfg.int2_inact_state != 0x00U)) {
-            tap_cfg.interrupts_enable = PROPERTY_ENABLE;
-        }
-
-        else {
-            tap_cfg.interrupts_enable = PROPERTY_DISABLE;
-        }
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Select the signal that need to route on int1 pad[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    read INT1_CTRL, MD1_CFG, CTRL4_C(den_drdy_int1),
-  *                MASTER_CONFIG(drdy_on_int1)
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_int1_route_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_int1_route_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    lsm6ds3tr_c_int1_ctrl_t int1_ctrl;
-    lsm6ds3tr_c_md1_cfg_t md1_cfg;
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT1_CTRL, (uint8_t*)&int1_ctrl, 1);
-
-    if(ret == 0) {
-        val->int1_drdy_xl = int1_ctrl.int1_drdy_xl;
-        val->int1_drdy_g = int1_ctrl.int1_drdy_g;
-        val->int1_boot = int1_ctrl.int1_boot;
-        val->int1_fth = int1_ctrl.int1_fth;
-        val->int1_fifo_ovr = int1_ctrl.int1_fifo_ovr;
-        val->int1_full_flag = int1_ctrl.int1_full_flag;
-        val->int1_sign_mot = int1_ctrl.int1_sign_mot;
-        val->int1_step_detector = int1_ctrl.int1_step_detector;
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD1_CFG, (uint8_t*)&md1_cfg, 1);
-
-        if(ret == 0) {
-            val->int1_timer = md1_cfg.int1_timer;
-            val->int1_tilt = md1_cfg.int1_tilt;
-            val->int1_6d = md1_cfg.int1_6d;
-            val->int1_double_tap = md1_cfg.int1_double_tap;
-            val->int1_ff = md1_cfg.int1_ff;
-            val->int1_wu = md1_cfg.int1_wu;
-            val->int1_single_tap = md1_cfg.int1_single_tap;
-            val->int1_inact_state = md1_cfg.int1_inact_state;
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-            if(ret == 0) {
-                val->den_drdy_int1 = ctrl4_c.den_drdy_int1;
-                ret = lsm6ds3tr_c_read_reg(
-                    ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-                val->den_drdy_int1 = master_config.drdy_on_int1;
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Select the signal that need to route on int2 pad[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    INT2_CTRL, DRDY_PULSE_CFG(int2_wrist_tilt), MD2_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_int2_route_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_int2_route_t val) {
-    lsm6ds3tr_c_int2_ctrl_t int2_ctrl;
-    lsm6ds3tr_c_md1_cfg_t md1_cfg;
-    lsm6ds3tr_c_md2_cfg_t md2_cfg;
-    lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT2_CTRL, (uint8_t*)&int2_ctrl, 1);
-
-    if(ret == 0) {
-        int2_ctrl.int2_drdy_xl = val.int2_drdy_xl;
-        int2_ctrl.int2_drdy_g = val.int2_drdy_g;
-        int2_ctrl.int2_drdy_temp = val.int2_drdy_temp;
-        int2_ctrl.int2_fth = val.int2_fth;
-        int2_ctrl.int2_fifo_ovr = val.int2_fifo_ovr;
-        int2_ctrl.int2_full_flag = val.int2_full_flag;
-        int2_ctrl.int2_step_count_ov = val.int2_step_count_ov;
-        int2_ctrl.int2_step_delta = val.int2_step_delta;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT2_CTRL, (uint8_t*)&int2_ctrl, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD1_CFG, (uint8_t*)&md1_cfg, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD2_CFG, (uint8_t*)&md2_cfg, 1);
-    }
-
-    if(ret == 0) {
-        md2_cfg.int2_iron = val.int2_iron;
-        md2_cfg.int2_tilt = val.int2_tilt;
-        md2_cfg.int2_6d = val.int2_6d;
-        md2_cfg.int2_double_tap = val.int2_double_tap;
-        md2_cfg.int2_ff = val.int2_ff;
-        md2_cfg.int2_wu = val.int2_wu;
-        md2_cfg.int2_single_tap = val.int2_single_tap;
-        md2_cfg.int2_inact_state = val.int2_inact_state;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MD2_CFG, (uint8_t*)&md2_cfg, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G, (uint8_t*)&drdy_pulse_cfg_g, 1);
-    }
-
-    if(ret == 0) {
-        drdy_pulse_cfg_g.int2_wrist_tilt = val.int2_wrist_tilt;
-        ret = lsm6ds3tr_c_write_reg(
-            ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G, (uint8_t*)&drdy_pulse_cfg_g, 1);
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-        if((md1_cfg.int1_6d != 0x00U) || (md1_cfg.int1_ff != 0x00U) ||
-           (md1_cfg.int1_wu != 0x00U) || (md1_cfg.int1_single_tap != 0x00U) ||
-           (md1_cfg.int1_double_tap != 0x00U) || (md1_cfg.int1_inact_state != 0x00U) ||
-           (val.int2_6d != 0x00U) || (val.int2_ff != 0x00U) || (val.int2_wu != 0x00U) ||
-           (val.int2_single_tap != 0x00U) || (val.int2_double_tap != 0x00U) ||
-           (val.int2_inact_state != 0x00U)) {
-            tap_cfg.interrupts_enable = PROPERTY_ENABLE;
-        }
-
-        else {
-            tap_cfg.interrupts_enable = PROPERTY_DISABLE;
-        }
-    }
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Select the signal that need to route on int2 pad[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    INT2_CTRL, DRDY_PULSE_CFG(int2_wrist_tilt), MD2_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_int2_route_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_int2_route_t* val) {
-    lsm6ds3tr_c_int2_ctrl_t int2_ctrl;
-    lsm6ds3tr_c_md2_cfg_t md2_cfg;
-    lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT2_CTRL, (uint8_t*)&int2_ctrl, 1);
-
-    if(ret == 0) {
-        val->int2_drdy_xl = int2_ctrl.int2_drdy_xl;
-        val->int2_drdy_g = int2_ctrl.int2_drdy_g;
-        val->int2_drdy_temp = int2_ctrl.int2_drdy_temp;
-        val->int2_fth = int2_ctrl.int2_fth;
-        val->int2_fifo_ovr = int2_ctrl.int2_fifo_ovr;
-        val->int2_full_flag = int2_ctrl.int2_full_flag;
-        val->int2_step_count_ov = int2_ctrl.int2_step_count_ov;
-        val->int2_step_delta = int2_ctrl.int2_step_delta;
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MD2_CFG, (uint8_t*)&md2_cfg, 1);
-
-        if(ret == 0) {
-            val->int2_iron = md2_cfg.int2_iron;
-            val->int2_tilt = md2_cfg.int2_tilt;
-            val->int2_6d = md2_cfg.int2_6d;
-            val->int2_double_tap = md2_cfg.int2_double_tap;
-            val->int2_ff = md2_cfg.int2_ff;
-            val->int2_wu = md2_cfg.int2_wu;
-            val->int2_single_tap = md2_cfg.int2_single_tap;
-            val->int2_inact_state = md2_cfg.int2_inact_state;
-            ret = lsm6ds3tr_c_read_reg(
-                ctx, LSM6DS3TR_C_DRDY_PULSE_CFG_G, (uint8_t*)&drdy_pulse_cfg_g, 1);
-            val->int2_wrist_tilt = drdy_pulse_cfg_g.int2_wrist_tilt;
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Push-pull/open drain selection on interrupt pads.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pp_od in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_pp_od_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.pp_od = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Push-pull/open drain selection on interrupt pads.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of pp_od in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_pp_od_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    switch(ctrl3_c.pp_od) {
-    case LSM6DS3TR_C_PUSH_PULL:
-        *val = LSM6DS3TR_C_PUSH_PULL;
-        break;
-
-    case LSM6DS3TR_C_OPEN_DRAIN:
-        *val = LSM6DS3TR_C_OPEN_DRAIN;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_PIN_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Interrupt active-high/low.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of h_lactive in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_polarity_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_h_lactive_t val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    if(ret == 0) {
-        ctrl3_c.h_lactive = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Interrupt active-high/low.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of h_lactive in reg CTRL3_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pin_polarity_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_h_lactive_t* val) {
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
-
-    switch(ctrl3_c.h_lactive) {
-    case LSM6DS3TR_C_ACTIVE_HIGH:
-        *val = LSM6DS3TR_C_ACTIVE_HIGH;
-        break;
-
-    case LSM6DS3TR_C_ACTIVE_LOW:
-        *val = LSM6DS3TR_C_ACTIVE_LOW;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_POLARITY_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  All interrupt signals become available on INT1 pin.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of int2_on_int1 in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_all_on_int1_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-    if(ret == 0) {
-        ctrl4_c.int2_on_int1 = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  All interrupt signals become available on INT1 pin.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of int2_on_int1 in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_all_on_int1_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    *val = ctrl4_c.int2_on_int1;
-
-    return ret;
-}
-
-/**
-  * @brief  Latched/pulsed interrupt.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of lir in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_int_notification_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_lir_t val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    if(ret == 0) {
-        tap_cfg.lir = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Latched/pulsed interrupt.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of lir in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_int_notification_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_lir_t* val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    switch(tap_cfg.lir) {
-    case LSM6DS3TR_C_INT_PULSED:
-        *val = LSM6DS3TR_C_INT_PULSED;
-        break;
-
-    case LSM6DS3TR_C_INT_LATCHED:
-        *val = LSM6DS3TR_C_INT_LATCHED;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_INT_MODE;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Wake_Up_event
-  * @brief       This section groups all the functions that manage the
-  *              Wake Up event generation.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Threshold for wakeup.1 LSB = FS_XL / 64.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of wk_ths in reg WAKE_UP_THS
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_wkup_threshold_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS, (uint8_t*)&wake_up_ths, 1);
-
-    if(ret == 0) {
-        wake_up_ths.wk_ths = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS, (uint8_t*)&wake_up_ths, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Threshold for wakeup.1 LSB = FS_XL / 64.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of wk_ths in reg WAKE_UP_THS
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_wkup_threshold_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS, (uint8_t*)&wake_up_ths, 1);
-    *val = wake_up_ths.wk_ths;
-
-    return ret;
-}
-
-/**
-  * @brief  Wake up duration event.1LSb = 1 / ODR[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of wake_dur in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_wkup_dur_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-
-    if(ret == 0) {
-        wake_up_dur.wake_dur = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Wake up duration event.1LSb = 1 / ODR[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of wake_dur in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_wkup_dur_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-    *val = wake_up_dur.wake_dur;
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Activity/Inactivity_detection
-  * @brief       This section groups all the functions concerning
-  *              activity/inactivity detection.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enables gyroscope Sleep mode.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sleep in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_sleep_mode_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-    if(ret == 0) {
-        ctrl4_c.sleep = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enables gyroscope Sleep mode.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sleep in reg CTRL4_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_gy_sleep_mode_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-    *val = ctrl4_c.sleep;
-
-    return ret;
-}
-
-/**
-  * @brief  Enable inactivity function.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of inact_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_act_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_inact_en_t val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    if(ret == 0) {
-        tap_cfg.inact_en = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable inactivity function.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of inact_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_act_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_inact_en_t* val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    switch(tap_cfg.inact_en) {
-    case LSM6DS3TR_C_PROPERTY_DISABLE:
-        *val = LSM6DS3TR_C_PROPERTY_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_XL_12Hz5_GY_NOT_AFFECTED:
-        *val = LSM6DS3TR_C_XL_12Hz5_GY_NOT_AFFECTED;
-        break;
-
-    case LSM6DS3TR_C_XL_12Hz5_GY_SLEEP:
-        *val = LSM6DS3TR_C_XL_12Hz5_GY_SLEEP;
-        break;
-
-    case LSM6DS3TR_C_XL_12Hz5_GY_PD:
-        *val = LSM6DS3TR_C_XL_12Hz5_GY_PD;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_ACT_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Duration to go in sleep mode.1 LSb = 512 / ODR[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sleep_dur in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_act_sleep_dur_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-
-    if(ret == 0) {
-        wake_up_dur.sleep_dur = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Duration to go in sleep mode. 1 LSb = 512 / ODR[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sleep_dur in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_act_sleep_dur_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-    *val = wake_up_dur.sleep_dur;
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_tap_generator
-  * @brief       This section groups all the functions that manage the
-  *              tap and double tap event generation.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Read the tap / double tap source register.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure of registers from TAP_SRC
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_src_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_tap_src_t* val) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_SRC, (uint8_t*)val, 1);
-
-    return ret;
-}
-
-/**
-  * @brief  Enable Z direction in tap recognition.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_z_en in reg TAP_CFG
-  *
-  */
-int32_t lsm6ds3tr_c_tap_detection_on_z_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    if(ret == 0) {
-        tap_cfg.tap_z_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable Z direction in tap recognition.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_z_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_detection_on_z_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    *val = tap_cfg.tap_z_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Enable Y direction in tap recognition.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_y_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_detection_on_y_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    if(ret == 0) {
-        tap_cfg.tap_y_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable Y direction in tap recognition.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_y_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_detection_on_y_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    *val = tap_cfg.tap_y_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Enable X direction in tap recognition.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_x_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_detection_on_x_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-
-    if(ret == 0) {
-        tap_cfg.tap_x_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable X direction in tap recognition.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_x_en in reg TAP_CFG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_detection_on_x_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_CFG, (uint8_t*)&tap_cfg, 1);
-    *val = tap_cfg.tap_x_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Threshold for tap recognition.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_ths in reg TAP_THS_6D
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_threshold_x_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-
-    if(ret == 0) {
-        tap_ths_6d.tap_ths = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Threshold for tap recognition.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tap_ths in reg TAP_THS_6D
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_threshold_x_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-    *val = tap_ths_6d.tap_ths;
-
-    return ret;
-}
-
-/**
-  * @brief  Maximum duration is the maximum time of an overthreshold signal
-  *         detection to be recognized as a tap event.
-  *         The default value of these bits is 00b which corresponds to
-  *         4*ODR_XL time.
-  *         If the SHOCK[1:0] bits are set to a different
-  *         value, 1LSB corresponds to 8*ODR_XL time.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of shock in reg INT_DUR2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_shock_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-
-    if(ret == 0) {
-        int_dur2.shock = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Maximum duration is the maximum time of an overthreshold signal
-  *         detection to be recognized as a tap event.
-  *         The default value of these bits is 00b which corresponds to
-  *         4*ODR_XL time.
-  *         If the SHOCK[1:0] bits are set to a different value, 1LSB
-  *         corresponds to 8*ODR_XL time.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of shock in reg INT_DUR2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_shock_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-    *val = int_dur2.shock;
-
-    return ret;
-}
-
-/**
-  * @brief  Quiet time is the time after the first detected tap in which there
-  *         must not be any overthreshold event.
-  *         The default value of these bits is 00b which corresponds to
-  *         2*ODR_XL time.
-  *         If the QUIET[1:0] bits are set to a different value, 1LSB
-  *         corresponds to 4*ODR_XL time.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of quiet in reg INT_DUR2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_quiet_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-
-    if(ret == 0) {
-        int_dur2.quiet = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Quiet time is the time after the first detected tap in which there
-  *         must not be any overthreshold event.
-  *         The default value of these bits is 00b which corresponds to
-  *         2*ODR_XL time.
-  *         If the QUIET[1:0] bits are set to a different value, 1LSB
-  *         corresponds to 4*ODR_XL time.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of quiet in reg INT_DUR2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_quiet_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-    *val = int_dur2.quiet;
-
-    return ret;
-}
-
-/**
-  * @brief  When double tap recognition is enabled, this register expresses the
-  *         maximum time between two consecutive detected taps to determine a
-  *         double tap event.
-  *         The default value of these bits is 0000b which corresponds to
-  *         16*ODR_XL time.
-  *         If the DUR[3:0] bits are set to a different value,1LSB corresponds
-  *         to 32*ODR_XL time.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of dur in reg INT_DUR2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_dur_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-
-    if(ret == 0) {
-        int_dur2.dur = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  When double tap recognition is enabled, this register expresses the
-  *         maximum time between two consecutive detected taps to determine a
-  *         double tap event.
-  *         The default value of these bits is 0000b which corresponds to
-  *         16*ODR_XL time.
-  *         If the DUR[3:0] bits are set to a different value,1LSB corresponds
-  *         to 32*ODR_XL time.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of dur in reg INT_DUR2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_dur_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_INT_DUR2, (uint8_t*)&int_dur2, 1);
-    *val = int_dur2.dur;
-
-    return ret;
-}
-
-/**
-  * @brief  Single/double-tap event enable/disable.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of
-  *                                      single_double_tap in reg WAKE_UP_THS
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_single_double_tap_t val) {
-    lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS, (uint8_t*)&wake_up_ths, 1);
-
-    if(ret == 0) {
-        wake_up_ths.single_double_tap = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS, (uint8_t*)&wake_up_ths, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Single/double-tap event enable/disable.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of single_double_tap
-  *                                      in reg WAKE_UP_THS
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tap_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_single_double_tap_t* val) {
-    lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_THS, (uint8_t*)&wake_up_ths, 1);
-
-    switch(wake_up_ths.single_double_tap) {
-    case LSM6DS3TR_C_ONLY_SINGLE:
-        *val = LSM6DS3TR_C_ONLY_SINGLE;
-        break;
-
-    case LSM6DS3TR_C_BOTH_SINGLE_DOUBLE:
-        *val = LSM6DS3TR_C_BOTH_SINGLE_DOUBLE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_TAP_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_ Six_position_detection(6D/4D)
-  * @brief       This section groups all the functions concerning six
-  *              position detection (6D).
-  * @{
-  *
-  */
-
-/**
-  * @brief  LPF2 feed 6D function selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of low_pass_on_6d in
-  *                                   reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_6d_feed_data_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_low_pass_on_6d_t val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    if(ret == 0) {
-        ctrl8_xl.low_pass_on_6d = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  LPF2 feed 6D function selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of low_pass_on_6d in reg CTRL8_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_6d_feed_data_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_low_pass_on_6d_t* val) {
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL8_XL, (uint8_t*)&ctrl8_xl, 1);
-
-    switch(ctrl8_xl.low_pass_on_6d) {
-    case LSM6DS3TR_C_ODR_DIV_2_FEED:
-        *val = LSM6DS3TR_C_ODR_DIV_2_FEED;
-        break;
-
-    case LSM6DS3TR_C_LPF2_FEED:
-        *val = LSM6DS3TR_C_LPF2_FEED;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_6D_FEED_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Threshold for 4D/6D function.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sixd_ths in reg TAP_THS_6D
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_6d_threshold_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_sixd_ths_t val) {
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-
-    if(ret == 0) {
-        tap_ths_6d.sixd_ths = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Threshold for 4D/6D function.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of sixd_ths in reg TAP_THS_6D
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_6d_threshold_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_sixd_ths_t* val) {
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-
-    switch(tap_ths_6d.sixd_ths) {
-    case LSM6DS3TR_C_DEG_80:
-        *val = LSM6DS3TR_C_DEG_80;
-        break;
-
-    case LSM6DS3TR_C_DEG_70:
-        *val = LSM6DS3TR_C_DEG_70;
-        break;
-
-    case LSM6DS3TR_C_DEG_60:
-        *val = LSM6DS3TR_C_DEG_60;
-        break;
-
-    case LSM6DS3TR_C_DEG_50:
-        *val = LSM6DS3TR_C_DEG_50;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_6D_TH_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  4D orientation detection enable.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of d4d_en in reg TAP_THS_6D
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_4d_mode_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-
-    if(ret == 0) {
-        tap_ths_6d.d4d_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  4D orientation detection enable.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of d4d_en in reg TAP_THS_6D
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_4d_mode_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_TAP_THS_6D, (uint8_t*)&tap_ths_6d, 1);
-    *val = tap_ths_6d.d4d_en;
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_free_fall
-  * @brief       This section group all the functions concerning the free
-  *              fall detection.
-  * @{
-  *
-  */
-
-/**
-  * @brief Free-fall duration event. 1LSb = 1 / ODR[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of ff_dur in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_ff_dur_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    lsm6ds3tr_c_free_fall_t free_fall;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL, (uint8_t*)&free_fall, 1);
-
-    if(ret == 0) {
-        free_fall.ff_dur = (val & 0x1FU);
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FREE_FALL, (uint8_t*)&free_fall, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-
-            if(ret == 0) {
-                wake_up_dur.ff_dur = (val & 0x20U) >> 5;
-                ret =
-                    lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Free-fall duration event. 1LSb = 1 / ODR[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of ff_dur in reg WAKE_UP_DUR
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_ff_dur_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    lsm6ds3tr_c_free_fall_t free_fall;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL, (uint8_t*)&free_fall, 1);
-    }
-
-    *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
-
-    return ret;
-}
-
-/**
-  * @brief  Free fall threshold setting.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of ff_ths in reg FREE_FALL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_ff_threshold_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_ff_ths_t val) {
-    lsm6ds3tr_c_free_fall_t free_fall;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL, (uint8_t*)&free_fall, 1);
-
-    if(ret == 0) {
-        free_fall.ff_ths = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FREE_FALL, (uint8_t*)&free_fall, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Free fall threshold setting.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of ff_ths in reg FREE_FALL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_ff_threshold_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_ff_ths_t* val) {
-    lsm6ds3tr_c_free_fall_t free_fall;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FREE_FALL, (uint8_t*)&free_fall, 1);
-
-    switch(free_fall.ff_ths) {
-    case LSM6DS3TR_C_FF_TSH_156mg:
-        *val = LSM6DS3TR_C_FF_TSH_156mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_219mg:
-        *val = LSM6DS3TR_C_FF_TSH_219mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_250mg:
-        *val = LSM6DS3TR_C_FF_TSH_250mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_312mg:
-        *val = LSM6DS3TR_C_FF_TSH_312mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_344mg:
-        *val = LSM6DS3TR_C_FF_TSH_344mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_406mg:
-        *val = LSM6DS3TR_C_FF_TSH_406mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_469mg:
-        *val = LSM6DS3TR_C_FF_TSH_469mg;
-        break;
-
-    case LSM6DS3TR_C_FF_TSH_500mg:
-        *val = LSM6DS3TR_C_FF_TSH_500mg;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FF_TSH_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_fifo
-  * @brief       This section group all the functions concerning the
-  *              fifo usage
-  * @{
-  *
-  */
-
-/**
-  * @brief  FIFO watermark level selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fth in reg FIFO_CTRL1
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_watermark_set(stmdev_ctx_t* ctx, uint16_t val) {
-    lsm6ds3tr_c_fifo_ctrl1_t fifo_ctrl1;
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-
-    if(ret == 0) {
-        fifo_ctrl1.fth = (uint8_t)(0x00FFU & val);
-        fifo_ctrl2.fth = (uint8_t)((0x0700U & val) >> 8);
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL1, (uint8_t*)&fifo_ctrl1, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO watermark level selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fth in reg FIFO_CTRL1
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_watermark_get(stmdev_ctx_t* ctx, uint16_t* val) {
-    lsm6ds3tr_c_fifo_ctrl1_t fifo_ctrl1;
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL1, (uint8_t*)&fifo_ctrl1, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-    }
-
-    *val = ((uint16_t)fifo_ctrl2.fth << 8) + (uint16_t)fifo_ctrl1.fth;
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO data level.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    get the values of diff_fifo in reg  FIFO_STATUS1 and
-  *                FIFO_STATUS2(diff_fifo), it is recommended to set the
-  *                BDU bit.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_data_level_get(stmdev_ctx_t* ctx, uint16_t* val) {
-    lsm6ds3tr_c_fifo_status1_t fifo_status1;
-    lsm6ds3tr_c_fifo_status2_t fifo_status2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS1, (uint8_t*)&fifo_status1, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS2, (uint8_t*)&fifo_status2, 1);
-        *val = ((uint16_t)fifo_status2.diff_fifo << 8) + (uint16_t)fifo_status1.diff_fifo;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO watermark.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    get the values of watermark in reg  FIFO_STATUS2 and
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_wtm_flag_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_fifo_status2_t fifo_status2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS2, (uint8_t*)&fifo_status2, 1);
-    *val = fifo_status2.waterm;
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO pattern.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    get the values of fifo_pattern in reg  FIFO_STATUS3 and
-  *                FIFO_STATUS4, it is recommended to set the BDU bit
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_pattern_get(stmdev_ctx_t* ctx, uint16_t* val) {
-    lsm6ds3tr_c_fifo_status3_t fifo_status3;
-    lsm6ds3tr_c_fifo_status4_t fifo_status4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS3, (uint8_t*)&fifo_status3, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_STATUS4, (uint8_t*)&fifo_status4, 1);
-        *val = ((uint16_t)fifo_status4.fifo_pattern << 8) + fifo_status3.fifo_pattern;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Batching of temperature data[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fifo_temp_en in reg FIFO_CTRL2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_temp_batch_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-
-    if(ret == 0) {
-        fifo_ctrl2.fifo_temp_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Batching of temperature data[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fifo_temp_en in reg FIFO_CTRL2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_temp_batch_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-    *val = fifo_ctrl2.fifo_temp_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Trigger signal for FIFO write operation.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    act on FIFO_CTRL2(timer_pedo_fifo_drdy)
-  *                and MASTER_CONFIG(data_valid_sel_fifo)
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_write_trigger_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_trigger_fifo_t val) {
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-
-    if(ret == 0) {
-        fifo_ctrl2.timer_pedo_fifo_drdy = (uint8_t)val & 0x01U;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-
-        if(ret == 0) {
-            ret =
-                lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-            if(ret == 0) {
-                master_config.data_valid_sel_fifo = (((uint8_t)val & 0x02U) >> 1);
-                ret = lsm6ds3tr_c_write_reg(
-                    ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Trigger signal for FIFO write operation.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    act on FIFO_CTRL2(timer_pedo_fifo_drdy)
-  *                and MASTER_CONFIG(data_valid_sel_fifo)
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_write_trigger_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_trigger_fifo_t* val) {
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-        switch((fifo_ctrl2.timer_pedo_fifo_drdy << 1) + fifo_ctrl2.timer_pedo_fifo_drdy) {
-        case LSM6DS3TR_C_TRG_XL_GY_DRDY:
-            *val = LSM6DS3TR_C_TRG_XL_GY_DRDY;
-            break;
-
-        case LSM6DS3TR_C_TRG_STEP_DETECT:
-            *val = LSM6DS3TR_C_TRG_STEP_DETECT;
-            break;
-
-        case LSM6DS3TR_C_TRG_SH_DRDY:
-            *val = LSM6DS3TR_C_TRG_SH_DRDY;
-            break;
-
-        default:
-            *val = LSM6DS3TR_C_TRG_SH_ND;
-            break;
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   Enable pedometer step counter and timestamp as 4th
-  *          FIFO data set.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of timer_pedo_fifo_en in reg FIFO_CTRL2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-
-    if(ret == 0) {
-        fifo_ctrl2.timer_pedo_fifo_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable pedometer step counter and timestamp as 4th
-  *         FIFO data set.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of timer_pedo_fifo_en in reg FIFO_CTRL2
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
-    *val = fifo_ctrl2.timer_pedo_fifo_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Selects Batching Data Rate (writing frequency in FIFO) for
-  *         accelerometer data.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of dec_fifo_xl in reg FIFO_CTRL3
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_xl_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_xl_t val) {
-    lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3, (uint8_t*)&fifo_ctrl3, 1);
-
-    if(ret == 0) {
-        fifo_ctrl3.dec_fifo_xl = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3, (uint8_t*)&fifo_ctrl3, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Selects Batching Data Rate (writing frequency in FIFO) for
-  *         accelerometer data.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of dec_fifo_xl in reg FIFO_CTRL3
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_xl_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_xl_t* val) {
-    lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3, (uint8_t*)&fifo_ctrl3, 1);
-
-    switch(fifo_ctrl3.dec_fifo_xl) {
-    case LSM6DS3TR_C_FIFO_XL_DISABLE:
-        *val = LSM6DS3TR_C_FIFO_XL_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_NO_DEC:
-        *val = LSM6DS3TR_C_FIFO_XL_NO_DEC;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_DEC_2:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_2;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_DEC_3:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_3;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_DEC_4:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_4;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_DEC_8:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_8;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_DEC_16:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_16;
-        break;
-
-    case LSM6DS3TR_C_FIFO_XL_DEC_32:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_32;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FIFO_XL_DEC_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
-  *         for gyroscope data.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of dec_fifo_gyro in reg FIFO_CTRL3
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_gy_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_gyro_t val) {
-    lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3, (uint8_t*)&fifo_ctrl3, 1);
-
-    if(ret == 0) {
-        fifo_ctrl3.dec_fifo_gyro = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3, (uint8_t*)&fifo_ctrl3, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Selects Batching Data Rate (writing frequency in FIFO)
-  *         for gyroscope data.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of dec_fifo_gyro in reg FIFO_CTRL3
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_gy_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_gyro_t* val) {
-    lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL3, (uint8_t*)&fifo_ctrl3, 1);
-
-    switch(fifo_ctrl3.dec_fifo_gyro) {
-    case LSM6DS3TR_C_FIFO_GY_DISABLE:
-        *val = LSM6DS3TR_C_FIFO_GY_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_NO_DEC:
-        *val = LSM6DS3TR_C_FIFO_GY_NO_DEC;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_DEC_2:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_2;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_DEC_3:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_3;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_DEC_4:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_4;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_DEC_8:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_8;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_DEC_16:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_16;
-        break;
-
-    case LSM6DS3TR_C_FIFO_GY_DEC_32:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_32;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FIFO_GY_DEC_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   Selects Batching Data Rate (writing frequency in FIFO)
-  *          for third data set.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of dec_ds3_fifo in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_dataset_3_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds3_fifo_t val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-
-    if(ret == 0) {
-        fifo_ctrl4.dec_ds3_fifo = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   Selects Batching Data Rate (writing frequency in FIFO)
-  *          for third data set.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of dec_ds3_fifo in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_dataset_3_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds3_fifo_t* val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-
-    switch(fifo_ctrl4.dec_ds3_fifo) {
-    case LSM6DS3TR_C_FIFO_DS3_DISABLE:
-        *val = LSM6DS3TR_C_FIFO_DS3_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_NO_DEC:
-        *val = LSM6DS3TR_C_FIFO_DS3_NO_DEC;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_DEC_2:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_2;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_DEC_3:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_3;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_DEC_4:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_4;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_DEC_8:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_8;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_DEC_16:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_16;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS3_DEC_32:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_32;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FIFO_DS3_DEC_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   Selects Batching Data Rate (writing frequency in FIFO)
-  *          for fourth data set.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of dec_ds4_fifo in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_dataset_4_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds4_fifo_t val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-
-    if(ret == 0) {
-        fifo_ctrl4.dec_ds4_fifo = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   Selects Batching Data Rate (writing frequency in FIFO) for
-  *          fourth data set.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of dec_ds4_fifo in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_dataset_4_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds4_fifo_t* val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-
-    switch(fifo_ctrl4.dec_ds4_fifo) {
-    case LSM6DS3TR_C_FIFO_DS4_DISABLE:
-        *val = LSM6DS3TR_C_FIFO_DS4_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_NO_DEC:
-        *val = LSM6DS3TR_C_FIFO_DS4_NO_DEC;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_DEC_2:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_2;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_DEC_3:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_3;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_DEC_4:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_4;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_DEC_8:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_8;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_DEC_16:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_16;
-        break;
-
-    case LSM6DS3TR_C_FIFO_DS4_DEC_32:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_32;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FIFO_DS4_DEC_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   8-bit data storage in FIFO.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of only_high_data in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-
-    if(ret == 0) {
-        fifo_ctrl4.only_high_data = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  8-bit data storage in FIFO.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of only_high_data in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-    *val = fifo_ctrl4.only_high_data;
-
-    return ret;
-}
-
-/**
-  * @brief  Sensing chain FIFO stop values memorization at threshold
-  *         level.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of stop_on_fth in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_stop_on_wtm_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-
-    if(ret == 0) {
-        fifo_ctrl4.stop_on_fth = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensing chain FIFO stop values memorization at threshold
-  *         level.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of stop_on_fth in reg FIFO_CTRL4
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_stop_on_wtm_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL4, (uint8_t*)&fifo_ctrl4, 1);
-    *val = fifo_ctrl4.stop_on_fth;
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO mode selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of fifo_mode in reg FIFO_CTRL5
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_fifo_mode_t val) {
-    lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5, (uint8_t*)&fifo_ctrl5, 1);
-
-    if(ret == 0) {
-        fifo_ctrl5.fifo_mode = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5, (uint8_t*)&fifo_ctrl5, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO mode selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of fifo_mode in reg FIFO_CTRL5
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_fifo_mode_t* val) {
-    lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5, (uint8_t*)&fifo_ctrl5, 1);
-
-    switch(fifo_ctrl5.fifo_mode) {
-    case LSM6DS3TR_C_BYPASS_MODE:
-        *val = LSM6DS3TR_C_BYPASS_MODE;
-        break;
-
-    case LSM6DS3TR_C_FIFO_MODE:
-        *val = LSM6DS3TR_C_FIFO_MODE;
-        break;
-
-    case LSM6DS3TR_C_STREAM_TO_FIFO_MODE:
-        *val = LSM6DS3TR_C_STREAM_TO_FIFO_MODE;
-        break;
-
-    case LSM6DS3TR_C_BYPASS_TO_STREAM_MODE:
-        *val = LSM6DS3TR_C_BYPASS_TO_STREAM_MODE;
-        break;
-
-    case LSM6DS3TR_C_STREAM_MODE:
-        *val = LSM6DS3TR_C_STREAM_MODE;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FIFO_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO ODR selection, setting FIFO_MODE also.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of odr_fifo in reg FIFO_CTRL5
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_data_rate_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_fifo_t val) {
-    lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5, (uint8_t*)&fifo_ctrl5, 1);
-
-    if(ret == 0) {
-        fifo_ctrl5.odr_fifo = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5, (uint8_t*)&fifo_ctrl5, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  FIFO ODR selection, setting FIFO_MODE also.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of odr_fifo in reg FIFO_CTRL5
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_fifo_data_rate_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_fifo_t* val) {
-    lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_FIFO_CTRL5, (uint8_t*)&fifo_ctrl5, 1);
-
-    switch(fifo_ctrl5.odr_fifo) {
-    case LSM6DS3TR_C_FIFO_DISABLE:
-        *val = LSM6DS3TR_C_FIFO_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_FIFO_12Hz5:
-        *val = LSM6DS3TR_C_FIFO_12Hz5;
-        break;
-
-    case LSM6DS3TR_C_FIFO_26Hz:
-        *val = LSM6DS3TR_C_FIFO_26Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_52Hz:
-        *val = LSM6DS3TR_C_FIFO_52Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_104Hz:
-        *val = LSM6DS3TR_C_FIFO_104Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_208Hz:
-        *val = LSM6DS3TR_C_FIFO_208Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_416Hz:
-        *val = LSM6DS3TR_C_FIFO_416Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_833Hz:
-        *val = LSM6DS3TR_C_FIFO_833Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_1k66Hz:
-        *val = LSM6DS3TR_C_FIFO_1k66Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_3k33Hz:
-        *val = LSM6DS3TR_C_FIFO_3k33Hz;
-        break;
-
-    case LSM6DS3TR_C_FIFO_6k66Hz:
-        *val = LSM6DS3TR_C_FIFO_6k66Hz;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_FIFO_RATE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_DEN_functionality
-  * @brief       This section groups all the functions concerning DEN
-  *              functionality.
-  * @{
-  *
-  */
-
-/**
-  * @brief  DEN active level configuration.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_lh in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_polarity_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_lh_t val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    if(ret == 0) {
-        ctrl5_c.den_lh = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN active level configuration.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of den_lh in reg CTRL5_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_polarity_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_lh_t* val) {
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
-
-    switch(ctrl5_c.den_lh) {
-    case LSM6DS3TR_C_DEN_ACT_LOW:
-        *val = LSM6DS3TR_C_DEN_ACT_LOW;
-        break;
-
-    case LSM6DS3TR_C_DEN_ACT_HIGH:
-        *val = LSM6DS3TR_C_DEN_ACT_HIGH;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_DEN_POL_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN functionality marking mode[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_mode in reg CTRL6_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_mode_t val) {
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    if(ret == 0) {
-        ctrl6_c.den_mode = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN functionality marking mode[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_mode in reg CTRL6_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_mode_t* val) {
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL6_C, (uint8_t*)&ctrl6_c, 1);
-
-    switch(ctrl6_c.den_mode) {
-    case LSM6DS3TR_C_DEN_DISABLE:
-        *val = LSM6DS3TR_C_DEN_DISABLE;
-        break;
-
-    case LSM6DS3TR_C_LEVEL_LETCHED:
-        *val = LSM6DS3TR_C_LEVEL_LETCHED;
-        break;
-
-    case LSM6DS3TR_C_LEVEL_TRIGGER:
-        *val = LSM6DS3TR_C_LEVEL_TRIGGER;
-        break;
-
-    case LSM6DS3TR_C_EDGE_TRIGGER:
-        *val = LSM6DS3TR_C_EDGE_TRIGGER;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_DEN_MODE_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Extend DEN functionality to accelerometer sensor.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_xl_g in reg CTRL9_XL
-  *                             and den_xl_en in CTRL4_C.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_enable_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_xl_en_t val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-    if(ret == 0) {
-        ctrl9_xl.den_xl_g = (uint8_t)val & 0x01U;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-            if(ret == 0) {
-                ctrl4_c.den_xl_en = (uint8_t)val & 0x02U;
-                ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Extend DEN functionality to accelerometer sensor. [get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of den_xl_g in reg CTRL9_XL
-  *                             and den_xl_en in CTRL4_C.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_enable_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_xl_en_t* val) {
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-        switch((ctrl4_c.den_xl_en << 1) + ctrl9_xl.den_xl_g) {
-        case LSM6DS3TR_C_STAMP_IN_GY_DATA:
-            *val = LSM6DS3TR_C_STAMP_IN_GY_DATA;
-            break;
-
-        case LSM6DS3TR_C_STAMP_IN_XL_DATA:
-            *val = LSM6DS3TR_C_STAMP_IN_XL_DATA;
-            break;
-
-        case LSM6DS3TR_C_STAMP_IN_GY_XL_DATA:
-            *val = LSM6DS3TR_C_STAMP_IN_GY_XL_DATA;
-            break;
-
-        default:
-            *val = LSM6DS3TR_C_DEN_STAMP_ND;
-            break;
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN value stored in LSB of Z-axis.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_z in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mark_axis_z_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-    if(ret == 0) {
-        ctrl9_xl.den_z = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN value stored in LSB of Z-axis.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_z in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mark_axis_z_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    *val = ctrl9_xl.den_z;
-
-    return ret;
-}
-
-/**
-  * @brief  DEN value stored in LSB of Y-axis.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_y in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mark_axis_y_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-    if(ret == 0) {
-        ctrl9_xl.den_y = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN value stored in LSB of Y-axis.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_y in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mark_axis_y_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    *val = ctrl9_xl.den_y;
-
-    return ret;
-}
-
-/**
-  * @brief  DEN value stored in LSB of X-axis.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_x in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mark_axis_x_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-    if(ret == 0) {
-        ctrl9_xl.den_x = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  DEN value stored in LSB of X-axis.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of den_x in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_den_mark_axis_x_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    *val = ctrl9_xl.den_x;
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Pedometer
-  * @brief       This section groups all the functions that manage pedometer.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Reset pedometer step counter.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pedo_rst_step in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_step_reset_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.pedo_rst_step = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Reset pedometer step counter.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pedo_rst_step in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_step_reset_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    *val = ctrl10_c.pedo_rst_step;
-
-    return ret;
-}
-
-/**
-  * @brief  Enable pedometer algorithm.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pedo_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_sens_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.pedo_en = val;
-
-        if(val != 0x00U) {
-            ctrl10_c.func_en = val;
-        }
-
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  pedo_sens:   Enable pedometer algorithm.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pedo_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_sens_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    *val = ctrl10_c.pedo_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Minimum threshold to detect a peak. Default is 10h.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of ths_min in reg
-  *                      CONFIG_PEDO_THS_MIN
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_threshold_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN, (uint8_t*)&config_pedo_ths_min, 1);
-
-        if(ret == 0) {
-            config_pedo_ths_min.ths_min = val;
-            ret = lsm6ds3tr_c_write_reg(
-                ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN, (uint8_t*)&config_pedo_ths_min, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Minimum threshold to detect a peak. Default is 10h.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of ths_min in reg  CONFIG_PEDO_THS_MIN
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_threshold_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN, (uint8_t*)&config_pedo_ths_min, 1);
-
-        if(ret == 0) {
-            *val = config_pedo_ths_min.ths_min;
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  pedo_full_scale:   Pedometer data range.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pedo_fs in
-  *                            reg CONFIG_PEDO_THS_MIN
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_full_scale_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_pedo_fs_t val) {
-    lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN, (uint8_t*)&config_pedo_ths_min, 1);
-
-        if(ret == 0) {
-            config_pedo_ths_min.pedo_fs = (uint8_t)val;
-            ret = lsm6ds3tr_c_write_reg(
-                ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN, (uint8_t*)&config_pedo_ths_min, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Pedometer data range.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of pedo_fs in
-  *                            reg CONFIG_PEDO_THS_MIN
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_full_scale_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_pedo_fs_t* val) {
-    lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_CONFIG_PEDO_THS_MIN, (uint8_t*)&config_pedo_ths_min, 1);
-
-        if(ret == 0) {
-            switch(config_pedo_ths_min.pedo_fs) {
-            case LSM6DS3TR_C_PEDO_AT_2g:
-                *val = LSM6DS3TR_C_PEDO_AT_2g;
-                break;
-
-            case LSM6DS3TR_C_PEDO_AT_4g:
-                *val = LSM6DS3TR_C_PEDO_AT_4g;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_PEDO_FS_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Pedometer debounce configuration register (r/w).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of deb_step in reg PEDO_DEB_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_debounce_steps_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG, (uint8_t*)&pedo_deb_reg, 1);
-
-        if(ret == 0) {
-            pedo_deb_reg.deb_step = val;
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG, (uint8_t*)&pedo_deb_reg, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Pedometer debounce configuration register (r/w).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of deb_step in reg PEDO_DEB_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_debounce_steps_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG, (uint8_t*)&pedo_deb_reg, 1);
-
-        if(ret == 0) {
-            *val = pedo_deb_reg.deb_step;
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Debounce time. If the time between two consecutive steps is
-  *         greater than  DEB_TIME*80ms, the debouncer is reactivated.
-  *         Default value: 01101[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of deb_time in reg PEDO_DEB_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_timeout_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG, (uint8_t*)&pedo_deb_reg, 1);
-
-        if(ret == 0) {
-            pedo_deb_reg.deb_time = val;
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG, (uint8_t*)&pedo_deb_reg, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Debounce time. If the time between two consecutive steps is
-  *         greater than  DEB_TIME*80ms, the debouncer is reactivated.
-  *         Default value: 01101[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of deb_time in reg PEDO_DEB_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_timeout_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_PEDO_DEB_REG, (uint8_t*)&pedo_deb_reg, 1);
-
-        if(ret == 0) {
-            *val = pedo_deb_reg.deb_time;
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Time period register for step detection on delta time (r/w).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that contains data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_steps_period_set(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_STEP_COUNT_DELTA, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Time period register for step detection on delta time (r/w).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_pedo_steps_period_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_STEP_COUNT_DELTA, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_significant_motion
-  * @brief       This section groups all the functions that manage the
-  *              significant motion detection.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enable significant motion detection function.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sign_motion_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_motion_sens_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.sign_motion_en = val;
-
-        if(val != 0x00U) {
-            ctrl10_c.func_en = val;
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable significant motion detection function.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of sign_motion_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_motion_sens_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    *val = ctrl10_c.sign_motion_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Significant motion threshold.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that store significant motion threshold.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_motion_threshold_set(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SM_THS, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Significant motion threshold.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that store significant motion threshold.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_motion_threshold_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SM_THS, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_tilt_detection
-  * @brief       This section groups all the functions that manage the tilt
-  *              event detection.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enable tilt calculation.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tilt_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_sens_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.tilt_en = val;
-
-        if(val != 0x00U) {
-            ctrl10_c.func_en = val;
-        }
-
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable tilt calculation.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tilt_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_sens_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    *val = ctrl10_c.tilt_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Enable tilt calculation.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tilt_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_wrist_tilt_sens_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.wrist_tilt_en = val;
-
-        if(val != 0x00U) {
-            ctrl10_c.func_en = val;
-        }
-
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable tilt calculation.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tilt_en in reg CTRL10_C
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_wrist_tilt_sens_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    *val = ctrl10_c.wrist_tilt_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Absolute Wrist Tilt latency register (r/w).
-  *         Absolute wrist tilt latency parameters.
-  *         1 LSB = 40 ms. Default value: 0Fh (600 ms).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that contains data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_latency_set(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_LAT, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Absolute Wrist Tilt latency register (r/w).
-  *         Absolute wrist tilt latency parameters.
-  *         1 LSB = 40 ms. Default value: 0Fh (600 ms).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_latency_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_LAT, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Absolute Wrist Tilt threshold register(r/w).
-  *         Absolute wrist tilt threshold parameters.
-  *         1 LSB = 15.625 mg.Default value: 20h (500 mg).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that contains data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_threshold_set(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_THS, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Absolute Wrist Tilt threshold register(r/w).
-  *         Absolute wrist tilt threshold parameters.
-  *         1 LSB = 15.625 mg.Default value: 20h (500 mg).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_threshold_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_THS, buff, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Absolute Wrist Tilt mask register (r/w).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Registers A_WRIST_TILT_MASK
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_src_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_a_wrist_tilt_mask_t* val) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_MASK, (uint8_t*)val, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Absolute Wrist Tilt mask register (r/w).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Registers A_WRIST_TILT_MASK
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_tilt_src_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_a_wrist_tilt_mask_t* val) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_B);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_A_WRIST_TILT_MASK, (uint8_t*)val, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_ magnetometer_sensor
-  * @brief       This section groups all the functions that manage additional
-  *              magnetometer sensor.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enable soft-iron correction algorithm for magnetometer.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of soft_en in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_soft_iron_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-
-    if(ret == 0) {
-        ctrl9_xl.soft_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable soft-iron correction algorithm for magnetometer.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of soft_en in reg CTRL9_XL
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_soft_iron_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
-    *val = ctrl9_xl.soft_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Enable hard-iron correction algorithm for magnetometer.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of iron_en in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_hard_iron_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    if(ret == 0) {
-        master_config.iron_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-            if(ret == 0) {
-                if(val != 0x00U) {
-                    ctrl10_c.func_en = val;
-                }
-
-                ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Enable hard-iron correction algorithm for magnetometer.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of iron_en in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_hard_iron_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    *val = master_config.iron_en;
-
-    return ret;
-}
-
-/**
-  * @brief  Soft iron 3x3 matrix. Value are expressed in sign-module format.
-  *         (Es. SVVVVVVVb where S is the sign 0/+1/- and V is the value).[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that contains data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_soft_iron_mat_set(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MAG_SI_XX, buff, 9);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Soft iron 3x3 matrix. Value are expressed in sign-module format.
-  *         (Es. SVVVVVVVb where S is the sign 0/+1/- and V is the value).[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_soft_iron_mat_get(stmdev_ctx_t* ctx, uint8_t* buff) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MAG_SI_XX, buff, 9);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Offset for hard-iron compensation register (r/w). The value is
-  *         expressed as a 16-bit word in two’s complement.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that contains data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_offset_set(stmdev_ctx_t* ctx, int16_t* val) {
-    uint8_t buff[6];
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
-        buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
-        buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
-        buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
-        buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
-        buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MAG_OFFX_L, buff, 6);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Offset for hard-iron compensation register(r/w).
-  *         The value is expressed as a 16-bit word in two’s complement.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  buff   Buffer that stores data read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_mag_offset_get(stmdev_ctx_t* ctx, int16_t* val) {
-    uint8_t buff[6];
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MAG_OFFX_L, buff, 6);
-
-        if(ret == 0) {
-            val[0] = (int16_t)buff[1];
-            val[0] = (val[0] * 256) + (int16_t)buff[0];
-            val[1] = (int16_t)buff[3];
-            val[1] = (val[1] * 256) + (int16_t)buff[2];
-            val[2] = (int16_t)buff[5];
-            val[2] = (val[2] * 256) + (int16_t)buff[4];
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @defgroup    LSM6DS3TR_C_Sensor_hub
-  * @brief       This section groups all the functions that manage the sensor
-  *              hub functionality.
-  * @{
-  *
-  */
-
-/**
-  * @brief  Enable function.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values func_en
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_func_en_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-
-    if(ret == 0) {
-        ctrl10_c.func_en = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_CTRL10_C, (uint8_t*)&ctrl10_c, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor synchronization time frame with the step of 500 ms and
-  *         full range of 5s. Unsigned 8-bit.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tph in reg SENSOR_SYNC_TIME_FRAME
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_sync_sens_frame_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_sensor_sync_time_frame_t sensor_sync_time_frame;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(
-        ctx, LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME, (uint8_t*)&sensor_sync_time_frame, 1);
-
-    if(ret == 0) {
-        sensor_sync_time_frame.tph = val;
-        ret = lsm6ds3tr_c_write_reg(
-            ctx, LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME, (uint8_t*)&sensor_sync_time_frame, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor synchronization time frame with the step of 500 ms and
-  *         full range of 5s. Unsigned 8-bit.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of tph in reg  SENSOR_SYNC_TIME_FRAME
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_sync_sens_frame_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_sensor_sync_time_frame_t sensor_sync_time_frame;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(
-        ctx, LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME, (uint8_t*)&sensor_sync_time_frame, 1);
-    *val = sensor_sync_time_frame.tph;
-
-    return ret;
-}
-
-/**
-  * @brief  Resolution ratio of error code for sensor synchronization.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of rr in reg  SENSOR_SYNC_RES_RATIO
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_sync_sens_ratio_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_rr_t val) {
-    lsm6ds3tr_c_sensor_sync_res_ratio_t sensor_sync_res_ratio;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(
-        ctx, LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO, (uint8_t*)&sensor_sync_res_ratio, 1);
-
-    if(ret == 0) {
-        sensor_sync_res_ratio.rr = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(
-            ctx, LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO, (uint8_t*)&sensor_sync_res_ratio, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Resolution ratio of error code for sensor synchronization.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of rr in reg  SENSOR_SYNC_RES_RATIO
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_sync_sens_ratio_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_rr_t* val) {
-    lsm6ds3tr_c_sensor_sync_res_ratio_t sensor_sync_res_ratio;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(
-        ctx, LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO, (uint8_t*)&sensor_sync_res_ratio, 1);
-
-    switch(sensor_sync_res_ratio.rr) {
-    case LSM6DS3TR_C_RES_RATIO_2_11:
-        *val = LSM6DS3TR_C_RES_RATIO_2_11;
-        break;
-
-    case LSM6DS3TR_C_RES_RATIO_2_12:
-        *val = LSM6DS3TR_C_RES_RATIO_2_12;
-        break;
-
-    case LSM6DS3TR_C_RES_RATIO_2_13:
-        *val = LSM6DS3TR_C_RES_RATIO_2_13;
-        break;
-
-    case LSM6DS3TR_C_RES_RATIO_2_14:
-        *val = LSM6DS3TR_C_RES_RATIO_2_14;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_RES_RATIO_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor hub I2C master enable.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of master_on in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_master_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    if(ret == 0) {
-        master_config.master_on = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor hub I2C master enable.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of master_on in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_master_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    *val = master_config.master_on;
-
-    return ret;
-}
-
-/**
-  * @brief  I2C interface pass-through.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pass_through_mode in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_pass_through_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    if(ret == 0) {
-        master_config.pass_through_mode = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  I2C interface pass-through.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pass_through_mode in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_pass_through_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    *val = master_config.pass_through_mode;
-
-    return ret;
-}
-
-/**
-  * @brief  Master I2C pull-up enable/disable.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of pull_up_en in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_pin_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_pull_up_en_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    if(ret == 0) {
-        master_config.pull_up_en = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Master I2C pull-up enable/disable.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of pull_up_en in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_pin_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_pull_up_en_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    switch(master_config.pull_up_en) {
-    case LSM6DS3TR_C_EXT_PULL_UP:
-        *val = LSM6DS3TR_C_EXT_PULL_UP;
-        break;
-
-    case LSM6DS3TR_C_INTERNAL_PULL_UP:
-        *val = LSM6DS3TR_C_INTERNAL_PULL_UP;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_SH_PIN_MODE;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor hub trigger signal selection.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of start_config in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_syncro_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_start_config_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    if(ret == 0) {
-        master_config.start_config = (uint8_t)val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor hub trigger signal selection.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of start_config in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_syncro_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_start_config_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    switch(master_config.start_config) {
-    case LSM6DS3TR_C_XL_GY_DRDY:
-        *val = LSM6DS3TR_C_XL_GY_DRDY;
-        break;
-
-    case LSM6DS3TR_C_EXT_ON_INT2_PIN:
-        *val = LSM6DS3TR_C_EXT_ON_INT2_PIN;
-        break;
-
-    default:
-        *val = LSM6DS3TR_C_SH_SYNCRO_ND;
-        break;
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Manage the Master DRDY signal on INT1 pad.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of drdy_on_int1 in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_drdy_on_int1_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-
-    if(ret == 0) {
-        master_config.drdy_on_int1 = val;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Manage the Master DRDY signal on INT1 pad.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of drdy_on_int1 in reg MASTER_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_drdy_on_int1_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_master_config_t master_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CONFIG, (uint8_t*)&master_config, 1);
-    *val = master_config.drdy_on_int1;
-
-    return ret;
-}
-
-/**
-  * @brief  Sensor hub output registers.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure of registers from SENSORHUB1_REG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_read_data_raw_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_emb_sh_read_t* val) {
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SENSORHUB1_REG, (uint8_t*)&(val->sh_byte_1), 12);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(
-            ctx, LSM6DS3TR_C_SENSORHUB13_REG, (uint8_t*)&(val->sh_byte_13), 6);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Master command code used for stamping for sensor sync.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of master_cmd_code in
-  *                reg MASTER_CMD_CODE
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_cmd_sens_sync_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_master_cmd_code_t master_cmd_code;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CMD_CODE, (uint8_t*)&master_cmd_code, 1);
-
-    if(ret == 0) {
-        master_cmd_code.master_cmd_code = val;
-        ret =
-            lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_MASTER_CMD_CODE, (uint8_t*)&master_cmd_code, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Master command code used for stamping for sensor sync.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of master_cmd_code in
-  *                reg MASTER_CMD_CODE
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_cmd_sens_sync_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_master_cmd_code_t master_cmd_code;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_MASTER_CMD_CODE, (uint8_t*)&master_cmd_code, 1);
-    *val = master_cmd_code.master_cmd_code;
-
-    return ret;
-}
-
-/**
-  * @brief  Error code used for sensor synchronization.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of error_code in
-  *                reg SENS_SYNC_SPI_ERROR_CODE.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_spi_sync_error_set(stmdev_ctx_t* ctx, uint8_t val) {
-    lsm6ds3tr_c_sens_sync_spi_error_code_t sens_sync_spi_error_code;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(
-        ctx, LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE, (uint8_t*)&sens_sync_spi_error_code, 1);
-
-    if(ret == 0) {
-        sens_sync_spi_error_code.error_code = val;
-        ret = lsm6ds3tr_c_write_reg(
-            ctx, LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE, (uint8_t*)&sens_sync_spi_error_code, 1);
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Error code used for sensor synchronization.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of error_code in
-  *                reg SENS_SYNC_SPI_ERROR_CODE.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_spi_sync_error_get(stmdev_ctx_t* ctx, uint8_t* val) {
-    lsm6ds3tr_c_sens_sync_spi_error_code_t sens_sync_spi_error_code;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_read_reg(
-        ctx, LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE, (uint8_t*)&sens_sync_spi_error_code, 1);
-    *val = sens_sync_spi_error_code.error_code;
-
-    return ret;
-}
-
-/**
-  * @brief   Number of external sensors to be read by the sensor hub.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of aux_sens_on in reg SLAVE0_CONFIG.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_num_of_dev_connected_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_aux_sens_on_t val) {
-    lsm6ds3tr_c_slave0_config_t slave0_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-        if(ret == 0) {
-            slave0_config.aux_sens_on = (uint8_t)val;
-            ret =
-                lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief   Number of external sensors to be read by the sensor hub.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of aux_sens_on in reg SLAVE0_CONFIG.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t
-    lsm6ds3tr_c_sh_num_of_dev_connected_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_aux_sens_on_t* val) {
-    lsm6ds3tr_c_slave0_config_t slave0_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-        if(ret == 0) {
-            switch(slave0_config.aux_sens_on) {
-            case LSM6DS3TR_C_SLV_0:
-                *val = LSM6DS3TR_C_SLV_0;
-                break;
-
-            case LSM6DS3TR_C_SLV_0_1:
-                *val = LSM6DS3TR_C_SLV_0_1;
-                break;
-
-            case LSM6DS3TR_C_SLV_0_1_2:
-                *val = LSM6DS3TR_C_SLV_0_1_2;
-                break;
-
-            case LSM6DS3TR_C_SLV_0_1_2_3:
-                *val = LSM6DS3TR_C_SLV_0_1_2_3;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_SLV_EN_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Configure slave 0 for perform a write.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure that contain:
-  *                  - uint8_t slv_add;    8 bit i2c device address
-  *                  - uint8_t slv_subadd; 8 bit register device address
-  *                  - uint8_t slv_data;   8 bit data to write
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_cfg_write(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_write_t* val) {
-    lsm6ds3tr_c_slv0_add_t slv0_add;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        slv0_add.slave0_add = val->slv0_add;
-        slv0_add.rw_0 = 0;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_ADD, (uint8_t*)&slv0_add, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_SUBADD, &(val->slv0_subadd), 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_write_reg(
-                    ctx, LSM6DS3TR_C_DATAWRITE_SRC_MODE_SUB_SLV0, &(val->slv0_data), 1);
-
-                if(ret == 0) {
-                    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-                }
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Configure slave 0 for perform a read.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure that contain:
-  *                  - uint8_t slv_add;    8 bit i2c device address
-  *                  - uint8_t slv_subadd; 8 bit register device address
-  *                  - uint8_t slv_len;    num of bit to read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slv0_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val) {
-    lsm6ds3tr_c_slave0_config_t slave0_config;
-    lsm6ds3tr_c_slv0_add_t slv0_add;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        slv0_add.slave0_add = val->slv_add;
-        slv0_add.rw_0 = 1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_ADD, (uint8_t*)&slv0_add, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV0_SUBADD, &(val->slv_subadd), 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_read_reg(
-                    ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-                slave0_config.slave0_numop = val->slv_len;
-
-                if(ret == 0) {
-                    ret = lsm6ds3tr_c_write_reg(
-                        ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-                    if(ret == 0) {
-                        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-                    }
-                }
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Configure slave 1 for perform a read.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure that contain:
-  *                  - uint8_t slv_add;    8 bit i2c device address
-  *                  - uint8_t slv_subadd; 8 bit register device address
-  *                  - uint8_t slv_len;    num of bit to read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slv1_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val) {
-    lsm6ds3tr_c_slave1_config_t slave1_config;
-    lsm6ds3tr_c_slv1_add_t slv1_add;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        slv1_add.slave1_add = val->slv_add;
-        slv1_add.r_1 = 1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV1_ADD, (uint8_t*)&slv1_add, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV1_SUBADD, &(val->slv_subadd), 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_read_reg(
-                    ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-                slave1_config.slave1_numop = val->slv_len;
-
-                if(ret == 0) {
-                    ret = lsm6ds3tr_c_write_reg(
-                        ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-
-                    if(ret == 0) {
-                        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-                    }
-                }
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Configure slave 2 for perform a read.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure that contain:
-  *                  - uint8_t slv_add;    8 bit i2c device address
-  *                  - uint8_t slv_subadd; 8 bit register device address
-  *                  - uint8_t slv_len;    num of bit to read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slv2_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val) {
-    lsm6ds3tr_c_slv2_add_t slv2_add;
-    lsm6ds3tr_c_slave2_config_t slave2_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        slv2_add.slave2_add = val->slv_add;
-        slv2_add.r_2 = 1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV2_ADD, (uint8_t*)&slv2_add, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV2_SUBADD, &(val->slv_subadd), 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_read_reg(
-                    ctx, LSM6DS3TR_C_SLAVE2_CONFIG, (uint8_t*)&slave2_config, 1);
-
-                if(ret == 0) {
-                    slave2_config.slave2_numop = val->slv_len;
-                    ret = lsm6ds3tr_c_write_reg(
-                        ctx, LSM6DS3TR_C_SLAVE2_CONFIG, (uint8_t*)&slave2_config, 1);
-
-                    if(ret == 0) {
-                        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-                    }
-                }
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Configure slave 3 for perform a read.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Structure that contain:
-  *                  - uint8_t slv_add;    8 bit i2c device address
-  *                  - uint8_t slv_subadd; 8 bit register device address
-  *                  - uint8_t slv_len;    num of bit to read
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slv3_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val) {
-    lsm6ds3tr_c_slave3_config_t slave3_config;
-    lsm6ds3tr_c_slv3_add_t slv3_add;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        slv3_add.slave3_add = val->slv_add;
-        slv3_add.r_3 = 1;
-        ret = lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLV3_ADD, (uint8_t*)&slv3_add, 1);
-
-        if(ret == 0) {
-            ret = lsm6ds3tr_c_write_reg(
-                ctx, LSM6DS3TR_C_SLV3_SUBADD, (uint8_t*)&(val->slv_subadd), 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_read_reg(
-                    ctx, LSM6DS3TR_C_SLAVE3_CONFIG, (uint8_t*)&slave3_config, 1);
-
-                if(ret == 0) {
-                    slave3_config.slave3_numop = val->slv_len;
-                    ret = lsm6ds3tr_c_write_reg(
-                        ctx, LSM6DS3TR_C_SLAVE3_CONFIG, (uint8_t*)&slave3_config, 1);
-
-                    if(ret == 0) {
-                        ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-                    }
-                }
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 0 starting from the
-  *         sensor hub trigger.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of slave0_rate in reg SLAVE0_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_0_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave0_rate_t val) {
-    lsm6ds3tr_c_slave0_config_t slave0_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-        if(ret == 0) {
-            slave0_config.slave0_rate = (uint8_t)val;
-            ret =
-                lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 0 starting from the
-  *         sensor hub trigger.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of slave0_rate in reg SLAVE0_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_0_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave0_rate_t* val) {
-    lsm6ds3tr_c_slave0_config_t slave0_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE0_CONFIG, (uint8_t*)&slave0_config, 1);
-
-        if(ret == 0) {
-            switch(slave0_config.slave0_rate) {
-            case LSM6DS3TR_C_SL0_NO_DEC:
-                *val = LSM6DS3TR_C_SL0_NO_DEC;
-                break;
-
-            case LSM6DS3TR_C_SL0_DEC_2:
-                *val = LSM6DS3TR_C_SL0_DEC_2;
-                break;
-
-            case LSM6DS3TR_C_SL0_DEC_4:
-                *val = LSM6DS3TR_C_SL0_DEC_4;
-                break;
-
-            case LSM6DS3TR_C_SL0_DEC_8:
-                *val = LSM6DS3TR_C_SL0_DEC_8;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_SL0_DEC_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Slave 0 write operation is performed only at the first sensor
-  *         hub cycle.
-  *         This is effective if the Aux_sens_on[1:0] field in
-  *         SLAVE0_CONFIG(04h) is set to a value other than 00.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of write_once in reg SLAVE1_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_write_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_write_once_t val) {
-    lsm6ds3tr_c_slave1_config_t slave1_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-        slave1_config.write_once = (uint8_t)val;
-
-        if(ret == 0) {
-            ret =
-                lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Slave 0 write operation is performed only at the first sensor
-  *         hub cycle.
-  *         This is effective if the Aux_sens_on[1:0] field in
-  *         SLAVE0_CONFIG(04h) is set to a value other than 00.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of write_once in reg SLAVE1_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_write_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_write_once_t* val) {
-    lsm6ds3tr_c_slave1_config_t slave1_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-
-        if(ret == 0) {
-            switch(slave1_config.write_once) {
-            case LSM6DS3TR_C_EACH_SH_CYCLE:
-                *val = LSM6DS3TR_C_EACH_SH_CYCLE;
-                break;
-
-            case LSM6DS3TR_C_ONLY_FIRST_CYCLE:
-                *val = LSM6DS3TR_C_ONLY_FIRST_CYCLE;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_SH_WR_MODE_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 1 starting from the
-  *         sensor hub trigger.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of slave1_rate in reg SLAVE1_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_1_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave1_rate_t val) {
-    lsm6ds3tr_c_slave1_config_t slave1_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-
-        if(ret == 0) {
-            slave1_config.slave1_rate = (uint8_t)val;
-            ret =
-                lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 1 starting from the
-  *         sensor hub trigger.[get]
-  *
-  * @param  ctx    Read / write interface definitions reg SLAVE1_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_1_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave1_rate_t* val) {
-    lsm6ds3tr_c_slave1_config_t slave1_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE1_CONFIG, (uint8_t*)&slave1_config, 1);
-
-        if(ret == 0) {
-            switch(slave1_config.slave1_rate) {
-            case LSM6DS3TR_C_SL1_NO_DEC:
-                *val = LSM6DS3TR_C_SL1_NO_DEC;
-                break;
-
-            case LSM6DS3TR_C_SL1_DEC_2:
-                *val = LSM6DS3TR_C_SL1_DEC_2;
-                break;
-
-            case LSM6DS3TR_C_SL1_DEC_4:
-                *val = LSM6DS3TR_C_SL1_DEC_4;
-                break;
-
-            case LSM6DS3TR_C_SL1_DEC_8:
-                *val = LSM6DS3TR_C_SL1_DEC_8;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_SL1_DEC_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 2 starting from the
-  *         sensor hub trigger.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of slave2_rate in reg SLAVE2_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_2_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave2_rate_t val) {
-    lsm6ds3tr_c_slave2_config_t slave2_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG, (uint8_t*)&slave2_config, 1);
-
-        if(ret == 0) {
-            slave2_config.slave2_rate = (uint8_t)val;
-            ret =
-                lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG, (uint8_t*)&slave2_config, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 2 starting from the
-  *         sensor hub trigger.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of slave2_rate in reg SLAVE2_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_2_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave2_rate_t* val) {
-    lsm6ds3tr_c_slave2_config_t slave2_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE2_CONFIG, (uint8_t*)&slave2_config, 1);
-
-        if(ret == 0) {
-            switch(slave2_config.slave2_rate) {
-            case LSM6DS3TR_C_SL2_NO_DEC:
-                *val = LSM6DS3TR_C_SL2_NO_DEC;
-                break;
-
-            case LSM6DS3TR_C_SL2_DEC_2:
-                *val = LSM6DS3TR_C_SL2_DEC_2;
-                break;
-
-            case LSM6DS3TR_C_SL2_DEC_4:
-                *val = LSM6DS3TR_C_SL2_DEC_4;
-                break;
-
-            case LSM6DS3TR_C_SL2_DEC_8:
-                *val = LSM6DS3TR_C_SL2_DEC_8;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_SL2_DEC_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 3 starting from the
-  *         sensor hub trigger.[set]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Change the values of slave3_rate in reg SLAVE3_CONFIG
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_3_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave3_rate_t val) {
-    lsm6ds3tr_c_slave3_config_t slave3_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG, (uint8_t*)&slave3_config, 1);
-        slave3_config.slave3_rate = (uint8_t)val;
-
-        if(ret == 0) {
-            ret =
-                lsm6ds3tr_c_write_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG, (uint8_t*)&slave3_config, 1);
-
-            if(ret == 0) {
-                ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-            }
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @brief  Decimation of read operation on Slave 3 starting from the
-  *         sensor hub trigger.[get]
-  *
-  * @param  ctx    Read / write interface definitions
-  * @param  val    Get the values of slave3_rate in reg SLAVE3_CONFIG.
-  * @retval        Interface status (MANDATORY: return 0 -> no Error).
-  *
-  */
-int32_t lsm6ds3tr_c_sh_slave_3_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave3_rate_t* val) {
-    lsm6ds3tr_c_slave3_config_t slave3_config;
-    int32_t ret;
-
-    ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_BANK_A);
-
-    if(ret == 0) {
-        ret = lsm6ds3tr_c_read_reg(ctx, LSM6DS3TR_C_SLAVE3_CONFIG, (uint8_t*)&slave3_config, 1);
-
-        if(ret == 0) {
-            switch(slave3_config.slave3_rate) {
-            case LSM6DS3TR_C_SL3_NO_DEC:
-                *val = LSM6DS3TR_C_SL3_NO_DEC;
-                break;
-
-            case LSM6DS3TR_C_SL3_DEC_2:
-                *val = LSM6DS3TR_C_SL3_DEC_2;
-                break;
-
-            case LSM6DS3TR_C_SL3_DEC_4:
-                *val = LSM6DS3TR_C_SL3_DEC_4;
-                break;
-
-            case LSM6DS3TR_C_SL3_DEC_8:
-                *val = LSM6DS3TR_C_SL3_DEC_8;
-                break;
-
-            default:
-                *val = LSM6DS3TR_C_SL3_DEC_ND;
-                break;
-            }
-
-            ret = lsm6ds3tr_c_mem_bank_set(ctx, LSM6DS3TR_C_USER_BANK);
-        }
-    }
-
-    return ret;
-}
-
-/**
-  * @}
-  *
-  */
-
-/**
-  * @}
-  *
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

tracking/imu/lsm6ds3tr_c_reg.h

@@ -1,2448 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    lsm6ds3tr_c_reg.h
-  * @author  Sensors Software Solution Team
-  * @brief   This file contains all the functions prototypes for the
-  *          lsm6ds3tr_c_reg.c driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef LSM6DS3TR_C_DRIVER_H
-#define LSM6DS3TR_C_DRIVER_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include <stdint.h>
-#include <stddef.h>
-#include <math.h>
-
-/** @addtogroup LSM6DS3TR_C
-  * @{
-  *
-  */
-
-/** @defgroup  Endianness definitions
-  * @{
-  *
-  */
-
-#ifndef DRV_BYTE_ORDER
-#ifndef __BYTE_ORDER__
-
-#define DRV_LITTLE_ENDIAN 1234
-#define DRV_BIG_ENDIAN 4321
-
-/** if _BYTE_ORDER is not defined, choose the endianness of your architecture
-  * by uncommenting the define which fits your platform endianness
-  */
-//#define DRV_BYTE_ORDER    DRV_BIG_ENDIAN
-#define DRV_BYTE_ORDER DRV_LITTLE_ENDIAN
-
-#else /* defined __BYTE_ORDER__ */
-
-#define DRV_LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__
-#define DRV_BIG_ENDIAN __ORDER_BIG_ENDIAN__
-#define DRV_BYTE_ORDER __BYTE_ORDER__
-
-#endif /* __BYTE_ORDER__*/
-#endif /* DRV_BYTE_ORDER */
-
-/**
-  * @}
-  *
-  */
-
-/** @defgroup STMicroelectronics sensors common types
-  * @{
-  *
-  */
-
-#ifndef MEMS_SHARED_TYPES
-#define MEMS_SHARED_TYPES
-
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} bitwise_t;
-
-#define PROPERTY_DISABLE (0U)
-#define PROPERTY_ENABLE (1U)
-
-/** @addtogroup  Interfaces_Functions
-  * @brief       This section provide a set of functions used to read and
-  *              write a generic register of the device.
-  *              MANDATORY: return 0 -> no Error.
-  * @{
-  *
-  */
-
-typedef int32_t (*stmdev_write_ptr)(void*, uint8_t, const uint8_t*, uint16_t);
-typedef int32_t (*stmdev_read_ptr)(void*, uint8_t, uint8_t*, uint16_t);
-typedef void (*stmdev_mdelay_ptr)(uint32_t millisec);
-
-typedef struct {
-    /** Component mandatory fields **/
-    stmdev_write_ptr write_reg;
-    stmdev_read_ptr read_reg;
-    /** Component optional fields **/
-    stmdev_mdelay_ptr mdelay;
-    /** Customizable optional pointer **/
-    void* handle;
-} stmdev_ctx_t;
-
-/**
-  * @}
-  *
-  */
-
-#endif /* MEMS_SHARED_TYPES */
-
-#ifndef MEMS_UCF_SHARED_TYPES
-#define MEMS_UCF_SHARED_TYPES
-
-/** @defgroup    Generic address-data structure definition
-  * @brief       This structure is useful to load a predefined configuration
-  *              of a sensor.
-  *              You can create a sensor configuration by your own or using
-  *              Unico / Unicleo tools available on STMicroelectronics
-  *              web site.
-  *
-  * @{
-  *
-  */
-
-typedef struct {
-    uint8_t address;
-    uint8_t data;
-} ucf_line_t;
-
-/**
-  * @}
-  *
-  */
-
-#endif /* MEMS_UCF_SHARED_TYPES */
-
-/**
-  * @}
-  *
-  */
-
-/** @defgroup LSM6DS3TR_C_Infos
-  * @{
-  *
-  */
-
-/** I2C Device Address 8 bit format  if SA0=0 -> D5 if SA0=1 -> D7 **/
-#define LSM6DS3TR_C_I2C_ADD_L 0xD5U
-#define LSM6DS3TR_C_I2C_ADD_H 0xD7U
-
-/** Device Identification (Who am I) **/
-#define LSM6DS3TR_C_ID 0x6AU
-
-/**
-  * @}
-  *
-  */
-
-#define LSM6DS3TR_C_FUNC_CFG_ACCESS 0x01U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 5;
-    uint8_t func_cfg_en : 3; /* func_cfg_en + func_cfg_en_b */
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t func_cfg_en : 3; /* func_cfg_en + func_cfg_en_b */
-    uint8_t not_used_01 : 5;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_func_cfg_access_t;
-
-#define LSM6DS3TR_C_SENSOR_SYNC_TIME_FRAME 0x04U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t tph : 4;
-    uint8_t not_used_01 : 4;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 4;
-    uint8_t tph : 4;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensor_sync_time_frame_t;
-
-#define LSM6DS3TR_C_SENSOR_SYNC_RES_RATIO 0x05U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t rr : 2;
-    uint8_t not_used_01 : 6;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 6;
-    uint8_t rr : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensor_sync_res_ratio_t;
-
-#define LSM6DS3TR_C_FIFO_CTRL1 0x06U
-typedef struct {
-    uint8_t fth : 8; /* + FIFO_CTRL2(fth) */
-} lsm6ds3tr_c_fifo_ctrl1_t;
-
-#define LSM6DS3TR_C_FIFO_CTRL2 0x07U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t fth : 3; /* + FIFO_CTRL1(fth) */
-    uint8_t fifo_temp_en : 1;
-    uint8_t not_used_01 : 2;
-    uint8_t timer_pedo_fifo_drdy : 1;
-    uint8_t timer_pedo_fifo_en : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t timer_pedo_fifo_en : 1;
-    uint8_t timer_pedo_fifo_drdy : 1;
-    uint8_t not_used_01 : 2;
-    uint8_t fifo_temp_en : 1;
-    uint8_t fth : 3; /* + FIFO_CTRL1(fth) */
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_fifo_ctrl2_t;
-
-#define LSM6DS3TR_C_FIFO_CTRL3 0x08U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t dec_fifo_xl : 3;
-    uint8_t dec_fifo_gyro : 3;
-    uint8_t not_used_01 : 2;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 2;
-    uint8_t dec_fifo_gyro : 3;
-    uint8_t dec_fifo_xl : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_fifo_ctrl3_t;
-
-#define LSM6DS3TR_C_FIFO_CTRL4 0x09U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t dec_ds3_fifo : 3;
-    uint8_t dec_ds4_fifo : 3;
-    uint8_t only_high_data : 1;
-    uint8_t stop_on_fth : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t stop_on_fth : 1;
-    uint8_t only_high_data : 1;
-    uint8_t dec_ds4_fifo : 3;
-    uint8_t dec_ds3_fifo : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_fifo_ctrl4_t;
-
-#define LSM6DS3TR_C_FIFO_CTRL5 0x0AU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t fifo_mode : 3;
-    uint8_t odr_fifo : 4;
-    uint8_t not_used_01 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 1;
-    uint8_t odr_fifo : 4;
-    uint8_t fifo_mode : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_fifo_ctrl5_t;
-
-#define LSM6DS3TR_C_DRDY_PULSE_CFG_G 0x0BU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t int2_wrist_tilt : 1;
-    uint8_t not_used_01 : 6;
-    uint8_t drdy_pulsed : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t drdy_pulsed : 1;
-    uint8_t not_used_01 : 6;
-    uint8_t int2_wrist_tilt : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_drdy_pulse_cfg_g_t;
-
-#define LSM6DS3TR_C_INT1_CTRL 0x0DU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t int1_drdy_xl : 1;
-    uint8_t int1_drdy_g : 1;
-    uint8_t int1_boot : 1;
-    uint8_t int1_fth : 1;
-    uint8_t int1_fifo_ovr : 1;
-    uint8_t int1_full_flag : 1;
-    uint8_t int1_sign_mot : 1;
-    uint8_t int1_step_detector : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t int1_step_detector : 1;
-    uint8_t int1_sign_mot : 1;
-    uint8_t int1_full_flag : 1;
-    uint8_t int1_fifo_ovr : 1;
-    uint8_t int1_fth : 1;
-    uint8_t int1_boot : 1;
-    uint8_t int1_drdy_g : 1;
-    uint8_t int1_drdy_xl : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_int1_ctrl_t;
-
-#define LSM6DS3TR_C_INT2_CTRL 0x0EU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t int2_drdy_xl : 1;
-    uint8_t int2_drdy_g : 1;
-    uint8_t int2_drdy_temp : 1;
-    uint8_t int2_fth : 1;
-    uint8_t int2_fifo_ovr : 1;
-    uint8_t int2_full_flag : 1;
-    uint8_t int2_step_count_ov : 1;
-    uint8_t int2_step_delta : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t int2_step_delta : 1;
-    uint8_t int2_step_count_ov : 1;
-    uint8_t int2_full_flag : 1;
-    uint8_t int2_fifo_ovr : 1;
-    uint8_t int2_fth : 1;
-    uint8_t int2_drdy_temp : 1;
-    uint8_t int2_drdy_g : 1;
-    uint8_t int2_drdy_xl : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_int2_ctrl_t;
-
-#define LSM6DS3TR_C_WHO_AM_I 0x0FU
-#define LSM6DS3TR_C_CTRL1_XL 0x10U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bw0_xl : 1;
-    uint8_t lpf1_bw_sel : 1;
-    uint8_t fs_xl : 2;
-    uint8_t odr_xl : 4;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t odr_xl : 4;
-    uint8_t fs_xl : 2;
-    uint8_t lpf1_bw_sel : 1;
-    uint8_t bw0_xl : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl1_xl_t;
-
-#define LSM6DS3TR_C_CTRL2_G 0x11U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 1;
-    uint8_t fs_g : 3; /* fs_g + fs_125 */
-    uint8_t odr_g : 4;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t odr_g : 4;
-    uint8_t fs_g : 3; /* fs_g + fs_125 */
-    uint8_t not_used_01 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl2_g_t;
-
-#define LSM6DS3TR_C_CTRL3_C 0x12U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t sw_reset : 1;
-    uint8_t ble : 1;
-    uint8_t if_inc : 1;
-    uint8_t sim : 1;
-    uint8_t pp_od : 1;
-    uint8_t h_lactive : 1;
-    uint8_t bdu : 1;
-    uint8_t boot : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t boot : 1;
-    uint8_t bdu : 1;
-    uint8_t h_lactive : 1;
-    uint8_t pp_od : 1;
-    uint8_t sim : 1;
-    uint8_t if_inc : 1;
-    uint8_t ble : 1;
-    uint8_t sw_reset : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl3_c_t;
-
-#define LSM6DS3TR_C_CTRL4_C 0x13U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 1;
-    uint8_t lpf1_sel_g : 1;
-    uint8_t i2c_disable : 1;
-    uint8_t drdy_mask : 1;
-    uint8_t den_drdy_int1 : 1;
-    uint8_t int2_on_int1 : 1;
-    uint8_t sleep : 1;
-    uint8_t den_xl_en : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t den_xl_en : 1;
-    uint8_t sleep : 1;
-    uint8_t int2_on_int1 : 1;
-    uint8_t den_drdy_int1 : 1;
-    uint8_t drdy_mask : 1;
-    uint8_t i2c_disable : 1;
-    uint8_t lpf1_sel_g : 1;
-    uint8_t not_used_01 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl4_c_t;
-
-#define LSM6DS3TR_C_CTRL5_C 0x14U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t st_xl : 2;
-    uint8_t st_g : 2;
-    uint8_t den_lh : 1;
-    uint8_t rounding : 3;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t rounding : 3;
-    uint8_t den_lh : 1;
-    uint8_t st_g : 2;
-    uint8_t st_xl : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl5_c_t;
-
-#define LSM6DS3TR_C_CTRL6_C 0x15U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t ftype : 2;
-    uint8_t not_used_01 : 1;
-    uint8_t usr_off_w : 1;
-    uint8_t xl_hm_mode : 1;
-    uint8_t den_mode : 3; /* trig_en + lvl_en + lvl2_en */
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t den_mode : 3; /* trig_en + lvl_en + lvl2_en */
-    uint8_t xl_hm_mode : 1;
-    uint8_t usr_off_w : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t ftype : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl6_c_t;
-
-#define LSM6DS3TR_C_CTRL7_G 0x16U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 2;
-    uint8_t rounding_status : 1;
-    uint8_t not_used_02 : 1;
-    uint8_t hpm_g : 2;
-    uint8_t hp_en_g : 1;
-    uint8_t g_hm_mode : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t g_hm_mode : 1;
-    uint8_t hp_en_g : 1;
-    uint8_t hpm_g : 2;
-    uint8_t not_used_02 : 1;
-    uint8_t rounding_status : 1;
-    uint8_t not_used_01 : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl7_g_t;
-
-#define LSM6DS3TR_C_CTRL8_XL 0x17U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t low_pass_on_6d : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t hp_slope_xl_en : 1;
-    uint8_t input_composite : 1;
-    uint8_t hp_ref_mode : 1;
-    uint8_t hpcf_xl : 2;
-    uint8_t lpf2_xl_en : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t lpf2_xl_en : 1;
-    uint8_t hpcf_xl : 2;
-    uint8_t hp_ref_mode : 1;
-    uint8_t input_composite : 1;
-    uint8_t hp_slope_xl_en : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t low_pass_on_6d : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl8_xl_t;
-
-#define LSM6DS3TR_C_CTRL9_XL 0x18U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 2;
-    uint8_t soft_en : 1;
-    uint8_t not_used_02 : 1;
-    uint8_t den_xl_g : 1;
-    uint8_t den_z : 1;
-    uint8_t den_y : 1;
-    uint8_t den_x : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t den_x : 1;
-    uint8_t den_y : 1;
-    uint8_t den_z : 1;
-    uint8_t den_xl_g : 1;
-    uint8_t not_used_02 : 1;
-    uint8_t soft_en : 1;
-    uint8_t not_used_01 : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl9_xl_t;
-
-#define LSM6DS3TR_C_CTRL10_C 0x19U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t sign_motion_en : 1;
-    uint8_t pedo_rst_step : 1;
-    uint8_t func_en : 1;
-    uint8_t tilt_en : 1;
-    uint8_t pedo_en : 1;
-    uint8_t timer_en : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t wrist_tilt_en : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t wrist_tilt_en : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t timer_en : 1;
-    uint8_t pedo_en : 1;
-    uint8_t tilt_en : 1;
-    uint8_t func_en : 1;
-    uint8_t pedo_rst_step : 1;
-    uint8_t sign_motion_en : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_ctrl10_c_t;
-
-#define LSM6DS3TR_C_MASTER_CONFIG 0x1AU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t master_on : 1;
-    uint8_t iron_en : 1;
-    uint8_t pass_through_mode : 1;
-    uint8_t pull_up_en : 1;
-    uint8_t start_config : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t data_valid_sel_fifo : 1;
-    uint8_t drdy_on_int1 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t drdy_on_int1 : 1;
-    uint8_t data_valid_sel_fifo : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t start_config : 1;
-    uint8_t pull_up_en : 1;
-    uint8_t pass_through_mode : 1;
-    uint8_t iron_en : 1;
-    uint8_t master_on : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_master_config_t;
-
-#define LSM6DS3TR_C_WAKE_UP_SRC 0x1BU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t z_wu : 1;
-    uint8_t y_wu : 1;
-    uint8_t x_wu : 1;
-    uint8_t wu_ia : 1;
-    uint8_t sleep_state_ia : 1;
-    uint8_t ff_ia : 1;
-    uint8_t not_used_01 : 2;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 2;
-    uint8_t ff_ia : 1;
-    uint8_t sleep_state_ia : 1;
-    uint8_t wu_ia : 1;
-    uint8_t x_wu : 1;
-    uint8_t y_wu : 1;
-    uint8_t z_wu : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_wake_up_src_t;
-
-#define LSM6DS3TR_C_TAP_SRC 0x1CU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t z_tap : 1;
-    uint8_t y_tap : 1;
-    uint8_t x_tap : 1;
-    uint8_t tap_sign : 1;
-    uint8_t double_tap : 1;
-    uint8_t single_tap : 1;
-    uint8_t tap_ia : 1;
-    uint8_t not_used_01 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 1;
-    uint8_t tap_ia : 1;
-    uint8_t single_tap : 1;
-    uint8_t double_tap : 1;
-    uint8_t tap_sign : 1;
-    uint8_t x_tap : 1;
-    uint8_t y_tap : 1;
-    uint8_t z_tap : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_tap_src_t;
-
-#define LSM6DS3TR_C_D6D_SRC 0x1DU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t xl : 1;
-    uint8_t xh : 1;
-    uint8_t yl : 1;
-    uint8_t yh : 1;
-    uint8_t zl : 1;
-    uint8_t zh : 1;
-    uint8_t d6d_ia : 1;
-    uint8_t den_drdy : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t den_drdy : 1;
-    uint8_t d6d_ia : 1;
-    uint8_t zh : 1;
-    uint8_t zl : 1;
-    uint8_t yh : 1;
-    uint8_t yl : 1;
-    uint8_t xh : 1;
-    uint8_t xl : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_d6d_src_t;
-
-#define LSM6DS3TR_C_STATUS_REG 0x1EU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t xlda : 1;
-    uint8_t gda : 1;
-    uint8_t tda : 1;
-    uint8_t not_used_01 : 5;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 5;
-    uint8_t tda : 1;
-    uint8_t gda : 1;
-    uint8_t xlda : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_status_reg_t;
-
-#define LSM6DS3TR_C_OUT_TEMP_L 0x20U
-#define LSM6DS3TR_C_OUT_TEMP_H 0x21U
-#define LSM6DS3TR_C_OUTX_L_G 0x22U
-#define LSM6DS3TR_C_OUTX_H_G 0x23U
-#define LSM6DS3TR_C_OUTY_L_G 0x24U
-#define LSM6DS3TR_C_OUTY_H_G 0x25U
-#define LSM6DS3TR_C_OUTZ_L_G 0x26U
-#define LSM6DS3TR_C_OUTZ_H_G 0x27U
-#define LSM6DS3TR_C_OUTX_L_XL 0x28U
-#define LSM6DS3TR_C_OUTX_H_XL 0x29U
-#define LSM6DS3TR_C_OUTY_L_XL 0x2AU
-#define LSM6DS3TR_C_OUTY_H_XL 0x2BU
-#define LSM6DS3TR_C_OUTZ_L_XL 0x2CU
-#define LSM6DS3TR_C_OUTZ_H_XL 0x2DU
-#define LSM6DS3TR_C_SENSORHUB1_REG 0x2EU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub1_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB2_REG 0x2FU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub2_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB3_REG 0x30U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub3_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB4_REG 0x31U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub4_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB5_REG 0x32U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub5_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB6_REG 0x33U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub6_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB7_REG 0x34U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub7_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB8_REG 0x35U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub8_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB9_REG 0x36U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub9_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB10_REG 0x37U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub10_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB11_REG 0x38U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub11_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB12_REG 0x39U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub12_reg_t;
-
-#define LSM6DS3TR_C_FIFO_STATUS1 0x3AU
-typedef struct {
-    uint8_t diff_fifo : 8; /* + FIFO_STATUS2(diff_fifo) */
-} lsm6ds3tr_c_fifo_status1_t;
-
-#define LSM6DS3TR_C_FIFO_STATUS2 0x3BU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t diff_fifo : 3; /* + FIFO_STATUS1(diff_fifo) */
-    uint8_t not_used_01 : 1;
-    uint8_t fifo_empty : 1;
-    uint8_t fifo_full_smart : 1;
-    uint8_t over_run : 1;
-    uint8_t waterm : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t waterm : 1;
-    uint8_t over_run : 1;
-    uint8_t fifo_full_smart : 1;
-    uint8_t fifo_empty : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t diff_fifo : 3; /* + FIFO_STATUS1(diff_fifo) */
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_fifo_status2_t;
-
-#define LSM6DS3TR_C_FIFO_STATUS3 0x3CU
-typedef struct {
-    uint8_t fifo_pattern : 8; /* + FIFO_STATUS4(fifo_pattern) */
-} lsm6ds3tr_c_fifo_status3_t;
-
-#define LSM6DS3TR_C_FIFO_STATUS4 0x3DU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t fifo_pattern : 2; /* + FIFO_STATUS3(fifo_pattern) */
-    uint8_t not_used_01 : 6;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_01 : 6;
-    uint8_t fifo_pattern : 2; /* + FIFO_STATUS3(fifo_pattern) */
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_fifo_status4_t;
-
-#define LSM6DS3TR_C_FIFO_DATA_OUT_L 0x3EU
-#define LSM6DS3TR_C_FIFO_DATA_OUT_H 0x3FU
-#define LSM6DS3TR_C_TIMESTAMP0_REG 0x40U
-#define LSM6DS3TR_C_TIMESTAMP1_REG 0x41U
-#define LSM6DS3TR_C_TIMESTAMP2_REG 0x42U
-#define LSM6DS3TR_C_STEP_TIMESTAMP_L 0x49U
-#define LSM6DS3TR_C_STEP_TIMESTAMP_H 0x4AU
-#define LSM6DS3TR_C_STEP_COUNTER_L 0x4BU
-#define LSM6DS3TR_C_STEP_COUNTER_H 0x4CU
-
-#define LSM6DS3TR_C_SENSORHUB13_REG 0x4DU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub13_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB14_REG 0x4EU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub14_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB15_REG 0x4FU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub15_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB16_REG 0x50U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub16_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB17_REG 0x51U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub17_reg_t;
-
-#define LSM6DS3TR_C_SENSORHUB18_REG 0x52U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t bit0 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit7 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t bit7 : 1;
-    uint8_t bit6 : 1;
-    uint8_t bit5 : 1;
-    uint8_t bit4 : 1;
-    uint8_t bit3 : 1;
-    uint8_t bit2 : 1;
-    uint8_t bit1 : 1;
-    uint8_t bit0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_sensorhub18_reg_t;
-
-#define LSM6DS3TR_C_FUNC_SRC1 0x53U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t sensorhub_end_op : 1;
-    uint8_t si_end_op : 1;
-    uint8_t hi_fail : 1;
-    uint8_t step_overflow : 1;
-    uint8_t step_detected : 1;
-    uint8_t tilt_ia : 1;
-    uint8_t sign_motion_ia : 1;
-    uint8_t step_count_delta_ia : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t step_count_delta_ia : 1;
-    uint8_t sign_motion_ia : 1;
-    uint8_t tilt_ia : 1;
-    uint8_t step_detected : 1;
-    uint8_t step_overflow : 1;
-    uint8_t hi_fail : 1;
-    uint8_t si_end_op : 1;
-    uint8_t sensorhub_end_op : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_func_src1_t;
-
-#define LSM6DS3TR_C_FUNC_SRC2 0x54U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t wrist_tilt_ia : 1;
-    uint8_t not_used_01 : 2;
-    uint8_t slave0_nack : 1;
-    uint8_t slave1_nack : 1;
-    uint8_t slave2_nack : 1;
-    uint8_t slave3_nack : 1;
-    uint8_t not_used_02 : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t not_used_02 : 1;
-    uint8_t slave3_nack : 1;
-    uint8_t slave2_nack : 1;
-    uint8_t slave1_nack : 1;
-    uint8_t slave0_nack : 1;
-    uint8_t not_used_01 : 2;
-    uint8_t wrist_tilt_ia : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_func_src2_t;
-
-#define LSM6DS3TR_C_WRIST_TILT_IA 0x55U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 2;
-    uint8_t wrist_tilt_ia_zneg : 1;
-    uint8_t wrist_tilt_ia_zpos : 1;
-    uint8_t wrist_tilt_ia_yneg : 1;
-    uint8_t wrist_tilt_ia_ypos : 1;
-    uint8_t wrist_tilt_ia_xneg : 1;
-    uint8_t wrist_tilt_ia_xpos : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t wrist_tilt_ia_xpos : 1;
-    uint8_t wrist_tilt_ia_xneg : 1;
-    uint8_t wrist_tilt_ia_ypos : 1;
-    uint8_t wrist_tilt_ia_yneg : 1;
-    uint8_t wrist_tilt_ia_zpos : 1;
-    uint8_t wrist_tilt_ia_zneg : 1;
-    uint8_t not_used_01 : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_wrist_tilt_ia_t;
-
-#define LSM6DS3TR_C_TAP_CFG 0x58U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t lir : 1;
-    uint8_t tap_z_en : 1;
-    uint8_t tap_y_en : 1;
-    uint8_t tap_x_en : 1;
-    uint8_t slope_fds : 1;
-    uint8_t inact_en : 2;
-    uint8_t interrupts_enable : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t interrupts_enable : 1;
-    uint8_t inact_en : 2;
-    uint8_t slope_fds : 1;
-    uint8_t tap_x_en : 1;
-    uint8_t tap_y_en : 1;
-    uint8_t tap_z_en : 1;
-    uint8_t lir : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_tap_cfg_t;
-
-#define LSM6DS3TR_C_TAP_THS_6D 0x59U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t tap_ths : 5;
-    uint8_t sixd_ths : 2;
-    uint8_t d4d_en : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t d4d_en : 1;
-    uint8_t sixd_ths : 2;
-    uint8_t tap_ths : 5;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_tap_ths_6d_t;
-
-#define LSM6DS3TR_C_INT_DUR2 0x5AU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t shock : 2;
-    uint8_t quiet : 2;
-    uint8_t dur : 4;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t dur : 4;
-    uint8_t quiet : 2;
-    uint8_t shock : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_int_dur2_t;
-
-#define LSM6DS3TR_C_WAKE_UP_THS 0x5BU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t wk_ths : 6;
-    uint8_t not_used_01 : 1;
-    uint8_t single_double_tap : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t single_double_tap : 1;
-    uint8_t not_used_01 : 1;
-    uint8_t wk_ths : 6;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_wake_up_ths_t;
-
-#define LSM6DS3TR_C_WAKE_UP_DUR 0x5CU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t sleep_dur : 4;
-    uint8_t timer_hr : 1;
-    uint8_t wake_dur : 2;
-    uint8_t ff_dur : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t ff_dur : 1;
-    uint8_t wake_dur : 2;
-    uint8_t timer_hr : 1;
-    uint8_t sleep_dur : 4;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_wake_up_dur_t;
-
-#define LSM6DS3TR_C_FREE_FALL 0x5DU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t ff_ths : 3;
-    uint8_t ff_dur : 5;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t ff_dur : 5;
-    uint8_t ff_ths : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_free_fall_t;
-
-#define LSM6DS3TR_C_MD1_CFG 0x5EU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t int1_timer : 1;
-    uint8_t int1_tilt : 1;
-    uint8_t int1_6d : 1;
-    uint8_t int1_double_tap : 1;
-    uint8_t int1_ff : 1;
-    uint8_t int1_wu : 1;
-    uint8_t int1_single_tap : 1;
-    uint8_t int1_inact_state : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t int1_inact_state : 1;
-    uint8_t int1_single_tap : 1;
-    uint8_t int1_wu : 1;
-    uint8_t int1_ff : 1;
-    uint8_t int1_double_tap : 1;
-    uint8_t int1_6d : 1;
-    uint8_t int1_tilt : 1;
-    uint8_t int1_timer : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_md1_cfg_t;
-
-#define LSM6DS3TR_C_MD2_CFG 0x5FU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t int2_iron : 1;
-    uint8_t int2_tilt : 1;
-    uint8_t int2_6d : 1;
-    uint8_t int2_double_tap : 1;
-    uint8_t int2_ff : 1;
-    uint8_t int2_wu : 1;
-    uint8_t int2_single_tap : 1;
-    uint8_t int2_inact_state : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t int2_inact_state : 1;
-    uint8_t int2_single_tap : 1;
-    uint8_t int2_wu : 1;
-    uint8_t int2_ff : 1;
-    uint8_t int2_double_tap : 1;
-    uint8_t int2_6d : 1;
-    uint8_t int2_tilt : 1;
-    uint8_t int2_iron : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_md2_cfg_t;
-
-#define LSM6DS3TR_C_MASTER_CMD_CODE 0x60U
-typedef struct {
-    uint8_t master_cmd_code : 8;
-} lsm6ds3tr_c_master_cmd_code_t;
-
-#define LSM6DS3TR_C_SENS_SYNC_SPI_ERROR_CODE 0x61U
-typedef struct {
-    uint8_t error_code : 8;
-} lsm6ds3tr_c_sens_sync_spi_error_code_t;
-
-#define LSM6DS3TR_C_OUT_MAG_RAW_X_L 0x66U
-#define LSM6DS3TR_C_OUT_MAG_RAW_X_H 0x67U
-#define LSM6DS3TR_C_OUT_MAG_RAW_Y_L 0x68U
-#define LSM6DS3TR_C_OUT_MAG_RAW_Y_H 0x69U
-#define LSM6DS3TR_C_OUT_MAG_RAW_Z_L 0x6AU
-#define LSM6DS3TR_C_OUT_MAG_RAW_Z_H 0x6BU
-#define LSM6DS3TR_C_X_OFS_USR 0x73U
-#define LSM6DS3TR_C_Y_OFS_USR 0x74U
-#define LSM6DS3TR_C_Z_OFS_USR 0x75U
-#define LSM6DS3TR_C_SLV0_ADD 0x02U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t rw_0 : 1;
-    uint8_t slave0_add : 7;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave0_add : 7;
-    uint8_t rw_0 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slv0_add_t;
-
-#define LSM6DS3TR_C_SLV0_SUBADD 0x03U
-typedef struct {
-    uint8_t slave0_reg : 8;
-} lsm6ds3tr_c_slv0_subadd_t;
-
-#define LSM6DS3TR_C_SLAVE0_CONFIG 0x04U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t slave0_numop : 3;
-    uint8_t src_mode : 1;
-    uint8_t aux_sens_on : 2;
-    uint8_t slave0_rate : 2;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave0_rate : 2;
-    uint8_t aux_sens_on : 2;
-    uint8_t src_mode : 1;
-    uint8_t slave0_numop : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slave0_config_t;
-
-#define LSM6DS3TR_C_SLV1_ADD 0x05U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t r_1 : 1;
-    uint8_t slave1_add : 7;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave1_add : 7;
-    uint8_t r_1 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slv1_add_t;
-
-#define LSM6DS3TR_C_SLV1_SUBADD 0x06U
-typedef struct {
-    uint8_t slave1_reg : 8;
-} lsm6ds3tr_c_slv1_subadd_t;
-
-#define LSM6DS3TR_C_SLAVE1_CONFIG 0x07U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t slave1_numop : 3;
-    uint8_t not_used_01 : 2;
-    uint8_t write_once : 1;
-    uint8_t slave1_rate : 2;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave1_rate : 2;
-    uint8_t write_once : 1;
-    uint8_t not_used_01 : 2;
-    uint8_t slave1_numop : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slave1_config_t;
-
-#define LSM6DS3TR_C_SLV2_ADD 0x08U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t r_2 : 1;
-    uint8_t slave2_add : 7;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave2_add : 7;
-    uint8_t r_2 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slv2_add_t;
-
-#define LSM6DS3TR_C_SLV2_SUBADD 0x09U
-typedef struct {
-    uint8_t slave2_reg : 8;
-} lsm6ds3tr_c_slv2_subadd_t;
-
-#define LSM6DS3TR_C_SLAVE2_CONFIG 0x0AU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t slave2_numop : 3;
-    uint8_t not_used_01 : 3;
-    uint8_t slave2_rate : 2;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave2_rate : 2;
-    uint8_t not_used_01 : 3;
-    uint8_t slave2_numop : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slave2_config_t;
-
-#define LSM6DS3TR_C_SLV3_ADD 0x0BU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t r_3 : 1;
-    uint8_t slave3_add : 7;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave3_add : 7;
-    uint8_t r_3 : 1;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slv3_add_t;
-
-#define LSM6DS3TR_C_SLV3_SUBADD 0x0CU
-typedef struct {
-    uint8_t slave3_reg : 8;
-} lsm6ds3tr_c_slv3_subadd_t;
-
-#define LSM6DS3TR_C_SLAVE3_CONFIG 0x0DU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t slave3_numop : 3;
-    uint8_t not_used_01 : 3;
-    uint8_t slave3_rate : 2;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t slave3_rate : 2;
-    uint8_t not_used_01 : 3;
-    uint8_t slave3_numop : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_slave3_config_t;
-
-#define LSM6DS3TR_C_DATAWRITE_SRC_MODE_SUB_SLV0 0x0EU
-typedef struct {
-    uint8_t slave_dataw : 8;
-} lsm6ds3tr_c_datawrite_src_mode_sub_slv0_t;
-
-#define LSM6DS3TR_C_CONFIG_PEDO_THS_MIN 0x0FU
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t ths_min : 5;
-    uint8_t not_used_01 : 2;
-    uint8_t pedo_fs : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t pedo_fs : 1;
-    uint8_t not_used_01 : 2;
-    uint8_t ths_min : 5;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_config_pedo_ths_min_t;
-
-#define LSM6DS3TR_C_SM_THS 0x13U
-#define LSM6DS3TR_C_PEDO_DEB_REG 0x14U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t deb_step : 3;
-    uint8_t deb_time : 5;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t deb_time : 5;
-    uint8_t deb_step : 3;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_pedo_deb_reg_t;
-
-#define LSM6DS3TR_C_STEP_COUNT_DELTA 0x15U
-#define LSM6DS3TR_C_MAG_SI_XX 0x24U
-#define LSM6DS3TR_C_MAG_SI_XY 0x25U
-#define LSM6DS3TR_C_MAG_SI_XZ 0x26U
-#define LSM6DS3TR_C_MAG_SI_YX 0x27U
-#define LSM6DS3TR_C_MAG_SI_YY 0x28U
-#define LSM6DS3TR_C_MAG_SI_YZ 0x29U
-#define LSM6DS3TR_C_MAG_SI_ZX 0x2AU
-#define LSM6DS3TR_C_MAG_SI_ZY 0x2BU
-#define LSM6DS3TR_C_MAG_SI_ZZ 0x2CU
-#define LSM6DS3TR_C_MAG_OFFX_L 0x2DU
-#define LSM6DS3TR_C_MAG_OFFX_H 0x2EU
-#define LSM6DS3TR_C_MAG_OFFY_L 0x2FU
-#define LSM6DS3TR_C_MAG_OFFY_H 0x30U
-#define LSM6DS3TR_C_MAG_OFFZ_L 0x31U
-#define LSM6DS3TR_C_MAG_OFFZ_H 0x32U
-#define LSM6DS3TR_C_A_WRIST_TILT_LAT 0x50U
-#define LSM6DS3TR_C_A_WRIST_TILT_THS 0x54U
-#define LSM6DS3TR_C_A_WRIST_TILT_MASK 0x59U
-typedef struct {
-#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
-    uint8_t not_used_01 : 2;
-    uint8_t wrist_tilt_mask_zneg : 1;
-    uint8_t wrist_tilt_mask_zpos : 1;
-    uint8_t wrist_tilt_mask_yneg : 1;
-    uint8_t wrist_tilt_mask_ypos : 1;
-    uint8_t wrist_tilt_mask_xneg : 1;
-    uint8_t wrist_tilt_mask_xpos : 1;
-#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
-    uint8_t wrist_tilt_mask_xpos : 1;
-    uint8_t wrist_tilt_mask_xneg : 1;
-    uint8_t wrist_tilt_mask_ypos : 1;
-    uint8_t wrist_tilt_mask_yneg : 1;
-    uint8_t wrist_tilt_mask_zpos : 1;
-    uint8_t wrist_tilt_mask_zneg : 1;
-    uint8_t not_used_01 : 2;
-#endif /* DRV_BYTE_ORDER */
-} lsm6ds3tr_c_a_wrist_tilt_mask_t;
-
-/**
-  * @defgroup LSM6DS3TR_C_Register_Union
-  * @brief    This union group all the registers having a bit-field
-  *           description.
-  *           This union is useful but it's not needed by the driver.
-  *
-  *           REMOVING this union you are compliant with:
-  *           MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
-  *
-  * @{
-  *
-  */
-typedef union {
-    lsm6ds3tr_c_func_cfg_access_t func_cfg_access;
-    lsm6ds3tr_c_sensor_sync_time_frame_t sensor_sync_time_frame;
-    lsm6ds3tr_c_sensor_sync_res_ratio_t sensor_sync_res_ratio;
-    lsm6ds3tr_c_fifo_ctrl1_t fifo_ctrl1;
-    lsm6ds3tr_c_fifo_ctrl2_t fifo_ctrl2;
-    lsm6ds3tr_c_fifo_ctrl3_t fifo_ctrl3;
-    lsm6ds3tr_c_fifo_ctrl4_t fifo_ctrl4;
-    lsm6ds3tr_c_fifo_ctrl5_t fifo_ctrl5;
-    lsm6ds3tr_c_drdy_pulse_cfg_g_t drdy_pulse_cfg_g;
-    lsm6ds3tr_c_int1_ctrl_t int1_ctrl;
-    lsm6ds3tr_c_int2_ctrl_t int2_ctrl;
-    lsm6ds3tr_c_ctrl1_xl_t ctrl1_xl;
-    lsm6ds3tr_c_ctrl2_g_t ctrl2_g;
-    lsm6ds3tr_c_ctrl3_c_t ctrl3_c;
-    lsm6ds3tr_c_ctrl4_c_t ctrl4_c;
-    lsm6ds3tr_c_ctrl5_c_t ctrl5_c;
-    lsm6ds3tr_c_ctrl6_c_t ctrl6_c;
-    lsm6ds3tr_c_ctrl7_g_t ctrl7_g;
-    lsm6ds3tr_c_ctrl8_xl_t ctrl8_xl;
-    lsm6ds3tr_c_ctrl9_xl_t ctrl9_xl;
-    lsm6ds3tr_c_ctrl10_c_t ctrl10_c;
-    lsm6ds3tr_c_master_config_t master_config;
-    lsm6ds3tr_c_wake_up_src_t wake_up_src;
-    lsm6ds3tr_c_tap_src_t tap_src;
-    lsm6ds3tr_c_d6d_src_t d6d_src;
-    lsm6ds3tr_c_status_reg_t status_reg;
-    lsm6ds3tr_c_sensorhub1_reg_t sensorhub1_reg;
-    lsm6ds3tr_c_sensorhub2_reg_t sensorhub2_reg;
-    lsm6ds3tr_c_sensorhub3_reg_t sensorhub3_reg;
-    lsm6ds3tr_c_sensorhub4_reg_t sensorhub4_reg;
-    lsm6ds3tr_c_sensorhub5_reg_t sensorhub5_reg;
-    lsm6ds3tr_c_sensorhub6_reg_t sensorhub6_reg;
-    lsm6ds3tr_c_sensorhub7_reg_t sensorhub7_reg;
-    lsm6ds3tr_c_sensorhub8_reg_t sensorhub8_reg;
-    lsm6ds3tr_c_sensorhub9_reg_t sensorhub9_reg;
-    lsm6ds3tr_c_sensorhub10_reg_t sensorhub10_reg;
-    lsm6ds3tr_c_sensorhub11_reg_t sensorhub11_reg;
-    lsm6ds3tr_c_sensorhub12_reg_t sensorhub12_reg;
-    lsm6ds3tr_c_fifo_status1_t fifo_status1;
-    lsm6ds3tr_c_fifo_status2_t fifo_status2;
-    lsm6ds3tr_c_fifo_status3_t fifo_status3;
-    lsm6ds3tr_c_fifo_status4_t fifo_status4;
-    lsm6ds3tr_c_sensorhub13_reg_t sensorhub13_reg;
-    lsm6ds3tr_c_sensorhub14_reg_t sensorhub14_reg;
-    lsm6ds3tr_c_sensorhub15_reg_t sensorhub15_reg;
-    lsm6ds3tr_c_sensorhub16_reg_t sensorhub16_reg;
-    lsm6ds3tr_c_sensorhub17_reg_t sensorhub17_reg;
-    lsm6ds3tr_c_sensorhub18_reg_t sensorhub18_reg;
-    lsm6ds3tr_c_func_src1_t func_src1;
-    lsm6ds3tr_c_func_src2_t func_src2;
-    lsm6ds3tr_c_wrist_tilt_ia_t wrist_tilt_ia;
-    lsm6ds3tr_c_tap_cfg_t tap_cfg;
-    lsm6ds3tr_c_tap_ths_6d_t tap_ths_6d;
-    lsm6ds3tr_c_int_dur2_t int_dur2;
-    lsm6ds3tr_c_wake_up_ths_t wake_up_ths;
-    lsm6ds3tr_c_wake_up_dur_t wake_up_dur;
-    lsm6ds3tr_c_free_fall_t free_fall;
-    lsm6ds3tr_c_md1_cfg_t md1_cfg;
-    lsm6ds3tr_c_md2_cfg_t md2_cfg;
-    lsm6ds3tr_c_master_cmd_code_t master_cmd_code;
-    lsm6ds3tr_c_sens_sync_spi_error_code_t sens_sync_spi_error_code;
-    lsm6ds3tr_c_slv0_add_t slv0_add;
-    lsm6ds3tr_c_slv0_subadd_t slv0_subadd;
-    lsm6ds3tr_c_slave0_config_t slave0_config;
-    lsm6ds3tr_c_slv1_add_t slv1_add;
-    lsm6ds3tr_c_slv1_subadd_t slv1_subadd;
-    lsm6ds3tr_c_slave1_config_t slave1_config;
-    lsm6ds3tr_c_slv2_add_t slv2_add;
-    lsm6ds3tr_c_slv2_subadd_t slv2_subadd;
-    lsm6ds3tr_c_slave2_config_t slave2_config;
-    lsm6ds3tr_c_slv3_add_t slv3_add;
-    lsm6ds3tr_c_slv3_subadd_t slv3_subadd;
-    lsm6ds3tr_c_slave3_config_t slave3_config;
-    lsm6ds3tr_c_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0;
-    lsm6ds3tr_c_config_pedo_ths_min_t config_pedo_ths_min;
-    lsm6ds3tr_c_pedo_deb_reg_t pedo_deb_reg;
-    lsm6ds3tr_c_a_wrist_tilt_mask_t a_wrist_tilt_mask;
-    bitwise_t bitwise;
-    uint8_t byte;
-} lsm6ds3tr_c_reg_t;
-
-/**
-  * @}
-  *
-  */
-
-int32_t lsm6ds3tr_c_read_reg(stmdev_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len);
-int32_t lsm6ds3tr_c_write_reg(stmdev_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len);
-
-float_t lsm6ds3tr_c_from_fs2g_to_mg(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs4g_to_mg(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs8g_to_mg(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs16g_to_mg(int16_t lsb);
-
-float_t lsm6ds3tr_c_from_fs125dps_to_mdps(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs250dps_to_mdps(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs500dps_to_mdps(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs1000dps_to_mdps(int16_t lsb);
-float_t lsm6ds3tr_c_from_fs2000dps_to_mdps(int16_t lsb);
-
-float_t lsm6ds3tr_c_from_lsb_to_celsius(int16_t lsb);
-
-typedef enum {
-    LSM6DS3TR_C_2g = 0,
-    LSM6DS3TR_C_16g = 1,
-    LSM6DS3TR_C_4g = 2,
-    LSM6DS3TR_C_8g = 3,
-    LSM6DS3TR_C_XL_FS_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_fs_xl_t;
-int32_t lsm6ds3tr_c_xl_full_scale_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_xl_t val);
-int32_t lsm6ds3tr_c_xl_full_scale_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_xl_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_ODR_OFF = 0,
-    LSM6DS3TR_C_XL_ODR_12Hz5 = 1,
-    LSM6DS3TR_C_XL_ODR_26Hz = 2,
-    LSM6DS3TR_C_XL_ODR_52Hz = 3,
-    LSM6DS3TR_C_XL_ODR_104Hz = 4,
-    LSM6DS3TR_C_XL_ODR_208Hz = 5,
-    LSM6DS3TR_C_XL_ODR_416Hz = 6,
-    LSM6DS3TR_C_XL_ODR_833Hz = 7,
-    LSM6DS3TR_C_XL_ODR_1k66Hz = 8,
-    LSM6DS3TR_C_XL_ODR_3k33Hz = 9,
-    LSM6DS3TR_C_XL_ODR_6k66Hz = 10,
-    LSM6DS3TR_C_XL_ODR_1Hz6 = 11,
-    LSM6DS3TR_C_XL_ODR_ND = 12, /* ERROR CODE */
-} lsm6ds3tr_c_odr_xl_t;
-int32_t lsm6ds3tr_c_xl_data_rate_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_xl_t val);
-int32_t lsm6ds3tr_c_xl_data_rate_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_xl_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_250dps = 0,
-    LSM6DS3TR_C_125dps = 1,
-    LSM6DS3TR_C_500dps = 2,
-    LSM6DS3TR_C_1000dps = 4,
-    LSM6DS3TR_C_2000dps = 6,
-    LSM6DS3TR_C_GY_FS_ND = 7, /* ERROR CODE */
-} lsm6ds3tr_c_fs_g_t;
-int32_t lsm6ds3tr_c_gy_full_scale_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_g_t val);
-int32_t lsm6ds3tr_c_gy_full_scale_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_fs_g_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_GY_ODR_OFF = 0,
-    LSM6DS3TR_C_GY_ODR_12Hz5 = 1,
-    LSM6DS3TR_C_GY_ODR_26Hz = 2,
-    LSM6DS3TR_C_GY_ODR_52Hz = 3,
-    LSM6DS3TR_C_GY_ODR_104Hz = 4,
-    LSM6DS3TR_C_GY_ODR_208Hz = 5,
-    LSM6DS3TR_C_GY_ODR_416Hz = 6,
-    LSM6DS3TR_C_GY_ODR_833Hz = 7,
-    LSM6DS3TR_C_GY_ODR_1k66Hz = 8,
-    LSM6DS3TR_C_GY_ODR_3k33Hz = 9,
-    LSM6DS3TR_C_GY_ODR_6k66Hz = 10,
-    LSM6DS3TR_C_GY_ODR_ND = 11, /* ERROR CODE */
-} lsm6ds3tr_c_odr_g_t;
-int32_t lsm6ds3tr_c_gy_data_rate_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_g_t val);
-int32_t lsm6ds3tr_c_gy_data_rate_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_g_t* val);
-
-int32_t lsm6ds3tr_c_block_data_update_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_block_data_update_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_LSb_1mg = 0,
-    LSM6DS3TR_C_LSb_16mg = 1,
-    LSM6DS3TR_C_WEIGHT_ND = 2,
-} lsm6ds3tr_c_usr_off_w_t;
-int32_t lsm6ds3tr_c_xl_offset_weight_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_usr_off_w_t val);
-int32_t lsm6ds3tr_c_xl_offset_weight_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_usr_off_w_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_HIGH_PERFORMANCE = 0,
-    LSM6DS3TR_C_XL_NORMAL = 1,
-    LSM6DS3TR_C_XL_PW_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_xl_hm_mode_t;
-int32_t lsm6ds3tr_c_xl_power_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_xl_hm_mode_t val);
-int32_t lsm6ds3tr_c_xl_power_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_xl_hm_mode_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_STAT_RND_DISABLE = 0,
-    LSM6DS3TR_C_STAT_RND_ENABLE = 1,
-    LSM6DS3TR_C_STAT_RND_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_rounding_status_t;
-int32_t lsm6ds3tr_c_rounding_on_status_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_status_t val);
-int32_t lsm6ds3tr_c_rounding_on_status_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_status_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_GY_HIGH_PERFORMANCE = 0,
-    LSM6DS3TR_C_GY_NORMAL = 1,
-    LSM6DS3TR_C_GY_PW_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_g_hm_mode_t;
-int32_t lsm6ds3tr_c_gy_power_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_g_hm_mode_t val);
-int32_t lsm6ds3tr_c_gy_power_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_g_hm_mode_t* val);
-
-typedef struct {
-    lsm6ds3tr_c_wake_up_src_t wake_up_src;
-    lsm6ds3tr_c_tap_src_t tap_src;
-    lsm6ds3tr_c_d6d_src_t d6d_src;
-    lsm6ds3tr_c_status_reg_t status_reg;
-    lsm6ds3tr_c_func_src1_t func_src1;
-    lsm6ds3tr_c_func_src2_t func_src2;
-    lsm6ds3tr_c_wrist_tilt_ia_t wrist_tilt_ia;
-    lsm6ds3tr_c_a_wrist_tilt_mask_t a_wrist_tilt_mask;
-} lsm6ds3tr_c_all_sources_t;
-int32_t lsm6ds3tr_c_all_sources_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_all_sources_t* val);
-
-int32_t lsm6ds3tr_c_status_reg_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_status_reg_t* val);
-
-int32_t lsm6ds3tr_c_xl_flag_data_ready_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_gy_flag_data_ready_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_temp_flag_data_ready_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_xl_usr_offset_set(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_xl_usr_offset_get(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_timestamp_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_timestamp_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_LSB_6ms4 = 0,
-    LSM6DS3TR_C_LSB_25us = 1,
-    LSM6DS3TR_C_TS_RES_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_timer_hr_t;
-int32_t lsm6ds3tr_c_timestamp_res_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_timer_hr_t val);
-int32_t lsm6ds3tr_c_timestamp_res_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_timer_hr_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_ROUND_DISABLE = 0,
-    LSM6DS3TR_C_ROUND_XL = 1,
-    LSM6DS3TR_C_ROUND_GY = 2,
-    LSM6DS3TR_C_ROUND_GY_XL = 3,
-    LSM6DS3TR_C_ROUND_SH1_TO_SH6 = 4,
-    LSM6DS3TR_C_ROUND_XL_SH1_TO_SH6 = 5,
-    LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH12 = 6,
-    LSM6DS3TR_C_ROUND_GY_XL_SH1_TO_SH6 = 7,
-    LSM6DS3TR_C_ROUND_OUT_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_rounding_t;
-int32_t lsm6ds3tr_c_rounding_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_t val);
-int32_t lsm6ds3tr_c_rounding_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_rounding_t* val);
-
-int32_t lsm6ds3tr_c_temperature_raw_get(stmdev_ctx_t* ctx, int16_t* val);
-int32_t lsm6ds3tr_c_angular_rate_raw_get(stmdev_ctx_t* ctx, int16_t* val);
-int32_t lsm6ds3tr_c_acceleration_raw_get(stmdev_ctx_t* ctx, int16_t* val);
-
-int32_t lsm6ds3tr_c_mag_calibrated_raw_get(stmdev_ctx_t* ctx, int16_t* val);
-
-int32_t lsm6ds3tr_c_fifo_raw_data_get(stmdev_ctx_t* ctx, uint8_t* buffer, uint8_t len);
-
-typedef enum {
-    LSM6DS3TR_C_USER_BANK = 0,
-    LSM6DS3TR_C_BANK_A = 4,
-    LSM6DS3TR_C_BANK_B = 5,
-    LSM6DS3TR_C_BANK_ND = 6, /* ERROR CODE */
-} lsm6ds3tr_c_func_cfg_en_t;
-int32_t lsm6ds3tr_c_mem_bank_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_func_cfg_en_t val);
-int32_t lsm6ds3tr_c_mem_bank_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_func_cfg_en_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_DRDY_LATCHED = 0,
-    LSM6DS3TR_C_DRDY_PULSED = 1,
-    LSM6DS3TR_C_DRDY_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_drdy_pulsed_g_t;
-int32_t lsm6ds3tr_c_data_ready_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_drdy_pulsed_g_t val);
-int32_t lsm6ds3tr_c_data_ready_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_drdy_pulsed_g_t* val);
-
-int32_t lsm6ds3tr_c_device_id_get(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_reset_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_reset_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_LSB_AT_LOW_ADD = 0,
-    LSM6DS3TR_C_MSB_AT_LOW_ADD = 1,
-    LSM6DS3TR_C_DATA_FMT_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_ble_t;
-int32_t lsm6ds3tr_c_data_format_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_ble_t val);
-int32_t lsm6ds3tr_c_data_format_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_ble_t* val);
-
-int32_t lsm6ds3tr_c_auto_increment_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_auto_increment_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_boot_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_boot_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_ST_DISABLE = 0,
-    LSM6DS3TR_C_XL_ST_POSITIVE = 1,
-    LSM6DS3TR_C_XL_ST_NEGATIVE = 2,
-    LSM6DS3TR_C_XL_ST_ND = 3, /* ERROR CODE */
-} lsm6ds3tr_c_st_xl_t;
-int32_t lsm6ds3tr_c_xl_self_test_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_xl_t val);
-int32_t lsm6ds3tr_c_xl_self_test_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_xl_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_GY_ST_DISABLE = 0,
-    LSM6DS3TR_C_GY_ST_POSITIVE = 1,
-    LSM6DS3TR_C_GY_ST_NEGATIVE = 3,
-    LSM6DS3TR_C_GY_ST_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_st_g_t;
-int32_t lsm6ds3tr_c_gy_self_test_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_g_t val);
-int32_t lsm6ds3tr_c_gy_self_test_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_st_g_t* val);
-
-int32_t lsm6ds3tr_c_filter_settling_mask_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_filter_settling_mask_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_USE_SLOPE = 0,
-    LSM6DS3TR_C_USE_HPF = 1,
-    LSM6DS3TR_C_HP_PATH_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_slope_fds_t;
-int32_t lsm6ds3tr_c_xl_hp_path_internal_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slope_fds_t val);
-int32_t lsm6ds3tr_c_xl_hp_path_internal_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slope_fds_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_ANA_BW_1k5Hz = 0,
-    LSM6DS3TR_C_XL_ANA_BW_400Hz = 1,
-    LSM6DS3TR_C_XL_ANA_BW_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_bw0_xl_t;
-int32_t lsm6ds3tr_c_xl_filter_analog_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_bw0_xl_t val);
-int32_t lsm6ds3tr_c_xl_filter_analog_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_bw0_xl_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_LP1_ODR_DIV_2 = 0,
-    LSM6DS3TR_C_XL_LP1_ODR_DIV_4 = 1,
-    LSM6DS3TR_C_XL_LP1_NA = 2, /* ERROR CODE */
-} lsm6ds3tr_c_lpf1_bw_sel_t;
-int32_t lsm6ds3tr_c_xl_lp1_bandwidth_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_bw_sel_t val);
-int32_t lsm6ds3tr_c_xl_lp1_bandwidth_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_bw_sel_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_50 = 0x00,
-    LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_100 = 0x01,
-    LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_9 = 0x02,
-    LSM6DS3TR_C_XL_LOW_LAT_LP_ODR_DIV_400 = 0x03,
-    LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_50 = 0x10,
-    LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_100 = 0x11,
-    LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_9 = 0x12,
-    LSM6DS3TR_C_XL_LOW_NOISE_LP_ODR_DIV_400 = 0x13,
-    LSM6DS3TR_C_XL_LP_NA = 0x20, /* ERROR CODE */
-} lsm6ds3tr_c_input_composite_t;
-int32_t lsm6ds3tr_c_xl_lp2_bandwidth_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_input_composite_t val);
-int32_t lsm6ds3tr_c_xl_lp2_bandwidth_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_input_composite_t* val);
-
-int32_t lsm6ds3tr_c_xl_reference_mode_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_xl_reference_mode_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_HP_ODR_DIV_4 = 0x00, /* Slope filter */
-    LSM6DS3TR_C_XL_HP_ODR_DIV_100 = 0x01,
-    LSM6DS3TR_C_XL_HP_ODR_DIV_9 = 0x02,
-    LSM6DS3TR_C_XL_HP_ODR_DIV_400 = 0x03,
-    LSM6DS3TR_C_XL_HP_NA = 0x10, /* ERROR CODE */
-} lsm6ds3tr_c_hpcf_xl_t;
-int32_t lsm6ds3tr_c_xl_hp_bandwidth_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_hpcf_xl_t val);
-int32_t lsm6ds3tr_c_xl_hp_bandwidth_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_hpcf_xl_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_LP2_ONLY = 0x00,
-
-    LSM6DS3TR_C_HP_16mHz_LP2 = 0x80,
-    LSM6DS3TR_C_HP_65mHz_LP2 = 0x90,
-    LSM6DS3TR_C_HP_260mHz_LP2 = 0xA0,
-    LSM6DS3TR_C_HP_1Hz04_LP2 = 0xB0,
-
-    LSM6DS3TR_C_HP_DISABLE_LP1_LIGHT = 0x0A,
-    LSM6DS3TR_C_HP_DISABLE_LP1_NORMAL = 0x09,
-    LSM6DS3TR_C_HP_DISABLE_LP_STRONG = 0x08,
-    LSM6DS3TR_C_HP_DISABLE_LP1_AGGRESSIVE = 0x0B,
-
-    LSM6DS3TR_C_HP_16mHz_LP1_LIGHT = 0x8A,
-    LSM6DS3TR_C_HP_65mHz_LP1_NORMAL = 0x99,
-    LSM6DS3TR_C_HP_260mHz_LP1_STRONG = 0xA8,
-    LSM6DS3TR_C_HP_1Hz04_LP1_AGGRESSIVE = 0xBB,
-
-    LSM6DS3TR_C_HP_GY_BAND_NA = 0xFF, /* ERROR CODE */
-} lsm6ds3tr_c_lpf1_sel_g_t;
-int32_t lsm6ds3tr_c_gy_band_pass_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_sel_g_t val);
-int32_t lsm6ds3tr_c_gy_band_pass_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_lpf1_sel_g_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_SPI_4_WIRE = 0,
-    LSM6DS3TR_C_SPI_3_WIRE = 1,
-    LSM6DS3TR_C_SPI_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_sim_t;
-int32_t lsm6ds3tr_c_spi_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_sim_t val);
-int32_t lsm6ds3tr_c_spi_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_sim_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_I2C_ENABLE = 0,
-    LSM6DS3TR_C_I2C_DISABLE = 1,
-    LSM6DS3TR_C_I2C_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_i2c_disable_t;
-int32_t lsm6ds3tr_c_i2c_interface_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_i2c_disable_t val);
-int32_t lsm6ds3tr_c_i2c_interface_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_i2c_disable_t* val);
-
-typedef struct {
-    uint8_t int1_drdy_xl : 1;
-    uint8_t int1_drdy_g : 1;
-    uint8_t int1_boot : 1;
-    uint8_t int1_fth : 1;
-    uint8_t int1_fifo_ovr : 1;
-    uint8_t int1_full_flag : 1;
-    uint8_t int1_sign_mot : 1;
-    uint8_t int1_step_detector : 1;
-    uint8_t int1_timer : 1;
-    uint8_t int1_tilt : 1;
-    uint8_t int1_6d : 1;
-    uint8_t int1_double_tap : 1;
-    uint8_t int1_ff : 1;
-    uint8_t int1_wu : 1;
-    uint8_t int1_single_tap : 1;
-    uint8_t int1_inact_state : 1;
-    uint8_t den_drdy_int1 : 1;
-    uint8_t drdy_on_int1 : 1;
-} lsm6ds3tr_c_int1_route_t;
-int32_t lsm6ds3tr_c_pin_int1_route_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_int1_route_t val);
-int32_t lsm6ds3tr_c_pin_int1_route_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_int1_route_t* val);
-
-typedef struct {
-    uint8_t int2_drdy_xl : 1;
-    uint8_t int2_drdy_g : 1;
-    uint8_t int2_drdy_temp : 1;
-    uint8_t int2_fth : 1;
-    uint8_t int2_fifo_ovr : 1;
-    uint8_t int2_full_flag : 1;
-    uint8_t int2_step_count_ov : 1;
-    uint8_t int2_step_delta : 1;
-    uint8_t int2_iron : 1;
-    uint8_t int2_tilt : 1;
-    uint8_t int2_6d : 1;
-    uint8_t int2_double_tap : 1;
-    uint8_t int2_ff : 1;
-    uint8_t int2_wu : 1;
-    uint8_t int2_single_tap : 1;
-    uint8_t int2_inact_state : 1;
-    uint8_t int2_wrist_tilt : 1;
-} lsm6ds3tr_c_int2_route_t;
-int32_t lsm6ds3tr_c_pin_int2_route_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_int2_route_t val);
-int32_t lsm6ds3tr_c_pin_int2_route_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_int2_route_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_PUSH_PULL = 0,
-    LSM6DS3TR_C_OPEN_DRAIN = 1,
-    LSM6DS3TR_C_PIN_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_pp_od_t;
-int32_t lsm6ds3tr_c_pin_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_pp_od_t val);
-int32_t lsm6ds3tr_c_pin_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_pp_od_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_ACTIVE_HIGH = 0,
-    LSM6DS3TR_C_ACTIVE_LOW = 1,
-    LSM6DS3TR_C_POLARITY_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_h_lactive_t;
-int32_t lsm6ds3tr_c_pin_polarity_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_h_lactive_t val);
-int32_t lsm6ds3tr_c_pin_polarity_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_h_lactive_t* val);
-
-int32_t lsm6ds3tr_c_all_on_int1_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_all_on_int1_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_INT_PULSED = 0,
-    LSM6DS3TR_C_INT_LATCHED = 1,
-    LSM6DS3TR_C_INT_MODE = 2, /* ERROR CODE */
-} lsm6ds3tr_c_lir_t;
-int32_t lsm6ds3tr_c_int_notification_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_lir_t val);
-int32_t lsm6ds3tr_c_int_notification_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_lir_t* val);
-
-int32_t lsm6ds3tr_c_wkup_threshold_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_wkup_threshold_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_wkup_dur_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_wkup_dur_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_gy_sleep_mode_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_gy_sleep_mode_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_PROPERTY_DISABLE = 0,
-    LSM6DS3TR_C_XL_12Hz5_GY_NOT_AFFECTED = 1,
-    LSM6DS3TR_C_XL_12Hz5_GY_SLEEP = 2,
-    LSM6DS3TR_C_XL_12Hz5_GY_PD = 3,
-    LSM6DS3TR_C_ACT_MODE_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_inact_en_t;
-int32_t lsm6ds3tr_c_act_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_inact_en_t val);
-int32_t lsm6ds3tr_c_act_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_inact_en_t* val);
-
-int32_t lsm6ds3tr_c_act_sleep_dur_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_act_sleep_dur_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_src_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_tap_src_t* val);
-
-int32_t lsm6ds3tr_c_tap_detection_on_z_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_detection_on_z_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_detection_on_y_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_detection_on_y_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_detection_on_x_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_detection_on_x_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_threshold_x_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_threshold_x_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_shock_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_shock_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_quiet_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_quiet_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tap_dur_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tap_dur_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_ONLY_SINGLE = 0,
-    LSM6DS3TR_C_BOTH_SINGLE_DOUBLE = 1,
-    LSM6DS3TR_C_TAP_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_single_double_tap_t;
-int32_t lsm6ds3tr_c_tap_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_single_double_tap_t val);
-int32_t lsm6ds3tr_c_tap_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_single_double_tap_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_ODR_DIV_2_FEED = 0,
-    LSM6DS3TR_C_LPF2_FEED = 1,
-    LSM6DS3TR_C_6D_FEED_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_low_pass_on_6d_t;
-int32_t lsm6ds3tr_c_6d_feed_data_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_low_pass_on_6d_t val);
-int32_t lsm6ds3tr_c_6d_feed_data_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_low_pass_on_6d_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_DEG_80 = 0,
-    LSM6DS3TR_C_DEG_70 = 1,
-    LSM6DS3TR_C_DEG_60 = 2,
-    LSM6DS3TR_C_DEG_50 = 3,
-    LSM6DS3TR_C_6D_TH_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_sixd_ths_t;
-int32_t lsm6ds3tr_c_6d_threshold_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_sixd_ths_t val);
-int32_t lsm6ds3tr_c_6d_threshold_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_sixd_ths_t* val);
-
-int32_t lsm6ds3tr_c_4d_mode_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_4d_mode_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_ff_dur_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_ff_dur_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_FF_TSH_156mg = 0,
-    LSM6DS3TR_C_FF_TSH_219mg = 1,
-    LSM6DS3TR_C_FF_TSH_250mg = 2,
-    LSM6DS3TR_C_FF_TSH_312mg = 3,
-    LSM6DS3TR_C_FF_TSH_344mg = 4,
-    LSM6DS3TR_C_FF_TSH_406mg = 5,
-    LSM6DS3TR_C_FF_TSH_469mg = 6,
-    LSM6DS3TR_C_FF_TSH_500mg = 7,
-    LSM6DS3TR_C_FF_TSH_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_ff_ths_t;
-int32_t lsm6ds3tr_c_ff_threshold_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_ff_ths_t val);
-int32_t lsm6ds3tr_c_ff_threshold_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_ff_ths_t* val);
-
-int32_t lsm6ds3tr_c_fifo_watermark_set(stmdev_ctx_t* ctx, uint16_t val);
-int32_t lsm6ds3tr_c_fifo_watermark_get(stmdev_ctx_t* ctx, uint16_t* val);
-
-int32_t lsm6ds3tr_c_fifo_data_level_get(stmdev_ctx_t* ctx, uint16_t* val);
-
-int32_t lsm6ds3tr_c_fifo_wtm_flag_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_fifo_pattern_get(stmdev_ctx_t* ctx, uint16_t* val);
-
-int32_t lsm6ds3tr_c_fifo_temp_batch_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_fifo_temp_batch_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_TRG_XL_GY_DRDY = 0,
-    LSM6DS3TR_C_TRG_STEP_DETECT = 1,
-    LSM6DS3TR_C_TRG_SH_DRDY = 2,
-    LSM6DS3TR_C_TRG_SH_ND = 3, /* ERROR CODE */
-} lsm6ds3tr_c_trigger_fifo_t;
-int32_t lsm6ds3tr_c_fifo_write_trigger_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_trigger_fifo_t val);
-int32_t lsm6ds3tr_c_fifo_write_trigger_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_trigger_fifo_t* val);
-
-int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_fifo_pedo_and_timestamp_batch_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_FIFO_XL_DISABLE = 0,
-    LSM6DS3TR_C_FIFO_XL_NO_DEC = 1,
-    LSM6DS3TR_C_FIFO_XL_DEC_2 = 2,
-    LSM6DS3TR_C_FIFO_XL_DEC_3 = 3,
-    LSM6DS3TR_C_FIFO_XL_DEC_4 = 4,
-    LSM6DS3TR_C_FIFO_XL_DEC_8 = 5,
-    LSM6DS3TR_C_FIFO_XL_DEC_16 = 6,
-    LSM6DS3TR_C_FIFO_XL_DEC_32 = 7,
-    LSM6DS3TR_C_FIFO_XL_DEC_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_dec_fifo_xl_t;
-int32_t lsm6ds3tr_c_fifo_xl_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_xl_t val);
-int32_t lsm6ds3tr_c_fifo_xl_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_xl_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_FIFO_GY_DISABLE = 0,
-    LSM6DS3TR_C_FIFO_GY_NO_DEC = 1,
-    LSM6DS3TR_C_FIFO_GY_DEC_2 = 2,
-    LSM6DS3TR_C_FIFO_GY_DEC_3 = 3,
-    LSM6DS3TR_C_FIFO_GY_DEC_4 = 4,
-    LSM6DS3TR_C_FIFO_GY_DEC_8 = 5,
-    LSM6DS3TR_C_FIFO_GY_DEC_16 = 6,
-    LSM6DS3TR_C_FIFO_GY_DEC_32 = 7,
-    LSM6DS3TR_C_FIFO_GY_DEC_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_dec_fifo_gyro_t;
-int32_t lsm6ds3tr_c_fifo_gy_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_gyro_t val);
-int32_t lsm6ds3tr_c_fifo_gy_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_fifo_gyro_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_FIFO_DS3_DISABLE = 0,
-    LSM6DS3TR_C_FIFO_DS3_NO_DEC = 1,
-    LSM6DS3TR_C_FIFO_DS3_DEC_2 = 2,
-    LSM6DS3TR_C_FIFO_DS3_DEC_3 = 3,
-    LSM6DS3TR_C_FIFO_DS3_DEC_4 = 4,
-    LSM6DS3TR_C_FIFO_DS3_DEC_8 = 5,
-    LSM6DS3TR_C_FIFO_DS3_DEC_16 = 6,
-    LSM6DS3TR_C_FIFO_DS3_DEC_32 = 7,
-    LSM6DS3TR_C_FIFO_DS3_DEC_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_dec_ds3_fifo_t;
-int32_t lsm6ds3tr_c_fifo_dataset_3_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds3_fifo_t val);
-int32_t lsm6ds3tr_c_fifo_dataset_3_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds3_fifo_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_FIFO_DS4_DISABLE = 0,
-    LSM6DS3TR_C_FIFO_DS4_NO_DEC = 1,
-    LSM6DS3TR_C_FIFO_DS4_DEC_2 = 2,
-    LSM6DS3TR_C_FIFO_DS4_DEC_3 = 3,
-    LSM6DS3TR_C_FIFO_DS4_DEC_4 = 4,
-    LSM6DS3TR_C_FIFO_DS4_DEC_8 = 5,
-    LSM6DS3TR_C_FIFO_DS4_DEC_16 = 6,
-    LSM6DS3TR_C_FIFO_DS4_DEC_32 = 7,
-    LSM6DS3TR_C_FIFO_DS4_DEC_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_dec_ds4_fifo_t;
-int32_t lsm6ds3tr_c_fifo_dataset_4_batch_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds4_fifo_t val);
-int32_t lsm6ds3tr_c_fifo_dataset_4_batch_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_dec_ds4_fifo_t* val);
-
-int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_fifo_xl_gy_8bit_format_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_fifo_stop_on_wtm_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_fifo_stop_on_wtm_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_BYPASS_MODE = 0,
-    LSM6DS3TR_C_FIFO_MODE = 1,
-    LSM6DS3TR_C_STREAM_TO_FIFO_MODE = 3,
-    LSM6DS3TR_C_BYPASS_TO_STREAM_MODE = 4,
-    LSM6DS3TR_C_STREAM_MODE = 6,
-    LSM6DS3TR_C_FIFO_MODE_ND = 8, /* ERROR CODE */
-} lsm6ds3tr_c_fifo_mode_t;
-int32_t lsm6ds3tr_c_fifo_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_fifo_mode_t val);
-int32_t lsm6ds3tr_c_fifo_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_fifo_mode_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_FIFO_DISABLE = 0,
-    LSM6DS3TR_C_FIFO_12Hz5 = 1,
-    LSM6DS3TR_C_FIFO_26Hz = 2,
-    LSM6DS3TR_C_FIFO_52Hz = 3,
-    LSM6DS3TR_C_FIFO_104Hz = 4,
-    LSM6DS3TR_C_FIFO_208Hz = 5,
-    LSM6DS3TR_C_FIFO_416Hz = 6,
-    LSM6DS3TR_C_FIFO_833Hz = 7,
-    LSM6DS3TR_C_FIFO_1k66Hz = 8,
-    LSM6DS3TR_C_FIFO_3k33Hz = 9,
-    LSM6DS3TR_C_FIFO_6k66Hz = 10,
-    LSM6DS3TR_C_FIFO_RATE_ND = 11, /* ERROR CODE */
-} lsm6ds3tr_c_odr_fifo_t;
-int32_t lsm6ds3tr_c_fifo_data_rate_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_fifo_t val);
-int32_t lsm6ds3tr_c_fifo_data_rate_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_odr_fifo_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_DEN_ACT_LOW = 0,
-    LSM6DS3TR_C_DEN_ACT_HIGH = 1,
-    LSM6DS3TR_C_DEN_POL_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_den_lh_t;
-int32_t lsm6ds3tr_c_den_polarity_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_lh_t val);
-int32_t lsm6ds3tr_c_den_polarity_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_lh_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_DEN_DISABLE = 0,
-    LSM6DS3TR_C_LEVEL_FIFO = 6,
-    LSM6DS3TR_C_LEVEL_LETCHED = 3,
-    LSM6DS3TR_C_LEVEL_TRIGGER = 2,
-    LSM6DS3TR_C_EDGE_TRIGGER = 4,
-    LSM6DS3TR_C_DEN_MODE_ND = 5, /* ERROR CODE */
-} lsm6ds3tr_c_den_mode_t;
-int32_t lsm6ds3tr_c_den_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_mode_t val);
-int32_t lsm6ds3tr_c_den_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_mode_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_STAMP_IN_GY_DATA = 0,
-    LSM6DS3TR_C_STAMP_IN_XL_DATA = 1,
-    LSM6DS3TR_C_STAMP_IN_GY_XL_DATA = 2,
-    LSM6DS3TR_C_DEN_STAMP_ND = 3, /* ERROR CODE */
-} lsm6ds3tr_c_den_xl_en_t;
-int32_t lsm6ds3tr_c_den_enable_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_xl_en_t val);
-int32_t lsm6ds3tr_c_den_enable_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_den_xl_en_t* val);
-
-int32_t lsm6ds3tr_c_den_mark_axis_z_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_den_mark_axis_z_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_den_mark_axis_y_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_den_mark_axis_y_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_den_mark_axis_x_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_den_mark_axis_x_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_pedo_step_reset_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_pedo_step_reset_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_pedo_sens_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_pedo_sens_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_pedo_threshold_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_pedo_threshold_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_PEDO_AT_2g = 0,
-    LSM6DS3TR_C_PEDO_AT_4g = 1,
-    LSM6DS3TR_C_PEDO_FS_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_pedo_fs_t;
-int32_t lsm6ds3tr_c_pedo_full_scale_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_pedo_fs_t val);
-int32_t lsm6ds3tr_c_pedo_full_scale_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_pedo_fs_t* val);
-
-int32_t lsm6ds3tr_c_pedo_debounce_steps_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_pedo_debounce_steps_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_pedo_timeout_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_pedo_timeout_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_pedo_steps_period_set(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_pedo_steps_period_get(stmdev_ctx_t* ctx, uint8_t* buff);
-
-int32_t lsm6ds3tr_c_motion_sens_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_motion_sens_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_motion_threshold_set(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_motion_threshold_get(stmdev_ctx_t* ctx, uint8_t* buff);
-
-int32_t lsm6ds3tr_c_tilt_sens_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_tilt_sens_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_wrist_tilt_sens_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_wrist_tilt_sens_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_tilt_latency_set(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_tilt_latency_get(stmdev_ctx_t* ctx, uint8_t* buff);
-
-int32_t lsm6ds3tr_c_tilt_threshold_set(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_tilt_threshold_get(stmdev_ctx_t* ctx, uint8_t* buff);
-
-int32_t lsm6ds3tr_c_tilt_src_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_a_wrist_tilt_mask_t* val);
-int32_t lsm6ds3tr_c_tilt_src_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_a_wrist_tilt_mask_t* val);
-
-int32_t lsm6ds3tr_c_mag_soft_iron_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_mag_soft_iron_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_mag_hard_iron_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_mag_hard_iron_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_mag_soft_iron_mat_set(stmdev_ctx_t* ctx, uint8_t* buff);
-int32_t lsm6ds3tr_c_mag_soft_iron_mat_get(stmdev_ctx_t* ctx, uint8_t* buff);
-
-int32_t lsm6ds3tr_c_mag_offset_set(stmdev_ctx_t* ctx, int16_t* val);
-int32_t lsm6ds3tr_c_mag_offset_get(stmdev_ctx_t* ctx, int16_t* val);
-
-int32_t lsm6ds3tr_c_func_en_set(stmdev_ctx_t* ctx, uint8_t val);
-
-int32_t lsm6ds3tr_c_sh_sync_sens_frame_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_sh_sync_sens_frame_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_RES_RATIO_2_11 = 0,
-    LSM6DS3TR_C_RES_RATIO_2_12 = 1,
-    LSM6DS3TR_C_RES_RATIO_2_13 = 2,
-    LSM6DS3TR_C_RES_RATIO_2_14 = 3,
-    LSM6DS3TR_C_RES_RATIO_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_rr_t;
-int32_t lsm6ds3tr_c_sh_sync_sens_ratio_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_rr_t val);
-int32_t lsm6ds3tr_c_sh_sync_sens_ratio_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_rr_t* val);
-
-int32_t lsm6ds3tr_c_sh_master_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_sh_master_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_sh_pass_through_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_sh_pass_through_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_EXT_PULL_UP = 0,
-    LSM6DS3TR_C_INTERNAL_PULL_UP = 1,
-    LSM6DS3TR_C_SH_PIN_MODE = 2, /* ERROR CODE */
-} lsm6ds3tr_c_pull_up_en_t;
-int32_t lsm6ds3tr_c_sh_pin_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_pull_up_en_t val);
-int32_t lsm6ds3tr_c_sh_pin_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_pull_up_en_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_XL_GY_DRDY = 0,
-    LSM6DS3TR_C_EXT_ON_INT2_PIN = 1,
-    LSM6DS3TR_C_SH_SYNCRO_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_start_config_t;
-int32_t lsm6ds3tr_c_sh_syncro_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_start_config_t val);
-int32_t lsm6ds3tr_c_sh_syncro_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_start_config_t* val);
-
-int32_t lsm6ds3tr_c_sh_drdy_on_int1_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_sh_drdy_on_int1_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef struct {
-    lsm6ds3tr_c_sensorhub1_reg_t sh_byte_1;
-    lsm6ds3tr_c_sensorhub2_reg_t sh_byte_2;
-    lsm6ds3tr_c_sensorhub3_reg_t sh_byte_3;
-    lsm6ds3tr_c_sensorhub4_reg_t sh_byte_4;
-    lsm6ds3tr_c_sensorhub5_reg_t sh_byte_5;
-    lsm6ds3tr_c_sensorhub6_reg_t sh_byte_6;
-    lsm6ds3tr_c_sensorhub7_reg_t sh_byte_7;
-    lsm6ds3tr_c_sensorhub8_reg_t sh_byte_8;
-    lsm6ds3tr_c_sensorhub9_reg_t sh_byte_9;
-    lsm6ds3tr_c_sensorhub10_reg_t sh_byte_10;
-    lsm6ds3tr_c_sensorhub11_reg_t sh_byte_11;
-    lsm6ds3tr_c_sensorhub12_reg_t sh_byte_12;
-    lsm6ds3tr_c_sensorhub13_reg_t sh_byte_13;
-    lsm6ds3tr_c_sensorhub14_reg_t sh_byte_14;
-    lsm6ds3tr_c_sensorhub15_reg_t sh_byte_15;
-    lsm6ds3tr_c_sensorhub16_reg_t sh_byte_16;
-    lsm6ds3tr_c_sensorhub17_reg_t sh_byte_17;
-    lsm6ds3tr_c_sensorhub18_reg_t sh_byte_18;
-} lsm6ds3tr_c_emb_sh_read_t;
-int32_t lsm6ds3tr_c_sh_read_data_raw_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_emb_sh_read_t* val);
-
-int32_t lsm6ds3tr_c_sh_cmd_sens_sync_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_sh_cmd_sens_sync_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-int32_t lsm6ds3tr_c_sh_spi_sync_error_set(stmdev_ctx_t* ctx, uint8_t val);
-int32_t lsm6ds3tr_c_sh_spi_sync_error_get(stmdev_ctx_t* ctx, uint8_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_SLV_0 = 0,
-    LSM6DS3TR_C_SLV_0_1 = 1,
-    LSM6DS3TR_C_SLV_0_1_2 = 2,
-    LSM6DS3TR_C_SLV_0_1_2_3 = 3,
-    LSM6DS3TR_C_SLV_EN_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_aux_sens_on_t;
-int32_t lsm6ds3tr_c_sh_num_of_dev_connected_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_aux_sens_on_t val);
-int32_t lsm6ds3tr_c_sh_num_of_dev_connected_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_aux_sens_on_t* val);
-
-typedef struct {
-    uint8_t slv0_add;
-    uint8_t slv0_subadd;
-    uint8_t slv0_data;
-} lsm6ds3tr_c_sh_cfg_write_t;
-int32_t lsm6ds3tr_c_sh_cfg_write(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_write_t* val);
-
-typedef struct {
-    uint8_t slv_add;
-    uint8_t slv_subadd;
-    uint8_t slv_len;
-} lsm6ds3tr_c_sh_cfg_read_t;
-int32_t lsm6ds3tr_c_sh_slv0_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val);
-int32_t lsm6ds3tr_c_sh_slv1_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val);
-int32_t lsm6ds3tr_c_sh_slv2_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val);
-int32_t lsm6ds3tr_c_sh_slv3_cfg_read(stmdev_ctx_t* ctx, lsm6ds3tr_c_sh_cfg_read_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_SL0_NO_DEC = 0,
-    LSM6DS3TR_C_SL0_DEC_2 = 1,
-    LSM6DS3TR_C_SL0_DEC_4 = 2,
-    LSM6DS3TR_C_SL0_DEC_8 = 3,
-    LSM6DS3TR_C_SL0_DEC_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_slave0_rate_t;
-int32_t lsm6ds3tr_c_sh_slave_0_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave0_rate_t val);
-int32_t lsm6ds3tr_c_sh_slave_0_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave0_rate_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_EACH_SH_CYCLE = 0,
-    LSM6DS3TR_C_ONLY_FIRST_CYCLE = 1,
-    LSM6DS3TR_C_SH_WR_MODE_ND = 2, /* ERROR CODE */
-} lsm6ds3tr_c_write_once_t;
-int32_t lsm6ds3tr_c_sh_write_mode_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_write_once_t val);
-int32_t lsm6ds3tr_c_sh_write_mode_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_write_once_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_SL1_NO_DEC = 0,
-    LSM6DS3TR_C_SL1_DEC_2 = 1,
-    LSM6DS3TR_C_SL1_DEC_4 = 2,
-    LSM6DS3TR_C_SL1_DEC_8 = 3,
-    LSM6DS3TR_C_SL1_DEC_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_slave1_rate_t;
-int32_t lsm6ds3tr_c_sh_slave_1_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave1_rate_t val);
-int32_t lsm6ds3tr_c_sh_slave_1_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave1_rate_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_SL2_NO_DEC = 0,
-    LSM6DS3TR_C_SL2_DEC_2 = 1,
-    LSM6DS3TR_C_SL2_DEC_4 = 2,
-    LSM6DS3TR_C_SL2_DEC_8 = 3,
-    LSM6DS3TR_C_SL2_DEC_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_slave2_rate_t;
-int32_t lsm6ds3tr_c_sh_slave_2_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave2_rate_t val);
-int32_t lsm6ds3tr_c_sh_slave_2_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave2_rate_t* val);
-
-typedef enum {
-    LSM6DS3TR_C_SL3_NO_DEC = 0,
-    LSM6DS3TR_C_SL3_DEC_2 = 1,
-    LSM6DS3TR_C_SL3_DEC_4 = 2,
-    LSM6DS3TR_C_SL3_DEC_8 = 3,
-    LSM6DS3TR_C_SL3_DEC_ND = 4, /* ERROR CODE */
-} lsm6ds3tr_c_slave3_rate_t;
-int32_t lsm6ds3tr_c_sh_slave_3_dec_set(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave3_rate_t val);
-int32_t lsm6ds3tr_c_sh_slave_3_dec_get(stmdev_ctx_t* ctx, lsm6ds3tr_c_slave3_rate_t* val);
-
-/**
-  * @}
-  *
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* LSM6DS3TR_C_DRIVER_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

tracking/imu/imu_lsm6ds3trc.c → tracking/imu/lsm6ds3trc.c

@@ -1,33 +1,27 @@
-#include "lsm6ds3tr_c_reg.h"
-
-#include <furi_hal.h>
-
 #include "imu.h"
+#include "../../lib/lsm6ds3tr-api/lsm6ds3tr-c_reg.h"
 
-#define TAG "LSM6DS3TR-C"
-
-#define LSM6DS3_ADDRESS (0x6A << 1)
-
-static const double DEG_TO_RAD = 0.017453292519943295769236907684886;
+#define LSM6DS3_TAG "LSM6DS3"
+#define LSM6DS3_DEV_ADDRESS (0x6A << 1)
 
 stmdev_ctx_t lsm6ds3trc_ctx;
 
 int32_t lsm6ds3trc_write_i2c(void* handle, uint8_t reg_addr, const uint8_t* data, uint16_t len) {
-    if(furi_hal_i2c_write_mem(handle, LSM6DS3_ADDRESS, reg_addr, (uint8_t*)data, len, 50))
+    if(furi_hal_i2c_write_mem(handle, LSM6DS3_DEV_ADDRESS, reg_addr, (uint8_t*)data, len, 50))
         return 0;
     return -1;
 }
 
 int32_t lsm6ds3trc_read_i2c(void* handle, uint8_t reg_addr, uint8_t* read_data, uint16_t len) {
-    if(furi_hal_i2c_read_mem(handle, LSM6DS3_ADDRESS, reg_addr, read_data, len, 50)) return 0;
+    if(furi_hal_i2c_read_mem(handle, LSM6DS3_DEV_ADDRESS, reg_addr, read_data, len, 50)) return 0;
     return -1;
 }
 
 bool lsm6ds3trc_begin() {
-    FURI_LOG_I(TAG, "Init LSM6DS3TR-C");
+    FURI_LOG_I(LSM6DS3_TAG, "Init LSM6DS3TR-C");
 
-    if(!furi_hal_i2c_is_device_ready(&furi_hal_i2c_handle_external, LSM6DS3_ADDRESS, 50)) {
-        FURI_LOG_E(TAG, "Not ready");
+    if(!furi_hal_i2c_is_device_ready(&furi_hal_i2c_handle_external, LSM6DS3_DEV_ADDRESS, 50)) {
+        FURI_LOG_E(LSM6DS3_TAG, "Not ready");
         return false;
     }
 
@@ -39,7 +33,7 @@ bool lsm6ds3trc_begin() {
     uint8_t whoami;
     lsm6ds3tr_c_device_id_get(&lsm6ds3trc_ctx, &whoami);
     if(whoami != LSM6DS3TR_C_ID) {
-        FURI_LOG_I(TAG, "Unknown model: %x", (int)whoami);
+        FURI_LOG_I(LSM6DS3_TAG, "Unknown model: %x", (int)whoami);
         return false;
     }
 
@@ -59,7 +53,7 @@ bool lsm6ds3trc_begin() {
     lsm6ds3tr_c_gy_power_mode_set(&lsm6ds3trc_ctx, LSM6DS3TR_C_GY_HIGH_PERFORMANCE);
     lsm6ds3tr_c_gy_band_pass_set(&lsm6ds3trc_ctx, LSM6DS3TR_C_LP2_ONLY);
 
-    FURI_LOG_I(TAG, "Init OK");
+    FURI_LOG_I(LSM6DS3_TAG, "Init OK");
     return true;
 }
 
@@ -76,19 +70,22 @@ int lsm6ds3trc_read(double* vec) {
 
     if(reg.status_reg.xlda) {
         lsm6ds3tr_c_acceleration_raw_get(&lsm6ds3trc_ctx, data);
-        vec[2] = (double)lsm6ds3tr_c_from_fs2g_to_mg(data[0]) / 1000;
+        vec[1] = (double)lsm6ds3tr_c_from_fs2g_to_mg(data[0]) / 1000;
         vec[0] = (double)lsm6ds3tr_c_from_fs2g_to_mg(data[1]) / 1000;
-        vec[1] = (double)lsm6ds3tr_c_from_fs2g_to_mg(data[2]) / 1000;
+        vec[2] = -(double)lsm6ds3tr_c_from_fs2g_to_mg(data[2]) / 1000;
         ret |= ACC_DATA_READY;
     }
 
     if(reg.status_reg.gda) {
         lsm6ds3tr_c_angular_rate_raw_get(&lsm6ds3trc_ctx, data);
-        vec[5] = (double)lsm6ds3tr_c_from_fs2000dps_to_mdps(data[0]) * DEG_TO_RAD / 1000;
+        vec[4] = (double)lsm6ds3tr_c_from_fs2000dps_to_mdps(data[0]) * DEG_TO_RAD / 1000;
         vec[3] = (double)lsm6ds3tr_c_from_fs2000dps_to_mdps(data[1]) * DEG_TO_RAD / 1000;
-        vec[4] = (double)lsm6ds3tr_c_from_fs2000dps_to_mdps(data[2]) * DEG_TO_RAD / 1000;
+        vec[5] = -(double)lsm6ds3tr_c_from_fs2000dps_to_mdps(data[2]) * DEG_TO_RAD / 1000;
         ret |= GYR_DATA_READY;
     }
 
     return ret;
 }
+
+struct imu_t imu_lsm6ds3trc =
+    {LSM6DS3_DEV_ADDRESS, lsm6ds3trc_begin, lsm6ds3trc_end, lsm6ds3trc_read, LSM6DS3_TAG};

tracking/imu/lsm6dso.c

@@ -0,0 +1,90 @@
+#include "imu.h"
+#include "../../lib/lsm6dso-api/lsm6dso_reg.h"
+
+#define LSM6DSO_TAG "LSM6DO"
+#define LSM6DSO_DEV_ADDRESS (0x6B << 1)
+
+stmdev_ctx_t lsm6dso_ctx;
+
+int32_t lsm6dso_write_i2c(void* handle, uint8_t reg_addr, uint8_t* data, uint16_t len) {
+    if(furi_hal_i2c_write_mem(handle, LSM6DSO_DEV_ADDRESS, reg_addr, data, len, 50)) return 0;
+    return -2;
+}
+
+int32_t lsm6dso_read_i2c(void* handle, uint8_t reg_addr, uint8_t* read_data, uint16_t len) {
+    if(furi_hal_i2c_read_mem(handle, LSM6DSO_DEV_ADDRESS, reg_addr, read_data, len, 50)) return 0;
+    return -2;
+}
+
+bool lsm6dso_begin() {
+    FURI_LOG_I(LSM6DSO_TAG, "Init LSM6DSOTR-C");
+
+    if(!furi_hal_i2c_is_device_ready(&furi_hal_i2c_handle_external, LSM6DSO_DEV_ADDRESS, 50)) {
+        FURI_LOG_E(LSM6DSO_TAG, "Not ready");
+        return false;
+    }
+
+    lsm6dso_ctx.write_reg = lsm6dso_write_i2c;
+    lsm6dso_ctx.read_reg = lsm6dso_read_i2c;
+    lsm6dso_ctx.mdelay = furi_delay_ms;
+    lsm6dso_ctx.handle = &furi_hal_i2c_handle_external;
+
+    uint8_t whoami;
+    lsm6dso_device_id_get(&lsm6dso_ctx, &whoami);
+    if(whoami != LSM6DSO_ID) {
+        FURI_LOG_I(LSM6DSO_TAG, "Unknown model: %x", (int)whoami);
+        return false;
+    }
+
+    lsm6dso_reset_set(&lsm6dso_ctx, PROPERTY_ENABLE);
+    uint8_t rst = PROPERTY_ENABLE;
+    while(rst) lsm6dso_reset_get(&lsm6dso_ctx, &rst);
+
+    lsm6dso_block_data_update_set(&lsm6dso_ctx, PROPERTY_ENABLE);
+    lsm6dso_fifo_mode_set(&lsm6dso_ctx, LSM6DSO_BYPASS_MODE);
+
+    lsm6dso_xl_data_rate_set(&lsm6dso_ctx, LSM6DSO_XL_ODR_104Hz);
+    lsm6dso_xl_full_scale_set(&lsm6dso_ctx, LSM6DSO_4g);
+    //lsm6dso_xl_lp1_bandwidth_set(&lsm6dso_ctx, LSM6DSO_XL_LP1_ODR_DIV_4);
+
+    lsm6dso_gy_data_rate_set(&lsm6dso_ctx, LSM6DSO_GY_ODR_104Hz);
+    lsm6dso_gy_full_scale_set(&lsm6dso_ctx, LSM6DSO_2000dps);
+    lsm6dso_gy_power_mode_set(&lsm6dso_ctx, LSM6DSO_GY_HIGH_PERFORMANCE);
+    //lsm6dso_gy_band_pass_set(&lsm6dso_ctx, LSM6DSO_LP2_ONLY);
+
+    FURI_LOG_I(LSM6DSO_TAG, "Init OK");
+    return true;
+}
+
+void lsm6dso_end() {
+    lsm6dso_xl_data_rate_set(&lsm6dso_ctx, LSM6DSO_XL_ODR_OFF);
+    lsm6dso_gy_data_rate_set(&lsm6dso_ctx, LSM6DSO_GY_ODR_OFF);
+}
+
+int lsm6dso_read(double* vec) {
+    int ret = 0;
+    int16_t data[3];
+    lsm6dso_reg_t reg;
+    lsm6dso_status_reg_get(&lsm6dso_ctx, &reg.status_reg);
+
+    if(reg.status_reg.xlda) {
+        lsm6dso_acceleration_raw_get(&lsm6dso_ctx, data);
+        vec[2] = (double)lsm6dso_from_fs2_to_mg(data[0]) / 1000;
+        vec[0] = (double)lsm6dso_from_fs2_to_mg(data[1]) / 1000;
+        vec[1] = (double)lsm6dso_from_fs2_to_mg(data[2]) / 1000;
+        ret |= ACC_DATA_READY;
+    }
+
+    if(reg.status_reg.gda) {
+        lsm6dso_angular_rate_raw_get(&lsm6dso_ctx, data);
+        vec[5] = (double)lsm6dso_from_fs2000_to_mdps(data[0]) * DEG_TO_RAD / 1000;
+        vec[3] = (double)lsm6dso_from_fs2000_to_mdps(data[1]) * DEG_TO_RAD / 1000;
+        vec[4] = (double)lsm6dso_from_fs2000_to_mdps(data[2]) * DEG_TO_RAD / 1000;
+        ret |= GYR_DATA_READY;
+    }
+
+    return ret;
+}
+
+struct imu_t imu_lsm6dso =
+    {LSM6DSO_DEV_ADDRESS, lsm6dso_begin, lsm6dso_end, lsm6dso_read, LSM6DSO_TAG};