Remove outdated sources.

cmake-old/ChibiOS/18.2/ChibiOS.cmake

@@ -1,106 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS)
-    SET(ChibiOS_FIND_COMPONENTS nil hal)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-SET (CHIBIOS_COMPONENTS nil rt hal)
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-LIST(FIND ChibiOS_FIND_COMPONENTS hal ChibiOS_FIND_COMPONENTS_hal)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_hal} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS hal)
-ENDIF()
-
-IF(NOT CHIBIOS_HALCONF_FILE)
-    MESSAGE(STATUS "No ChibiOS halconf.h specified, trying to find it...")
-    FILE(GLOB CHIBIOS_HALCONF_FILE "halconf.h")
-    IF (CHIBIOS_HALCONF_FILE STREQUAL "")
-        MESSAGE(FATAL_ERROR "Cannot find halconf.h, please specify it using CHIBIOS_HALCONF_FILE variable")
-    ELSE()
-        MESSAGE(STATUS "Found halconf.h: ${CHIBIOS_HALCONF_FILE}")
-    ENDIF()
-ENDIF()
-    
-IF(NOT CHIBIOS_CHCONF_FILE)
-    MESSAGE(STATUS "No ChibiOS chconf.h specified, trying to find it...")
-    FILE(GLOB CHIBIOS_CHCONF_FILE "chconf.h")
-    IF (CHIBIOS_CHCONF_FILE STREQUAL "")
-        MESSAGE(FATAL_ERROR "Cannot find chconf.h, please specify it using CHIBIOS_CHCONF_FILE variable")
-    ELSE()
-        MESSAGE(STATUS "Found chconf.h: ${CHIBIOS_CHCONF_FILE}")
-    ENDIF()
-ENDIF()
-
-FILE(STRINGS ${CHIBIOS_CHCONF_FILE} CHCONF_LINES REGEX "#define CH_CFG_USE_([a-zA-Z_0-9]+) +TRUE")
-FOREACH(LINE ${CHCONF_LINES})
-    STRING(REGEX REPLACE "#define CH_CFG_USE_([a-zA-Z_0-9]+) +TRUE" "\\1" COMP ${LINE})
-    LIST(APPEND CHIBIOS_RTOS_COMPONENTS ${COMP})
-ENDFOREACH()
-
-MESSAGE(STATUS "Detected ChibiOS RTOS components:")
-FOREACH(COMP ${CHIBIOS_RTOS_COMPONENTS})
-    MESSAGE(STATUS "\t${COMP}")
-ENDFOREACH()
-
-FILE(STRINGS ${CHIBIOS_HALCONF_FILE} HALCONF_LINES REGEX "#define HAL_USE_([a-zA-Z_0-9]+) +TRUE")
-FOREACH(LINE ${HALCONF_LINES})
-    STRING(REGEX REPLACE "#define HAL_USE_([a-zA-Z_0-9]+) +TRUE" "\\1" COMP ${LINE})
-    LIST(APPEND CHIBIOS_HAL_COMPONENTS ${COMP})
-ENDFOREACH()
-
-MESSAGE(STATUS "Detected ChibiOS HAL components:")
-FOREACH(COMP ${CHIBIOS_HAL_COMPONENTS})
-    MESSAGE(STATUS "\t${COMP}")
-ENDFOREACH()
-
-INCLUDE(ChibiOS/18.2/ChibiOS_LD)
-INCLUDE(ChibiOS/18.2/ChibiOS_RTOS)
-INCLUDE(ChibiOS/18.2/ChibiOS_HAL)
-
-MESSAGE(STATUS "RTOS sources: ")
-FOREACH(SOURCE ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}})
-    MESSAGE(STATUS "\t${SOURCE}")
-ENDFOREACH()
-
-MESSAGE(STATUS "HAL sources: ")
-FOREACH(SOURCE ${CHIBIOS_SOURCES_hal})
-    MESSAGE(STATUS "\t${SOURCE}")
-ENDFOREACH()
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS})
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_SOURCES_${comp}})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_ROOT} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    FOREACH(incl ${CHIBIOS_INCLUDES_${comp}})
-        LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_ROOT}/${incl})
-    ENDFOREACH()
-ENDFOREACH()
-
-
-

cmake-old/ChibiOS/18.2/ChibiOS_HAL.cmake

@@ -1,490 +0,0 @@
-SET (CHIBIOS_SOURCES_hal
-    os/hal/src/hal.c
-    os/hal/src/hal_st.c
-    os/hal/src/hal_buffers.c
-    os/hal/src/hal_queues.c
-    os/hal/src/hal_mmcsd.c
-    os/hal/ports/common/ARMCMx/nvic.c
-)
-
-SET (CHIBIOS_INCLUDES_hal
-    os/hal/include
-    os/hal/ports/common/ARMCMx
-)
-
-SET (CHIBIOS_SOURCES_hal_nil
-    os/hal/osal/nil/osal.c
-)
-
-SET (CHIBIOS_SOURCES_hal_rt
-    os/hal/osal/rt/osal.c
-)
-
-SET (CHIBIOS_INCLUDES_hal_nil
-    os/hal/osal/nil
-)
-
-SET (CHIBIOS_INCLUDES_hal_rt
-    os/hal/osal/rt
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC         os/hal/src/hal_adc.c)
-SET (CHIBIOS_SOURCES_hal_CAN         os/hal/src/hal_can.c)
-SET (CHIBIOS_SOURCES_hal_CRY         os/hal/src/hal_crypto.c)
-SET (CHIBIOS_SOURCES_hal_DAC         os/hal/src/hal_dac.c)
-SET (CHIBIOS_SOURCES_hal_EXT         os/hal/src/hal_ext.c)
-SET (CHIBIOS_SOURCES_hal_GPT         os/hal/src/hal_gpt.c)
-SET (CHIBIOS_SOURCES_hal_I2C         os/hal/src/hal_i2c.c)
-SET (CHIBIOS_SOURCES_hal_I2S         os/hal/src/hal_i2s.c)
-SET (CHIBIOS_SOURCES_hal_ICU         os/hal/src/hal_icu.c)
-SET (CHIBIOS_SOURCES_hal_MAC         os/hal/src/hal_mac.c)
-SET (CHIBIOS_SOURCES_hal_MMC_SPI     os/hal/src/hal_mmc_spi.c)
-SET (CHIBIOS_SOURCES_hal_PAL         os/hal/src/hal_pal.c)
-SET (CHIBIOS_SOURCES_hal_PWM         os/hal/src/hal_pwm.c)
-SET (CHIBIOS_SOURCES_hal_QSPI        os/hal/src/hal_qspi.c)
-SET (CHIBIOS_SOURCES_hal_RTC         os/hal/src/hal_rtc.c)
-SET (CHIBIOS_SOURCES_hal_SDC         os/hal/src/hal_sdc.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL      os/hal/src/hal_serial.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_USB  os/hal/src/hal_serial_usb.c)
-SET (CHIBIOS_SOURCES_hal_SPI         os/hal/src/hal_spi.c)
-SET (CHIBIOS_SOURCES_hal_UART        os/hal/src/hal_uart.c)
-SET (CHIBIOS_SOURCES_hal_USB         os/hal/src/hal_usb.c)
-SET (CHIBIOS_SOURCES_hal_WDG         os/hal/src/hal_wdg.c)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_F0
-    os/hal/ports/STM32/STM32F0xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F0
-    os/hal/ports/STM32/STM32F0xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F0xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-SET (CHIBIOS_SOURCES_hal_ADC_F0     os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F0     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F0     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F0     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F0     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F0     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F0     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F0     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F0     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F0     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F0     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F0     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F0  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F0    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F0     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F0     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F0    os/hal/ports/STM32/LLD/ADCv1)
-SET (CHIBIOS_INCLUDES_hal_CAN_F0    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F0    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F0    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F0    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F0    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_RTC_F0    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F0    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_F0    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_GPT_F0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F0 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_F0   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_USB_F0    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F0    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-SET (CHIBIOS_INCLUDES_hal_F1
-    os/hal/ports/STM32/STM32F1xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F1
-    os/hal/ports/STM32/STM32F1xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F1xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-SET (CHIBIOS_SOURCES_hal_ADC_F1     os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F1     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F1     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F1     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F1     os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F1     os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F1     os/hal/ports/STM32/LLD/RTCv1/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F1     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F1     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F1     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F1     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F1     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F1  os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F1    os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F1     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F1     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F1    os/hal/ports/STM32/STM32F1xx)
-SET (CHIBIOS_INCLUDES_hal_CAN_F1    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F1    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F1    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F1    os/hal/ports/STM32/LLD/GPIOv1)
-SET (CHIBIOS_INCLUDES_hal_I2C_F1    os/hal/ports/STM32/LLD/I2Cv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F1    os/hal/ports/STM32/LLD/RTCv1)
-SET (CHIBIOS_INCLUDES_hal_I2S_F1    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_F1    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F1    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F1    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F1    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F1 os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_UART_F1   os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F1    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F1    os/hal/ports/STM32/LLD/xWDGv1)
-
-SET (CHIBIOS_INCLUDES_hal_F2
-    os/hal/ports/STM32/STM32F4xx
-    os/hal/ports/STM32/LLD/DMAv2
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F2
-    os/hal/ports/STM32/STM32F4xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F4xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F2     os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F2     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F2     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F2     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F2     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F2     os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_MAC_F2     os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F2     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_F2    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F2     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F2     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F2     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_F2     os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F2     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F2     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F2     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F2  os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F2    os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F2     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F2    os/hal/ports/STM32/LLD/ADCv2)
-SET (CHIBIOS_INCLUDES_hal_CAN_F2    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F2    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F2    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F2    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F2    os/hal/ports/STM32/LLD/I2Cv1)
-SET (CHIBIOS_INCLUDES_hal_MAC_F2    os/hal/ports/STM32/LLD/MACv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F2    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_F2   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F2    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F2    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_F2    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SDC_F2    os/hal/ports/STM32/LLD/SDIOv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F2    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F2    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F2    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F2 os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_UART_F2   os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F2    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-SET (CHIBIOS_INCLUDES_hal_F3
-    os/hal/ports/STM32/STM32F3xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F3
-    os/hal/ports/STM32/STM32F3xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F3xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F3     os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F3     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F3     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F3     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F3     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F3     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F3     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F3     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F3     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F3     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F3     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F3     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F3  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F3    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F3     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F3     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F3    os/hal/ports/STM32/LLD/ADCv3)
-SET (CHIBIOS_INCLUDES_hal_CAN_F3    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F3    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F3    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F3    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F3    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_RTC_F3    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F3    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_F3    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_GPT_F3    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F3    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F3    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F3 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_F3   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_USB_F3    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F3    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_F4
-    os/hal/ports/STM32/STM32F4xx
-    os/hal/ports/STM32/LLD/DMAv2
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F4
-    os/hal/ports/STM32/STM32F4xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F4xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F4     os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F4     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F4     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F4     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F4     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F4     os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_MAC_F4     os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F4     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_F4    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F4     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F4     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F4     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_F4     os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F4     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F4     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F4     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F4  os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F4    os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F4     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F4    os/hal/ports/STM32/LLD/ADCv2)
-SET (CHIBIOS_INCLUDES_hal_CAN_F4    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F4    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F4    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F4    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F4    os/hal/ports/STM32/LLD/I2Cv1)
-SET (CHIBIOS_INCLUDES_hal_MAC_F4    os/hal/ports/STM32/LLD/MACv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F4    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_F4   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F4    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F4    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_F4    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SDC_F4    os/hal/ports/STM32/LLD/SDIOv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F4 os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_UART_F4   os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F4    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_F7
-    os/hal/ports/STM32/STM32F7xx
-    os/hal/ports/STM32/LLD/DMAv2
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F7
-    os/hal/ports/STM32/STM32F7xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F7xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F7     os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F7     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_CRY_F7     os/hal/ports/STM32/LLD/CRYPv1/hal_crypto_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F7     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F7     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F7     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F7     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_MAC_F7     os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F7     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_F7    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F7     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F7     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F7     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_F7     os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F7     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F7     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F7     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F7  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F7    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F7     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F7    os/hal/ports/STM32/LLD/ADCv2)
-SET (CHIBIOS_INCLUDES_hal_CAN_F7    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_CRY_F7    os/hal/ports/STM32/LLD/CRYPv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F7    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F7    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F7    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F7    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_MAC_F7    os/hal/ports/STM32/LLD/MACv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F7    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_F7   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F7    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F7    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_F7    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SDC_F7    os/hal/ports/STM32/LLD/SDMMCv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F7    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F7    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F7    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F7 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_F7   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_WDG_F7    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_L0
-    os/hal/ports/STM32/STM32L0xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_L0
-    os/hal/ports/STM32/STM32L0xx/stm32_isr.c
-    os/hal/ports/STM32/STM32L0xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_L0     os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_L0     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_L0     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_L0     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_L0     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_L0     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_L0     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_L0     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_L0     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_L0     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_L0     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_L0     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_L0  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_L0    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_L0     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_L0     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_L0    os/hal/ports/STM32/LLD/ADCv1)
-SET (CHIBIOS_INCLUDES_hal_CAN_L0    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_L0    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_L0    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_L0    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_L0    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_RTC_L0    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_L0    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_L0    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_L0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_L0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_L0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_L0 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_L0   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_USB_L0    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_L0    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_L4
-    os/hal/ports/STM32/STM32L4xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_L4
-    os/hal/ports/STM32/STM32L4xx/stm32_isr.c
-    os/hal/ports/STM32/STM32L4xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_L4     os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_L4     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_L4     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_L4     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_L4     os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_L4     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_L4     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_L4    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_L4     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_L4     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_L4     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_L4     os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_L4     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_L4     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_L4     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_L4  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_L4    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_L4     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_L4    os/hal/ports/STM32/LLD/ADCv3)
-SET (CHIBIOS_INCLUDES_hal_CAN_L4    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_L4    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_L4    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_L4    os/hal/ports/STM32/LLD/GPIOv3)
-SET (CHIBIOS_INCLUDES_hal_I2C_L4    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_USB_L4    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_L4   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_L4    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_L4    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_L4    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SDC_L4    os/hal/ports/STM32/LLD/SDMMCv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_L4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_L4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_L4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_L4 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_L4   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_WDG_L4    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-IF (CHIBIOS_SOURCES_hal_${CHIBIOS_KERNEL})
-    LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${CHIBIOS_KERNEL}})
-ENDIF()
-    
-IF (CHIBIOS_INCLUDES_hal_${CHIBIOS_KERNEL})
-    LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${CHIBIOS_KERNEL}})
-ENDIF()
-
-IF (CHIBIOS_SOURCES_hal_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${STM32_FAMILY}})
-ENDIF()
-    
-IF (CHIBIOS_INCLUDES_hal_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${STM32_FAMILY}})
-ENDIF()
-
-FOREACH (COMP ${CHIBIOS_HAL_COMPONENTS})
-    IF (CHIBIOS_SOURCES_hal_${COMP})
-        LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${COMP}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_hal_${COMP})
-        LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${COMP}})
-    ENDIF()
-    
-    IF (CHIBIOS_SOURCES_hal_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_hal_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-ENDFOREACH()
-
-

cmake-old/ChibiOS/18.2/ChibiOS_LD.cmake

@@ -1,57 +0,0 @@
-IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
-    SET(CHIBIOS_PROCESS_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
-    SET(CHIBIOS_MAIN_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/startup/ARMCMx/compilers/GCC/ld\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in
-        "MEMORY\n"
-        "{\n"
-            "flash0  : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-            "flash1  : org = 0x00000000, len = 0\n"
-            "flash2  : org = 0x00000000, len = 0\n"
-            "flash3  : org = 0x00000000, len = 0\n"
-            "flash4  : org = 0x00000000, len = 0\n"
-            "flash5  : org = 0x00000000, len = 0\n"
-            "flash6  : org = 0x00000000, len = 0\n"
-            "flash7  : org = 0x00000000, len = 0\n"
-            "ram0    : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-            "ram1    : org = 0x00000000, len = 0\n"
-            "ram2    : org = 0x00000000, len = 0\n"
-            "ram3    : org = 0x00000000, len = 0\n"
-            "ram4    : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-            "ram5    : org = 0x00000000, len = 0\n"
-            "ram6    : org = 0x00000000, len = 0\n"
-            "ram7    : org = 0x00000000, len = 0\n"
-        "}\n"
-        "REGION_ALIAS(\"VECTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VECTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RAM_INIT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM_LMA\", flash0);\n"
-        "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-        "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-        "INCLUDE rules.ld\n"
-    )
-    SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()

cmake-old/ChibiOS/18.2/ChibiOS_RTOS.cmake

@@ -1,92 +0,0 @@
-FOREACH (FAMILY F0 L0 L4)
-    SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${FAMILY}
-        os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S
-        os/common/ports/ARMCMx/chcore.c
-        os/common/ports/ARMCMx/chcore_v6m.c
-        os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S
-    )
-ENDFOREACH()
-
-FOREACH (FAMILY F1 F2 F3 F4 F7)
-    SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${FAMILY}
-        os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S
-        os/common/ports/ARMCMx/chcore.c
-        os/common/ports/ARMCMx/chcore_v7m.c
-        os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S
-    )
-ENDFOREACH()
-
-FOREACH (FAMILY F0 F1 F2 F3 F4 F7 L0 L1)
-    SET (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${FAMILY}
-        os/common/startup/ARMCMx/devices/STM32${FAMILY}xx
-        os/common/ext/ST/STM32${FAMILY}xx
-        os/common/oslib/include
-        os/common/ports/ARMCMx
-        os/common/ports/ARMCMx/compilers/GCC
-    )
-ENDFOREACH()
-
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}
-    os/common/startup/ARMCMx/compilers/GCC/crt1.c
-    os/common/startup/ARMCMx/compilers/GCC/vectors.S
-)
-
-SET (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}
-    os/license
-    os/common/portability/GCC
-    os/common/startup/ARMCMx/compilers/GCC
-    os/common/ext/ARM/CMSIS/Core/Include
-)
-
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_MAILBOXES  os/common/oslib/src/chmboxes.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_MEMCORE    os/common/oslib/src/chmemcore.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_HEAP       os/common/oslib/src/chheap.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_MEMPOOLS   os/common/oslib/src/chmempools.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_FACTORY    os/common/oslib/src/chfactory.c)
-
-SET (CHIBIOS_SOURCES_rt_TM          os/rt/src/chtm.c)
-SET (CHIBIOS_SOURCES_rt_REGISTRY    os/rt/src/chregistry.c)
-SET (CHIBIOS_SOURCES_rt_SEMAPHORES  os/rt/src/chsem.c)
-SET (CHIBIOS_SOURCES_rt_MUTEXES     os/rt/src/chmtx.c)
-SET (CHIBIOS_SOURCES_rt_CONDVARS    os/rt/src/chcond.c)
-SET (CHIBIOS_SOURCES_rt_EVENTS      os/rt/src/chevents.c)
-SET (CHIBIOS_SOURCES_rt_MESSAGES    os/rt/src/chmsg.c)
-SET (CHIBIOS_SOURCES_rt_DYNAMIC     os/rt/src/chdynamic.c)
-
-LIST (APPEND CHIBIOS_SOURCES_nil     os/nil/src/ch.c)
-LIST (APPEND CHIBIOS_INCLUDES_nil    os/nil/include)
-
-LIST (APPEND CHIBIOS_SOURCES_rt
-    os/rt/src/chsys.c
-    os/rt/src/chdebug.c
-    os/rt/src/chtrace.c
-    os/rt/src/chvt.c
-    os/rt/src/chschd.c
-    os/rt/src/chthreads.c
-)
-
-LIST (APPEND CHIBIOS_INCLUDES_rt     os/rt/include)
-
-IF (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_SOURCES_${CHIBIOS_KERNEL} ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${STM32_FAMILY}})
-ENDIF()
-
-IF (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_INCLUDES_${CHIBIOS_KERNEL} ${CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${STM32_FAMILY}})
-ENDIF()
-
-FOREACH (COMP ${CHIBIOS_RTOS_COMPONENTS})
-    IF (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP})
-        LIST(APPEND CHIBIOS_SOURCES_${CHIBIOS_KERNEL} ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP})
-        LIST(APPEND CHIBIOS_INCLUDES_${CHIBIOS_KERNEL} ${CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP}})
-    ENDIF()
-
-    IF (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_SOURCES_${CHIBIOS_KERNEL} ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_INCLUDES_${CHIBIOS_KERNEL} ${CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-ENDFOREACH()

cmake-old/ChibiOS/ChibiOS16.cmake

@@ -1,81 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS)
-    SET(ChibiOS_FIND_COMPONENTS nil hal st)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-LIST(FIND ChibiOS_FIND_COMPONENTS hal ChibiOS_FIND_COMPONENTS_hal)
-LIST(FIND ChibiOS_FIND_COMPONENTS st ChibiOS_FIND_COMPONENTS_st)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_hal} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS hal)
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_st} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS st)
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS16_LD)
-INCLUDE(ChibiOS/ChibiOS16_HAL)
-INCLUDE(ChibiOS/ChibiOS16_Community)
-
-
-IF(${CHIBIOS_KERNEL} STREQUAL rt)
-  INCLUDE(ChibiOS/ChibiOS16_RT)
-ELSE()
-  INCLUDE(ChibiOS/ChibiOS16_NIL)
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS16_Various)
-
-SET(CHIBIOS_COMPONENTS nil rt hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_HAL_LIB_MODULES} ${CHIBIOS_VARIOUS_MODULES} ${CHIBIOS_COMMUNITY_MODULES})
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS})
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake-old/ChibiOS/ChibiOS16_Community.cmake

@@ -1,29 +0,0 @@
-SET(CHIBIOS_COMMUNITY_MODULES community nand eicu usbh timcap qei onewire crc eeprom usb_hid usb_msd)
-
-SET(CHIBIOS_community_SEARCH_HEADERS hal_community.h)
-SET(CHIBIOS_community_SOURCES hal_community.c)
-
-FOREACH(module ${CHIBIOS_COMMUNITY_MODULES})
-    SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/community/os/hal/include ${CHIBIOS_ROOT}/community/os/hal/src)
-    SET(CHIBIOS_${module}_SOURCES hal_${module}.c)
-    SET(CHIBIOS_${module}_SEARCH_HEADERS hal_${module}.h)
-ENDFOREACH()
-
-SET(CHIBIOS_HAL_PLATFORM_MODULES nand eicu usbh timcap qei crc)
-SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-    LLD/FSMCv1
-    LLD/TIMv1
-    LLD/USBHv1
-    LLD/TIMv1
-    LLD/TIMv1
-    LLD/CRCv1
-)
-
-SET(INDEX 0)
-FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-    LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/community/os/hal/ports/STM32/${path})
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-    SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-    MATH(EXPR INDEX "${INDEX} + 1")
-ENDFOREACH()

cmake-old/ChibiOS/ChibiOS16_HAL.cmake

@@ -1,258 +0,0 @@
-SET(CHIBIOS_HAL_LIB_MODULES chprintf memstreams nullstreams)
-SET(CHIBIOS_HAL_MODULES adc can dac ext gpt i2c i2s icu mac mmc_spi mmcsd pal pwm rtc sdc serial serial_usb spi st uart usb wdg)
-
-IF(${CHIBIOS_KERNEL} STREQUAL nil)
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/nil)
-ELSE()
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/rt)
-ENDIF()
-
-SET(CHIBIOS_hal_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src/ ${CHIBIOS_OSAL_PATH})
-SET(CHIBIOS_hal_SEARCH_HEADERS hal.h osal.h)
-SET(CHIBIOS_hal_SOURCES hal.c hal_buffers.c hal_queues.c osal.c)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-
-  IF(${module} STREQUAL mmcsd)
-    SET(CHIBIOS_${module}_SOURCES hal_mmcsd.c)
-  ENDIF()
-
-  IF(${module} STREQUAL serial_usb)
-    SET(CHIBIOS_${module}_SOURCES ${CHIBIOS_${module}_SOURCES} hal_buffers.c)
-  ENDIF()
-ENDFOREACH()
-
-FOREACH(module ${CHIBIOS_HAL_LIB_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/lib/streams)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-            LLD/ADCv1
-            LLD/CANv1
-            LLD/DACv1
-            LLD/EXTIv1
-            LLD/TIMv1
-            LLD/I2Cv2
-            LLD/SPIv1
-            LLD/TIMv1
-            LLD/MACv1
-            LLD/GPIOv2
-            LLD/TIMv1
-            LLD/RTCv2
-            LLD/SDMMCv1
-            LLD/USARTv2
-            LLD/SPIv2
-            LLD/TIMv1
-            LLD/USARTv2
-            LLD/USBv1
-            LDD/DMAv1
-            )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-            ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-            )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-            hal_lld.h
-            stm32_dma.h
-            nvic.h
-            st_lld.h
-            )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-            hal_lld.c
-            stm32_dma.c
-            nvic.c
-            st_lld.c
-            )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      STM32F1xx
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/TIMv1
-      LLD/GPIOv1
-      LLD/TIMv1
-      LLD/RTCv1
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/USBv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-        st_lld.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-        st_lld.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv2
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/MACv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/OTGv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv2
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-        st_lld.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-        st_lld.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc serial spi st uart usb wdg)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv1
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv2
-      LLD/TIMv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/USARTv2
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv2
-      LLD/USBv1
-      LLD/xWDGv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-        st_lld.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-        st_lld.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ENDIF()

cmake-old/ChibiOS/ChibiOS16_LD.cmake

@@ -1,38 +0,0 @@
-IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
- SET(CHIBIOS_PROCESS_STACK_SIZE 0x200)
- MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
- SET(CHIBIOS_MAIN_STACK_SIZE 0x200)
- MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-   FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in
-     "MEMORY\n"
-     "{\n"
-     "  flash : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-     "  ram0 : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-     "  ram1 : org = 0x00000000, len = 0\n"
-     "  ram2 : org = 0x00000000, len = 0\n"
-     "  ram3 : org = 0x00000000, len = 0\n"
-     "  ram4 : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-     "  ram5 : org = 0x00000000, len = 0\n"
-     "  ram6 : org = 0x00000000, len = 0\n"
-     "  ram7 : org = 0x00000000, len = 0\n"
-     "}\n"
-     "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-     "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-     "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-     "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-     "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-     "INCLUDE rules.ld\n"
-   )
-   SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()

cmake-old/ChibiOS/ChibiOS16_NIL.cmake

@@ -1,69 +0,0 @@
-SET(CHIBIOS_nil_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/nil/src
-  ${CHIBIOS_ROOT}/os/nil/include
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/nil/src
-)
-SET(CHIBIOS_nil_SEARCH_HEADERS
-  nil.h
-  nilcore.h
-  niltypes.h
-)
-SET(CHIBIOS_nil_SOURCES  
-  crt1.c
-  vectors.c
-  nilcore.c
-  nil.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v6m.s nilcore_v6m.c nilcoreasm_v6m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F0xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm0.h
-    stm32f0xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F1xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f1xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F4xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v6m.s nilcore_v6m.c nilcoreasm_v6m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32L0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32L0xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm0plus.h
-    stm32l0xx.h
-    cmparams.h
-  )
-ENDIF()

cmake-old/ChibiOS/ChibiOS16_RT.cmake

@@ -1,89 +0,0 @@
-SET(CHIBIOS_rt_SEARCH_PATH
-  ${CHIBIOS_ROOT}/os/rt/src
-  ${CHIBIOS_ROOT}/os/rt/include
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/rt/src
-)
-
-SET(CHIBIOS_rt_SEARCH_HEADERS
-  ch.h
-  chcore.h
-  chtypes.h
-)
-
-SET(CHIBIOS_rt_SOURCES
-  crt1.c
-  vectors.c
-  chcore.c
-  chsys.c
-  chdebug.c
-  chvt.c
-  chschd.c
-  chthreads.c
-  chtm.c
-  chstats.c
-  chdynamic.c
-  chregistry.c
-  chsem.c
-  chmtx.c
-  chcond.c
-  chevents.c
-  chmsg.c
-  chmboxes.c
-  chqueues.c
-  chmemcore.c
-  chheap.c
-  chmempools.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v6m.s chcore_v6m.c chcoreasm_v6m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-          ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F0xx/
-          )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-          core_cm0.h
-          stm32f0xx.h
-          cmparams.h
-          )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F1xx/
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f1xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F4xx/
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v6m.s chcore_v6m.c chcoreasm_v6m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32L0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32L0xx/
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm0plus.h
-    stm32l0xx.h
-    cmparams.h
-  )
-ENDIF()

cmake-old/ChibiOS/ChibiOS16_Various.cmake

@@ -1,12 +0,0 @@
-SET(CHIBIOS_VARIOUS_MODULES evtimer shell syscalls)
-
-SET(CHIBIOS_evtimer_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_evtimer_SOURCES evtimer.c)
-SET(CHIBIOS_evtimer_SEARCH_HEADERS evtimer.h)
-
-SET(CHIBIOS_shell_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_shell_SOURCES shell.c)
-SET(CHIBIOS_shell_SEARCH_HEADERS shell.h)
-
-SET(CHIBIOS_syscalls_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_syscalls_SOURCES syscalls.c)

cmake-old/ChibiOS/ChibiOS17.cmake

@@ -1,63 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS)
-    SET(ChibiOS_FIND_COMPONENTS nil hal st)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS17_LD)
-INCLUDE(ChibiOS/ChibiOS17_Kernel)
-INCLUDE(ChibiOS/ChibiOS17_HAL)
-#INCLUDE(ChibiOS/ChibiOS17_Various)
-#INCLUDE(ChibiOS/ChibiOS17_Community)
-
-SET(CHIBIOS_COMPONENTS nil rt hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_HAL_LIB_MODULES} ${CHIBIOS_VARIOUS_MODULES} ${CHIBIOS_COMMUNITY_MODULES})
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS})
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake-old/ChibiOS/ChibiOS17_HAL.cmake

@@ -1,254 +0,0 @@
-SET(CHIBIOS_HAL_LIB_MODULES chprintf memstreams nullstreams)
-SET(CHIBIOS_HAL_MODULES adc buffers can channels dac ext files gpt i2c i2s icu ioblock mac mii mmc_spi mmcsd pal pwm qspi queues rtc sdc serial serial_usb spi st streams uart usb_cdc usb wdg)
-
-IF(${CHIBIOS_KERNEL} STREQUAL nil)
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/nil)
-ELSE()
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/rt)
-ENDIF()
-
-SET(CHIBIOS_hal_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/hal/include 
-  ${CHIBIOS_ROOT}/os/hal/src/
-  ${CHIBIOS_ROOT}/os/hal/osal/lib
-  ${CHIBIOS_OSAL_PATH}
-)
-SET(CHIBIOS_hal_SEARCH_HEADERS 
-  hal.h 
-  osal.h
-)
-SET(CHIBIOS_hal_SOURCES 
-  hal.c 
-  osal.c
-)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-  SET(CHIBIOS_${module}_SOURCES hal_${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS hal_${module}.h)
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb wdg)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-            LLD/ADCv1
-            LLD/CANv1
-            LLD/DACv1
-            LLD/EXTIv1
-            LLD/TIMv1
-            LLD/I2Cv2
-            LLD/SPIv1
-            LLD/TIMv1
-            LLD/MACv1
-            LLD/GPIOv2
-            LLD/TIMv1
-            LLD/RTCv2
-            LLD/SDMMCv1
-            LLD/USARTv2
-            LLD/SPIv2
-            LLD/TIMv1
-            LLD/USARTv2
-            LLD/USBv1
-            LDD/DMAv1
-            LDD/xWDGv1
-            )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-            ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-            )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-            hal_lld.h
-            stm32_isr.h
-            stm32_rcc.h
-            stm32_registry.h
-            nvic.h
-            stm32_dma.h
-            )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-            hal_lld.c
-            nvic.c
-            stm32_dma.c
-            )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      STM32F1xx
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/TIMv1
-      LLD/GPIOv1
-      LLD/TIMv1
-      LLD/RTCv1
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/USBv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_isr.h
-        stm32_rcc.h
-        stm32_registry.h
-        nvic.h
-        stm32_dma.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        nvic.c
-        stm32_dma.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv2
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/MACv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/OTGv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv2
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_isr.h
-        stm32_rcc.h
-        stm32_registry.h
-        nvic.h
-        stm32_dma.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        nvic.c
-        stm32_dma.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc serial spi st uart usb wdg)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv1
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv2
-      LLD/TIMv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/USARTv2
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv2
-      LLD/USBv1
-      LLD/xWDGv1
-    )
-
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_isr.h
-        stm32_rcc.h
-        stm32_registry.h
-        nvic.h
-        stm32_dma.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        nvic.c
-        stm32_dma.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ENDIF()

cmake-old/ChibiOS/ChibiOS17_Kernel.cmake

@@ -1,166 +0,0 @@
-SET(CHIBIOS_kernel_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/license
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/oslib/src
-  ${CHIBIOS_ROOT}/os/common/oslib/include
-  ${CHIBIOS_ROOT}/os/common/ext/CMSIS/include
-  ${CHIBIOS_ROOT}/os/common/ext/CMSIS/include
-)
-
-SET(CHIBIOS_kernel_SEARCH_HEADERS 
-  ch.h
-  chcore.h
-  chlicense.h
-  chtypes.h
-  cmparams.h
-  chbsem.h
-  chheap.h
-  chmboxes.h
-  chmemcore.h
-  chmempools.h
-)
-
-SET(CHIBIOS_kernel_SOURCES
-  chcore.c
-  crt1.c
-  vectors.c
-  chheap.c
-  chmboxes.c
-  chmemcore.c
-  chmempools.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32F0xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32F0xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm0.h
-    stm32f0xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v6m.S 
-    chcore_v6m.c
-    chcoreasm_v6m.S
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32F1xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm3.h
-    stm32f1xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v7m.S 
-    chcore_v7m.c
-    chcoreasm_v7m.S
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32F4xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm4.h
-    stm32f4xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v7m.S 
-    chcore_v7m.c
-    chcoreasm_v7m.S
-  )
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32L0xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32L0xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm0.h
-    stm32l0xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v6m.S 
-    chcore_v6m.c
-    chcoreasm_v6m.S
-  )
-ENDIF()
-
-SET(CHIBIOS_nil_SEARCH_PATH 
-  ${CHIBIOS_kernel_SEARCH_PATH}
-  ${CHIBIOS_ROOT}/os/nil/src
-  ${CHIBIOS_ROOT}/os/nil/include
-)
-
-SET(CHIBIOS_rt_SEARCH_PATH 
-  ${CHIBIOS_kernel_SEARCH_PATH}
-  ${CHIBIOS_ROOT}/os/rt/src
-  ${CHIBIOS_ROOT}/os/rt/include
-)
-
-SET(CHIBIOS_nil_SEARCH_HEADERS
-  ${CHIBIOS_kernel_SEARCH_HEADERS}
-)
-
-SET(CHIBIOS_rt_SEARCH_HEADERS
-  ${CHIBIOS_kernel_SEARCH_HEADERS}
-  ch.h
-  chalign.h
-  chchecks.h
-  chcond.h
-  chdebug.h
-  chdynamic.h
-  chevents.h
-  chmsg.h
-  chmtx.h
-  chregistry.h
-  chschd.h
-  chsem.h
-  chstats.h
-  chsys.h
-  chsystypes.h
-  chthreads.h
-  chtm.h
-  chtrace.h
-  chvt.h
-)
-
-SET(CHIBIOS_nil_SOURCES  
-  ${CHIBIOS_kernel_SOURCES}
-  ch.c
-)
-
-SET(CHIBIOS_rt_SOURCES  
-  ${CHIBIOS_kernel_SOURCES}
-  chcond.c
-  chdebug.c
-  chdynamic.c
-  chevents.c
-  chmsg.c
-  chmtx.c
-  chregistry.c
-  chschd.c
-  chsem.c
-  chstats.c
-  chsys.c
-  chthreads.c
-  chtm.c
-  chtrace.c
-  chvt.c
-)

cmake-old/ChibiOS/ChibiOS17_LD.cmake

@@ -1,57 +0,0 @@
-IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
-    SET(CHIBIOS_PROCESS_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
-    SET(CHIBIOS_MAIN_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/startup/ARMCMx/compilers/GCC/ld\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in
-        "MEMORY\n"
-        "{\n"
-            "flash0  : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-            "flash1  : org = 0x00000000, len = 0\n"
-            "flash2  : org = 0x00000000, len = 0\n"
-            "flash3  : org = 0x00000000, len = 0\n"
-            "flash4  : org = 0x00000000, len = 0\n"
-            "flash5  : org = 0x00000000, len = 0\n"
-            "flash6  : org = 0x00000000, len = 0\n"
-            "flash7  : org = 0x00000000, len = 0\n"
-            "ram0    : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-            "ram1    : org = 0x00000000, len = 0\n"
-            "ram2    : org = 0x00000000, len = 0\n"
-            "ram3    : org = 0x00000000, len = 0\n"
-            "ram4    : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-            "ram5    : org = 0x00000000, len = 0\n"
-            "ram6    : org = 0x00000000, len = 0\n"
-            "ram7    : org = 0x00000000, len = 0\n"
-        "}\n"
-        "REGION_ALIAS(\"VECTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VECTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RAM_INIT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM_LMA\", flash0);\n"
-        "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-        "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-        "INCLUDE rules.ld\n"
-    )
-    SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()

cmake-old/ChibiOS/ChibiOS2.cmake

@@ -1,324 +0,0 @@
-SET(CHIBIOS_HAL_MODULES adc can ext gpt i2c icu mac mmc_spi mmcsd pal pwm rtc sdc serial serial_usb spi tm uart usb)
-SET(CHIBIOS_VARIOUS_MODULES chprintf chrtclib evtimer memstreams shell syscalls fatfs lwip)
-SET(CHIBIOS_COMPONENTS kernel hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_VARIOUS_MODULES})
-
-IF(NOT ChibiOS_FIND_COMPONENTS) 
-    SET(ChibiOS_FIND_COMPONENTS kernel)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-    MESSAGE(STATUS "Supported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-ENDIF()
-
-SET(CHIBIOS_HAL_LLD_MODULES adc can ext gpt i2c icu mac pal pwm rtc sdc serial spi uart usb)
-
-SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_ROOT}/os/kernel/include
-    ${CHIBIOS_ROOT}/os/ports/common/ARMCMx
-    ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx
-    ${CHIBIOS_ROOT}/os/kernel/src
-)
-SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ch.h
-    nvic.h
-    chcore.h
-)
-SET(CHIBIOS_kernel_SOURCES  
-    chsys.c
-    chdebug.c
-    chlists.c
-    chvt.c
-    chschd.c
-    chthreads.c
-    chdynamic.c
-    chregistry.c
-    chsem.c
-    chmtx.c
-    chcond.c
-    chevents.c
-    chmsg.c
-    chmboxes.c
-    chqueues.c
-    chmemcore.c
-    chheap.c
-    chmempools.c
-    crt0.c
-    chcore.c
-    chcore_v7m.c
-    nvic.c
-)
-
-SET(CHIBIOS_hal_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-SET(CHIBIOS_hal_SEARCH_HEADERS hal.h)
-SET(CHIBIOS_hal_SOURCES hal.c)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-    SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/src)
-    SET(CHIBIOS_${module}_SOURCES ${module}.c)
-ENDFOREACH()
-
-FOREACH(module ${CHIBIOS_VARIOUS_MODULES})
-    IF(${module} STREQUAL fatfs)
-        SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/various/fatfs_bindings ${CHIBIOS_ROOT}/ext/fatfs/src/ ${CHIBIOS_ROOT}/ext/fatfs/src/option)
-        SET(CHIBIOS_${module}_SOURCES
-            fatfs_diskio.c
-            fatfs_syscall.c
-            ff.c
-            ccsbcs.c
-        )
-        SET(CHIBIOS_${module}_SEARCH_HEADERS ff.h)
-    ELSEIF(${module} STREQUAL lwip)
-        SET(CHIBIOS_${module}_SEARCH_PATH 
-            ${CHIBIOS_ROOT}/os/various/lwip_bindings 
-            ${CHIBIOS_ROOT}/os/various/lwip_bindings/arch
-            ${CHIBIOS_ROOT}/ext/lwip/src/
-            ${CHIBIOS_ROOT}/ext/lwip/src/include/
-            ${CHIBIOS_ROOT}/ext/lwip/src/include/ipv4/
-        )
-        SET(CHIBIOS_${module}_SOURCES
-            lwipthread.c
-            sys_arch.c
-            netif/etharp.c
-            core/dhcp.c 
-            core/dns.c 
-            core/init.c 
-            core/mem.c 
-            core/memp.c 
-            core/netif.c 
-            core/pbuf.c 
-            core/raw.c 
-            core/stats.c 
-            core/sys.c 
-            core/tcp.c 
-            core/tcp_in.c 
-            core/tcp_out.c 
-            core/udp.c
-            core/ipv4/autoip.c 
-            core/ipv4/icmp.c 
-            core/ipv4/igmp.c 
-            core/ipv4/inet.c 
-            core/ipv4/inet_chksum.c 
-            core/ipv4/ip.c 
-            core/ipv4/ip_addr.c 
-            core/ipv4/ip_frag.c 
-            core/def.c 
-            core/timers.c
-            api/api_lib.c 
-            api/api_msg.c 
-            api/err.c 
-            api/netbuf.c 
-            api/netdb.c 
-            api/netifapi.c 
-            api/sockets.c 
-            api/tcpip.c
-        )
-        SET(CHIBIOS_${module}_SEARCH_HEADERS 
-            lwipthread.h 
-            sys_arch.h
-            lwip/api.h
-            lwip/ip.h
-        )
-    ELSE()
-        SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/various/)
-        SET(CHIBIOS_${module}_SOURCES ${module}.c)
-        IF(NOT (${module} STREQUAL syscalls))
-            SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-        ENDIF()
-    ENDIF()
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/ports/common/ARMCMx/CMSIS/include
-        ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F4xx
-    )
-    SET(CHIBIOS_kernel_PLATFORM_SOURCES
-        vectors.c
-    ) 
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_HEADERS
-        core_cm4.h
-        cmparams.h
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32.h
-        stm32f4xx.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-    )
-    
-    SET(CHIBIOS_HAL_PLATFORM_MODULE_PATHES
-        STM32F4xx
-        STM32
-        STM32
-        STM32/TIMv1
-        STM32/I2Cv1
-        STM32/TIMv1
-        STM32
-        STM32/GPIOv2
-        STM32/TIMv1
-        STM32/RTCv2
-        STM32
-        STM32/USARTv1
-        STM32/SPIv1
-        STM32/USARTv1
-        STM32/OTGv1
-    )
-    
-    IF(NOT ChibiOS_LINKER_SCRIPT)
-        IF(NOT STM32_CHIP_TYPE)
-            STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        ENDIF()
-        IF(NOT STM32_FLASH_SIZE)
-            STM32_GET_CHIP_PARAMETERS(${STM32_CHIP} STM32_FLASH_SIZE STM32_RAM_SIZE)
-        ENDIF()
-        IF(${STM32_CHIP_TYPE} STREQUAL 40_41xxx)
-            IF(${STM32_FLASH_SIZE} STREQUAL 1024K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F405xG.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F4xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL 429_439xx)
-            IF(${STM32_FLASH_SIZE} STREQUAL 2048K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F429xI.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F4xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ENDIF()
-        
-        IF(NOT ChibiOS_LINKER_SCRIPT)
-            MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-        ENDIF()
-    ENDIF()
-      
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/ports/common/ARMCMx/CMSIS/include
-        ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx
-    )
-    SET(CHIBIOS_kernel_PLATFORM_SOURCES
-        vectors.c
-    ) 
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_HEADERS
-        core_cm3.h
-        cmparams.h
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32.h
-        stm32f10x.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-    )
-    
-    SET(CHIBIOS_HAL_PLATFORM_MODULE_PATHES
-        STM32F1xx
-        STM32
-        STM32
-        STM32/TIMv1
-        STM32/I2Cv1
-        STM32/TIMv1
-        STM32
-        STM32/GPIOv1
-        STM32/TIMv1
-        STM32/RTCv1
-        STM32
-        STM32/USARTv1
-        STM32/SPIv1
-        STM32/USARTv1
-        STM32/USBv1
-    )
-            
-    IF(NOT ChibiOS_LINKER_SCRIPT)
-        IF(NOT STM32_CHIP_TYPE)
-            STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        ENDIF()
-        IF(NOT STM32_FLASH_SIZE)
-            STM32_GET_CHIP_PARAMETERS(${STM32_CHIP} STM32_FLASH_SIZE STM32_RAM_SIZE)
-        ENDIF()
-        IF(${STM32_CHIP_TYPE} STREQUAL MD_VL)
-            IF(${STM32_FLASH_SIZE} STREQUAL 128K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F100xB.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL MD)
-            IF(${STM32_FLASH_SIZE} STREQUAL 128K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xB.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL HD)
-            IF(${STM32_FLASH_SIZE} STREQUAL 384K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xD.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ELSEIF(${STM32_FLASH_SIZE} STREQUAL 512K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xE.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL XL)
-            IF(${STM32_FLASH_SIZE} STREQUAL 1024K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xG.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ENDIF()
-    ENDIF()            
-ENDIF()
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-SET(INDEX 0)
-FOREACH(module ${CHIBIOS_HAL_LLD_MODULES})
-    LIST(GET CHIBIOS_HAL_PLATFORM_MODULE_PATHES ${INDEX} path)
-        
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/platforms/${path})
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-    SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-        
-    IF(${module} STREQUAL ext)
-       SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-       SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-    ENDIF()
-        
-    MATH(EXPR INDEX "${INDEX} + 1")
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_ext_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/platforms/STM32F4xx)
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_ext_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/platforms/STM32F1xx)
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS}) 
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()
-

cmake-old/ChibiOS/ChibiOS3.cmake

@@ -1,78 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS) 
-    SET(ChibiOS_FIND_COMPONENTS nil hal st)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-LIST(FIND ChibiOS_FIND_COMPONENTS hal ChibiOS_FIND_COMPONENTS_hal)
-LIST(FIND ChibiOS_FIND_COMPONENTS st ChibiOS_FIND_COMPONENTS_st)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_hal} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS hal)
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_st} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS st)
-ENDIF()
-  
-INCLUDE(ChibiOS/ChibiOS3_LD)
-INCLUDE(ChibiOS/ChibiOS3_HAL)
-
-IF(${CHIBIOS_KERNEL} STREQUAL rt)
-  INCLUDE(ChibiOS/ChibiOS3_RT)
-ELSE()
-  INCLUDE(ChibiOS/ChibiOS3_NIL)
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS3_Various)
-
-SET(CHIBIOS_COMPONENTS nil rt hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_HAL_LIB_MODULES} ${CHIBIOS_VARIOUS_MODULES})
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS}) 
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake-old/ChibiOS/ChibiOS3_HAL.cmake

@@ -1,192 +0,0 @@
-SET(CHIBIOS_HAL_LIB_MODULES chprintf memstreams nullstreams)
-SET(CHIBIOS_HAL_MODULES adc can dac ext gpt i2c i2s icu mac mmc_spi mmcsd pal pwm rtc sdc serial serial_usb spi st uart usb)
-
-IF(${CHIBIOS_KERNEL} STREQUAL nil)
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/nil)
-ELSE()
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/rt)
-ENDIF()
-
-SET(CHIBIOS_hal_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src/ ${CHIBIOS_OSAL_PATH})
-SET(CHIBIOS_hal_SEARCH_HEADERS hal.h osal.h)
-SET(CHIBIOS_hal_SOURCES hal.c hal_queues.c osal.c)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-  
-  IF(${module} STREQUAL mmcsd)
-    SET(CHIBIOS_${module}_SOURCES hal_mmcsd.c)
-  ENDIF()
-ENDFOREACH()
-
-FOREACH(module ${CHIBIOS_HAL_LIB_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/lib/streams)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-            STM32F0xx
-            LLD
-            LLD
-            LLD/TIMv1
-            LLD/I2Cv2
-            LLD/SPIv1
-            LLD/TIMv1
-            LLD
-            LLD/GPIOv2
-            LLD/TIMv1
-            LLD/RTCv2
-            LLD
-            LLD/USARTv2
-            LLD/SPIv2
-            LLD/TIMv1
-            LLD/USARTv2
-            LLD/USBv1
-            )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-            ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD
-            )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-            hal_lld.h
-            stm32_dma.h
-            nvic.h
-            )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-            hal_lld.c
-            stm32_dma.c
-            nvic.c
-            )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES 
-      STM32F1xx 
-      LLD
-      LLD
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD
-      LLD/GPIOv1
-      LLD/TIMv1
-      LLD/RTCv1
-      LLD
-      LLD/USARTv1 
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/USBv1
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES 
-      STM32F4xx 
-      LLD
-      LLD/DACv1
-      LLD
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD
-      LLD/USARTv1 
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/OTGv1
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv2
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ENDIF()
-

cmake-old/ChibiOS/ChibiOS3_LD.cmake

@@ -1,38 +0,0 @@
- IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
-  SET(CHIBIOS_PROCESS_STACK_SIZE 0x400)
-  MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
-  SET(CHIBIOS_MAIN_STACK_SIZE 0x400)
-  MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in 
-      "MEMORY\n"
-      "{\n"
-      "  flash : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-      "  ram0 : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-      "  ram1 : org = 0x00000000, len = 0\n"
-      "  ram2 : org = 0x00000000, len = 0\n"
-      "  ram3 : org = 0x00000000, len = 0\n"
-      "  ram4 : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-      "  ram5 : org = 0x00000000, len = 0\n"
-      "  ram6 : org = 0x00000000, len = 0\n"
-      "  ram7 : org = 0x00000000, len = 0\n"
-      "}\n"
-      "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-      "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-      "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-      "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-      "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-      "INCLUDE rules.ld\n"      
-    )
-    SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()     

cmake-old/ChibiOS/ChibiOS3_NIL.cmake

@@ -1,57 +0,0 @@
-SET(CHIBIOS_nil_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/nil/src
-  ${CHIBIOS_ROOT}/os/nil/include
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/nil/src
-)
-SET(CHIBIOS_nil_SEARCH_HEADERS
-  nil.h
-  nilcore.h
-  niltypes.h
-)
-SET(CHIBIOS_nil_SOURCES  
-  crt1.c
-  vectors.c
-  nilcore.c
-  nil.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v6m.s nilcore_v6m.c nilcoreasm_v6m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm0.h
-    stm32f0xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f10x.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ENDIF()

cmake-old/ChibiOS/ChibiOS3_RT.cmake

@@ -1,76 +0,0 @@
-SET(CHIBIOS_rt_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/rt/src
-  ${CHIBIOS_ROOT}/os/rt/include
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/rt/src
-)
-  
-SET(CHIBIOS_rt_SEARCH_HEADERS
-  ch.h
-  chcore.h
-  chtypes.h
-)
-SET(CHIBIOS_rt_SOURCES  
-  crt1.c
-  vectors.c
-  chcore.c
-  chsys.c
-  chdebug.c
-  chvt.c
-  chschd.c
-  chthreads.c
-  chtm.c
-  chstats.c
-  chdynamic.c
-  chregistry.c
-  chsem.c
-  chmtx.c
-  chcond.c
-  chevents.c
-  chmsg.c
-  chmboxes.c
-  chqueues.c
-  chmemcore.c
-  chheap.c
-  chmempools.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v6m.s chcore_v6m.c chcoreasm_v6m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-          ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-          )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-          core_cm0.h
-          stm32f0xx.h
-          cmparams.h
-          )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f10x.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ENDIF()

cmake-old/ChibiOS/ChibiOS3_Various.cmake

@@ -1,12 +0,0 @@
-SET(CHIBIOS_VARIOUS_MODULES evtimer shell syscalls) 
-
-SET(CHIBIOS_evtimer_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_evtimer_SOURCES evtimer.c)
-SET(CHIBIOS_evtimer_SEARCH_HEADERS evtimer.h)
-
-SET(CHIBIOS_shell_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_shell_SOURCES shell.c)
-SET(CHIBIOS_shell_SEARCH_HEADERS shell.h)
-
-SET(CHIBIOS_syscalls_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_syscalls_SOURCES syscalls.c)

cmake-old/FindCMSIS.cmake

@@ -1,182 +0,0 @@
-IF(STM32_CHIP_TYPE OR STM32_CHIP)
-    IF(NOT STM32_CHIP_TYPE)
-        STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        IF(NOT STM32_CHIP_TYPE)
-            MESSAGE(FATAL_ERROR "Unknown chip: ${STM32_CHIP}. Try to use STM32_CHIP_TYPE directly.")
-        ENDIF()
-        MESSAGE(STATUS "${STM32_CHIP} is ${STM32_CHIP_TYPE} device")
-    ENDIF()
-    STRING(TOLOWER ${STM32_CHIP_TYPE} STM32_CHIP_TYPE_LOWER)
-ENDIF()
-
-SET(CMSIS_COMMON_HEADERS
-    arm_common_tables.h
-    arm_const_structs.h
-    arm_math.h
-    core_cmFunc.h
-    core_cmInstr.h
-    core_cmSimd.h
-)
-
-IF(STM32_FAMILY STREQUAL "F1")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f1xx.h system_stm32f1xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f1xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F2_V1.1.1")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    STRING(REGEX REPLACE "^(2[01]7).[BCDEFG]" "\\1" STM32_DEVICE_NUM ${STM32_CHIP_TYPE})
-    SET(CMSIS_STARTUP_SOURCE startup_stm32f${STM32_DEVICE_NUM}xx.s)
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f2xx.h system_stm32f2xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f2xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F3_V1.6.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    STRING(REGEX REPLACE "^(3..).(.)" "\\1x\\2" STM32_STARTUP_NAME ${STM32_CODE})
-    STRING(TOLOWER ${STM32_STARTUP_NAME} STM32_STARTUP_NAME_LOWER)
-    SET(CMSIS_STARTUP_SOURCE startup_stm32f${STM32_STARTUP_NAME_LOWER}.s)
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f3xx.h system_stm32f3xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f3xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F4_V1.8.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f4xx.h system_stm32f4xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f4xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F7_V1.3.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm7.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f7xx.h system_stm32f7xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f7xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F0")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F0_V1.4.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f0xx.h system_stm32f0xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f0xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_H7_V1.3.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm7.h)
-    SET(CMSIS_DEVICE_HEADERS stm32h7xx.h system_stm32h7xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32h7xx.c)
-	IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32h${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()
-	message(STATUS "CMSIS_STARTUP_SOURCE @@@@@@ ${CMSIS_STARTUP_SOURCE}")
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_L0_V1.7.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm0.h)
-    SET(CMSIS_DEVICE_HEADERS stm32l0xx.h system_stm32l0xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32l0xx.c)
-    IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32l${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_L1_V1.8.0")
-        MESSAGE(WARNING "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
-    SET(CMSIS_DEVICE_HEADERS stm32l1xx.h system_stm32l1xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32l1xx.c)
-    IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32l${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()
-ELSEIF(STM32_FAMILY STREQUAL "L4")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_L4_V1.9.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32l4xx.h system_stm32l4xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32l4xx.c) 
-    IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32l${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()   
-ENDIF()
-
-IF(NOT CMSIS_STARTUP_SOURCE)
-    SET(CMSIS_STARTUP_SOURCE startup_stm32f${STM32_CHIP_TYPE_LOWER}.s)
-ENDIF()
-
-FIND_PATH(CMSIS_COMMON_INCLUDE_DIR ${CMSIS_COMMON_HEADERS}
-    PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER} cmsis
-    HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Include/
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_PATH(CMSIS_DEVICE_INCLUDE_DIR ${CMSIS_DEVICE_HEADERS}
-    PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER} cmsis
-    HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Device/ST/STM32${STM32_FAMILY}xx/Include
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-SET(CMSIS_INCLUDE_DIRS
-    ${CMSIS_DEVICE_INCLUDE_DIR}
-    ${CMSIS_COMMON_INCLUDE_DIR}
-)
-
-FOREACH(SRC ${CMSIS_DEVICE_SOURCES})
-    STRING(MAKE_C_IDENTIFIER "${SRC}" SRC_CLEAN)
-    SET(CMSIS_${SRC_CLEAN}_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(CMSIS_${SRC_CLEAN}_FILE ${SRC}
-        PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER} cmsis
-        HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Device/ST/STM32${STM32_FAMILY}xx/Source/Templates/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND CMSIS_SOURCES ${CMSIS_${SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-IF(STM32_CHIP_TYPE)
-    SET(CMSIS_STARTUP_SOURCE_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(CMSIS_STARTUP_SOURCE_FILE ${CMSIS_STARTUP_SOURCE}
-        PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER} cmsis
-        HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Device/ST/STM32${STM32_FAMILY}xx/Source/Templates/gcc/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND CMSIS_SOURCES ${CMSIS_STARTUP_SOURCE_FILE})
-ENDIF()
-
-IF(CMSIS_FIND_COMPONENTS STREQUAL NN)
-    FIND_PACKAGE(CMSISNN)
-    LIST(APPEND CMSIS_SOURCES ${CMSISNN_SOURCES})
-    LIST(APPEND CMSIS_INCLUDE_DIRS ${CMSISNN_INCLUDE_DIRS})
-ENDIF()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(CMSIS DEFAULT_MSG CMSIS_INCLUDE_DIRS CMSIS_SOURCES)

cmake-old/FindCMSISNN.cmake

@@ -1,157 +0,0 @@
-INCLUDE(FetchContent)
-
-SET(FETCHCONTENT_UPDATES_DISCONNECTED ON)
-FetchContent_Declare(
-    arm_cmsis
-    GIT_REPOSITORY https://github.com/ARM-software/CMSIS_5.git
-    )
-
-FetchContent_GetProperties(arm_cmsis)
-IF(NOT arm_cmsis_POPULATED)
-    MESSAGE(STATUS "Getting most recent ARM CMSIS sources")
-    FetchContent_Populate(arm_cmsis)
-    EXECUTE_PROCESS(COMMAND git -C ${arm_cmsis_SOURCE_DIR} checkout develop)
-ENDIF()
-
-# FIND_PACKAGE(Fixedpoint)
-
-SET(ARM_CMSIS_DIR ${arm_cmsis_SOURCE_DIR}/CMSIS)
-
-SET(CMSIS_NN_HEADERS
-    arm_nnfunctions.h
-    arm_nnsupportfunctions.h
-    arm_nn_tables.h
-    )
-
-FILE(GLOB CMSIS_NN_SOURCES ${ARM_CMSIS_DIR}/NN/Source/*/*.c)
-
-FIND_PATH(CMSIS_NN_INC_DIR ${CMSIS_NN_HEADERS}
-    PATHS ${ARM_CMSIS_DIR}/NN/Include
-    CMAKE_FIND_ROOT_PATH_BOTH
-    )
-
-SET(CMSIS_DSP_HEADERS
-    arm_common_tables.h
-    arm_const_structs.h
-    arm_helium_utils.h
-    arm_math.h
-    arm_mve_tables.h
-    arm_vec_math.h
-    )
-
-SET(CMSIS_DSP_PRIVATE_HEADERS
-    arm_sorting.h
-    arm_vec_fft.h
-    arm_vec_filtering.h
-    )
-
-SET(CMSIS_DSP_SRCS
-    BasicMathFunctions.c
-    arm_gaussian_naive_bayes_predict_f32.c
-    CommonTables.c
-    ComplexMathFunctions.c
-    ControllerFunctions.c
-    arm_boolean_distance.c
-    arm_boolean_distance_template.h
-    arm_braycurtis_distance_f32.c
-    arm_canberra_distance_f32.c
-    arm_chebyshev_distance_f32.c
-    arm_cityblock_distance_f32.c
-    arm_correlation_distance_f32.c
-    arm_cosine_distance_f32.c
-    arm_dice_distance.c
-    arm_euclidean_distance_f32.c
-    arm_hamming_distance.c
-    arm_jaccard_distance.c
-    arm_jensenshannon_distance_f32.c
-    arm_kulsinski_distance.c
-    arm_minkowski_distance_f32.c
-    arm_rogerstanimoto_distance.c
-    arm_russellrao_distance.c
-    arm_sokalmichener_distance.c
-    arm_sokalsneath_distance.c
-    arm_yule_distance.c
-    FastMathFunctions.c
-    FilteringFunctions.c
-    MatrixFunctions.c
-    StatisticsFunctions.c
-    SupportFunctions.c
-    arm_svm_linear_init_f32.c
-    arm_svm_linear_predict_f32.c
-    arm_svm_polynomial_init_f32.c
-    arm_svm_polynomial_predict_f32.c
-    arm_svm_rbf_init_f32.c
-    arm_svm_rbf_predict_f32.c
-    arm_svm_sigmoid_init_f32.c
-    arm_svm_sigmoid_predict_f32.c
-    TransformFunctions.c
-    )
-
-FOREACH(SRC ${CMSIS_DSP_SRCS})
-    STRING(MAKE_C_IDENTIFIER "${SRC}" SRC_CLEAN)
-    SET(CMSIS_DSP_${SRC_CLEAN}_FILE ${SRC_CLEAN}-NOTFOUND)
-    FIND_FILE(CMSIS_DSP_${SRC_CLEAN}_FILE ${SRC}
-        PATH_SUFFIXES
-        BasicMathFunctions
-        BayesFunctions
-        CommonTables
-        ComplexMathFunctions
-        ControllerFunctions
-        DistanceFunctions
-        FastMathFunctions
-        FilteringFunctions
-        MatrixFunctions
-        StatisticsFunctions
-        SupportFunctions
-        SVMFunctions
-        TransformFunctions
-        PATHS ${ARM_CMSIS_DIR}/DSP/Source
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-    LIST(APPEND CMSIS_DSP_SOURCES ${CMSIS_DSP_${SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-FIND_PATH(CMSIS_DSP_PRIVATE_INC_DIR ${CMSIS_DSP_PRIVATE_HEADERS}
-    PATHS ${ARM_CMSIS_DIR}/DSP/PrivateInclude
-    CMAKE_FIND_ROOT_PATH_BOTH
-    )
-
-FIND_PATH(CMSIS_DSP_INC_DIR ${CMSIS_DSP_HEADERS}
-    PATHS ${ARM_CMSIS_DIR}/DSP/Include
-    CMAKE_FIND_ROOT_PATH_BOTH
-    )
-
-SET(CMSIS_DSP_INC_DIRS
-    ${CMSIS_DSP_PRIVATE_INC_DIR}
-    ${CMSIS_DSP_INC_DIR}
-    )
-
-SET(CMSISNN_INCLUDE_DIRS
-    ${CMSIS_DSP_INC_DIRS}
-    ${CMSIS_NN_INC_DIR}
-    )
-
-SET(CMSISNN_SOURCES
-    ${CMSIS_DSP_SOURCES}
-    ${CMSIS_NN_SOURCES}
-    )
-
-IF(STM32_FAMILY STREQUAL "F0")
-    ADD_DEFINITIONS(-DARM_MATH_CM0)
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    ADD_DEFINITIONS(-DARM_MATH_CM3)
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    #TODO find better solution to this
-    ADD_DEFINITIONS(-D__FPU_PRESENT=1)
-    ADD_DEFINITIONS(-DARM_MATH_CM4)
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    ADD_DEFINITIONS(-DARM_MATH_CM7)
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    ADD_DEFINITIONS(-DARM_MATH_CM0PLUS)
-ELSE()
-    MESSAGE(STATUS "ARM_MATH define not found, see arm_math.h")
-ENDIF()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(CMSISNN DEFAULT_MSG CMSISNN_INCLUDE_DIRS CMSISNN_SOURCES)

cmake-old/FindChibiOS.cmake

@@ -1,27 +0,0 @@
-IF(NOT CHIBIOS_ROOT)
-    SET(CHIBIOS_ROOT /usr/src/chibios)
-    MESSAGE(STATUS "No CHIBIOS_ROOT specified, using default: ${CHIBIOS_ROOT}")
-ENDIF()
-
-
-MESSAGE(STATUS "Chibios version:" ${ChibiOS_FIND_VERSION_MAJOR})
-
-IF(ChibiOS_FIND_VERSION_MAJOR EQUAL 2)
-  MESSAGE(FATAL_ERROR "ChibiOS v2.x.x is not supported. Use older version of stm32-cmake")
-ELSEIF((ChibiOS_FIND_VERSION_MAJOR EQUAL 18))
-  INCLUDE(ChibiOS/18.2/ChibiOS)
-ELSEIF((ChibiOS_FIND_VERSION_MAJOR EQUAL 17))
-  INCLUDE(ChibiOS/ChibiOS17)
-ELSEIF((ChibiOS_FIND_VERSION_MAJOR EQUAL 16))
-  INCLUDE(ChibiOS/ChibiOS16)
-ELSEIF((NOT ChibiOS_FIND_VERSION_MAJOR) OR (ChibiOS_FIND_VERSION_MAJOR EQUAL 3))
-  INCLUDE(ChibiOS/ChibiOS3)
-ENDIF()
-
-LIST(REMOVE_DUPLICATES ChibiOS_INCLUDE_DIRS)
-LIST(REMOVE_DUPLICATES ChibiOS_SOURCES)
-
-INCLUDE(FindPackageHandleStandardArgs)
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(ChibiOS DEFAULT_MSG ChibiOS_SOURCES ChibiOS_INCLUDE_DIRS ChibiOS_LINKER_SCRIPT)
-
-

cmake-old/FindFATFS.cmake

@@ -1,115 +0,0 @@
-IF(NOT STM32Cube_DIR)
-    SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-    MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-ENDIF()
-
-SET(FATFS_COMMON_SOURCES
-    diskio.c
-    ff.c
-    ff_gen_drv.c
-)
-
-CMAKE_POLICY(SET CMP0057 NEW)
-
-IF(NOT STORAGE_DRIVER)
-    MESSAGE(STATUS "No storage driver specified, please SET STORAGE_DRIVER to {SDCARD, SDRAM, SRAM, USBH}")
-else()
-    if("SDCARD" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES sd_diskio.c)
-    endif()
-    if("SDRAM" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES sdram_diskio.c)
-    endif()
-    if("SRAM" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES sram_diskio.c)
-    endif()
-    if("USBH" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES usbh_diskio.c)
-    endif()
-endif()
-
-SET(FATFS_OPTION_SOURCES syscall.c unicode.c)
-#if(CODE_PAGE EQUAL CP932)
-#list(APPEND FATFS_OPTION_SOURCES cc932.c)
-#(    cc936.c
-#    cc949.c
-#    cc950.c
-#    ccsbcs.c
-#    unicode.c
-#)
-
-SET(FATFS_COMMON_HEADERS
-    diskio.h
-    ff.h
-    ff_gen_drv.h
-    ffconf_template.h
-    integer.h
-)
-
-SET(FATFS_DRIVER_HEADERS
-    sd_diskio.h
-    sdram_diskio.h
-    sram_diskio.h
-    usbh_diskio.h
-)
-
-FIND_PATH(FATFS_COMMON_INCLUDE_DIR ${FATFS_COMMON_HEADERS}
-    HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_PATH(FATFS_DRIVER_INCLUDE_DIR ${FATFS_DRIVER_HEADERS}
-    HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/drivers/
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-IF(${FATFS_DRIVER_INCLUDE_DIR} STREQUAL FATFS_DRIVER_INCLUDE_DIR-NOTFOUND)
-    MESSAGE("Driver header files not located in STM firemware, please manually include the appropriate X_diskio.h directory")
-    SET(FATFS_INCLUDE_DIRS
-    ${FATFS_COMMON_INCLUDE_DIR}
-        )
-ELSE()
-SET(FATFS_INCLUDE_DIRS
-    ${FATFS_COMMON_INCLUDE_DIR}
-    ${FATFS_DRIVER_INCLUDE_DIR}
-)
-ENDIF()
-
-FOREACH(SRC ${FATFS_COMMON_SOURCES})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND FATFS_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-FOREACH(SRC ${FATFS_DRIVER_SOURCES})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/drivers/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-STRING(FIND ${SRC_FILE} "NOTFOUND" SRC_FILE_NOTFOUND)
-IF(NOT ${SRC_FILE_NOTFOUND} EQUAL -1)
-    MESSAGE("Driver source files not located in STM firemware, please manually source the appropriate X_diskio.c files")
-ELSE()
-    LIST(APPEND FATFS_SOURCES ${SRC_FILE})
-ENDIF()
-ENDFOREACH()
-
-FOREACH(SRC ${FATFS_OPTION_SOURCES})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/option/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND FATFS_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-message(STATUS "fatfs include " ${FATFS_INCLUDE_DIRS})
-message(STATUS "fatfs sources " ${FATFS_SOURCES})
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(FATFS DEFAULT_MSG FATFS_INCLUDE_DIRS FATFS_SOURCES)

cmake-old/FindFreeRTOS.cmake

@@ -1,120 +0,0 @@
-IF(STM32_FAMILY STREQUAL "F0")
-	SET(PORT_GCC_DIR_SUFFIX "CM0")
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-	SET(PORT_GCC_DIR_SUFFIX "CM3")
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-	SET(PORT_GCC_DIR_SUFFIX "CM3")
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-	SET(PORT_GCC_DIR_SUFFIX "CM4F")
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-	SET(PORT_GCC_DIR_SUFFIX "CM4F")
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-	SET(PORT_GCC_DIR_SUFFIX "CM7")
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-	SET(PORT_GCC_DIR_SUFFIX "CM7/r0p1")
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-	SET(PORT_GCC_DIR_SUFFIX "CM0")
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-	SET(PORT_GCC_DIR_SUFFIX "CM4F")
-ENDIF()
-
-SET(FREERTOS_SRC_FILES
-	croutine.c
-	event_groups.c
-	list.c
-	queue.c
-	tasks.c
-	timers.c
-)
-
-SET(FREERTOS_HEADERS
-	croutine.h
-	deprecated_definitions.h
-	event_groups.h
-	FreeRTOS.h
-	list.h
-	mpu_prototypes.h
-	mpu_wrappers.h
-	portable.h
-	projdefs.h
-	queue.h
-	semphr.h
-	StackMacros.h
-	task.h
-	timers.h
-)
-
-SET(CMSIS_OS_SRC_FILE cmsis_os.c)
-SET(CMSIS_OS_INC_FILE cmsis_os.h)
-
-SET(PORT_ARM_SRC_FILE port.c)
-SET(PORTMACRO_ARM_HEADER portmacro.h)
-
-IF(NOT FREERTOS_HEAP_IMPL)
-	MESSAGE(FATAL_ERROR "FREERTOS_HEAP_IMPL not defined. Define it to include proper heap implementation file.")
-ELSE()
-	SET(HEAP_IMP_FILE heap_${FREERTOS_HEAP_IMPL}.c)
-ENDIF()
-
-FIND_PATH(FREERTOS_COMMON_INC_DIR ${FREERTOS_HEADERS}
-	PATH_SUFFIXES include
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_PATH(CMSIS_OS_INC_DIR ${CMSIS_OS_INC_FILE}
-	PATH_SUFFIXES CMSIS_RTOS
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_PATH(PORTMACRO_INC_DIR ${PORTMACRO_ARM_HEADER}
-	PATH_SUFFIXES ARM_${PORT_GCC_DIR_SUFFIX}
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FOREACH(SRC ${FREERTOS_SRC_FILES})
-    STRING(MAKE_C_IDENTIFIER "${SRC}" SRC_CLEAN)
-	SET(FREERTOS_${SRC_CLEAN}_FILE FREERTOS_SRC_FILE-NOTFOUND)
-	FIND_FILE(FREERTOS_${SRC_CLEAN}_FILE ${SRC}
-		HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-		CMAKE_FIND_ROOT_PATH_BOTH
-	)
-	LIST(APPEND FREERTOS_SOURCES ${FREERTOS_${SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-FIND_FILE(CMSIS_OS_SOURCE ${CMSIS_OS_SRC_FILE}
-	PATH_SUFFIXES CMSIS_RTOS
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_FILE(PORT_ARM_SOURCE ${PORT_ARM_SRC_FILE}
-	PATH_SUFFIXES ARM_${PORT_GCC_DIR_SUFFIX}
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_FILE(HEAP_IMP_SOURCE ${HEAP_IMP_FILE}
-	PATH_SUFFIXES MemMang
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-SET(FreeRTOS_INCLUDE_DIRS
-	${FREERTOS_COMMON_INC_DIR}
-	${CMSIS_OS_INC_DIR}
-	${PORTMACRO_INC_DIR}
-)
-
-SET(FreeRTOS_SOURCES
-	${FREERTOS_SOURCES}
-	${CMSIS_OS_SOURCE}
-	${PORT_ARM_SOURCE}
-	${HEAP_IMP_SOURCE}
-)
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(FreeRTOS DEFAULT_MSG FreeRTOS_INCLUDE_DIRS FreeRTOS_SOURCES)

cmake-old/FindSTM32BSP.cmake

@@ -1,100 +0,0 @@
-MESSAGE("STM Board: ${STM_BOARD}")
-IF(STM32_FAMILY STREQUAL "F4")
-	IF(STM_BOARD STREQUAL "STM32F429I-Discovery")
-		SET(BSP_COMPONENTS 
-                eeprom
-			    gyroscope
-			    io
-			    lcd
-			    sdram
-			    ts)
-		SET(BSP_PREFIX stm32f429i_discovery_)
-		SET(BSP_HEADERS stm32f429i_discovery.h)
-		SET(BSP_SRC stm32f429i_discovery.c)
-	ENDIF()
-    IF(STM_BOARD STREQUAL "STM324xG_EVAL")
-        SET(BSP_COMPONENTS 
-            lcd 
-            camera 
-            eeprom 
-            io 
-            sd 
-            sram 
-            ts)
-        SET(BSP_PREFIX stm324xg_eval_)
-        SET(BSP_HEADERS stm324xg_eval.h)
-        SET(BSP_SRC stm324xg_eval.c)
-    ENDIF()
-	set(COMMON_COMPONENTS ampire480272
-			      ampire640480
-			      cs43l22
-			      exc7200
-			      ili9325
-			      ili9341
-			      l3gd20
-			      lis302dl
-			      lis3dsh
-			      lsm303dlhc
-			      mfxstm32l152
-			      n25q256a
-			      ov2640
-			      s5k5cag
-			      st7735
-			      stmpe1600
-			      stmpe811
-			      ts3510
-			      wm8994
-			      )
-ENDIF()
-
-IF(NOT STM32BSP_FIND_COMPONENTS)
-	SET(STM32BSP_FIND_COMPONENTS ${BSP_COMPONENTS} ${COMMON_COMPONENTS})
-	MESSAGE(STATUS "No STM32BSP components selected, using all: ${STM32BSP_FIND_COMPONENTS}")
-ENDIF()
-
-
-
-FOREACH(cmp ${STM32BSP_FIND_COMPONENTS})
-	LIST(FIND BSP_COMPONENTS ${cmp} STM32BSP_FOUND_INDEX)
-	IF(${STM32BSP_FOUND_INDEX} LESS 0)
-		LIST(FIND COMMON_COMPONENTS ${cmp} COMMON_FOUND_INDEX)
-		IF(${COMMON_FOUND_INDEX} LESS 0)
-			MESSAGE(FATAL_ERROR "Unknown STM32BSP component: ${cmp}. Available components: ${BSP_COMPONENTS} and ${COMMON_COMPONENTS}")
-		ELSE()
-			LIST(APPEND BSP_COMMON_HEADER ${cmp}.h)
-			LIST(APPEND BSP_SRC ${cmp}.c)
-    		ENDIF()
-	ELSE()
-		LIST(APPEND BSP_HEADERS ${BSP_PREFIX}${cmp}.h)
-		LIST(APPEND BSP_SRC ${BSP_PREFIX}${cmp}.c)
-	ENDIF()
-ENDFOREACH()
-
-FIND_PATH(STM32BSP_INCLUDE_DIR ${BSP_HEADERS}
-	HINTS ${STM32Cube_DIR}/Drivers/BSP/${STM_BOARD}
-	CMAKE_FIND_ROOT_PATH_BOTH
-	)
-
-FOREACH(cmp ${BSP_COMMON_HEADERS})
-	FIND_PATH(STM32BSP_${cmp}_INCLUDE_DIR ${cmp}
-		HINTS ${STM32Cube_DIR}/Drivers/BSP/Components
-		PATH_SUFFIXES ${cmp}
-		CMAKE_FIND_ROOT_PATH_BOTH
-	)
-	LIST(APPEND BSP_HEADERS ${STM32BSP_${cmp}_INCLUDE_DIR})
-ENDFOREACH()
-
-FOREACH(file ${BSP_SRC})
-	STRING(REPLACE ".c" "" subfolder ${file})
-	FIND_FILE(BSP_${file}_FILE ${file}
-		HINTS ${STM32Cube_DIR}/Drivers/BSP/${STM_BOARD} ${STM32Cube_DIR}/Drivers/BSP/Components
-		PATH_SUFFIXES ${subfolder}
-		CMAKE_FIND_ROOT_PATH_BOTH
-		)
-	MESSAGE(STATUS "BSP file is " ${BSP_${file}_FILE})
-	LIST(APPEND STM32BSP_SOURCES ${BSP_${file}_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32BSP DEFAULT_MSG STM32BSP_INCLUDE_DIR STM32BSP_SOURCES)

cmake-old/FindSTM32HAL.cmake

@@ -1,189 +0,0 @@
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(HAL_COMPONENTS adc can cec comp cortex crc dac dma flash gpio i2c
-                       i2s irda iwdg pcd pwr rcc rtc smartcard smbus
-                       spi tim tsc uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc dac flash i2c pcd pwr rcc rtc smartcard spi tim uart)
-
-    SET(HAL_PREFIX stm32f0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(HAL_COMPONENTS adc can cec cortex crc dac dma eth flash gpio hcd i2c
-                       i2s irda iwdg nand nor pccard pcd pwr rcc rtc sd smartcard
-                       spi sram tim uart usart wwdg fsmc sdmmc usb)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc dac flash gpio pcd rcc rtc tim)
-
-    SET(HAL_PREFIX stm32f1xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-    SET(HAL_COMPONENTS adc can cortex crc cryp dac dcmi dma eth flash
-                       gpio hash hcd i2c i2s irda iwdg nand nor pccard
-                       pcd pwr rcc rng rtc sd smartcard spi sram tim
-                       uart usart wwdg fsmc sdmmc usb)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc dac dma flash pwr rcc rtc tim)
-
-    SET(HAL_PREFIX stm32f2xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    SET(HAL_COMPONENTS adc can cec comp cortex crc dac dma flash gpio i2c i2s
-                       irda nand nor opamp pccard pcd pwr rcc rtc sdadc
-                       smartcard smbus spi sram tim tsc uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    SET(HAL_EX_COMPONENTS adc crc dac flash i2c i2s opamp pcd pwr
-                          rcc rtc smartcard spi tim uart)
-
-    SET(HAL_PREFIX stm32f3xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(HAL_COMPONENTS adc can cec cortex crc cryp dac dcmi dma dma2d eth flash
-                       flash_ramfunc fmpi2c gpio hash hcd i2c i2s irda iwdg ltdc
-                       nand nor pccard pcd pwr qspi rcc rng rtc sai sd sdram
-                       smartcard spdifrx spi sram tim uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc cryp dac dcmi dma flash fmpi2c hash i2c i2s pcd
-                          pwr rcc rtc sai tim)
-
-    SET(HAL_PREFIX stm32f4xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    SET(HAL_COMPONENTS adc can cec cortex crc cryp dac dcmi dma dma2d eth flash
-                       gpio hash hcd i2c i2s irda iwdg lptim ltdc nand nor pcd
-                       pwr qspi rcc rng rtc sai sd sdram smartcard spdifrx spi
-                       sram tim uart usart wwdg fmc sdmmc usb)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc cryp dac dcmi dma flash hash i2c pcd
-                          pwr rcc rtc sai tim)
-
-    SET(HAL_PREFIX stm32f7xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-    SET(HAL_COMPONENTS adc can cec cortex crc cryp dac dcmi dma dma2d eth flash
-                       gpio hash hcd i2c i2s irda iwdg lptim ltdc nand nor pcd
-                       pwr qspi rcc rng rtc sai sd sdram smartcard spdifrx spi
-                       sram tim uart usart wwdg fmc sdmmc usb)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc cryp dac dcmi dma flash hash i2c pcd
-                          pwr rcc rtc sai tim)
-
-    SET(HAL_PREFIX stm32h7xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(HAL_COMPONENTS adc comp cortex crc crs cryp dac dma exti firewall flash gpio i2c
-                       i2s irda iwdg lcd lptim lpuart pcd pwr rcc rng rtc smartcard
-                       smbus spi tim tsc uart usart utils wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc comp crc cryp dac flash i2c pcd pwr rcc rtc smartcard tim uart usart)
-
-    SET(HAL_PREFIX stm32l0xx_)
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-    SET(HAL_COMPONENTS adc comp cortex crc cryp dac dma flash flash_ramfunc
-					   gpio i2c i2s irda iwdg lcd nor opamp pcd pwr rcc rtc
-					   sd smartcard spi sram tim uart usart wwdg)
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr)
-    
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc cryp dac flash opamp pcd pwr rcc rtc spi tim)
-    # Components that have ll_ in names instead of hal_
-
-    SET(HAL_PREFIX stm32l1xx_)
-ELSEIF(STM32_FAMILY STREQUAL "L4")
-    SET(HAL_COMPONENTS adc can comp cortex crc cryp dac dcmi dfsdm dma dma2d dsi 
-                       firewall flash flash_ramfunc gfxmmu gpio hash hcd i2c irda iwdg
-                       lcd lptim ltdc nand nor opamp ospi pcd pwr qspi rcc rng rtc sai
-                       sd smartcard smbus spi sram swpmi tim tsc uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc cryp dac dfsdm dma flash hash i2c ltdc 
-                          opamp pcd pwr rcc rtc sai sd smartcard spi tim uart usart)
-                          
-    SET(HAL_PREFIX stm32l4xx_)
-
-ENDIF()
-
-SET(HAL_HEADERS
-	${HAL_PREFIX}hal.h
-	${HAL_PREFIX}hal_def.h
-)
-
-SET(HAL_SRCS
-	${HAL_PREFIX}hal.c
-)
-IF(NOT STM32HAL_FIND_COMPONENTS)
-    SET(STM32HAL_FIND_COMPONENTS ${HAL_COMPONENTS})
-    MESSAGE(STATUS "No STM32HAL components selected, using all: ${STM32HAL_FIND_COMPONENTS}")
-ENDIF()
-
-FOREACH(cmp ${HAL_REQUIRED_COMPONENTS})
-    LIST(FIND STM32HAL_FIND_COMPONENTS ${cmp} STM32HAL_FOUND_INDEX)
-    IF(${STM32HAL_FOUND_INDEX} LESS 0)
-        LIST(APPEND STM32HAL_FIND_COMPONENTS ${cmp})
-    ENDIF()
-ENDFOREACH()
-
-FOREACH(cmp ${STM32HAL_FIND_COMPONENTS})
-    LIST(FIND HAL_COMPONENTS ${cmp} STM32HAL_FOUND_INDEX)
-    IF(${STM32HAL_FOUND_INDEX} LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown STM32HAL component: ${cmp}. Available components: ${HAL_COMPONENTS}")
-	ELSE()
-        LIST(APPEND HAL_HEADERS ${HAL_PREFIX}hal_${cmp}.h)
-        LIST(APPEND HAL_SRCS ${HAL_PREFIX}hal_${cmp}.c)
-    ENDIF()
-    LIST(FIND HAL_EX_COMPONENTS ${cmp} STM32HAL_FOUND_INDEX)
-    IF(NOT (${STM32HAL_FOUND_INDEX} LESS 0))
-        LIST(APPEND HAL_HEADERS ${HAL_PREFIX}hal_${cmp}_ex.h)
-        LIST(APPEND HAL_SRCS ${HAL_PREFIX}hal_${cmp}_ex.c)
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES HAL_HEADERS)
-LIST(REMOVE_DUPLICATES HAL_SRCS)
-
-STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-
-FIND_PATH(STM32HAL_INCLUDE_DIR ${HAL_HEADERS}
-    PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER}
-    HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Inc
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FOREACH(HAL_SRC ${HAL_SRCS})
-    STRING(MAKE_C_IDENTIFIER "${HAL_SRC}" HAL_SRC_CLEAN)
-    SET(HAL_${HAL_SRC_CLEAN}_FILE HAL_SRC_FILE-NOTFOUND)
-    FIND_FILE(HAL_${HAL_SRC_CLEAN}_FILE ${HAL_SRC}
-        PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER}
-        HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Src
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND STM32HAL_SOURCES ${HAL_${HAL_SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32HAL DEFAULT_MSG STM32HAL_INCLUDE_DIR STM32HAL_SOURCES)

cmake-old/FindSTM32LL.cmake

@@ -1,132 +0,0 @@
-SET(STM32LL_HEADER_ONLY_COMPONENTS	bus cortex iwdg system wwdg dmamux)
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(LL_COMPONENTS	adc bus comp cortex crc crs dac dma exti gpio i2c
-						i2s iwdg pwr rcc rtc spi system tim usart utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma exti gpio i2c i2s
-						iwdg pwr rcc rtc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f1xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma exti gpio i2c i2s iwdg pwr 
-						rcc rng rtc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f2xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    SET(LL_COMPONENTS	adc bus comp cortex crc dac dma exti gpio hrtim i2c i2s
-						iwdg opamp pwr rcc rtc spi system tim usart utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f3xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma2d dma exti fmc gpio i2c i2s iwdg
-						lptim pwr rcc rng rtc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f4xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma2d dma exti gpio i2c i2s iwdg
-						lptim pwr rcc rng rtc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f7xx_)
-	
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma2d dma exti gpio i2c i2s iwdg
-						lptim pwr rcc rng rtc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32h7xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(LL_COMPONENTS	adc bus comp cortex crc crs dac dma exti gpio i2c i2s
-						iwdg lptim lpuart pwr rcc rng rtc spi system tim usart
-						utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32l0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-    SET(LL_COMPONENTS	adc comp crc dac dma exti fsmc gpio i2c opamp pwr rcc 
-						rtc sdmmc spi tim usart utils)
-    SET(LL_REQUIRED_COMPONENTS pwr rcc utils)
-
-    SET(LL_PREFIX stm32l1xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L4")
-    SET(LL_COMPONENTS	adc bus comp cortex crc crs dac dma2d dmamux dma exti 
-						gpio i2c iwdg lptim lpuart opamp pwr rcc rng rtc spi 
-						system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32l4xx_)
-
-ENDIF()
-
-ADD_DEFINITIONS(-DUSE_FULL_LL_DRIVER)
-
-FOREACH(cmp ${LL_REQUIRED_COMPONENTS})
-	LIST(FIND STM32LL_FIND_COMPONENTS ${cmp} STM32LL_FOUND_INDEX)
-	IF(${STM32LL_FOUND_INDEX} LESS 0)
-		LIST(APPEND STM32LL_FIND_COMPONENTS ${cmp})
-	ENDIF()
-ENDFOREACH()
-
-FOREACH(cmp ${STM32LL_FIND_COMPONENTS})
-	LIST(FIND LL_COMPONENTS ${cmp} STM32LL_FOUND_INDEX)
-	IF(${STM32LL_FOUND_INDEX} LESS 0)
-		MESSAGE(FATAL_ERROR "Unknown STM32LL component: ${cmp}. Available components: ${LL_COMPONENTS}")
-	ELSE()
-		LIST(FIND STM32LL_HEADER_ONLY_COMPONENTS ${cmp} HEADER_ONLY_FOUND_INDEX)
-		IF(${HEADER_ONLY_FOUND_INDEX} LESS 0)
-			LIST(APPEND LL_SRCS ${LL_PREFIX}ll_${cmp}.c)
-		ENDIF()
-		LIST(APPEND LL_HEADERS ${LL_PREFIX}ll_${cmp}.h)
-	ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES LL_HEADERS)
-LIST(REMOVE_DUPLICATES LL_SRCS)
-
-STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-
-FIND_PATH(STM32LL_INCLUDE_DIR ${LL_HEADERS}
-	PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER}
-	HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Inc
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FOREACH(LL_SRC ${LL_SRCS})
-	STRING(MAKE_C_IDENTIFIER "${LL_SRC}" LL_SRC_CLEAN)
-	SET(LL_${LL_SRC_CLEAN}_FILE LL_SRC_FILE-NOTFOUND)
-	FIND_FILE(LL_${LL_SRC_CLEAN}_FILE ${LL_SRC}
-		PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER}
-		HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Src
-		CMAKE_FIND_ROOT_PATH_BOTH
-	)
-	LIST(APPEND STM32LL_SOURCES ${LL_${LL_SRC_CLEAN}_FILE})
-ENDFOREACH()
-    
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32LL DEFAULT_MSG STM32LL_INCLUDE_DIR STM32LL_SOURCES)

cmake-old/FindSTM32STD.cmake

@@ -1,91 +0,0 @@
-IF(STM32_FAMILY STREQUAL "F4")
-    SET(STD_COMPONENTS adc can cec crc cryp dac dbgmcu dcmi dfsdm dma2d dma dsi
-        exti flash flash_ramfunc fmc fmpi2c fsmc gpio hash i2c iwdg lptim ltdc pwr qspi rcc
-        rng rtc sai sdio spdifrx spi syscfg tim usart wwdg)
-
-    SET(STD_REQUIRED_COMPONENTS dma dma2d fmc i2c ltdc gpio rcc spi usart adc tim exti syscfg)
-
-    SET(STD_EX_COMPONENTS cryp hash)
-
-    SET(STD_PREFIX stm32f4xx_)
-ENDIF()
-
-SET(STD_HEADERS
-    misc.h
-    stm32f4xx.h
-    core_cm4.h
-    )
-
-SET(STD_SRCS
-    misc.c
-    )
-
-IF(NOT STM32STDPERIPH_FIND_COMPONENTS)
-    SET(STM32STDPERIPH_FIND_COMPONENTS ${STD_COMPONENTS})
-    MESSAGE(STATUS "No STM32STD components selected, using all: ${STM32STD_FIND_COMPONENTS}")
-ENDIF()
-
-FOREACH(cmp ${STD_REQUIRED_COMPONENTS})
-    LIST(FIND STM32STDPERIPH_FIND_COMPONENTS ${cmp} STM32STD_FOUND_INDEX)
-    IF(${STM32STD_FOUND_INDEX} LESS 0)
-        LIST(APPEND STM32STDPERIPH_FIND_COMPONENTS ${cmp})
-    ENDIF()
-ENDFOREACH()
-
-FOREACH(cmp ${STM32STD_FIND_COMPONENTS})
-    LIST(FIND STD_COMPONENTS ${cmp} STM32STD_FOUND_INDEX)
-    IF($STM32STD_FOUND_INDEX LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown STM32STD Peripheral component: ${cmp}. Available components: ${STD_COMPONENTS}")
-    ELSE()
-        LIST(APPEND STD_HEADERS ${STD_PREFIX}${cmp}.h)
-        LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}.c)
-    ENDIF()
-    LIST(FIND STD_EX_COMPONENTS ${cmp} STM32STD_FOUND_INDEX)
-    if(NOT (${STM32STD_FOUND_INDEX} LESS 0))
-        STRING(COMPARE EQUAL ${cmp} "cryp" STM32_EQUAL)
-        if(${STM32_EQUAL})
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_aes.c)
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_des.c)
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_tdes.c)
-        ENDIF()
-        STRING(COMPARE EQUAL ${cmp} "hash" STM32_EQUAL)
-        if(${STM32_EQUAL})
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_md5.c)
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_sha1.c)
-        ENDIF()
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES STD_HEADERS)
-LIST(REMOVE_DUPLICATES STD_SRCS)
-
-FOREACH(HEADER ${STD_HEADERS})
-    FIND_PATH(STM32STD_${HEADER}_INCLUDE_DIR
-        NAMES ${HEADER}
-        PATHS
-        ${STM32STD_DIR}/Libraries/CMSIS/Device/ST/STM32F4xx/Include
-        ${STM32STD_DIR}/Libraries/CMSIS/Include
-        ${STM32STD_DIR}/Libraries/STM32F4xx_StdPeriph_Driver/inc
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-    LIST(APPEND STM32STD_INCLUDE_DIR ${STM32STD_${HEADER}_INCLUDE_DIR})
-ENDFOREACH()
-
-SET(SRC_HINTS_DIR ${STM32STD_DIR}/Libraries/STM32${STM32_FAMILY}xx_StdPeriph_Driver/src)
-
-FOREACH(STD_SRC ${STD_SRCS})
-    STRING(MAKE_C_IDENTIFIER "${STD_SRC}" STD_SRC_CLEAN)
-    SET(STD_${STD_SRC_CLEAN}_FILE STD_SRC_FILE-NOTFOUND)
-    FIND_FILE(STD_${STD_SRC_CLEAN}_FILE ${STD_SRC}
-        PATH_SUFFIXES src
-        HINTS ${SRC_HINTS_DIR}
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-    LIST(APPEND STM32STD_SOURCES ${STD_${STD_SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES STM32STD_INCLUDE_DIR)
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32STD DEFAULT_MSG STM32STD_INCLUDE_DIR STM32STD_SOURCES)

cmake-old/FindUSBDevice.cmake

@@ -1,128 +0,0 @@
-IF(NOT STM32Cube_DIR)
-    SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-    MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-ENDIF()
-
-SET(USBDevice_SRC
-    Core/Src/usbd_ctlreq.c
-    Core/Src/usbd_core.c
-    Core/Src/usbd_ioreq.c
-#    Core/Src/usbd_conf_template.c
-)
-
-SET(USBDevice_INC
-    Core/Inc/usbd_ctlreq.h
-    Core/Inc/usbd_ioreq.h
-    Core/Inc/usbd_core.h
-#    Core/Inc/usbd_conf_template.h
-    Core/Inc/usbd_def.h
-)
-
-SET(USBDevice_COMPONENTS CDC DFU AUDIO Template MSC HID CustomHID)
-
-SET(USBDevice_COMPONENTS_CDC_HEADERS
-    Class/CDC/Inc/usbd_cdc.h
-#    Class/CDC/Inc/usbd_cdc_if_template.h
-)
-SET(USBDevice_COMPONENTS_CDC_SOURCES
-    Class/CDC/Src/usbd_cdc.c
-#    Class/CDC/Src/usbd_cdc_if_template.c
-)
-
-SET(USBDevice_COMPONENTS_DFU_HEADERS
-#    Class/DFU/Inc/usbd_dfu_media_template.h
-    Class/DFU/Inc/usbd_dfu.h
-)
-SET(USBDevice_COMPONENTS_DFU_SOURCES
-    Class/DFU/Src/usbd_dfu.c
-#    Class/DFU/Src/usbd_dfu_media_template.c
-)
-
-SET(USBDevice_COMPONENTS_AUDIO_HEADERS
-    Class/AUDIO/Inc/usbd_audio.h
-#    Class/AUDIO/Inc/usbd_audio_if_template.h
-)
-SET(USBDevice_COMPONENTS_AUDIO_SOURCES
-#    Class/AUDIO/Src/usbd_audio_if_template.c
-    Class/AUDIO/Src/usbd_audio.c
-)
-
-SET(USBDevice_COMPONENTS_Template_HEADERS
-    Class/Template/Inc/usbd_template.h
-) 
-SET(USBDevice_COMPONENTS_Template_SOURCES
-    Class/Template/Src/usbd_template.c
-)
-
-SET(USBDevice_COMPONENTS_MSC_HEADERS
-    Class/MSC/Inc/usbd_msc_scsi.h
-#    Class/MSC/Inc/usbd_msc_storage_template.h
-    Class/MSC/Inc/usbd_msc_data.h
-    Class/MSC/Inc/usbd_msc.h
-    Class/MSC/Inc/usbd_msc_bot.h
-)
-SET(USBDevice_COMPONENTS_MSC_SOURCES
-    Class/MSC/Src/usbd_msc.c
-    Class/MSC/Src/usbd_msc_data.c
-    Class/MSC/Src/usbd_msc_bot.c
-    Class/MSC/Src/usbd_msc_scsi.c
-#    Class/MSC/Src/usbd_msc_storage_template.c
-)
-
-SET(USBDevice_COMPONENTS_HID_HEADERS
-    Class/HID/Inc/usbd_hid.h
-)
-SET(USBDevice_COMPONENTS_HID_SOURCES
-    Class/HID/Src/usbd_hid.c
-)
-
-SET(USBDevice_COMPONENTS_CustomHID_HEADERS
-#    Class/CustomHID/Inc/usbd_customhid_if_template.h
-    Class/CustomHID/Inc/usbd_customhid.h
-)
-SET(USBDevice_COMPONENTS_CustomHID_SOURCES
-    Class/CustomHID/Src/usbd_customhid.c
-#    Class/CustomHID/Src/usbd_customhid_if_template.c
-)
-
-IF(NOT USBDevice_FIND_COMPONENTS)
-    SET(USBDevice_FIND_COMPONENTS ${USBDevice_COMPONENTS})
-    MESSAGE(STATUS "No USBDevice components selected, using all: ${USBDevice_FIND_COMPONENTS}")
-ENDIF()
-
-FOREACH(cmp ${USBDevice_FIND_COMPONENTS})
-    LIST(FIND USBDevice_COMPONENTS ${cmp} USBDevice_FOUND_INDEX)
-    IF(${USBDevice_FOUND_INDEX} LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown USBDevice component: ${cmp}. Available components: ${USBDevice_COMPONENTS}")
-    ENDIF()
-    LIST(FIND USBDevice_COMPONENTS ${cmp} USBDevice_FOUND_INDEX)
-    IF(NOT (${USBDevice_FOUND_INDEX} LESS 0))
-        LIST(APPEND USBDevice_INC ${USBDevice_COMPONENTS_${cmp}_HEADERS})
-        LIST(APPEND USBDevice_SRC ${USBDevice_COMPONENTS_${cmp}_SOURCES})
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES USBDevice_INC)
-LIST(REMOVE_DUPLICATES USBDevice_SRC)
-
-FOREACH(INC ${USBDevice_INC})
-    SET(INC_FILE INC_FILE-NOTFOUND)
-    GET_FILENAME_COMPONENT(INC_FILE ${STM32Cube_DIR}/Middlewares/ST/STM32_USB_Device_Library/${INC} DIRECTORY)
-    MESSAGE(STATUS "Found ${INC}: ${INC_FILE}")
-    LIST(APPEND USBDevice_INCLUDE_DIR ${INC_FILE})
-ENDFOREACH()
-LIST(REMOVE_DUPLICATES USBDevice_INCLUDE_DIR)
-
-FOREACH(SRC ${USBDevice_SRC})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/ST/STM32_USB_Device_Library
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    MESSAGE(STATUS "Found ${SRC}: ${SRC_FILE}")
-    LIST(APPEND USBDevice_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(USBDevice DEFAULT_MSG USBDevice_INCLUDE_DIR USBDevice_SOURCES)

cmake-old/FinduGFX.cmake

@@ -1,38 +0,0 @@
-IF(NOT uGFX_FIND_COMPONENTS) 
-    SET(uGFX_FIND_COMPONENTS gos gos_chibios)
-    MESSAGE(STATUS "No uGFX components specified, using default: ${uGFX_FIND_COMPONENTS}")
-ENDIF()
-
-LIST(APPEND uGFX_FIND_COMPONENTS gfx gdriver)
-
-SET(uGFX_gfx_SEARCH_PATH ${uGFX_DIR} ${uGFX_DIR}/src)
-SET(uGFX_gfx_HEADERS gfx.h)
-SET(uGFX_gfx_SOURCES gfx.c)
-
-SET(uGFX_gdriver_SEARCH_PATH ${uGFX_DIR}/src/gdriver)
-SET(uGFX_gdriver_HEADERS gdriver_options.h gdriver_rules.h gdriver.h)
-SET(uGFX_gdriver_SOURCES gdriver.c)
-
-INCLUDE(uGFX_GOS)
-INCLUDE(uGFX_GDISP)
-
-SET(uGFX_COMPONENTS gfx gdriver gos ${uGFX_GOS_MODULES} gdisp ${uGFX_GDISP_MODULES})
-
-FOREACH(comp ${uGFX_FIND_COMPONENTS})
-    LIST(FIND uGFX_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown uGFX component: ${comp}\nSupported uGFX components: ${uGFX_COMPONENTS}")
-    ENDIF()
-    IF(uGFX_${comp}_SOURCES)
-        FOREACH(source ${uGFX_${comp}_SOURCES})
-            FIND_FILE(uGFX_${comp}_${source} NAMES ${source} PATHS ${uGFX_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND uGFX_SOURCES ${uGFX_${comp}_${source}})
-        ENDFOREACH()
-    ENDIF()
-    IF(uGFX_${comp}_HEADERS)
-        FOREACH(header ${uGFX_${comp}_HEADERS})
-            FIND_PATH(uGFX_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${uGFX_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND uGFX_INCLUDE_DIRS ${uGFX_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake-old/gcc_stm32.cmake

@@ -1,211 +0,0 @@
-GET_FILENAME_COMPONENT(STM32_CMAKE_DIR ${CMAKE_CURRENT_LIST_FILE} DIRECTORY)
-SET(CMAKE_MODULE_PATH ${STM32_CMAKE_DIR} ${CMAKE_MODULE_PATH})
-
-SET(STM32_SUPPORTED_FAMILIES L0 L1 L4 F0 F1 F2 F3 F4 F7 H7 CACHE INTERNAL "stm32 supported families")
-IF(STM32_CHIP)
-	 SET(STM32_CHIP "${STM32_CHIP}" CACHE STRING "STM32 chip to build for")
-ENDIF()
-
-IF(NOT TOOLCHAIN_PREFIX)
-     SET(TOOLCHAIN_PREFIX "/usr")
-     MESSAGE(STATUS "No TOOLCHAIN_PREFIX specified, using default: " ${TOOLCHAIN_PREFIX})
-ELSE()
-     FILE(TO_CMAKE_PATH "${TOOLCHAIN_PREFIX}" TOOLCHAIN_PREFIX)
-ENDIF()
-
-IF(NOT TARGET_TRIPLET)
-    SET(TARGET_TRIPLET "arm-none-eabi")
-    MESSAGE(STATUS "No TARGET_TRIPLET specified, using default: " ${TARGET_TRIPLET})
-ENDIF()
-
-IF(NOT STM32_FAMILY)
-    MESSAGE(STATUS "No STM32_FAMILY specified, trying to get it from STM32_CHIP")
-    IF(NOT STM32_CHIP)
-        SET(STM32_FAMILY "F1" CACHE INTERNAL "stm32 family")
-        MESSAGE(STATUS "Neither STM32_FAMILY nor STM32_CHIP specified, using default STM32_FAMILY: ${STM32_FAMILY}")
-    ELSE()
-        STRING(REGEX REPLACE "^[sS][tT][mM]32(([fF][0-47])|([hH]7)|([lL][0-14])|([tT])|([wW])).+$" "\\1" STM32_FAMILY ${STM32_CHIP})
-        STRING(TOUPPER ${STM32_FAMILY} STM32_FAMILY)
-        MESSAGE(STATUS "Selected STM32 family: ${STM32_FAMILY}")
-    ENDIF()
-ENDIF()
-
-STRING(TOUPPER "${STM32_FAMILY}" STM32_FAMILY)
-LIST(FIND STM32_SUPPORTED_FAMILIES "${STM32_FAMILY}" FAMILY_INDEX)
-IF(FAMILY_INDEX EQUAL -1)
-    MESSAGE(FATAL_ERROR "Invalid/unsupported STM32 family: ${STM32_FAMILY}")
-ENDIF()
-
-SET(TOOLCHAIN_BIN_DIR "${TOOLCHAIN_PREFIX}/bin")
-SET(TOOLCHAIN_INC_DIR "${TOOLCHAIN_PREFIX}/${TARGET_TRIPLET}/include")
-SET(TOOLCHAIN_LIB_DIR "${TOOLCHAIN_PREFIX}/${TARGET_TRIPLET}/lib")
-
-SET(CMAKE_SYSTEM_NAME Generic)
-SET(CMAKE_SYSTEM_PROCESSOR arm)
-
-IF (WIN32)
-    SET(TOOL_EXECUTABLE_SUFFIX ".exe")
-ELSE()
-    SET(TOOL_EXECUTABLE_SUFFIX "")
-ENDIF()
-
-IF(${CMAKE_VERSION} VERSION_LESS 3.6.0)
-    INCLUDE(CMakeForceCompiler)
-    CMAKE_FORCE_C_COMPILER("${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc${TOOL_EXECUTABLE_SUFFIX}" GNU)
-    CMAKE_FORCE_CXX_COMPILER("${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-g++${TOOL_EXECUTABLE_SUFFIX}" GNU)
-ELSE()
-    SET(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
-    SET(CMAKE_C_COMPILER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc${TOOL_EXECUTABLE_SUFFIX}")
-    SET(CMAKE_CXX_COMPILER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-g++${TOOL_EXECUTABLE_SUFFIX}")
-ENDIF()
-SET(CMAKE_ASM_COMPILER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc${TOOL_EXECUTABLE_SUFFIX}")
-
-SET(CMAKE_OBJCOPY "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objcopy${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "objcopy tool")
-SET(CMAKE_OBJDUMP "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objdump${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "objdump tool")
-SET(CMAKE_SIZE "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-size${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "size tool")
-SET(CMAKE_DEBUGER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gdb${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "debuger")
-SET(CMAKE_CPPFILT "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-c++filt${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "C++filt")
-
-SET(CMAKE_C_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "c compiler flags debug")
-SET(CMAKE_CXX_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "cxx compiler flags debug")
-SET(CMAKE_ASM_FLAGS_DEBUG "-g" CACHE INTERNAL "asm compiler flags debug")
-SET(CMAKE_EXE_LINKER_FLAGS_DEBUG "-Xlinker -Map=output.map" CACHE INTERNAL "linker flags debug")
-
-SET(CMAKE_C_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "c compiler flags release")
-SET(CMAKE_CXX_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "cxx compiler flags release")
-SET(CMAKE_ASM_FLAGS_RELEASE "" CACHE INTERNAL "asm compiler flags release")
-SET(CMAKE_EXE_LINKER_FLAGS_RELEASE "-Xlinker -Map=output.map -s -flto" CACHE INTERNAL "linker flags release")
-
-SET(CMAKE_FIND_ROOT_PATH "${TOOLCHAIN_PREFIX}/${TARGET_TRIPLET}" ${EXTRA_FIND_PATH})
-SET(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-SET(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-SET(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-
-FUNCTION(STM32_ADD_HEX_BIN_TARGETS TARGET)
-    IF(EXECUTABLE_OUTPUT_PATH)
-      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
-    ELSE()
-      SET(FILENAME "${TARGET}")
-    ENDIF()
-    ADD_CUSTOM_TARGET(${TARGET}.hex DEPENDS ${TARGET} COMMAND ${CMAKE_OBJCOPY} -Oihex ${FILENAME} ${FILENAME}.hex)
-    ADD_CUSTOM_TARGET(${TARGET}.bin DEPENDS ${TARGET} COMMAND ${CMAKE_OBJCOPY} -Obinary ${FILENAME} ${FILENAME}.bin)
-ENDFUNCTION()
-
-FUNCTION(STM32_ADD_DUMP_TARGET TARGET)
-    IF(EXECUTABLE_OUTPUT_PATH)
-      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
-    ELSE()
-      SET(FILENAME "${TARGET}")
-    ENDIF()
-    ADD_CUSTOM_TARGET(${TARGET}.dump DEPENDS ${TARGET} COMMAND ${CMAKE_OBJDUMP} -x -D -S -s ${FILENAME} | ${CMAKE_CPPFILT} > ${FILENAME}.dump)
-ENDFUNCTION()
-
-FUNCTION(STM32_PRINT_SIZE_OF_TARGETS TARGET)
-    IF(EXECUTABLE_OUTPUT_PATH)
-      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
-    ELSE()
-      SET(FILENAME "${TARGET}")
-    ENDIF()
-    add_custom_command(TARGET ${TARGET} POST_BUILD COMMAND ${CMAKE_SIZE} ${FILENAME})
-ENDFUNCTION()
-
-STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-INCLUDE(gcc_stm32${STM32_FAMILY_LOWER})
-
-FUNCTION(STM32_SET_FLASH_PARAMS TARGET STM32_FLASH_SIZE STM32_RAM_SIZE STM32_CCRAM_SIZE STM32_MIN_STACK_SIZE STM32_MIN_HEAP_SIZE STM32_FLASH_ORIGIN STM32_RAM_ORIGIN STM32_CCRAM_ORIGIN)
-    IF(NOT STM32_LINKER_SCRIPT)
-        MESSAGE(STATUS "No linker script specified, generating default")
-        INCLUDE(stm32_linker)
-        FILE(WRITE ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld ${STM32_LINKER_SCRIPT_TEXT})
-    ELSE()
-        CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
-    ENDIF()
-
-    GET_TARGET_PROPERTY(TARGET_LD_FLAGS ${TARGET} LINK_FLAGS)
-    IF(TARGET_LD_FLAGS)
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\" ${TARGET_LD_FLAGS}")
-    ELSE()
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\"")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES LINK_FLAGS ${TARGET_LD_FLAGS})
-ENDFUNCTION()
-
-FUNCTION(STM32_SET_FLASH_PARAMS TARGET FLASH_SIZE RAM_SIZE)
-    IF(NOT STM32_FLASH_ORIGIN)
-        SET(STM32_FLASH_ORIGIN "0x08000000")
-    ENDIF()
-
-    IF(NOT STM32_RAM_ORIGIN)
-        SET(STM32_RAM_ORIGIN "0x20000000")
-    ENDIF()
-
-    IF(NOT STM32_MIN_STACK_SIZE)
-        SET(STM32_MIN_STACK_SIZE "0x200")
-    ENDIF()
-
-    IF(NOT STM32_MIN_HEAP_SIZE)
-        SET(STM32_MIN_HEAP_SIZE "0")
-    ENDIF()
-
-    IF(NOT STM32_CCRAM_ORIGIN)
-        SET(STM32_CCRAM_ORIGIN "0x10000000")
-    ENDIF()
-
-    IF(NOT STM32_LINKER_SCRIPT)
-        MESSAGE(STATUS "No linker script specified, generating default")
-        INCLUDE(stm32_linker)
-        FILE(WRITE ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld ${STM32_LINKER_SCRIPT_TEXT})
-    ELSE()
-        CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
-    ENDIF()
-
-    GET_TARGET_PROPERTY(TARGET_LD_FLAGS ${TARGET} LINK_FLAGS)
-    IF(TARGET_LD_FLAGS)
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\" ${TARGET_LD_FLAGS}")
-    ELSE()
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\"")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES LINK_FLAGS ${TARGET_LD_FLAGS})
-ENDFUNCTION()
-
-FUNCTION(STM32_SET_TARGET_PROPERTIES TARGET)
-    IF(NOT STM32_CHIP_TYPE)
-        IF(NOT STM32_CHIP)
-            MESSAGE(WARNING "Neither STM32_CHIP_TYPE nor STM32_CHIP selected, you'll have to use STM32_SET_CHIP_DEFINITIONS directly")
-        ELSE()
-            STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        ENDIF()
-    ENDIF()
-    STM32_SET_CHIP_DEFINITIONS(${TARGET} ${STM32_CHIP_TYPE})
-    IF(((NOT STM32_FLASH_SIZE) OR (NOT STM32_RAM_SIZE)) AND (NOT STM32_CHIP))
-        MESSAGE(FATAL_ERROR "Cannot get chip parameters. Please specify either STM32_CHIP or STM32_FLASH_SIZE/STM32_RAM_SIZE")
-    ENDIF()
-    IF((NOT STM32_FLASH_SIZE) OR (NOT STM32_RAM_SIZE))
-        STM32_GET_CHIP_PARAMETERS(${STM32_CHIP} STM32_FLASH_SIZE STM32_RAM_SIZE STM32_CCRAM_SIZE)
-        IF((NOT STM32_FLASH_SIZE) OR (NOT STM32_RAM_SIZE))
-            MESSAGE(FATAL_ERROR "Unknown chip: ${STM32_CHIP}. Try to use STM32_FLASH_SIZE/STM32_RAM_SIZE directly.")
-        ENDIF()
-    ENDIF()
-    STM32_SET_FLASH_PARAMS(${TARGET} ${STM32_FLASH_SIZE} ${STM32_RAM_SIZE})
-    MESSAGE(STATUS "${STM32_CHIP} has ${STM32_FLASH_SIZE}iB of flash memory and ${STM32_RAM_SIZE}iB of RAM")
-ENDFUNCTION()
-
-FUNCTION(STM32_SET_HSE_VALUE TARGET STM32_HSE_VALUE)
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "HSE_VALUE=${STM32_HSE_VALUE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "HSE_VALUE=${STM32_HSE_VALUE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()
-
-MACRO(STM32_GENERATE_LIBRARIES NAME SOURCES LIBRARIES)
-    STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-    FOREACH(CHIP_TYPE ${STM32_CHIP_TYPES})
-        STRING(TOLOWER ${CHIP_TYPE} CHIP_TYPE_LOWER)
-        LIST(APPEND ${LIBRARIES} ${NAME}_${STM32_FAMILY_LOWER}_${CHIP_TYPE_LOWER})
-        ADD_LIBRARY(${NAME}_${STM32_FAMILY_LOWER}_${CHIP_TYPE_LOWER} ${SOURCES})
-        STM32_SET_CHIP_DEFINITIONS(${NAME}_${STM32_FAMILY_LOWER}_${CHIP_TYPE_LOWER} ${CHIP_TYPE})
-    ENDFOREACH()
-ENDMACRO()

cmake-old/gcc_stm32f0.cmake

@@ -1,94 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m0 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 030x6 030x8 031x6 038xx 042x6 048x6 051x8 058xx 070x6 070xB 071xB 072xB 078xx 091xC 098xx 030xC CACHE INTERNAL "stm32f0 chip types")
-SET(STM32_CODES "030.[46]" "030.8" "031.[46]" "038.6" "042.[46]" "048.6" "051.[468]" "058.8" "070.6" "070.B" "071.[8B]" "072.[8B]" "078.B" "091.[BC]" "098.C" "030.C")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]((03[018].[468C])|(04[28].[46])|(05[18].[468])|(07[0128].[68B])|(09[18].[BC])).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](0[34579][0128]).[468BC].*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]0[34579][0128].([468BC]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "4")
-        SET(FLASH "16K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL 030x6)
-        SET(RAM "4K")
-    ELSEIF(${TYPE} STREQUAL 030x8)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 030xC)
-        SET(RAM "32K")
-    ELSEIF(${TYPE} STREQUAL 031x6)
-        SET(RAM "4K")
-    ELSEIF(${TYPE} STREQUAL 038xx)
-        SET(RAM "4K")
-    ELSEIF(${TYPE} STREQUAL 042x6)
-        SET(RAM "6K")
-    ELSEIF(${TYPE} STREQUAL 048x6)
-        SET(RAM "6K")
-    ELSEIF(${TYPE} STREQUAL 051x8)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 058xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 070x6)
-        SET(RAM "6K")
-    ELSEIF(${TYPE} STREQUAL 070xB)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 071xB)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 072xB)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 078xx)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 091xC)
-        SET(RAM "32K")
-    ELSEIF(${TYPE} STREQUAL 098xx)
-        SET(RAM "32K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F0 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F0;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F0;STM32F${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32f1.cmake

@@ -1,134 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m3 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 100xB 100xE 101x6 101xB 101xE 101xG 102x6 102xB 103x6 103xB 103xE 103xG 105xC 107xC CACHE INTERNAL "stm32f1 chip types")
-SET(STM32_CODES "100.[468B]" "100.[CDE]" "101.[46]" "101.[8B]" "101.[CDE]" "101.[FG]" "102.[46]" "102.[8B]" "103.[46]" "103.[8B]" "103.[CDE]" "103.[FG]" "105.[8BC]" "107.[BC]")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](10[012357].[468BCDEFG]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](10[012357]).[468BCDEFG].*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]10[012357].([468BCDEFG]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "4")
-        SET(FLASH "16K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "D")
-        SET(FLASH "384K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "F")
-        SET(FLASH "768K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL 100xB)
-        IF((STM32_SIZE_CODE STREQUAL "4") OR (STM32_SIZE_CODE STREQUAL "6"))
-            SET(RAM "4K")
-        ELSE()
-            SET(RAM "8K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 100xE)
-        IF(STM32_SIZE_CODE STREQUAL "C")
-            SET(RAM "24K")
-        ELSE()
-            SET(RAM "32K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101x6)
-        IF(STM32_SIZE_CODE STREQUAL "4")
-            SET(RAM "4K")
-        ELSE()
-            SET(RAM "6K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101xB)
-        IF(STM32_SIZE_CODE STREQUAL "8")
-            SET(RAM "10K")
-        ELSE()
-            SET(RAM "16K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101xE)
-        IF(STM32_SIZE_CODE STREQUAL "C")
-            SET(RAM "32K")
-        ELSE()
-            SET(RAM "48K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101xG)
-        SET(RAM "80K")
-    ELSEIF(${TYPE} STREQUAL 102x6)
-        IF(STM32_SIZE_CODE STREQUAL "4")
-            SET(RAM "4K")
-        ELSE()
-            SET(RAM "6K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 102xB)
-        IF(STM32_SIZE_CODE STREQUAL "8")
-            SET(RAM "10K")
-        ELSE()
-            SET(RAM "16K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 103x6)
-        IF(STM32_SIZE_CODE STREQUAL "4")
-            SET(RAM "6K")
-        ELSE()
-            SET(RAM "10K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 103xB)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 103xE)
-        IF(STM32_SIZE_CODE STREQUAL "C")
-            SET(RAM "48K")
-        ELSE()
-            SET(RAM "54K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 103xG)
-        SET(RAM "96K")
-    ELSEIF(${TYPE} STREQUAL 105xC)
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL 107xC)
-        SET(RAM "64K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F1 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F1;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F1;STM32F${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32f2.cmake

@@ -1,72 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m3 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 205xB 205xC 205xE 205xF 205xG 215xE 215xG 207xC 207xE 207xF 207xG 217xE 217xG)
-SET(STM32_CODES "205.B" "205.C" "205.E" "205.F" "205.G" "215.E" "215.G" "207.C" "207.E" "207.F" "207.G" "217.E" "217.G")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](2[01][57].[BCDEFG]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]2[01][57].([BCDEFG]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "D")
-        SET(FLASH "384K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "F")
-        SET(FLASH "768K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    SET(RAM "128K")
-
-    IF(${TYPE} STREQUAL 205xC)
-        SET(RAM "96K")
-    ELSEIF(${TYPE} STREQUAL 205xB)
-        SET(RAM "64K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F2 chip type: ${CHIP_TYPE}")
-    ENDIF()
-
-    STRING(REGEX REPLACE "^(2[01][57]).[BCDEFG]" "\\1" DEVICE_NUM ${STM32_CHIP_TYPE})
-
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F2;STM32F${DEVICE_NUM}xx;${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F2;STM32F${DEVICE_NUM}xx")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32f3.cmake

@@ -1,81 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -g -Wa,--no-warn -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 301xx 302xx 303xx 334xx 373xx CACHE INTERNAL "stm32f3 chip types")
-SET(STM32_CODES "301.." "302.." "303.." "334.." "373..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](3[037][1234].[68BC]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](3[037][1234].[68BC]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]3[037][1234].([68BC]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-        SET(CCRAM_SIZE_IN_K "4")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-        SET(CCRAM_SIZE_IN_K "4")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-        SET(CCRAM_SIZE_IN_K "8")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-        SET(CCRAM_SIZE_IN_K "8")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL "301xx")
-        SET(RAM_SIZE_IN_K "16")
-    ELSEIF(${TYPE} STREQUAL "302xx")
-        SET(RAM_SIZE_IN_K "256")
-    ELSEIF(${TYPE} STREQUAL "303xx")
-        SET(RAM_SIZE_IN_K "48")
-    ELSEIF(${TYPE} STREQUAL "334xx")
-        SET(RAM_SIZE_IN_K "16")
-    ELSEIF(${TYPE} STREQUAL "373xx")
-        SET(RAM_SIZE_IN_K "128")
-    ENDIF()
-
-    # RAM size = total RAM - CCRAM
-    MATH(EXPR RAM_SIZE_IN_K "${RAM_SIZE_IN_K}-${CCRAM_SIZE_IN_K}")
-    # Append the 'K' literal to the numbers
-    SET(RAM "${RAM_SIZE_IN_K}K")
-    SET(CCRAM "${CCRAM_SIZE_IN_K}K")
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} ${CCRAM})
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F3 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    STRING(REGEX REPLACE "^(3..).(.)" "\\1x\\2" CHIP_TYPE_2 ${STM32_CODE})
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F3;STM32F${CHIP_TYPE_2};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F3;STM32F${CHIP_TYPE_2}")
-    ENDIF()
-
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32f4.cmake

@@ -1,86 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=gnu11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=c++14 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 405xx 415xx 407xx 417xx 427xx 437xx 429xx 439xx 446xx 401xC 401xE 411xE CACHE INTERNAL "stm32f4 chip types")
-SET(STM32_CODES "405.." "415.." "407.." "417.." "427.." "437.." "429.." "439.." "446.." "401.[CB]" "401.[ED]" "411.[CE]")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](4[01234][15679].[BCEGI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](4[01234][15679].[BCEGI]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]4[01234][15679].([BCEGI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "401xC")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "401xE")
-        SET(RAM "96K")
-    ELSEIF(${TYPE} STREQUAL "411xE")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "405xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "415xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "407xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "417xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "427xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "437xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "429xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "439xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "446xx")
-        SET(RAM "128K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "64K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F4 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F4;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F4;STM32F${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32f7.cmake

@@ -1,75 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 745xx 746xx 756xx 765xx 767xx 777xx 769xx 779xx CACHE INTERNAL "stm32f7 chip types")
-SET(STM32_CODES "745.." "746.." "756.." "765.." "767.." "777.." "769.." "779..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](7[4567][5679].[EGI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](7[4567][5679].[EGI]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]7[4567][5679].([EGI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "745xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "746xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "756xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "765xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "767xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "777xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "769xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "779xx")
-        SET(RAM "512K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    # First 64K of RAM are already CCM...
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F7 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F7;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F7;STM32F${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32h7.cmake

@@ -1,63 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 743xx 750xx 753xx CACHE INTERNAL "stm32h7 chip types")
-SET(STM32_CODES "743.." "750.." "753..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[hH](7[45][03].[BI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[hH](7[45][03].[BI]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[hH]7[45][03].([BI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "743xx")
-        SET(RAM "1024K")
-    ELSEIF(${TYPE} STREQUAL "750xx")
-        SET(RAM "1024K")
-    ELSEIF(${TYPE} STREQUAL "753xx")
-        SET(RAM "1024K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    # First 64K of RAM are already CCM...
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32H7 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32H7;STM32H${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32H7;STM32H${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32l0.cmake

@@ -1,96 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m0 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 011xx 021xx 031xx 041xx 051xx 052xx 053xx 061xx 062xx 063xx 071xx 072xx 073xx 081xx 082xx 083xx CACHE INTERNAL "stm32l0 chip types")
-SET(STM32_CODES "011.[34]" "021.4" "031.[46]" "041.6" "051.[68]" "052.[68]" "053.[68]" "061.8" "062.8" "063.8" "071.[BZ]" "072.[BZ]" "073.[8BZ]" "081.Z" "082.[BZ]" "083.[8BZ]")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]((011.[34])|(021.4)|(031.[46])|(041.6)|(05[123].[68])|(06[123].8)|(07[123].[8BZ])|(08[123].[8BZ])).+$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](0[12345678][123]).[3468BZ]" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]0[12345678][123].([3468BZ])" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "3")
-        SET(FLASH "8K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "4")
-        SET(FLASH "16K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "Z")
-        SET(FLASH "192K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL 011xx)
-        SET(RAM "2K")
-    ELSEIF(${TYPE} STREQUAL 021xx)
-        SET(RAM "2K")
-    ELSEIF(${TYPE} STREQUAL 031xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 041xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 051xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 052xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 053xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 061xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 062xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 063xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 071xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 072xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 073xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 081xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 082xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 083xx)
-        SET(RAM "20K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32L0 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32L0;STM32L${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32L0;STM32L${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32l1.cmake

@@ -1,133 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m3 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 100xB   100xBA   100xC   151xB   151xBA   151xC   151xCA   151xD   151xDX   151xE   152xB   152xBA   152xC   152xCA   152xD   152xDX   152xE   162xC   162xCA   162xD   162xDX   162xE   CACHE INTERNAL "stm32l1 chip types")
-SET(STM32_CODES     "100.B" "100.BA" "100.C" "151.B" "151.BA" "151.C" "151.CA" "151.D" "151.DX" "151.E" "152.B" "152.BA" "152.C" "152.CA" "152.D" "152.DX" "152.E" "162.C" "162.CA" "162.D" "162.DX" "162.E")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]((100.[BC])|(100.[BC]A)|(15[12].[BCE])|(15[12].[BC]A)|(15[12].DX)|(162.[EDC])|(162.CA)|(162.DX)).+$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](1[056][012]).([68BCDE]$|[68BCDE][AX]$)" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](1[056][012]).([68BCDE]$|[68BCDE][AX]$)" "\\2" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "6" OR STM32_SIZE_CODE STREQUAL "6A")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8" OR STM32_SIZE_CODE STREQUAL "8A")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B" OR STM32_SIZE_CODE STREQUAL "BA")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C" OR STM32_SIZE_CODE STREQUAL "CA")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "D" OR STM32_SIZE_CODE STREQUAL "DX")
-        SET(FLASH "384K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL 100xB)
-        SET(RAM "10K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 100xBA)
-        SET(RAM "16K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 100xC)
-        SET(RAM "16K")
-        SET(FLASH "256K")
-
-    ELSEIF(${TYPE} STREQUAL 151xB)
-        SET(RAM "16K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 151xBA)
-        SET(RAM "32K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 151xC)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 151xCA)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 151xD)
-        SET(RAM "48K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 151xDX)
-        SET(RAM "80K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 151xE)
-        SET(RAM "80K")
-        SET(FLASH "512K")
-
-    ELSEIF(${TYPE} STREQUAL 152xB)
-        SET(RAM "16K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 152xBA)
-        SET(RAM "32K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 152xC)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 152xCA)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 152xD)
-        SET(RAM "48K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 152xDX)
-        SET(RAM "80K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 152xE)
-        SET(RAM "80K")
-        SET(FLASH "512K")
-
-    ELSEIF(${TYPE} STREQUAL 162xC)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 162xCA)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 162xD)
-        SET(RAM "48K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 162xDX)
-        SET(RAM "80K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 162xE)
-        SET(RAM "80K")
-        SET(FLASH "512K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32L1 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32L${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32L${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/gcc_stm32l4.cmake

@@ -1,104 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 431xx 432xx 433xx 442xx 443xx 451xx 452xx 462xx 471xx 475xx 476xx 485xx 486xx 496xx 4a6xx 4r5xx 4r7xx 4r9xx 4s5xx 4s7xx 4s9xx CACHE INTERNAL "stm32l4 chip types")
-SET(STM32_CODES "431.." "432.." "433.." "442.." "443.." "451.." "452.." "462.." "471.." "475.." "476.." "485.." "486.." "496.." "4a6.." "4r5.." "4r7.." "4r9.." "4s5.." "4s7.." "4s9..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](4[3456789ARS][1235679].[BCEGI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](4[3456789ARS][1235679].[BCEGI]]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]4[3456789ARS][1235679].([BCEGI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "431xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "432xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "433xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "442xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "443xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "451xx")
-        SET(RAM "160K")
-    ELSEIF(${TYPE} STREQUAL "452xx")
-        SET(RAM "160K")
-    ELSEIF(${TYPE} STREQUAL "462xx")
-        SET(RAM "160K")
-    ELSEIF(${TYPE} STREQUAL "471xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "475xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "476xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "485xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "486xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "496xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "4a6xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "4r5xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4r7xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4r9xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4s5xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4s7xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4s9xx")
-        SET(RAM "640K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "64K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32L4 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32L4;STM32L${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32L4;STM32L${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake-old/stm32_linker.cmake

@@ -1,127 +0,0 @@
-# TODO: Add support for external RAM
-
-IF((NOT STM32_CCRAM_SIZE) OR (STM32_CCRAM_SIZE STREQUAL "0K"))
-  SET(STM32_CCRAM_DEF "")
-  SET(STM32_CCRAM_SECTION "")
-ELSE()
-  SET(STM32_CCRAM_DEF "  CCMRAM (rw) : ORIGIN = ${STM32_CCRAM_ORIGIN}, LENGTH = ${STM32_CCRAM_SIZE}\n")
-  SET(STM32_CCRAM_SECTION 
-  "  _siccmram = LOADADDR(.ccmram)\;\n"
-  "  .ccmram :\n"
-  "  {"
-  "    . = ALIGN(4)\;\n"
-  "    _sccmram = .\;\n"
-  "    *(.ccmram)\n"
-  "    *(.ccmram*)\n"
-  "    . = ALIGN(4)\;\n"
-  "    _eccmram = .\;\n"
-  "  } >CCMRAM AT> FLASH\n"
-  )
-ENDIF()
-
-SET(STM32_LINKER_SCRIPT_TEXT
-  "ENTRY(Reset_Handler)\n"
-  "_estack = ${STM32_RAM_ORIGIN} + ${STM32_RAM_SIZE} - 1\;\n"
-  "_Min_Heap_Size = ${STM32_MIN_HEAP_SIZE}\;\n"
-  "_Min_Stack_Size = ${STM32_MIN_STACK_SIZE}\;\n"
-  "MEMORY\n"
-  "{\n"
-  "  FLASH (rx)      : ORIGIN = ${STM32_FLASH_ORIGIN}, LENGTH = ${STM32_FLASH_SIZE}\n"
-  "  RAM (xrw)      : ORIGIN = ${STM32_RAM_ORIGIN}, LENGTH = ${STM32_RAM_SIZE}\n"
-  "${STM32_CCRAM_DEF}"
-  "}\n"
-  "SECTIONS\n"
-  "{\n"
-  "  .isr_vector :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    KEEP(*(.isr_vector))\n"
-  "    . = ALIGN(4)\;\n"
-  "  } >FLASH\n"
-  "  .text :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    *(.text)\n"
-  "    *(.text*)\n"
-  "    *(.glue_7)\n"
-  "    *(.glue_7t)\n"
-  "    *(.eh_frame)\n"
-  "    KEEP (*(.init))\n"
-  "    KEEP (*(.fini))\n"
-  "    . = ALIGN(4)\;\n"
-  "    _etext = .\;\n"
-  "  } >FLASH\n"
-  "  .rodata :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    *(.rodata)\n"
-  "    *(.rodata*)\n"
-  "    . = ALIGN(4)\;\n"
-  "  } >FLASH\n"
-  "  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH\n"
-  "  .ARM : {\n"
-  "    __exidx_start = .\;\n"
-  "    *(.ARM.exidx*)\n"
-  "    __exidx_end = .\;\n"
-  "  } >FLASH\n"
-  "  .preinit_array     :\n"
-  "  {\n"
-  "    PROVIDE_HIDDEN (__preinit_array_start = .)\;\n"
-  "    KEEP (*(.preinit_array*))\n"
-  "    PROVIDE_HIDDEN (__preinit_array_end = .)\;\n"
-  "  } >FLASH\n"
-  "  .init_array :\n"
-  "  {\n"
-  "    PROVIDE_HIDDEN (__init_array_start = .)\;\n"
-  "    KEEP (*(SORT(.init_array.*)))\n"
-  "    KEEP (*(.init_array*))\n"
-  "    PROVIDE_HIDDEN (__init_array_end = .)\;\n"
-  "  } >FLASH\n"
-  "  .fini_array :\n"
-  "  {\n"
-  "    PROVIDE_HIDDEN (__fini_array_start = .)\;\n"
-  "    KEEP (*(SORT(.fini_array.*)))\n"
-  "    KEEP (*(.fini_array*))\n"
-  "    PROVIDE_HIDDEN (__fini_array_end = .)\;\n"
-  "  } >FLASH\n"
-  "  _sidata = LOADADDR(.data)\;\n"
-  "  .data : \n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    _sdata = .\;\n"
-  "    *(.data)\n"
-  "    *(.data*)\n"
-  "    . = ALIGN(4)\;\n"
-  "    _edata = .\;\n"
-  "  } >RAM AT> FLASH\n"
-  "${STM32_CCRAM_SECTION}"
-  "  . = ALIGN(4)\;\n"
-  "  .bss :\n"
-  "  {\n"
-  "    _sbss = .\;\n"
-  "    __bss_start__ = _sbss\;\n"
-  "    *(.bss)\n"
-  "    *(.bss*)\n"
-  "    *(COMMON)\n"
-  "    . = ALIGN(4)\;\n"
-  "    _ebss = .\;\n"
-  "    __bss_end__ = _ebss\;\n"
-  "  } >RAM\n"
-  "  ._user_heap_stack :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    PROVIDE ( end = . )\;\n"
-  "    PROVIDE ( _end = . )\;\n"
-  "    . = . + _Min_Heap_Size\;\n"
-  "    . = . + _Min_Stack_Size\;\n"
-  "    . = ALIGN(4)\;\n"
-  "  } >RAM\n"
-  "  /DISCARD/ :\n"
-  "  {\n"
-  "    libc.a ( * )\n"
-  "    libm.a ( * )\n"
-  "    libgcc.a ( * )\n"
-  "  }\n"
-  "  .ARM.attributes 0 : { *(.ARM.attributes) }\n"
-  "}\n"
-)

cmake-old/uGFX_GDISP.cmake

@@ -1,28 +0,0 @@
-SET(uGFX_GDISP_MODULES gdisp_fonts gdisp_image gdisp_pixmap)
-
-SET(uGFX_gdisp_SEARCH_PATH ${uGFX_DIR}/src/gdisp)
-SET(uGFX_gdisp_HEADERS gdisp_colors.h gdisp_options.h gdisp_rules.h)
-SET(uGFX_gdisp_SOURCES gdisp.c)
- 
-SET(uGFX_gdisp_fonts_SEARCH_PATH ${uGFX_DIR}/src/gdisp ${uGFX_DIR}/src/gdisp/mcufont)
-SET(uGFX_gdisp_fonts_HEADERS mcufont.h mf_bwfont.h mf_config.h mf_encoding.h mf_font.h mf_justify.h mf_kerning.h mf_rlefont.h mf_scaledfont.h mf_wordwrap.h)
-SET(uGFX_gdisp_fonts_SOURCES mf_bwfont.c mf_encoding.c mf_font.c mf_justify.c mf_kerning.c mf_rlefont.c mf_scaledfont.c mf_wordwrap.c gdisp_fonts.c)
-
-SET(uGFX_gdisp_image_SEARCH_PATH ${uGFX_DIR}/src/gdisp)
-SET(uGFX_gdisp_image_HEADERS gdisp_image.h)
-SET(uGFX_gdisp_image_SOURCES gdisp_image_bmp.c gdisp_image_gif.c gdisp_image_gif.c gdisp_image_jpg.c gdisp_image_native.c gdisp_image_png.c gdisp_image.c)
-
-SET(uGFX_gdisp_pixmap_SEARCH_PATH ${uGFX_DIR}/src/gdisp)
-SET(uGFX_gdisp_pixmap_HEADERS gdisp_pixmap.h)
-SET(uGFX_gdisp_pixmap_SOURCES gdisp_pixmap.c)
-
-SET(uGFX_GDISP_DRIVERS ED060SC4 framebuffer HX8347D ILI93xx ILI9320 ILI9325 ILI9341 ILI9481 LGDP4532 
-  Nokia6610GE8 Nokia6610GE12 PCD8544 PCF8812 R61505U RA8875 S6D1121 SPFD54124B SSD1289 SSD1306 SSD1331 
-  SSD1351 SSD1963 SSD2119 ST7565 STM32F429iDiscovery STM32LTDC TestStub TLS8204)
-
-FOREACH(driver ${uGFX_GDISP_DRIVERS})
-  SET(uGFX_driver_${driver}_SEARCH_PATH ${uGFX_DIR}/drivers/gdisp/${driver})
-  SET(uGFX_driver_${driver}_SOURCES gdisp_lld_${driver}.c)
-  SET(uGFX_driver_${driver}_HEADERS gdisp_lld_config.h)
-  LIST(APPEND uGFX_GDISP_MODULES driver_${driver})
-ENDFOREACH()

cmake-old/uGFX_GOS.cmake

@@ -1,11 +0,0 @@
-SET(uGFX_GOS_MODULES gos_arduino gos_chibios gos_ecos gos_freertos gos_linux gos_osx gos_raw32 gos_rawrtos gos_win32 gos_x_heap gos_x_threads)
-
-SET(uGFX_gos_SEARCH_PATH ${uGFX_DIR}/src/gos)
-SET(uGFX_gos_HEADERS gos.h)
-
-FOREACH(module ${uGFX_GOS_MODULES})
-  SET(uGFX_${module}_SEARCH_PATH ${uGFX_DIR}/src/gos)
-  SET(uGFX_${module}_SOURCES ${module}.c)
-  SET(uGFX_${module}_HEADERS ${module}.h)
-ENDFOREACH()
-

stm32-blinky/CMakeLists.txt

@@ -1,22 +0,0 @@
-PROJECT(stm32-blinky)
-
-CMAKE_MINIMUM_REQUIRED(VERSION 2.8)
-ENABLE_LANGUAGE(ASM)
-
-FIND_PACKAGE(CMSIS REQUIRED)
-FIND_PACKAGE(STM32HAL COMPONENTS gpio tim REQUIRED)
-
-INCLUDE_DIRECTORIES(
-    ${CMAKE_CURRENT_SOURCE_DIR}
-    ${CMSIS_INCLUDE_DIRS}
-    ${STM32HAL_INCLUDE_DIR}
-)
-
-SET(PROJECT_SOURCES
-    main.c
-)
-
-ADD_EXECUTABLE(${CMAKE_PROJECT_NAME} ${PROJECT_SOURCES} ${CMSIS_SOURCES} ${STM32HAL_SOURCES})
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME})
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME})

stm32-blinky/main.c

@@ -1,201 +0,0 @@
-#if defined STM32F1
-# include <stm32f1xx_hal.h>
-#elif defined STM32F2
-# include <stm32f2xx_hal.h>
-#elif defined STM32F4
-# include <stm32f4xx_hal.h>
-#endif
-
-void initGPIO()
-{
-    GPIO_InitTypeDef GPIO_Config;
-
-    GPIO_Config.Mode = GPIO_MODE_AF_PP;
-    GPIO_Config.Pull = GPIO_NOPULL;
-    GPIO_Config.Speed = GPIO_SPEED_HIGH;
-
-#if defined STM32F1
-    __GPIOC_CLK_ENABLE();
-    __AFIO_CLK_ENABLE();
-
-    GPIO_Config.Pin = GPIO_PIN_8;
-    HAL_GPIO_Init(GPIOC, &GPIO_Config);
-#elif defined STM32F2
-    __GPIOD_CLK_ENABLE();
-
-    GPIO_Config.Alternate = GPIO_AF2_TIM4;
-    GPIO_Config.Pin = GPIO_PIN_12;
-    HAL_GPIO_Init(GPIOD, &GPIO_Config);
-#elif defined STM32F4
-    __GPIOA_CLK_ENABLE();
-
-    GPIO_Config.Alternate = GPIO_AF2_TIM3;
-    GPIO_Config.Pin = GPIO_PIN_6;
-    HAL_GPIO_Init(GPIOA, &GPIO_Config);
-#endif
-}
-
-void initTimers()
-{
-    TIM_HandleTypeDef TIM_Handle;
-
-    // 10 kHz timer.
-#if defined STM32F1
-    __TIM8_CLK_ENABLE();
-    TIM_Handle.Instance = TIM8;
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetPCLK2Freq() / 10000) - 1;
-#elif defined STM32F2
-    __TIM4_CLK_ENABLE();
-    TIM_Handle.Instance = TIM4;
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetPCLK2Freq() / 100000) - 1;
-#elif defined STM32F4
-    __TIM3_CLK_ENABLE();
-    TIM_Handle.Instance = TIM3;
-    // TIM3 Clocked from SYSCLK = 168 MHz
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetSysClockFreq() / 10000) - 1;
-#endif
-    // 1 Hz blinking
-    TIM_Handle.Init.Period = 10000;
-    TIM_Handle.Init.ClockDivision = 0;
-    TIM_Handle.Init.CounterMode = TIM_COUNTERMODE_UP;
-
-    HAL_TIM_Base_Init(&TIM_Handle);
-    HAL_TIM_PWM_Init(&TIM_Handle);
-
-    TIM_OC_InitTypeDef TIM_OCConfig;
-
-    TIM_OCConfig.OCMode = TIM_OCMODE_PWM1;
-    // 5000 / 10000 = 50% duty cycle.
-    TIM_OCConfig.Pulse = 4999;
-    TIM_OCConfig.OCPolarity = TIM_OCPOLARITY_HIGH;
-    TIM_OCConfig.OCFastMode = TIM_OCFAST_DISABLE;
-
-#if defined STM32F1
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_3);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_3);
-#elif defined STM32F2
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_1);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_1);
-#elif defined STM32F4
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_1);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_1);
-#endif
-}
-
-static void initClock(void)
-{
-    RCC_ClkInitTypeDef RCC_ClkInitStruct;
-    RCC_OscInitTypeDef RCC_OscInitStruct;
-
-#if defined STM32F1
-    __HAL_RCC_PWR_CLK_ENABLE();
-
-    uint8_t fLatency;
-
-    RCC_OscInitStruct.OscillatorType  = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
-    RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
-    RCC_OscInitStruct.HSICalibrationValue = 0;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-
-# if (defined STM32F100xB) || (defined STM32F100xE)
-    // 8 MHz * 3 = 24 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL3;
-    fLatency = FLASH_LATENCY_0;
-# elif (defined STM32F101x6) || (defined STM32F101xB) || (defined STM32F101xE) || (defined STM32F101xG)
-    // 8 MHz / 2 * 9 = 36 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    fLatency = FLASH_LATENCY_1;
-# elif (defined STM32F102x6) || (defined STM32F102xB)
-    // 8 MHz * 6 = 48 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
-    fLatency = FLASH_LATENCY_1;
-# elif (defined STM32F103x6) || (defined STM32F103xB) || (defined STM32F103xE) || (defined STM32F103xG)
-    // 8 MHz * 9 = 72 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    fLatency = FLASH_LATENCY_2;
-# elif (defined STM32F105xC) || (defined STM32F107xC)
-    // 8 MHz * 9 = 72 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    fLatency = FLASH_LATENCY_2;
-# endif
-
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
-
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, fLatency);
-#elif defined STM32F2
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    RCC_OscInitStruct.PLL.PLLM = 25;
-    RCC_OscInitStruct.PLL.PLLN = 240;
-    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-    RCC_OscInitStruct.PLL.PLLQ = 5;
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-     clocks dividers */
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
-#elif defined STM32F4
-    __HAL_RCC_PWR_CLK_ENABLE();
-    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
-    // 8 MHz * 336 / 8 / 2 = 168 MHz SYSCLK
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    RCC_OscInitStruct.PLL.PLLM = 8;
-    RCC_OscInitStruct.PLL.PLLN = 336;
-    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-    RCC_OscInitStruct.PLL.PLLQ = 7;
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
-
-    if (HAL_GetREVID() == 0x1001)
-    {
-        __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-    }
-#endif
-}
-
-void initAll(void)
-{
-    HAL_Init();
-
-    initClock();
-    initGPIO();
-    initTimers();
-}
-
-int main(void)
-{
-    initAll();
-    for (;;);
-    return 0;
-}

stm32-blinky/stm32f1xx_hal_conf.h

@@ -1,367 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f1xx_hal_conf.h
-  * @author  MCD Application Team
-  * @version V1.0.0
-  * @date    15-December-2014
-  * @brief   HAL configuration template file.
-  *          This file should be copied to the application folder and renamed
-  *          to stm32f1xx_hal_conf.h.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F1xx_HAL_CONF_H
-#define __STM32F1xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver 
-  */
-#define HAL_MODULE_ENABLED
-// #define HAL_ADC_MODULE_ENABLED
-// #define HAL_CAN_MODULE_ENABLED
-// #define HAL_CEC_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-// #define HAL_CRC_MODULE_ENABLED
-// #define HAL_DAC_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-// #define HAL_ETH_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_GPIO_MODULE_ENABLED
-// #define HAL_HCD_MODULE_ENABLED
-// #define HAL_I2C_MODULE_ENABLED
-// #define HAL_I2S_MODULE_ENABLED
-// #define HAL_IRDA_MODULE_ENABLED
-// #define HAL_IWDG_MODULE_ENABLED
-// #define HAL_NAND_MODULE_ENABLED
-// #define HAL_NOR_MODULE_ENABLED
-// #define HAL_PCCARD_MODULE_ENABLED
-// #define HAL_PCD_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-// #define HAL_RTC_MODULE_ENABLED
-// #define HAL_SD_MODULE_ENABLED
-// #define HAL_SMARTCARD_MODULE_ENABLED
-// #define HAL_SPI_MODULE_ENABLED
-// #define HAL_SRAM_MODULE_ENABLED
-#define HAL_TIM_MODULE_ENABLED
-// #define HAL_UART_MODULE_ENABLED
-// #define HAL_USART_MODULE_ENABLED
-// #define HAL_WWDG_MODULE_ENABLED
-
-/* ########################## Oscillator Values adaptation ####################*/
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
-  */
-#if !defined  (HSE_VALUE) 
-#if defined(USE_STM3210C_EVAL)
-  #define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
-#else
-  #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
-#endif
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  *        This value is used by the UART, RTC HAL module to compute the system frequency
-  */
-#if !defined  (LSE_VALUE)
-  #define LSE_VALUE    ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
-#endif /* LSE_VALUE */
-
-   
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-   
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */           
-#define  TICK_INT_PRIORITY            ((uint32_t)0x000F)    /*!< tick interrupt priority */            
-#define  USE_RTOS                     0     
-#define  PREFETCH_ENABLE              1
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
-  *        HAL drivers code
-  */
-/*#define USE_FULL_ASSERT    1*/ 
-
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2
-#define MAC_ADDR1   0
-#define MAC_ADDR2   0
-#define MAC_ADDR3   0
-#define MAC_ADDR4   0
-#define MAC_ADDR5   0
-
-/* Definition of the Ethernet driver buffers size and count */   
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)8)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/ 
-#define DP83848_PHY_ADDRESS             0x01
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
- 
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x10)    /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x11)    /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x12)    /*!< MII Interrupt Status and Misc. Control Register */
- 
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file 
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
- #include "stm32f1xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
- #include "stm32f1xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-   
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f1xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-   
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f1xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */  
-   
-#ifdef HAL_CAN_MODULE_ENABLED
- #include "stm32f1xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f1xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
- #include "stm32f1xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
- #include "stm32f1xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
- #include "stm32f1xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
- #include "stm32f1xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
- #include "stm32f1xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
- #include "stm32f1xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
- #include "stm32f1xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f1xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f1xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f1xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f1xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f1xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
- #include "stm32f1xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f1xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */  
-
-#ifdef HAL_NAND_MODULE_ENABLED
- #include "stm32f1xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */     
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f1xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f1xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f1xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f1xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f1xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f1xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f1xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f1xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f1xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */   
-   
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F1xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

stm32-blinky/stm32f2xx_hal_conf.h

@@ -1,376 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f2xx_hal_conf.h
-  * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    13-March-2014
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F2xx_HAL_CONF_H
-#define __STM32F2xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CRC_MODULE_ENABLED */
-/* #define HAL_CRYP_MODULE_ENABLED */
-/* #define HAL_DAC_MODULE_ENABLED */
-/* #define HAL_DCMI_MODULE_ENABLED */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_ETH_MODULE_ENABLED */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_PCCARD_MODULE_ENABLED */
-#define HAL_SRAM_MODULE_ENABLED
-/* #define HAL_HASH_MODULE_ENABLED */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED */
-/* #define HAL_IWDG_MODULE_ENABLED */
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SD_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED */
- #define HAL_TIM_MODULE_ENABLED
-/* #define HAL_UART_MODULE_ENABLED */
-/* #define HAL_USART_MODULE_ENABLED */
-/* #define HAL_IRDA_MODULE_ENABLED */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED */
- #define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */
-#define  USE_RTOS                     0
-#define  PREFETCH_ENABLE              1
-#define  INSTRUCTION_CACHE_ENABLE     1
-#define  DATA_CACHE_ENABLE            1
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2
-#define MAC_ADDR1   0
-#define MAC_ADDR2   0
-#define MAC_ADDR3   0
-#define MAC_ADDR4   0
-#define MAC_ADDR5   0
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)4)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x10)    /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x11)    /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x12)    /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f2xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f2xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f2xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f2xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f2xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f2xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f2xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f2xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f2xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f2xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f2xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f2xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f2xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f2xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f2xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f2xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f2xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f2xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f2xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f2xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f2xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f2xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f2xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f2xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f2xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f2xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f2xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f2xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f2xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f2xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f2xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f2xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f2xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F2xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

stm32-blinky/stm32f4xx_hal_conf.h

@@ -1,405 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    BSP/Inc/stm32f4xx_hal_conf.h
-  * @author  MCD Application Team
-  * @version V1.2.1
-  * @date    13-March-2015
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver 
-  */
-#define HAL_MODULE_ENABLED         
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
-/* #define HAL_LTDC_MODULE_ENABLED     */
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED      
-/* #define HAL_RNG_MODULE_ENABLED       */   
-/* #define HAL_RTC_MODULE_ENABLED       */
-/* #define HAL_SAI_MODULE_ENABLED        */   
-/* #define HAL_SD_MODULE_ENABLED         */
-/* #define HAL_SPI_MODULE_ENABLED       */
-#define HAL_TIM_MODULE_ENABLED
-/* #define HAL_UART_MODULE_ENABLED      */
-/* #define HAL_USART_MODULE_ENABLED     */ 
-/* #define HAL_IRDA_MODULE_ENABLED      */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED      */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
-  */
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  ((uint32_t)32000)    
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0F) /*!< tick interrupt priority */           
-#define  USE_RTOS                     0     
-#define  PREFETCH_ENABLE              0 /* The prefetch will be enabled in SystemClock_Config(), depending on the used 
-                                           STM32F405/415/07/417 device: RevA (prefetch must be off) or RevZ (prefetch can be on/off) */              
-#define  INSTRUCTION_CACHE_ENABLE     1
-#define  DATA_CACHE_ENABLE            1
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2
-#define MAC_ADDR1   0
-#define MAC_ADDR2   0
-#define MAC_ADDR3   0
-#define MAC_ADDR4   0
-#define MAC_ADDR5   0
-
-/* Definition of the Ethernet driver buffers size and count */   
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)4)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/ 
-#define DP83848_PHY_ADDRESS             0x01
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
- 
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x10)    /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x11)    /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x12)    /*!< MII Interrupt Status and Misc. Control Register */
- 
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file 
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-   
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
- 
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-   
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

stm32-blinky/stm32l0xx_hal_conf.h

@@ -1,316 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_conf.h
-  * @author  MCD Application Team
-  * @version V1.8.0
-  * @date    25-November-2016
-  * @brief   HAL configuration template file. 
-  *          This file should be copied to the application folder and renamed
-  *          to stm32l0xx_hal_conf.h.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CONF_H
-#define __STM32L0xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver 
-  */
-#define HAL_MODULE_ENABLED  
-#define HAL_ADC_MODULE_ENABLED   
-#define HAL_COMP_MODULE_ENABLED 
-#define HAL_CRC_MODULE_ENABLED  
-#define HAL_CRYP_MODULE_ENABLED  
-#define HAL_DAC_MODULE_ENABLED   
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_FIREWALL_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_I2C_MODULE_ENABLED
-#define HAL_I2S_MODULE_ENABLED   
-#define HAL_IWDG_MODULE_ENABLED
-#define HAL_LCD_MODULE_ENABLED 
-#define HAL_LPTIM_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED  
-#define HAL_RCC_MODULE_ENABLED 
-#define HAL_RNG_MODULE_ENABLED   
-#define HAL_RTC_MODULE_ENABLED
-#define HAL_SPI_MODULE_ENABLED   
-#define HAL_TIM_MODULE_ENABLED
-#define HAL_TSC_MODULE_ENABLED   
-#define HAL_UART_MODULE_ENABLED 
-#define HAL_USART_MODULE_ENABLED 
-#define HAL_IRDA_MODULE_ENABLED 
-#define HAL_SMARTCARD_MODULE_ENABLED 
-#define HAL_SMBUS_MODULE_ENABLED 
-#define HAL_WWDG_MODULE_ENABLED  
-#define HAL_CORTEX_MODULE_ENABLED
-#define HAL_PCD_MODULE_ENABLED 
-
-/* ########################## Oscillator Values adaptation ####################*/
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
-  */
-#if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal Multiple Speed oscillator (MSI) default value.
-  *        This value is the default MSI range value after Reset.
-  */
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    ((uint32_t)2000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal High Speed oscillator for USB (HSI48) value.
-  */
-#if !defined  (HSI48_VALUE) 
-#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-#endif /* HSI48_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  ((uint32_t)37000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  *        This value is used by the UART, RTC HAL module to compute the system frequency
-  */
-#if !defined  (LSE_VALUE)
-  #define LSE_VALUE    ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
-#endif /* LSE_VALUE */
-
-/**
-  * @brief Time out for LSE start up value in ms.
-  */
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-   
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U)    /*!< tick interrupt priority */            
-#define  USE_RTOS                     0U     
-#define  PREFETCH_ENABLE              1U              
-#define  PREREAD_ENABLE               0U
-#define  BUFFER_CACHE_DISABLE         0U
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file 
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32l0xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-  
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32l0xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32l0xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32l0xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32l0xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_COMP_MODULE_ENABLED
-  #include "stm32l0xx_hal_comp.h"
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32l0xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32l0xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32l0xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_FIREWALL_MODULE_ENABLED
-  #include "stm32l0xx_hal_firewall.h"
-#endif /* HAL_FIREWALL_MODULE_ENABLED */
- 
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32l0xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
- 
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32l0xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32l0xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32l0xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LCD_MODULE_ENABLED
- #include "stm32l0xx_hal_lcd.h"
-#endif /* HAL_LCD_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
-#include "stm32l0xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-   
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32l0xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32l0xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32l0xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32l0xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32l0xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_TSC_MODULE_ENABLED
- #include "stm32l0xx_hal_tsc.h"
-#endif /* HAL_TSC_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32l0xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32l0xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32l0xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32l0xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32l0xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32l0xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32l0xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CONF_H */
- 
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-

stm32-chibios-template/chibios-nil-f0-template/CMakeLists.txt

@@ -1,41 +0,0 @@
-# define chip used in this project, this set must define before project definition
-# for this project dont use cmake commandline option -DSTM32_CHIP=<chip>
-set(STM32_CHIP STM32F051x8)
-
-cmake_minimum_required(VERSION 3.4)
-project(chibios-nil-f0-template)
-
-ENABLE_LANGUAGE(ASM)
-
-# test build all available ChibiOS COMPONENTS for F4 chip
-#FIND_PACKAGE(ChibiOS COMPONENTS nil hal adc can ext gpt i2c i2s icu mac mmc_spi pal pwm rtc sdc serial serial_usb spi st uart usb  memstreams nullstreams REQUIRED)
-
-FIND_PACKAGE(ChibiOS COMPONENTS nil hal pal  REQUIRED)
-
-INCLUDE_DIRECTORIES(
-        ${CMAKE_CURRENT_SOURCE_DIR}
-        ${ChibiOS_INCLUDE_DIRS}
-        config
-        board
-        work
-)
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-
-
-
-ADD_DEFINITIONS(-DCORTEX_USE_FPU=FALSE)
-
-SET(STM32_LINKER_SCRIPT ${ChibiOS_LINKER_SCRIPT})
-
-
-set(SOURCE_FILES main.c board/board.c board/board.h config/mcuconf.h config/halconf.h config/nilconf.h work/test.c work/test.h )
-
-add_executable(${CMAKE_PROJECT_NAME}.elf ${SOURCE_FILES}  ${ChibiOS_SOURCES})
-
-TARGET_LINK_LIBRARIES(${CMAKE_PROJECT_NAME}.elf)
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME}.elf)
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-

stm32-chibios-template/chibios-nil-f0-template/board/board.c

@@ -1,102 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief   MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-}

stm32-chibios-template/chibios-nil-f0-template/board/board.h

@@ -1,753 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for ST STM32F0-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F0_DISCOVERY
-#define BOARD_NAME                  "ST STM32F0-Discovery"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- * NOTE: HSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#define STM32_LSEDRV                (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                0U
-#endif
-
-#define STM32_HSE_BYPASS
-
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON                0U
-#define GPIOA_PIN1                  1U
-#define GPIOA_PIN2                  2U
-#define GPIOA_PIN3                  3U
-#define GPIOA_PIN4                  4U
-#define GPIOA_PIN5                  5U
-#define GPIOA_PIN6                  6U
-#define GPIOA_PIN7                  7U
-#define GPIOA_PIN8                  8U
-#define GPIOA_PIN9                  9U
-#define GPIOA_PIN10                 10U
-#define GPIOA_PIN11                 11U
-#define GPIOA_PIN12                 12U
-#define GPIOA_SWDAT                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_PIN15                 15U
-
-#define GPIOB_PIN0                  0U
-#define GPIOB_PIN1                  1U
-#define GPIOB_PIN2                  2U
-#define GPIOB_PIN3                  3U
-#define GPIOB_PIN4                  4U
-#define GPIOB_PIN5                  5U
-#define GPIOB_PIN6                  6U
-#define GPIOB_PIN7                  7U
-#define GPIOB_PIN8                  8U
-#define GPIOB_PIN9                  9U
-#define GPIOB_PIN10                 10U
-#define GPIOB_PIN11                 11U
-#define GPIOB_PIN12                 12U
-#define GPIOB_PIN13                 13U
-#define GPIOB_PIN14                 14U
-#define GPIOB_PIN15                 15U
-
-#define GPIOC_PIN0                  0U
-#define GPIOC_PIN1                  1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PIN3                  3U
-#define GPIOC_PIN4                  4U
-#define GPIOC_PIN5                  5U
-#define GPIOC_PIN6                  6U
-#define GPIOC_PIN7                  7U
-#define GPIOC_LED4                  8U
-#define GPIOC_LED3                  9U
-#define GPIOC_PIN10                 10U
-#define GPIOC_PIN11                 11U
-#define GPIOC_PIN12                 12U
-#define GPIOC_PIN13                 13U
-#define GPIOC_OSC32_IN              14U
-#define GPIOC_OSC32_OUT             15U
-
-#define GPIOD_PIN0                  0U
-#define GPIOD_PIN1                  1U
-#define GPIOD_PIN2                  2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_PIN4                  4U
-#define GPIOD_PIN5                  5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_PIN12                 12U
-#define GPIOD_PIN13                 13U
-#define GPIOD_PIN14                 14U
-#define GPIOD_PIN15                 15U
-
-#define GPIOF_OSC_IN                0U
-#define GPIOF_OSC_OUT               1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
-#define PIN_OSPEED_2M(n)            (0U << ((n) * 2U))
-#define PIN_OSPEED_10M(n)           (1U << ((n) * 2U))
-#define PIN_OSPEED_40M(n)           (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0  - BUTTON                    (input floating).
- * PA1  - PIN1                      (input pullup).
- * PA2  - PIN2                      (input pullup).
- * PA3  - PIN3                      (input pullup).
- * PA4  - PIN4                      (input pullup).
- * PA5  - PIN5                      (input pullup).
- * PA6  - PIN6                      (input pullup).
- * PA7  - PIN7                      (input pullup).
- * PA8  - PIN8                      (input pullup).
- * PA9  - PIN9                      (input pullup).
- * PA10 - PIN10                     (input pullup).
- * PA11 - PIN11                     (input pullup).
- * PA12 - PIN12                     (input pullup).
- * PA13 - SWDAT                     (alternate 0).
- * PA14 - SWCLK                     (alternate 0).
- * PA15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_BUTTON) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOA_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOA_PIN12) |          \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDAT) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
-                                     PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_2M(GPIOA_BUTTON) |          \
-                                     PIN_OSPEED_2M(GPIOA_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOA_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOA_PIN12) |           \
-                                     PIN_OSPEED_40M(GPIOA_SWDAT) |          \
-                                     PIN_OSPEED_40M(GPIOA_SWCLK) |          \
-                                     PIN_OSPEED_40M(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_BUTTON) |     \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_SWDAT) |        \
-                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_BUTTON) |           \
-                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWDAT) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_BUTTON, 0) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN7, 0))
-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWDAT, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWCLK, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN15, 0))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input pullup).
- * PB1  - PIN1                      (input pullup).
- * PB2  - PIN2                      (input pullup).
- * PB3  - PIN3                      (input pullup).
- * PB4  - PIN4                      (input pullup).
- * PB5  - PIN5                      (input pullup).
- * PB6  - PIN6                      (input pullup).
- * PB7  - PIN7                      (input pullup).
- * PB8  - PIN8                      (input pullup).
- * PB9  - PIN9                      (input pullup).
- * PB10 - PIN10                     (input pullup).
- * PB11 - PIN11                     (input pullup).
- * PB12 - PIN12                     (input pullup).
- * PB13 - PIN13                     (input pullup).
- * PB14 - PIN14                     (input pullup).
- * PB15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_2M(GPIOB_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN1) |            \
-                                     PIN_OSPEED_40M(GPIOB_PIN2) |           \
-                                     PIN_OSPEED_40M(GPIOB_PIN3) |           \
-                                     PIN_OSPEED_40M(GPIOB_PIN4) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN7, 0))
-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN15, 0))
-
-/*
- * GPIOC setup:
- *
- * PC0  - PIN0                      (input pullup).
- * PC1  - PIN1                      (input pullup).
- * PC2  - PIN2                      (input pullup).
- * PC3  - PIN3                      (input pullup).
- * PC4  - PIN4                      (input pullup).
- * PC5  - PIN5                      (input pullup).
- * PC6  - PIN6                      (input pullup).
- * PC7  - PIN7                      (input pullup).
- * PC8  - LED4                      (output pushpull maximum).
- * PC9  - LED3                      (output pushpull maximum).
- * PC10 - PIN10                     (input pullup).
- * PC11 - PIN11                     (input pullup).
- * PC12 - PIN12                     (input pullup).
- * PC13 - PIN13                     (input pullup).
- * PC14 - OSC32_IN                  (input floating).
- * PC15 - OSC32_OUT                 (input floating).
- */
-#define VAL_GPIOC_MODER             (PIN_MODE_INPUT(GPIOC_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN7) |           \
-                                     PIN_MODE_OUTPUT(GPIOC_LED4) |          \
-                                     PIN_MODE_OUTPUT(GPIOC_LED3) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_IN) |       \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_LED4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_LED3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_2M(GPIOC_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN7) |            \
-                                     PIN_OSPEED_40M(GPIOC_LED4) |           \
-                                     PIN_OSPEED_40M(GPIOC_LED3) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN13) |           \
-                                     PIN_OSPEED_40M(GPIOC_OSC32_IN) |       \
-                                     PIN_OSPEED_40M(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR             (PIN_PUPDR_PULLUP(GPIOC_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN7) |         \
-                                     PIN_PUPDR_FLOATING(GPIOC_LED4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_LED3) |       \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN13) |        \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) |   \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN7) |             \
-                                     PIN_ODR_LOW(GPIOC_LED4) |              \
-                                     PIN_ODR_LOW(GPIOC_LED3) |              \
-                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_IN) |         \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN7, 0))
-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_LED4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_LED3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_OSC32_IN, 0) |       \
-                                     PIN_AFIO_AF(GPIOC_OSC32_OUT, 0))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                      (input pullup).
- * PD1  - PIN1                      (input pullup).
- * PD2  - PIN2                      (input pullup).
- * PD3  - PIN3                      (input pullup).
- * PD4  - PIN4                      (input pullup).
- * PD5  - PIN5                      (input pullup).
- * PD6  - PIN6                      (input pullup).
- * PD7  - PIN7                      (input pullup).
- * PD8  - PIN8                      (input pullup).
- * PD9  - PIN9                      (input pullup).
- * PD10 - PIN10                     (input pullup).
- * PD11 - PIN11                     (input pullup).
- * PD12 - PIN12                     (input pullup).
- * PD13 - PIN13                     (input pullup).
- * PD14 - PIN14                     (input pullup).
- * PD15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_2M(GPIOD_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN7, 0))
-#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN15, 0))
-
-/*
- * GPIOF setup:
- *
- * PF0  - OSC_IN                    (input floating).
- * PF1  - OSC_OUT                   (input floating).
- * PF2  - PIN2                      (input pullup).
- * PF3  - PIN3                      (input pullup).
- * PF4  - PIN4                      (input pullup).
- * PF5  - PIN5                      (input pullup).
- * PF6  - PIN6                      (input pullup).
- * PF7  - PIN7                      (input pullup).
- * PF8  - PIN8                      (input pullup).
- * PF9  - PIN9                      (input pullup).
- * PF10 - PIN10                     (input pullup).
- * PF11 - PIN11                     (input pullup).
- * PF12 - PIN12                     (input pullup).
- * PF13 - PIN13                     (input pullup).
- * PF14 - PIN14                     (input pullup).
- * PF15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOF_MODER             (PIN_MODE_INPUT(GPIOF_OSC_IN) |         \
-                                     PIN_MODE_INPUT(GPIOF_OSC_OUT) |        \
-                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_2M(GPIOF_OSC_IN) |          \
-                                     PIN_OSPEED_2M(GPIOF_OSC_OUT) |         \
-                                     PIN_OSPEED_2M(GPIOF_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR             (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) |     \
-                                     PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) |    \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_OSC_IN) |           \
-                                     PIN_ODR_HIGH(GPIOF_OSC_OUT) |          \
-                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_OSC_IN, 0) |         \
-                                     PIN_AFIO_AF(GPIOF_OSC_OUT, 0) |        \
-                                     PIN_AFIO_AF(GPIOF_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN7, 0))
-#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN15, 0))
-
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

stm32-chibios-template/chibios-nil-f0-template/config/halconf.h

@@ -1,334 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f0-template/config/mcuconf.h

@@ -1,162 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-/*
- * STM32F0xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 3...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F0xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_HSI14_ENABLED                 TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   FALSE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2
-#define STM32_PREDIV_VALUE                  1
-#define STM32_PLLMUL_VALUE                  12
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE                          STM32_PPRE_DIV1
-#define STM32_ADCSW                         STM32_ADCSW_HSI14
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_ADCSW                         STM32_ADCSW_HSI14
-#define STM32_CECSW                         STM32_CECSW_HSI
-#define STM32_I2C1SW                        STM32_I2C1SW_HSI
-#define STM32_USART1SW                      STM32_USART1SW_PCLK
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              2
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3
-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3
-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         2
-#define STM32_GPT_TIM2_IRQ_PRIORITY         2
-#define STM32_GPT_TIM3_IRQ_PRIORITY         2
-#define STM32_GPT_TIM14_IRQ_PRIORITY        2
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         3
-#define STM32_I2C_I2C2_IRQ_PRIORITY         3
-#define STM32_I2C_USE_DMA                   TRUE
-#define STM32_I2C_I2C1_DMA_PRIORITY         1
-#define STM32_I2C_I2C2_DMA_PRIORITY         1
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         3
-#define STM32_ICU_TIM2_IRQ_PRIORITY         3
-#define STM32_ICU_TIM3_IRQ_PRIORITY         3
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         3
-#define STM32_PWM_TIM2_IRQ_PRIORITY         3
-#define STM32_PWM_TIM3_IRQ_PRIORITY         3
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        3
-#define STM32_SERIAL_USART2_PRIORITY        3
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  FALSE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         2
-#define STM32_SPI_SPI2_IRQ_PRIORITY         2
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               2
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      3
-#define STM32_UART_USART2_IRQ_PRIORITY      3
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-#endif /* _MCUCONF_H_ */

stm32-chibios-template/chibios-nil-f0-template/config/nilconf.h

@@ -1,179 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    nilconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _NILCONF_H_
-#define _NILCONF_H_
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Number of user threads in the application.
- * @note    This number is not inclusive of the idle thread which is
- *          Implicitly handled.
- */
-#define NIL_CFG_NUM_THREADS                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System timer settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define NIL_CFG_ST_RESOLUTION               32
-
-/**
- * @brief   System tick frequency.
- * @note    This value together with the @p NIL_CFG_ST_RESOLUTION
- *          option defines the maximum amount of time allowed for
- *          timeouts.
- */
-#define NIL_CFG_ST_FREQUENCY                50000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define NIL_CFG_ST_TIMEDELTA                2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define NIL_CFG_USE_EVENTS                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System assertions.
- */
-#define NIL_CFG_ENABLE_ASSERTS              FALSE
-
-/**
- * @brief   Stack check.
- */
-#define NIL_CFG_ENABLE_STACK_CHECK          FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System initialization hook.
- */
-#if !defined(NIL_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_INIT_HOOK() {                                        \
-}
-#endif
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define NIL_CFG_THREAD_EXT_FIELDS                                           \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- */
-#define NIL_CFG_THREAD_EXT_INIT_HOOK(tr) {                                  \
-  /* Add custom threads initialization code here.*/                         \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define NIL_CFG_IDLE_ENTER_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define NIL_CFG_IDLE_LEAVE_HOOK() {                                         \
-}
-
-/**
- * @brief   System halt hook.
- */
-#if !defined(NIL_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_HALT_HOOK(reason) {                                  \
-}
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in nilcore.h).   */
-/*===========================================================================*/
-
-#endif  /* _NILCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f0-template/main.c

@@ -1,34 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-
-THD_TABLE_BEGIN
-  THD_TABLE_ENTRY(waThread1, "Thread1", Thread1, NULL)
-THD_TABLE_END
-int main(void) {
-
-  halInit();
-  chSysInit();
-
-
-  while (true) {
-    if (palReadPad(GPIOA, GPIOA_BUTTON))
-    chThdSleepMilliseconds(500);
-  }
-}

stm32-chibios-template/chibios-nil-f0-template/work/test.c

@@ -1,20 +0,0 @@
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-/*
- * This is a periodic thread that does absolutely nothing except flashing
- * a LED.
- */
-THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg) {
-
-  (void)arg;
-  while (true) {
-    palSetPad(GPIOC, GPIOC_LED4);
-    chThdSleepMilliseconds(500);
-    palClearPad(GPIOC, GPIOC_LED4);
-    chThdSleepMilliseconds(500);
-  }
-}
-
-

stm32-chibios-template/chibios-nil-f0-template/work/test.h

@@ -1,6 +0,0 @@
-#ifndef TEST_H
-#define TEST_H
-extern THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg);
-
-#endif // TEST_H

stm32-chibios-template/chibios-nil-f1-template/CMakeLists.txt

@@ -1,41 +0,0 @@
-# define chip used in this project, this set must define before project definition
-# for this project dont use cmake commandline option -DSTM32_CHIP=<chip>
-set(STM32_CHIP STM32F100x6)
-
-cmake_minimum_required(VERSION 3.4)
-project(chibios-nil-f1-template)
-
-ENABLE_LANGUAGE(ASM)
-
-# test build all available ChibiOS COMPONENTS for F4 chip
-#FIND_PACKAGE(ChibiOS COMPONENTS nil hal adc can ext gpt i2c i2s icu mac mmc_spi pal pwm rtc sdc serial serial_usb spi st uart usb memstreams nullstreams REQUIRED)
-
-FIND_PACKAGE(ChibiOS COMPONENTS nil hal pal  REQUIRED)
-
-INCLUDE_DIRECTORIES(
-        ${CMAKE_CURRENT_SOURCE_DIR}
-        ${ChibiOS_INCLUDE_DIRS}
-        config
-        board
-        work
-)
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-
-
-
-ADD_DEFINITIONS(-DCORTEX_USE_FPU=FALSE)
-
-SET(STM32_LINKER_SCRIPT ${ChibiOS_LINKER_SCRIPT})
-
-
-set(SOURCE_FILES main.c board/board.c board/board.h config/mcuconf.h config/halconf.h config/nilconf.h work/test.c work/test.h )
-
-add_executable(${CMAKE_PROJECT_NAME}.elf ${SOURCE_FILES}  ${ChibiOS_SOURCES})
-
-TARGET_LINK_LIBRARIES(${CMAKE_PROJECT_NAME}.elf)
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME}.elf)
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-

stm32-chibios-template/chibios-nil-f1-template/board/board.c

@@ -1,49 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-const PALConfig pal_default_config =
-{
-  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
-  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
-  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
-  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
-  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
-};
-#endif
-
-/*
- * Early initialization code.
- * This initialization must be performed just after stack setup and before
- * any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-/*
- * Board-specific initialization code.
- */
-void boardInit(void) {
-}

stm32-chibios-template/chibios-nil-f1-template/board/board.h

@@ -1,143 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for STMicroelectronics STM32VL-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32VL_DISCOVERY
-#define BOARD_NAME              "ST STM32VL-Discovery"
-
-/*
- * Board frequencies.
- */
-#define STM32_LSECLK            32768
-#define STM32_HSECLK            8000000
-
-/*
- * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
- */
-#define STM32F10X_MD_VL
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON            0
-#define GPIOA_SPI1NSS           4
-
-#define GPIOB_SPI2NSS           12
-
-#define GPIOC_LED4              8
-#define GPIOC_LED3              9
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- *
- * The digits have the following meaning:
- *   0 - Analog input.
- *   1 - Push Pull output 10MHz.
- *   2 - Push Pull output 2MHz.
- *   3 - Push Pull output 50MHz.
- *   4 - Digital input.
- *   5 - Open Drain output 10MHz.
- *   6 - Open Drain output 2MHz.
- *   7 - Open Drain output 50MHz.
- *   8 - Digital input with PullUp or PullDown resistor depending on ODR.
- *   9 - Alternate Push Pull output 10MHz.
- *   A - Alternate Push Pull output 2MHz.
- *   B - Alternate Push Pull output 50MHz.
- *   C - Reserved.
- *   D - Alternate Open Drain output 10MHz.
- *   E - Alternate Open Drain output 2MHz.
- *   F - Alternate Open Drain output 50MHz.
- * Please refer to the STM32 Reference Manual for details.
- */
-
-/*
- * Port A setup.
- * Everything input with pull-up except:
- * PA0  - Normal input      (BUTTON).
- * PA2  - Alternate output  (USART2 TX).
- * PA3  - Normal input      (USART2 RX).
- * PA4  - Push pull output  (SPI1 NSS), initially high state.
- * PA5  - Alternate output  (SPI1 SCK).
- * PA6  - Normal input      (SPI1 MISO).
- * PA7  - Alternate output  (SPI1 MOSI).
- * PA9  - Alternate output  (USART1 TX).
- * PA10 - Normal input      (USART1 RX).
- */
-#define VAL_GPIOACRL            0xB4B34B84      /*  PA7...PA0 */
-#define VAL_GPIOACRH            0x888884B8      /* PA15...PA8 */
-#define VAL_GPIOAODR            0xFFFFFFFF
-
-/*
- * Port B setup.
- * Everything input with pull-up except:
- * PB12 - Push pull output  (SPI2 NSS), initially high state.
- * PB13 - Alternate output  (SPI2 SCK).
- * PB14 - Normal input      (SPI2 MISO).
- * PB15 - Alternate output  (SPI2 MOSI).
- */
-#define VAL_GPIOBCRL            0x88888888      /*  PB7...PB0 */
-#define VAL_GPIOBCRH            0xB4B38888      /* PB15...PB8 */
-#define VAL_GPIOBODR            0xFFFFFFFF
-
-/*
- * Port C setup.
- * Everything input with pull-up except:
- * PC8  - Push-pull output (LED4), initially low state.
- * PC9  - Push-pull output (LED3), initially low state.
- */
-#define VAL_GPIOCCRL            0x88888888      /*  PC7...PC0 */
-#define VAL_GPIOCCRH            0x88888833      /* PC15...PC8 */
-#define VAL_GPIOCODR            0xFFFFFCFF
-
-/*
- * Port D setup.
- * Everything input with pull-up except:
- * PD0  - Normal input (XTAL).
- * PD1  - Normal input (XTAL).
- */
-#define VAL_GPIODCRL            0x88888844      /*  PD7...PD0 */
-#define VAL_GPIODCRH            0x88888888      /* PD15...PD8 */
-#define VAL_GPIODODR            0xFFFFFFFF
-
-/*
- * Port E setup.
- * Everything input with pull-up except:
- */
-#define VAL_GPIOECRL            0x88888888      /*  PE7...PE0 */
-#define VAL_GPIOECRH            0x88888888      /* PE15...PE8 */
-#define VAL_GPIOEODR            0xFFFFFFFF
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

stm32-chibios-template/chibios-nil-f1-template/config/halconf.h

@@ -1,334 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f1-template/config/mcuconf.h

@@ -1,186 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-#define STM32F100_MCUCONF
-
-/*
- * STM32F103 drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   FALSE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
-#define STM32_PLLMUL_VALUE                  3
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV1
-#define STM32_PPRE2                         STM32_PPRE2_DIV1
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV2
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  TRUE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         6
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  TRUE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-
-/*
- * RTC driver system settings.
- */
-#define STM32_RTC_IRQ_PRIORITY              15
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-#endif /* _MCUCONF_H_ */

stm32-chibios-template/chibios-nil-f1-template/config/nilconf.h

@@ -1,179 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    nilconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _NILCONF_H_
-#define _NILCONF_H_
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Number of user threads in the application.
- * @note    This number is not inclusive of the idle thread which is
- *          Implicitly handled.
- */
-#define NIL_CFG_NUM_THREADS                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System timer settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define NIL_CFG_ST_RESOLUTION               16
-
-/**
- * @brief   System tick frequency.
- * @note    This value together with the @p NIL_CFG_ST_RESOLUTION
- *          option defines the maximum amount of time allowed for
- *          timeouts.
- */
-#define NIL_CFG_ST_FREQUENCY                50000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define NIL_CFG_ST_TIMEDELTA                2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define NIL_CFG_USE_EVENTS                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System assertions.
- */
-#define NIL_CFG_ENABLE_ASSERTS              FALSE
-
-/**
- * @brief   Stack check.
- */
-#define NIL_CFG_ENABLE_STACK_CHECK          FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System initialization hook.
- */
-#if !defined(NIL_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_INIT_HOOK() {                                        \
-}
-#endif
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define NIL_CFG_THREAD_EXT_FIELDS                                           \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- */
-#define NIL_CFG_THREAD_EXT_INIT_HOOK(tr) {                                  \
-  /* Add custom threads initialization code here.*/                         \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define NIL_CFG_IDLE_ENTER_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define NIL_CFG_IDLE_LEAVE_HOOK() {                                         \
-}
-
-/**
- * @brief   System halt hook.
- */
-#if !defined(NIL_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_HALT_HOOK(reason) {                                  \
-}
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in nilcore.h).   */
-/*===========================================================================*/
-
-#endif  /* _NILCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f1-template/main.c

@@ -1,34 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-
-THD_TABLE_BEGIN
-  THD_TABLE_ENTRY(waThread1, "Thread1", Thread1, NULL)
-THD_TABLE_END
-int main(void) {
-
-  halInit();
-  chSysInit();
-
-
-  while (true) {
-    if (palReadPad(GPIOA, GPIOA_BUTTON))
-    chThdSleepMilliseconds(500);
-  }
-}

stm32-chibios-template/chibios-nil-f1-template/work/test.c

@@ -1,20 +0,0 @@
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-/*
- * This is a periodic thread that does absolutely nothing except flashing
- * a LED.
- */
-THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg) {
-
-  (void)arg;
-  while (true) {
-    palSetPad(GPIOC, GPIOC_LED4);
-    chThdSleepMilliseconds(500);
-    palClearPad(GPIOC, GPIOC_LED4);
-    chThdSleepMilliseconds(500);
-  }
-}
-
-

stm32-chibios-template/chibios-nil-f1-template/work/test.h

@@ -1,6 +0,0 @@
-#ifndef TEST_H
-#define TEST_H
-extern THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg);
-
-#endif // TEST_H

stm32-chibios-template/chibios-nil-f4-template/CMakeLists.txt

@@ -1,41 +0,0 @@
-# define chip used in this project, this set must define before project definition
-# for this project dont use cmake commandline option -DSTM32_CHIP=<chip>
-set(STM32_CHIP STM32F407xG)
-
-cmake_minimum_required(VERSION 3.4)
-project(chibios-nil-f4-template)
-
-ENABLE_LANGUAGE(ASM)
-
-# test build all available ChibiOS COMPONENTS for F4 chip
-FIND_PACKAGE(ChibiOS 16 COMPONENTS nil hal adc can dac ext gpt i2c i2s icu mac mmc_spi pal pwm rtc sdc serial serial_usb spi st uart usb memstreams nullstreams REQUIRED)
-
-#FIND_PACKAGE(ChibiOS 16 COMPONENTS nil hal pal  REQUIRED)
-
-INCLUDE_DIRECTORIES(
-        ${CMAKE_CURRENT_SOURCE_DIR}
-        ${ChibiOS_INCLUDE_DIRS}
-        config
-        board
-        work
-)
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-
-
-
-ADD_DEFINITIONS(-DCORTEX_USE_FPU=TRUE)
-
-SET(STM32_LINKER_SCRIPT ${ChibiOS_LINKER_SCRIPT})
-
-
-set(SOURCE_FILES main.c board/board.c board/board.h config/mcuconf.h config/halconf.h config/nilconf.h work/test.c work/test.h )
-
-add_executable(${CMAKE_PROJECT_NAME}.elf ${SOURCE_FILES}  ${ChibiOS_SOURCES})
-
-TARGET_LINK_LIBRARIES(${CMAKE_PROJECT_NAME}.elf)
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME}.elf)
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-

stm32-chibios-template/chibios-nil-f4-template/board/board.c

@@ -1,124 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief   SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
-  (void)sdcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
-  (void)sdcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief   MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-}

stm32-chibios-template/chibios-nil-f4-template/board/board.h

@@ -1,1296 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for STMicroelectronics STM32F4-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F4_DISCOVERY
-#define BOARD_NAME                  "STMicroelectronics STM32F4-Discovery"
-
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                8000000U
-#endif
-
-/*
- * Board voltages.
- * Required for performance limits calculation.
- */
-#define STM32_VDD                   300U
-
-/*
- * MCU type as defined in the ST header.
- */
-
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON                0U
-#define GPIOA_PIN1                  1U
-#define GPIOA_PIN2                  2U
-#define GPIOA_PIN3                  3U
-#define GPIOA_LRCK                  4U
-#define GPIOA_SPC                   5U
-#define GPIOA_SDO                   6U
-#define GPIOA_SDI                   7U
-#define GPIOA_PIN8                  8U
-#define GPIOA_VBUS_FS               9U
-#define GPIOA_OTG_FS_ID             10U
-#define GPIOA_OTG_FS_DM             11U
-#define GPIOA_OTG_FS_DP             12U
-#define GPIOA_SWDIO                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_PIN15                 15U
-
-#define GPIOB_PIN0                  0U
-#define GPIOB_PIN1                  1U
-#define GPIOB_PIN2                  2U
-#define GPIOB_SWO                   3U
-#define GPIOB_PIN4                  4U
-#define GPIOB_PIN5                  5U
-#define GPIOB_SCL                   6U
-#define GPIOB_PIN7                  7U
-#define GPIOB_PIN8                  8U
-#define GPIOB_SDA                   9U
-#define GPIOB_CLK_IN                10U
-#define GPIOB_PIN11                 11U
-#define GPIOB_PIN12                 12U
-#define GPIOB_PIN13                 13U
-#define GPIOB_PIN14                 14U
-#define GPIOB_PIN15                 15U
-
-#define GPIOC_OTG_FS_POWER_ON       0U
-#define GPIOC_PIN1                  1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PDM_OUT               3U
-#define GPIOC_PIN4                  4U
-#define GPIOC_PIN5                  5U
-#define GPIOC_PIN6                  6U
-#define GPIOC_MCLK                  7U
-#define GPIOC_PIN8                  8U
-#define GPIOC_PIN9                  9U
-#define GPIOC_SCLK                  10U
-#define GPIOC_PIN11                 11U
-#define GPIOC_SDIN                  12U
-#define GPIOC_PIN13                 13U
-#define GPIOC_PIN14                 14U
-#define GPIOC_PIN15                 15U
-
-#define GPIOD_PIN0                  0U
-#define GPIOD_PIN1                  1U
-#define GPIOD_PIN2                  2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_RESET                 4U
-#define GPIOD_OVER_CURRENT          5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_LED4                  12U
-#define GPIOD_LED3                  13U
-#define GPIOD_LED5                  14U
-#define GPIOD_LED6                  15U
-
-#define GPIOE_INT1                  0U
-#define GPIOE_INT2                  1U
-#define GPIOE_PIN2                  2U
-#define GPIOE_CS_SPI                3U
-#define GPIOE_PIN4                  4U
-#define GPIOE_PIN5                  5U
-#define GPIOE_PIN6                  6U
-#define GPIOE_PIN7                  7U
-#define GPIOE_PIN8                  8U
-#define GPIOE_PIN9                  9U
-#define GPIOE_PIN10                 10U
-#define GPIOE_PIN11                 11U
-#define GPIOE_PIN12                 12U
-#define GPIOE_PIN13                 13U
-#define GPIOE_PIN14                 14U
-#define GPIOE_PIN15                 15U
-
-#define GPIOF_PIN0                  0U
-#define GPIOF_PIN1                  1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-#define GPIOG_PIN0                  0U
-#define GPIOG_PIN1                  1U
-#define GPIOG_PIN2                  2U
-#define GPIOG_PIN3                  3U
-#define GPIOG_PIN4                  4U
-#define GPIOG_PIN5                  5U
-#define GPIOG_PIN6                  6U
-#define GPIOG_PIN7                  7U
-#define GPIOG_PIN8                  8U
-#define GPIOG_PIN9                  9U
-#define GPIOG_PIN10                 10U
-#define GPIOG_PIN11                 11U
-#define GPIOG_PIN12                 12U
-#define GPIOG_PIN13                 13U
-#define GPIOG_PIN14                 14U
-#define GPIOG_PIN15                 15U
-
-#define GPIOH_OSC_IN                0U
-#define GPIOH_OSC_OUT               1U
-#define GPIOH_PIN2                  2U
-#define GPIOH_PIN3                  3U
-#define GPIOH_PIN4                  4U
-#define GPIOH_PIN5                  5U
-#define GPIOH_PIN6                  6U
-#define GPIOH_PIN7                  7U
-#define GPIOH_PIN8                  8U
-#define GPIOH_PIN9                  9U
-#define GPIOH_PIN10                 10U
-#define GPIOH_PIN11                 11U
-#define GPIOH_PIN12                 12U
-#define GPIOH_PIN13                 13U
-#define GPIOH_PIN14                 14U
-#define GPIOH_PIN15                 15U
-
-#define GPIOI_PIN0                  0U
-#define GPIOI_PIN1                  1U
-#define GPIOI_PIN2                  2U
-#define GPIOI_PIN3                  3U
-#define GPIOI_PIN4                  4U
-#define GPIOI_PIN5                  5U
-#define GPIOI_PIN6                  6U
-#define GPIOI_PIN7                  7U
-#define GPIOI_PIN8                  8U
-#define GPIOI_PIN9                  9U
-#define GPIOI_PIN10                 10U
-#define GPIOI_PIN11                 11U
-#define GPIOI_PIN12                 12U
-#define GPIOI_PIN13                 13U
-#define GPIOI_PIN14                 14U
-#define GPIOI_PIN15                 15U
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
-#define PIN_OSPEED_2M(n)            (0U << ((n) * 2U))
-#define PIN_OSPEED_25M(n)           (1U << ((n) * 2U))
-#define PIN_OSPEED_50M(n)           (2U << ((n) * 2U))
-#define PIN_OSPEED_100M(n)          (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0  - BUTTON                    (input floating).
- * PA1  - PIN1                      (input pullup).
- * PA2  - PIN2                      (input pullup).
- * PA3  - PIN3                      (input pullup).
- * PA4  - LRCK                      (alternate 6).
- * PA5  - SPC                       (alternate 5).
- * PA6  - SDO                       (alternate 5).
- * PA7  - SDI                       (alternate 5).
- * PA8  - PIN8                      (input pullup).
- * PA9  - VBUS_FS                   (input floating).
- * PA10 - OTG_FS_ID                 (alternate 10).
- * PA11 - OTG_FS_DM                 (alternate 10).
- * PA12 - OTG_FS_DP                 (alternate 10).
- * PA13 - SWDIO                     (alternate 0).
- * PA14 - SWCLK                     (alternate 0).
- * PA15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_BUTTON) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \
-                                     PIN_MODE_ALTERNATE(GPIOA_LRCK) |       \
-                                     PIN_MODE_ALTERNATE(GPIOA_SPC) |        \
-                                     PIN_MODE_ALTERNATE(GPIOA_SDO) |        \
-                                     PIN_MODE_ALTERNATE(GPIOA_SDI) |        \
-                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOA_VBUS_FS) |        \
-                                     PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) |  \
-                                     PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) |  \
-                                     PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) |  \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
-                                     PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_LRCK) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SPC) |        \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SDO) |        \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SDI) |        \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_100M(GPIOA_BUTTON) |        \
-                                     PIN_OSPEED_100M(GPIOA_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOA_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOA_PIN3) |          \
-                                     PIN_OSPEED_100M(GPIOA_LRCK) |          \
-                                     PIN_OSPEED_50M(GPIOA_SPC) |            \
-                                     PIN_OSPEED_50M(GPIOA_SDO) |            \
-                                     PIN_OSPEED_50M(GPIOA_SDI) |            \
-                                     PIN_OSPEED_100M(GPIOA_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOA_VBUS_FS) |       \
-                                     PIN_OSPEED_100M(GPIOA_OTG_FS_ID) |     \
-                                     PIN_OSPEED_100M(GPIOA_OTG_FS_DM) |     \
-                                     PIN_OSPEED_100M(GPIOA_OTG_FS_DP) |     \
-                                     PIN_OSPEED_100M(GPIOA_SWDIO) |         \
-                                     PIN_OSPEED_100M(GPIOA_SWCLK) |         \
-                                     PIN_OSPEED_100M(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_BUTTON) |     \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
-                                     PIN_PUPDR_FLOATING(GPIOA_LRCK) |       \
-                                     PIN_PUPDR_FLOATING(GPIOA_SPC) |        \
-                                     PIN_PUPDR_FLOATING(GPIOA_SDO) |        \
-                                     PIN_PUPDR_FLOATING(GPIOA_SDI) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
-                                     PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) |    \
-                                     PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) |  \
-                                     PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) |  \
-                                     PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) |  \
-                                     PIN_PUPDR_FLOATING(GPIOA_SWDIO) |      \
-                                     PIN_PUPDR_FLOATING(GPIOA_SWCLK) |      \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_BUTTON) |           \
-                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOA_LRCK) |             \
-                                     PIN_ODR_HIGH(GPIOA_SPC) |              \
-                                     PIN_ODR_HIGH(GPIOA_SDO) |              \
-                                     PIN_ODR_HIGH(GPIOA_SDI) |              \
-                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOA_VBUS_FS) |          \
-                                     PIN_ODR_HIGH(GPIOA_OTG_FS_ID) |        \
-                                     PIN_ODR_HIGH(GPIOA_OTG_FS_DM) |        \
-                                     PIN_ODR_HIGH(GPIOA_OTG_FS_DP) |        \
-                                     PIN_ODR_HIGH(GPIOA_SWDIO) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_BUTTON, 0) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_LRCK, 6) |           \
-                                     PIN_AFIO_AF(GPIOA_SPC, 5) |            \
-                                     PIN_AFIO_AF(GPIOA_SDO, 5) |            \
-                                     PIN_AFIO_AF(GPIOA_SDI, 5))
-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_VBUS_FS, 0) |        \
-                                     PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) |     \
-                                     PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) |     \
-                                     PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) |     \
-                                     PIN_AFIO_AF(GPIOA_SWDIO, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWCLK, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN15, 0))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input pullup).
- * PB1  - PIN1                      (input pullup).
- * PB2  - PIN2                      (input pullup).
- * PB3  - SWO                       (alternate 0).
- * PB4  - PIN4                      (input pullup).
- * PB5  - PIN5                      (input pullup).
- * PB6  - SCL                       (alternate 4).
- * PB7  - PIN7                      (input pullup).
- * PB8  - PIN8                      (input pullup).
- * PB9  - SDA                       (alternate 4).
- * PB10 - CLK_IN                    (input pullup).
- * PB11 - PIN11                     (input pullup).
- * PB12 - PIN12                     (input pullup).
- * PB13 - PIN13                     (input pullup).
- * PB14 - PIN14                     (input pullup).
- * PB15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \
-                                     PIN_MODE_ALTERNATE(GPIOB_SWO) |        \
-                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \
-                                     PIN_MODE_ALTERNATE(GPIOB_SCL) |        \
-                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \
-                                     PIN_MODE_ALTERNATE(GPIOB_SDA) |        \
-                                     PIN_MODE_INPUT(GPIOB_CLK_IN) |         \
-                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_SWO) |        \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \
-                                     PIN_OTYPE_OPENDRAIN(GPIOB_SCL) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \
-                                     PIN_OTYPE_OPENDRAIN(GPIOB_SDA) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_100M(GPIOB_PIN0) |          \
-                                     PIN_OSPEED_100M(GPIOB_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOB_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOB_SWO) |           \
-                                     PIN_OSPEED_100M(GPIOB_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOB_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOB_SCL) |           \
-                                     PIN_OSPEED_100M(GPIOB_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOB_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOB_SDA) |           \
-                                     PIN_OSPEED_100M(GPIOB_CLK_IN) |        \
-                                     PIN_OSPEED_100M(GPIOB_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOB_PIN12) |         \
-                                     PIN_OSPEED_100M(GPIOB_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOB_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
-                                     PIN_PUPDR_FLOATING(GPIOB_SWO) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
-                                     PIN_PUPDR_FLOATING(GPIOB_SCL) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
-                                     PIN_PUPDR_FLOATING(GPIOB_SDA) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_CLK_IN) |       \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOB_SWO) |              \
-                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOB_SCL) |              \
-                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOB_SDA) |              \
-                                     PIN_ODR_HIGH(GPIOB_CLK_IN) |           \
-                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_SWO, 0) |            \
-                                     PIN_AFIO_AF(GPIOB_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_SCL, 4) |            \
-                                     PIN_AFIO_AF(GPIOB_PIN7, 0))
-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_SDA, 4) |            \
-                                     PIN_AFIO_AF(GPIOB_CLK_IN, 0) |         \
-                                     PIN_AFIO_AF(GPIOB_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN15, 0))
-
-/*
- * GPIOC setup:
- *
- * PC0  - OTG_FS_POWER_ON           (output pushpull maximum).
- * PC1  - PIN1                      (input pullup).
- * PC2  - PIN2                      (input pullup).
- * PC3  - PDM_OUT                   (input pullup).
- * PC4  - PIN4                      (input pullup).
- * PC5  - PIN5                      (input pullup).
- * PC6  - PIN6                      (input pullup).
- * PC7  - MCLK                      (alternate 6).
- * PC8  - PIN8                      (input pullup).
- * PC9  - PIN9                      (input pullup).
- * PC10 - SCLK                      (alternate 6).
- * PC11 - PIN11                     (input pullup).
- * PC12 - SDIN                      (alternate 6).
- * PC13 - PIN13                     (input pullup).
- * PC14 - PIN14                     (input pullup).
- * PC15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOC_MODER             (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\
-                                     PIN_MODE_INPUT(GPIOC_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOC_PDM_OUT) |        \
-                                     PIN_MODE_INPUT(GPIOC_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \
-                                     PIN_MODE_ALTERNATE(GPIOC_MCLK) |       \
-                                     PIN_MODE_INPUT(GPIOC_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN9) |           \
-                                     PIN_MODE_ALTERNATE(GPIOC_SCLK) |       \
-                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \
-                                     PIN_MODE_ALTERNATE(GPIOC_SDIN) |       \
-                                     PIN_MODE_INPUT(GPIOC_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN15))
-#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_MCLK) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_SCLK) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_SDIN) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
-#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\
-                                     PIN_OSPEED_100M(GPIOC_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOC_PDM_OUT) |       \
-                                     PIN_OSPEED_100M(GPIOC_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOC_MCLK) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOC_SCLK) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOC_SDIN) |          \
-                                     PIN_OSPEED_100M(GPIOC_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOC_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOC_PIN15))
-#define VAL_GPIOC_PUPDR             (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) |      \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \
-                                     PIN_PUPDR_FLOATING(GPIOC_MCLK) |       \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN9) |         \
-                                     PIN_PUPDR_FLOATING(GPIOC_SCLK) |       \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \
-                                     PIN_PUPDR_FLOATING(GPIOC_SDIN) |       \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN15))
-#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) |  \
-                                     PIN_ODR_HIGH(GPIOC_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOC_PDM_OUT) |          \
-                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOC_MCLK) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOC_SCLK) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOC_SDIN) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN15))
-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\
-                                     PIN_AFIO_AF(GPIOC_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PDM_OUT, 0) |        \
-                                     PIN_AFIO_AF(GPIOC_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_MCLK, 6))
-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_SCLK, 6) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_SDIN, 6) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN15, 0))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                      (input pullup).
- * PD1  - PIN1                      (input pullup).
- * PD2  - PIN2                      (input pullup).
- * PD3  - PIN3                      (input pullup).
- * PD4  - RESET                     (output pushpull maximum).
- * PD5  - OVER_CURRENT              (input floating).
- * PD6  - PIN6                      (input pullup).
- * PD7  - PIN7                      (input pullup).
- * PD8  - PIN8                      (input pullup).
- * PD9  - PIN9                      (input pullup).
- * PD10 - PIN10                     (input pullup).
- * PD11 - PIN11                     (input pullup).
- * PD12 - LED4                      (output pushpull maximum).
- * PD13 - LED3                      (output pushpull maximum).
- * PD14 - LED5                      (output pushpull maximum).
- * PD15 - LED6                      (output pushpull maximum).
- */
-#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \
-                                     PIN_MODE_OUTPUT(GPIOD_RESET) |         \
-                                     PIN_MODE_INPUT(GPIOD_OVER_CURRENT) |   \
-                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \
-                                     PIN_MODE_OUTPUT(GPIOD_LED4) |          \
-                                     PIN_MODE_OUTPUT(GPIOD_LED3) |          \
-                                     PIN_MODE_OUTPUT(GPIOD_LED5) |          \
-                                     PIN_MODE_OUTPUT(GPIOD_LED6))
-#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_RESET) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_LED4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_LED3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_LED5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_LED6))
-#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_100M(GPIOD_PIN0) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN3) |          \
-                                     PIN_OSPEED_100M(GPIOD_RESET) |         \
-                                     PIN_OSPEED_100M(GPIOD_OVER_CURRENT) |  \
-                                     PIN_OSPEED_100M(GPIOD_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOD_PIN10) |         \
-                                     PIN_OSPEED_100M(GPIOD_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOD_LED4) |          \
-                                     PIN_OSPEED_100M(GPIOD_LED3) |          \
-                                     PIN_OSPEED_100M(GPIOD_LED5) |          \
-                                     PIN_OSPEED_100M(GPIOD_LED6))
-#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \
-                                     PIN_PUPDR_FLOATING(GPIOD_RESET) |      \
-                                     PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \
-                                     PIN_PUPDR_FLOATING(GPIOD_LED4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_LED3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_LED5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_LED6))
-#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOD_RESET) |            \
-                                     PIN_ODR_HIGH(GPIOD_OVER_CURRENT) |     \
-                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \
-                                     PIN_ODR_LOW(GPIOD_LED4) |              \
-                                     PIN_ODR_LOW(GPIOD_LED3) |              \
-                                     PIN_ODR_LOW(GPIOD_LED5) |              \
-                                     PIN_ODR_LOW(GPIOD_LED6))
-#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_RESET, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) |   \
-                                     PIN_AFIO_AF(GPIOD_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN7, 0))
-#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_LED4, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_LED3, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_LED5, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_LED6, 0))
-
-/*
- * GPIOE setup:
- *
- * PE0  - INT1                      (input floating).
- * PE1  - INT2                      (input floating).
- * PE2  - PIN2                      (input floating).
- * PE3  - CS_SPI                    (output pushpull maximum).
- * PE4  - PIN4                      (input floating).
- * PE5  - PIN5                      (input floating).
- * PE6  - PIN6                      (input floating).
- * PE7  - PIN7                      (input floating).
- * PE8  - PIN8                      (input floating).
- * PE9  - PIN9                      (input floating).
- * PE10 - PIN10                     (input floating).
- * PE11 - PIN11                     (input floating).
- * PE12 - PIN12                     (input floating).
- * PE13 - PIN13                     (input floating).
- * PE14 - PIN14                     (input floating).
- * PE15 - PIN15                     (input floating).
- */
-#define VAL_GPIOE_MODER             (PIN_MODE_INPUT(GPIOE_INT1) |           \
-                                     PIN_MODE_INPUT(GPIOE_INT2) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN2) |           \
-                                     PIN_MODE_OUTPUT(GPIOE_CS_SPI) |        \
-                                     PIN_MODE_INPUT(GPIOE_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOE_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOE_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOE_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOE_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOE_PIN15))
-#define VAL_GPIOE_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOE_INT1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_INT2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_CS_SPI) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
-#define VAL_GPIOE_OSPEEDR           (PIN_OSPEED_100M(GPIOE_INT1) |          \
-                                     PIN_OSPEED_100M(GPIOE_INT2) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOE_CS_SPI) |        \
-                                     PIN_OSPEED_100M(GPIOE_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOE_PIN10) |         \
-                                     PIN_OSPEED_100M(GPIOE_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOE_PIN12) |         \
-                                     PIN_OSPEED_100M(GPIOE_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOE_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOE_PIN15))
-#define VAL_GPIOE_PUPDR             (PIN_PUPDR_FLOATING(GPIOE_INT1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_INT2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_CS_SPI) |     \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN15))
-#define VAL_GPIOE_ODR               (PIN_ODR_HIGH(GPIOE_INT1) |             \
-                                     PIN_ODR_HIGH(GPIOE_INT2) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOE_CS_SPI) |           \
-                                     PIN_ODR_HIGH(GPIOE_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN15))
-#define VAL_GPIOE_AFRL              (PIN_AFIO_AF(GPIOE_INT1, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_INT2, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_CS_SPI, 0) |         \
-                                     PIN_AFIO_AF(GPIOE_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN7, 0))
-#define VAL_GPIOE_AFRH              (PIN_AFIO_AF(GPIOE_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN15, 0))
-
-/*
- * GPIOF setup:
- *
- * PF0  - PIN0                      (input floating).
- * PF1  - PIN1                      (input floating).
- * PF2  - PIN2                      (input floating).
- * PF3  - PIN3                      (input floating).
- * PF4  - PIN4                      (input floating).
- * PF5  - PIN5                      (input floating).
- * PF6  - PIN6                      (input floating).
- * PF7  - PIN7                      (input floating).
- * PF8  - PIN8                      (input floating).
- * PF9  - PIN9                      (input floating).
- * PF10 - PIN10                     (input floating).
- * PF11 - PIN11                     (input floating).
- * PF12 - PIN12                     (input floating).
- * PF13 - PIN13                     (input floating).
- * PF14 - PIN14                     (input floating).
- * PF15 - PIN15                     (input floating).
- */
-#define VAL_GPIOF_MODER             (PIN_MODE_INPUT(GPIOF_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_100M(GPIOF_PIN0) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN3) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOF_PIN10) |         \
-                                     PIN_OSPEED_100M(GPIOF_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOF_PIN12) |         \
-                                     PIN_OSPEED_100M(GPIOF_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOF_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR             (PIN_PUPDR_FLOATING(GPIOF_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN15))
-#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN7, 0))
-#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN15, 0))
-
-/*
- * GPIOG setup:
- *
- * PG0  - PIN0                      (input floating).
- * PG1  - PIN1                      (input floating).
- * PG2  - PIN2                      (input floating).
- * PG3  - PIN3                      (input floating).
- * PG4  - PIN4                      (input floating).
- * PG5  - PIN5                      (input floating).
- * PG6  - PIN6                      (input floating).
- * PG7  - PIN7                      (input floating).
- * PG8  - PIN8                      (input floating).
- * PG9  - PIN9                      (input floating).
- * PG10 - PIN10                     (input floating).
- * PG11 - PIN11                     (input floating).
- * PG12 - PIN12                     (input floating).
- * PG13 - PIN13                     (input floating).
- * PG14 - PIN14                     (input floating).
- * PG15 - PIN15                     (input floating).
- */
-#define VAL_GPIOG_MODER             (PIN_MODE_INPUT(GPIOG_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN15))
-#define VAL_GPIOG_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR           (PIN_OSPEED_100M(GPIOG_PIN0) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN3) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOG_PIN10) |         \
-                                     PIN_OSPEED_100M(GPIOG_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOG_PIN12) |         \
-                                     PIN_OSPEED_100M(GPIOG_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOG_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOG_PIN15))
-#define VAL_GPIOG_PUPDR             (PIN_PUPDR_FLOATING(GPIOG_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN15))
-#define VAL_GPIOG_ODR               (PIN_ODR_HIGH(GPIOG_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN15))
-#define VAL_GPIOG_AFRL              (PIN_AFIO_AF(GPIOG_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN7, 0))
-#define VAL_GPIOG_AFRH              (PIN_AFIO_AF(GPIOG_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN15, 0))
-
-/*
- * GPIOH setup:
- *
- * PH0  - OSC_IN                    (input floating).
- * PH1  - OSC_OUT                   (input floating).
- * PH2  - PIN2                      (input floating).
- * PH3  - PIN3                      (input floating).
- * PH4  - PIN4                      (input floating).
- * PH5  - PIN5                      (input floating).
- * PH6  - PIN6                      (input floating).
- * PH7  - PIN7                      (input floating).
- * PH8  - PIN8                      (input floating).
- * PH9  - PIN9                      (input floating).
- * PH10 - PIN10                     (input floating).
- * PH11 - PIN11                     (input floating).
- * PH12 - PIN12                     (input floating).
- * PH13 - PIN13                     (input floating).
- * PH14 - PIN14                     (input floating).
- * PH15 - PIN15                     (input floating).
- */
-#define VAL_GPIOH_MODER             (PIN_MODE_INPUT(GPIOH_OSC_IN) |         \
-                                     PIN_MODE_INPUT(GPIOH_OSC_OUT) |        \
-                                     PIN_MODE_INPUT(GPIOH_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN15))
-#define VAL_GPIOH_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
-#define VAL_GPIOH_OSPEEDR           (PIN_OSPEED_100M(GPIOH_OSC_IN) |        \
-                                     PIN_OSPEED_100M(GPIOH_OSC_OUT) |       \
-                                     PIN_OSPEED_100M(GPIOH_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN3) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOH_PIN10) |         \
-                                     PIN_OSPEED_100M(GPIOH_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOH_PIN12) |         \
-                                     PIN_OSPEED_100M(GPIOH_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOH_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOH_PIN15))
-#define VAL_GPIOH_PUPDR             (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) |     \
-                                     PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) |    \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOH_PIN15))
-#define VAL_GPIOH_ODR               (PIN_ODR_HIGH(GPIOH_OSC_IN) |           \
-                                     PIN_ODR_HIGH(GPIOH_OSC_OUT) |          \
-                                     PIN_ODR_HIGH(GPIOH_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN15))
-#define VAL_GPIOH_AFRL              (PIN_AFIO_AF(GPIOH_OSC_IN, 0) |         \
-                                     PIN_AFIO_AF(GPIOH_OSC_OUT, 0) |        \
-                                     PIN_AFIO_AF(GPIOH_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN7, 0))
-#define VAL_GPIOH_AFRH              (PIN_AFIO_AF(GPIOH_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN15, 0))
-
-/*
- * GPIOI setup:
- *
- * PI0  - PIN0                      (input floating).
- * PI1  - PIN1                      (input floating).
- * PI2  - PIN2                      (input floating).
- * PI3  - PIN3                      (input floating).
- * PI4  - PIN4                      (input floating).
- * PI5  - PIN5                      (input floating).
- * PI6  - PIN6                      (input floating).
- * PI7  - PIN7                      (input floating).
- * PI8  - PIN8                      (input floating).
- * PI9  - PIN9                      (input floating).
- * PI10 - PIN10                     (input floating).
- * PI11 - PIN11                     (input floating).
- * PI12 - PIN12                     (input floating).
- * PI13 - PIN13                     (input floating).
- * PI14 - PIN14                     (input floating).
- * PI15 - PIN15                     (input floating).
- */
-#define VAL_GPIOI_MODER             (PIN_MODE_INPUT(GPIOI_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOI_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOI_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOI_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOI_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOI_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOI_PIN15))
-#define VAL_GPIOI_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
-#define VAL_GPIOI_OSPEEDR           (PIN_OSPEED_100M(GPIOI_PIN0) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN1) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN2) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN3) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN4) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN5) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN6) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN7) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN8) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN9) |          \
-                                     PIN_OSPEED_100M(GPIOI_PIN10) |         \
-                                     PIN_OSPEED_100M(GPIOI_PIN11) |         \
-                                     PIN_OSPEED_100M(GPIOI_PIN12) |         \
-                                     PIN_OSPEED_100M(GPIOI_PIN13) |         \
-                                     PIN_OSPEED_100M(GPIOI_PIN14) |         \
-                                     PIN_OSPEED_100M(GPIOI_PIN15))
-#define VAL_GPIOI_PUPDR             (PIN_PUPDR_FLOATING(GPIOI_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOI_PIN15))
-#define VAL_GPIOI_ODR               (PIN_ODR_HIGH(GPIOI_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOI_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOI_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOI_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOI_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOI_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOI_PIN15))
-#define VAL_GPIOI_AFRL              (PIN_AFIO_AF(GPIOI_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN7, 0))
-#define VAL_GPIOI_AFRH              (PIN_AFIO_AF(GPIOI_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOI_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOI_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOI_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOI_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOI_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOI_PIN15, 0))
-
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

stm32-chibios-template/chibios-nil-f4-template/config/halconf.h

@@ -1,334 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f4-template/config/mcuconf.h

@@ -1,322 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-/*
- * STM32F4xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F4xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_CLOCK48_REQUIRED              TRUE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE                    8
-#define STM32_PLLN_VALUE                    336
-#define STM32_PLLP_VALUE                    2
-#define STM32_PLLQ_VALUE                    7
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV4
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-#define STM32_RTCPRE_VALUE                  8
-#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
-#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
-#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
-#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
-#define STM32_PLLI2SN_VALUE                 192
-#define STM32_PLLI2SR_VALUE                 5
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE                 FALSE
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
-#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
-#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC2_DMA_PRIORITY         2
-#define STM32_ADC_ADC3_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              6
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  FALSE
-#define STM32_CAN_USE_CAN2                  FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-#define STM32_CAN_CAN2_IRQ_PRIORITY         11
-
-/*
- * DAC driver system settings.
- */
-#define STM32_DAC_DUAL_MODE                 FALSE
-#define STM32_DAC_USE_DAC1_CH1              FALSE
-#define STM32_DAC_USE_DAC1_CH2              FALSE
-#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
-#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
-#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
-#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
-#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)
-#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM6                  FALSE
-#define STM32_GPT_USE_TIM7                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_USE_TIM9                  FALSE
-#define STM32_GPT_USE_TIM11                 FALSE
-#define STM32_GPT_USE_TIM12                 FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM6_IRQ_PRIORITY         7
-#define STM32_GPT_TIM7_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-#define STM32_GPT_TIM9_IRQ_PRIORITY         7
-#define STM32_GPT_TIM11_IRQ_PRIORITY        7
-#define STM32_GPT_TIM12_IRQ_PRIORITY        7
-#define STM32_GPT_TIM14_IRQ_PRIORITY        7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_USE_I2C3                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C3_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_I2C3_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_USE_TIM9                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-#define STM32_ICU_TIM9_IRQ_PRIORITY         7
-
-/*
- * MAC driver system settings.
- */
-#define STM32_MAC_TRANSMIT_BUFFERS          2
-#define STM32_MAC_RECEIVE_BUFFERS           4
-#define STM32_MAC_BUFFERS_SIZE              1522
-#define STM32_MAC_PHY_TIMEOUT               100
-#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
-#define STM32_MAC_ETH1_IRQ_PRIORITY         13
-#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_USE_TIM9                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-#define STM32_PWM_TIM9_IRQ_PRIORITY         7
-
-/*
- * SDC driver system settings.
- */
-#define STM32_SDC_SDIO_DMA_PRIORITY         3
-#define STM32_SDC_SDIO_IRQ_PRIORITY         9
-#define STM32_SDC_WRITE_TIMEOUT_MS          250
-#define STM32_SDC_READ_TIMEOUT_MS           25
-#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
-#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
-#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             FALSE
-#define STM32_SERIAL_USE_USART2             TRUE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USE_USART6             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-#define STM32_SERIAL_USART6_PRIORITY        12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  FALSE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USE_UART4                FALSE
-#define STM32_UART_USE_UART5                FALSE
-#define STM32_UART_USE_USART6               FALSE
-#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
-#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
-#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
-#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
-#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
-#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
-#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
-#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
-#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)
-#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_UART4_IRQ_PRIORITY       12
-#define STM32_UART_UART5_IRQ_PRIORITY       12
-#define STM32_UART_USART6_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_UART4_DMA_PRIORITY       0
-#define STM32_UART_UART5_DMA_PRIORITY       0
-#define STM32_UART_USART6_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_OTG1                  TRUE
-#define STM32_USB_USE_OTG2                  FALSE
-#define STM32_USB_OTG1_IRQ_PRIORITY         14
-#define STM32_USB_OTG2_IRQ_PRIORITY         14
-#define STM32_USB_OTG1_RX_FIFO_SIZE         512
-#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
-#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE     128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
-
-#endif /* _MCUCONF_H_ */

stm32-chibios-template/chibios-nil-f4-template/config/nilconf.h

@@ -1,179 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    nilconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _NILCONF_H_
-#define _NILCONF_H_
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Number of user threads in the application.
- * @note    This number is not inclusive of the idle thread which is
- *          Implicitly handled.
- */
-#define NIL_CFG_NUM_THREADS                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System timer settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define NIL_CFG_ST_RESOLUTION               32
-
-/**
- * @brief   System tick frequency.
- * @note    This value together with the @p NIL_CFG_ST_RESOLUTION
- *          option defines the maximum amount of time allowed for
- *          timeouts.
- */
-#define NIL_CFG_ST_FREQUENCY                50000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define NIL_CFG_ST_TIMEDELTA                2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define NIL_CFG_USE_EVENTS                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System assertions.
- */
-#define NIL_CFG_ENABLE_ASSERTS              FALSE
-
-/**
- * @brief   Stack check.
- */
-#define NIL_CFG_ENABLE_STACK_CHECK          FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System initialization hook.
- */
-#if !defined(NIL_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_INIT_HOOK() {                                        \
-}
-#endif
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define NIL_CFG_THREAD_EXT_FIELDS                                           \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- */
-#define NIL_CFG_THREAD_EXT_INIT_HOOK(tr) {                                  \
-  /* Add custom threads initialization code here.*/                         \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define NIL_CFG_IDLE_ENTER_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define NIL_CFG_IDLE_LEAVE_HOOK() {                                         \
-}
-
-/**
- * @brief   System halt hook.
- */
-#if !defined(NIL_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_HALT_HOOK(reason) {                                  \
-}
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in nilcore.h).   */
-/*===========================================================================*/
-
-#endif  /* _NILCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f4-template/main.c

@@ -1,34 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-
-THD_TABLE_BEGIN
-  THD_TABLE_ENTRY(waThread1, "Thread1", Thread1, NULL)
-THD_TABLE_END
-int main(void) {
-
-  halInit();
-  chSysInit();
-
-
-  while (true) {
-    if (palReadPad(GPIOA, GPIOA_BUTTON))
-    chThdSleepMilliseconds(500);
-  }
-}

stm32-chibios-template/chibios-nil-f4-template/work/test.c

@@ -1,20 +0,0 @@
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-/*
- * This is a periodic thread that does absolutely nothing except flashing
- * a LED.
- */
-THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg) {
-
-  (void)arg;
-  while (true) {
-    palSetPad(GPIOD, GPIOD_LED3);       /* Orange.  */
-    chThdSleepMilliseconds(500);
-    palClearPad(GPIOD, GPIOD_LED3);     /* Orange.  */
-    chThdSleepMilliseconds(500);
-  }
-}
-
-

stm32-chibios-template/chibios-nil-f4-template/work/test.h

@@ -1,6 +0,0 @@
-#ifndef TEST_H
-#define TEST_H
-extern THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg);
-
-#endif // TEST_H

stm32-chibios-template/chibios-rt-f0-template/.idea/chibios-rt-f0-template.iml

@@ -1,338 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<module type="CPP_MODULE" version="4">
-  <component name="NewModuleRootManager">
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/common/ports/ARMCMx/compilers/GCC/crt1.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/common/ports/ARMCMx/compilers/GCC/crt1.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/common/ports/ARMCMx/compilers/GCC/vectors.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/common/ports/ARMCMx/compilers/GCC/vectors.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/lib/streams/chprintf.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/lib/streams/chprintf.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/lib/streams/memstreams.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/lib/streams/memstreams.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/lib/streams/nullstreams.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/lib/streams/nullstreams.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/osal/rt/osal.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/osal/rt/osal.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/ADCv1/adc_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/ADCv1/adc_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/CANv1/can_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/CANv1/can_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/DACv1/dac_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/DACv1/dac_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/MACv1/mac_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/MACv1/mac_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/st_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/TIMv1/st_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/USBv1/usb_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/LLD/USBv1/usb_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/STM32F0xx/ext_lld_isr.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/STM32F0xx/ext_lld_isr.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/STM32F0xx/hal_lld.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/STM32/STM32F0xx/hal_lld.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/common/ARMCMx/nvic.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/ports/common/ARMCMx/nvic.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/adc.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/adc.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/can.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/can.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/dac.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/dac.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/ext.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/ext.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/gpt.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/gpt.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/hal.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/hal.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/hal_queues.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/hal_queues.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/i2c.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/i2c.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/i2s.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/i2s.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/icu.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/icu.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/mac.c">
-      <sourceFolder url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/mac.c" isTestSource="false" />
-    </content>
-    <content url="file://$MODULE_DIR$/../../../ChibiOS_16.1.2/os/hal/src/mmc_spi.c">
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stm32-chibios-template/chibios-rt-f0-template/.idea/workspace.xml

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stm32-chibios-template/chibios-rt-f0-template/CMakeLists.txt

@@ -1,41 +0,0 @@
-# define chip used in this project, this set must define before project definition
-# for this project dont use cmake commandline option -DSTM32_CHIP=<chip>
-set(STM32_CHIP STM32F051x8)
-
-cmake_minimum_required(VERSION 3.4)
-project(chibios-rt-f0-template)
-
-ENABLE_LANGUAGE(ASM)
-
-# test build all available ChibiOS COMPONENTS for F4 chip
-FIND_PACKAGE(ChibiOS 16 COMPONENTS rt hal adc can dac ext gpt i2c i2s icu mac mmc_spi pal pwm rtc sdc serial serial_usb spi st uart usb chprintf memstreams nullstreams evtimer shell syscalls REQUIRED)
-
-#FIND_PACKAGE(ChibiOS 16  COMPONENTS rt hal pal  REQUIRED)
-
-INCLUDE_DIRECTORIES(
-        ${CMAKE_CURRENT_SOURCE_DIR}
-        ${ChibiOS_INCLUDE_DIRS}
-        config
-        board
-        work
-)
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-
-
-
-ADD_DEFINITIONS(-DCORTEX_USE_FPU=FALSE)
-
-SET(STM32_LINKER_SCRIPT ${ChibiOS_LINKER_SCRIPT})
-
-
-set(SOURCE_FILES main.c board/board.c board/board.h config/mcuconf.h config/halconf.h config/chconf.h work/test.c work/test.h )
-
-add_executable(${CMAKE_PROJECT_NAME}.elf ${SOURCE_FILES}  ${ChibiOS_SOURCES})
-
-TARGET_LINK_LIBRARIES(${CMAKE_PROJECT_NAME}.elf)
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME}.elf)
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-

stm32-chibios-template/chibios-rt-f0-template/board/board.c

@@ -1,102 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief   MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-}

stm32-chibios-template/chibios-rt-f0-template/board/board.h

@@ -1,753 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for ST STM32F0-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F0_DISCOVERY
-#define BOARD_NAME                  "ST STM32F0-Discovery"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- * NOTE: HSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#define STM32_LSEDRV                (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                0U
-#endif
-
-#define STM32_HSE_BYPASS
-
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON                0U
-#define GPIOA_PIN1                  1U
-#define GPIOA_PIN2                  2U
-#define GPIOA_PIN3                  3U
-#define GPIOA_PIN4                  4U
-#define GPIOA_PIN5                  5U
-#define GPIOA_PIN6                  6U
-#define GPIOA_PIN7                  7U
-#define GPIOA_PIN8                  8U
-#define GPIOA_PIN9                  9U
-#define GPIOA_PIN10                 10U
-#define GPIOA_PIN11                 11U
-#define GPIOA_PIN12                 12U
-#define GPIOA_SWDAT                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_PIN15                 15U
-
-#define GPIOB_PIN0                  0U
-#define GPIOB_PIN1                  1U
-#define GPIOB_PIN2                  2U
-#define GPIOB_PIN3                  3U
-#define GPIOB_PIN4                  4U
-#define GPIOB_PIN5                  5U
-#define GPIOB_PIN6                  6U
-#define GPIOB_PIN7                  7U
-#define GPIOB_PIN8                  8U
-#define GPIOB_PIN9                  9U
-#define GPIOB_PIN10                 10U
-#define GPIOB_PIN11                 11U
-#define GPIOB_PIN12                 12U
-#define GPIOB_PIN13                 13U
-#define GPIOB_PIN14                 14U
-#define GPIOB_PIN15                 15U
-
-#define GPIOC_PIN0                  0U
-#define GPIOC_PIN1                  1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PIN3                  3U
-#define GPIOC_PIN4                  4U
-#define GPIOC_PIN5                  5U
-#define GPIOC_PIN6                  6U
-#define GPIOC_PIN7                  7U
-#define GPIOC_LED4                  8U
-#define GPIOC_LED3                  9U
-#define GPIOC_PIN10                 10U
-#define GPIOC_PIN11                 11U
-#define GPIOC_PIN12                 12U
-#define GPIOC_PIN13                 13U
-#define GPIOC_OSC32_IN              14U
-#define GPIOC_OSC32_OUT             15U
-
-#define GPIOD_PIN0                  0U
-#define GPIOD_PIN1                  1U
-#define GPIOD_PIN2                  2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_PIN4                  4U
-#define GPIOD_PIN5                  5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_PIN12                 12U
-#define GPIOD_PIN13                 13U
-#define GPIOD_PIN14                 14U
-#define GPIOD_PIN15                 15U
-
-#define GPIOF_OSC_IN                0U
-#define GPIOF_OSC_OUT               1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
-#define PIN_OSPEED_2M(n)            (0U << ((n) * 2U))
-#define PIN_OSPEED_10M(n)           (1U << ((n) * 2U))
-#define PIN_OSPEED_40M(n)           (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0  - BUTTON                    (input floating).
- * PA1  - PIN1                      (input pullup).
- * PA2  - PIN2                      (input pullup).
- * PA3  - PIN3                      (input pullup).
- * PA4  - PIN4                      (input pullup).
- * PA5  - PIN5                      (input pullup).
- * PA6  - PIN6                      (input pullup).
- * PA7  - PIN7                      (input pullup).
- * PA8  - PIN8                      (input pullup).
- * PA9  - PIN9                      (input pullup).
- * PA10 - PIN10                     (input pullup).
- * PA11 - PIN11                     (input pullup).
- * PA12 - PIN12                     (input pullup).
- * PA13 - SWDAT                     (alternate 0).
- * PA14 - SWCLK                     (alternate 0).
- * PA15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_BUTTON) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOA_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOA_PIN12) |          \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDAT) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
-                                     PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_2M(GPIOA_BUTTON) |          \
-                                     PIN_OSPEED_2M(GPIOA_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOA_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOA_PIN12) |           \
-                                     PIN_OSPEED_40M(GPIOA_SWDAT) |          \
-                                     PIN_OSPEED_40M(GPIOA_SWCLK) |          \
-                                     PIN_OSPEED_40M(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_BUTTON) |     \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_SWDAT) |        \
-                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_BUTTON) |           \
-                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWDAT) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_BUTTON, 0) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN7, 0))
-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWDAT, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWCLK, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN15, 0))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input pullup).
- * PB1  - PIN1                      (input pullup).
- * PB2  - PIN2                      (input pullup).
- * PB3  - PIN3                      (input pullup).
- * PB4  - PIN4                      (input pullup).
- * PB5  - PIN5                      (input pullup).
- * PB6  - PIN6                      (input pullup).
- * PB7  - PIN7                      (input pullup).
- * PB8  - PIN8                      (input pullup).
- * PB9  - PIN9                      (input pullup).
- * PB10 - PIN10                     (input pullup).
- * PB11 - PIN11                     (input pullup).
- * PB12 - PIN12                     (input pullup).
- * PB13 - PIN13                     (input pullup).
- * PB14 - PIN14                     (input pullup).
- * PB15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_2M(GPIOB_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN1) |            \
-                                     PIN_OSPEED_40M(GPIOB_PIN2) |           \
-                                     PIN_OSPEED_40M(GPIOB_PIN3) |           \
-                                     PIN_OSPEED_40M(GPIOB_PIN4) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN7, 0))
-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN15, 0))
-
-/*
- * GPIOC setup:
- *
- * PC0  - PIN0                      (input pullup).
- * PC1  - PIN1                      (input pullup).
- * PC2  - PIN2                      (input pullup).
- * PC3  - PIN3                      (input pullup).
- * PC4  - PIN4                      (input pullup).
- * PC5  - PIN5                      (input pullup).
- * PC6  - PIN6                      (input pullup).
- * PC7  - PIN7                      (input pullup).
- * PC8  - LED4                      (output pushpull maximum).
- * PC9  - LED3                      (output pushpull maximum).
- * PC10 - PIN10                     (input pullup).
- * PC11 - PIN11                     (input pullup).
- * PC12 - PIN12                     (input pullup).
- * PC13 - PIN13                     (input pullup).
- * PC14 - OSC32_IN                  (input floating).
- * PC15 - OSC32_OUT                 (input floating).
- */
-#define VAL_GPIOC_MODER             (PIN_MODE_INPUT(GPIOC_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN7) |           \
-                                     PIN_MODE_OUTPUT(GPIOC_LED4) |          \
-                                     PIN_MODE_OUTPUT(GPIOC_LED3) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_IN) |       \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_LED4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_LED3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_2M(GPIOC_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN7) |            \
-                                     PIN_OSPEED_40M(GPIOC_LED4) |           \
-                                     PIN_OSPEED_40M(GPIOC_LED3) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN13) |           \
-                                     PIN_OSPEED_40M(GPIOC_OSC32_IN) |       \
-                                     PIN_OSPEED_40M(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR             (PIN_PUPDR_PULLUP(GPIOC_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN7) |         \
-                                     PIN_PUPDR_FLOATING(GPIOC_LED4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_LED3) |       \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN13) |        \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) |   \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN7) |             \
-                                     PIN_ODR_LOW(GPIOC_LED4) |              \
-                                     PIN_ODR_LOW(GPIOC_LED3) |              \
-                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_IN) |         \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN7, 0))
-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_LED4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_LED3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_OSC32_IN, 0) |       \
-                                     PIN_AFIO_AF(GPIOC_OSC32_OUT, 0))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                      (input pullup).
- * PD1  - PIN1                      (input pullup).
- * PD2  - PIN2                      (input pullup).
- * PD3  - PIN3                      (input pullup).
- * PD4  - PIN4                      (input pullup).
- * PD5  - PIN5                      (input pullup).
- * PD6  - PIN6                      (input pullup).
- * PD7  - PIN7                      (input pullup).
- * PD8  - PIN8                      (input pullup).
- * PD9  - PIN9                      (input pullup).
- * PD10 - PIN10                     (input pullup).
- * PD11 - PIN11                     (input pullup).
- * PD12 - PIN12                     (input pullup).
- * PD13 - PIN13                     (input pullup).
- * PD14 - PIN14                     (input pullup).
- * PD15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_2M(GPIOD_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN7, 0))
-#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN15, 0))
-
-/*
- * GPIOF setup:
- *
- * PF0  - OSC_IN                    (input floating).
- * PF1  - OSC_OUT                   (input floating).
- * PF2  - PIN2                      (input pullup).
- * PF3  - PIN3                      (input pullup).
- * PF4  - PIN4                      (input pullup).
- * PF5  - PIN5                      (input pullup).
- * PF6  - PIN6                      (input pullup).
- * PF7  - PIN7                      (input pullup).
- * PF8  - PIN8                      (input pullup).
- * PF9  - PIN9                      (input pullup).
- * PF10 - PIN10                     (input pullup).
- * PF11 - PIN11                     (input pullup).
- * PF12 - PIN12                     (input pullup).
- * PF13 - PIN13                     (input pullup).
- * PF14 - PIN14                     (input pullup).
- * PF15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOF_MODER             (PIN_MODE_INPUT(GPIOF_OSC_IN) |         \
-                                     PIN_MODE_INPUT(GPIOF_OSC_OUT) |        \
-                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_2M(GPIOF_OSC_IN) |          \
-                                     PIN_OSPEED_2M(GPIOF_OSC_OUT) |         \
-                                     PIN_OSPEED_2M(GPIOF_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR             (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) |     \
-                                     PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) |    \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_OSC_IN) |           \
-                                     PIN_ODR_HIGH(GPIOF_OSC_OUT) |          \
-                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_OSC_IN, 0) |         \
-                                     PIN_AFIO_AF(GPIOF_OSC_OUT, 0) |        \
-                                     PIN_AFIO_AF(GPIOF_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN7, 0))
-#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN15, 0))
-
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

stm32-chibios-template/chibios-rt-f0-template/config/chconf.h

@@ -1,499 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/chconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                32
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 10000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop.
- */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       FALSE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 TRUE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 TRUE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                TRUE
-
-/**
- * @brief   I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES                   TRUE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  TRUE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     TRUE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 TRUE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS                   FALSE
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS                FALSE
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS               FALSE
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- *          activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_TRACE                 FALSE
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK           FALSE
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS                 FALSE
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING            FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- *
- * @note    It is inserted into lock zone.
- * @note    It is also invoked when the threads simply return in order to
- *          terminate.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* Context switch code here.*/                                            \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* System halt code here.*/                                               \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h).    */
-/*===========================================================================*/
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-rt-f0-template/config/halconf.h

@@ -1,334 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-rt-f0-template/config/mcuconf.h

@@ -1,162 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-/*
- * STM32F0xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 3...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F0xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_HSI14_ENABLED                 TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   FALSE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2
-#define STM32_PREDIV_VALUE                  1
-#define STM32_PLLMUL_VALUE                  12
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE                          STM32_PPRE_DIV1
-#define STM32_ADCSW                         STM32_ADCSW_HSI14
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_ADCSW                         STM32_ADCSW_HSI14
-#define STM32_CECSW                         STM32_CECSW_HSI
-#define STM32_I2C1SW                        STM32_I2C1SW_HSI
-#define STM32_USART1SW                      STM32_USART1SW_PCLK
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              2
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3
-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3
-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         2
-#define STM32_GPT_TIM2_IRQ_PRIORITY         2
-#define STM32_GPT_TIM3_IRQ_PRIORITY         2
-#define STM32_GPT_TIM14_IRQ_PRIORITY        2
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         3
-#define STM32_I2C_I2C2_IRQ_PRIORITY         3
-#define STM32_I2C_USE_DMA                   TRUE
-#define STM32_I2C_I2C1_DMA_PRIORITY         1
-#define STM32_I2C_I2C2_DMA_PRIORITY         1
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         3
-#define STM32_ICU_TIM2_IRQ_PRIORITY         3
-#define STM32_ICU_TIM3_IRQ_PRIORITY         3
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         3
-#define STM32_PWM_TIM2_IRQ_PRIORITY         3
-#define STM32_PWM_TIM3_IRQ_PRIORITY         3
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        3
-#define STM32_SERIAL_USART2_PRIORITY        3
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  FALSE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         2
-#define STM32_SPI_SPI2_IRQ_PRIORITY         2
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               2
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      3
-#define STM32_UART_USART2_IRQ_PRIORITY      3
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-#endif /* _MCUCONF_H_ */

stm32-chibios-template/chibios-rt-f0-template/main.c

@@ -1,32 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "ch.h"
-#include "hal.h"
-#include "test.h"
-
-int main(void) {
-
-  halInit();
-  chSysInit();
-
-  testInit();
-
-  while (true) {
-    if (palReadPad(GPIOA, GPIOA_BUTTON))
-    chThdSleepMilliseconds(500);
-  }
-}

stm32-chibios-template/chibios-rt-f0-template/work/test.c

@@ -1,27 +0,0 @@
-#include "ch.h"
-#include "hal.h"
-#include "test.h"
-/*
- * This is a periodic thread that does absolutely nothing except flashing
- * a LED.
- */
-static THD_WORKING_AREA(waThread1, 128);
-static THD_FUNCTION(Thread1, arg) {
-
-  (void)arg;
-  chRegSetThreadName("blinker");
-  while (true) {
-    palSetPad(GPIOC, GPIOC_LED4);
-    chThdSleepMilliseconds(500);
-    palClearPad(GPIOC, GPIOC_LED4);
-    chThdSleepMilliseconds(500);
-  }
-}
-
-void testInit(void)
-{
-    /*
-     * Creates the example thread.
-     */
-    chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
-}

stm32-chibios-template/chibios-rt-f0-template/work/test.h

@@ -1,4 +0,0 @@
-#ifndef TEST_H
-#define TEST_H
-void testInit(void);
-#endif // TEST_H

stm32-chibios-template/chibios-rt-f1-template/CMakeLists.txt

@@ -1,41 +0,0 @@
-# define chip used in this project, this set must define before project definition
-# for this project dont use cmake commandline option -DSTM32_CHIP=<chip>
-set(STM32_CHIP STM32F100x6)
-
-cmake_minimum_required(VERSION 3.4)
-project(chibios-rt-f1-template)
-
-ENABLE_LANGUAGE(ASM)
-
-# test build all available ChibiOS COMPONENTS for F4 chip
-FIND_PACKAGE(ChibiOS 16 COMPONENTS rt hal adc dac can dac ext gpt i2c i2s icu mmc_spi pal pwm rtc sdc serial serial_usb spi st uart usb chprintf memstreams nullstreams evtimer shell syscalls REQUIRED)
-
-#FIND_PACKAGE(ChibiOS 16 COMPONENTS rt hal pal  REQUIRED)
-
-INCLUDE_DIRECTORIES(
-        ${CMAKE_CURRENT_SOURCE_DIR}
-        ${ChibiOS_INCLUDE_DIRS}
-        config
-        board
-        work
-)
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-
-
-
-ADD_DEFINITIONS(-DCORTEX_USE_FPU=FALSE)
-
-SET(STM32_LINKER_SCRIPT ${ChibiOS_LINKER_SCRIPT})
-
-
-set(SOURCE_FILES main.c board/board.c board/board.h config/mcuconf.h config/halconf.h config/chconf.h work/test.c work/test.h )
-
-add_executable(${CMAKE_PROJECT_NAME}.elf ${SOURCE_FILES}  ${ChibiOS_SOURCES})
-
-TARGET_LINK_LIBRARIES(${CMAKE_PROJECT_NAME}.elf)
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME}.elf)
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-

stm32-chibios-template/chibios-rt-f1-template/board/board.c

@@ -1,49 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-const PALConfig pal_default_config =
-{
-  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
-  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
-  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
-  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
-  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
-};
-#endif
-
-/*
- * Early initialization code.
- * This initialization must be performed just after stack setup and before
- * any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-/*
- * Board-specific initialization code.
- */
-void boardInit(void) {
-}

stm32-chibios-template/chibios-rt-f1-template/board/board.h

@@ -1,143 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for STMicroelectronics STM32VL-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32VL_DISCOVERY
-#define BOARD_NAME              "ST STM32VL-Discovery"
-
-/*
- * Board frequencies.
- */
-#define STM32_LSECLK            32768
-#define STM32_HSECLK            8000000
-
-/*
- * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
- */
-#define STM32F10X_MD_VL
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON            0
-#define GPIOA_SPI1NSS           4
-
-#define GPIOB_SPI2NSS           12
-
-#define GPIOC_LED4              8
-#define GPIOC_LED3              9
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- *
- * The digits have the following meaning:
- *   0 - Analog input.
- *   1 - Push Pull output 10MHz.
- *   2 - Push Pull output 2MHz.
- *   3 - Push Pull output 50MHz.
- *   4 - Digital input.
- *   5 - Open Drain output 10MHz.
- *   6 - Open Drain output 2MHz.
- *   7 - Open Drain output 50MHz.
- *   8 - Digital input with PullUp or PullDown resistor depending on ODR.
- *   9 - Alternate Push Pull output 10MHz.
- *   A - Alternate Push Pull output 2MHz.
- *   B - Alternate Push Pull output 50MHz.
- *   C - Reserved.
- *   D - Alternate Open Drain output 10MHz.
- *   E - Alternate Open Drain output 2MHz.
- *   F - Alternate Open Drain output 50MHz.
- * Please refer to the STM32 Reference Manual for details.
- */
-
-/*
- * Port A setup.
- * Everything input with pull-up except:
- * PA0  - Normal input      (BUTTON).
- * PA2  - Alternate output  (USART2 TX).
- * PA3  - Normal input      (USART2 RX).
- * PA4  - Push pull output  (SPI1 NSS), initially high state.
- * PA5  - Alternate output  (SPI1 SCK).
- * PA6  - Normal input      (SPI1 MISO).
- * PA7  - Alternate output  (SPI1 MOSI).
- * PA9  - Alternate output  (USART1 TX).
- * PA10 - Normal input      (USART1 RX).
- */
-#define VAL_GPIOACRL            0xB4B34B84      /*  PA7...PA0 */
-#define VAL_GPIOACRH            0x888884B8      /* PA15...PA8 */
-#define VAL_GPIOAODR            0xFFFFFFFF
-
-/*
- * Port B setup.
- * Everything input with pull-up except:
- * PB12 - Push pull output  (SPI2 NSS), initially high state.
- * PB13 - Alternate output  (SPI2 SCK).
- * PB14 - Normal input      (SPI2 MISO).
- * PB15 - Alternate output  (SPI2 MOSI).
- */
-#define VAL_GPIOBCRL            0x88888888      /*  PB7...PB0 */
-#define VAL_GPIOBCRH            0xB4B38888      /* PB15...PB8 */
-#define VAL_GPIOBODR            0xFFFFFFFF
-
-/*
- * Port C setup.
- * Everything input with pull-up except:
- * PC8  - Push-pull output (LED4), initially low state.
- * PC9  - Push-pull output (LED3), initially low state.
- */
-#define VAL_GPIOCCRL            0x88888888      /*  PC7...PC0 */
-#define VAL_GPIOCCRH            0x88888833      /* PC15...PC8 */
-#define VAL_GPIOCODR            0xFFFFFCFF
-
-/*
- * Port D setup.
- * Everything input with pull-up except:
- * PD0  - Normal input (XTAL).
- * PD1  - Normal input (XTAL).
- */
-#define VAL_GPIODCRL            0x88888844      /*  PD7...PD0 */
-#define VAL_GPIODCRH            0x88888888      /* PD15...PD8 */
-#define VAL_GPIODODR            0xFFFFFFFF
-
-/*
- * Port E setup.
- * Everything input with pull-up except:
- */
-#define VAL_GPIOECRL            0x88888888      /*  PE7...PE0 */
-#define VAL_GPIOECRH            0x88888888      /* PE15...PE8 */
-#define VAL_GPIOEODR            0xFFFFFFFF
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

stm32-chibios-template/chibios-rt-f1-template/config/chconf.h

@@ -1,499 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/chconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                16
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 1000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop.
- */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       TRUE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 TRUE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 TRUE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                TRUE
-
-/**
- * @brief   I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES                   TRUE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  TRUE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     TRUE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 TRUE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS                   FALSE
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS                FALSE
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS               FALSE
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- *          activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_TRACE                 FALSE
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK           FALSE
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS                 FALSE
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING            FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- *
- * @note    It is inserted into lock zone.
- * @note    It is also invoked when the threads simply return in order to
- *          terminate.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* Context switch code here.*/                                            \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* System halt code here.*/                                               \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h).    */
-/*===========================================================================*/
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-rt-f1-template/config/halconf.h

@@ -1,334 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-rt-f1-template/config/mcuconf.h

@@ -1,186 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-#define STM32F100_MCUCONF
-
-/*
- * STM32F103 drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   FALSE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
-#define STM32_PLLMUL_VALUE                  3
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV1
-#define STM32_PPRE2                         STM32_PPRE2_DIV1
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV2
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  TRUE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         6
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  TRUE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-
-/*
- * RTC driver system settings.
- */
-#define STM32_RTC_IRQ_PRIORITY              15
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-#endif /* _MCUCONF_H_ */