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@@ -157,3 +157,188 @@ bool furi_hal_i2c_trx(
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return false;
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}
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}
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+
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+bool furi_hal_i2c_is_device_ready(FuriHalI2cBusHandle* handle, uint8_t i2c_addr, uint32_t timeout) {
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+ furi_check(handle);
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+
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+ furi_check(handle->bus->current_handle == handle);
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+ furi_assert(timeout > 0);
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+
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+ bool ret = true;
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+ uint32_t timeout_tick = HAL_GetTick() + timeout;
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+
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+ do {
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+ while(LL_I2C_IsActiveFlag_BUSY(handle->bus->i2c)) {
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+ if(HAL_GetTick() >= timeout_tick) {
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+ return false;
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+ }
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+ }
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+
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+ handle->bus->i2c->CR2 =
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+ ((((uint32_t)(i2c_addr) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) &
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+ (~I2C_CR2_RD_WRN));
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+
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+ while((!LL_I2C_IsActiveFlag_NACK(handle->bus->i2c)) &&
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+ (!LL_I2C_IsActiveFlag_STOP(handle->bus->i2c))) {
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+ if(HAL_GetTick() >= timeout_tick) {
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+ return false;
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+ }
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+ }
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+
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+ if(LL_I2C_IsActiveFlag_NACK(handle->bus->i2c)) {
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+ while(!LL_I2C_IsActiveFlag_STOP(handle->bus->i2c)) {
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+ if(HAL_GetTick() >= timeout_tick) {
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+ return false;
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+ }
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+ }
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+
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+ LL_I2C_ClearFlag_NACK(handle->bus->i2c);
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+
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+ // Clear STOP Flag generated by autoend
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+ LL_I2C_ClearFlag_STOP(handle->bus->i2c);
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+
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+ // Generate actual STOP
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+ LL_I2C_GenerateStopCondition(handle->bus->i2c);
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+
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+ ret = false;
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+ }
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+
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+ while(!LL_I2C_IsActiveFlag_STOP(handle->bus->i2c)) {
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+ if(HAL_GetTick() >= timeout_tick) {
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+ return false;
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+ }
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+ }
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+
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+ LL_I2C_ClearFlag_STOP(handle->bus->i2c);
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+ } while(0);
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+
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+ return ret;
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+}
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+
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+bool furi_hal_i2c_read_reg_8(
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+ FuriHalI2cBusHandle* handle,
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+ uint8_t i2c_addr,
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+ uint8_t reg_addr,
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+ uint8_t* data,
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+ uint32_t timeout) {
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+ furi_check(handle);
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+
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+ return furi_hal_i2c_trx(handle, i2c_addr, ®_addr, 1, data, 1, timeout);
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+}
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+
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+bool furi_hal_i2c_read_reg_16(
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+ FuriHalI2cBusHandle* handle,
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+ uint8_t i2c_addr,
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+ uint8_t reg_addr,
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+ uint16_t* data,
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+ uint32_t timeout) {
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+ furi_check(handle);
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+
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+ uint8_t reg_data[2];
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+ bool ret = furi_hal_i2c_trx(handle, i2c_addr, ®_addr, 1, reg_data, 2, timeout);
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+ *data = (reg_data[0] << 8) | (reg_data[1]);
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+
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+ return ret;
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+}
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+
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+bool furi_hal_i2c_read_mem(
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+ FuriHalI2cBusHandle* handle,
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+ uint8_t i2c_addr,
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+ uint8_t mem_addr,
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+ uint8_t* data,
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+ uint8_t len,
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+ uint32_t timeout) {
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+ furi_check(handle);
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+
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+ return furi_hal_i2c_trx(handle, i2c_addr, &mem_addr, 1, data, len, timeout);
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+}
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+
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+bool furi_hal_i2c_write_reg_8(
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+ FuriHalI2cBusHandle* handle,
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+ uint8_t i2c_addr,
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+ uint8_t reg_addr,
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+ uint8_t data,
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+ uint32_t timeout) {
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+ furi_check(handle);
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+
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+ uint8_t tx_data[2];
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+ tx_data[0] = reg_addr;
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+ tx_data[1] = data;
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+
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+ return furi_hal_i2c_tx(handle, i2c_addr, (const uint8_t*)&tx_data, 2, timeout);
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+}
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+
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+bool furi_hal_i2c_write_reg_16(
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+ FuriHalI2cBusHandle* handle,
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+ uint8_t i2c_addr,
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+ uint8_t reg_addr,
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+ uint16_t data,
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+ uint32_t timeout) {
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+ furi_check(handle);
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+
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+ uint8_t tx_data[3];
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+ tx_data[0] = reg_addr;
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+ tx_data[1] = (data >> 8) & 0xFF;
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+ tx_data[2] = data & 0xFF;
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+
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+ return furi_hal_i2c_tx(handle, i2c_addr, (const uint8_t*)&tx_data, 3, timeout);
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+}
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+
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+bool furi_hal_i2c_write_mem(
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+ FuriHalI2cBusHandle* handle,
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+ uint8_t i2c_addr,
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+ uint8_t mem_addr,
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+ uint8_t* data,
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+ uint8_t len,
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+ uint32_t timeout) {
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+ furi_check(handle);
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+
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+ furi_check(handle->bus->current_handle == handle);
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+ furi_assert(timeout > 0);
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+
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+ bool ret = true;
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+ uint8_t size = len + 1;
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+ uint32_t timeout_tick = HAL_GetTick() + timeout;
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+
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+ do {
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+ while(LL_I2C_IsActiveFlag_BUSY(handle->bus->i2c)) {
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+ if(HAL_GetTick() >= timeout_tick) {
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+ ret = false;
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+ break;
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+ }
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+ }
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+
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+ if(!ret) {
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+ break;
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+ }
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+
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+ LL_I2C_HandleTransfer(
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+ handle->bus->i2c,
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+ i2c_addr,
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+ LL_I2C_ADDRSLAVE_7BIT,
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+ size,
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+ LL_I2C_MODE_AUTOEND,
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+ LL_I2C_GENERATE_START_WRITE);
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+
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+ while(!LL_I2C_IsActiveFlag_STOP(handle->bus->i2c) || size > 0) {
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+ if(LL_I2C_IsActiveFlag_TXIS(handle->bus->i2c)) {
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+ if(size == len + 1) {
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+ LL_I2C_TransmitData8(handle->bus->i2c, mem_addr);
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+ } else {
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+ LL_I2C_TransmitData8(handle->bus->i2c, (*data));
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+ data++;
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+ }
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+ size--;
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+ }
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+
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+ if(HAL_GetTick() >= timeout_tick) {
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+ ret = false;
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+ break;
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+ }
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+ }
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+
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+ LL_I2C_ClearFlag_STOP(handle->bus->i2c);
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+ } while(0);
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+
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+ return ret;
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+}
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