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@@ -31,6 +31,8 @@
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#define BOOT_USB_DP_PIN LL_GPIO_PIN_12
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#define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
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+#define RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
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+
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void target_led_control(char* c) {
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LL_GPIO_SetOutputPin(LED_RED_PORT, LED_RED_PIN);
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LL_GPIO_SetOutputPin(LED_GREEN_PORT, LED_GREEN_PIN);
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@@ -98,17 +100,19 @@ void gpio_init() {
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void rtc_init() {
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// LSE and RTC
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LL_PWR_EnableBkUpAccess();
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- if(!LL_RCC_LSE_IsReady()) {
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+ if(!RTC_CLOCK_IS_READY()) {
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+ // Start LSI1 needed for CSS
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+ LL_RCC_LSI1_Enable();
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// Try to start LSE normal way
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LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW);
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LL_RCC_LSE_Enable();
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uint32_t c = 0;
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- while(!LL_RCC_LSE_IsReady() && c < 200) {
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+ while(!RTC_CLOCK_IS_READY() && c < 200) {
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LL_mDelay(10);
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c++;
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}
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// Plan B: reset backup domain
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- if(!LL_RCC_LSE_IsReady()) {
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+ if(!RTC_CLOCK_IS_READY()) {
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target_led_control("-R.R.R.");
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LL_RCC_ForceBackupDomainReset();
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LL_RCC_ReleaseBackupDomainReset();
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@@ -116,6 +120,8 @@ void rtc_init() {
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}
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// Set RTC domain clock to LSE
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LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
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+ // Enable LSE CSS
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+ LL_RCC_LSE_EnableCSS();
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}
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// Enable clocking
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LL_RCC_EnableRTC();
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