Merge pull request #117 from ObKo/modern-cmake

Modern CMake paradigm support.

All features are designed as cmake IMPORTED targets.
Support for F0 F1 F2 F3 F4 F7 G0 G4 H7 L0 L1 L4.
Ability to fetch STM32Cube or CMSIS+HAL from ST github.
Some stuff is missing.

README.md

@@ -1,114 +1,153 @@
 # About
 
-This project is used to develop applications for the STM32 - ST's ARM Cortex-Mx MCUs. It uses cmake and GCC, along with newlib (libc), STM32CubeMX or ChibiOS.
+This project is used to develop applications for the STM32 - ST's ARM Cortex-Mx MCUs. 
+It uses cmake and GCC, along with newlib (libc), STM32Cube. Supports F0 F1 F2 F3 F4 F7 G0 G4 H7 L0 L1 L4 device families.
 
 ## Requirements
 
-* cmake >= 3.0
+* cmake >= 3.13
 * GCC toolchain with newlib (optional).
-
-* STM32CubeMX package for STM32F0, STM32F1, STM32F2, STM32F3, STM32F4, STM32F7, STM32G0, STM32H7, STM32L0, STM32L1, STM32L4 families.
+* STM32Cube package for appropriate STM32 family.
 
 ## Project contains
 
-* CMake common toolchain file, that configures cmake to use the arm toolchain.
-* CMake toolchain file that can generate a tunable linker script
-* CMake STM32 family-specific toolchain file, that configures family-specific parameters.
-* CMake modules to find and configure CMSIS and STM32HAL components.
-* CMake modules to find and configure ChibiOS components.
-* CMake project template.
+* CMake toolchain file, that configures cmake to use the arm toolchain: [cmake/stm32_gcc.cmake](cmake/stm32_gcc.cmake).
+* CMake module that contains useful functions: [cmake/stm32/common.cmake](cmake/stm32/common.cmake)
+* CMake modules that contains information about each family - RAM/flash sizes, CPU types, device types and device naming (e.g. it can tell that STM32F407VG is F4 family with 1MB flash, 128KB RAM with CMSIS type F407xx)
+* CMake toolchain file that can generate a tunable linker script [cmake/stm32/linker_ld.cmake](cmake/stm32/linker_ld.cmake)
+* CMake module to find and configure CMSIS library [cmake/FindCMSIS.cmake](cmake/FindCMSIS.cmake)
+* CMake module to find and configure STM32 HAL library [cmake/FindHAL.cmake](cmake/FindHAL.cmake)
+* CMake modules for various libraries/RTOSes
+* CMake project template and [examples](examples)
+* Some testing project to check cmake scripts working properly [tests](tests)
 
 ## Examples
 
-* `stm32-blinky` - blink LED using timers and PWM.
-* `stm32-newlib` - show date using uart and libc functions from newlib.
-* `stm32-chibios` - blink led using ChibiOS/NIL.
-* `stm32-hal-freertos-uart-tensorflow` - HAL OS (FreeRTOS) example using UART 
-    and TensorFlow Lite Micro to perform sine wave interpolation with
-    `flash` (`st-flash`) and `debug` (`openocd` +  `gdb`) targets.
-
-    Requires `OPENOCD_BOARD` to be set to specify the openocd config required.
-    These are usually found in `/usr/share/openocd/scripts/`. For example a
-    STM32F41G_EVAL board using an ST-link would use `OPENOCD_BOARD=board/stm3241g_eval_stlink.cfg`.
-    If none is given CMake will search the project root for `.cfg` files.
-
-    Can be found in a maintained form [here](https://github.com/alxhoff/STM3240G-EVAL-TensorFlow-Hello-World).
+* `template` ([examples/template](examples/template)) - project template, empty source linked compiled with CMSIS.
+* `custom-linker-script` ([examples/custom-linker-script](examples/custom-linker-script)) - similiar to `template` but using custom linker script.
+* `fetch-cube` ([examples/fetch-cube](examples/fetch-cube)) - example of using FetchContent for fetching STM32Cube from ST's git.
+* `fetch-cmsis-hal` ([examples/fetch-cmsis-hal](examples/fetch-cmsis-hal)) - example of using FetchContent for fetching STM32 CMSIS and HAL from ST's git.
+* `blinky` ([examples/blinky](examples/blinky)) - blink led using STM32 HAL library and SysTick.
+* `freertos` ([examples/freertos](examples/freertos)) - blink led using STM32 HAL library and FreeRTOS.
 
 # Usage
 
-First of all you need to configure toolchain and libraries, you can do this by editing `gcc_stm32.cmake` or, preferably, by passing it through the command line.
+First of all you need to configure toolchain and library pathes using CMake varibles. 
+You can do this by passing values through command line during cmake run or by setting variables inside your CMakeLists.txt
 
 ## Configuration
 
 * `TOOLCHAIN_PREFIX` - where toolchain is located, **default**: `/usr`
 * `TARGET_TRIPLET` - toolchain target triplet, **default**: `arm-none-eabi`
-* `STM32_CHIP` - STM32 device code, e.g. `STM32F407VG` or `STM32F103VG`
-* `STM32_FAMILY` - STM32 family (F0, F1, F4, etc.) currently, F0, F1, F2, F4, F7, G0, H7, L0, L1 and L4 families are supported. **Note:** If `STM32_CHIP` variable is set, `STM32_FAMILY` is optional.
-* `STM32Cube_DIR` - path to STM32CubeMX directory **default**: `/opt/STM32Cube_FW_F0_V1.4.0 /opt/STM32Cube_FW_F1_V1.1.0 /opt/STM32Cube_FW_F2_V1.1.0 /opt/STM32Cube_FW_F4_V1.6.0`
-
-To use the toolchain, you'll need to copy contents of the `cmake` folder into cmake's modules path, or use the `CMAKE_MODULE_PATH` variable.
+* `STM32_CUBE_<FAMILY>_PATH` - path to STM32Cube directory, where `<FAMILY>` is one of `F0 G0 L0 F1 L1 F2 F3 F4 G4 L4 F7 H7` **default**: `/opt/STM32Cube<FAMILY>`
 
 ## Common usage
 
-    cmake -DSTM32_CHIP=<chip> -DCMAKE_TOOLCHAIN_FILE=<path_to_gcc_stm32.cmake> -DCMAKE_BUILD_TYPE=Debug <path_to_source_dir>
+First thing that you need to do after toolchain configration in your `CMakeLists.txt` script is to find CMSIS package:
+```
+find_package(CMSIS COMPONENTS STM32F4 REQUIRED)
+```
+You can specify STM32 family or even specific device (`STM32F407VG`) in `COMPONENTS` or omit `COMPONENTS` totally - in that case stm32-cmake will find ALL sources for ALL families and ALL chips (you'll need ALL STM32Cube packages somewhere).
 
-Where `<chip>` is the STM32 chip name (e.g. `STM32F100C8`, `STM32F407IG`).
+Each STM32 device can be categorized into family and device type groups, for example STM32F407VG is device from `F4` family, with type `F407xx`
 
-This command will generate Makefile for project. For a `Release` build, change `CMAKE_BUILD_TYPE`.
+CMSIS consists of three main components:
 
-The script will try to detect chip parameters automatically from the chip name (type, flash/ram size), or, you can set these directly with these variables:
+* Family-specific headers, e.g. `stm32f4xx.h`
+* Device type-specific startup sources (e.g. `startup_stm32f407xx.s`)
+* Device-specific linker scripts which requires information about memory sizes
 
-* `STM32_CHIP_TYPE` - family-dependent chip type. Global variable `STM32_CHIP_TYPES` contains list of valid types for current family (e.g `207xG`)
-* `STM32_FLASH_SIZE` - chip flash size (e.g. 64K)
-* `STM32_RAM_SIZE` - chip RAM size (e.g. 4K)
+stm32-cmake uses modern CMake features notably imported targets and target properties.
+Every CMSIS component is CMake's target (aka library), which defines compiler definitions, compiler flags, include dirs, sources, etc. to build and propagates them as dependencies. So in simple use-case all you need is to link your executable with library `CMSIS::STM32::<device>`:
+```
+add_executable(stm32-template main.c)
+target_link_libraries(stm32-template CMSIS::STM32::F407VG)
+```
+That will add include directories, startup source, linker script and compiler flags to your executable.
 
-### Usage with Eclipse CDT:
+CMSIS creates following targets:
 
-    cmake -DSTM32_CHIP=<chip> -DCMAKE_TOOLCHAIN_FILE=<path_to_gcc_stm32.cmake> -DCMAKE_BUILD_TYPE=Debug -G "Eclipse CDT4 - Unix Makefiles" <path_to_source_dir>
+* `CMSIS::STM32::<FAMILY>` (e.g. `CMSIS::STM32::F4`) - common includes, compiler flags and defines for family
+* `CMSIS::STM32::<TYPE>` (e.g. `CMSIS::STM32::F407xx`) - common startup source for device type, depends on `CMSIS::STM32::<FAMILY>`
+* `CMSIS::STM32::<DEVICE>` (e.g. `CMSIS::STM32::F407VG`) - linker script for device, depends on `CMSIS::STM32::<TYPE>`
 
-## Building
+So, if you don't need linker script, you can link only `CMSIS::STM32::<TYPE>` library and provide own script using `stm32_add_linker_script` function
 
-* To build elf file: `make`
-* To build .hex: `make <project name>.hex`
-* To build .bin: `make <project name>.bin`
+***Note**: Some devices in STM32H7 family has two different cores (Cortex-M7 and Cortex-M4). 
+To specify core to build, all targets for H7 family also have suffix (::M7 or ::M4).
+For example, targets for STM32H747BI will look like `CMSIS::STM32::H7::M7`, `CMSIS::STM32::H7::M4`, `CMSIS::STM32::H747BI::M7`, `CMSIS::STM32::H747BI::M4`, etc.*
 
-## Linker script & variables
+Also, there is special library `STM32::NoSys` which adds `--specs=nosys.specs` to compiler flags.
+
+## HAL
+
+STM32 HAL can be used similiar to CMSIS.
+```
+find_package(HAL COMPONENTS STM32F4 REQUIRED)
+set(CMAKE_INCLUDE_CURRENT_DIR TRUE)
+```
+*`CMAKE_INCLUDE_CURRENT_DIR` here because HAL requires `stm32<family>xx_hal_conf.h` file being in include headers path.*
 
-You can use cmake variables below to tune the generated linker. To specify a custom linker script, set `STM32_LINKER_SCRIPT` (you can still use these variables in your custom script).
+HAL module will search all drivers supported by family and create following targets:
 
-* `STM32_FLASH_ORIGIN` - Start address of flash (**default**: 0x08000000)
-* `STM32_RAM_ORIGIN` - Start address of RAM (**default**: 0x20000000)
-* `STM32_FLASH_SIZE` - Flash size (**default**: from chip name)
-* `STM32_RAM_SIZE` - RAM size (**default**: from chip name)
-* `STM32_MIN_STACK_SIZE` - Minimum stack size for error detection at link-time (**default**: 512 bytes)
-* `STM32_MIN_HEAP_SIZE` - Minimum heap size for error detection at link-time (**default**: 0 bytes)
-* `STM32_CCRAM_ORIGIN` - Start address of Core-Coupled RAM (**default**: 0x10000000)
-* `STM32_CCRAM_SIZE` - Core-Coupled RAM size (**default**: 64 KiB)
+* `HAL::STM32::<FAMILY>` (e.g. `HAL::STM32::F4`) - common HAL source, depends on `CMSIS::STM32::<FAMILY>`
+* `HAL::STM32::<FAMILY>::<DRIVER>` (e.g. `HAL::STM32::F4::GPIO`) - HAL driver <DRIVER>, depends on `HAL::STM32::<FAMILY>`
+* `HAL::STM32::<FAMILY>::<DRIVER>Ex` (e.g. `HAL::STM32::F4::ADCEx`) - HAL Extension driver , depends on `HAL::STM32::<FAMILY>::<DRIVER>`
+* `HAL::STM32::<FAMILY>::LL_<DRIVER>` (e.g. `HAL::STM32::F4::LL_ADC`) - HAL LL (Low-Level) driver , depends on `HAL::STM32::<FAMILY>`
 
-## Useful cmake macros
+***Note**: Targets for STM32H7 will look like `HAL::STM32::<FAMILY>::[M7|M4]`, `HAL::STM32::<FAMILY>::[M7|M4]::<DRIVER>`, etc.*
 
-* `STM32_GET_CHIP_TYPE(CHIP CHIP_TYPE)` - gets chip type from chip name.
-* `STM32_GET_CHIP_PARAMETERS(CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)` - gets chip ram/flash size from chip name.
-* `STM32_SET_FLASH_PARAMS(TARGET ...)` - sets chip flash/ram parameters for target.
-* `STM32_SET_CHIP_DEFINITIONS(TARGET CHIP_TYPE)` - sets chip family and type-specific compiler flags for target.
-* `STM32_SET_TARGET_PROPERTIES(TARGET)` - sets all needed parameters and compiler flags for target.
-* `STM32_GENERATE_LIBRARIES(NAME SOURCES LIBRARIES)` - generates libraries for all chip types in family. Resulting libraries stored in LIBRARIES and have names in ${NAME}_${FAMILY}_${CHIP_TYPE} format.
+Here is typical usage:
 
-# ChibiOS Support
+```
+add_executable(stm32-blinky-f4 blinky.c stm32f4xx_hal_conf.h)
+target_link_libraries(stm32-blinky-f4 
+    HAL::STM32::F4::RCC
+    HAL::STM32::F4::GPIO
+    HAL::STM32::F4::CORTEX
+    CMSIS::STM32::F407VG
+    STM32::NoSys 
+)
+```
 
-This project also supports ChibiOS v3.x.x and ChibiOS v16.x.x (both nil and rt kernels).
+### Building
+
+```
+    $ cmake -DCMAKE_TOOLCHAIN_FILE=<path_to_gcc_stm32.cmake> -DCMAKE_BUILD_TYPE=Debug <path_to_sources>
+    $ make
+```
+
+## Linker script & variables
 
-CMake modules for ChibiOS can find specified ChibiOS components using the COMPONENTS directive.
+CMSIS package will generate linker script for your device automatically (target `CMSIS::STM32::<DEVICE>`). To specify a custom linker script, use `stm32_add_linker_script` function.
 
-See project `stm32-chibios` for example usage.
+## Useful cmake function
 
-# FreeRTOS Support
+* `stm32_get_chip_info(<chip> [FAMILY <family>] [TYPE <type>] [DEVICE <device>])` - classify device using name, will return device family (into `<family>` variable), type (`<type>`) and canonical name (`<device>`, uppercase without any package codes)
+* `stm32_get_memory_info((CHIP <chip>)|(DEVICE <device> TYPE <type>) [FLASH|RAM|CCRAM|STACK|HEAP] [SIZE <size>] [ORIGIN <origin>])` - get information about device memories (into `<size>` and `<origin>`). Linker script generator uses values from this function
+* `stm32_get_devices_by_family(DEVICES [FAMILY <family>])` - return into `DEVICES` all supported devices by family (or all devices if `<family>` is empty)
 
-FreeRTOS is also supported. To include it in your project you should set a variable named `FREERTOS_HEAP_IMPL` with 
-a proper number of FreeRTOS heap implementation. You can do this by invoking:
+# Additional CMake modules
+
+stm32-cmake contains additional CMake modules for finding and configuring various libraries and RTOSes used in embedded world.
+
+## FreeRTOS
+
+[cmake/FindFreeRTOS](cmake/FindFreeRTOS) - finds FreeRTOS sources in location specified by `FREERTOS_PATH` (*default*: `/opt/FreeRTOS`) variable and format them as `IMPORTED` targets. 
+Typical usage:
 
 ```
-SET(FREERTOS_HEAP_IMPL 4)
+find_package(FreeRTOS COMPONENTS ARM_CM4F REQUIRED)
+target_link_libraries(... FreeRTOS::ARM_CM4F)
 ```
 
-before `FIND_PACKAGE` command.
+Following FreeRTOS ports supported: `ARM_CM0`, `ARM_CM3`, `ARM_CM4F`, `ARM_CM7`.
+
+Other FreeRTOS libraries:
+
+* `FreeRTOS::Coroutine` - co-routines (`croutines.c`)
+* `FreeRTOS::EventGroups` - event groups (`event_groups.c`)
+* `FreeRTOS::StreamBuffer` - stream buffer (`stream_buffer.c`)
+* `FreeRTOS::Timers` - timers (`timers.c`)
+* `FreeRTOS::Heap::<N>` - heap implementation (`heap_<N>.c`), `<N>`: [1-5]
+

cmake/ChibiOS/18.2/ChibiOS.cmake

@@ -1,106 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS)
-    SET(ChibiOS_FIND_COMPONENTS nil hal)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-SET (CHIBIOS_COMPONENTS nil rt hal)
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-LIST(FIND ChibiOS_FIND_COMPONENTS hal ChibiOS_FIND_COMPONENTS_hal)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_hal} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS hal)
-ENDIF()
-
-IF(NOT CHIBIOS_HALCONF_FILE)
-    MESSAGE(STATUS "No ChibiOS halconf.h specified, trying to find it...")
-    FILE(GLOB CHIBIOS_HALCONF_FILE "halconf.h")
-    IF (CHIBIOS_HALCONF_FILE STREQUAL "")
-        MESSAGE(FATAL_ERROR "Cannot find halconf.h, please specify it using CHIBIOS_HALCONF_FILE variable")
-    ELSE()
-        MESSAGE(STATUS "Found halconf.h: ${CHIBIOS_HALCONF_FILE}")
-    ENDIF()
-ENDIF()
-    
-IF(NOT CHIBIOS_CHCONF_FILE)
-    MESSAGE(STATUS "No ChibiOS chconf.h specified, trying to find it...")
-    FILE(GLOB CHIBIOS_CHCONF_FILE "chconf.h")
-    IF (CHIBIOS_CHCONF_FILE STREQUAL "")
-        MESSAGE(FATAL_ERROR "Cannot find chconf.h, please specify it using CHIBIOS_CHCONF_FILE variable")
-    ELSE()
-        MESSAGE(STATUS "Found chconf.h: ${CHIBIOS_CHCONF_FILE}")
-    ENDIF()
-ENDIF()
-
-FILE(STRINGS ${CHIBIOS_CHCONF_FILE} CHCONF_LINES REGEX "#define CH_CFG_USE_([a-zA-Z_0-9]+) +TRUE")
-FOREACH(LINE ${CHCONF_LINES})
-    STRING(REGEX REPLACE "#define CH_CFG_USE_([a-zA-Z_0-9]+) +TRUE" "\\1" COMP ${LINE})
-    LIST(APPEND CHIBIOS_RTOS_COMPONENTS ${COMP})
-ENDFOREACH()
-
-MESSAGE(STATUS "Detected ChibiOS RTOS components:")
-FOREACH(COMP ${CHIBIOS_RTOS_COMPONENTS})
-    MESSAGE(STATUS "\t${COMP}")
-ENDFOREACH()
-
-FILE(STRINGS ${CHIBIOS_HALCONF_FILE} HALCONF_LINES REGEX "#define HAL_USE_([a-zA-Z_0-9]+) +TRUE")
-FOREACH(LINE ${HALCONF_LINES})
-    STRING(REGEX REPLACE "#define HAL_USE_([a-zA-Z_0-9]+) +TRUE" "\\1" COMP ${LINE})
-    LIST(APPEND CHIBIOS_HAL_COMPONENTS ${COMP})
-ENDFOREACH()
-
-MESSAGE(STATUS "Detected ChibiOS HAL components:")
-FOREACH(COMP ${CHIBIOS_HAL_COMPONENTS})
-    MESSAGE(STATUS "\t${COMP}")
-ENDFOREACH()
-
-INCLUDE(ChibiOS/18.2/ChibiOS_LD)
-INCLUDE(ChibiOS/18.2/ChibiOS_RTOS)
-INCLUDE(ChibiOS/18.2/ChibiOS_HAL)
-
-MESSAGE(STATUS "RTOS sources: ")
-FOREACH(SOURCE ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}})
-    MESSAGE(STATUS "\t${SOURCE}")
-ENDFOREACH()
-
-MESSAGE(STATUS "HAL sources: ")
-FOREACH(SOURCE ${CHIBIOS_SOURCES_hal})
-    MESSAGE(STATUS "\t${SOURCE}")
-ENDFOREACH()
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS})
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_SOURCES_${comp}})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_ROOT} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    FOREACH(incl ${CHIBIOS_INCLUDES_${comp}})
-        LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_ROOT}/${incl})
-    ENDFOREACH()
-ENDFOREACH()
-
-
-

cmake/ChibiOS/18.2/ChibiOS_HAL.cmake

@@ -1,490 +0,0 @@
-SET (CHIBIOS_SOURCES_hal
-    os/hal/src/hal.c
-    os/hal/src/hal_st.c
-    os/hal/src/hal_buffers.c
-    os/hal/src/hal_queues.c
-    os/hal/src/hal_mmcsd.c
-    os/hal/ports/common/ARMCMx/nvic.c
-)
-
-SET (CHIBIOS_INCLUDES_hal
-    os/hal/include
-    os/hal/ports/common/ARMCMx
-)
-
-SET (CHIBIOS_SOURCES_hal_nil
-    os/hal/osal/nil/osal.c
-)
-
-SET (CHIBIOS_SOURCES_hal_rt
-    os/hal/osal/rt/osal.c
-)
-
-SET (CHIBIOS_INCLUDES_hal_nil
-    os/hal/osal/nil
-)
-
-SET (CHIBIOS_INCLUDES_hal_rt
-    os/hal/osal/rt
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC         os/hal/src/hal_adc.c)
-SET (CHIBIOS_SOURCES_hal_CAN         os/hal/src/hal_can.c)
-SET (CHIBIOS_SOURCES_hal_CRY         os/hal/src/hal_crypto.c)
-SET (CHIBIOS_SOURCES_hal_DAC         os/hal/src/hal_dac.c)
-SET (CHIBIOS_SOURCES_hal_EXT         os/hal/src/hal_ext.c)
-SET (CHIBIOS_SOURCES_hal_GPT         os/hal/src/hal_gpt.c)
-SET (CHIBIOS_SOURCES_hal_I2C         os/hal/src/hal_i2c.c)
-SET (CHIBIOS_SOURCES_hal_I2S         os/hal/src/hal_i2s.c)
-SET (CHIBIOS_SOURCES_hal_ICU         os/hal/src/hal_icu.c)
-SET (CHIBIOS_SOURCES_hal_MAC         os/hal/src/hal_mac.c)
-SET (CHIBIOS_SOURCES_hal_MMC_SPI     os/hal/src/hal_mmc_spi.c)
-SET (CHIBIOS_SOURCES_hal_PAL         os/hal/src/hal_pal.c)
-SET (CHIBIOS_SOURCES_hal_PWM         os/hal/src/hal_pwm.c)
-SET (CHIBIOS_SOURCES_hal_QSPI        os/hal/src/hal_qspi.c)
-SET (CHIBIOS_SOURCES_hal_RTC         os/hal/src/hal_rtc.c)
-SET (CHIBIOS_SOURCES_hal_SDC         os/hal/src/hal_sdc.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL      os/hal/src/hal_serial.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_USB  os/hal/src/hal_serial_usb.c)
-SET (CHIBIOS_SOURCES_hal_SPI         os/hal/src/hal_spi.c)
-SET (CHIBIOS_SOURCES_hal_UART        os/hal/src/hal_uart.c)
-SET (CHIBIOS_SOURCES_hal_USB         os/hal/src/hal_usb.c)
-SET (CHIBIOS_SOURCES_hal_WDG         os/hal/src/hal_wdg.c)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_F0
-    os/hal/ports/STM32/STM32F0xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F0
-    os/hal/ports/STM32/STM32F0xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F0xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-SET (CHIBIOS_SOURCES_hal_ADC_F0     os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F0     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F0     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F0     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F0     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F0     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F0     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F0     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F0     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F0     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F0     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F0     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F0  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F0    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F0     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F0     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F0    os/hal/ports/STM32/LLD/ADCv1)
-SET (CHIBIOS_INCLUDES_hal_CAN_F0    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F0    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F0    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F0    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F0    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_RTC_F0    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F0    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_F0    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_GPT_F0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F0 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_F0   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_USB_F0    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F0    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-SET (CHIBIOS_INCLUDES_hal_F1
-    os/hal/ports/STM32/STM32F1xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F1
-    os/hal/ports/STM32/STM32F1xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F1xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-SET (CHIBIOS_SOURCES_hal_ADC_F1     os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F1     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F1     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F1     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F1     os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F1     os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F1     os/hal/ports/STM32/LLD/RTCv1/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F1     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F1     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F1     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F1     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F1     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F1  os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F1    os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F1     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F1     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F1    os/hal/ports/STM32/STM32F1xx)
-SET (CHIBIOS_INCLUDES_hal_CAN_F1    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F1    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F1    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F1    os/hal/ports/STM32/LLD/GPIOv1)
-SET (CHIBIOS_INCLUDES_hal_I2C_F1    os/hal/ports/STM32/LLD/I2Cv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F1    os/hal/ports/STM32/LLD/RTCv1)
-SET (CHIBIOS_INCLUDES_hal_I2S_F1    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_F1    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F1    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F1    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F1    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F1 os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_UART_F1   os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F1    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F1    os/hal/ports/STM32/LLD/xWDGv1)
-
-SET (CHIBIOS_INCLUDES_hal_F2
-    os/hal/ports/STM32/STM32F4xx
-    os/hal/ports/STM32/LLD/DMAv2
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F2
-    os/hal/ports/STM32/STM32F4xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F4xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F2     os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F2     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F2     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F2     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F2     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F2     os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_MAC_F2     os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F2     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_F2    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F2     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F2     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F2     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_F2     os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F2     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F2     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F2     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F2  os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F2    os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F2     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F2    os/hal/ports/STM32/LLD/ADCv2)
-SET (CHIBIOS_INCLUDES_hal_CAN_F2    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F2    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F2    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F2    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F2    os/hal/ports/STM32/LLD/I2Cv1)
-SET (CHIBIOS_INCLUDES_hal_MAC_F2    os/hal/ports/STM32/LLD/MACv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F2    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_F2   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F2    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F2    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_F2    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SDC_F2    os/hal/ports/STM32/LLD/SDIOv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F2    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F2    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F2    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F2 os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_UART_F2   os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F2    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-SET (CHIBIOS_INCLUDES_hal_F3
-    os/hal/ports/STM32/STM32F3xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F3
-    os/hal/ports/STM32/STM32F3xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F3xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F3     os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F3     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F3     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F3     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F3     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F3     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F3     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F3     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F3     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F3     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F3     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F3     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F3  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F3    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F3     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F3     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F3    os/hal/ports/STM32/LLD/ADCv3)
-SET (CHIBIOS_INCLUDES_hal_CAN_F3    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F3    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F3    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F3    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F3    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_RTC_F3    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F3    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_F3    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_GPT_F3    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F3    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F3    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F3 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_F3   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_USB_F3    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F3    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_F4
-    os/hal/ports/STM32/STM32F4xx
-    os/hal/ports/STM32/LLD/DMAv2
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F4
-    os/hal/ports/STM32/STM32F4xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F4xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F4     os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F4     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F4     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F4     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F4     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F4     os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_MAC_F4     os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F4     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_F4    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F4     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F4     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F4     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_F4     os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F4     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F4     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F4     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F4  os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F4    os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F4     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F4    os/hal/ports/STM32/LLD/ADCv2)
-SET (CHIBIOS_INCLUDES_hal_CAN_F4    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F4    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F4    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F4    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F4    os/hal/ports/STM32/LLD/I2Cv1)
-SET (CHIBIOS_INCLUDES_hal_MAC_F4    os/hal/ports/STM32/LLD/MACv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F4    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_F4   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F4    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F4    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_F4    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SDC_F4    os/hal/ports/STM32/LLD/SDIOv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F4 os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_UART_F4   os/hal/ports/STM32/LLD/USARTv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_F4    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_F7
-    os/hal/ports/STM32/STM32F7xx
-    os/hal/ports/STM32/LLD/DMAv2
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_F7
-    os/hal/ports/STM32/STM32F7xx/stm32_isr.c
-    os/hal/ports/STM32/STM32F7xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_F7     os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_F7     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_CRY_F7     os/hal/ports/STM32/LLD/CRYPv1/hal_crypto_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_F7     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_F7     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_F7     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_F7     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_MAC_F7     os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_F7     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_F7    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_F7     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_F7     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_F7     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_F7     os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_F7     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_F7     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_F7     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_F7  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_F7    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_F7     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_F7    os/hal/ports/STM32/LLD/ADCv2)
-SET (CHIBIOS_INCLUDES_hal_CAN_F7    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_CRY_F7    os/hal/ports/STM32/LLD/CRYPv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_F7    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_F7    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_F7    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_F7    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_MAC_F7    os/hal/ports/STM32/LLD/MACv1)
-SET (CHIBIOS_INCLUDES_hal_USB_F7    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_F7   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_F7    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_F7    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_F7    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SDC_F7    os/hal/ports/STM32/LLD/SDMMCv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_F7    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_F7    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_F7    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_F7 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_F7   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_WDG_F7    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_L0
-    os/hal/ports/STM32/STM32L0xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_L0
-    os/hal/ports/STM32/STM32L0xx/stm32_isr.c
-    os/hal/ports/STM32/STM32L0xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_L0     os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_L0     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_L0     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_L0     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_L0     os/hal/ports/STM32/LLD/GPIOv2/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_L0     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_L0     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_L0     os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_L0     os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_L0     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_L0     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_L0     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_L0  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_L0    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_L0     os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_L0     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_L0    os/hal/ports/STM32/LLD/ADCv1)
-SET (CHIBIOS_INCLUDES_hal_CAN_L0    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_L0    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_L0    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_L0    os/hal/ports/STM32/LLD/GPIOv2)
-SET (CHIBIOS_INCLUDES_hal_I2C_L0    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_RTC_L0    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_L0    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_SPI_L0    os/hal/ports/STM32/LLD/SPIv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_L0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_L0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_L0    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_L0 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_L0   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_USB_L0    os/hal/ports/STM32/LLD/USBv1)
-SET (CHIBIOS_INCLUDES_hal_WDG_L0    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-SET (CHIBIOS_INCLUDES_hal_L4
-    os/hal/ports/STM32/STM32L4xx
-    os/hal/ports/STM32/LLD/DMAv1
-    os/hal/ports/STM32/LLD/TIMv1
-)
-SET (CHIBIOS_SOURCES_hal_L4
-    os/hal/ports/STM32/STM32L4xx/stm32_isr.c
-    os/hal/ports/STM32/STM32L4xx/hal_lld.c
-    os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c
-    os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
-)
-
-SET (CHIBIOS_SOURCES_hal_ADC_L4     os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c)
-SET (CHIBIOS_SOURCES_hal_CAN_L4     os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c)
-SET (CHIBIOS_SOURCES_hal_DAC_L4     os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c)
-SET (CHIBIOS_SOURCES_hal_EXT_L4     os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c)
-SET (CHIBIOS_SOURCES_hal_PAL_L4     os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2C_L4     os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c)
-SET (CHIBIOS_SOURCES_hal_USB_L4     os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c)
-SET (CHIBIOS_SOURCES_hal_QSPI_L4    os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c)
-SET (CHIBIOS_SOURCES_hal_RTC_L4     os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c)
-SET (CHIBIOS_SOURCES_hal_I2S_L4     os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c)
-SET (CHIBIOS_SOURCES_hal_SPI_L4     os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c)
-SET (CHIBIOS_SOURCES_hal_SDC_L4     os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c)
-SET (CHIBIOS_SOURCES_hal_GPT_L4     os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c)
-SET (CHIBIOS_SOURCES_hal_ICU_L4     os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c)
-SET (CHIBIOS_SOURCES_hal_PWM_L4     os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c)
-SET (CHIBIOS_SOURCES_hal_SERIAL_L4  os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c)
-SET (CHIBIOS_SOURCES_hal_UART_L4    os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c)
-SET (CHIBIOS_SOURCES_hal_WDG_L4     os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c)
-
-SET (CHIBIOS_INCLUDES_hal_ADC_L4    os/hal/ports/STM32/LLD/ADCv3)
-SET (CHIBIOS_INCLUDES_hal_CAN_L4    os/hal/ports/STM32/LLD/CANv1)
-SET (CHIBIOS_INCLUDES_hal_DAC_L4    os/hal/ports/STM32/LLD/DACv1)
-SET (CHIBIOS_INCLUDES_hal_EXT_L4    os/hal/ports/STM32/LLD/EXTIv1)
-SET (CHIBIOS_INCLUDES_hal_PAL_L4    os/hal/ports/STM32/LLD/GPIOv3)
-SET (CHIBIOS_INCLUDES_hal_I2C_L4    os/hal/ports/STM32/LLD/I2Cv2)
-SET (CHIBIOS_INCLUDES_hal_USB_L4    os/hal/ports/STM32/LLD/OTGv1)
-SET (CHIBIOS_INCLUDES_hal_QSPI_L4   os/hal/ports/STM32/LLD/QUADSPIv1)
-SET (CHIBIOS_INCLUDES_hal_RTC_L4    os/hal/ports/STM32/LLD/RTCv2)
-SET (CHIBIOS_INCLUDES_hal_I2S_L4    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SPI_L4    os/hal/ports/STM32/LLD/SPIv2)
-SET (CHIBIOS_INCLUDES_hal_SDC_L4    os/hal/ports/STM32/LLD/SDMMCv1)
-SET (CHIBIOS_INCLUDES_hal_GPT_L4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_ICU_L4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_PWM_L4    os/hal/ports/STM32/LLD/TIMv1)
-SET (CHIBIOS_INCLUDES_hal_SERIAL_L4 os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_UART_L4   os/hal/ports/STM32/LLD/USARTv2)
-SET (CHIBIOS_INCLUDES_hal_WDG_L4    os/hal/ports/STM32/LLD/xWDGv1)
-
-
-
-IF (CHIBIOS_SOURCES_hal_${CHIBIOS_KERNEL})
-    LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${CHIBIOS_KERNEL}})
-ENDIF()
-    
-IF (CHIBIOS_INCLUDES_hal_${CHIBIOS_KERNEL})
-    LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${CHIBIOS_KERNEL}})
-ENDIF()
-
-IF (CHIBIOS_SOURCES_hal_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${STM32_FAMILY}})
-ENDIF()
-    
-IF (CHIBIOS_INCLUDES_hal_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${STM32_FAMILY}})
-ENDIF()
-
-FOREACH (COMP ${CHIBIOS_HAL_COMPONENTS})
-    IF (CHIBIOS_SOURCES_hal_${COMP})
-        LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${COMP}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_hal_${COMP})
-        LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${COMP}})
-    ENDIF()
-    
-    IF (CHIBIOS_SOURCES_hal_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_SOURCES_hal ${CHIBIOS_SOURCES_hal_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_hal_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_INCLUDES_hal ${CHIBIOS_INCLUDES_hal_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-ENDFOREACH()
-
-

cmake/ChibiOS/18.2/ChibiOS_LD.cmake

@@ -1,57 +0,0 @@
-IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
-    SET(CHIBIOS_PROCESS_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
-    SET(CHIBIOS_MAIN_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/startup/ARMCMx/compilers/GCC/ld\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in
-        "MEMORY\n"
-        "{\n"
-            "flash0  : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-            "flash1  : org = 0x00000000, len = 0\n"
-            "flash2  : org = 0x00000000, len = 0\n"
-            "flash3  : org = 0x00000000, len = 0\n"
-            "flash4  : org = 0x00000000, len = 0\n"
-            "flash5  : org = 0x00000000, len = 0\n"
-            "flash6  : org = 0x00000000, len = 0\n"
-            "flash7  : org = 0x00000000, len = 0\n"
-            "ram0    : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-            "ram1    : org = 0x00000000, len = 0\n"
-            "ram2    : org = 0x00000000, len = 0\n"
-            "ram3    : org = 0x00000000, len = 0\n"
-            "ram4    : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-            "ram5    : org = 0x00000000, len = 0\n"
-            "ram6    : org = 0x00000000, len = 0\n"
-            "ram7    : org = 0x00000000, len = 0\n"
-        "}\n"
-        "REGION_ALIAS(\"VECTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VECTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RAM_INIT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM_LMA\", flash0);\n"
-        "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-        "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-        "INCLUDE rules.ld\n"
-    )
-    SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()

cmake/ChibiOS/18.2/ChibiOS_RTOS.cmake

@@ -1,92 +0,0 @@
-FOREACH (FAMILY F0 L0 L4)
-    SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${FAMILY}
-        os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S
-        os/common/ports/ARMCMx/chcore.c
-        os/common/ports/ARMCMx/chcore_v6m.c
-        os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S
-    )
-ENDFOREACH()
-
-FOREACH (FAMILY F1 F2 F3 F4 F7)
-    SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${FAMILY}
-        os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S
-        os/common/ports/ARMCMx/chcore.c
-        os/common/ports/ARMCMx/chcore_v7m.c
-        os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S
-    )
-ENDFOREACH()
-
-FOREACH (FAMILY F0 F1 F2 F3 F4 F7 L0 L1)
-    SET (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${FAMILY}
-        os/common/startup/ARMCMx/devices/STM32${FAMILY}xx
-        os/common/ext/ST/STM32${FAMILY}xx
-        os/common/oslib/include
-        os/common/ports/ARMCMx
-        os/common/ports/ARMCMx/compilers/GCC
-    )
-ENDFOREACH()
-
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}
-    os/common/startup/ARMCMx/compilers/GCC/crt1.c
-    os/common/startup/ARMCMx/compilers/GCC/vectors.S
-)
-
-SET (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}
-    os/license
-    os/common/portability/GCC
-    os/common/startup/ARMCMx/compilers/GCC
-    os/common/ext/ARM/CMSIS/Core/Include
-)
-
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_MAILBOXES  os/common/oslib/src/chmboxes.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_MEMCORE    os/common/oslib/src/chmemcore.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_HEAP       os/common/oslib/src/chheap.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_MEMPOOLS   os/common/oslib/src/chmempools.c)
-SET (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_FACTORY    os/common/oslib/src/chfactory.c)
-
-SET (CHIBIOS_SOURCES_rt_TM          os/rt/src/chtm.c)
-SET (CHIBIOS_SOURCES_rt_REGISTRY    os/rt/src/chregistry.c)
-SET (CHIBIOS_SOURCES_rt_SEMAPHORES  os/rt/src/chsem.c)
-SET (CHIBIOS_SOURCES_rt_MUTEXES     os/rt/src/chmtx.c)
-SET (CHIBIOS_SOURCES_rt_CONDVARS    os/rt/src/chcond.c)
-SET (CHIBIOS_SOURCES_rt_EVENTS      os/rt/src/chevents.c)
-SET (CHIBIOS_SOURCES_rt_MESSAGES    os/rt/src/chmsg.c)
-SET (CHIBIOS_SOURCES_rt_DYNAMIC     os/rt/src/chdynamic.c)
-
-LIST (APPEND CHIBIOS_SOURCES_nil     os/nil/src/ch.c)
-LIST (APPEND CHIBIOS_INCLUDES_nil    os/nil/include)
-
-LIST (APPEND CHIBIOS_SOURCES_rt
-    os/rt/src/chsys.c
-    os/rt/src/chdebug.c
-    os/rt/src/chtrace.c
-    os/rt/src/chvt.c
-    os/rt/src/chschd.c
-    os/rt/src/chthreads.c
-)
-
-LIST (APPEND CHIBIOS_INCLUDES_rt     os/rt/include)
-
-IF (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_SOURCES_${CHIBIOS_KERNEL} ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${STM32_FAMILY}})
-ENDIF()
-
-IF (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${STM32_FAMILY})
-    LIST(APPEND CHIBIOS_INCLUDES_${CHIBIOS_KERNEL} ${CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${STM32_FAMILY}})
-ENDIF()
-
-FOREACH (COMP ${CHIBIOS_RTOS_COMPONENTS})
-    IF (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP})
-        LIST(APPEND CHIBIOS_SOURCES_${CHIBIOS_KERNEL} ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP})
-        LIST(APPEND CHIBIOS_INCLUDES_${CHIBIOS_KERNEL} ${CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP}})
-    ENDIF()
-
-    IF (CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_SOURCES_${CHIBIOS_KERNEL} ${CHIBIOS_SOURCES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-    IF (CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY})
-        LIST(APPEND CHIBIOS_INCLUDES_${CHIBIOS_KERNEL} ${CHIBIOS_INCLUDES_${CHIBIOS_KERNEL}_${COMP}_${STM32_FAMILY}})
-    ENDIF()
-ENDFOREACH()

cmake/ChibiOS/ChibiOS16.cmake

@@ -1,81 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS)
-    SET(ChibiOS_FIND_COMPONENTS nil hal st)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-LIST(FIND ChibiOS_FIND_COMPONENTS hal ChibiOS_FIND_COMPONENTS_hal)
-LIST(FIND ChibiOS_FIND_COMPONENTS st ChibiOS_FIND_COMPONENTS_st)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_hal} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS hal)
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_st} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS st)
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS16_LD)
-INCLUDE(ChibiOS/ChibiOS16_HAL)
-INCLUDE(ChibiOS/ChibiOS16_Community)
-
-
-IF(${CHIBIOS_KERNEL} STREQUAL rt)
-  INCLUDE(ChibiOS/ChibiOS16_RT)
-ELSE()
-  INCLUDE(ChibiOS/ChibiOS16_NIL)
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS16_Various)
-
-SET(CHIBIOS_COMPONENTS nil rt hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_HAL_LIB_MODULES} ${CHIBIOS_VARIOUS_MODULES} ${CHIBIOS_COMMUNITY_MODULES})
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS})
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake/ChibiOS/ChibiOS16_Community.cmake

@@ -1,29 +0,0 @@
-SET(CHIBIOS_COMMUNITY_MODULES community nand eicu usbh timcap qei onewire crc eeprom usb_hid usb_msd)
-
-SET(CHIBIOS_community_SEARCH_HEADERS hal_community.h)
-SET(CHIBIOS_community_SOURCES hal_community.c)
-
-FOREACH(module ${CHIBIOS_COMMUNITY_MODULES})
-    SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/community/os/hal/include ${CHIBIOS_ROOT}/community/os/hal/src)
-    SET(CHIBIOS_${module}_SOURCES hal_${module}.c)
-    SET(CHIBIOS_${module}_SEARCH_HEADERS hal_${module}.h)
-ENDFOREACH()
-
-SET(CHIBIOS_HAL_PLATFORM_MODULES nand eicu usbh timcap qei crc)
-SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-    LLD/FSMCv1
-    LLD/TIMv1
-    LLD/USBHv1
-    LLD/TIMv1
-    LLD/TIMv1
-    LLD/CRCv1
-)
-
-SET(INDEX 0)
-FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-    LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/community/os/hal/ports/STM32/${path})
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-    SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-    MATH(EXPR INDEX "${INDEX} + 1")
-ENDFOREACH()

cmake/ChibiOS/ChibiOS16_HAL.cmake

@@ -1,258 +0,0 @@
-SET(CHIBIOS_HAL_LIB_MODULES chprintf memstreams nullstreams)
-SET(CHIBIOS_HAL_MODULES adc can dac ext gpt i2c i2s icu mac mmc_spi mmcsd pal pwm rtc sdc serial serial_usb spi st uart usb wdg)
-
-IF(${CHIBIOS_KERNEL} STREQUAL nil)
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/nil)
-ELSE()
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/rt)
-ENDIF()
-
-SET(CHIBIOS_hal_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src/ ${CHIBIOS_OSAL_PATH})
-SET(CHIBIOS_hal_SEARCH_HEADERS hal.h osal.h)
-SET(CHIBIOS_hal_SOURCES hal.c hal_buffers.c hal_queues.c osal.c)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-
-  IF(${module} STREQUAL mmcsd)
-    SET(CHIBIOS_${module}_SOURCES hal_mmcsd.c)
-  ENDIF()
-
-  IF(${module} STREQUAL serial_usb)
-    SET(CHIBIOS_${module}_SOURCES ${CHIBIOS_${module}_SOURCES} hal_buffers.c)
-  ENDIF()
-ENDFOREACH()
-
-FOREACH(module ${CHIBIOS_HAL_LIB_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/lib/streams)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-            LLD/ADCv1
-            LLD/CANv1
-            LLD/DACv1
-            LLD/EXTIv1
-            LLD/TIMv1
-            LLD/I2Cv2
-            LLD/SPIv1
-            LLD/TIMv1
-            LLD/MACv1
-            LLD/GPIOv2
-            LLD/TIMv1
-            LLD/RTCv2
-            LLD/SDMMCv1
-            LLD/USARTv2
-            LLD/SPIv2
-            LLD/TIMv1
-            LLD/USARTv2
-            LLD/USBv1
-            LDD/DMAv1
-            )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-            ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-            )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-            hal_lld.h
-            stm32_dma.h
-            nvic.h
-            st_lld.h
-            )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-            hal_lld.c
-            stm32_dma.c
-            nvic.c
-            st_lld.c
-            )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      STM32F1xx
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/TIMv1
-      LLD/GPIOv1
-      LLD/TIMv1
-      LLD/RTCv1
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/USBv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-        st_lld.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-        st_lld.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv2
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/MACv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/OTGv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv2
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-        st_lld.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-        st_lld.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc serial spi st uart usb wdg)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv1
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv2
-      LLD/TIMv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/USARTv2
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv2
-      LLD/USBv1
-      LLD/xWDGv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/TIMv1
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-        st_lld.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-        st_lld.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ENDIF()

cmake/ChibiOS/ChibiOS16_LD.cmake

@@ -1,38 +0,0 @@
-IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
- SET(CHIBIOS_PROCESS_STACK_SIZE 0x200)
- MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
- SET(CHIBIOS_MAIN_STACK_SIZE 0x200)
- MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-   FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in
-     "MEMORY\n"
-     "{\n"
-     "  flash : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-     "  ram0 : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-     "  ram1 : org = 0x00000000, len = 0\n"
-     "  ram2 : org = 0x00000000, len = 0\n"
-     "  ram3 : org = 0x00000000, len = 0\n"
-     "  ram4 : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-     "  ram5 : org = 0x00000000, len = 0\n"
-     "  ram6 : org = 0x00000000, len = 0\n"
-     "  ram7 : org = 0x00000000, len = 0\n"
-     "}\n"
-     "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-     "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-     "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-     "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-     "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-     "INCLUDE rules.ld\n"
-   )
-   SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()

cmake/ChibiOS/ChibiOS16_NIL.cmake

@@ -1,69 +0,0 @@
-SET(CHIBIOS_nil_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/nil/src
-  ${CHIBIOS_ROOT}/os/nil/include
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/nil/src
-)
-SET(CHIBIOS_nil_SEARCH_HEADERS
-  nil.h
-  nilcore.h
-  niltypes.h
-)
-SET(CHIBIOS_nil_SOURCES  
-  crt1.c
-  vectors.c
-  nilcore.c
-  nil.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v6m.s nilcore_v6m.c nilcoreasm_v6m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F0xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm0.h
-    stm32f0xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F1xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f1xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F4xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v6m.s nilcore_v6m.c nilcoreasm_v6m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32L0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32L0xx/
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm0plus.h
-    stm32l0xx.h
-    cmparams.h
-  )
-ENDIF()

cmake/ChibiOS/ChibiOS16_RT.cmake

@@ -1,89 +0,0 @@
-SET(CHIBIOS_rt_SEARCH_PATH
-  ${CHIBIOS_ROOT}/os/rt/src
-  ${CHIBIOS_ROOT}/os/rt/include
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/rt/src
-)
-
-SET(CHIBIOS_rt_SEARCH_HEADERS
-  ch.h
-  chcore.h
-  chtypes.h
-)
-
-SET(CHIBIOS_rt_SOURCES
-  crt1.c
-  vectors.c
-  chcore.c
-  chsys.c
-  chdebug.c
-  chvt.c
-  chschd.c
-  chthreads.c
-  chtm.c
-  chstats.c
-  chdynamic.c
-  chregistry.c
-  chsem.c
-  chmtx.c
-  chcond.c
-  chevents.c
-  chmsg.c
-  chmboxes.c
-  chqueues.c
-  chmemcore.c
-  chheap.c
-  chmempools.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v6m.s chcore_v6m.c chcoreasm_v6m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-          ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F0xx/
-          )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-          core_cm0.h
-          stm32f0xx.h
-          cmparams.h
-          )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F1xx/
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f1xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32F4xx/
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v6m.s chcore_v6m.c chcoreasm_v6m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32L0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST/STM32L0xx/
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm0plus.h
-    stm32l0xx.h
-    cmparams.h
-  )
-ENDIF()

cmake/ChibiOS/ChibiOS16_Various.cmake

@@ -1,12 +0,0 @@
-SET(CHIBIOS_VARIOUS_MODULES evtimer shell syscalls)
-
-SET(CHIBIOS_evtimer_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_evtimer_SOURCES evtimer.c)
-SET(CHIBIOS_evtimer_SEARCH_HEADERS evtimer.h)
-
-SET(CHIBIOS_shell_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_shell_SOURCES shell.c)
-SET(CHIBIOS_shell_SEARCH_HEADERS shell.h)
-
-SET(CHIBIOS_syscalls_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_syscalls_SOURCES syscalls.c)

cmake/ChibiOS/ChibiOS17.cmake

@@ -1,63 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS)
-    SET(ChibiOS_FIND_COMPONENTS nil hal st)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS17_LD)
-INCLUDE(ChibiOS/ChibiOS17_Kernel)
-INCLUDE(ChibiOS/ChibiOS17_HAL)
-#INCLUDE(ChibiOS/ChibiOS17_Various)
-#INCLUDE(ChibiOS/ChibiOS17_Community)
-
-SET(CHIBIOS_COMPONENTS nil rt hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_HAL_LIB_MODULES} ${CHIBIOS_VARIOUS_MODULES} ${CHIBIOS_COMMUNITY_MODULES})
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS})
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake/ChibiOS/ChibiOS17_HAL.cmake

@@ -1,254 +0,0 @@
-SET(CHIBIOS_HAL_LIB_MODULES chprintf memstreams nullstreams)
-SET(CHIBIOS_HAL_MODULES adc buffers can channels dac ext files gpt i2c i2s icu ioblock mac mii mmc_spi mmcsd pal pwm qspi queues rtc sdc serial serial_usb spi st streams uart usb_cdc usb wdg)
-
-IF(${CHIBIOS_KERNEL} STREQUAL nil)
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/nil)
-ELSE()
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/rt)
-ENDIF()
-
-SET(CHIBIOS_hal_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/hal/include 
-  ${CHIBIOS_ROOT}/os/hal/src/
-  ${CHIBIOS_ROOT}/os/hal/osal/lib
-  ${CHIBIOS_OSAL_PATH}
-)
-SET(CHIBIOS_hal_SEARCH_HEADERS 
-  hal.h 
-  osal.h
-)
-SET(CHIBIOS_hal_SOURCES 
-  hal.c 
-  osal.c
-)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-  SET(CHIBIOS_${module}_SOURCES hal_${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS hal_${module}.h)
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb wdg)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-            LLD/ADCv1
-            LLD/CANv1
-            LLD/DACv1
-            LLD/EXTIv1
-            LLD/TIMv1
-            LLD/I2Cv2
-            LLD/SPIv1
-            LLD/TIMv1
-            LLD/MACv1
-            LLD/GPIOv2
-            LLD/TIMv1
-            LLD/RTCv2
-            LLD/SDMMCv1
-            LLD/USARTv2
-            LLD/SPIv2
-            LLD/TIMv1
-            LLD/USARTv2
-            LLD/USBv1
-            LDD/DMAv1
-            LDD/xWDGv1
-            )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-            ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-            )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-            hal_lld.h
-            stm32_isr.h
-            stm32_rcc.h
-            stm32_registry.h
-            nvic.h
-            stm32_dma.h
-            )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-            hal_lld.c
-            nvic.c
-            stm32_dma.c
-            )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      STM32F1xx
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/TIMv1
-      LLD/GPIOv1
-      LLD/TIMv1
-      LLD/RTCv1
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/USBv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_isr.h
-        stm32_rcc.h
-        stm32_registry.h
-        nvic.h
-        stm32_dma.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        nvic.c
-        stm32_dma.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv2
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/MACv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/SDIOv1
-      LLD/USARTv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/OTGv1
-    )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv2
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_isr.h
-        stm32_rcc.h
-        stm32_registry.h
-        nvic.h
-        stm32_dma.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        nvic.c
-        stm32_dma.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c icu pal pwm rtc serial spi st uart usb wdg)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-      LLD/ADCv1
-      LLD/CANv1
-      LLD/DACv1
-      LLD/EXTIv1
-      LLD/TIMv1
-      LLD/I2Cv2
-      LLD/TIMv1
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD/USARTv2
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv2
-      LLD/USBv1
-      LLD/xWDGv1
-    )
-
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv1
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_isr.h
-        stm32_rcc.h
-        stm32_registry.h
-        nvic.h
-        stm32_dma.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-        hal_lld.c
-        nvic.c
-        stm32_dma.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS hal_${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES hal_${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32L0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} hal_ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} hal_ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ENDIF()

cmake/ChibiOS/ChibiOS17_Kernel.cmake

@@ -1,166 +0,0 @@
-SET(CHIBIOS_kernel_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/license
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/oslib/src
-  ${CHIBIOS_ROOT}/os/common/oslib/include
-  ${CHIBIOS_ROOT}/os/common/ext/CMSIS/include
-  ${CHIBIOS_ROOT}/os/common/ext/CMSIS/include
-)
-
-SET(CHIBIOS_kernel_SEARCH_HEADERS 
-  ch.h
-  chcore.h
-  chlicense.h
-  chtypes.h
-  cmparams.h
-  chbsem.h
-  chheap.h
-  chmboxes.h
-  chmemcore.h
-  chmempools.h
-)
-
-SET(CHIBIOS_kernel_SOURCES
-  chcore.c
-  crt1.c
-  vectors.c
-  chheap.c
-  chmboxes.c
-  chmemcore.c
-  chmempools.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32F0xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32F0xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm0.h
-    stm32f0xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v6m.S 
-    chcore_v6m.c
-    chcoreasm_v6m.S
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32F1xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm3.h
-    stm32f1xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v7m.S 
-    chcore_v7m.c
-    chcoreasm_v7m.S
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32F4xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm4.h
-    stm32f4xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v7m.S 
-    chcore_v7m.c
-    chcoreasm_v7m.S
-  )
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-  SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_kernel_SEARCH_PATH} 
-    ${CHIBIOS_ROOT}/os/common/startup/ARMCMx/devices/STM32L0xx
-    ${CHIBIOS_ROOT}/os/common/ext/CMSIS/ST/STM32L0xx
-  )
-  SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ${CHIBIOS_kernel_SEARCH_HEADERS}
-    core_cm0.h
-    stm32l0xx.h
-  )
-  SET(CHIBIOS_kernel_SOURCES  
-    ${CHIBIOS_kernel_SOURCES} 
-    crt0_v6m.S 
-    chcore_v6m.c
-    chcoreasm_v6m.S
-  )
-ENDIF()
-
-SET(CHIBIOS_nil_SEARCH_PATH 
-  ${CHIBIOS_kernel_SEARCH_PATH}
-  ${CHIBIOS_ROOT}/os/nil/src
-  ${CHIBIOS_ROOT}/os/nil/include
-)
-
-SET(CHIBIOS_rt_SEARCH_PATH 
-  ${CHIBIOS_kernel_SEARCH_PATH}
-  ${CHIBIOS_ROOT}/os/rt/src
-  ${CHIBIOS_ROOT}/os/rt/include
-)
-
-SET(CHIBIOS_nil_SEARCH_HEADERS
-  ${CHIBIOS_kernel_SEARCH_HEADERS}
-)
-
-SET(CHIBIOS_rt_SEARCH_HEADERS
-  ${CHIBIOS_kernel_SEARCH_HEADERS}
-  ch.h
-  chalign.h
-  chchecks.h
-  chcond.h
-  chdebug.h
-  chdynamic.h
-  chevents.h
-  chmsg.h
-  chmtx.h
-  chregistry.h
-  chschd.h
-  chsem.h
-  chstats.h
-  chsys.h
-  chsystypes.h
-  chthreads.h
-  chtm.h
-  chtrace.h
-  chvt.h
-)
-
-SET(CHIBIOS_nil_SOURCES  
-  ${CHIBIOS_kernel_SOURCES}
-  ch.c
-)
-
-SET(CHIBIOS_rt_SOURCES  
-  ${CHIBIOS_kernel_SOURCES}
-  chcond.c
-  chdebug.c
-  chdynamic.c
-  chevents.c
-  chmsg.c
-  chmtx.c
-  chregistry.c
-  chschd.c
-  chsem.c
-  chstats.c
-  chsys.c
-  chthreads.c
-  chtm.c
-  chtrace.c
-  chvt.c
-)

cmake/ChibiOS/ChibiOS17_LD.cmake

@@ -1,57 +0,0 @@
-IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
-    SET(CHIBIOS_PROCESS_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
-    SET(CHIBIOS_MAIN_STACK_SIZE 0x200)
-    MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/startup/ARMCMx/compilers/GCC/ld\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in
-        "MEMORY\n"
-        "{\n"
-            "flash0  : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-            "flash1  : org = 0x00000000, len = 0\n"
-            "flash2  : org = 0x00000000, len = 0\n"
-            "flash3  : org = 0x00000000, len = 0\n"
-            "flash4  : org = 0x00000000, len = 0\n"
-            "flash5  : org = 0x00000000, len = 0\n"
-            "flash6  : org = 0x00000000, len = 0\n"
-            "flash7  : org = 0x00000000, len = 0\n"
-            "ram0    : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-            "ram1    : org = 0x00000000, len = 0\n"
-            "ram2    : org = 0x00000000, len = 0\n"
-            "ram3    : org = 0x00000000, len = 0\n"
-            "ram4    : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-            "ram5    : org = 0x00000000, len = 0\n"
-            "ram6    : org = 0x00000000, len = 0\n"
-            "ram7    : org = 0x00000000, len = 0\n"
-        "}\n"
-        "REGION_ALIAS(\"VECTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VECTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"XTORS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"TEXT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"RODATA_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH\", flash0);\n"
-        "REGION_ALIAS(\"VARIOUS_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"RAM_INIT_FLASH_LMA\", flash0);\n"
-        "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-        "REGION_ALIAS(\"DATA_RAM_LMA\", flash0);\n"
-        "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-        "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-        "INCLUDE rules.ld\n"
-    )
-    SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()

cmake/ChibiOS/ChibiOS2.cmake

@@ -1,324 +0,0 @@
-SET(CHIBIOS_HAL_MODULES adc can ext gpt i2c icu mac mmc_spi mmcsd pal pwm rtc sdc serial serial_usb spi tm uart usb)
-SET(CHIBIOS_VARIOUS_MODULES chprintf chrtclib evtimer memstreams shell syscalls fatfs lwip)
-SET(CHIBIOS_COMPONENTS kernel hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_VARIOUS_MODULES})
-
-IF(NOT ChibiOS_FIND_COMPONENTS) 
-    SET(ChibiOS_FIND_COMPONENTS kernel)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-    MESSAGE(STATUS "Supported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-ENDIF()
-
-SET(CHIBIOS_HAL_LLD_MODULES adc can ext gpt i2c icu mac pal pwm rtc sdc serial spi uart usb)
-
-SET(CHIBIOS_kernel_SEARCH_PATH 
-    ${CHIBIOS_ROOT}/os/kernel/include
-    ${CHIBIOS_ROOT}/os/ports/common/ARMCMx
-    ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx
-    ${CHIBIOS_ROOT}/os/kernel/src
-)
-SET(CHIBIOS_kernel_SEARCH_HEADERS
-    ch.h
-    nvic.h
-    chcore.h
-)
-SET(CHIBIOS_kernel_SOURCES  
-    chsys.c
-    chdebug.c
-    chlists.c
-    chvt.c
-    chschd.c
-    chthreads.c
-    chdynamic.c
-    chregistry.c
-    chsem.c
-    chmtx.c
-    chcond.c
-    chevents.c
-    chmsg.c
-    chmboxes.c
-    chqueues.c
-    chmemcore.c
-    chheap.c
-    chmempools.c
-    crt0.c
-    chcore.c
-    chcore_v7m.c
-    nvic.c
-)
-
-SET(CHIBIOS_hal_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-SET(CHIBIOS_hal_SEARCH_HEADERS hal.h)
-SET(CHIBIOS_hal_SOURCES hal.c)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-    SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/src)
-    SET(CHIBIOS_${module}_SOURCES ${module}.c)
-ENDFOREACH()
-
-FOREACH(module ${CHIBIOS_VARIOUS_MODULES})
-    IF(${module} STREQUAL fatfs)
-        SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/various/fatfs_bindings ${CHIBIOS_ROOT}/ext/fatfs/src/ ${CHIBIOS_ROOT}/ext/fatfs/src/option)
-        SET(CHIBIOS_${module}_SOURCES
-            fatfs_diskio.c
-            fatfs_syscall.c
-            ff.c
-            ccsbcs.c
-        )
-        SET(CHIBIOS_${module}_SEARCH_HEADERS ff.h)
-    ELSEIF(${module} STREQUAL lwip)
-        SET(CHIBIOS_${module}_SEARCH_PATH 
-            ${CHIBIOS_ROOT}/os/various/lwip_bindings 
-            ${CHIBIOS_ROOT}/os/various/lwip_bindings/arch
-            ${CHIBIOS_ROOT}/ext/lwip/src/
-            ${CHIBIOS_ROOT}/ext/lwip/src/include/
-            ${CHIBIOS_ROOT}/ext/lwip/src/include/ipv4/
-        )
-        SET(CHIBIOS_${module}_SOURCES
-            lwipthread.c
-            sys_arch.c
-            netif/etharp.c
-            core/dhcp.c 
-            core/dns.c 
-            core/init.c 
-            core/mem.c 
-            core/memp.c 
-            core/netif.c 
-            core/pbuf.c 
-            core/raw.c 
-            core/stats.c 
-            core/sys.c 
-            core/tcp.c 
-            core/tcp_in.c 
-            core/tcp_out.c 
-            core/udp.c
-            core/ipv4/autoip.c 
-            core/ipv4/icmp.c 
-            core/ipv4/igmp.c 
-            core/ipv4/inet.c 
-            core/ipv4/inet_chksum.c 
-            core/ipv4/ip.c 
-            core/ipv4/ip_addr.c 
-            core/ipv4/ip_frag.c 
-            core/def.c 
-            core/timers.c
-            api/api_lib.c 
-            api/api_msg.c 
-            api/err.c 
-            api/netbuf.c 
-            api/netdb.c 
-            api/netifapi.c 
-            api/sockets.c 
-            api/tcpip.c
-        )
-        SET(CHIBIOS_${module}_SEARCH_HEADERS 
-            lwipthread.h 
-            sys_arch.h
-            lwip/api.h
-            lwip/ip.h
-        )
-    ELSE()
-        SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/various/)
-        SET(CHIBIOS_${module}_SOURCES ${module}.c)
-        IF(NOT (${module} STREQUAL syscalls))
-            SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-        ENDIF()
-    ENDIF()
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/ports/common/ARMCMx/CMSIS/include
-        ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F4xx
-    )
-    SET(CHIBIOS_kernel_PLATFORM_SOURCES
-        vectors.c
-    ) 
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_HEADERS
-        core_cm4.h
-        cmparams.h
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32.h
-        stm32f4xx.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-    )
-    
-    SET(CHIBIOS_HAL_PLATFORM_MODULE_PATHES
-        STM32F4xx
-        STM32
-        STM32
-        STM32/TIMv1
-        STM32/I2Cv1
-        STM32/TIMv1
-        STM32
-        STM32/GPIOv2
-        STM32/TIMv1
-        STM32/RTCv2
-        STM32
-        STM32/USARTv1
-        STM32/SPIv1
-        STM32/USARTv1
-        STM32/OTGv1
-    )
-    
-    IF(NOT ChibiOS_LINKER_SCRIPT)
-        IF(NOT STM32_CHIP_TYPE)
-            STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        ENDIF()
-        IF(NOT STM32_FLASH_SIZE)
-            STM32_GET_CHIP_PARAMETERS(${STM32_CHIP} STM32_FLASH_SIZE STM32_RAM_SIZE)
-        ENDIF()
-        IF(${STM32_CHIP_TYPE} STREQUAL 40_41xxx)
-            IF(${STM32_FLASH_SIZE} STREQUAL 1024K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F405xG.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F4xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL 429_439xx)
-            IF(${STM32_FLASH_SIZE} STREQUAL 2048K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F429xI.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F4xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ENDIF()
-        
-        IF(NOT ChibiOS_LINKER_SCRIPT)
-            MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-        ENDIF()
-    ENDIF()
-      
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/ports/common/ARMCMx/CMSIS/include
-        ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx
-    )
-    SET(CHIBIOS_kernel_PLATFORM_SOURCES
-        vectors.c
-    ) 
-    SET(CHIBIOS_kernel_PLATFORM_SEARCH_HEADERS
-        core_cm3.h
-        cmparams.h
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH 
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/platforms/STM32
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32.h
-        stm32f10x.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-    )
-    
-    SET(CHIBIOS_HAL_PLATFORM_MODULE_PATHES
-        STM32F1xx
-        STM32
-        STM32
-        STM32/TIMv1
-        STM32/I2Cv1
-        STM32/TIMv1
-        STM32
-        STM32/GPIOv1
-        STM32/TIMv1
-        STM32/RTCv1
-        STM32
-        STM32/USARTv1
-        STM32/SPIv1
-        STM32/USARTv1
-        STM32/USBv1
-    )
-            
-    IF(NOT ChibiOS_LINKER_SCRIPT)
-        IF(NOT STM32_CHIP_TYPE)
-            STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        ENDIF()
-        IF(NOT STM32_FLASH_SIZE)
-            STM32_GET_CHIP_PARAMETERS(${STM32_CHIP} STM32_FLASH_SIZE STM32_RAM_SIZE)
-        ENDIF()
-        IF(${STM32_CHIP_TYPE} STREQUAL MD_VL)
-            IF(${STM32_FLASH_SIZE} STREQUAL 128K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F100xB.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL MD)
-            IF(${STM32_FLASH_SIZE} STREQUAL 128K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xB.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL HD)
-            IF(${STM32_FLASH_SIZE} STREQUAL 384K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xD.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ELSEIF(${STM32_FLASH_SIZE} STREQUAL 512K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xE.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ELSEIF(${STM32_CHIP_TYPE} STREQUAL XL)
-            IF(${STM32_FLASH_SIZE} STREQUAL 1024K)
-                FIND_FILE(ChibiOS_LINKER_SCRIPT NAMES STM32F103xG.ld PATHS ${CHIBIOS_ROOT}/os/ports/GCC/ARMCMx/STM32F1xx/ld NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            ENDIF()
-        ENDIF()
-    ENDIF()            
-ENDIF()
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-SET(INDEX 0)
-FOREACH(module ${CHIBIOS_HAL_LLD_MODULES})
-    LIST(GET CHIBIOS_HAL_PLATFORM_MODULE_PATHES ${INDEX} path)
-        
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/platforms/${path})
-    SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-    SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-        
-    IF(${module} STREQUAL ext)
-       SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-       SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-    ENDIF()
-        
-    MATH(EXPR INDEX "${INDEX} + 1")
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_ext_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/platforms/STM32F4xx)
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_ext_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/platforms/STM32F1xx)
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS}) 
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()
-

cmake/ChibiOS/ChibiOS3.cmake

@@ -1,78 +0,0 @@
-IF(NOT ChibiOS_FIND_COMPONENTS) 
-    SET(ChibiOS_FIND_COMPONENTS nil hal st)
-    MESSAGE(STATUS "No ChibiOS components specified, using default: ${ChibiOS_FIND_COMPONENTS}")
-ENDIF()
-
-LIST(FIND ChibiOS_FIND_COMPONENTS nil ChibiOS_FIND_COMPONENTS_nil)
-LIST(FIND ChibiOS_FIND_COMPONENTS rt ChibiOS_FIND_COMPONENTS_rt)
-LIST(FIND ChibiOS_FIND_COMPONENTS hal ChibiOS_FIND_COMPONENTS_hal)
-LIST(FIND ChibiOS_FIND_COMPONENTS st ChibiOS_FIND_COMPONENTS_st)
-
-IF((${ChibiOS_FIND_COMPONENTS_nil} LESS 0) AND (${ChibiOS_FIND_COMPONENTS_rt} LESS 0))
-  MESSAGE(STATUS "No kernel component selected, using Nil kernel")
-  LIST(APPEND ChibiOS_FIND_COMPONENTS nil)
-  SET(CHIBIOS_KERNEL nil)
-ELSE()
-  IF((NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0)) AND (NOT (${ChibiOS_FIND_COMPONENTS_rt} LESS 0)))
-    MESSAGE(FATAL_ERROR "Cannot use RT and Nil kernel at the same time")
-  ENDIF()
-  IF(NOT (${ChibiOS_FIND_COMPONENTS_nil} LESS 0))
-    SET(CHIBIOS_KERNEL nil)
-  ELSE()
-    SET(CHIBIOS_KERNEL rt)
-  ENDIF()
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_hal} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS hal)
-ENDIF()
-
-IF(${ChibiOS_FIND_COMPONENTS_st} LESS 0)
-  LIST(APPEND ChibiOS_FIND_COMPONENTS st)
-ENDIF()
-  
-INCLUDE(ChibiOS/ChibiOS3_LD)
-INCLUDE(ChibiOS/ChibiOS3_HAL)
-
-IF(${CHIBIOS_KERNEL} STREQUAL rt)
-  INCLUDE(ChibiOS/ChibiOS3_RT)
-ELSE()
-  INCLUDE(ChibiOS/ChibiOS3_NIL)
-ENDIF()
-
-INCLUDE(ChibiOS/ChibiOS3_Various)
-
-SET(CHIBIOS_COMPONENTS nil rt hal ${CHIBIOS_HAL_MODULES} ${CHIBIOS_HAL_LIB_MODULES} ${CHIBIOS_VARIOUS_MODULES})
-
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    MESSAGE(STATUS "ChibiOS doesn't have linker script for your chip, please specify it directly using ChibiOS_LINKER_SCRIPT variable.")
-ENDIF()
-
-FOREACH(comp ${ChibiOS_FIND_COMPONENTS}) 
-    LIST(FIND CHIBIOS_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown ChibiOS component: ${comp}\nSupported ChibiOS components: ${CHIBIOS_COMPONENTS}")
-    ENDIF()
-    FOREACH(source ${CHIBIOS_${comp}_SOURCES})
-        FIND_FILE(CHIBIOS_${comp}_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-        LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_${source}})
-    ENDFOREACH()
-    IF(CHIBIOS_${comp}_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS)
-        FOREACH(header ${CHIBIOS_${comp}_PLATFORM_SEARCH_HEADERS})
-            FIND_PATH(CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR NAMES ${header} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_INCLUDE_DIRS ${CHIBIOS_${comp}_PLATFORM_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-    IF(CHIBIOS_${comp}_PLATFORM_SOURCES)
-        FOREACH(source ${CHIBIOS_${comp}_PLATFORM_SOURCES})
-            FIND_FILE(CHIBIOS_${comp}_PLATFORM_${source} NAMES ${source} PATHS ${CHIBIOS_${comp}_PLATFORM_SEARCH_PATH} NO_DEFAULT_PATH CMAKE_FIND_ROOT_PATH_BOTH)
-            LIST(APPEND ChibiOS_SOURCES ${CHIBIOS_${comp}_PLATFORM_${source}})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()

cmake/ChibiOS/ChibiOS3_HAL.cmake

@@ -1,192 +0,0 @@
-SET(CHIBIOS_HAL_LIB_MODULES chprintf memstreams nullstreams)
-SET(CHIBIOS_HAL_MODULES adc can dac ext gpt i2c i2s icu mac mmc_spi mmcsd pal pwm rtc sdc serial serial_usb spi st uart usb)
-
-IF(${CHIBIOS_KERNEL} STREQUAL nil)
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/nil)
-ELSE()
-  SET(CHIBIOS_OSAL_PATH ${CHIBIOS_ROOT}/os/hal/osal/rt)
-ENDIF()
-
-SET(CHIBIOS_hal_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src/ ${CHIBIOS_OSAL_PATH})
-SET(CHIBIOS_hal_SEARCH_HEADERS hal.h osal.h)
-SET(CHIBIOS_hal_SOURCES hal.c hal_queues.c osal.c)
-
-FOREACH(module ${CHIBIOS_HAL_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/include ${CHIBIOS_ROOT}/os/hal/src)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-  
-  IF(${module} STREQUAL mmcsd)
-    SET(CHIBIOS_${module}_SOURCES hal_mmcsd.c)
-  ENDIF()
-ENDFOREACH()
-
-FOREACH(module ${CHIBIOS_HAL_LIB_MODULES})
-  SET(CHIBIOS_${module}_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/lib/streams)
-  SET(CHIBIOS_${module}_SOURCES ${module}.c)
-  SET(CHIBIOS_${module}_SEARCH_HEADERS ${module}.h)
-ENDFOREACH()
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES
-            STM32F0xx
-            LLD
-            LLD
-            LLD/TIMv1
-            LLD/I2Cv2
-            LLD/SPIv1
-            LLD/TIMv1
-            LLD
-            LLD/GPIOv2
-            LLD/TIMv1
-            LLD/RTCv2
-            LLD
-            LLD/USARTv2
-            LLD/SPIv2
-            LLD/TIMv1
-            LLD/USARTv2
-            LLD/USBv1
-            )
-
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-            ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx
-            ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD
-            )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-            hal_lld.h
-            stm32_dma.h
-            nvic.h
-            )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES
-            hal_lld.c
-            stm32_dma.c
-            nvic.c
-            )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F0xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES 
-      STM32F1xx 
-      LLD
-      LLD
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD
-      LLD/GPIOv1
-      LLD/TIMv1
-      LLD/RTCv1
-      LLD
-      LLD/USARTv1 
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/USBv1
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F1xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(CHIBIOS_HAL_PLATFORM_MODULES adc can dac ext gpt i2c i2s icu mac pal pwm rtc sdc serial spi st uart usb)
-    SET(CHIBIOS_HAL_PLATFORM_MODULES_PATHES 
-      STM32F4xx 
-      LLD
-      LLD/DACv1
-      LLD
-      LLD/TIMv1
-      LLD/I2Cv1
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD
-      LLD/GPIOv2
-      LLD/TIMv1
-      LLD/RTCv2
-      LLD
-      LLD/USARTv1 
-      LLD/SPIv1
-      LLD/TIMv1
-      LLD/USARTv1
-      LLD/OTGv1
-    )
-    
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_PATH
-        ${CHIBIOS_ROOT}/os/hal/ports/common/ARMCMx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32
-        ${CHIBIOS_ROOT}/os/hal/ports/STM32/LLD/DMAv2
-    )
-    SET(CHIBIOS_hal_PLATFORM_SEARCH_HEADERS
-        hal_lld.h
-        stm32_dma.h
-        nvic.h
-    )
-    SET(CHIBIOS_hal_PLATFORM_SOURCES  
-        hal_lld.c
-        stm32_dma.c
-        nvic.c
-    )
-    SET(INDEX 0)
-    FOREACH(module ${CHIBIOS_HAL_PLATFORM_MODULES})
-        LIST(GET CHIBIOS_HAL_PLATFORM_MODULES_PATHES ${INDEX} path)
-
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ROOT}/os/hal/ports/STM32/${path})
-        SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${module}_lld.h)
-        SET(CHIBIOS_${module}_PLATFORM_SOURCES ${module}_lld.c)
-
-        IF(${module} STREQUAL ext)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_PATH ${CHIBIOS_ext_PLATFORM_SEARCH_PATH} ${CHIBIOS_ROOT}/os/hal/ports/STM32/STM32F4xx)
-            SET(CHIBIOS_${module}_PLATFORM_SEARCH_HEADERS ${CHIBIOS_ext_PLATFORM_SEARCH_HEADERS} ext_lld_isr.h)
-            SET(CHIBIOS_${module}_PLATFORM_SOURCES ${CHIBIOS_ext_PLATFORM_SOURCES} ext_lld_isr.c)
-        ENDIF()
-
-        MATH(EXPR INDEX "${INDEX} + 1")
-    ENDFOREACH()
-ENDIF()
-

cmake/ChibiOS/ChibiOS3_LD.cmake

@@ -1,38 +0,0 @@
- IF(NOT CHIBIOS_PROCESS_STACK_SIZE)
-  SET(CHIBIOS_PROCESS_STACK_SIZE 0x400)
-  MESSAGE(STATUS "No CHIBIOS_PROCESS_STACK_SIZE specified, using default: ${CHIBIOS_PROCESS_STACK_SIZE}")
-ENDIF()
-
-IF(NOT CHIBIOS_MAIN_STACK_SIZE)
-  SET(CHIBIOS_MAIN_STACK_SIZE 0x400)
-  MESSAGE(STATUS "No CHIBIOS_MAIN_STACK_SIZE specified, using default: ${CHIBIOS_MAIN_STACK_SIZE}")
-ENDIF()
-
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L\"${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC\"")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__process_stack_size__=${CHIBIOS_PROCESS_STACK_SIZE}")
-SET(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--defsym=__main_stack_size__=${CHIBIOS_MAIN_STACK_SIZE}")
-
-# Auto-generate linker script
-IF(NOT ChibiOS_LINKER_SCRIPT)
-    FILE(WRITE ${CMAKE_BINARY_DIR}/chibios_link.ld.in 
-      "MEMORY\n"
-      "{\n"
-      "  flash : org = 0x08000000, len = \${STM32_FLASH_SIZE}\n"
-      "  ram0 : org = 0x20000000, len = \${STM32_RAM_SIZE}\n"
-      "  ram1 : org = 0x00000000, len = 0\n"
-      "  ram2 : org = 0x00000000, len = 0\n"
-      "  ram3 : org = 0x00000000, len = 0\n"
-      "  ram4 : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
-      "  ram5 : org = 0x00000000, len = 0\n"
-      "  ram6 : org = 0x00000000, len = 0\n"
-      "  ram7 : org = 0x00000000, len = 0\n"
-      "}\n"
-      "REGION_ALIAS(\"MAIN_STACK_RAM\", ram0);\n"
-      "REGION_ALIAS(\"PROCESS_STACK_RAM\", ram0);\n"
-      "REGION_ALIAS(\"DATA_RAM\", ram0);\n"
-      "REGION_ALIAS(\"BSS_RAM\", ram0);\n"
-      "REGION_ALIAS(\"HEAP_RAM\", ram0);\n"
-      "INCLUDE rules.ld\n"      
-    )
-    SET(ChibiOS_LINKER_SCRIPT ${CMAKE_BINARY_DIR}/chibios_link.ld.in)
-ENDIF()     

cmake/ChibiOS/ChibiOS3_NIL.cmake

@@ -1,57 +0,0 @@
-SET(CHIBIOS_nil_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/nil/src
-  ${CHIBIOS_ROOT}/os/nil/include
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/nil/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/nil/src
-)
-SET(CHIBIOS_nil_SEARCH_HEADERS
-  nil.h
-  nilcore.h
-  niltypes.h
-)
-SET(CHIBIOS_nil_SOURCES  
-  crt1.c
-  vectors.c
-  nilcore.c
-  nil.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v6m.s nilcore_v6m.c nilcoreasm_v6m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm0.h
-    stm32f0xx.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f10x.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_nil_SOURCES  ${CHIBIOS_nil_SOURCES} crt0_v7m.s nilcore_v7m.c nilcoreasm_v7m.s)
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_nil_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ENDIF()

cmake/ChibiOS/ChibiOS3_RT.cmake

@@ -1,76 +0,0 @@
-SET(CHIBIOS_rt_SEARCH_PATH 
-  ${CHIBIOS_ROOT}/os/rt/src
-  ${CHIBIOS_ROOT}/os/rt/include
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx
-  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
-  ${CHIBIOS_ROOT}/os/rt/src
-)
-  
-SET(CHIBIOS_rt_SEARCH_HEADERS
-  ch.h
-  chcore.h
-  chtypes.h
-)
-SET(CHIBIOS_rt_SOURCES  
-  crt1.c
-  vectors.c
-  chcore.c
-  chsys.c
-  chdebug.c
-  chvt.c
-  chschd.c
-  chthreads.c
-  chtm.c
-  chstats.c
-  chdynamic.c
-  chregistry.c
-  chsem.c
-  chmtx.c
-  chcond.c
-  chevents.c
-  chmsg.c
-  chmboxes.c
-  chqueues.c
-  chmemcore.c
-  chheap.c
-  chmempools.c
-)
-
-IF(STM32_FAMILY STREQUAL "F0")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v6m.s chcore_v6m.c chcoreasm_v6m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-          ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F0xx
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-          ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-          )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-          core_cm0.h
-          stm32f0xx.h
-          cmparams.h
-          )
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm3.h
-    stm32f10x.h
-    cmparams.h
-  )
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-  SET(CHIBIOS_rt_SOURCES  ${CHIBIOS_rt_SOURCES} crt0_v7m.s chcore_v7m.c chcoreasm_v7m.s)
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
-    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
-    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
-  )
-  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
-    core_cm4.h
-    stm32f4xx.h
-    cmparams.h
-  )
-ENDIF()

cmake/ChibiOS/ChibiOS3_Various.cmake

@@ -1,12 +0,0 @@
-SET(CHIBIOS_VARIOUS_MODULES evtimer shell syscalls) 
-
-SET(CHIBIOS_evtimer_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_evtimer_SOURCES evtimer.c)
-SET(CHIBIOS_evtimer_SEARCH_HEADERS evtimer.h)
-
-SET(CHIBIOS_shell_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_shell_SOURCES shell.c)
-SET(CHIBIOS_shell_SEARCH_HEADERS shell.h)
-
-SET(CHIBIOS_syscalls_SEARCH_PATH ${CHIBIOS_ROOT}/os/various)
-SET(CHIBIOS_syscalls_SOURCES syscalls.c)

cmake/FindBSP.cmake

@@ -0,0 +1,340 @@
+set(BSP_F0_BOARDS 
+    STM32F0xx_Nucleo_32 STM32F0xx-Nucleo STM32F072B-Discovery 
+    STM32F0308-Discovery STM32072B_EVAL STM32091C_EVAL
+)
+set(BSP_F0_COMPONENTS
+    hx8347d l3gd20 spfd5408 st7735 stlm75
+)
+set(BSP_F0_SOURCES_STM32F072B_Discovery eeprom gyroscope)
+set(BSP_F0_SOURCES_STM32072B_EVAL eeprom lcd sd tsensor)
+set(BSP_F0_SOURCES_STM32091C_EVAL eeprom lcd sd tsensor)
+set(BSP_F0_DEVICE_STM32F072B_Discovery F072RB)
+set(BSP_F0_DEVICE_STM32F0308_Discovery F030R8)
+set(BSP_F0_DEVICE_STM32072B_EVAL F072VB)
+set(BSP_F0_DEVICE_STM32091C_EVAL F091VC)
+
+set(BSP_F1_BOARDS 
+    STM32F1xx_Nucleo STM32VL-Discovery STM3210C_EVAL STM3210E_EVAL
+)
+set(BSP_F1_COMPONENTS
+    ak4343 cs43l22 hx8347d ili9320 ili9325 lis302dl spfd5408 st7735 stlm75
+    stmpe811
+)
+set(BSP_F1_SOURCES_STM3210C_EVAL accelerometer audio eeprom io lcd sd ts)
+set(BSP_F1_SOURCES_STM3210E_EVAL audio lcd nand nor sd serialflash sram tsensor)
+set(BSP_F1_DEVICE_STM32VL_Discovery F100RB)
+set(BSP_F1_DEVICE_STM3210C_EVAL F107VC)
+set(BSP_F1_DEVICE_STM3210E_EVAL F103ZE)
+
+set(BSP_F2_BOARDS 
+    STM32F2xx_Nucleo_144 STM322xG_EVAL
+)
+set(BSP_F2_COMPONENTS
+    cs43l22 ili9320 ili9325 ili9341 ov2640 st7735 stmpe811
+)
+set(BSP_F2_SOURCES_STM322xG_EVAL audio camera eeprom io lcd sd sram ts)
+set(BSP_F2_DEVICE_STM322xG_EVAL F207IG)
+
+set(BSP_F3_BOARDS 
+    STM32F3-Discovery STM32F3xx_Nucleo_32 STM32F3xx_Nucleo_144 STM32F3xx-Nucleo
+    STM32F3348-Discovery STM32303C_EVAL STM32303E_EVAL STM32373C_EVAL
+)
+set(BSP_F3_COMPONENTS
+    cs42l52 cs43l22 hx8347d hx8347g hx8347i ili9320 ili9325 ili9328 l3gd20
+    lsm303dlhc spfd5408 st7735 stts751
+)
+set(BSP_F3_SOURCES_STM32F3_Discovery accelerometer gyroscope)
+set(BSP_F3_SOURCES_STM32303C_EVAL audio eeprom lcd sd tsensor)
+set(BSP_F3_SOURCES_STM32303E_EVAL audio eeprom lcd sd tsensor)
+set(BSP_F3_SOURCES_STM32373C_EVAL audio eeprom lcd sd tsensor)
+set(BSP_F3_DEVICE_STM32F3_Discovery F303VC)
+set(BSP_F3_DEVICE_STM32F3348_Discovery F334C8)
+set(BSP_F3_DEVICE_STM32303C_EVAL F303VC)
+set(BSP_F3_DEVICE_STM32303E_EVAL F303VE)
+set(BSP_F3_DEVICE_STM32373C_EVAL F373VC)
+
+set(BSP_F4_BOARDS 
+    STM32F4-Discovery STM32F4xx_Nucleo_144 STM32F4xx-Nucleo STM32F401-Discovery
+    STM32F411E-Discovery STM32F413H-Discovery STM32F429I-Discovery 
+    STM324x9I_EVAL STM324xG_EVAL STM32412G-Discovery STM32446E_EVAL 
+    STM32469I_EVAL STM32469I-Discovery
+)
+set(BSP_F4_COMPONENTS
+    ampire480272 ampire640480 cs43l22 exc7200 ft6x06 ili9325 ili9341 l3gd20
+    lis3dsh lis302dl ls016b8uy lsm303dlhc mfxstm32l152 n25q128a n25q256a 
+    n25q512a otm8009a ov2640 s5k5cag s25fl512s st7735 st7789h2 stmpe811 
+    stmpe1600 ts3510 wm8994
+)
+set(BSP_F4_SOURCES_STM32F4_Discovery accelerometer audio)
+set(BSP_F4_SOURCES_STM32F401_Discovery accelerometer audio gyroscope)
+set(BSP_F4_SOURCES_STM32F411E_Discovery accelerometer audio gyroscope)
+set(BSP_F4_SOURCES_STM32F413H_Discovery audio lcd psram qspi sd ts)
+set(BSP_F4_SOURCES_STM32F429I_Discovery eeprom gyroscope io lcd sdram ts)
+set(BSP_F4_SOURCES_STM324x9I_EVAL audio camera eeprom io lcd nor sd sdram sram ts)
+set(BSP_F4_SOURCES_STM324xG_EVAL audio camera eeprom io lcd sd sram ts)
+set(BSP_F4_SOURCES_STM32412G_Discovery audio eeprom lcd qspi sd ts)
+set(BSP_F4_SOURCES_STM3232446E_EVAL audio camera eeprom io lcd qspi sd sdram ts)
+set(BSP_F4_SOURCES_STM32469I_EVAL audio camera eeprom io lcd nor qspi sd sdram sram ts)
+set(BSP_F4_SOURCES_STM32469I_Discovery audio eeprom lcd qspi sd sdram ts)
+set(BSP_F4_DEVICE_STM32F4_Discovery F407VG)
+set(BSP_F4_DEVICE_STM32F401_Discovery F401VC)
+set(BSP_F4_DEVICE_STM32F411E_Discovery F411VE)
+set(BSP_F4_DEVICE_STM32F413H_Discovery F413ZH)
+set(BSP_F4_DEVICE_STM32F429I_Discovery F429ZI)
+set(BSP_F4_DEVICE_STM324x9I_EVAL F429NI)
+set(BSP_F4_DEVICE_STM324xG_EVAL F407IG)
+set(BSP_F4_DEVICE_STM32412G_Discovery F412ZG)
+set(BSP_F4_DEVICE_STM32446E_EVAL F446ZE)
+set(BSP_F4_DEVICE_STM32469I_EVAL F469NI)
+set(BSP_F4_DEVICE_STM32469I_Discovery F469NI)
+
+set(BSP_F7_BOARDS 
+    STM32F7xx_Nucleo_144 STM32F723E-Discovery STM32F769I_EVAL 
+    STM32F769I-Discovery STM32F7308-Discovery STM32F7508-Discovery
+    STM32746G-Discovery STM32756G_EVAL
+)
+set(BSP_F7_COMPONENTS
+    adv7533 ampire480272 ampire640480 exc7200 ft6x06 ft5336 mfxstm32l152 
+    mx25l512 n25q128a n25q512a otm8009a ov5640 ov9655 rk043fn48h s5k5cag st7735
+    st7789h2 stmpe811 ts3510 wm8994
+)
+set(BSP_F7_SOURCES_STM32F723E_Discovery audio lcd psram qspi ts)
+set(BSP_F7_SOURCES_STM32F769I_EVAL audio camera eeprom io lcd nor qspi sd sdram sram ts)
+set(BSP_F7_SOURCES_STM32F769I_Discovery audio eeprom lcd qspi sd sdram ts)
+set(BSP_F7_SOURCES_STM32F7308_Discovery audio lcd psram qspi ts)
+set(BSP_F7_SOURCES_STM32F7508_Discovery audio camera eeprom lcd qspi sd sdram ts)
+set(BSP_F7_SOURCES_STM32746G_Discovery audio camera eeprom lcd qspi sd sdram ts)
+set(BSP_F7_SOURCES_STM32756G_EVAL audio camera eeprom io lcd nor qspi sd sdram sram ts)
+set(BSP_F7_DEVICE_STM32F723E_Discovery F723IE)
+set(BSP_F7_DEVICE_STM32F769I_EVAL F769NI)
+set(BSP_F7_DEVICE_STM32F769I_Discovery F769NI)
+set(BSP_F7_DEVICE_STM32F7308_Discovery F730I8)
+set(BSP_F7_DEVICE_STM32F7508_Discovery F750N8)
+set(BSP_F7_DEVICE_STM32746G_Discovery F746NG)
+set(BSP_F7_DEVICE_STM32756G_EVAL F756NG)
+
+set(BSP_G0_BOARDS
+    STM32G0xx_Nucleo STM32G0xx_Nucleo_32 STM32G071B-Discovery STM32G081B_EVAL 
+    STM32G0316-Discovery
+)
+set(BSP_G0_COMPONENTS 
+    hx8347d ina230 sn65dp141 ssd1315 st7735 stlm75 tusb546
+)
+set(BSP_G0_DIR_STM32G0316_Discovery STM32G0316-DISCO)
+set(BSP_G0_SOURCES_STM32G071B_Discovery lcd pwr pwrmon)
+set(BSP_G0_SOURCES_STM32G081B_EVAL lcd mux pwr sd tsensor)
+set(BSP_G0_DEVICE_STM32G071B_Discovery G071RB)
+set(BSP_G0_DEVICE_STM32G081B_EVAL G081RB)
+set(BSP_G0_DEVICE_STM32G0316_Discovery G031J6)
+
+set(BSP_G4_BOARDS
+    B-G474E-DPOW1 STM32G4xx_Nucleo STM32G474E-EVAL
+)
+set(BSP_G4_COMPONENTS 
+    hx8347d mfxstm32l152 mt25ql512abb st7735 stts751 wm8994
+)
+set(BSP_G4_SOURCES_B-G474E-DPOW1 usbpd_pwr)
+set(BSP_G4_SOURCES_STM32G481B_EVAL audio bus env_sensor idd io lcd qspi sd smartcard sram usbpd_pwr)
+set(BSP_G4_DEVICE_B_G474E_DPOW1 G474RE)
+set(BSP_G4_DEVICE_STM32G474E_EVAL G474QE)
+
+set(BSP_H7_BOARDS
+    STM32H7B3I-Discovery STM32H7B3I-EVAL STM32H7xx_Nucleo STM32H743I-EVAL
+    STM32H745I-Discovery STM32H747I-Discovery STM32H747I-EVAL 
+    STM32H750B-Discovery
+)
+set(BSP_H7_COMPONENTS 
+    adv7533 ampire480272 ampire640480 cs42l51 es_wifi exc7200 ft6x06 ft5336 
+    is42s16800j is42s32800g is42s32800j lan8742 m24lr64 mfxstm32l152 
+    mt25tl01g mt48lc4m32b2 mx25lm51245g otm8009a ov5640 ov9655 rk043fn48h 
+    rk070er9427 s5k5cag st7735 stmpe811 ts3510 wm8994
+)
+set(BSP_H7_DIR_STM32H7B3I_Discovery STM32H7B3I-DK)
+set(BSP_H7_DIR_STM32H745I_Discovery STM32H745I-DISCO)
+set(BSP_H7_DIR_STM32H747I_Discovery STM32H747I-DISCO)
+set(BSP_H7_DIR_STM32H750B_Discovery STM32H750B-DK)
+set(BSP_H7_SOURCES_STM32H7B3I_Discovery audio bus camera eeprom lcd ospi sd sdram ts)
+set(BSP_H7_SOURCES_STM32H7B3I_EVAL audio bus camera eeprom io lcd nor ospi sd sdram sram ts)
+set(BSP_H7_SOURCES_STM32H743I_EVAL audio bus eeprom io lcd nor qspi sd sdram sram ts)
+set(BSP_H7_SOURCES_STM32H745I_Discovery audio bus lcd mmc qspi sdram ts)
+set(BSP_H7_SOURCES_STM32H747I_Discovery audio bus camera lcd qspi sd sdram ts)
+set(BSP_H7_SOURCES_STM32H747I_EVAL audio bus eeprom io lcd nor qspi sd sdram sram ts)
+set(BSP_H7_SOURCES_STM32H750B_Discovery audio bus lcd mmc qspi sdram ts)
+set(BSP_H7_DEVICE_STM32H7B3I_Discovery H7B3LI)
+set(BSP_H7_DEVICE_STM32H7B3I_EVAL H7B3LI)
+set(BSP_H7_DEVICE_STM32H743I_EVAL H743XI)
+set(BSP_H7_DEVICE_STM32H745I_Discovery H745XI)
+set(BSP_H7_DEVICE_STM32H747I_Discovery H747XI)
+set(BSP_H7_DEVICE_STM32H747I_EVAL H743XI)
+set(BSP_H7_DEVICE_STM32H750B_Discovery H750XB)
+
+set(BSP_L0_BOARDS
+    STM32L0xx_Nucleo STM32L0xx_Nucleo_32 STM32L073Z_EVAL STM32L0538-Discovery
+)
+set(BSP_L0_COMPONENTS 
+    gde021a1 hx8347d mfxstm32l152 st7735 stlm75
+)
+set(BSP_L0_SOURCES_STM32L073Z_EVAL eeprom glass_lcd idd io lcd sd tsensor)
+set(BSP_L0_SOURCES_STM32L0538_Discovery epd)
+set(BSP_L0_DEVICE_STM32L073Z_EVAL L073VZ)
+set(BSP_L0_DEVICE_STM32L0538_Discovery L053C8)
+
+set(BSP_L1_BOARDS
+    STM32L1xx_Nucleo STM32L100C-Discovery STM32L152C-Discovery STM32L152D_EVAL
+)
+set(BSP_L1_COMPONENTS 
+    cs43l22 hx8347d ili9320 ili9325 spfd5408 st7735 stlm75
+)
+set(BSP_L1_SOURCES_STM32L152C_Discovery glass_lcd)
+set(BSP_L1_SOURCES_STM32L152D_EVAL audio eeprom audio glass_lcd lcd nor sd sram tsensor)
+set(BSP_L1_DEVICE_STM32L100C_Discovery L100RC)
+set(BSP_L1_DEVICE_STM32L152C_Discovery L152RC)
+set(BSP_L1_DEVICE_STM32L152D_EVAL L152ZD)
+
+set(BSP_L4_BOARDS 
+    STM32L475E-IOT01 STM32L4P5G-Discovery STM32L4R9I_EVAL STM32L4R9I-Discovery 
+    STM32L4xx_Nucleo STM32L4xx_Nucleo_32 STM32L4xx_Nucleo_144 STM32L476G_EVAL 
+    STM32L476G-Discovery STM32L496G-Discovery
+)
+set(BSP_L4_COMPONENTS
+    cs42l51 cs43l22 cy8c4014lqi ft3x67 ft6x06 ft5336 hts221 hx8347g hx8347i 
+    iss66wvh8m8 l3gd20 lis3mdl lps22hb ls016b8uy lsm6dsl lsm303c lsm303dlhc 
+    m24sr mfxstm32l152 mx25lm51245g mx25r6435f n25q128a n25q256a ov9655 
+    rk043fn48h st7735 st7789h2 stmpe811 stmpe1600 wm8994
+)
+set(BSP_L4_SOURCES_B_L475E_IOT01 accelerometer gyro hsensor magneto psensor qspi tsensor iot01)
+set(BSP_L4_SOURCES_STM32L4P5G_Discovery idd io lcd mmc ospi_nor psram ts)
+set(BSP_L4_SOURCES_STM32L4R9I_EVAL audio dsi_lcd dsi_ts eeprom idd io nor ospi_nor ospi_ram rgb_ts sd sram)
+set(BSP_L4_SOURCES_STM32L4R9I_Discovery audio camera idd io lcd ospi_nor psram sd ts)
+set(BSP_L4_SOURCES_STM32L476G_EVAL audio eeprom glass_lcd idd io lcd nor qspi sd sram ts)
+set(BSP_L4_SOURCES_STM32L476G_Discovery audio compass glass_lcd gyroscope qspi)
+set(BSP_L4_SOURCES_STM32L496G_Discovery audio camera idd io lcd qspi sd sram ts)
+set(BSP_L4_DIR_STM32L475E_IOT01 B-L475E-IOT01)
+set(BSP_L4_DEVICE_STM32L475E_IOT01 L475VG)
+set(BSP_L4_DEVICE_STM32L4P5G_Discovery L4P5AG)
+set(BSP_L4_DEVICE_STM32L4R9I_EVAL L4R9AI)
+set(BSP_L4_DEVICE_STM32L4R9I_Discovery L4R9AI)
+set(BSP_L4_DEVICE_STM32L476G_EVAL L476ZG)
+set(BSP_L4_DEVICE_STM32L476G_Discovery L476VG)
+set(BSP_L4_DEVICE_STM32L496G_Discovery L496AG)
+
+if(NOT BSP_FIND_COMPONENTS)
+    set(BSP_FIND_COMPONENTS 
+        STM32F0 STM32F1 STM32F2 STM32F3 STM32F4 STM32F7
+        STM32G0 STM32G4 
+        STM32H7_M7 STM32H7_M4
+        STM32L0 STM32L1 STM32L4 
+    )
+endif()
+
+if(STM32H7 IN_LIST BSP_FIND_COMPONENTS)
+    list(REMOVE_ITEM BSP_FIND_COMPONENTS STM32H7)
+    list(APPEND BSP_FIND_COMPONENTS STM32H7_M7 STM32H7_M4)
+endif()
+list(REMOVE_DUPLICATES BSP_FIND_COMPONENTS)
+
+foreach(COMP ${BSP_FIND_COMPONENTS})
+    string(TOLOWER ${COMP} COMP_L)
+    string(TOUPPER ${COMP} COMP_U)
+    
+    string(REGEX MATCH "^STM32([A-Z][0-9])([0-9A-Z][0-9][A-Z][0-9A-Z])?_?(M[47])?.*$" COMP_U ${COMP_U})
+    if(NOT CMAKE_MATCH_1)
+        message(FATAL_ERROR "Unknown BSP component: ${COMP}")
+    endif()
+    
+    if(CMAKE_MATCH_3)
+        set(CORE ${CMAKE_MATCH_3})
+        set(CORE_C "::${CORE}")
+        set(CORE_U "_${CORE}")
+    else()
+        unset(CORE)
+        unset(CORE_C)
+        unset(CORE_U)
+    endif()
+
+    set(FAMILY ${CMAKE_MATCH_1})
+    string(TOLOWER ${FAMILY} FAMILY_L)
+    
+    if(NOT STM32_CUBE_${FAMILY}_PATH)
+        set(STM32_CUBE_${FAMILY}_PATH /opt/STM32Cube${FAMILY} CACHE PATH "Path to STM32Cube${FAMILY}")
+        message(STATUS "No STM32_CUBE_${FAMILY}_PATH specified using default: ${STM32_CUBE_${FAMILY}_PATH}")
+    endif()
+        
+    find_path(BSP_${FAMILY}_PATH
+        NAMES Components/Common/io.h
+        PATHS "${STM32_CUBE_${FAMILY}_PATH}/Drivers/BSP"
+        NO_DEFAULT_PATH
+    )
+    if (NOT BSP_${FAMILY}_PATH)
+        continue()
+    endif()
+    
+    set(BSP_${FAMILY}_INCLUDE "${BSP_${FAMILY}_PATH}/Components/Common")
+    
+    add_library(BSP::STM32::${FAMILY}${CORE_C} INTERFACE IMPORTED)
+    target_link_libraries(BSP::STM32::${FAMILY}${CORE_C} INTERFACE STM32::${FAMILY}${CORE_C})
+    target_include_directories(BSP::STM32::${FAMILY}${CORE_C} INTERFACE "${BSP_${FAMILY}_PATH}/Components/Common")
+        
+    foreach(BOARD ${BSP_${FAMILY}_BOARDS})
+        string(REPLACE "-" "_" BOARD_CANONICAL ${BOARD})
+        string(TOLOWER ${BOARD_CANONICAL} BOARD_CANONICAL_L)
+        set(BOARD_DEVICE ${BSP_${FAMILY}_DEVICE_${BOARD_CANONICAL}})
+        
+        stm32_get_cores(DEV_CORES FAMILY ${FAMILY} DEVICE ${BOARD_DEVICE})
+        if(CORE AND (NOT ${CORE} IN_LIST DEV_CORES))
+            continue()
+        endif()
+
+        find_path(BSP_${BOARD_CANONICAL}_PATH
+            NAMES ${BOARD_CANONICAL_L}.h
+            PATHS "${BSP_${FAMILY}_PATH}/${BOARD}" "${BSP_${FAMILY}_PATH}/${BSP_${FAMILY}_DIR_${BOARD_CANONICAL}}"
+            NO_DEFAULT_PATH
+        )
+        if (NOT BSP_${BOARD_CANONICAL}_PATH)
+            continue()
+        endif()
+        
+        add_library(BSP::STM32::${BOARD_CANONICAL}${CORE_C} INTERFACE IMPORTED)
+        target_link_libraries(BSP::STM32::${BOARD_CANONICAL}${CORE_C} INTERFACE BSP::STM32::${FAMILY}${CORE_C} CMSIS::STM32::${FAMILY}${CORE_C})
+        target_include_directories(BSP::STM32::${BOARD_CANONICAL}${CORE_C} INTERFACE "${BSP_${BOARD_CANONICAL}_PATH}")
+        target_sources(BSP::STM32::${BOARD_CANONICAL}${CORE_C} INTERFACE "${BSP_${BOARD_CANONICAL}_PATH}/${BOARD_CANONICAL_L}.c")
+        
+        foreach(SRC ${BSP_${FAMILY}_SOURCES_${BOARD_CANONICAL}})
+            target_sources(BSP::STM32::${BOARD_CANONICAL}${CORE_C} INTERFACE "${BSP_${BOARD_CANONICAL}_PATH}/${BOARD_CANONICAL_L}_${SRC}.c")
+        endforeach()
+        if(BSP_${FAMILY}_DEVICE_${BOARD_CANONICAL})
+            target_link_libraries(BSP::STM32::${BOARD_CANONICAL}${CORE_C} INTERFACE CMSIS::STM32::${BSP_${FAMILY}_DEVICE_${BOARD_CANONICAL}}${CORE_C})
+        endif()
+    endforeach()
+    
+    foreach(BCOMP ${BSP_${FAMILY}_COMPONENTS}) 
+        string(TOLOWER ${BCOMP} BCOMP_L)
+        string(TOUPPER ${BCOMP} BCOMP_U)
+        
+        add_library(BSP::STM32::${FAMILY}${CORE_C}::${BCOMP_U} INTERFACE IMPORTED)
+        target_link_libraries(BSP::STM32::${FAMILY}${CORE_C}::${BCOMP_U} INTERFACE BSP::STM32::${FAMILY}${CORE_C} CMSIS::STM32::${FAMILY}${CORE_C})
+        target_include_directories(BSP::STM32::${FAMILY}${CORE_C}::${BCOMP_U} INTERFACE "${BSP_${FAMILY}_PATH}/Components/${BCOMP}")
+        
+        find_file(BSP_${BOARD_CANONICAL}_${COMP}_SOURCE
+            NAMES ${BCOMP}.c
+            PATHS "${BSP_${FAMILY}_PATH}/Components/${BCOMP}"
+            NO_DEFAULT_PATH
+        )
+        if (BSP_${BOARD_CANONICAL}_${COMP}_SOURCE)
+            target_sources(BSP::STM32::${FAMILY}${CORE_C}::${BCOMP_U} INTERFACE "${BSP_${BOARD_CANONICAL}_${COMP}_SOURCE}")
+        endif()
+    endforeach()
+    
+    set(BSP_${COMP}_FOUND TRUE)
+    
+    if(BSP_${COMP}_FOUND)
+         list(APPEND BSP_INCLUDE_DIRS "${BSP_${FAMILY}_INCLUDE}")
+    endif()
+endforeach()
+
+include(FindPackageHandleStandardArgs)
+find_package_handle_standard_args(BSP
+    REQUIRED_VARS BSP_INCLUDE_DIRS
+    FOUND_VAR BSP_FOUND
+    HANDLE_COMPONENTS
+)

cmake/FindCMSIS.cmake

@@ -1,196 +1,190 @@
-IF(STM32_CHIP_TYPE OR STM32_CHIP)
-    IF(NOT STM32_CHIP_TYPE)
-        STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        IF(NOT STM32_CHIP_TYPE)
-            MESSAGE(FATAL_ERROR "Unknown chip: ${STM32_CHIP}. Try to use STM32_CHIP_TYPE directly.")
-        ENDIF()
-        MESSAGE(STATUS "${STM32_CHIP} is ${STM32_CHIP_TYPE} device")
-    ENDIF()
-    STRING(TOLOWER ${STM32_CHIP_TYPE} STM32_CHIP_TYPE_LOWER)
-ENDIF()
-
-SET(CMSIS_COMMON_HEADERS
-    arm_common_tables.h
-    arm_const_structs.h
-    arm_math.h
-    core_cmFunc.h
-    core_cmInstr.h
-    core_cmSimd.h
-)
-
-IF(STM32_FAMILY STREQUAL "F1")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f1xx.h system_stm32f1xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f1xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F2_V1.1.1")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    STRING(REGEX REPLACE "^(2[01]7).[BCDEFG]" "\\1" STM32_DEVICE_NUM ${STM32_CHIP_TYPE})
-    SET(CMSIS_STARTUP_SOURCE startup_stm32f${STM32_DEVICE_NUM}xx.s)
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f2xx.h system_stm32f2xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f2xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F3_V1.6.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    STRING(REGEX REPLACE "^(3..).(.)" "\\1x\\2" STM32_STARTUP_NAME ${STM32_CODE})
-    STRING(TOLOWER ${STM32_STARTUP_NAME} STM32_STARTUP_NAME_LOWER)
-    SET(CMSIS_STARTUP_SOURCE startup_stm32f${STM32_STARTUP_NAME_LOWER}.s)
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f3xx.h system_stm32f3xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f3xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F4_V1.8.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f4xx.h system_stm32f4xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f4xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F7_V1.3.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm7.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f7xx.h system_stm32f7xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f7xx.c)
-ELSEIF(STM32_FAMILY STREQUAL "F0")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F0_V1.4.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
-    SET(CMSIS_DEVICE_HEADERS stm32f0xx.h system_stm32f0xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32f0xx.c)
-
-ELSEIF(STM32_FAMILY STREQUAL "G0")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_G0_V1.1.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm0plus.h)
-    SET(CMSIS_DEVICE_HEADERS stm32g0xx.h system_stm32g0xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32g0xx.c)
-
-    STRING(REGEX REPLACE "^(0[3478][01]).[BCDEFG468]" "\\1" STM32_DEVICE_NUM ${STM32_CHIP_TYPE})
-    SET(CMSIS_STARTUP_SOURCE startup_stm32g${STM32_DEVICE_NUM}xx.s)
-
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_H7_V1.3.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm7.h)
-    SET(CMSIS_DEVICE_HEADERS stm32h7xx.h system_stm32h7xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32h7xx.c)
-	IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32h${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()
-	message(STATUS "CMSIS_STARTUP_SOURCE @@@@@@ ${CMSIS_STARTUP_SOURCE}")
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_L0_V1.7.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm0.h)
-    SET(CMSIS_DEVICE_HEADERS stm32l0xx.h system_stm32l0xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32l0xx.c)
-    IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32l${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_L1_V1.8.0")
-        MESSAGE(WARNING "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
-    SET(CMSIS_DEVICE_HEADERS stm32l1xx.h system_stm32l1xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32l1xx.c)
-    IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32l${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()
-ELSEIF(STM32_FAMILY STREQUAL "L4")
-    IF(NOT STM32Cube_DIR)
-        SET(STM32Cube_DIR "/opt/STM32Cube_FW_L4_V1.9.0")
-        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-    ENDIF()
-
-    LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
-    SET(CMSIS_DEVICE_HEADERS stm32l4xx.h system_stm32l4xx.h)
-    SET(CMSIS_DEVICE_SOURCES system_stm32l4xx.c) 
-    IF(NOT CMSIS_STARTUP_SOURCE)
-        SET(CMSIS_STARTUP_SOURCE startup_stm32l${STM32_CHIP_TYPE_LOWER}.s)
-    ENDIF()   
-ENDIF()
-
-IF(NOT CMSIS_STARTUP_SOURCE)
-    SET(CMSIS_STARTUP_SOURCE startup_stm32f${STM32_CHIP_TYPE_LOWER}.s)
-ENDIF()
-
-FIND_PATH(CMSIS_COMMON_INCLUDE_DIR ${CMSIS_COMMON_HEADERS}
-    PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER} cmsis
-    HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Include/
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_PATH(CMSIS_DEVICE_INCLUDE_DIR ${CMSIS_DEVICE_HEADERS}
-    PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER} cmsis
-    HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Device/ST/STM32${STM32_FAMILY}xx/Include
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-SET(CMSIS_INCLUDE_DIRS
-    ${CMSIS_DEVICE_INCLUDE_DIR}
-    ${CMSIS_COMMON_INCLUDE_DIR}
-)
-
-FOREACH(SRC ${CMSIS_DEVICE_SOURCES})
-    STRING(MAKE_C_IDENTIFIER "${SRC}" SRC_CLEAN)
-    SET(CMSIS_${SRC_CLEAN}_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(CMSIS_${SRC_CLEAN}_FILE ${SRC}
-        PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER} cmsis
-        HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Device/ST/STM32${STM32_FAMILY}xx/Source/Templates/
-        CMAKE_FIND_ROOT_PATH_BOTH
+if(NOT CMSIS_FIND_COMPONENTS)
+    set(CMSIS_FIND_COMPONENTS
+        STM32F0 STM32F1 STM32F2 STM32F3 STM32F4 STM32F7
+        STM32G0 STM32G4
+        STM32H7_M7 STM32H7_M4
+        STM32L0 STM32L1 STM32L4
     )
-    LIST(APPEND CMSIS_SOURCES ${CMSIS_${SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-IF(STM32_CHIP_TYPE)
-    SET(CMSIS_STARTUP_SOURCE_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(CMSIS_STARTUP_SOURCE_FILE ${CMSIS_STARTUP_SOURCE}
-        PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER} cmsis
-        HINTS ${STM32Cube_DIR}/Drivers/CMSIS/Device/ST/STM32${STM32_FAMILY}xx/Source/Templates/gcc/
-        CMAKE_FIND_ROOT_PATH_BOTH
+endif()
+
+if(STM32H7 IN_LIST CMSIS_FIND_COMPONENTS)
+    list(REMOVE_ITEM CMSIS_FIND_COMPONENTS STM32H7)
+    list(APPEND CMSIS_FIND_COMPONENTS STM32H7_M7 STM32H7_M4)
+endif()
+list(REMOVE_DUPLICATES CMSIS_FIND_COMPONENTS)
+
+include(stm32/devices)
+
+function(cmsis_generate_default_linker_script FAMILY DEVICE CORE)
+    if(CORE)
+        set(CORE_C "::${CORE}")
+        set(CORE_U "_${CORE}")
+    endif()
+    
+    set(OUTPUT_LD_FILE "${CMAKE_CURRENT_BINARY_DIR}/${DEVICE}${CORE_U}.ld")
+    
+    stm32_get_memory_info(FAMILY ${FAMILY} DEVICE ${DEVICE} CORE ${CORE} FLASH SIZE FLASH_SIZE ORIGIN FLASH_ORIGIN)
+    stm32_get_memory_info(FAMILY ${FAMILY} DEVICE ${DEVICE} CORE ${CORE} RAM SIZE RAM_SIZE ORIGIN RAM_ORIGIN)
+    stm32_get_memory_info(FAMILY ${FAMILY} DEVICE ${DEVICE} CORE ${CORE} CCRAM SIZE CCRAM_SIZE ORIGIN CCRAM_ORIGIN)
+    stm32_get_memory_info(FAMILY ${FAMILY} DEVICE ${DEVICE} CORE ${CORE} HEAP SIZE HEAP_SIZE)
+    stm32_get_memory_info(FAMILY ${FAMILY} DEVICE ${DEVICE} CORE ${CORE} STACK SIZE STACK_SIZE)
+    
+    add_custom_command(OUTPUT "${OUTPUT_LD_FILE}"
+        COMMAND ${CMAKE_COMMAND} 
+            -DFLASH_ORIGIN="${FLASH_ORIGIN}" 
+            -DRAM_ORIGIN="${RAM_ORIGIN}" 
+            -DCCRAM_ORIGIN="${CCRAM_ORIGIN}" 
+            -DFLASH_SIZE="${FLASH_SIZE}" 
+            -DRAM_SIZE="${RAM_SIZE}" 
+            -DCCRAM_SIZE="${CCRAM_SIZE}" 
+            -DSTACK_SIZE="${STACK_SIZE}" 
+            -DHEAP_SIZE="${HEAP_SIZE}" 
+            -DLINKER_SCRIPT="${OUTPUT_LD_FILE}"
+            -P "${STM32_CMAKE_DIR}/stm32/linker_ld.cmake"
     )
-    LIST(APPEND CMSIS_SOURCES ${CMSIS_STARTUP_SOURCE_FILE})
-ENDIF()
-
-IF(CMSIS_FIND_COMPONENTS STREQUAL NN)
-    FIND_PACKAGE(CMSISNN)
-    LIST(APPEND CMSIS_SOURCES ${CMSISNN_SOURCES})
-    LIST(APPEND CMSIS_INCLUDE_DIRS ${CMSISNN_INCLUDE_DIRS})
-ENDIF()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(CMSIS DEFAULT_MSG CMSIS_INCLUDE_DIRS CMSIS_SOURCES)
+    add_custom_target(CMSIS_LD_${DEVICE}${CORE_U} DEPENDS "${OUTPUT_LD_FILE}")
+    add_dependencies(CMSIS::STM32::${DEVICE}${CORE_C} CMSIS_LD_${DEVICE}${CORE_U})
+    stm32_add_linker_script(CMSIS::STM32::${DEVICE}${CORE_C} INTERFACE "${OUTPUT_LD_FILE}")
+endfunction() 
+
+foreach(COMP ${CMSIS_FIND_COMPONENTS})
+    string(TOLOWER ${COMP} COMP_L)
+    string(TOUPPER ${COMP} COMP)
+    
+    string(REGEX MATCH "^STM32([A-Z][0-9])([0-9A-Z][0-9][A-Z][0-9A-Z])?_?(M[47])?.*$" COMP ${COMP})
+    
+    if((NOT CMAKE_MATCH_1) AND (NOT CMAKE_MATCH_2))
+        message(FATAL_ERROR "Unknown CMSIS component: ${COMP}")
+    endif()
+    
+    if(CMAKE_MATCH_2)
+        set(FAMILY ${CMAKE_MATCH_1})
+        set(DEVICES "${CMAKE_MATCH_1}${CMAKE_MATCH_2}")
+    else()
+        set(FAMILY ${CMAKE_MATCH_1})
+        stm32_get_devices_by_family(DEVICES FAMILY ${FAMILY} CORE ${CORE})
+    endif()
+    
+    if(CMAKE_MATCH_3)
+        set(CORE ${CMAKE_MATCH_3})
+        set(CORE_C "::${CORE}")
+        set(CORE_U "_${CORE}")
+    else()
+        unset(CORE)
+        unset(CORE_C)
+        unset(CORE_U)
+    endif()
+    
+    string(TOLOWER ${FAMILY} FAMILY_L)
+    
+    if((NOT STM32_CMSIS_${FAMILY}_PATH) AND (NOT STM32_CUBE_${FAMILY}_PATH))
+        set(STM32_CUBE_${FAMILY}_PATH /opt/STM32Cube${FAMILY} CACHE PATH "Path to STM32Cube${FAMILY}")
+        message(STATUS "Neither STM32_CUBE_${FAMILY}_PATH nor STM32_CMSIS_${FAMILY}_PATH specified using default  STM32_CUBE_${FAMILY}_PATH: ${STM32_CUBE_${FAMILY}_PATH}")
+    endif()
+        
+    find_path(CMSIS_${FAMILY}${CORE_U}_CORE_PATH
+        NAMES Include/cmsis_gcc.h
+        PATHS "${STM32_CMSIS_PATH}" "${STM32_CUBE_${FAMILY}_PATH}/Drivers/CMSIS"
+        NO_DEFAULT_PATH
+    )
+    if (NOT CMSIS_${FAMILY}${CORE_U}_CORE_PATH)
+        continue()
+    endif()
+	
+    find_path(CMSIS_${FAMILY}${CORE_U}_PATH
+        NAMES Include/stm32${FAMILY_L}xx.h
+        PATHS "${STM32_CMSIS_${FAMILY}_PATH}" "${STM32_CUBE_${FAMILY}_PATH}/Drivers/CMSIS/Device/ST/STM32${FAMILY}xx"
+        NO_DEFAULT_PATH
+    )
+    if (NOT CMSIS_${FAMILY}${CORE_U}_PATH)
+        continue()
+    endif()
+    list(APPEND CMSIS_INCLUDE_DIRS "${CMSIS_${FAMILY}${CORE_U}_CORE_PATH}/Include" "${CMSIS_${FAMILY}${CORE_U}_PATH}/Include")
+
+    if(NOT CMSIS_${FAMILY}${CORE_U}_VERSION)
+        find_file(CMSIS_${FAMILY}${CORE_U}_PDSC
+            NAMES ARM.CMSIS.pdsc
+            PATHS "${CMSIS_${FAMILY}${CORE_U}_CORE_PATH}"
+            NO_DEFAULT_PATH
+        )
+        if (NOT CMSIS_${FAMILY}${CORE_U}_PDSC)
+            set(CMSIS_${FAMILY}${CORE_U}_VERSION "0.0.0")
+        else()
+            file(STRINGS "${CMSIS_${FAMILY}${CORE_U}_PDSC}" VERSION_STRINGS REGEX "<release version=\"([0-9]*\\.[0-9]*\\.[0-9]*)\" date=\"[0-9]+\\-[0-9]+\\-[0-9]+\">")
+            list(GET VERSION_STRINGS 0 STR)
+            string(REGEX MATCH "<release version=\"([0-9]*)\\.([0-9]*)\\.([0-9]*)\" date=\"[0-9]+\\-[0-9]+\\-[0-9]+\">" MATCHED ${STR})
+            set(CMSIS_${FAMILY}${CORE_U}_VERSION "${CMAKE_MATCH_1}.${CMAKE_MATCH_2}.${CMAKE_MATCH_3}" CACHE INTERNAL "CMSIS STM32${FAMILY}${CORE_U} version")
+        endif()
+    endif()
+    
+    set(CMSIS_${COMP}_VERSION ${CMSIS_${FAMILY}${CORE_U}_VERSION})
+    set(CMSIS_VERSION ${CMSIS_${COMP}_VERSION})
+        
+    find_file(CMSIS_${FAMILY}${CORE_U}_SOURCE
+        NAMES system_stm32${FAMILY_L}xx.c
+        PATHS "${CMSIS_${FAMILY}${CORE_U}_PATH}/Source/Templates"
+        NO_DEFAULT_PATH
+    )
+    list(APPEND CMSIS_SOURCES "${CMSIS_${FAMILY}${CORE_U}_SOURCE}")
+    
+    if (NOT CMSIS_${FAMILY}${CORE_U}_SOURCE)
+        continue()
+    endif()
+
+    if(NOT (TARGET CMSIS::STM32::${FAMILY}${CORE_C}))
+        add_library(CMSIS::STM32::${FAMILY}${CORE_C} INTERFACE IMPORTED)
+        target_link_libraries(CMSIS::STM32::${FAMILY}${CORE_C} INTERFACE STM32::${FAMILY}${CORE_C})
+        target_include_directories(CMSIS::STM32::${FAMILY}${CORE_C} INTERFACE "${CMSIS_${FAMILY}${CORE_U}_CORE_PATH}/Include")
+        target_include_directories(CMSIS::STM32::${FAMILY}${CORE_C} INTERFACE "${CMSIS_${FAMILY}${CORE_U}_PATH}/Include")
+        target_sources(CMSIS::STM32::${FAMILY}${CORE_C} INTERFACE "${CMSIS_${FAMILY}${CORE_U}_SOURCE}")
+    endif()
+
+    set(DEVICES_FOUND TRUE)
+    foreach(DEVICE ${DEVICES})
+        stm32_get_cores(DEV_CORES FAMILY ${FAMILY} DEVICE ${DEVICE})
+        if(CORE AND (NOT ${CORE} IN_LIST DEV_CORES))
+            continue()
+        endif()
+                
+        stm32_get_chip_type(${FAMILY} ${DEVICE} TYPE)
+        string(TOLOWER ${DEVICE} DEVICE_L)
+        string(TOLOWER ${TYPE} TYPE_L)
+        
+        find_file(CMSIS_${FAMILY}${CORE_U}_${TYPE}_STARTUP
+            NAMES startup_stm32${TYPE_L}.s
+            PATHS "${CMSIS_${FAMILY}${CORE_U}_PATH}/Source/Templates/gcc"
+            NO_DEFAULT_PATH
+        )
+        list(APPEND CMSIS_SOURCES "${CMSIS_${FAMILY}${CORE_U}_${TYPE}_STARTUP}")
+        if(NOT CMSIS_${FAMILY}${CORE_U}_${TYPE}_STARTUP)
+            set(DEVICES_FOUND FALSE)
+            break()
+        endif()
+        
+        if(NOT (TARGET CMSIS::STM32::${TYPE}${CORE_C}))
+            add_library(CMSIS::STM32::${TYPE}${CORE_C} INTERFACE IMPORTED)
+            target_link_libraries(CMSIS::STM32::${TYPE}${CORE_C} INTERFACE CMSIS::STM32::${FAMILY}${CORE_C} STM32::${TYPE}${CORE_C})
+            target_sources(CMSIS::STM32::${TYPE}${CORE_C} INTERFACE "${CMSIS_${FAMILY}${CORE_U}_${TYPE}_STARTUP}")
+        endif()
+        
+        add_library(CMSIS::STM32::${DEVICE}${CORE_C} INTERFACE IMPORTED)
+        target_link_libraries(CMSIS::STM32::${DEVICE}${CORE_C} INTERFACE CMSIS::STM32::${TYPE}${CORE_C})
+        cmsis_generate_default_linker_script(${FAMILY} ${DEVICE} "${CORE}")
+    endforeach()
+
+    if(DEVICES_FOUND)
+       set(CMSIS_${COMP}_FOUND TRUE)
+    else()
+       set(CMSIS_${COMP}_FOUND FALSE)
+    endif()
+    list(REMOVE_DUPLICATES CMSIS_INCLUDE_DIRS)
+    list(REMOVE_DUPLICATES CMSIS_SOURCES)
+endforeach()
+
+include(FindPackageHandleStandardArgs)
+find_package_handle_standard_args(CMSIS
+    REQUIRED_VARS CMSIS_INCLUDE_DIRS CMSIS_SOURCES
+    FOUND_VAR CMSIS_FOUND
+    VERSION_VAR CMSIS_VERSION
+    HANDLE_COMPONENTS
+)

cmake/FindCMSISNN.cmake

@@ -1,157 +0,0 @@
-INCLUDE(FetchContent)
-
-SET(FETCHCONTENT_UPDATES_DISCONNECTED ON)
-FetchContent_Declare(
-    arm_cmsis
-    GIT_REPOSITORY https://github.com/ARM-software/CMSIS_5.git
-    )
-
-FetchContent_GetProperties(arm_cmsis)
-IF(NOT arm_cmsis_POPULATED)
-    MESSAGE(STATUS "Getting most recent ARM CMSIS sources")
-    FetchContent_Populate(arm_cmsis)
-    EXECUTE_PROCESS(COMMAND git -C ${arm_cmsis_SOURCE_DIR} checkout develop)
-ENDIF()
-
-# FIND_PACKAGE(Fixedpoint)
-
-SET(ARM_CMSIS_DIR ${arm_cmsis_SOURCE_DIR}/CMSIS)
-
-SET(CMSIS_NN_HEADERS
-    arm_nnfunctions.h
-    arm_nnsupportfunctions.h
-    arm_nn_tables.h
-    )
-
-FILE(GLOB CMSIS_NN_SOURCES ${ARM_CMSIS_DIR}/NN/Source/*/*.c)
-
-FIND_PATH(CMSIS_NN_INC_DIR ${CMSIS_NN_HEADERS}
-    PATHS ${ARM_CMSIS_DIR}/NN/Include
-    CMAKE_FIND_ROOT_PATH_BOTH
-    )
-
-SET(CMSIS_DSP_HEADERS
-    arm_common_tables.h
-    arm_const_structs.h
-    arm_helium_utils.h
-    arm_math.h
-    arm_mve_tables.h
-    arm_vec_math.h
-    )
-
-SET(CMSIS_DSP_PRIVATE_HEADERS
-    arm_sorting.h
-    arm_vec_fft.h
-    arm_vec_filtering.h
-    )
-
-SET(CMSIS_DSP_SRCS
-    BasicMathFunctions.c
-    arm_gaussian_naive_bayes_predict_f32.c
-    CommonTables.c
-    ComplexMathFunctions.c
-    ControllerFunctions.c
-    arm_boolean_distance.c
-    arm_boolean_distance_template.h
-    arm_braycurtis_distance_f32.c
-    arm_canberra_distance_f32.c
-    arm_chebyshev_distance_f32.c
-    arm_cityblock_distance_f32.c
-    arm_correlation_distance_f32.c
-    arm_cosine_distance_f32.c
-    arm_dice_distance.c
-    arm_euclidean_distance_f32.c
-    arm_hamming_distance.c
-    arm_jaccard_distance.c
-    arm_jensenshannon_distance_f32.c
-    arm_kulsinski_distance.c
-    arm_minkowski_distance_f32.c
-    arm_rogerstanimoto_distance.c
-    arm_russellrao_distance.c
-    arm_sokalmichener_distance.c
-    arm_sokalsneath_distance.c
-    arm_yule_distance.c
-    FastMathFunctions.c
-    FilteringFunctions.c
-    MatrixFunctions.c
-    StatisticsFunctions.c
-    SupportFunctions.c
-    arm_svm_linear_init_f32.c
-    arm_svm_linear_predict_f32.c
-    arm_svm_polynomial_init_f32.c
-    arm_svm_polynomial_predict_f32.c
-    arm_svm_rbf_init_f32.c
-    arm_svm_rbf_predict_f32.c
-    arm_svm_sigmoid_init_f32.c
-    arm_svm_sigmoid_predict_f32.c
-    TransformFunctions.c
-    )
-
-FOREACH(SRC ${CMSIS_DSP_SRCS})
-    STRING(MAKE_C_IDENTIFIER "${SRC}" SRC_CLEAN)
-    SET(CMSIS_DSP_${SRC_CLEAN}_FILE ${SRC_CLEAN}-NOTFOUND)
-    FIND_FILE(CMSIS_DSP_${SRC_CLEAN}_FILE ${SRC}
-        PATH_SUFFIXES
-        BasicMathFunctions
-        BayesFunctions
-        CommonTables
-        ComplexMathFunctions
-        ControllerFunctions
-        DistanceFunctions
-        FastMathFunctions
-        FilteringFunctions
-        MatrixFunctions
-        StatisticsFunctions
-        SupportFunctions
-        SVMFunctions
-        TransformFunctions
-        PATHS ${ARM_CMSIS_DIR}/DSP/Source
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-    LIST(APPEND CMSIS_DSP_SOURCES ${CMSIS_DSP_${SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-FIND_PATH(CMSIS_DSP_PRIVATE_INC_DIR ${CMSIS_DSP_PRIVATE_HEADERS}
-    PATHS ${ARM_CMSIS_DIR}/DSP/PrivateInclude
-    CMAKE_FIND_ROOT_PATH_BOTH
-    )
-
-FIND_PATH(CMSIS_DSP_INC_DIR ${CMSIS_DSP_HEADERS}
-    PATHS ${ARM_CMSIS_DIR}/DSP/Include
-    CMAKE_FIND_ROOT_PATH_BOTH
-    )
-
-SET(CMSIS_DSP_INC_DIRS
-    ${CMSIS_DSP_PRIVATE_INC_DIR}
-    ${CMSIS_DSP_INC_DIR}
-    )
-
-SET(CMSISNN_INCLUDE_DIRS
-    ${CMSIS_DSP_INC_DIRS}
-    ${CMSIS_NN_INC_DIR}
-    )
-
-SET(CMSISNN_SOURCES
-    ${CMSIS_DSP_SOURCES}
-    ${CMSIS_NN_SOURCES}
-    )
-
-IF(STM32_FAMILY STREQUAL "F0")
-    ADD_DEFINITIONS(-DARM_MATH_CM0)
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    ADD_DEFINITIONS(-DARM_MATH_CM3)
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    #TODO find better solution to this
-    ADD_DEFINITIONS(-D__FPU_PRESENT=1)
-    ADD_DEFINITIONS(-DARM_MATH_CM4)
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    ADD_DEFINITIONS(-DARM_MATH_CM7)
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    ADD_DEFINITIONS(-DARM_MATH_CM0PLUS)
-ELSE()
-    MESSAGE(STATUS "ARM_MATH define not found, see arm_math.h")
-ENDIF()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(CMSISNN DEFAULT_MSG CMSISNN_INCLUDE_DIRS CMSISNN_SOURCES)

cmake/FindChibiOS.cmake

@@ -1,27 +0,0 @@
-IF(NOT CHIBIOS_ROOT)
-    SET(CHIBIOS_ROOT /usr/src/chibios)
-    MESSAGE(STATUS "No CHIBIOS_ROOT specified, using default: ${CHIBIOS_ROOT}")
-ENDIF()
-
-
-MESSAGE(STATUS "Chibios version:" ${ChibiOS_FIND_VERSION_MAJOR})
-
-IF(ChibiOS_FIND_VERSION_MAJOR EQUAL 2)
-  MESSAGE(FATAL_ERROR "ChibiOS v2.x.x is not supported. Use older version of stm32-cmake")
-ELSEIF((ChibiOS_FIND_VERSION_MAJOR EQUAL 18))
-  INCLUDE(ChibiOS/18.2/ChibiOS)
-ELSEIF((ChibiOS_FIND_VERSION_MAJOR EQUAL 17))
-  INCLUDE(ChibiOS/ChibiOS17)
-ELSEIF((ChibiOS_FIND_VERSION_MAJOR EQUAL 16))
-  INCLUDE(ChibiOS/ChibiOS16)
-ELSEIF((NOT ChibiOS_FIND_VERSION_MAJOR) OR (ChibiOS_FIND_VERSION_MAJOR EQUAL 3))
-  INCLUDE(ChibiOS/ChibiOS3)
-ENDIF()
-
-LIST(REMOVE_DUPLICATES ChibiOS_INCLUDE_DIRS)
-LIST(REMOVE_DUPLICATES ChibiOS_SOURCES)
-
-INCLUDE(FindPackageHandleStandardArgs)
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(ChibiOS DEFAULT_MSG ChibiOS_SOURCES ChibiOS_INCLUDE_DIRS ChibiOS_LINKER_SCRIPT)
-
-

cmake/FindFATFS.cmake

@@ -1,115 +0,0 @@
-IF(NOT STM32Cube_DIR)
-    SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-    MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-ENDIF()
-
-SET(FATFS_COMMON_SOURCES
-    diskio.c
-    ff.c
-    ff_gen_drv.c
-)
-
-CMAKE_POLICY(SET CMP0057 NEW)
-
-IF(NOT STORAGE_DRIVER)
-    MESSAGE(STATUS "No storage driver specified, please SET STORAGE_DRIVER to {SDCARD, SDRAM, SRAM, USBH}")
-else()
-    if("SDCARD" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES sd_diskio.c)
-    endif()
-    if("SDRAM" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES sdram_diskio.c)
-    endif()
-    if("SRAM" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES sram_diskio.c)
-    endif()
-    if("USBH" IN_LIST STORAGE_DRIVER)
-        LIST(APPEND FATFS_DRIVER_SOURCES usbh_diskio.c)
-    endif()
-endif()
-
-SET(FATFS_OPTION_SOURCES syscall.c unicode.c)
-#if(CODE_PAGE EQUAL CP932)
-#list(APPEND FATFS_OPTION_SOURCES cc932.c)
-#(    cc936.c
-#    cc949.c
-#    cc950.c
-#    ccsbcs.c
-#    unicode.c
-#)
-
-SET(FATFS_COMMON_HEADERS
-    diskio.h
-    ff.h
-    ff_gen_drv.h
-    ffconf_template.h
-    integer.h
-)
-
-SET(FATFS_DRIVER_HEADERS
-    sd_diskio.h
-    sdram_diskio.h
-    sram_diskio.h
-    usbh_diskio.h
-)
-
-FIND_PATH(FATFS_COMMON_INCLUDE_DIR ${FATFS_COMMON_HEADERS}
-    HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FIND_PATH(FATFS_DRIVER_INCLUDE_DIR ${FATFS_DRIVER_HEADERS}
-    HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/drivers/
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-IF(${FATFS_DRIVER_INCLUDE_DIR} STREQUAL FATFS_DRIVER_INCLUDE_DIR-NOTFOUND)
-    MESSAGE(WARNING "Driver header files not located in STM firmware, please manually include the appropriate X_diskio.h directory")
-    SET(FATFS_INCLUDE_DIRS
-    ${FATFS_COMMON_INCLUDE_DIR}
-        )
-ELSE()
-SET(FATFS_INCLUDE_DIRS
-    ${FATFS_COMMON_INCLUDE_DIR}
-    ${FATFS_DRIVER_INCLUDE_DIR}
-)
-ENDIF()
-
-FOREACH(SRC ${FATFS_COMMON_SOURCES})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND FATFS_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-FOREACH(SRC ${FATFS_DRIVER_SOURCES})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/drivers/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-STRING(FIND ${SRC_FILE} "NOTFOUND" SRC_FILE_NOTFOUND)
-IF(NOT ${SRC_FILE_NOTFOUND} EQUAL -1)
-    MESSAGE(WARNING "Driver source files not located in STM firmware, please manually source the appropriate X_diskio.c files")
-ELSE()
-    LIST(APPEND FATFS_SOURCES ${SRC_FILE})
-ENDIF()
-ENDFOREACH()
-
-FOREACH(SRC ${FATFS_OPTION_SOURCES})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FatFs/src/option/
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND FATFS_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-message(STATUS "fatfs include " ${FATFS_INCLUDE_DIRS})
-message(STATUS "fatfs sources " ${FATFS_SOURCES})
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(FATFS DEFAULT_MSG FATFS_INCLUDE_DIRS FATFS_SOURCES)

cmake/FindFreeRTOS.cmake

@@ -1,142 +1,104 @@
-IF(STM32_FAMILY STREQUAL "F0")
-	SET(PORT_GCC_DIR_SUFFIX "CM0")
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-	SET(PORT_GCC_DIR_SUFFIX "CM3")
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-	SET(PORT_GCC_DIR_SUFFIX "CM3")
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-	SET(PORT_GCC_DIR_SUFFIX "CM4F")
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-	SET(PORT_GCC_DIR_SUFFIX "CM4F")
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-	SET(PORT_GCC_DIR_SUFFIX "CM7")
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-	SET(PORT_GCC_DIR_SUFFIX "CM7/r0p1")
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-	SET(PORT_GCC_DIR_SUFFIX "CM0")
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-	SET(PORT_GCC_DIR_SUFFIX "CM4F")
-ENDIF()
-
-SET(FREERTOS_SRC_FILES
-	croutine.c
-	event_groups.c
-	list.c
-	queue.c
-	tasks.c
-	timers.c
-)
-
-SET(FREERTOS_HEADERS
-	croutine.h
-	deprecated_definitions.h
-	event_groups.h
-	FreeRTOS.h
-	list.h
-	mpu_prototypes.h
-	mpu_wrappers.h
-	portable.h
-	projdefs.h
-	queue.h
-	semphr.h
-	StackMacros.h
-	task.h
-	timers.h
-)
-
-IF(FREERTOS_CMSIS_V2)
-    SET(CMSIS_OS_SRC_FILE cmsis_os1.c)
-ELSE()
-    SET(CMSIS_OS_SRC_FILE cmsis_os.c)
-ENDIF()
-SET(CMSIS_OS_INC_FILE cmsis_os.h)
-
-SET(PORT_ARM_SRC_FILE port.c)
-SET(PORTMACRO_ARM_HEADER portmacro.h)
-
-IF(NOT FREERTOS_HEAP_IMPL)
-	MESSAGE(FATAL_ERROR "FREERTOS_HEAP_IMPL not defined. Define it to include proper heap implementation file.")
-ELSE()
-	SET(HEAP_IMP_FILE heap_${FREERTOS_HEAP_IMPL}.c)
-ENDIF()
-
-FIND_PATH(FREERTOS_COMMON_INC_DIR ${FREERTOS_HEADERS}
-	PATH_SUFFIXES include
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-SET(CMSIS_OS_INC_DIR CMSIS_OS_INC_DIR-NOTFOUND)
-IF(FREERTOS_CMSIS_V2)
-    FIND_PATH(CMSIS_OS_INC_DIR ${CMSIS_OS_INC_FILE}
-        PATH_SUFFIXES CMSIS_RTOS_V2
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-ELSE()
-    FIND_PATH(CMSIS_OS_INC_DIR ${CMSIS_OS_INC_FILE}
-        PATH_SUFFIXES CMSIS_RTOS
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-ENDIF()
-
-FIND_PATH(PORTMACRO_INC_DIR ${PORTMACRO_ARM_HEADER}
-	PATH_SUFFIXES ARM_${PORT_GCC_DIR_SUFFIX}
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FOREACH(SRC ${FREERTOS_SRC_FILES})
-    STRING(MAKE_C_IDENTIFIER "${SRC}" SRC_CLEAN)
-	SET(FREERTOS_${SRC_CLEAN}_FILE FREERTOS_SRC_FILE-NOTFOUND)
-	FIND_FILE(FREERTOS_${SRC_CLEAN}_FILE ${SRC}
-		HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-		CMAKE_FIND_ROOT_PATH_BOTH
-	)
-	LIST(APPEND FREERTOS_SOURCES ${FREERTOS_${SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-SET(CMSIS_OS_SOURCE ${CMSIS_OS_SRC_FILE}-NOTFOUND)
-IF(FREERTOS_CMSIS_V2)
-    FIND_FILE(CMSIS_OS_SOURCE ${CMSIS_OS_SRC_FILE}
-        PATH_SUFFIXES CMSIS_RTOS_V2
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-ELSE()
-    FIND_FILE(CMSIS_OS_SOURCE ${CMSIS_OS_SRC_FILE}
-        PATH_SUFFIXES CMSIS_RTOS
-        HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-ENDIF()
-
-FIND_FILE(PORT_ARM_SOURCE ${PORT_ARM_SRC_FILE}
-	PATH_SUFFIXES ARM_${PORT_GCC_DIR_SUFFIX}
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC
-	CMAKE_FIND_ROOT_PATH_BOTH
+if(NOT FreeRTOS_FIND_COMPONENTS)
+    set(FreeRTOS_FIND_COMPONENTS
+        ARM_CM0 ARM_CM3 ARM_CM4F ARM_CM7
+    )
+endif()
+list(REMOVE_DUPLICATES FreeRTOS_FIND_COMPONENTS)
+
+set(FreeRTOS_HEAPS 1 2 3 4 5)
+
+if(NOT FREERTOS_PATH)
+    set(FREERTOS_PATH /opt/FreeRTOS CACHE PATH "Path to FreeRTOS")
+    message(STATUS "No FREERTOS_PATH specified using default: ${FREERTOS_PATH}")
+endif()
+
+find_path(FreeRTOS_COMMON_INCLUDE
+    NAMES FreeRTOS.h
+    PATHS "${FREERTOS_PATH}/Source/include"
+    NO_DEFAULT_PATH
 )
+list(APPEND FreeRTOS_INCLUDE_DIRS "${FreeRTOS_COMMON_INCLUDE}")
 
-FIND_FILE(HEAP_IMP_SOURCE ${HEAP_IMP_FILE}
-	PATH_SUFFIXES MemMang
-	HINTS ${STM32Cube_DIR}/Middlewares/Third_Party/FreeRTOS/Source/portable
-	CMAKE_FIND_ROOT_PATH_BOTH
+find_path(FreeRTOS_SOURCE_DIR
+    NAMES tasks.c
+    PATHS "${FREERTOS_PATH}/Source"
+    NO_DEFAULT_PATH
 )
-
-SET(FreeRTOS_INCLUDE_DIRS
-	${FREERTOS_COMMON_INC_DIR}
-	${CMSIS_OS_INC_DIR}
-	${PORTMACRO_INC_DIR}
-)
-
-SET(FreeRTOS_SOURCES
-	${FREERTOS_SOURCES}
-	${CMSIS_OS_SOURCE}
-	${PORT_ARM_SOURCE}
-	${HEAP_IMP_SOURCE}
+if(NOT (TARGET FreeRTOS))
+    add_library(FreeRTOS INTERFACE IMPORTED)
+    target_sources(FreeRTOS INTERFACE 
+        "${FreeRTOS_SOURCE_DIR}/tasks.c"
+        "${FreeRTOS_SOURCE_DIR}/list.c"
+        "${FreeRTOS_SOURCE_DIR}/queue.c"
+    )
+    target_include_directories(FreeRTOS INTERFACE "${FreeRTOS_COMMON_INCLUDE}")
+endif()
+
+if(NOT (TARGET FreeRTOS::Coroutine))
+    add_library(FreeRTOS::Coroutine INTERFACE IMPORTED)
+    target_sources(FreeRTOS::Coroutine INTERFACE "${FreeRTOS_SOURCE_DIR}/croutine.c")
+    target_link_libraries(FreeRTOS::Coroutine INTERFACE FreeRTOS)
+endif()
+
+if(NOT (TARGET FreeRTOS::EventGroups))
+    add_library(FreeRTOS::EventGroups INTERFACE IMPORTED)
+    target_sources(FreeRTOS::EventGroups INTERFACE "${FreeRTOS_SOURCE_DIR}/event_groups.c")
+    target_link_libraries(FreeRTOS::EventGroups INTERFACE FreeRTOS)
+endif()
+
+if(NOT (TARGET FreeRTOS::StreamBuffer))
+    add_library(FreeRTOS::StreamBuffer INTERFACE IMPORTED)
+    target_sources(FreeRTOS::StreamBuffer INTERFACE "${FreeRTOS_SOURCE_DIR}/stream_buffer.c")
+    target_link_libraries(FreeRTOS::StreamBuffer INTERFACE FreeRTOS)
+endif()
+
+if(NOT (TARGET FreeRTOS::Timers))
+    add_library(FreeRTOS::Timers INTERFACE IMPORTED)
+    target_sources(FreeRTOS::Timers INTERFACE "${FreeRTOS_SOURCE_DIR}/timers.c")
+    target_link_libraries(FreeRTOS::Timers INTERFACE FreeRTOS)
+endif()
+
+foreach(HEAP ${FreeRTOS_HEAPS})
+    if(NOT (TARGET FreeRTOS::Heap::${HEAP}))
+        add_library(FreeRTOS::Heap::${HEAP} INTERFACE IMPORTED)
+        target_sources(FreeRTOS::Heap::${HEAP} INTERFACE "${FreeRTOS_SOURCE_DIR}/portable/MemMang/heap_${HEAP}.c")
+        target_link_libraries(FreeRTOS::Heap::${HEAP} INTERFACE FreeRTOS)
+    endif()
+endforeach()
+
+foreach(PORT ${FreeRTOS_FIND_COMPONENTS})
+    find_path(FreeRTOS_${PORT}_PATH
+        NAMES portmacro.h
+        PATHS "${FREERTOS_PATH}/Source/portable/GCC/${PORT}"
+        NO_DEFAULT_PATH
+    )
+    list(APPEND FreeRTOS_INCLUDE_DIRS "${FreeRTOS_${PORT}_PATH}")
+    
+    find_file(FreeRTOS_${PORT}_SOURCE
+        NAMES port.c
+        PATHS "${FreeRTOS_${PORT}_PATH}"
+        NO_DEFAULT_PATH
+    )
+    if(NOT (TARGET FreeRTOS::${PORT}))
+        add_library(FreeRTOS::${PORT} INTERFACE IMPORTED)
+        target_link_libraries(FreeRTOS::${PORT} INTERFACE FreeRTOS)
+        target_sources(FreeRTOS::${PORT} INTERFACE "${FreeRTOS_${PORT}_SOURCE}")
+        target_include_directories(FreeRTOS::${PORT} INTERFACE "${FreeRTOS_${PORT}_PATH}")
+    endif()
+    
+    if(FreeRTOS_${PORT}_PATH AND 
+       FreeRTOS_${PORT}_SOURCE AND 
+       FreeRTOS_COMMON_INCLUDE AND
+       FreeRTOS_SOURCE_DIR)
+       set(FreeRTOS_${PORT}_FOUND TRUE)
+    else()
+       set(FreeRTOS_${PORT}_FOUND FALSE)
+    endif()
+endforeach()
+
+include(FindPackageHandleStandardArgs)
+find_package_handle_standard_args(FreeRTOS
+    REQUIRED_VARS FreeRTOS_INCLUDE_DIRS
+    FOUND_VAR FreeRTOS_FOUND
+    HANDLE_COMPONENTS
 )
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(FreeRTOS DEFAULT_MSG FreeRTOS_INCLUDE_DIRS FreeRTOS_SOURCES)

cmake/FindHAL.cmake

@@ -0,0 +1,356 @@
+set(HAL_DRIVERS_F0
+    adc can cec comp cortex crc dac dma exti flash gpio i2c i2s irda iwdg pcd 
+    pwr rcc rtc smartcard smbus spi tim tsc uart usart wwdg
+)
+set(HAL_EX_DRIVERS_F0
+    adc crc dac flash i2c pcd pwr rcc rtc smartcard spi tim uart usart
+)
+set(HAL_LL_DRIVERS_F0
+    adc comp crc crs dac dma exti gpio i2c pwr rcc rtc spi tim usart usb utils
+)
+
+set(HAL_DRIVERS_F1
+    adc can cec cortex crc dac dma eth exti flash gpio hcd i2c i2s irda iwdg 
+    mmc nand nor pccard pcd pwr rcc rtc sd smartcard spi sram tim uart usart 
+    wwdg
+)
+set(HAL_EX_DRIVERS_F1
+    adc dac flash gpio pcd rcc rtc tim
+)
+set(HAL_LL_DRIVERS_F1
+    adc crc dac dma exti fsmc gpio i2c pwr rcc rtc sdmmc spi tim usart usb utils
+)
+
+set(HAL_DRIVERS_F2
+    adc can cortex crc cryp dac dcmi dma eth exti flash gpio hash hcd i2c i2s 
+    irda iwdg mmc nand nor pccard pcd pwr rcc rng rtc sd smartcard spi sram tim 
+    uart usart wwdg
+)
+set(HAL_EX_DRIVERS_F2
+    adc dac dcmi dma flash pcd pwr rcc rtc tim
+)
+set(HAL_LL_DRIVERS_F2
+    adc crc dac dma exti fsmc gpio i2c pwr rcc rng rtc sdmmc spi tim usart usb 
+    utils
+)
+
+set(HAL_DRIVERS_F3
+    adc can cec comp cortex crc dac dma exti flash gpio hrtim i2c i2s irda iwdg 
+    nand nor opamp pccard pcd pwr rcc rtc sdadc smartcard smbus spi sram tim tsc 
+    uart usart wwdg
+)
+set(HAL_EX_DRIVERS_F3
+    adc crc dac flash i2c i2s opamp pcd pwr rcc rtc smartcard spi tim uart usart
+)
+set(HAL_LL_DRIVERS_F3
+    adc comp crc dac dma exti fmc gpio hrtim i2c opamp pwr rcc rtc spi tim usart 
+    usb utils
+)
+
+set(HAL_DRIVERS_F4
+    adc can cec cortex crc cryp dac dcmi dfsdm dma dma2d dsi eth exti flash
+    flash_ramfunc fmpi2c gpio hash hcd i2c i2s irda iwdg lptim ltdc mmc nand nor 
+    pccard pcd pwr qspi rcc rng rtc sai sd sdram smartcard smbus spdifrx spi 
+    sram tim uart usart wwdg
+)
+set(HAL_EX_DRIVERS_F4
+    adc cryp dac dcmi dma flash fmpi2c hash i2c i2s ltdc pcd pwr rcc rtc sai tim 
+)
+set(HAL_LL_DRIVERS_F4
+    adc crc dac dma dma2d exti fmc fsmc gpio i2c lptim pwr rcc rng rtc sdmmc spi 
+    tim usart usb utils 
+)
+
+set(HAL_DRIVERS_F7
+    adc can cec cortex crc cryp dac dcmi dfsdm dma dma2d dsi eth exti flash 
+    gpio hash hcd i2c i2s irda iwdg jpeg lptim ltdc mdios mmc nand nor pcd pwr 
+    qspi rcc rng rtc sai sd sdram smartcard smbus spdifrx spi sram tim uart 
+    usart wwdg
+)
+set(HAL_EX_DRIVERS_F7
+    adc crc cryp dac dcmi dma flash hash i2c ltdc pcd pwr rcc rtc sai smartcard 
+    spi tim uart
+)
+set(HAL_LL_DRIVERS_F7
+    adc crc dac dma dma2d exti fmc gpio i2c lptim pwr rcc rng rtc sdmmc spi tim 
+    usart usb utils
+)
+
+set(HAL_DRIVERS_G0
+    adc cec comp cortex crc cryp dac dma exti flash gpio i2c i2s irda iwdg lptim 
+    pwr rcc rng rtc smartcard smbus spi tim uart usart wwdg
+)
+set(HAL_EX_DRIVERS_G0
+    adc crc cryp dac dma flash i2c pwr rcc rtc smartcard spi tim uart usart
+)
+set(HAL_LL_DRIVERS_G0
+    adc comp crc dac dma exti gpio i2c lptim lpuart pwr rcc rng rtc spi tim ucpd 
+    usart utils
+)
+
+set(HAL_DRIVERS_G4
+    adc comp cordic cortex crc cryp dac dma exti fdcan flash flash_ramfunc fmac 
+    gpio hrtim i2c i2s irda iwdg lptim nand nor opamp pcd pwr qspi rcc rng rtc 
+    sai smartcard smbus spi sram tim uart usart wwdg
+)
+set(HAL_EX_DRIVERS_G4
+    adc crc cryp dac dma flash i2c opamp pcd pwr rcc rtc sai smartcard spi tim 
+    uart usart
+)
+set(HAL_LL_DRIVERS_G4
+    adc comp cordic crc crs dac dma exti fmac fmc gpio hrtim i2c lptim lpuart 
+    opamp pwr rcc rng rtc spi tim ucpd usart usb utils
+)
+
+set(HAL_DRIVERS_H7
+    adc cec comp cortex crc cryp dac dcmi dfsdm dma dma2d dsi dts eth exti fdcan
+    flash gfxmmu gpio hash hrtim hsem i2c i2s irda iwdg jpeg lptim ltdc mdios 
+    mdma mmc nand nor opamp ospi otfdec pcd pssi pwr qspi ramecc rcc rng rtc sai 
+    sd sdram smartcard smbus spdifrx spi sram swpmi tim uart usart wwdg
+)
+set(HAL_EX_DRIVERS_H7
+    adc crc cryp dac dfsdm dma eth flash hash i2c i2s ltdc mmc opamp pcd pwr rcc 
+    rng rtc sai sd smartcard spi tim uart usart
+)
+set(HAL_LL_DRIVERS_H7
+    adc bdma comp crc crs dac delayblock dma dma2d exti fmc gpio hrtim i2c lptim 
+    lpuart mdma opamp pwr rcc rng rtc sdmmc spi swpmi tim usart usb utils
+)
+
+set(HAL_DRIVERS_L0
+    adc comp cortex crc cryp dac dma firewall flash flash_ramfunc gpio i2c i2s 
+    irda iwdg lcd lptim pcd pwr rcc rng rtc smartcard smbus spi tim tsc uart 
+    usart wwdg
+)
+set(HAL_EX_DRIVERS_L0
+    adc comp crc cryp dac flash i2c pcd pwr rcc rtc smartcard tim uart
+)
+set(HAL_LL_DRIVERS_L0
+    adc comp crc crs dac dma exti gpio i2c lptim lpuart pwr rcc rng rtc spi tim 
+    usart usb utils
+)
+
+set(HAL_DRIVERS_L1
+    adc comp cortex crc cryp dac dma flash flash_ramfunc gpio i2c i2s irda iwdg 
+    lcd nor opamp pcd pwr rcc rtc sd smartcard spi sram tim uart usart wwdg
+)
+set(HAL_EX_DRIVERS_L1
+    adc cryp dac flash opamp pcd pcd pwr rcc rtc tim
+)
+set(HAL_LL_DRIVERS_L1
+    adc comp crc dac dma exti fsmc gpio i2c opamp pwr rcc rtc sdmmc spi tim 
+    usart usb utils
+)
+
+set(HAL_DRIVERS_L4
+    adc can comp cortex crc cryp dac dcmi dfsdm dma dma2d dsi exti firewall 
+    flash flash_ramfunc gfxmmu gpio hash hcd i2c irda iwdg lcd lptim ltdc mmc 
+    nand nor opamp ospi pcd pka pssi pwr qspi rcc rng rtc sai sd smartcard smbus 
+    spi sram swpmi tim tsc uart usart wwdg
+)
+set(HAL_EX_DRIVERS_L4
+    adc crc cryp dac dfsdm dma flash hash i2c ltdc mmc opamp pcd pwr rcc rng rtc 
+    sai sd smartcard spi tim uart usart
+)
+set(HAL_LL_DRIVERS_L4
+    adc comp crc crs dac dma dma2d exti fmc gpio i2c lptim lpuart opamp pka pwr 
+    rcc rng rtc sdmmc spi swpmi tim usart usb utils
+)
+
+foreach(FAMILY ${STM32_SUPPORTED_FAMILIES})
+    list(APPEND HAL_DRIVERS ${HAL_DRIVERS_${FAMILY}})
+    list(APPEND HAL_LL_DRIVERS ${HAL_LL_DRIVERS_${FAMILY}})
+endforeach()
+list(REMOVE_DUPLICATES HAL_DRIVERS)
+list(REMOVE_DUPLICATES HAL_LL_DRIVERS)
+
+foreach(COMP ${HAL_FIND_COMPONENTS})
+    string(TOLOWER ${COMP} COMP_L)
+    string(TOUPPER ${COMP} COMP_U)
+    
+    string(REGEX MATCH "^STM32([A-Z][0-9])([0-9A-Z][0-9][A-Z][0-9A-Z])?_?(M[47])?.*$" COMP_U ${COMP_U})
+    if(CMAKE_MATCH_1)
+        list(APPEND HAL_FIND_COMPONENTS_FAMILIES ${COMP})
+        continue()
+    endif()
+    if(${COMP_L} IN_LIST HAL_DRIVERS)
+        list(APPEND HAL_FIND_COMPONENTS_DRIVERS ${COMP})
+        continue()
+    endif()
+    string(REGEX REPLACE "^ll_" "" COMP_L ${COMP_L})
+    if(${COMP_L} IN_LIST HAL_LL_DRIVERS)
+        list(APPEND HAL_FIND_COMPONENTS_DRIVERS_LL ${COMP})
+        continue()
+    endif()
+    message(FATAL_ERROR "Unknown HAL component: ${COMP}")
+endforeach()
+
+if(NOT HAL_FIND_COMPONENTS_FAMILIES)
+    set(HAL_FIND_COMPONENTS_FAMILIES
+        STM32F0 STM32F1 STM32F2 STM32F3 STM32F4 STM32F7
+        STM32G0 STM32G4
+        STM32H7_M7 STM32H7_M4
+        STM32L0 STM32L1 STM32L4
+    )
+endif()
+if(STM32H7 IN_LIST HAL_FIND_COMPONENTS_FAMILIES)
+    list(REMOVE_ITEM HAL_FIND_COMPONENTS_FAMILIES STM32H7)
+    list(APPEND HAL_FIND_COMPONENTS_FAMILIES STM32H7_M7 STM32H7_M4)
+endif()
+list(REMOVE_DUPLICATES HAL_FIND_COMPONENTS_FAMILIES)
+
+if((NOT HAL_FIND_COMPONENTS_DRIVERS) AND (NOT HAL_FIND_COMPONENTS_DRIVERS_LL))
+    set(HAL_FIND_COMPONENTS_DRIVERS ${HAL_DRIVERS})
+    set(HAL_FIND_COMPONENTS_DRIVERS_LL ${HAL_LL_DRIVERS})
+endif()
+list(REMOVE_DUPLICATES HAL_FIND_COMPONENTS_DRIVERS)
+list(REMOVE_DUPLICATES HAL_FIND_COMPONENTS_DRIVERS_LL)
+
+message(STATUS "Search for HAL families: ${HAL_FIND_COMPONENTS_FAMILIES}")
+message(STATUS "Search for HAL drivers: ${HAL_FIND_COMPONENTS_DRIVERS}")
+message(STATUS "Search for HAL LL drivers: ${HAL_FIND_COMPONENTS_DRIVERS_LL}")
+
+foreach(COMP ${HAL_FIND_COMPONENTS_FAMILIES})
+    string(TOUPPER ${COMP} COMP_U)
+    
+    string(REGEX MATCH "^STM32([A-Z][0-9])([0-9A-Z][0-9][A-Z][0-9A-Z])?_?(M[47])?.*$" COMP_U ${COMP_U})    
+    if(CMAKE_MATCH_3)
+        set(CORE ${CMAKE_MATCH_3})
+        set(CORE_C "::${CORE}")
+        set(CORE_U "_${CORE}")
+    else()
+        unset(CORE)
+        unset(CORE_C)
+        unset(CORE_U)
+    endif()
+        
+    set(FAMILY ${CMAKE_MATCH_1})
+    string(TOLOWER ${FAMILY} FAMILY_L)
+    
+    if((NOT STM32_HAL_${FAMILY}_PATH) AND (NOT STM32_CUBE_${FAMILY}_PATH))
+        set(STM32_CUBE_${FAMILY}_PATH /opt/STM32Cube${FAMILY} CACHE PATH "Path to STM32Cube${FAMILY}")
+        message(STATUS "Neither STM32_CUBE_${FAMILY}_PATH nor STM32_HAL_${FAMILY}_PATH specified using default STM32_CUBE_${FAMILY}_PATH: ${STM32_CUBE_${FAMILY}_PATH}")
+    endif()
+        
+    find_path(HAL_${FAMILY}_PATH
+        NAMES Inc/stm32${FAMILY_L}xx_hal.h
+        PATHS "${STM32_HAL_${FAMILY}_PATH}" "${STM32_CUBE_${FAMILY}_PATH}/Drivers/STM32${FAMILY}xx_HAL_Driver"
+        NO_DEFAULT_PATH
+    )
+    if (NOT HAL_${FAMILY}_PATH)
+        continue()
+    endif()
+    
+    find_path(HAL_${FAMILY}${CORE_U}_INCLUDE
+        NAMES stm32${FAMILY_L}xx_hal.h
+        PATHS "${HAL_${FAMILY}_PATH}/Inc"
+        NO_DEFAULT_PATH
+    )
+    find_file(HAL_${FAMILY}${CORE_U}_SOURCE
+        NAMES stm32${FAMILY_L}xx_hal.c
+        PATHS "${HAL_${FAMILY}_PATH}/Src"
+        NO_DEFAULT_PATH
+    )
+    
+    if ((NOT HAL_${FAMILY}${CORE_U}_INCLUDE) OR (NOT HAL_${FAMILY}${CORE_U}_SOURCE))
+        set(HAL_${COMP}_FOUND FALSE)
+        continue()
+    endif()
+
+    if(NOT (TARGET HAL::STM32::${FAMILY}${CORE_C}))
+        add_library(HAL::STM32::${FAMILY}${CORE_C} INTERFACE IMPORTED)
+        target_link_libraries(HAL::STM32::${FAMILY}${CORE_C} INTERFACE STM32::${FAMILY}${CORE_C} CMSIS::STM32::${FAMILY}${CORE_C})
+        target_include_directories(HAL::STM32::${FAMILY}${CORE_C} INTERFACE "${HAL_${FAMILY}${CORE_U}_INCLUDE}")
+        target_sources(HAL::STM32::${FAMILY}${CORE_C} INTERFACE "${HAL_${FAMILY}${CORE_U}_SOURCE}")
+    endif()
+    
+    foreach(DRV_COMP ${HAL_FIND_COMPONENTS_DRIVERS})
+        string(TOLOWER ${DRV_COMP} DRV_L)
+        string(TOUPPER ${DRV_COMP} DRV)
+        
+        if(NOT (DRV_L IN_LIST HAL_DRIVERS_${FAMILY}))
+            continue()
+        endif()
+        
+        find_file(HAL_${FAMILY}${CORE_U}_${DRV}_SOURCE
+            NAMES stm32${FAMILY_L}xx_hal_${DRV_L}.c
+            PATHS "${HAL_${FAMILY}_PATH}/Src"
+            NO_DEFAULT_PATH
+        )
+        list(APPEND HAL_${FAMILY}${CORE_U}_SOURCES "${HAL_${FAMILY}_${DRV}_SOURCE}")
+        if(NOT HAL_${FAMILY}${CORE_U}_${DRV}_SOURCE)
+            message(WARNING "Cannot find ${DRV} driver for ${${FAMILY}${CORE_U}}")
+            set(HAL_${DRV_COMP}_FOUND FALSE)
+            continue()
+        endif()
+                
+        set(HAL_${DRV_COMP}_FOUND TRUE)
+        if(HAL_${FAMILY}${CORE_U}_${DRV}_SOURCE AND (NOT (TARGET HAL::STM32::${FAMILY}::${DRV})))
+            add_library(HAL::STM32::${FAMILY}${CORE_C}::${DRV} INTERFACE IMPORTED)
+            target_link_libraries(HAL::STM32::${FAMILY}${CORE_C}::${DRV} INTERFACE HAL::STM32::${FAMILY}${CORE_C})
+            target_sources(HAL::STM32::${FAMILY}${CORE_C}::${DRV} INTERFACE "${HAL_${FAMILY}${CORE_U}_${DRV}_SOURCE}")
+        endif()
+                
+        if(HAL_${FAMILY}${CORE_U}_${DRV}_SOURCE AND (${DRV_L} IN_LIST HAL_EX_DRIVERS_${FAMILY}))
+            find_file(HAL_${FAMILY}${CORE_U}_${DRV}_EX_SOURCE
+                NAMES stm32${FAMILY_L}xx_hal_${DRV_L}_ex.c
+                PATHS "${HAL_${FAMILY}_PATH}/Src"
+                NO_DEFAULT_PATH
+            )
+            list(APPEND HAL_${FAMILY}${CORE_U}_SOURCES "${HAL_${FAMILY}${CORE_U}_${DRV}_EX_SOURCE}")
+            if(NOT HAL_${FAMILY}${CORE_U}_${DRV}_EX_SOURCE)
+                message(WARNING "Cannot find ${DRV}Ex driver for ${${FAMILY}${CORE_U}}")
+            endif()
+                        
+            if((TARGET HAL::STM32::${FAMILY}${CORE_C}::${DRV}) AND (NOT (TARGET HAL::STM32::${FAMILY}${CORE_C}::${DRV}Ex)))
+                add_library(HAL::STM32::${FAMILY}${CORE_C}::${DRV}Ex INTERFACE IMPORTED)
+                target_link_libraries(HAL::STM32::${FAMILY}${CORE_C}::${DRV}Ex INTERFACE HAL::STM32::${FAMILY}${CORE_C}::${DRV})
+                target_sources(HAL::STM32::${FAMILY}${CORE_C}::${DRV}Ex INTERFACE "${HAL_${FAMILY}${CORE_U}_${DRV}_EX_SOURCE}")
+            endif()
+        endif()
+    endforeach()
+    
+    foreach(DRV_COMP ${HAL_FIND_COMPONENTS_DRIVERS_LL})
+        string(TOLOWER ${DRV_COMP} DRV_L)
+        string(REGEX REPLACE "^ll_" "" DRV_L ${DRV_L})
+        string(TOUPPER ${DRV_L} DRV)
+        
+        if(NOT (DRV_L IN_LIST HAL_LL_DRIVERS_${FAMILY}))
+            continue()
+        endif()
+        
+        find_file(HAL_${FAMILY}${CORE_U}_${DRV}_LL_SOURCE
+            NAMES stm32${FAMILY_L}xx_ll_${DRV_L}.c
+            PATHS "${HAL_${FAMILY}_PATH}/Src"
+            NO_DEFAULT_PATH
+        )
+        list(APPEND HAL_${FAMILY}${CORE_U}_SOURCES "${HAL_${FAMILY}_${DRV}_LL_SOURCE}")
+        if(NOT HAL_${FAMILY}${CORE_U}_${DRV}_LL_SOURCE)
+            message(WARNING "Cannot find LL_${DRV} driver for ${${FAMILY}${CORE_U}}")
+            set(HAL_${DRV_COMP}_FOUND FALSE)
+            continue()
+        endif()
+    
+        set(HAL_${DRV_COMP}_FOUND TRUE)
+        if(HAL_${FAMILY}${CORE_U}_${DRV}_LL_SOURCE AND (NOT (TARGET HAL::STM32::${FAMILY}${CORE_C}::LL_${DRV})))
+            add_library(HAL::STM32::${FAMILY}${CORE_C}::LL_${DRV} INTERFACE IMPORTED)
+            target_link_libraries(HAL::STM32::${FAMILY}${CORE_C}::LL_${DRV} INTERFACE HAL::STM32::${FAMILY}${CORE_C})
+            target_sources(HAL::STM32::${FAMILY}${CORE_C}::LL_${DRV} INTERFACE "${HAL_${FAMILY}${CORE_U}_${DRV}_LL_SOURCE}")
+        endif()
+    endforeach()
+    
+    set(HAL_${COMP}_FOUND TRUE)
+    list(APPEND HAL_INCLUDE_DIRS "${HAL_${FAMILY}${CORE_U}_INCLUDE}")
+    list(APPEND HAL_SOURCES "${HAL_${FAMILY}${CORE_U}_SOURCES}")
+endforeach()
+
+list(REMOVE_DUPLICATES HAL_INCLUDE_DIRS)
+list(REMOVE_DUPLICATES HAL_SOURCES)
+
+include(FindPackageHandleStandardArgs)
+find_package_handle_standard_args(HAL
+    REQUIRED_VARS HAL_INCLUDE_DIRS HAL_SOURCES
+    FOUND_VAR HAL_FOUND
+    HANDLE_COMPONENTS
+)
+

cmake/FindSTM32BSP.cmake

@@ -1,100 +0,0 @@
-MESSAGE("STM Board: ${STM_BOARD}")
-IF(STM32_FAMILY STREQUAL "F4")
-	IF(STM_BOARD STREQUAL "STM32F429I-Discovery")
-		SET(BSP_COMPONENTS 
-                eeprom
-			    gyroscope
-			    io
-			    lcd
-			    sdram
-			    ts)
-		SET(BSP_PREFIX stm32f429i_discovery_)
-		SET(BSP_HEADERS stm32f429i_discovery.h)
-		SET(BSP_SRC stm32f429i_discovery.c)
-	ENDIF()
-    IF(STM_BOARD STREQUAL "STM324xG_EVAL")
-        SET(BSP_COMPONENTS 
-            lcd 
-            camera 
-            eeprom 
-            io 
-            sd 
-            sram 
-            ts)
-        SET(BSP_PREFIX stm324xg_eval_)
-        SET(BSP_HEADERS stm324xg_eval.h)
-        SET(BSP_SRC stm324xg_eval.c)
-    ENDIF()
-	set(COMMON_COMPONENTS ampire480272
-			      ampire640480
-			      cs43l22
-			      exc7200
-			      ili9325
-			      ili9341
-			      l3gd20
-			      lis302dl
-			      lis3dsh
-			      lsm303dlhc
-			      mfxstm32l152
-			      n25q256a
-			      ov2640
-			      s5k5cag
-			      st7735
-			      stmpe1600
-			      stmpe811
-			      ts3510
-			      wm8994
-			      )
-ENDIF()
-
-IF(NOT STM32BSP_FIND_COMPONENTS)
-	SET(STM32BSP_FIND_COMPONENTS ${BSP_COMPONENTS} ${COMMON_COMPONENTS})
-	MESSAGE(STATUS "No STM32BSP components selected, using all: ${STM32BSP_FIND_COMPONENTS}")
-ENDIF()
-
-
-
-FOREACH(cmp ${STM32BSP_FIND_COMPONENTS})
-	LIST(FIND BSP_COMPONENTS ${cmp} STM32BSP_FOUND_INDEX)
-	IF(${STM32BSP_FOUND_INDEX} LESS 0)
-		LIST(FIND COMMON_COMPONENTS ${cmp} COMMON_FOUND_INDEX)
-		IF(${COMMON_FOUND_INDEX} LESS 0)
-			MESSAGE(FATAL_ERROR "Unknown STM32BSP component: ${cmp}. Available components: ${BSP_COMPONENTS} and ${COMMON_COMPONENTS}")
-		ELSE()
-			LIST(APPEND BSP_COMMON_HEADER ${cmp}.h)
-			LIST(APPEND BSP_SRC ${cmp}.c)
-    		ENDIF()
-	ELSE()
-		LIST(APPEND BSP_HEADERS ${BSP_PREFIX}${cmp}.h)
-		LIST(APPEND BSP_SRC ${BSP_PREFIX}${cmp}.c)
-	ENDIF()
-ENDFOREACH()
-
-FIND_PATH(STM32BSP_INCLUDE_DIR ${BSP_HEADERS}
-	HINTS ${STM32Cube_DIR}/Drivers/BSP/${STM_BOARD}
-	CMAKE_FIND_ROOT_PATH_BOTH
-	)
-
-FOREACH(cmp ${BSP_COMMON_HEADERS})
-	FIND_PATH(STM32BSP_${cmp}_INCLUDE_DIR ${cmp}
-		HINTS ${STM32Cube_DIR}/Drivers/BSP/Components
-		PATH_SUFFIXES ${cmp}
-		CMAKE_FIND_ROOT_PATH_BOTH
-	)
-	LIST(APPEND BSP_HEADERS ${STM32BSP_${cmp}_INCLUDE_DIR})
-ENDFOREACH()
-
-FOREACH(file ${BSP_SRC})
-	STRING(REPLACE ".c" "" subfolder ${file})
-	FIND_FILE(BSP_${file}_FILE ${file}
-		HINTS ${STM32Cube_DIR}/Drivers/BSP/${STM_BOARD} ${STM32Cube_DIR}/Drivers/BSP/Components
-		PATH_SUFFIXES ${subfolder}
-		CMAKE_FIND_ROOT_PATH_BOTH
-		)
-	MESSAGE(STATUS "BSP file is " ${BSP_${file}_FILE})
-	LIST(APPEND STM32BSP_SOURCES ${BSP_${file}_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32BSP DEFAULT_MSG STM32BSP_INCLUDE_DIR STM32BSP_SOURCES)

cmake/FindSTM32HAL.cmake

@@ -1,199 +0,0 @@
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(HAL_COMPONENTS adc can cec comp cortex crc dac dma flash gpio i2c
-                       i2s irda iwdg pcd pwr rcc rtc smartcard smbus
-                       spi tim tsc uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc dac flash i2c pcd pwr rcc rtc smartcard spi tim uart)
-
-    SET(HAL_PREFIX stm32f0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(HAL_COMPONENTS adc can cec cortex crc dac dma eth flash gpio hcd i2c
-                       i2s irda iwdg nand nor pccard pcd pwr rcc rtc sd smartcard
-                       spi sram tim uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc dac flash gpio pcd rcc rtc tim)
-
-    SET(HAL_PREFIX stm32f1xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-    SET(HAL_COMPONENTS adc can cortex crc cryp dac dcmi dma eth flash
-                       gpio hash hcd i2c i2s irda iwdg nand nor pccard
-                       pcd pwr rcc rng rtc sd smartcard spi sram tim
-                       uart usart wwdg fsmc sdmmc usb)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc dac dma flash pwr rcc rtc tim)
-
-    SET(HAL_PREFIX stm32f2xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    SET(HAL_COMPONENTS adc can cec comp cortex crc dac dma flash gpio i2c i2s
-                       irda nand nor opamp pccard pcd pwr rcc rtc sdadc
-                       smartcard smbus spi sram tim tsc uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    SET(HAL_EX_COMPONENTS adc crc dac flash i2c i2s opamp pcd pwr
-                          rcc rtc smartcard spi tim uart)
-
-    SET(HAL_PREFIX stm32f3xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(HAL_COMPONENTS adc can cec cortex crc cryp dac dcmi dma dma2d eth flash
-                       flash_ramfunc fmpi2c gpio hash hcd i2c i2s irda iwdg ltdc
-                       nand nor pccard pcd pwr qspi rcc rng rtc sai sd sdram
-                       smartcard spdifrx spi sram tim uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc cryp dac dcmi dma flash fmpi2c hash i2c i2s pcd
-                          pwr rcc rtc sai tim)
-
-    SET(HAL_PREFIX stm32f4xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    SET(HAL_COMPONENTS adc can cec cortex crc cryp dac dcmi dma dma2d eth flash
-                       gpio hash hcd i2c i2s irda iwdg lptim ltdc nand nor pcd
-                       pwr qspi rcc rng rtc sai sd sdram smartcard spdifrx spi
-                       sram tim uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc cryp dac dcmi dma flash hash i2c pcd
-                          pwr rcc rtc sai tim)
-
-    SET(HAL_PREFIX stm32f7xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-    SET(HAL_COMPONENTS adc can cec cortex crc cryp dac dcmi dma dma2d eth flash
-                       gpio hash hcd i2c i2s irda iwdg lptim ltdc nand nor pcd
-                       pwr qspi rcc rng rtc sai sd sdram smartcard spdifrx spi
-                       sram tim uart usart wwdg fmc sdmmc usb)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc cryp dac dcmi dma flash hash i2c pcd
-                          pwr rcc rtc sai tim)
-
-    SET(HAL_PREFIX stm32h7xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "G0")
-    SET(HAL_COMPONENTS adc cec comp cortex crc cryp dac dma exti flash gpio i2c i2c i2s irda iwdg sptim pwr rcc rng rtc smartcard smbus spi tim uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS tim smartcard rtc rcc adc crc cryp dac dma flash pwr spi uart usart i2c)
-
-    SET(HAL_PREFIX stm32g0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(HAL_COMPONENTS adc comp cortex crc crs cryp dac dma exti firewall flash gpio i2c
-                       i2s irda iwdg lcd lptim lpuart pcd pwr rcc rng rtc smartcard
-                       smbus spi tim tsc uart usart utils wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc comp crc cryp dac flash i2c pcd pwr rcc rtc smartcard tim uart usart)
-
-    SET(HAL_PREFIX stm32l0xx_)
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-    SET(HAL_COMPONENTS adc comp cortex crc cryp dac dma flash flash_ramfunc
-					   gpio i2c i2s irda iwdg lcd nor opamp pcd pwr rcc rtc
-					   sd smartcard spi sram tim uart usart wwdg)
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr)
-    
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc cryp dac flash opamp pcd pwr rcc rtc spi tim)
-    # Components that have ll_ in names instead of hal_
-
-    SET(HAL_PREFIX stm32l1xx_)
-ELSEIF(STM32_FAMILY STREQUAL "L4")
-    SET(HAL_COMPONENTS adc can comp cortex crc cryp dac dcmi dfsdm dma dma2d dsi 
-                       firewall flash flash_ramfunc gfxmmu gpio hash hcd i2c irda iwdg
-                       lcd lptim ltdc nand nor opamp ospi pcd pwr qspi rcc rng rtc sai
-                       sd smartcard smbus spi sram swpmi tim tsc uart usart wwdg)
-
-    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
-
-    # Components that have _ex sources
-    SET(HAL_EX_COMPONENTS adc crc cryp dac dfsdm dma flash hash i2c ltdc 
-                          opamp pcd pwr rcc rtc sai sd smartcard spi tim uart usart)
-                          
-    SET(HAL_PREFIX stm32l4xx_)
-
-ENDIF()
-
-SET(HAL_HEADERS
-	${HAL_PREFIX}hal.h
-	${HAL_PREFIX}hal_def.h
-)
-
-SET(HAL_SRCS
-	${HAL_PREFIX}hal.c
-)
-IF(NOT STM32HAL_FIND_COMPONENTS)
-    SET(STM32HAL_FIND_COMPONENTS ${HAL_COMPONENTS})
-    MESSAGE(STATUS "No STM32HAL components selected, using all: ${STM32HAL_FIND_COMPONENTS}")
-ENDIF()
-
-FOREACH(cmp ${HAL_REQUIRED_COMPONENTS})
-    LIST(FIND STM32HAL_FIND_COMPONENTS ${cmp} STM32HAL_FOUND_INDEX)
-    IF(${STM32HAL_FOUND_INDEX} LESS 0)
-        LIST(APPEND STM32HAL_FIND_COMPONENTS ${cmp})
-    ENDIF()
-ENDFOREACH()
-
-FOREACH(cmp ${STM32HAL_FIND_COMPONENTS})
-    LIST(FIND HAL_COMPONENTS ${cmp} STM32HAL_FOUND_INDEX)
-    IF(${STM32HAL_FOUND_INDEX} LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown STM32HAL component: ${cmp}. Available components: ${HAL_COMPONENTS}")
-	ELSE()
-        LIST(APPEND HAL_HEADERS ${HAL_PREFIX}hal_${cmp}.h)
-        LIST(APPEND HAL_SRCS ${HAL_PREFIX}hal_${cmp}.c)
-    ENDIF()
-    LIST(FIND HAL_EX_COMPONENTS ${cmp} STM32HAL_FOUND_INDEX)
-    IF(NOT (${STM32HAL_FOUND_INDEX} LESS 0))
-        LIST(APPEND HAL_HEADERS ${HAL_PREFIX}hal_${cmp}_ex.h)
-        LIST(APPEND HAL_SRCS ${HAL_PREFIX}hal_${cmp}_ex.c)
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES HAL_HEADERS)
-LIST(REMOVE_DUPLICATES HAL_SRCS)
-
-STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-
-FIND_PATH(STM32HAL_INCLUDE_DIR ${HAL_HEADERS}
-    PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER}
-    HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Inc
-    CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FOREACH(HAL_SRC ${HAL_SRCS})
-    STRING(MAKE_C_IDENTIFIER "${HAL_SRC}" HAL_SRC_CLEAN)
-    SET(HAL_${HAL_SRC_CLEAN}_FILE HAL_SRC_FILE-NOTFOUND)
-    FIND_FILE(HAL_${HAL_SRC_CLEAN}_FILE ${HAL_SRC}
-        PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER}
-        HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Src
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    LIST(APPEND STM32HAL_SOURCES ${HAL_${HAL_SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32HAL DEFAULT_MSG STM32HAL_INCLUDE_DIR STM32HAL_SOURCES)

cmake/FindSTM32LL.cmake

@@ -1,131 +0,0 @@
-SET(STM32LL_HEADER_ONLY_COMPONENTS	bus cortex iwdg system wwdg dmamux)
-
-IF(STM32_FAMILY STREQUAL "F0")
-    SET(LL_COMPONENTS	adc bus comp cortex crc crs dac dma exti gpio i2c
-						iwdg pwr rcc rtc spi system tim usart utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F1")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma exti fsmc gpio i2c
-						iwdg pwr rcc rtc sdmmc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f1xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F2")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma exti fsmc gpio i2c iwdg pwr
-						rcc rng rtc sdmmc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f2xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F3")
-    SET(LL_COMPONENTS	adc bus comp cortex crc dac dma exti fmc gpio hrtim i2c
-						iwdg opamp pwr rcc rtc spi system tim usart utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f3xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F4")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma2d dma exti fmc fsmc gpio i2c iwdg
-						lptim pwr rcc rng rtc sdmmc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f4xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "F7")
-    SET(LL_COMPONENTS	adc bus cortex crc dac dma2d dma exti fmc gpio i2c iwdg
-						lptim pwr rcc rng rtc sdmmc spi system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32f7xx_)
-	
-ELSEIF(STM32_FAMILY STREQUAL "H7")
-    SET(LL_COMPONENTS   delayblock fmc sdmmc usb)
-
-    SET(LL_PREFIX stm32h7xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L0")
-    SET(LL_COMPONENTS	adc bus comp cortex crc crs dac dma exti gpio i2c
-						iwdg lptim lpuart pwr rcc rng rtc spi system tim usart usb
-						utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32l0xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L1")
-    SET(LL_COMPONENTS	adc bus comp cortex crc dac dma exti fsmc gpio i2c iwdg opamp
-                        pwr rcc rtc sdmmc spi tim usart utils)
-    SET(LL_REQUIRED_COMPONENTS pwr rcc utils)
-
-    SET(LL_PREFIX stm32l1xx_)
-
-ELSEIF(STM32_FAMILY STREQUAL "L4")
-    SET(LL_COMPONENTS	adc bus comp cortex crc crs dac dma2d dmamux dma exti 
-						fmc gpio i2c iwdg lptim lpuart opamp pwr rcc rng rtc sdmmc spi
-						system tim usart usb utils wwdg)
-
-    SET(LL_REQUIRED_COMPONENTS bus cortex pwr rcc system utils)
-
-    SET(LL_PREFIX stm32l4xx_)
-
-ENDIF()
-
-IF(NOT NO_STM32LL_FULL_DRIVER)
-    ADD_DEFINITIONS(-DUSE_FULL_LL_DRIVER)
-ENDIF()
-
-FOREACH(cmp ${LL_REQUIRED_COMPONENTS})
-	LIST(FIND STM32LL_FIND_COMPONENTS ${cmp} STM32LL_FOUND_INDEX)
-	IF(${STM32LL_FOUND_INDEX} LESS 0)
-		LIST(APPEND STM32LL_FIND_COMPONENTS ${cmp})
-	ENDIF()
-ENDFOREACH()
-
-FOREACH(cmp ${STM32LL_FIND_COMPONENTS})
-	LIST(FIND LL_COMPONENTS ${cmp} STM32LL_FOUND_INDEX)
-	IF(${STM32LL_FOUND_INDEX} LESS 0)
-		MESSAGE(FATAL_ERROR "Unknown STM32LL component: ${cmp}. Available components: ${LL_COMPONENTS}")
-	ELSE()
-		LIST(FIND STM32LL_HEADER_ONLY_COMPONENTS ${cmp} HEADER_ONLY_FOUND_INDEX)
-		IF(${HEADER_ONLY_FOUND_INDEX} LESS 0)
-			LIST(APPEND LL_SRCS ${LL_PREFIX}ll_${cmp}.c)
-		ENDIF()
-		LIST(APPEND LL_HEADERS ${LL_PREFIX}ll_${cmp}.h)
-	ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES LL_HEADERS)
-LIST(REMOVE_DUPLICATES LL_SRCS)
-
-STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-
-FIND_PATH(STM32LL_INCLUDE_DIR ${LL_HEADERS}
-	PATH_SUFFIXES include stm32${STM32_FAMILY_LOWER}
-	HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Inc
-	CMAKE_FIND_ROOT_PATH_BOTH
-)
-
-FOREACH(LL_SRC ${LL_SRCS})
-	STRING(MAKE_C_IDENTIFIER "${LL_SRC}" LL_SRC_CLEAN)
-	SET(LL_${LL_SRC_CLEAN}_FILE LL_SRC_FILE-NOTFOUND)
-	FIND_FILE(LL_${LL_SRC_CLEAN}_FILE ${LL_SRC}
-		PATH_SUFFIXES src stm32${STM32_FAMILY_LOWER}
-		HINTS ${STM32Cube_DIR}/Drivers/STM32${STM32_FAMILY}xx_HAL_Driver/Src
-		CMAKE_FIND_ROOT_PATH_BOTH
-	)
-	LIST(APPEND STM32LL_SOURCES ${LL_${LL_SRC_CLEAN}_FILE})
-ENDFOREACH()
-    
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32LL DEFAULT_MSG STM32LL_INCLUDE_DIR STM32LL_SOURCES)

cmake/FindSTM32STD.cmake

@@ -1,91 +0,0 @@
-IF(STM32_FAMILY STREQUAL "F4")
-    SET(STD_COMPONENTS adc can cec crc cryp dac dbgmcu dcmi dfsdm dma2d dma dsi
-        exti flash flash_ramfunc fmc fmpi2c fsmc gpio hash i2c iwdg lptim ltdc pwr qspi rcc
-        rng rtc sai sdio spdifrx spi syscfg tim usart wwdg)
-
-    SET(STD_REQUIRED_COMPONENTS dma dma2d fmc i2c ltdc gpio rcc spi usart adc tim exti syscfg)
-
-    SET(STD_EX_COMPONENTS cryp hash)
-
-    SET(STD_PREFIX stm32f4xx_)
-ENDIF()
-
-SET(STD_HEADERS
-    misc.h
-    stm32f4xx.h
-    core_cm4.h
-    )
-
-SET(STD_SRCS
-    misc.c
-    )
-
-IF(NOT STM32STD_FIND_COMPONENTS)
-        SET(STM32STD_FIND_COMPONENTS ${STD_COMPONENTS})
-    MESSAGE(STATUS "No STM32STD components selected, using all: ${STM32STD_FIND_COMPONENTS}")
-ENDIF()
-
-FOREACH(cmp ${STD_REQUIRED_COMPONENTS})
-    LIST(FIND STM32STDPERIPH_FIND_COMPONENTS ${cmp} STM32STD_FOUND_INDEX)
-    IF(${STM32STD_FOUND_INDEX} LESS 0)
-        LIST(APPEND STM32STDPERIPH_FIND_COMPONENTS ${cmp})
-    ENDIF()
-ENDFOREACH()
-
-FOREACH(cmp ${STM32STD_FIND_COMPONENTS})
-    LIST(FIND STD_COMPONENTS ${cmp} STM32STD_FOUND_INDEX)
-    IF($STM32STD_FOUND_INDEX LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown STM32STD Peripheral component: ${cmp}. Available components: ${STD_COMPONENTS}")
-    ELSE()
-        LIST(APPEND STD_HEADERS ${STD_PREFIX}${cmp}.h)
-        LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}.c)
-    ENDIF()
-    LIST(FIND STD_EX_COMPONENTS ${cmp} STM32STD_FOUND_INDEX)
-    if(NOT (${STM32STD_FOUND_INDEX} LESS 0))
-        STRING(COMPARE EQUAL ${cmp} "cryp" STM32_EQUAL)
-        if(${STM32_EQUAL})
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_aes.c)
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_des.c)
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_tdes.c)
-        ENDIF()
-        STRING(COMPARE EQUAL ${cmp} "hash" STM32_EQUAL)
-        if(${STM32_EQUAL})
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_md5.c)
-            LIST(APPEND STD_SRCS ${STD_PREFIX}${cmp}_sha1.c)
-        ENDIF()
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES STD_HEADERS)
-LIST(REMOVE_DUPLICATES STD_SRCS)
-
-FOREACH(HEADER ${STD_HEADERS})
-    FIND_PATH(STM32STD_${HEADER}_INCLUDE_DIR
-        NAMES ${HEADER}
-        PATHS
-        ${STM32STD_DIR}/Libraries/CMSIS/Device/ST/STM32F4xx/Include
-        ${STM32STD_DIR}/Libraries/CMSIS/Include
-        ${STM32STD_DIR}/Libraries/STM32F4xx_StdPeriph_Driver/inc
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-    LIST(APPEND STM32STD_INCLUDE_DIR ${STM32STD_${HEADER}_INCLUDE_DIR})
-ENDFOREACH()
-
-SET(SRC_HINTS_DIR ${STM32STD_DIR}/Libraries/STM32${STM32_FAMILY}xx_StdPeriph_Driver/src)
-
-FOREACH(STD_SRC ${STD_SRCS})
-    STRING(MAKE_C_IDENTIFIER "${STD_SRC}" STD_SRC_CLEAN)
-    SET(STD_${STD_SRC_CLEAN}_FILE STD_SRC_FILE-NOTFOUND)
-    FIND_FILE(STD_${STD_SRC_CLEAN}_FILE ${STD_SRC}
-        PATH_SUFFIXES src
-        HINTS ${SRC_HINTS_DIR}
-        CMAKE_FIND_ROOT_PATH_BOTH
-        )
-    LIST(APPEND STM32STD_SOURCES ${STD_${STD_SRC_CLEAN}_FILE})
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES STM32STD_INCLUDE_DIR)
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(STM32STD DEFAULT_MSG STM32STD_INCLUDE_DIR STM32STD_SOURCES)

cmake/FindTFLite.cmake

@@ -1,162 +0,0 @@
-SET(LIB_NAME tensorflow-microlite)
-
-IF(TF_RECACHE)
-    MESSAGE(STATUS "Rebasing TensorFlow source")
-    UNSET(TF_TAG CACHE)
-    UNSET(TF_COMMIT CACHE)
-ENDIF()
-
-IF(NOT TF_SRC)
-    INCLUDE(FetchContent)
-    IF(TF_TAG)
-        MESSAGE(STATUS "Getting TF tag '${TF_TAG}' and not master")
-        FetchContent_Declare(
-            tf 
-            GIT_REPOSITORY https://github.com/tensorflow/tensorflow.git
-            GIT_PROGRESS FALSE
-            GIT_REMOTE_UPDATE_STRATEGY REBASE_CHECKOUT
-            GIT_TAG ${TF_TAG}
-            QUIET
-            )
-    ELSEIF(TF_COMMIT)
-        MESSAGE(STATUS "Getting TF commit '${TF_COMMIT}' and not master")
-        FetchContent_Declare(
-            tf
-            GIT_REPOSITORY https://github.com/tensorflow/tensorflow.git
-            GIT_PROGRESS FALSE
-            GIT_REMOTE_UPDATE_STRATEGY REBASE_CHECKOUT
-            GIT_TAG ${TF_COMMIT}
-            QUIET
-            )
-    ELSE()
-        FetchContent_Declare(
-            tf 
-            GIT_REPOSITORY https://github.com/tensorflow/tensorflow.git
-            GIT_PROGRESS FALSE
-            GIT_REMOTE_UPDATE_STRATEGY REBASE_CHECKOUT
-            QUIET
-            )
-    ENDIF()
-    FetchContent_GetProperties(tf)
-    IF(NOT tf_POPULATED)
-        MESSAGE(STATUS "TensorFlow sources not given/populated, fetching from GH...")
-        FetchContent_Populate(tf)
-    ENDIF()
-    SET(TF_SRC ${tf_SOURCE_DIR})
-
-    FetchContent_Declare(
-        flatbuffers 
-        GIT_REPOSITORY https://github.com/google/flatbuffers.git 
-        GIT_PROGRESS FALSE 
-        QUIET
-        )
-    FetchContent_GetProperties(flatbuffers)
-    IF(NOT flatbuffers_POPULATED)
-        MESSAGE(STATUS "Now getting 'flatbuffers'...")
-        FetchContent_Populate(flatbuffers)
-    ENDIF()
-    LIST(APPEND TFL_INC_DIRS ${flatbuffers_SOURCE_DIR}/include)
-
-    FetchContent_Declare(
-        fixedpoint 
-        GIT_REPOSITORY https://github.com/google/gemmlowp.git 
-        GIT_PROGRESS FALSE 
-        QUIET 
-        )
-    FetchContent_GetProperties(fixedpoint)
-    IF(NOT fixedpoint_POPULATED)
-        MESSAGE(STATUS "And finaly 'fixedpoint'...")
-        FetchContent_Populate(fixedpoint)
-    ENDIF()
-    LIST(APPEND TFL_INC_DIRS ${fixedpoint_SOURCE_DIR})
-
-    FetchContent_Declare(
-        ruy 
-        GIT_REPOSITORY https://github.com/google/ruy.git 
-        GIT_PROGRESS FALSE 
-        QUIET 
-        )
-    FetchContent_GetProperties(ruy)
-    IF(NOT ruy_POPULATED)
-        MESSAGE(STATUS "Oh we also need 'ruy'...")
-        FetchContent_Populate(ruy)
-    ENDIF()
-    LIST(APPEND TFL_INC_DIRS ${ruy_SOURCE_DIR})
-ENDIF()
-
-SET(TFL_SRC ${TF_SRC}/tensorflow/lite)
-SET(TFLM_SRC ${TFL_SRC}/micro)
-SET(TFLD_SRC ${TFL_SRC}/tools/make/downloads)
-
-IF(EXISTS ${TFLD_SRC}/flatbuffers/include)
-    LIST(APPEND TFL_INC_DIRS ${TFLD_SRC}/flatbuffers/include)
-ENDIF()
-
-IF(EXISTS ${TFLD_SRC}/gemmlowp)
-    LIST(APPEND ${TFLD_SRC}/gemmlowp)
-ENDIF()
-
-LIST(APPEND TFL_INC_DIRS 
-    ${TF_SRC}
-    )
-
-FILE(GLOB TFL_ROOT_SRCS
-    ${TFLM_SRC}/*.cc 
-    )
-
-FILE(GLOB TFL_KERNELS_SRCS
-    ${TFLM_SRC}/kernels/*.cc 
-    ${TFL_SRC}/kernels/internal/quantization_util.cc 
-    ${TFL_SRC}/kernels/kernel_util.cc
-    )
-
-FILE(GLOB TFL_CORE_API_SRCS
-    ${TFL_SRC}/core/api/*.cc 
-    )
-
-FILE(GLOB TFL_C_SRCS
-    ${TFL_SRC}/c/common.c
-    )
-
-FILE(GLOB TFL_MEM_PLANNER_SRCS
-    ${TFLM_SRC}/memory_planner/*.cc
-    )
-
-SET(TFL_SRCS 
-    ${TFL_ROOT_SRCS}
-    ${TFL_KERNELS_SRCS}
-    ${TFL_CORE_API_SRCS}
-    ${TFL_C_SRCS}
-    ${TFL_MEM_PLANNER_SRCS}
-    )
-
-LIST(FILTER TFL_SRCS EXCLUDE REGEX "([a-z0-9_]+_test.cc)$")
-
-ADD_LIBRARY(${LIB_NAME} STATIC
-    ${TFL_SRCS}
-)
-
-TARGET_INCLUDE_DIRECTORIES(${LIB_NAME} PUBLIC
-    ${TFL_INC_DIRS}
-)
-
-TARGET_COMPILE_DEFINITIONS(${LIB_NAME} PUBLIC
-    TF_LITE_USE_GLOBAL_MAX
-    TF_LITE_USE_GLOBAL_MIN
-    TF_LITE_USE_GLOBAL_CMATH_FUNCTIONS
-    TF_LITE_STATIC_MEMORY
-    TFLITE_EMULATE_FLOAT
-    "$<$<CONFIG:RELEASE>:TF_LITE_STRIP_ERROR_STRINGS>"
-)
-
-SET(TFLite_INCLUDE_DIRS 
-    ${TFL_INC_DIRS}
-    )
-
-SET(TFLite_SOURCES 
-    ${TFL_SRCS}
-    )
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(TFLite DEFAULT_MSG TFLite_INCLUDE_DIRS TFLite_SOURCES)

cmake/FindUSBDevice.cmake

@@ -1,136 +0,0 @@
-IF(NOT STM32Cube_DIR)
-    SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-    MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-ENDIF()
-
-IF(NOT USBDevice_FIND_COMPONENTS)
-    SET(USBDevice_FIND_COMPONENTS ${USBDevice_COMPONENTS})
-    MESSAGE(STATUS "No USBDevice components selected, using all: ${USBDevice_FIND_COMPONENTS}")
-ENDIF()
-
-SET(USBDevice_SRC
-    Core/Src/usbd_ctlreq.c
-    Core/Src/usbd_core.c
-    Core/Src/usbd_ioreq.c
-#    Core/Src/usbd_conf_template.c
-)
-
-SET(USBDevice_INC
-    Core/Inc/usbd_ctlreq.h
-    Core/Inc/usbd_ioreq.h
-    Core/Inc/usbd_core.h
-#    Core/Inc/usbd_conf_template.h
-    Core/Inc/usbd_def.h
-)
-
-SET(USBDevice_COMPONENTS CDC DFU AUDIO Template MSC HID CustomHID)
-
-SET(USBDevice_COMPONENTS_CDC_HEADERS
-    Class/CDC/Inc/usbd_cdc.h
-#    Class/CDC/Inc/usbd_cdc_if_template.h
-)
-SET(USBDevice_COMPONENTS_CDC_SOURCES
-    Class/CDC/Src/usbd_cdc.c
-#    Class/CDC/Src/usbd_cdc_if_template.c
-)
-
-SET(USBDevice_COMPONENTS_DFU_HEADERS
-#    Class/DFU/Inc/usbd_dfu_media_template.h
-    Class/DFU/Inc/usbd_dfu.h
-)
-SET(USBDevice_COMPONENTS_DFU_SOURCES
-    Class/DFU/Src/usbd_dfu.c
-#    Class/DFU/Src/usbd_dfu_media_template.c
-)
-
-SET(USBDevice_COMPONENTS_AUDIO_HEADERS
-    Class/AUDIO/Inc/usbd_audio.h
-#    Class/AUDIO/Inc/usbd_audio_if_template.h
-)
-SET(USBDevice_COMPONENTS_AUDIO_SOURCES
-#    Class/AUDIO/Src/usbd_audio_if_template.c
-    Class/AUDIO/Src/usbd_audio.c
-)
-
-SET(USBDevice_COMPONENTS_Template_HEADERS
-    Class/Template/Inc/usbd_template.h
-) 
-SET(USBDevice_COMPONENTS_Template_SOURCES
-    Class/Template/Src/usbd_template.c
-)
-
-SET(USBDevice_COMPONENTS_MSC_HEADERS
-    Class/MSC/Inc/usbd_msc_scsi.h
-#    Class/MSC/Inc/usbd_msc_storage_template.h
-    Class/MSC/Inc/usbd_msc_data.h
-    Class/MSC/Inc/usbd_msc.h
-    Class/MSC/Inc/usbd_msc_bot.h
-)
-SET(USBDevice_COMPONENTS_MSC_SOURCES
-    Class/MSC/Src/usbd_msc.c
-    Class/MSC/Src/usbd_msc_data.c
-    Class/MSC/Src/usbd_msc_bot.c
-    Class/MSC/Src/usbd_msc_scsi.c
-#    Class/MSC/Src/usbd_msc_storage_template.c
-)
-
-IF(NOT USBDevice_HID_CONFIG_DIR)
-    MESSAGE(STATUS "No user defined HID sources, using library sources")
-    SET(USBDevice_COMPONENTS_HID_HEADERS
-        Class/HID/Inc/usbd_hid.h
-    )
-    SET(USBDevice_COMPONENTS_HID_SOURCES
-        Class/HID/Src/usbd_hid.c
-    )
-ELSE()
-    MESSAGE(STATUS "Using user defined HID sources in ${USBDevice_HID_CONFIG_DIR}")
-    LIST(APPEND USBDevice_SOURCES ${USBDevice_HID_CONFIG_DIR}/usbd_hid.c)
-    LIST(APPEND USBDevice_INCLUDE_DIR ${USBDevice_HID_CONFIG_DIR})
-    LIST(REMOVE_ITEM USBDevice_FIND_COMPONENTS HID)
-ENDIF()
-
-SET(USBDevice_COMPONENTS_CustomHID_HEADERS
-#    Class/CustomHID/Inc/usbd_customhid_if_template.h
-    Class/CustomHID/Inc/usbd_customhid.h
-)
-SET(USBDevice_COMPONENTS_CustomHID_SOURCES
-    Class/CustomHID/Src/usbd_customhid.c
-#    Class/CustomHID/Src/usbd_customhid_if_template.c
-)
-
-FOREACH(cmp ${USBDevice_FIND_COMPONENTS})
-    LIST(FIND USBDevice_COMPONENTS ${cmp} USBDevice_FOUND_INDEX)
-    IF(${USBDevice_FOUND_INDEX} LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown USBDevice component: ${cmp}. Available components: ${USBDevice_COMPONENTS}")
-    ENDIF()
-    LIST(FIND USBDevice_COMPONENTS ${cmp} USBDevice_FOUND_INDEX)
-    IF(NOT (${USBDevice_FOUND_INDEX} LESS 0))
-        LIST(APPEND USBDevice_INC ${USBDevice_COMPONENTS_${cmp}_HEADERS})
-        LIST(APPEND USBDevice_SRC ${USBDevice_COMPONENTS_${cmp}_SOURCES})
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES USBDevice_INC)
-LIST(REMOVE_DUPLICATES USBDevice_SRC)
-
-FOREACH(INC ${USBDevice_INC})
-    SET(INC_FILE INC_FILE-NOTFOUND)
-    GET_FILENAME_COMPONENT(INC_FILE ${STM32Cube_DIR}/Middlewares/ST/STM32_USB_Device_Library/${INC} DIRECTORY)
-    MESSAGE(STATUS "Found ${INC}: ${INC_FILE}")
-    LIST(APPEND USBDevice_INCLUDE_DIR ${INC_FILE})
-ENDFOREACH()
-LIST(REMOVE_DUPLICATES USBDevice_INCLUDE_DIR)
-
-FOREACH(SRC ${USBDevice_SRC})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/ST/STM32_USB_Device_Library
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    MESSAGE(STATUS "Found ${SRC}: ${SRC_FILE}")
-    LIST(APPEND USBDevice_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(USBDevice DEFAULT_MSG USBDevice_INCLUDE_DIR USBDevice_SOURCES)

cmake/FindUSBHost.cmake

@@ -1,117 +0,0 @@
-IF(NOT STM32Cube_DIR)
-    SET(STM32Cube_DIR "/opt/STM32Cube_FW_F1_V1.2.0")
-    MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
-ENDIF()
-
-SET(USBHost_HEADERS 
-    Core/Inc/usbh_ctlreq.h
-    Core/Inc/usbh_ioreq.h
-    Core/Inc/usbh_core.h
-    Core/Src/usbh_pipes.h
-)
-
-SET(USBHost_SRC
-    Core/Src/usbh_ctlreq.c
-    Core/Src/usbh_core.c
-    Core/Src/usbh_ioreq.c
-    Core/Src/usbh_pipes.c
-)
-
-SET(USBHost_COMPONENTS CDC AUDIO MSC HID MTP)
-
-ADD_DEFINITIONS(-DUSE_USB_HS)
-ADD_DEFINITIONS(-DUSE_HAL_DRIVER)
-
-SET(USBHost_COMPONENTS_CDC_HEADERS
-    Class/CDC/Inc/usbh_cdc.h
-)
-SET(USBHost_COMPONENTS_CDC_SOURCES
-    Class/CDC/Src/usbh_cdc.c
-)
-
-SET(USBHost_COMPONENTS_AUDIO_HEADERS
-    Class/AUDIO/Inc/usbh_audio.h
-)
-SET(USBHost_COMPONENTS_AUDIO_SOURCES
-    Class/AUDIO/Src/usbh_audio.c
-)
-
-SET(USBHost_COMPONENTS_MSC_HEADERS
-    Class/MSC/Inc/usbh_msc_scsi.h
-#    Class/MSC/Inc/usbh_msc_data.h
-    Class/MSC/Inc/usbh_msc.h
-    Class/MSC/Inc/usbh_msc_bot.h
-)
-SET(USBHost_COMPONENTS_MSC_SOURCES
-    Class/MSC/Src/usbh_msc.c
-#    Class/MSC/Src/usbh_msc_data.c
-    Class/MSC/Src/usbh_msc_bot.c
-    Class/MSC/Src/usbh_msc_scsi.c
-)
-
-SET(USBHost_COMPONENTS_HID_HEADERS  
-    Class/HID/Inc/usbh_hid_keybd.h
-    Class/HID/Inc/usbh_hid_mouse.h
-    Class/HID/Inc/usbh_hid_parser.h
-    Class/HID/Inc/usbh_hid_usage.h
-    Class/HID/Inc/usbh_hid.h
-)
-SET(USBHost_COMPONENTS_HID_SOURCES
-    Class/HID/Src/usbh_hid_keybd.c
-    Class/HID/Src/usbh_hid_mouse.c
-    Class/HID/Src/usbh_hid_parser.c
-    Class/HID/Src/usbh_hid.c
-)
-
-SET(USBHost_COMPONENTS_MTP_HEADERS
-    Class/MTP/Inc/usbh_mtp_ptp.h
-    Class/MTP/Inc/usbh_mtp.h
-)
-SET(USBHost_COMPONENTS_MTP_SOURCES
-    Class/MTP/Src/usbh_mtp_ptp.c
-    Class/MTP/Src/usbh_mtp.c
-)
-
-IF(NOT USBHost_FIND_COMPONENTS)
-    SET(USBHost_FIND_COMPONENTS ${USBHost_COMPONENTS})
-    MESSAGE(STATUS "No USBHost components selected, using all: ${USBHost_FIND_COMPONENTS}")
-ENDIF()
-
-MESSAGE(STATUS "USBHost components: ${USBHost_FIND_COMPONENTS}")
-
-FOREACH(cmp ${USBHost_FIND_COMPONENTS})
-    LIST(FIND USBHost_COMPONENTS ${cmp} USBHost_FOUND_INDEX)
-    IF(${USBHost_FOUND_INDEX} LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown USBHost component: ${cmp}. Available components: ${USBHost_COMPONENTS}")
-    ENDIF()
-    LIST(FIND USBHost_COMPONENTS ${cmp} USBHost_FOUND_INDEX)
-    IF(NOT (${USBHost_FOUND_INDEX} LESS 0))
-        LIST(APPEND USBHost_HEADERS ${USBHost_COMPONENTS_${cmp}_HEADERS})
-        LIST(APPEND USBHost_SRC ${USBHost_COMPONENTS_${cmp}_SOURCES})
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES USBHost_HEADERS)
-LIST(REMOVE_DUPLICATES USBHost_SRC)
-
-FOREACH(INC ${USBHost_HEADERS})
-    SET(INC_FILE INC_FILE-NOTFOUND)
-    GET_FILENAME_COMPONENT(INC_FILE ${STM32Cube_DIR}/Middlewares/ST/STM32_USB_Host_Library/${INC} DIRECTORY)
-    MESSAGE(STATUS "Found ${INC}: ${INC_FILE}")
-    LIST(APPEND USBHost_INCLUDE_DIRS ${INC_FILE})
-ENDFOREACH()
-LIST(REMOVE_DUPLICATES USBHost_INCLUDE_DIRS)
-
-FOREACH(SRC ${USBHost_SRC})
-    SET(SRC_FILE SRC_FILE-NOTFOUND)
-    FIND_FILE(SRC_FILE ${SRC}
-        HINTS ${STM32Cube_DIR}/Middlewares/ST/STM32_USB_Host_Library
-        CMAKE_FIND_ROOT_PATH_BOTH
-    )
-    MESSAGE(STATUS "Found ${SRC}: ${SRC_FILE}")
-    LIST(APPEND USBHost_SOURCES ${SRC_FILE})
-ENDFOREACH()
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(USBHost DEFAULT_MSG USBHost_INCLUDE_DIRS USBHost_SOURCES)

cmake/FinduGFX.cmake

@@ -1,225 +0,0 @@
-SET(uGFX_COMPONENTS gfx gadc gaudio gdisp_mcufont gdisp_fonts
-    gdisp_image gdriver gdisp gevent gfile ginput gmisc gos
-    gdisp_pixmap gqueue gtimer gtrans gwin
-    )
-
-SET(uGFX_GDISP_DRIVERS ED060SC4  AlteraFramereader framebuffer ED060SC4 Fb24bpp
-    HX8347D ILI93xx ILI9320 ILI9325 ILI9341 ILI9481 LGDP4532 Nokia6610GE8
-    Nokia6610GE12 PCD8544 PCF8812 R61505U RA8875 S6D1121 SPFD54124B SSD1289
-    SSD1306 SSD1331 SSD1351 SSD1963 SSD2119 ST7565
-    # STM32F429iDiscovery
-    STM32LTDC TestStub TLS8204)
-
-SET(uGFX_REQUIRED_COMPONENTS gfx gos gdisp gdriver)
-LIST(APPEND uGFX_COMPONENTS ${uGFX_REQUIRED_COMPONENTS})
-LIST(APPEND uGFX_COMPONENTS ${uGFX_GDISP_DRIVERS})
-
-SET(uGFX_PREFIX gfx)
-
-SET(uGFX_HEADERS
-    ${uGFX_PREFIX}.h
-    ${uGFX_PREFIX}_options.h
-    ${uGFX_PREFIX}_types.h
-    ${uGFX_PREFIX}_compilers.h
-    )
-
-SET(uGFX_SRCS
-    ${uGFX_PREFIX}.c
-    ${uGFX_PREFIX}_mk.c
-    )
-
-if(NOT uGFX_LLD_CONFIG)
-    MESSAGE("No uGFX_LLD_CONFIG given, this may result in an error")
-ELSE()
-    LIST(APPEND uGFX_INCLUDE_DIRS ${uGFX_LLD_CONFIG})
-ENDIF()
-
-# Set defaults if no components given
-IF(NOT uGFX_FIND_COMPONENTS)
-    SET(uGFX_FIND_COMPONENTS uGFX_COMPONENTS)
-    MESSAGE(STATUS "No uGFX components specified, using all: ${uGFX_COMPONENTS}")
-ENDIF()
-
-
-# Required components
-FOREACH(cmp ${uGFX_REQUIRED_COMPONENTS})
-    LIST(FIND uGFX_FIND_COMPONENTS ${cmp} uGFX_FOUND_INDEX)
-    IF(${uGFX_FOUND_INDEX} LESS 0)
-        LIST(APPEND uGFX_FIND_COMPONENTS ${cmp})
-    ENDIF()
-ENDFOREACH()
-
-IF(NOT uGFX_DRIVERS)
-    MESSAGE("No uGFX_DRIVERS set, available drivers: ${uGFX_GDISP_DRIVERS}")
-ELSE()
-    FOREACH(driver ${uGFX_DRIVERS})
-        LIST(FIND uGFX_GDISP_DRIVERS ${driver} DRIVER_INDEX)
-        IF(${DRIVER_INDEX} LESS 0)
-            LIST(APPEND uGFX_FIND_DRIVERS ${driver})
-        ENDIF()
-    ENDFOREACH()
-ENDIF()
-
-FOREACH(cmp ${uGFX_FIND_COMPONENTS})
-    LIST(FIND uGFX_COMPONENTS ${cmp} uGFX_FOUND_INDEX)
-    IF(${uGFX_FOUND_INDEX} LESS 0)
-        MESSAGE(FATAL_ERROR "Unknown uGFX Module: ${cmp}. Available modules: ${uGFX_COMPONENTS}")
-    ELSE()
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES uGFX_FIND_COMPONENTS)
-
-INCLUDE(uGFX_GDISP)
-
-SET(uGFX_gfx_SEARCH_PATH ${uGFX_DIR} ${uGFX_DIR}/src)
-SET(uGFX_gfx_HEADERS gfx.h)
-SET(uGFX_gfx_SOURCES gfx.c)
-
-SET(uGFX_gadc_SEARCH_PATH ${uGFX_DIR}/src/gadc)
-SET(uGFX_gadc_HEADERS gadc_driver.h gadc.h gadc_options.h gadc_rules.h)
-SET(uGFX_gadc_SOURCES gadc.c)
-
-SET(uGFX_gaudio_SERCH_PATH ${uGFX_DIR}/src/gaudio)
-SET(uGFX_gaudio_HEADERS gadc_driver_record.h gaudio_driver_play.h
-    gaudio.h gaudio_options.h gaudio_rules.h)
-SET(uGFX_gaudio_SOURCES gaudio.c)
-
-SET(uGFX_gdriver_SEARCH_PATH ${uGFX_DIR}/src/gdriver)
-SET(uGFX_gdriver_HEADERS gdriver_options.h gdriver_rules.h gdriver.h)
-SET(uGFX_gdriver_SOURCES gdriver.c)
-
-SET(uGFX_gevent_SEARCH_PATH ${uGFX_DIR}/src/gevent)
-SET(uGFX_gevent_HEADERS gevent.h gevent_options.h gevent_rules.h)
-SET(uGFX_gevent_SOURCES gevent.c)
-
-SET(uGFX_gfile_SEARCH_PATH ${uGFX_DIR}/src/gfile)
-SET(uGFX_gfile_HEADERS gfile_fatfs_wrapper.h gfile_fs.h gfile.h gfile_options.h
-    gfile_petitfs_wrapper.h gfile_rules.h)
-SET(uGFX_gfile_SOURCES gfile.c gfile_fatfs_diskio_chibios.c gfile_fatfs_wrapper.c
-    gfile_fs_chibios.c gfile_fs_fatfs.c gfile_fs_mem.c gfile_fs_native.c
-    gfile_fs_petitfs.c gfile_fs_ram.c gfile_fs_rom.c gfile_fs_strings.c
-    gfile_petitfs_diskio_chibios.c gfile_petitfs_wrapper.c gfile_printg.c
-    gfile_scang.c gfile_stdio.c)
-
-SET(uGFX_ginput_SEARCH_PATH ${uGFX_DIR}/src/ginput)
-SET(uGFX_ginput_HEADERS ginput_dial.h ginput_driver_dial.h ginput_driver_keyboard.h
-    ginput_driver_mouse.h ginput_driver_toggle.h ginput.h ginput_keyboard.h
-    ginput_keyboard_microcode.h ginput_mouse.h ginput_options.h ginput_rules.h
-    ginput_toggle.h)
-SET(uGFX_ginput_SOURCES ginput.c ginput_dial.c ginput_keyboard.c
-    ginput_keyboard_microcode.c ginput_mouse.c ginput_toggle.c)
-
-SET(uGFX_gmisc_SEARCH_PATH ${uGFX_DIR}/src/gmisc)
-SET(uGFX_gmisc_HEADERS gmisc.h gmisc_options.h gmisc_rules.h)
-SET(uGFX_gmisc_SOURCES gmisc_arrayops.c gmisc.c gmisc_hittest.c gmisc_matrix2d.c
-    gmisc_trig.c)
-
-SET(uGFX_gos_SEARCH_PATH ${uGFX_DIR}/src/gos)
-SET(uGFX_gos_HEADERS
-    gos_arduino.h gos_chibios.h gos_cmsis2.h gos_cmsis.h gos_ecos.h
-    gos_freertos.h gos.h gos_keil.h gos_linux.h gos_nios.h gos_options.h
-    gos_osx.h gos_qt.h gos_raw32.h gos_rawrtos.h gos_rtx5.h gos_rules.h
-    gos_win32.h gos_x_heap.h gos_x_threads_cortexm01.h gos_x_threads_cortexm347.h
-    gos_x_threads_cortexm47fp.h gos_x_threads.h gos_zephyr.h
-    )
-SET(uGFX_gos_SOURCES gos_arduino.c gos_chibios.c gos_cmsis2.c gos_cmsis.c
-    gos_ecos.c gos_freertos.c gos_linux.c gos_nios.c gos_osx.c gos_raw32.c
-    gos_rawrtos.c gos_win32.c gos_x_heap.c gos_x_threads.c gos_zephyr.c)
-
-SET(uGFX_gqueue_SEARCH_PATH ${uGFX_DIR}/src/gqueue)
-SET(uGFX_gqueue_HEADERS gqueue.h gqueue_options.h gqueue_rules.h)
-SET(uGFX_gqueue_SOURCES gqueue.c)
-
-SET(uGFX_gtimer_SEARCH_PATH ${uGFX_DIR}/src/gtimer)
-SET(uGFX_gtimer_HEADERS gtimer.h gtimer_options.h gtimer_rules.h)
-SET(uGFX_gtimer_SOURCES gtimer.c)
-
-SET(uGFX_gtrans_SEARCH_PATH ${uGFX_DIR}/src/gtrans)
-SET(uGFX_gtrans_HEADERS gtrans.h gtrans_options.h gtrans_rules.h)
-SET(uGFX_gtrans_SOURCES gtrans.c)
-
-SET(uGFX_gwin_SEARCH_PATH ${uGFX_DIR}/src/gwin)
-SET(uGFX_gwin_HEADERS gwin_button.h gwin_container.h gwin.h gwin_label.h gwin_radio.h
-    gwin_textedit.h gwin_checkbox.h gwin_frame.h gwin_image.h gwin_list.h
-    gwin_rules.h gwin_widget.h gwin_class.h gwin_gl3d.h gwin_keyboard.h gwin_options.h
-    gwin_slider.h gwin_console.h gwin_graph.h gwin_keyboard_layout.h
-    gwin_progressbar.h gwin_tabset.h
-    )
-SET(uGFX_gwin_SOURCES gwin_button.c gwin_container.c gwin_image.c gwin_list.c
-    gwin_slider.c gwin_wm.c gwin.c gwin_frame.c gwin_keyboard.c gwin_tabset.c
-    gwin_checkbox.c gwin_gl3d.c gwin_keyboard_layout.c gwin_progressbar.c gwin_textedit.c
-    gwin_console.c gwin_graph.c gwin_label.c gwin_radio.c gwin_widget.c)
-
-SET(uGFX_gdisp_fonts_SEARCH_PATH
-    ${uGFX_DIR}/src/gdisp/fonts
-    )
-
-SET(uGFX_gdisp_fonts_HEADERS
-    fonts.h
-    )
-SET(uGFX_gdisp_fonts_SOURCES
-    DejaVuSans16_aa.c DejaVuSans24_aa.c DejaVuSansBold12_aa.c fixed_10x20.c
-    fixed_7x14.c UI2.c DejaVuSans10.c DejaVuSans16.c DejaVuSans24.c DejaVuSansBold12.c
-    DejaVuSans12_aa.c  DejaVuSans20_aa.c  DejaVuSans32_aa.c  fixed_5x8.c
-    LargeNumbers.c DejaVuSans12.c DejaVuSans20.c DejaVuSans32.c UI1.c
-    )
-
-SET(uGFX_gdisp_mcufont_SEARCH_PATH
-    ${uGFX_DIR}/src/gdisp
-    ${uGFX_DIR}/src/gdisp/mcufont
-    )
-SET(uGFX_gdisp_mcufont_HEADERS
-    mcufont.h mf_bwfont.h mf_config.h mf_encoding.h mf_font.h mf_justify.h
-    mf_kerning.h mf_rlefont.h mf_scaledfont.h mf_wordwrap.h)
-SET(uGFX_gdisp_mcufont_SOURCES
-    mf_bwfont.c mf_encoding.c mf_font.c mf_justify.c mf_kerning.c mf_rlefont.c
-    mf_scaledfont.c mf_wordwrap.c gdisp_fonts.c)
-
-SET(uGFX_gdisp_image_SEARCH_PATH ${uGFX_DIR}/src/gdisp)
-SET(uGFX_gdisp_image_HEADERS gdisp_image.h)
-SET(uGFX_gdisp_image_SOURCES
-    gdisp_image_bmp.c gdisp_image_gif.c gdisp_image_gif.c gdisp_image_jpg.c
-    gdisp_image_native.c gdisp_image_png.c gdisp_image.c)
-
-SET(uGFX_gdisp_pixmap_SEARCH_PATH ${uGFX_DIR}/src/gdisp)
-SET(uGFX_gdisp_pixmap_HEADERS gdisp_pixmap.h)
-SET(uGFX_gdisp_pixmap_SOURCES gdisp_pixmap.c)
-
-
-
-FOREACH(comp ${uGFX_FIND_COMPONENTS})
-    LIST(FIND uGFX_COMPONENTS ${comp} INDEX)
-    IF(INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Unknown uGFX component: ${comp}\nSupported uGFX components: ${uGFX_COMPONENTS}")
-    ENDIF()
-    IF(uGFX_${comp}_SOURCES)
-        FOREACH(source ${uGFX_${comp}_SOURCES})
-            FIND_FILE(uGFX_${comp}_${source}
-                NAMES ${source}
-                PATHS ${uGFX_${comp}_SEARCH_PATH}
-                NO_DEFAULT_PATH
-                CMAKE_FIND_ROOT_PATH_BOTH
-                )
-            LIST(APPEND uGFX_SOURCES ${uGFX_${comp}_${source}})
-        ENDFOREACH()
-    ENDIF()
-    IF(uGFX_${comp}_HEADERS)
-        FOREACH(header ${uGFX_${comp}_HEADERS})
-            FIND_PATH(uGFX_${comp}_${header}_INCLUDE_DIR
-                NAMES ${header}
-                PATHS ${uGFX_${comp}_SEARCH_PATH}
-                NO_DEFAULT_PATH
-                CMAKE_FIND_ROOT_PATH_BOTH
-                )
-            LIST(APPEND uGFX_INCLUDE_DIRS ${uGFX_${comp}_${header}_INCLUDE_DIR})
-        ENDFOREACH()
-    ENDIF()
-ENDFOREACH()
-
-LIST(REMOVE_DUPLICATES uGFX_INCLUDE_DIRS)
-LIST(REMOVE_DUPLICATES uGFX_SOURCES)
-
-INCLUDE(FindPackageHandleStandardArgs)
-
-FIND_PACKAGE_HANDLE_STANDARD_ARGS(uGFX DEFAULT_MSG uGFX_INCLUDE_DIRS uGFX_SOURCES)

cmake/gcc_stm32.cmake

@@ -1,212 +0,0 @@
-GET_FILENAME_COMPONENT(STM32_CMAKE_DIR ${CMAKE_CURRENT_LIST_FILE} DIRECTORY)
-SET(CMAKE_MODULE_PATH ${STM32_CMAKE_DIR} ${CMAKE_MODULE_PATH})
-
-SET(STM32_SUPPORTED_FAMILIES L0 L1 L4 F0 F1 F2 F3 F4 F7 G0 H7 CACHE INTERNAL "stm32 supported families")
-
-IF(STM32_CHIP)
-	 SET(STM32_CHIP "${STM32_CHIP}" CACHE STRING "STM32 chip to build for")
-ENDIF()
-
-IF(NOT TOOLCHAIN_PREFIX)
-     SET(TOOLCHAIN_PREFIX "/usr")
-     MESSAGE(STATUS "No TOOLCHAIN_PREFIX specified, using default: " ${TOOLCHAIN_PREFIX})
-ELSE()
-     FILE(TO_CMAKE_PATH "${TOOLCHAIN_PREFIX}" TOOLCHAIN_PREFIX)
-ENDIF()
-
-IF(NOT TARGET_TRIPLET)
-    SET(TARGET_TRIPLET "arm-none-eabi")
-    MESSAGE(STATUS "No TARGET_TRIPLET specified, using default: " ${TARGET_TRIPLET})
-ENDIF()
-
-IF(NOT STM32_FAMILY)
-    MESSAGE(STATUS "No STM32_FAMILY specified, trying to get it from STM32_CHIP")
-    IF(NOT STM32_CHIP)
-        SET(STM32_FAMILY "F1" CACHE INTERNAL "stm32 family")
-        MESSAGE(STATUS "Neither STM32_FAMILY nor STM32_CHIP specified, using default STM32_FAMILY: ${STM32_FAMILY}")
-    ELSE()
-        STRING(REGEX REPLACE "^[sS][tT][mM]32(([fF][0-47])|([gG][0])|([hH]7)|([lL][0-14])|([tT])|([wW])).+$" "\\1" STM32_FAMILY ${STM32_CHIP})
-        STRING(TOUPPER ${STM32_FAMILY} STM32_FAMILY)
-        MESSAGE(STATUS "Selected STM32 family: ${STM32_FAMILY}")
-    ENDIF()
-ENDIF()
-
-STRING(TOUPPER "${STM32_FAMILY}" STM32_FAMILY)
-LIST(FIND STM32_SUPPORTED_FAMILIES "${STM32_FAMILY}" FAMILY_INDEX)
-IF(FAMILY_INDEX EQUAL -1)
-    MESSAGE(FATAL_ERROR "Invalid/unsupported STM32 family: ${STM32_FAMILY}")
-ENDIF()
-
-SET(TOOLCHAIN_BIN_DIR "${TOOLCHAIN_PREFIX}/bin")
-SET(TOOLCHAIN_INC_DIR "${TOOLCHAIN_PREFIX}/${TARGET_TRIPLET}/include")
-SET(TOOLCHAIN_LIB_DIR "${TOOLCHAIN_PREFIX}/${TARGET_TRIPLET}/lib")
-
-SET(CMAKE_SYSTEM_NAME Generic)
-SET(CMAKE_SYSTEM_PROCESSOR arm)
-
-IF (WIN32)
-    SET(TOOL_EXECUTABLE_SUFFIX ".exe")
-ELSE()
-    SET(TOOL_EXECUTABLE_SUFFIX "")
-ENDIF()
-
-IF(${CMAKE_VERSION} VERSION_LESS 3.6.0)
-    INCLUDE(CMakeForceCompiler)
-    CMAKE_FORCE_C_COMPILER("${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc${TOOL_EXECUTABLE_SUFFIX}" GNU)
-    CMAKE_FORCE_CXX_COMPILER("${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-g++${TOOL_EXECUTABLE_SUFFIX}" GNU)
-ELSE()
-    SET(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
-    SET(CMAKE_C_COMPILER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc${TOOL_EXECUTABLE_SUFFIX}")
-    SET(CMAKE_CXX_COMPILER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-g++${TOOL_EXECUTABLE_SUFFIX}")
-ENDIF()
-SET(CMAKE_ASM_COMPILER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc${TOOL_EXECUTABLE_SUFFIX}")
-
-SET(CMAKE_OBJCOPY "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objcopy${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "objcopy tool")
-SET(CMAKE_OBJDUMP "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objdump${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "objdump tool")
-SET(CMAKE_SIZE "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-size${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "size tool")
-SET(CMAKE_DEBUGER "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gdb${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "debuger")
-SET(CMAKE_CPPFILT "${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-c++filt${TOOL_EXECUTABLE_SUFFIX}" CACHE INTERNAL "C++filt")
-
-SET(CMAKE_C_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "c compiler flags debug")
-SET(CMAKE_CXX_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "cxx compiler flags debug")
-SET(CMAKE_ASM_FLAGS_DEBUG "-g" CACHE INTERNAL "asm compiler flags debug")
-SET(CMAKE_EXE_LINKER_FLAGS_DEBUG "-Xlinker -Map=output.map" CACHE INTERNAL "linker flags debug")
-
-SET(CMAKE_C_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "c compiler flags release")
-SET(CMAKE_CXX_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "cxx compiler flags release")
-SET(CMAKE_ASM_FLAGS_RELEASE "" CACHE INTERNAL "asm compiler flags release")
-SET(CMAKE_EXE_LINKER_FLAGS_RELEASE "-Xlinker -Map=output.map -s -flto" CACHE INTERNAL "linker flags release")
-
-SET(CMAKE_FIND_ROOT_PATH "${TOOLCHAIN_PREFIX}/${TARGET_TRIPLET}" ${EXTRA_FIND_PATH})
-SET(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-SET(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-SET(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-
-FUNCTION(STM32_ADD_HEX_BIN_TARGETS TARGET)
-    IF(EXECUTABLE_OUTPUT_PATH)
-      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
-    ELSE()
-      SET(FILENAME "${TARGET}")
-    ENDIF()
-    ADD_CUSTOM_TARGET(${TARGET}.hex ALL DEPENDS ${TARGET} COMMAND ${CMAKE_OBJCOPY} -Oihex ${FILENAME} ${FILENAME}.hex)
-    ADD_CUSTOM_TARGET(${TARGET}.bin ALL DEPENDS ${TARGET} COMMAND ${CMAKE_OBJCOPY} -Obinary ${FILENAME} ${FILENAME}.bin)
-ENDFUNCTION()
-
-FUNCTION(STM32_ADD_DUMP_TARGET TARGET)
-    IF(EXECUTABLE_OUTPUT_PATH)
-      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
-    ELSE()
-      SET(FILENAME "${TARGET}")
-    ENDIF()
-    ADD_CUSTOM_TARGET(${TARGET}.dump DEPENDS ${TARGET} COMMAND ${CMAKE_OBJDUMP} -x -D -S -s ${FILENAME} | ${CMAKE_CPPFILT} > ${FILENAME}.dump)
-ENDFUNCTION()
-
-FUNCTION(STM32_PRINT_SIZE_OF_TARGETS TARGET)
-    IF(EXECUTABLE_OUTPUT_PATH)
-      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
-    ELSE()
-      SET(FILENAME "${TARGET}")
-    ENDIF()
-    add_custom_command(TARGET ${TARGET} POST_BUILD COMMAND ${CMAKE_SIZE} ${FILENAME})
-ENDFUNCTION()
-
-STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-INCLUDE(gcc_stm32${STM32_FAMILY_LOWER})
-
-FUNCTION(STM32_SET_FLASH_PARAMS TARGET STM32_FLASH_SIZE STM32_RAM_SIZE STM32_CCRAM_SIZE STM32_MIN_STACK_SIZE STM32_MIN_HEAP_SIZE STM32_FLASH_ORIGIN STM32_RAM_ORIGIN STM32_CCRAM_ORIGIN)
-    IF(NOT STM32_LINKER_SCRIPT)
-        MESSAGE(STATUS "No linker script specified, generating default")
-        INCLUDE(stm32_linker)
-        FILE(WRITE ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld ${STM32_LINKER_SCRIPT_TEXT})
-    ELSE()
-        CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
-    ENDIF()
-
-    GET_TARGET_PROPERTY(TARGET_LD_FLAGS ${TARGET} LINK_FLAGS)
-    IF(TARGET_LD_FLAGS)
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\" ${TARGET_LD_FLAGS}")
-    ELSE()
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\"")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES LINK_FLAGS ${TARGET_LD_FLAGS})
-ENDFUNCTION()
-
-FUNCTION(STM32_SET_FLASH_PARAMS TARGET FLASH_SIZE RAM_SIZE)
-    IF(NOT STM32_FLASH_ORIGIN)
-        SET(STM32_FLASH_ORIGIN "0x08000000")
-    ENDIF()
-
-    IF(NOT STM32_RAM_ORIGIN)
-        SET(STM32_RAM_ORIGIN "0x20000000")
-    ENDIF()
-
-    IF(NOT STM32_MIN_STACK_SIZE)
-        SET(STM32_MIN_STACK_SIZE "0x200")
-    ENDIF()
-
-    IF(NOT STM32_MIN_HEAP_SIZE)
-        SET(STM32_MIN_HEAP_SIZE "0")
-    ENDIF()
-
-    IF(NOT STM32_CCRAM_ORIGIN)
-        SET(STM32_CCRAM_ORIGIN "0x10000000")
-    ENDIF()
-
-    IF(NOT STM32_LINKER_SCRIPT)
-        MESSAGE(STATUS "No linker script specified, generating default")
-        INCLUDE(stm32_linker)
-        FILE(WRITE ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld ${STM32_LINKER_SCRIPT_TEXT})
-    ELSE()
-        CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
-    ENDIF()
-
-    GET_TARGET_PROPERTY(TARGET_LD_FLAGS ${TARGET} LINK_FLAGS)
-    IF(TARGET_LD_FLAGS)
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\" ${TARGET_LD_FLAGS}")
-    ELSE()
-        SET(TARGET_LD_FLAGS "\"-T${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld\"")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES LINK_FLAGS ${TARGET_LD_FLAGS})
-ENDFUNCTION()
-
-FUNCTION(STM32_SET_TARGET_PROPERTIES TARGET)
-    IF(NOT STM32_CHIP_TYPE)
-        IF(NOT STM32_CHIP)
-            MESSAGE(WARNING "Neither STM32_CHIP_TYPE nor STM32_CHIP selected, you'll have to use STM32_SET_CHIP_DEFINITIONS directly")
-        ELSE()
-            STM32_GET_CHIP_TYPE(${STM32_CHIP} STM32_CHIP_TYPE)
-        ENDIF()
-    ENDIF()
-    STM32_SET_CHIP_DEFINITIONS(${TARGET} ${STM32_CHIP_TYPE})
-    IF(((NOT STM32_FLASH_SIZE) OR (NOT STM32_RAM_SIZE)) AND (NOT STM32_CHIP))
-        MESSAGE(FATAL_ERROR "Cannot get chip parameters. Please specify either STM32_CHIP or STM32_FLASH_SIZE/STM32_RAM_SIZE")
-    ENDIF()
-    IF((NOT STM32_FLASH_SIZE) OR (NOT STM32_RAM_SIZE))
-        STM32_GET_CHIP_PARAMETERS(${STM32_CHIP} STM32_FLASH_SIZE STM32_RAM_SIZE STM32_CCRAM_SIZE)
-        IF((NOT STM32_FLASH_SIZE) OR (NOT STM32_RAM_SIZE))
-            MESSAGE(FATAL_ERROR "Unknown chip: ${STM32_CHIP}. Try to use STM32_FLASH_SIZE/STM32_RAM_SIZE directly.")
-        ENDIF()
-    ENDIF()
-    STM32_SET_FLASH_PARAMS(${TARGET} ${STM32_FLASH_SIZE} ${STM32_RAM_SIZE})
-    MESSAGE(STATUS "${STM32_CHIP} has ${STM32_FLASH_SIZE}iB of flash memory and ${STM32_RAM_SIZE}iB of RAM")
-ENDFUNCTION()
-
-FUNCTION(STM32_SET_HSE_VALUE TARGET STM32_HSE_VALUE)
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "HSE_VALUE=${STM32_HSE_VALUE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "HSE_VALUE=${STM32_HSE_VALUE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()
-
-MACRO(STM32_GENERATE_LIBRARIES NAME SOURCES LIBRARIES)
-    STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-    FOREACH(CHIP_TYPE ${STM32_CHIP_TYPES})
-        STRING(TOLOWER ${CHIP_TYPE} CHIP_TYPE_LOWER)
-        LIST(APPEND ${LIBRARIES} ${NAME}_${STM32_FAMILY_LOWER}_${CHIP_TYPE_LOWER})
-        ADD_LIBRARY(${NAME}_${STM32_FAMILY_LOWER}_${CHIP_TYPE_LOWER} ${SOURCES})
-        STM32_SET_CHIP_DEFINITIONS(${NAME}_${STM32_FAMILY_LOWER}_${CHIP_TYPE_LOWER} ${CHIP_TYPE})
-    ENDFOREACH()
-ENDMACRO()

cmake/gcc_stm32f0.cmake

@@ -1,94 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m0 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 030x6 030x8 031x6 038xx 042x6 048x6 051x8 058xx 070x6 070xB 071xB 072xB 078xx 091xC 098xx 030xC CACHE INTERNAL "stm32f0 chip types")
-SET(STM32_CODES "030.[46]" "030.8" "031.[46]" "038.6" "042.[46]" "048.6" "051.[468]" "058.8" "070.6" "070.B" "071.[8B]" "072.[8B]" "078.B" "091.[BC]" "098.C" "030.C")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]((03[018].[468C])|(04[28].[46])|(05[18].[468])|(07[0128].[68B])|(09[18].[BC])).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](0[34579][0128]).[468BC].*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]0[34579][0128].([468BC]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "4")
-        SET(FLASH "16K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL 030x6)
-        SET(RAM "4K")
-    ELSEIF(${TYPE} STREQUAL 030x8)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 030xC)
-        SET(RAM "32K")
-    ELSEIF(${TYPE} STREQUAL 031x6)
-        SET(RAM "4K")
-    ELSEIF(${TYPE} STREQUAL 038xx)
-        SET(RAM "4K")
-    ELSEIF(${TYPE} STREQUAL 042x6)
-        SET(RAM "6K")
-    ELSEIF(${TYPE} STREQUAL 048x6)
-        SET(RAM "6K")
-    ELSEIF(${TYPE} STREQUAL 051x8)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 058xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 070x6)
-        SET(RAM "6K")
-    ELSEIF(${TYPE} STREQUAL 070xB)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 071xB)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 072xB)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 078xx)
-        SET(RAM "16K")
-    ELSEIF(${TYPE} STREQUAL 091xC)
-        SET(RAM "32K")
-    ELSEIF(${TYPE} STREQUAL 098xx)
-        SET(RAM "32K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F0 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F0;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F0;STM32F${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32f1.cmake

@@ -1,134 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m3 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 100xB 100xE 101x6 101xB 101xE 101xG 102x6 102xB 103x6 103xB 103xE 103xG 105xC 107xC CACHE INTERNAL "stm32f1 chip types")
-SET(STM32_CODES "100.[468B]" "100.[CDE]" "101.[46]" "101.[8B]" "101.[CDE]" "101.[FG]" "102.[46]" "102.[8B]" "103.[46]" "103.[8B]" "103.[CDE]" "103.[FG]" "105.[8BC]" "107.[BC]")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](10[012357].[468BCDEFG]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](10[012357]).[468BCDEFG].*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]10[012357].([468BCDEFG]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "4")
-        SET(FLASH "16K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "D")
-        SET(FLASH "384K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "F")
-        SET(FLASH "768K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL 100xB)
-        IF((STM32_SIZE_CODE STREQUAL "4") OR (STM32_SIZE_CODE STREQUAL "6"))
-            SET(RAM "4K")
-        ELSE()
-            SET(RAM "8K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 100xE)
-        IF(STM32_SIZE_CODE STREQUAL "C")
-            SET(RAM "24K")
-        ELSE()
-            SET(RAM "32K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101x6)
-        IF(STM32_SIZE_CODE STREQUAL "4")
-            SET(RAM "4K")
-        ELSE()
-            SET(RAM "6K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101xB)
-        IF(STM32_SIZE_CODE STREQUAL "8")
-            SET(RAM "10K")
-        ELSE()
-            SET(RAM "16K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101xE)
-        IF(STM32_SIZE_CODE STREQUAL "C")
-            SET(RAM "32K")
-        ELSE()
-            SET(RAM "48K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 101xG)
-        SET(RAM "80K")
-    ELSEIF(${TYPE} STREQUAL 102x6)
-        IF(STM32_SIZE_CODE STREQUAL "4")
-            SET(RAM "4K")
-        ELSE()
-            SET(RAM "6K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 102xB)
-        IF(STM32_SIZE_CODE STREQUAL "8")
-            SET(RAM "10K")
-        ELSE()
-            SET(RAM "16K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 103x6)
-        IF(STM32_SIZE_CODE STREQUAL "4")
-            SET(RAM "6K")
-        ELSE()
-            SET(RAM "10K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 103xB)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 103xE)
-        IF(STM32_SIZE_CODE STREQUAL "C")
-            SET(RAM "48K")
-        ELSE()
-            SET(RAM "54K")
-        ENDIF()
-    ELSEIF(${TYPE} STREQUAL 103xG)
-        SET(RAM "96K")
-    ELSEIF(${TYPE} STREQUAL 105xC)
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL 107xC)
-        SET(RAM "64K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F1 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F1;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F1;STM32F${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32f2.cmake

@@ -1,72 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m3 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 205xB 205xC 205xE 205xF 205xG 215xE 215xG 207xC 207xE 207xF 207xG 217xE 217xG)
-SET(STM32_CODES "205.B" "205.C" "205.E" "205.F" "205.G" "215.E" "215.G" "207.C" "207.E" "207.F" "207.G" "217.E" "217.G")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](2[01][57].[BCDEFG]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]2[01][57].([BCDEFG]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "D")
-        SET(FLASH "384K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "F")
-        SET(FLASH "768K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    SET(RAM "128K")
-
-    IF(${TYPE} STREQUAL 205xC)
-        SET(RAM "96K")
-    ELSEIF(${TYPE} STREQUAL 205xB)
-        SET(RAM "64K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F2 chip type: ${CHIP_TYPE}")
-    ENDIF()
-
-    STRING(REGEX REPLACE "^(2[01][57]).[BCDEFG]" "\\1" DEVICE_NUM ${STM32_CHIP_TYPE})
-
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F2;STM32F${DEVICE_NUM}xx;${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F2;STM32F${DEVICE_NUM}xx")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32f3.cmake

@@ -1,81 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -g -Wa,--no-warn -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 301xx 302xx 303xx 334xx 373xx CACHE INTERNAL "stm32f3 chip types")
-SET(STM32_CODES "301.." "302.." "303.." "334.." "373..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](3[037][1234].[68BC]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](3[037][1234].[68BC]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]3[037][1234].([68BC]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-        SET(CCRAM_SIZE_IN_K "4")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-        SET(CCRAM_SIZE_IN_K "4")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-        SET(CCRAM_SIZE_IN_K "8")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-        SET(CCRAM_SIZE_IN_K "8")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL "301xx")
-        SET(RAM_SIZE_IN_K "16")
-    ELSEIF(${TYPE} STREQUAL "302xx")
-        SET(RAM_SIZE_IN_K "256")
-    ELSEIF(${TYPE} STREQUAL "303xx")
-        SET(RAM_SIZE_IN_K "48")
-    ELSEIF(${TYPE} STREQUAL "334xx")
-        SET(RAM_SIZE_IN_K "16")
-    ELSEIF(${TYPE} STREQUAL "373xx")
-        SET(RAM_SIZE_IN_K "128")
-    ENDIF()
-
-    # RAM size = total RAM - CCRAM
-    MATH(EXPR RAM_SIZE_IN_K "${RAM_SIZE_IN_K}-${CCRAM_SIZE_IN_K}")
-    # Append the 'K' literal to the numbers
-    SET(RAM "${RAM_SIZE_IN_K}K")
-    SET(CCRAM "${CCRAM_SIZE_IN_K}K")
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} ${CCRAM})
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F3 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    STRING(REGEX REPLACE "^(3..).(.)" "\\1x\\2" CHIP_TYPE_2 ${STM32_CODE})
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F3;STM32F${CHIP_TYPE_2};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F3;STM32F${CHIP_TYPE_2}")
-    ENDIF()
-
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32f4.cmake

@@ -1,86 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=gnu11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=c++14 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 405xx 415xx 407xx 417xx 427xx 437xx 429xx 439xx 446xx 401xC 401xE 411xE CACHE INTERNAL "stm32f4 chip types")
-SET(STM32_CODES "405.." "415.." "407.." "417.." "427.." "437.." "429.." "439.." "446.." "401.[CB]" "401.[ED]" "411.[CE]")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](4[01234][15679].[BCEGI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](4[01234][15679].[BCEGI]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]4[01234][15679].([BCEGI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "401xC")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "401xE")
-        SET(RAM "96K")
-    ELSEIF(${TYPE} STREQUAL "411xE")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "405xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "415xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "407xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "417xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "427xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "437xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "429xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "439xx")
-        SET(RAM "192K")
-    ELSEIF(${TYPE} STREQUAL "446xx")
-        SET(RAM "128K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "64K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F4 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F4;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F4;STM32F${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32f7.cmake

@@ -1,75 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 745xx 746xx 756xx 765xx 767xx 777xx 769xx 779xx CACHE INTERNAL "stm32f7 chip types")
-SET(STM32_CODES "745.." "746.." "756.." "765.." "767.." "777.." "769.." "779..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](7[4567][5679].[EGI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](7[4567][5679].[EGI]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]7[4567][5679].([EGI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "745xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "746xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "756xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "765xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "767xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "777xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "769xx")
-        SET(RAM "512K")
-    ELSEIF(${TYPE} STREQUAL "779xx")
-        SET(RAM "512K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    # First 64K of RAM are already CCM...
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F7 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32F7;STM32F${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32F7;STM32F${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32g0.cmake

@@ -1,78 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0plus -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0plus -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m0plus -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m0 -mabi=aapcs --specs=nano.specs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m0plus -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m0plus -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 070xB 071x8 071xB 081xB 041x8 031x8 041x6 031x6 031x4  CACHE INTERNAL "stm32g0 chip types")
-SET(STM32_CODES     "070.B" "071.8" "071.B" "081.B" "041.8" "031.8" "041.6" "031.6" "031.4")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(SUBSTRING ${CHIP} 6 5 STM32_CODE)
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[gG](0[3478][1]).([468BJ]$|[68BCDE][AX]$)" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[gG](0[3478][1]).([468BJ]$|[68BCDE][AX]$)" "\\2" STM32_SIZE_CODE ${CHIP})
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-
-    IF(${TYPE} STREQUAL 071x8)
-        SET(RAM "36K")
-        SET(FLASH "64K")
-    ELSEIF(${TYPE} STREQUAL 070xB)
-        SET(RAM "36K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 071xB)
-        SET(RAM "36K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 081xB)
-        SET(RAM "36K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 041x8)
-        SET(RAM "8K")
-        SET(FLASH "64K")
-    ELSEIF(${TYPE} STREQUAL 031x8)
-        SET(RAM "8K")
-        SET(FLASH "64K")
-    ELSEIF(${TYPE} STREQUAL 041x6)
-        SET(RAM "8K")
-        SET(FLASH "32K")
-    ELSEIF(${TYPE} STREQUAL 031x6)
-        SET(RAM "8K")
-        SET(FLASH "32K")
-    ELSEIF(${TYPE} STREQUAL 031x4)
-        SET(RAM "8K")
-        SET(FLASH "16K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32G0 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    STRING(REGEX REPLACE "^(0[3478][01]).[BCDEFGJ468]" "\\1" STM32_DEVICE_NUM ${STM32_CHIP_TYPE})
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32${STM32_FAMILY};STM32G${STM32_DEVICE_NUM}xx;${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32${STM32_FAMILY};STM32G${STM32_DEVICE_NUM}xx")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32h7.cmake

@@ -1,63 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 743xx 750xx 753xx CACHE INTERNAL "stm32h7 chip types")
-SET(STM32_CODES "743.." "750.." "753..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[hH](7[45][03].[BI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[hH](7[45][03].[BI]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[hH]7[45][03].([BI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "743xx")
-        SET(RAM "1024K")
-    ELSEIF(${TYPE} STREQUAL "750xx")
-        SET(RAM "1024K")
-    ELSEIF(${TYPE} STREQUAL "753xx")
-        SET(RAM "1024K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    # First 64K of RAM are already CCM...
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32H7 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32H7;STM32H${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32H7;STM32H${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32l0.cmake

@@ -1,96 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m0 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 011xx 021xx 031xx 041xx 051xx 052xx 053xx 061xx 062xx 063xx 071xx 072xx 073xx 081xx 082xx 083xx CACHE INTERNAL "stm32l0 chip types")
-SET(STM32_CODES "011.[34]" "021.4" "031.[46]" "041.6" "051.[68]" "052.[68]" "053.[68]" "061.8" "062.8" "063.8" "071.[BZ]" "072.[BZ]" "073.[8BZ]" "081.Z" "082.[BZ]" "083.[8BZ]")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]((011.[34])|(021.4)|(031.[46])|(041.6)|(05[123].[68])|(06[123].8)|(07[123].[8BZ])|(08[123].[8BZ])).+$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](0[12345678][123]).[3468BZ]" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]0[12345678][123].([3468BZ])" "\\1" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "3")
-        SET(FLASH "8K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "4")
-        SET(FLASH "16K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "Z")
-        SET(FLASH "192K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL 011xx)
-        SET(RAM "2K")
-    ELSEIF(${TYPE} STREQUAL 021xx)
-        SET(RAM "2K")
-    ELSEIF(${TYPE} STREQUAL 031xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 041xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 051xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 052xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 053xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 061xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 062xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 063xx)
-        SET(RAM "8K")
-    ELSEIF(${TYPE} STREQUAL 071xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 072xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 073xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 081xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 082xx)
-        SET(RAM "20K")
-    ELSEIF(${TYPE} STREQUAL 083xx)
-        SET(RAM "20K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "0K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32L0 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32L0;STM32L${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32L0;STM32L${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32l1.cmake

@@ -1,133 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m3 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m3 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m3 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-
-SET(STM32_CHIP_TYPES 100xB   100xBA   100xC   151xB   151xBA   151xC   151xCA   151xD   151xDX   151xE   152xB   152xBA   152xC   152xCA   152xD   152xDX   152xE   162xC   162xCA   162xD   162xDX   162xE   CACHE INTERNAL "stm32l1 chip types")
-SET(STM32_CODES     "100.B" "100.BA" "100.C" "151.B" "151.BA" "151.C" "151.CA" "151.D" "151.DX" "151.E" "152.B" "152.BA" "152.C" "152.CA" "152.D" "152.DX" "152.E" "162.C" "162.CA" "162.D" "162.DX" "162.E")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]((100.[BC])|(100.[BC]A)|(15[12].[BCE])|(15[12].[BC]A)|(15[12].DX)|(162.[EDC])|(162.CA)|(162.DX)).+$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](1[056][012]).([68BCDE]$|[68BCDE][AX]$)" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](1[056][012]).([68BCDE]$|[68BCDE][AX]$)" "\\2" STM32_SIZE_CODE ${CHIP})
-
-    IF(STM32_SIZE_CODE STREQUAL "6" OR STM32_SIZE_CODE STREQUAL "6A")
-        SET(FLASH "32K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "8" OR STM32_SIZE_CODE STREQUAL "8A")
-        SET(FLASH "64K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "B" OR STM32_SIZE_CODE STREQUAL "BA")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C" OR STM32_SIZE_CODE STREQUAL "CA")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "D" OR STM32_SIZE_CODE STREQUAL "DX")
-        SET(FLASH "384K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ENDIF()
-
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL 100xB)
-        SET(RAM "10K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 100xBA)
-        SET(RAM "16K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 100xC)
-        SET(RAM "16K")
-        SET(FLASH "256K")
-
-    ELSEIF(${TYPE} STREQUAL 151xB)
-        SET(RAM "16K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 151xBA)
-        SET(RAM "32K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 151xC)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 151xCA)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 151xD)
-        SET(RAM "48K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 151xDX)
-        SET(RAM "80K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 151xE)
-        SET(RAM "80K")
-        SET(FLASH "512K")
-
-    ELSEIF(${TYPE} STREQUAL 152xB)
-        SET(RAM "16K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 152xBA)
-        SET(RAM "32K")
-        SET(FLASH "128K")
-    ELSEIF(${TYPE} STREQUAL 152xC)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 152xCA)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 152xD)
-        SET(RAM "48K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 152xDX)
-        SET(RAM "80K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 152xE)
-        SET(RAM "80K")
-        SET(FLASH "512K")
-
-    ELSEIF(${TYPE} STREQUAL 162xC)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 162xCA)
-        SET(RAM "32K")
-        SET(FLASH "256K")
-    ELSEIF(${TYPE} STREQUAL 162xD)
-        SET(RAM "48K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 162xDX)
-        SET(RAM "80K")
-        SET(FLASH "384K")
-    ELSEIF(${TYPE} STREQUAL 162xE)
-        SET(RAM "80K")
-        SET(FLASH "512K")
-    ENDIF()
-
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32L1 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32L${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32L${CHIP_TYPE}")
-    ENDIF()
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/gcc_stm32l4.cmake

@@ -1,104 +0,0 @@
-SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
-SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
-SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
-
-SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "executable linker flags")
-SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "module linker flags")
-SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mabi=aapcs" CACHE INTERNAL "shared linker flags")
-SET(STM32_CHIP_TYPES 431xx 432xx 433xx 442xx 443xx 451xx 452xx 462xx 471xx 475xx 476xx 485xx 486xx 496xx 4a6xx 4r5xx 4r7xx 4r9xx 4s5xx 4s7xx 4s9xx CACHE INTERNAL "stm32l4 chip types")
-SET(STM32_CODES "431.." "432.." "433.." "442.." "443.." "451.." "452.." "462.." "471.." "475.." "476.." "485.." "486.." "496.." "4a6.." "4r5.." "4r7.." "4r9.." "4s5.." "4s7.." "4s9..")
-
-MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](4[3456789ARS][1235679].[BCEGI]).*$" "\\1" STM32_CODE ${CHIP})
-    SET(INDEX 0)
-    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
-        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
-        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
-            SET(RESULT_TYPE ${C_TYPE})
-        ENDIF()
-        MATH(EXPR INDEX "${INDEX}+1")
-    ENDFOREACH()
-    SET(${CHIP_TYPE} ${RESULT_TYPE})
-ENDMACRO()
-
-MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE CCRAM_SIZE)
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL](4[3456789ARS][1235679].[BCEGI]]).*$" "\\1" STM32_CODE ${CHIP})
-    STRING(REGEX REPLACE "^[sS][tT][mM]32[lL]4[3456789ARS][1235679].([BCEGI]).*$" "\\1" STM32_SIZE_CODE ${CHIP})
-    
-    IF(STM32_SIZE_CODE STREQUAL "B")
-        SET(FLASH "128K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
-        SET(FLASH "256K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "E")
-        SET(FLASH "512K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "G")
-        SET(FLASH "1024K")
-    ELSEIF(STM32_SIZE_CODE STREQUAL "I")
-        SET(FLASH "2048K")
-    ENDIF()
-    
-    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
-    
-    IF(${TYPE} STREQUAL "431xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "432xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "433xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "442xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "443xx")
-        SET(RAM "64K")
-    ELSEIF(${TYPE} STREQUAL "451xx")
-        SET(RAM "160K")
-    ELSEIF(${TYPE} STREQUAL "452xx")
-        SET(RAM "160K")
-    ELSEIF(${TYPE} STREQUAL "462xx")
-        SET(RAM "160K")
-    ELSEIF(${TYPE} STREQUAL "471xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "475xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "476xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "485xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "486xx")
-        SET(RAM "128K")
-    ELSEIF(${TYPE} STREQUAL "496xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "4a6xx")
-        SET(RAM "320K")
-    ELSEIF(${TYPE} STREQUAL "4r5xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4r7xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4r9xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4s5xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4s7xx")
-        SET(RAM "640K")
-    ELSEIF(${TYPE} STREQUAL "4s9xx")
-        SET(RAM "640K")
-    ENDIF()
-    
-    SET(${FLASH_SIZE} ${FLASH})
-    SET(${RAM_SIZE} ${RAM})
-    SET(${CCRAM_SIZE} "64K")
-ENDMACRO()
-
-FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
-    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
-    IF(TYPE_INDEX EQUAL -1)
-        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32L4 chip type: ${CHIP_TYPE}")
-    ENDIF()
-    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
-    IF(TARGET_DEFS)
-        SET(TARGET_DEFS "STM32L4;STM32L${CHIP_TYPE};${TARGET_DEFS}")
-    ELSE()
-        SET(TARGET_DEFS "STM32L4;STM32L${CHIP_TYPE}")
-    ENDIF()
-        
-    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
-ENDFUNCTION()

cmake/stm32/common.cmake

@@ -0,0 +1,237 @@
+set(STM32_SUPPORTED_FAMILIES F0 F1 F2 F3 F4 F7 G0 G4 H7 L0 L1 L4)
+
+if(NOT STM32_TOOLCHAIN_PATH)
+     set(STM32_TOOLCHAIN_PATH "/usr")
+     message(STATUS "No STM32_TOOLCHAIN_PATH specified, using default: " ${STM32_TOOLCHAIN_PATH})
+else()
+     file(TO_CMAKE_PATH "${STM32_TOOLCHAIN_PATH}" STM32_TOOLCHAIN_PATH)
+endif()
+
+if(NOT STM32_TARGET_TRIPLET)
+    set(STM32_TARGET_TRIPLET "arm-none-eabi")
+    message(STATUS "No STM32_TARGET_TRIPLET specified, using default: " ${STM32_TARGET_TRIPLET})
+endif()
+
+set(CMAKE_SYSTEM_NAME Generic)
+set(CMAKE_SYSTEM_PROCESSOR arm)
+
+set(TOOLCHAIN_SYSROOT  "${STM32_TOOLCHAIN_PATH}/${STM32_TARGET_TRIPLET}")
+set(TOOLCHAIN_BIN_PATH "${STM32_TOOLCHAIN_PATH}/bin")
+set(TOOLCHAIN_INC_PATH "${STM32_TOOLCHAIN_PATH}/${STM32_TARGET_TRIPLET}/include")
+set(TOOLCHAIN_LIB_PATH "${STM32_TOOLCHAIN_PATH}/${STM32_TARGET_TRIPLET}/lib")
+
+find_program(CMAKE_OBJCOPY NAMES ${STM32_TARGET_TRIPLET}-objcopy PATHS ${TOOLCHAIN_BIN_PATH} NO_DEFAULT_PATH)
+find_program(CMAKE_OBJDUMP NAMES ${STM32_TARGET_TRIPLET}-objdump PATHS ${TOOLCHAIN_BIN_PATH} NO_DEFAULT_PATH)
+find_program(CMAKE_SIZE NAMES ${STM32_TARGET_TRIPLET}-size PATHS ${TOOLCHAIN_BIN_PATH} NO_DEFAULT_PATH)
+find_program(CMAKE_DEBUGGER NAMES ${STM32_TARGET_TRIPLET}-gdb PATHS ${TOOLCHAIN_BIN_PATH} NO_DEFAULT_PATH)
+find_program(CMAKE_CPPFILT NAMES ${STM32_TARGET_TRIPLET}-c++filt PATHS ${TOOLCHAIN_BIN_PATH} NO_DEFAULT_PATH)
+
+function(stm32_get_chip_type FAMILY DEVICE TYPE)
+    set(INDEX 0)
+    foreach(C_TYPE ${STM32_${FAMILY}_TYPES})
+        list(GET STM32_${FAMILY}_TYPE_MATCH ${INDEX} REGEXP)
+        if(${DEVICE} MATCHES ${REGEXP})
+            set(RESULT_TYPE ${C_TYPE})
+        endif()
+        math(EXPR INDEX "${INDEX}+1")
+    endforeach()
+    if(NOT RESULT_TYPE)
+        message(FATAL_ERROR "Invalid/unsupported device: ${DEVICE}")
+    endif()
+    set(${TYPE} ${RESULT_TYPE} PARENT_SCOPE)
+endfunction()
+
+function(stm32_get_chip_info CHIP)
+    set(ARG_OPTIONS "")
+    set(ARG_SINGLE FAMILY DEVICE TYPE)
+    set(ARG_MULTIPLE "")
+    cmake_parse_arguments(PARSE_ARGV 1 ARG "${ARG_OPTIONS}" "${ARG_SINGLE}" "${ARG_MULTIPLE}")
+        
+    string(TOUPPER ${CHIP} CHIP)
+        
+    string(REGEX MATCH "^STM32([A-Z][0-9])([0-9A-Z][0-9][A-Z][0-9A-Z]).*$" CHIP ${CHIP})
+    
+    if((NOT CMAKE_MATCH_1) OR (NOT CMAKE_MATCH_2))
+        message(FATAL_ERROR "Unknown chip ${CHIP}")
+    endif()
+    
+    set(STM32_FAMILY ${CMAKE_MATCH_1})
+    set(STM32_DEVICE "${CMAKE_MATCH_1}${CMAKE_MATCH_2}")
+    
+    list(FIND STM32_SUPPORTED_FAMILIES ${STM32_FAMILY} STM32_FAMILY_INDEX)
+    if (STM32_FAMILY_INDEX EQUAL -1)
+        message(FATAL_ERROR "Unsupported family ${STM32_FAMILY} for device ${CHIP}")
+    endif()
+
+    stm32_get_chip_type(${STM32_FAMILY} ${STM32_DEVICE} STM32_TYPE)
+    
+    if(ARG_FAMILY)
+        set(${ARG_FAMILY} ${STM32_FAMILY} PARENT_SCOPE)
+    endif()
+    if(ARG_DEVICE)
+        set(${ARG_DEVICE} ${STM32_DEVICE} PARENT_SCOPE)
+    endif()
+    if(ARG_TYPE)
+        set(${ARG_TYPE} ${STM32_TYPE} PARENT_SCOPE)
+    endif()
+endfunction()
+
+function(stm32_get_cores CORES)
+    set(ARG_OPTIONS "")
+    set(ARG_SINGLE CHIP FAMILY DEVICE)
+    set(ARG_MULTIPLE "")
+    cmake_parse_arguments(PARSE_ARGV 1 ARG "${ARG_OPTIONS}" "${ARG_SINGLE}" "${ARG_MULTIPLE}")
+        
+    if(ARG_CHIP)
+        stm32_get_chip_info(${ARG_CHIP} FAMILY ARG_FAMILY TYPE ARG_TYPE DEVICE ARG_DEVICE)
+    elseif(ARG_FAMILY AND ARG_DEVICE)
+        stm32_get_chip_type(${ARG_FAMILY} ${ARG_DEVICE} ARG_TYPE)
+    elseif(ARG_FAMILY)
+        if(${ARG_FAMILY} STREQUAL "H7")
+            set(${CORES} M7 M4 PARENT_SCOPE)
+        else()
+            set(${CORES} "" PARENT_SCOPE)
+        endif()
+        return()
+    else()
+        message(FATAL_ERROR "Either CHIP or FAMILY or FAMILY/DEVICE should be specified for stm32_get_cores()")
+    endif()
+    
+    if(${ARG_FAMILY} STREQUAL "H7")
+        stm32h7_get_device_cores(${ARG_DEVICE} ${ARG_TYPE} CORE_LIST)
+    endif()
+    set(${CORES} "${CORE_LIST}" PARENT_SCOPE)
+endfunction()
+
+function(stm32_get_memory_info)
+    set(ARG_OPTIONS FLASH RAM CCRAM STACK HEAP)
+    set(ARG_SINGLE CHIP FAMILY DEVICE CORE SIZE ORIGIN)
+    set(ARG_MULTIPLE "")
+    cmake_parse_arguments(INFO "${ARG_OPTIONS}" "${ARG_SINGLE}" "${ARG_MULTIPLE}" ${ARGN})
+
+    if((NOT INFO_CHIP) AND ((NOT INFO_FAMILY) OR (NOT INFO_DEVICE)))
+        message(FATAL_ERROR "Either CHIP or FAMILY/DEVICE is required for stm32_get_memory_info()")
+    endif()
+        
+    if(INFO_CHIP)
+        stm32_get_chip_info(${INFO_CHIP} FAMILY INFO_FAMILY TYPE INFO_TYPE DEVICE INFO_DEVICE)
+    else()
+        stm32_get_chip_type(${INFO_FAMILY} ${INFO_DEVICE} INFO_TYPE)
+    endif()
+    
+    string(REGEX REPLACE "^[FGHL][0-9][0-9A-Z][0-9].([3468BCDEFGHIZ])$" "\\1" SIZE_CODE ${INFO_DEVICE})
+    
+    if(SIZE_CODE STREQUAL "3")
+        set(FLASH "8K")
+    elseif(SIZE_CODE STREQUAL "4")
+        set(FLASH "16K")
+    elseif(SIZE_CODE STREQUAL "6")
+        set(FLASH "32K")
+    elseif(SIZE_CODE STREQUAL "8")
+        set(FLASH "64K")
+    elseif(SIZE_CODE STREQUAL "B")
+        set(FLASH "128K")
+    elseif(SIZE_CODE STREQUAL "C")
+        set(FLASH "256K")
+    elseif(SIZE_CODE STREQUAL "D")
+        set(FLASH "384K")
+    elseif(SIZE_CODE STREQUAL "E")
+        set(FLASH "512K")
+    elseif(SIZE_CODE STREQUAL "F")
+        set(FLASH "768K")
+    elseif(SIZE_CODE STREQUAL "G")
+        set(FLASH "1024K")
+    elseif(SIZE_CODE STREQUAL "H")
+        set(FLASH "1536K")
+    elseif(SIZE_CODE STREQUAL "I")
+        set(FLASH "2048K")
+    elseif(SIZE_CODE STREQUAL "Z")
+        set(FLASH "192K")
+    else()
+        set(FLASH "16K")
+        message(WARNING "Unknow flash size for device ${DEVICE}. Set to ${FLASH}")
+    endif()
+    
+    list(FIND STM32_${INFO_FAMILY}_TYPES ${INFO_TYPE} TYPE_INDEX)
+    list(GET STM32_${INFO_FAMILY}_RAM_SIZES ${TYPE_INDEX} RAM)
+    list(GET STM32_${INFO_FAMILY}_CCRAM_SIZES ${TYPE_INDEX} CCRAM)
+    set(FLASH_ORIGIN 0x8000000)
+    set(RAM_ORIGIN 0x20000000)
+    set(CCRAM_ORIGIN 0x10000000)
+    
+    if(FAMILY STREQUAL "F1")
+        stm32f1_get_memory_info(${INFO_DEVICE} ${INFO_TYPE} FLASH RAM)
+    elseif(FAMILY STREQUAL "L1")
+        stm32l1_get_memory_info(${INFO_DEVICE} ${INFO_TYPE} FLASH RAM)
+    elseif(FAMILY STREQUAL "F2")
+        stm32f2_get_memory_info(${INFO_DEVICE} ${INFO_TYPE} FLASH RAM)
+    elseif(FAMILY STREQUAL "F3")
+        stm32f3_get_memory_info(${INFO_DEVICE} ${INFO_TYPE} FLASH RAM)
+    elseif(FAMILY STREQUAL "H7")
+        stm32h7_get_memory_info(${INFO_DEVICE} ${INFO_TYPE} "${INFO_CORE}" RAM FLASH_ORIGIN RAM_ORIGIN TWO_FLASH_BANKS)
+        if(TWO_FLASH_BANKS)
+            string(REGEX MATCH "([0-9]+)K" FLASH_KB ${FLASH})
+            math(EXPR FLASH_KB "${CMAKE_MATCH_1} / 2")
+            set(FLASH "${FLASH_KB}K")   
+        endif()
+    endif()
+    
+    if(INFO_FLASH)
+        set(SIZE ${FLASH})
+        set(ORIGIN ${FLASH_ORIGIN})
+    elseif(INFO_RAM)
+        set(SIZE ${RAM})
+        set(ORIGIN ${RAM_ORIGIN})
+    elseif(INFO_CCRAM)
+        set(SIZE ${CCRAM})
+        set(ORIGIN ${CCRAM_ORIGIN})
+    elseif(INFO_STACK)
+        if (RAM STREQUAL "2K")
+            set(SIZE 0x200)
+        else()
+            set(SIZE 0x400)
+        endif()
+        set(ORIGIN ${RAM_ORIGIN}) #TODO: Real stack pointer?
+    elseif(INFO_HEAP)
+        if (RAM STREQUAL "2K")
+            set(SIZE 0x100)
+        else()
+            set(SIZE 0x200)
+        endif()
+        set(ORIGIN ${RAM_ORIGIN}) #TODO: Real heap pointer?
+    endif()
+    
+    if(INFO_SIZE)
+        set(${INFO_SIZE} ${SIZE} PARENT_SCOPE)
+    endif()
+    if(INFO_ORIGIN)
+        set(${INFO_ORIGIN} ${ORIGIN} PARENT_SCOPE)
+    endif()
+endfunction()
+
+function(stm32_add_linker_script TARGET VISIBILITY SCRIPT)
+    get_filename_component(SCRIPT "${SCRIPT}" ABSOLUTE)
+    target_link_options(${TARGET} ${VISIBILITY} -T "${SCRIPT}")
+endfunction()
+
+if(NOT (TARGET STM32::NoSys))
+    add_library(STM32::NoSys INTERFACE IMPORTED)
+    target_compile_options(STM32::NoSys INTERFACE $<$<C_COMPILER_ID:GNU>:--specs=nosys.specs>)
+    target_link_options(STM32::NoSys INTERFACE $<$<C_COMPILER_ID:GNU>:--specs=nosys.specs>)
+endif()
+
+include(stm32/utilities)
+include(stm32/f0)
+include(stm32/f1)
+include(stm32/f2)
+include(stm32/f3)
+include(stm32/f4)
+include(stm32/f7)
+include(stm32/g0)
+include(stm32/g4)
+include(stm32/h7)
+include(stm32/l0)
+include(stm32/l1)
+include(stm32/l4)
+
+

cmake/stm32/devices.cmake

@@ -0,0 +1,1065 @@
+set(STM32_ALL_DEVICES
+    F030C6
+    F030C8
+    F030CC
+    F030F4
+    F030K6
+    F030R8
+    F030RC
+    F031C4
+    F031C6
+    F031E6
+    F031F4
+    F031F6
+    F031G4
+    F031G6
+    F031K4
+    F031K6
+    F038C6
+    F038E6
+    F038F6
+    F038G6
+    F038K6
+    F042C4
+    F042C6
+    F042F4
+    F042F6
+    F042G4
+    F042G6
+    F042K4
+    F042K6
+    F042T6
+    F048C6
+    F048G6
+    F048T6
+    F051C4
+    F051C6
+    F051C8
+    F051K4
+    F051K6
+    F051K8
+    F051R4
+    F051R6
+    F051R8
+    F051T8
+    F058C8
+    F058R8
+    F058T8
+    F070C6
+    F070CB
+    F070F6
+    F070RB
+    F071C8
+    F071CB
+    F071RB
+    F071V8
+    F071VB
+    F072C8
+    F072CB
+    F072R8
+    F072RB
+    F072V8
+    F072VB
+    F078CB
+    F078RB
+    F078VB
+    F091CB
+    F091CC
+    F091RB
+    F091RC
+    F091VB
+    F091VC
+    F098CC
+    F098RC
+    F098VC
+    F100C4
+    F100C6
+    F100C8
+    F100CB
+    F100R4
+    F100R6
+    F100R8
+    F100RB
+    F100RC
+    F100RD
+    F100RE
+    F100V8
+    F100VB
+    F100VC
+    F100VD
+    F100VE
+    F100ZC
+    F100ZD
+    F100ZE
+    F101C4
+    F101C6
+    F101C8
+    F101CB
+    F101R4
+    F101R6
+    F101R8
+    F101RB
+    F101RC
+    F101RD
+    F101RE
+    F101RF
+    F101RG
+    F101T4
+    F101T6
+    F101T8
+    F101TB
+    F101V8
+    F101VB
+    F101VC
+    F101VD
+    F101VE
+    F101VF
+    F101VG
+    F101ZC
+    F101ZD
+    F101ZE
+    F101ZF
+    F101ZG
+    F102C4
+    F102C6
+    F102C8
+    F102CB
+    F102R4
+    F102R6
+    F102R8
+    F102RB
+    F103C4
+    F103C6
+    F103C8
+    F103CB
+    F103R4
+    F103R6
+    F103R8
+    F103RB
+    F103RC
+    F103RD
+    F103RE
+    F103RF
+    F103RG
+    F103T4
+    F103T6
+    F103T8
+    F103TB
+    F103V8
+    F103VB
+    F103VC
+    F103VD
+    F103VE
+    F103VF
+    F103VG
+    F103ZC
+    F103ZD
+    F103ZE
+    F103ZF
+    F103ZG
+    F105R8
+    F105RB
+    F105RC
+    F105V8
+    F105VB
+    F105VC
+    F107RB
+    F107RC
+    F107VB
+    F107VC
+    F205RB
+    F205RC
+    F205RE
+    F205RF
+    F205RG
+    F205VB
+    F205VC
+    F205VE
+    F205VF
+    F205VG
+    F205ZC
+    F205ZE
+    F205ZF
+    F205ZG
+    F207IC
+    F207IE
+    F207IF
+    F207IG
+    F207VC
+    F207VE
+    F207VF
+    F207VG
+    F207ZC
+    F207ZE
+    F207ZF
+    F207ZG
+    F215RE
+    F215RG
+    F215VE
+    F215VG
+    F215ZE
+    F215ZG
+    F217IE
+    F217IG
+    F217VE
+    F217VG
+    F217ZE
+    F217ZG
+    F301C6
+    F301C8
+    F301K6
+    F301K8
+    F301R6
+    F301R8
+    F302C6
+    F302C8
+    F302CB
+    F302CC
+    F302K6
+    F302K8
+    F302R6
+    F302R8
+    F302RB
+    F302RC
+    F302RD
+    F302RE
+    F302VB
+    F302VC
+    F302VD
+    F302VE
+    F302ZD
+    F302ZE
+    F303C6
+    F303C8
+    F303CB
+    F303CC
+    F303K6
+    F303K8
+    F303R6
+    F303R8
+    F303RB
+    F303RC
+    F303RD
+    F303RE
+    F303VB
+    F303VC
+    F303VD
+    F303VE
+    F303ZD
+    F303ZE
+    F318C8
+    F318K8
+    F328C8
+    F334C4
+    F334C6
+    F334C8
+    F334K4
+    F334K6
+    F334K8
+    F334R6
+    F334R8
+    F358CC
+    F358RC
+    F358VC
+    F373C8
+    F373CB
+    F373CC
+    F373R8
+    F373RB
+    F373RC
+    F373V8
+    F373VB
+    F373VC
+    F378CC
+    F378RC
+    F378VC
+    F398VE
+    F401CB
+    F401CC
+    F401CD
+    F401CE
+    F401RB
+    F401RC
+    F401RD
+    F401RE
+    F401VB
+    F401VC
+    F401VD
+    F401VE
+    F405OE
+    F405OG
+    F405RG
+    F405VG
+    F405ZG
+    F407IE
+    F407IG
+    F407VE
+    F407VG
+    F407ZE
+    F407ZG
+    F410C8
+    F410CB
+    F410R8
+    F410RB
+    F410T8
+    F410TB
+    F411CC
+    F411CE
+    F411RC
+    F411RE
+    F411VC
+    F411VE
+    F412CE
+    F412CG
+    F412RE
+    F412RG
+    F412VE
+    F412VG
+    F412ZE
+    F412ZG
+    F413CG
+    F413CH
+    F413MG
+    F413MH
+    F413RG
+    F413RH
+    F413VG
+    F413VH
+    F413ZG
+    F413ZH
+    F415OG
+    F415RG
+    F415VG
+    F415ZG
+    F417IE
+    F417IG
+    F417VE
+    F417VG
+    F417ZE
+    F417ZG
+    F423CH
+    F423MH
+    F423RH
+    F423VH
+    F423ZH
+    F427AG
+    F427AI
+    F427IG
+    F427II
+    F427VG
+    F427VI
+    F427ZG
+    F427ZI
+    F429AG
+    F429AI
+    F429BE
+    F429BG
+    F429BI
+    F429IE
+    F429IG
+    F429II
+    F429NE
+    F429NG
+    F429NI
+    F429VE
+    F429VG
+    F429VI
+    F429ZE
+    F429ZG
+    F429ZI
+    F437AI
+    F437IG
+    F437II
+    F437VG
+    F437VI
+    F437ZG
+    F437ZI
+    F439AI
+    F439BG
+    F439BI
+    F439IG
+    F439II
+    F439NG
+    F439NI
+    F439VG
+    F439VI
+    F439ZG
+    F439ZI
+    F446MC
+    F446ME
+    F446RC
+    F446RE
+    F446VC
+    F446VE
+    F446ZC
+    F446ZE
+    F469AE
+    F469AG
+    F469AI
+    F469BE
+    F469BG
+    F469BI
+    F469IE
+    F469IG
+    F469II
+    F469NE
+    F469NG
+    F469NI
+    F469VE
+    F469VG
+    F469VI
+    F469ZE
+    F469ZG
+    F469ZI
+    F479AG
+    F479AI
+    F479BG
+    F479BI
+    F479IG
+    F479II
+    F479NG
+    F479NI
+    F479VG
+    F479VI
+    F479ZG
+    F479ZI
+    F722IC
+    F722IE
+    F722RC
+    F722RE
+    F722VC
+    F722VE
+    F722ZC
+    F722ZE
+    F723IC
+    F723IE
+    F723VE
+    F723ZC
+    F723ZE
+    F730I8
+    F730R8
+    F730V8
+    F730Z8
+    F732IE
+    F732RE
+    F732VE
+    F732ZE
+    F733IE
+    F733VE
+    F733ZE
+    F745IE
+    F745IG
+    F745VE
+    F745VG
+    F745ZE
+    F745ZG
+    F746BE
+    F746BG
+    F746IE
+    F746IG
+    F746NE
+    F746NG
+    F746VE
+    F746VG
+    F746ZE
+    F746ZG
+    F750N8
+    F750V8
+    F750Z8
+    F756BG
+    F756IG
+    F756NG
+    F756VG
+    F756ZG
+    F765BG
+    F765BI
+    F765IG
+    F765II
+    F765NG
+    F765NI
+    F765VG
+    F765VI
+    F765ZG
+    F765ZI
+    F767BG
+    F767BI
+    F767IG
+    F767II
+    F767NG
+    F767NI
+    F767VG
+    F767VI
+    F767ZG
+    F767ZI
+    F769AI
+    F769BG
+    F769BI
+    F769IG
+    F769II
+    F769NG
+    F769NI
+    F777BI
+    F777II
+    F777NI
+    F777VI
+    F777ZI
+    F778AI
+    F779AI
+    F779BI
+    F779II
+    F779NI
+    G030C6
+    G030C8
+    G030F6
+    G030J6
+    G030K6
+    G030K8
+    G031C4
+    G031C6
+    G031C8
+    G031F4
+    G031F6
+    G031F8
+    G031G4
+    G031G6
+    G031G8
+    G031J4
+    G031J6
+    G031K4
+    G031K6
+    G031K8
+    G031Y8
+    G041C6
+    G041C8
+    G041F6
+    G041F8
+    G041G6
+    G041G8
+    G041J6
+    G041K6
+    G041K8
+    G041Y8
+    G070CB
+    G070KB
+    G070RB
+    G071C6
+    G071C8
+    G071CB
+    G071EB
+    G071G6
+    G071G8
+    G071GB
+    G071K6
+    G071K8
+    G071KB
+    G071R6
+    G071R8
+    G071RB
+    G081CB
+    G081EB
+    G081GB
+    G081KB
+    G081RB
+    G431C6
+    G431C8
+    G431CB
+    G431K6
+    G431K8
+    G431KB
+    G431M6
+    G431M8
+    G431MB
+    G431R6
+    G431R8
+    G431RB
+    G431V6
+    G431V8
+    G431VB
+    G441CB
+    G441KB
+    G441MB
+    G441RB
+    G441VB
+    G471CC
+    G471CE
+    G471MC
+    G471ME
+    G471QC
+    G471QE
+    G471RC
+    G471RE
+    G471VC
+    G471VE
+    G473CB
+    G473CC
+    G473CE
+    G473MB
+    G473MC
+    G473ME
+    G473QB
+    G473QC
+    G473QE
+    G473RB
+    G473RC
+    G473RE
+    G473VB
+    G473VC
+    G473VE
+    G474CB
+    G474CC
+    G474CE
+    G474MB
+    G474MC
+    G474ME
+    G474QB
+    G474QC
+    G474QE
+    G474RB
+    G474RC
+    G474RE
+    G474VB
+    G474VC
+    G474VE
+    G483CE
+    G483ME
+    G483QE
+    G483RE
+    G483VE
+    G484CE
+    G484ME
+    G484QE
+    G484RE
+    G484VE
+    GBK1CB
+    H742AG
+    H742AI
+    H742BG
+    H742BI
+    H742IG
+    H742II
+    H742VG
+    H742VI
+    H742XG
+    H742XI
+    H742ZG
+    H742ZI
+    H743AG
+    H743AI
+    H743BG
+    H743BI
+    H743IG
+    H743II
+    H743VG
+    H743VI
+    H743XG
+    H743XI
+    H743ZG
+    H743ZI
+    H745BG
+    H745BI
+    H745IG
+    H745II
+    H745XG
+    H745XI
+    H745ZG
+    H745ZI
+    H747AG
+    H747AI
+    H747BG
+    H747BI
+    H747IG
+    H747II
+    H747XG
+    H747XI
+    H747ZI
+    H750IB
+    H750VB
+    H750XB
+    H750ZB
+    H753AI
+    H753BI
+    H753II
+    H753VI
+    H753XI
+    H753ZI
+    H755BI
+    H755II
+    H755XI
+    H755ZI
+    H757AI
+    H757BI
+    H757II
+    H757XI
+    H757ZI
+    H7A3AG
+    H7A3AI
+    H7A3IG
+    H7A3II
+    H7A3LG
+    H7A3LI
+    H7A3NG
+    H7A3NI
+    H7A3QI
+    H7A3RG
+    H7A3RI
+    H7A3VG
+    H7A3VI
+    H7A3ZG
+    H7A3ZI
+    H7B0AB
+    H7B0IB
+    H7B0RB
+    H7B0VB
+    H7B0ZB
+    H7B3AI
+    H7B3II
+    H7B3LI
+    H7B3NI
+    H7B3QI
+    H7B3RI
+    H7B3VI
+    H7B3ZI
+    L010C6
+    L010F4
+    L010K4
+    L010K8
+    L010R8
+    L010RB
+    L011D3
+    L011D4
+    L011E3
+    L011E4
+    L011F3
+    L011F4
+    L011G3
+    L011G4
+    L011K3
+    L011K4
+    L021D4
+    L021F4
+    L021G4
+    L021K4
+    L031C4
+    L031C6
+    L031E4
+    L031E6
+    L031F4
+    L031F6
+    L031G4
+    L031G6
+    L031K4
+    L031K6
+    L041C6
+    L041E6
+    L041F6
+    L041G6
+    L041K6
+    L051C6
+    L051C8
+    L051K6
+    L051K8
+    L051R6
+    L051R8
+    L051T6
+    L051T8
+    L052C6
+    L052C8
+    L052K6
+    L052K8
+    L052R6
+    L052R8
+    L052T6
+    L052T8
+    L053C6
+    L053C8
+    L053R6
+    L053R8
+    L062C8
+    L062K8
+    L063C8
+    L063R8
+    L071C8
+    L071CB
+    L071CZ
+    L071K8
+    L071KB
+    L071KZ
+    L071RB
+    L071RZ
+    L071V8
+    L071VB
+    L071VZ
+    L072CB
+    L072CZ
+    L072KB
+    L072KZ
+    L072RB
+    L072RZ
+    L072V8
+    L072VB
+    L072VZ
+    L073CB
+    L073CZ
+    L073RB
+    L073RZ
+    L073V8
+    L073VB
+    L073VZ
+    L081CB
+    L081CZ
+    L081KZ
+    L082CZ
+    L082KZ
+    L083CB
+    L083CZ
+    L083RB
+    L083RZ
+    L083V8
+    L083VB
+    L083VZ
+    L100C6
+    L100R8
+    L100RB
+    L100RC
+    L151C6
+    L151C8
+    L151CB
+    L151CC
+    L151QC
+    L151QD
+    L151QE
+    L151R6
+    L151R8
+    L151RB
+    L151RC
+    L151RD
+    L151RE
+    L151UC
+    L151V8
+    L151VB
+    L151VC
+    L151VD
+    L151VE
+    L151ZC
+    L151ZD
+    L151ZE
+    L152C6
+    L152C8
+    L152CB
+    L152CC
+    L152QC
+    L152QD
+    L152QE
+    L152R6
+    L152R8
+    L152RB
+    L152RC
+    L152RD
+    L152RE
+    L152UC
+    L152V8
+    L152VB
+    L152VC
+    L152VD
+    L152VE
+    L152ZC
+    L152ZD
+    L152ZE
+    L162QC
+    L162QD
+    L162RC
+    L162RD
+    L162RE
+    L162VC
+    L162VD
+    L162VE
+    L162ZC
+    L162ZD
+    L162ZE
+    L412C8
+    L412CB
+    L412K8
+    L412KB
+    L412R8
+    L412RB
+    L412T8
+    L412TB
+    L422CB
+    L422KB
+    L422RB
+    L422TB
+    L431CB
+    L431CC
+    L431KB
+    L431KC
+    L431RB
+    L431RC
+    L431VC
+    L432KB
+    L432KC
+    L433CB
+    L433CC
+    L433RB
+    L433RC
+    L433VC
+    L442KC
+    L443CC
+    L443RC
+    L443VC
+    L451CC
+    L451CE
+    L451RC
+    L451RE
+    L451VC
+    L451VE
+    L452CC
+    L452CE
+    L452RC
+    L452RE
+    L452VC
+    L452VE
+    L462CE
+    L462RE
+    L462VE
+    L471QE
+    L471QG
+    L471RE
+    L471RG
+    L471VE
+    L471VG
+    L471ZE
+    L471ZG
+    L475RC
+    L475RE
+    L475RG
+    L475VC
+    L475VE
+    L475VG
+    L476JE
+    L476JG
+    L476ME
+    L476MG
+    L476QE
+    L476QG
+    L476RC
+    L476RE
+    L476RG
+    L476VC
+    L476VE
+    L476VG
+    L476ZE
+    L476ZG
+    L486JG
+    L486QG
+    L486RG
+    L486VG
+    L486ZG
+    L496AE
+    L496AG
+    L496QE
+    L496QG
+    L496RE
+    L496RG
+    L496VE
+    L496VG
+    L496ZE
+    L496ZG
+    L4A6AG
+    L4A6QG
+    L4A6RG
+    L4A6VG
+    L4A6ZG
+    L4P5AE
+    L4P5AG
+    L4P5CE
+    L4P5CG
+    L4P5QE
+    L4P5QG
+    L4P5RE
+    L4P5RG
+    L4P5VE
+    L4P5VG
+    L4P5ZE
+    L4P5ZG
+    L4Q5AG
+    L4Q5CG
+    L4Q5QG
+    L4Q5RG
+    L4Q5VG
+    L4Q5ZG
+    L4R5AG
+    L4R5AI
+    L4R5QG
+    L4R5QI
+    L4R5VG
+    L4R5VI
+    L4R5ZG
+    L4R5ZI
+    L4R7AI
+    L4R7VI
+    L4R7ZI
+    L4R9AG
+    L4R9AI
+    L4R9VG
+    L4R9VI
+    L4R9ZG
+    L4R9ZI
+    L4S5AI
+    L4S5QI
+    L4S5VI
+    L4S5ZI
+    L4S7AI
+    L4S7VI
+    L4S7ZI
+    L4S9AI
+    L4S9VI
+    L4S9ZI
+    L552CC
+    L552CE
+    L552ME
+    L552QC
+    L552QE
+    L552RC
+    L552RE
+    L552VC
+    L552VE
+    L552ZC
+    L552ZE
+    L562CE
+    L562ME
+    L562QE
+    L562RE
+    L562VE
+    L562ZE
+    MP151A
+    MP151C
+    MP153A
+    MP153C
+    MP157A
+    MP157C
+    WB50CG
+    WB55CC
+    WB55CE
+    WB55CG
+    WB55RC
+    WB55RE
+    WB55RG
+    WB55VC
+    WB55VE
+    WB55VG
+    WLE5J8
+    WLE5JB
+    WLE5JC
+)
+
+function(stm32_get_devices_by_family DEVICES)
+    set(ARG_OPTIONS "")
+    set(ARG_SINGLE FAMILY)
+    set(ARG_MULTIPLE "")
+    cmake_parse_arguments(PARSE_ARGV 1 ARG "${ARG_OPTIONS}" "${ARG_SINGLE}" "${ARG_MULTIPLE}")
+    set(LIST ${STM32_ALL_DEVICES})
+    if(ARG_FAMILY)
+        list(FILTER LIST INCLUDE REGEX "^${ARG_FAMILY}")
+    endif()
+    set(${DEVICES} ${LIST} PARENT_SCOPE)
+endfunction()

cmake/stm32/f0.cmake

@@ -0,0 +1,25 @@
+set(STM32_F0_TYPES 
+    F030x6 F030x8 F031x6 F038xx F042x6 F048xx F051x8 F058xx 
+    F070x6 F070xB F071xB F072xB F078xx F091xC F098xx F030xC
+)
+set(STM32_F0_TYPE_MATCH 
+    "F030.[46]" "F030.8" "F031.[46]" "F038.." "F042.[46]" "F048.." "F051.[468]" "F058.."
+    "F070.6" "F070.B" "F071.[8B]" "F072.[8B]" "F078.." "F091.[BC]" "F098.." "F030.C"
+)
+set(STM32_F0_RAM_SIZES 
+     4K  8K  4K  4K  6K  6K  8K  8K
+     6K 16K 16K 16K 16K 32K 32K 32K
+)
+set(STM32_F0_CCRAM_SIZES 
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  0K  0K  0K  0K
+)
+
+stm32_util_create_family_targets(F0)
+
+target_compile_options(STM32::F0 INTERFACE 
+    -mcpu=cortex-m0
+)
+target_link_options(STM32::F0 INTERFACE 
+    -mcpu=cortex-m0
+)

cmake/stm32/f1.cmake

@@ -0,0 +1,78 @@
+set(STM32_F1_TYPES 
+    F100xB F100xE F101x6 F101xB F101xE F101xG F102x6 F102xB 
+    F103x6 F103xB F103xE F103xG F105xC F107xC
+)
+set(STM32_F1_TYPE_MATCH 
+    "F100.[468B]" "F100.[CDE]" "F101.[46]" "F101.[8B]" "F101.[CDE]" "F101.[FG]" "F102.[46]" "F102.[8B]" 
+    "F103.[46]" "F103.[8B]" "F103.[CDE]" "F103.[FG]" "F105.[8BC]" "F107.[BC]"
+)
+set(STM32_F1_RAM_SIZES 
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  0K  0K
+)
+set(STM32_F1_CCRAM_SIZES 
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  0K  0K
+)
+
+stm32_util_create_family_targets(F1)
+
+target_compile_options(STM32::F1 INTERFACE 
+    -mcpu=cortex-m3
+)
+target_link_options(STM32::F1 INTERFACE 
+    -mcpu=cortex-m3
+)
+
+function(stm32f1_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
+    string(REGEX REPLACE "F1[0-9][0-9].([468BCDEFGHI])" "\\1" SIZE_CODE ${DEVICE})
+    
+    if((TYPE STREQUAL "F100xB") OR (TYPE STREQUAL "F100xE"))
+        if((SIZE_CODE STREQUAL "4") OR (SIZE_CODE STREQUAL "6"))
+            set(RAM "4K")
+        elseif((SIZE_CODE STREQUAL "8") OR (SIZE_CODE STREQUAL "B"))
+            set(RAM "8K")
+        elseif(SIZE_CODE STREQUAL "C")
+            set(RAM "24K")
+        elseif((SIZE_CODE STREQUAL "D") OR (SIZE_CODE STREQUAL "E"))
+            set(RAM "32K")
+        endif()
+    elseif((TYPE STREQUAL "F101x6") OR (TYPE STREQUAL "F101xB") OR 
+           (TYPE STREQUAL "F101xE") OR (TYPE STREQUAL "F101xG") OR
+           (TYPE STREQUAL "F102x6") OR (TYPE STREQUAL "F102xB"))
+        if(SIZE_CODE STREQUAL "4")
+            set(RAM "4K")
+        elseif(SIZE_CODE STREQUAL "6")
+            set(RAM "6K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "10K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "16K")
+        elseif(SIZE_CODE STREQUAL "C")
+            set(RAM "32K")
+        elseif((SIZE_CODE STREQUAL "D") OR (SIZE_CODE STREQUAL "E"))
+            set(RAM "48K")
+        elseif((SIZE_CODE STREQUAL "F") OR (SIZE_CODE STREQUAL "G"))
+            set(RAM "80K")
+        endif()
+    elseif((TYPE STREQUAL "F103x6") OR (TYPE STREQUAL "F103xB") OR
+           (TYPE STREQUAL "F103xE") OR (TYPE STREQUAL "F103xG"))
+        if(SIZE_CODE STREQUAL "4")
+            set(RAM "6K")
+        elseif(SIZE_CODE STREQUAL "6")
+            set(RAM "10K")
+        elseif((SIZE_CODE STREQUAL "8") OR (SIZE_CODE STREQUAL "B"))
+            set(RAM "20K")
+        elseif(SIZE_CODE STREQUAL "C")
+            set(RAM "48K")
+        elseif((SIZE_CODE STREQUAL "D") OR (SIZE_CODE STREQUAL "E"))
+            set(RAM "64K")
+        elseif((SIZE_CODE STREQUAL "F") OR (SIZE_CODE STREQUAL "G"))
+            set(RAM "96K")
+        endif()
+    elseif((TYPE STREQUAL "F105xC") OR (TYPE STREQUAL "F107xC"))
+        set(RAM "64K")
+    endif()
+    
+    set(${RAM_SIZE} ${RAM} PARENT_SCOPE)
+endfunction()

cmake/stm32/f2.cmake

@@ -0,0 +1,39 @@
+set(STM32_F2_TYPES 
+    F205xx F215xx F207xx F217xx
+)
+set(STM32_F2_TYPE_MATCH 
+    "F205.." "F215.." "F207.." "F217.."
+)
+set(STM32_F2_RAM_SIZES 
+      0K 128K 128K 128K 
+)
+set(STM32_F2_CCRAM_SIZES 
+      0K   0K   0K   0K
+)
+
+stm32_util_create_family_targets(F2)
+
+target_compile_options(STM32::F2 INTERFACE 
+    -mcpu=cortex-m3
+)
+target_link_options(STM32::F2 INTERFACE 
+    -mcpu=cortex-m3
+)
+
+function(stm32f2_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
+    string(REGEX REPLACE "F2[0-9][0-9].([468BCDEFGHI])" "\\1" SIZE_CODE ${DEVICE})
+    
+    if(TYPE STREQUAL "F205xx")
+        if(SIZE_CODE STREQUAL "B")
+            set(RAM "64K")
+        elseif(SIZE_CODE STREQUAL "C")
+            set(RAM "96K")
+        else()
+            set(RAM "128K")
+        endif()
+    endif()
+    
+    if(RAM)
+        set(${RAM_SIZE} ${RAM} PARENT_SCOPE)
+    endif()
+endfunction()

cmake/stm32/f3.cmake

@@ -0,0 +1,59 @@
+set(STM32_F3_TYPES 
+    F301x8 F302x8 F302xC F302xE F303x8 F303xC 
+    F303xE F318xx F328xx F334x8 F358xx F373xC 
+    F378xx F398xx 
+)
+set(STM32_F3_TYPE_MATCH 
+    "301.[68]" "302.[68]" "302.[BC]" "302.[ED]" "303.[68]" "303.[BC]" 
+    "303.[ED]" "318.." "328.." "334.[468]" "358.." "373.[8BC]"
+    "378.." "398.."    
+)
+set(STM32_F3_RAM_SIZES 
+     16K  16K   0K  64K  16K   0K  
+     80K  16K  16K  16K  48K   0K
+     32K  80K
+)
+set(STM32_F3_CCRAM_SIZES 
+      0K   0K   0K   0K   0K   0K  
+      0K   0K   0K   0K   0K   0K
+      0K   0K
+)
+
+stm32_util_create_family_targets(F3)
+
+target_compile_options(STM32::F3 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::F3 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+
+function(stm32f3_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
+    string(REGEX REPLACE "F3[0-9][0-9].([468BCDEFGHI])" "\\1" SIZE_CODE ${DEVICE})
+    
+    if(TYPE STREQUAL "F302xC")
+        if(SIZE_CODE STREQUAL "C")
+            set(RAM "40K")
+        else()
+            set(RAM "32K")
+        endif()
+    elseif(TYPE STREQUAL "F303xC")
+        if(SIZE_CODE STREQUAL "C")
+            set(RAM "48K")
+        else()
+            set(RAM "40K")
+        endif()
+    elseif(TYPE STREQUAL "F373xC")
+        if(SIZE_CODE STREQUAL "B")
+            set(RAM "24K")
+        elseif(SIZE_CODE STREQUAL "C")
+            set(RAM "32K")
+        else()
+            set(RAM "16K")
+        endif()
+    endif()
+    
+    if(RAM)
+        set(${RAM_SIZE} ${RAM} PARENT_SCOPE)
+    endif()
+endfunction()

cmake/stm32/f4.cmake

@@ -0,0 +1,29 @@
+set(STM32_F4_TYPES 
+    F401xC F401xE F405xx F407xx F410Cx F410Rx F410Tx F411xE 
+    F412Cx F412Rx F412Vx F412Zx F413xx F415xx F417xx F423xx
+    F427xx F429xx F437xx F439xx F446xx F469xx F479xx
+)
+set(STM32_F4_TYPE_MATCH 
+    "F401.[CB]" "F401.[ED]" "F405.." "F407.." "F410C." "F410R." "F410T." "F411.[CE]"
+    "F412C." "F412R." "F412V." "F412Z." "F413.." "F415.." "F417.." "F423.."
+    "F427.." "F429.." "F437.." "F439.." "F446.." "F469.." "F479.."
+)
+set(STM32_F4_RAM_SIZES 
+     64K  96K 128K 128K  32K  32K  32K 128K
+    256K 256K 256K 256K 256K 128K 128K 320K
+    192K 192K 192K 192K 128K 320K 320K
+)
+set(STM32_F4_CCRAM_SIZES 
+     0K  0K 64K 64K  0K  0K  0K  0K
+     0K  0K  0K  0K 64K 64K 64K  0K
+    64K 64K 64K 64K  0K 64K 64K
+)
+
+stm32_util_create_family_targets(F4)
+
+target_compile_options(STM32::F4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::F4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)

cmake/stm32/f7.cmake

@@ -0,0 +1,25 @@
+set(STM32_F7_TYPES 
+    F756xx F746xx F745xx F765xx F767xx F769xx F777xx F779xx
+    F722xx F723xx F732xx F733xx F730xx F750xx
+)
+set(STM32_F7_TYPE_MATCH 
+    "F756.." "F746.." "F745.." "F765.." "F767.." "F769.." "F777.." "F77[89].."
+    "F722.." "F723.." "F732.." "F733.." "F730.." "F750.."
+)
+set(STM32_F7_RAM_SIZES
+    320K 320K 320K 512K 512K 512K 512K 512K
+    256K 256K 256K 256K 256K 320K 
+)
+set(STM32_F7_CCRAM_SIZES 
+      0K   0K   0K   0K   0K   0K   0K   0K
+      0K   0K   0K   0K   0K   0K
+)
+
+stm32_util_create_family_targets(F7)
+
+target_compile_options(STM32::F7 INTERFACE 
+    -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::F7 INTERFACE 
+    -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+)

cmake/stm32/g0.cmake

@@ -0,0 +1,21 @@
+set(STM32_G0_TYPES 
+    G030xx G031xx G041xx G070xx G071xx G081xx   
+)
+set(STM32_G0_TYPE_MATCH 
+    "G030.." "G031.." "G041.." "G070.." "G071.." "G081.." 
+)
+set(STM32_G0_RAM_SIZES 
+     8K  8K  8K 36K 36K 36K
+)
+set(STM32_G0_CCRAM_SIZES 
+     0K  0K  0K  0K  0K  0K
+)
+
+stm32_util_create_family_targets(G0)
+
+target_compile_options(STM32::G0 INTERFACE 
+    -mcpu=cortex-m0plus
+)
+target_link_options(STM32::G0 INTERFACE 
+    -mcpu=cortex-m0plus
+)

cmake/stm32/g4.cmake

@@ -0,0 +1,21 @@
+set(STM32_G4_TYPES 
+    G431xx G441xx G471xx G473xx G483xx G474xx G484xx
+)
+set(STM32_G4_TYPE_MATCH 
+    "G431.." "G441.." "G471.." "G473.." "G483.." "G474.." "G484.."
+)
+set(STM32_G4_RAM_SIZES 
+     32K  32K 128K 128K 128K 128K 128K
+)
+set(STM32_G4_CCRAM_SIZES 
+     10K  10K  32K  32K  32K  32K  32K
+)
+
+stm32_util_create_family_targets(G4)
+
+target_compile_options(STM32::G4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::G4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)

cmake/stm32/h7.cmake

@@ -0,0 +1,86 @@
+set(STM32_H7_TYPES 
+    H743xx H753xx H750xx H742xx H745xx H755xx H747xx H757xx
+    H7A3xx H7A3xxQ H7B3xx H7B3xxQ H7B0xx H7B0xxQ
+)
+set(STM32_H7_TYPE_MATCH 
+   "H743.." "H753.." "H750.." "H742.." "H745.." "H755.." "H747.." "H757.."
+   "H7A3.." "H7A3..Q" "H7B3.." "H7B3..Q" "H7B0.." "H7B0..Q"
+)
+set(STM32_H7_RAM_SIZES
+    128K 128K 128K 128K 128K 128K 128K 128K
+    128K 128K 128K 128K 128K 128K 
+)
+set(STM32_H7_M4_RAM_SIZES
+    288K 288K 288K 288K 288K 288K 288K 288K
+    288K 288K 288K 288K 288K 288K 
+)
+
+set(STM32_H7_CCRAM_SIZES 
+      0K   0K   0K   0K   0K   0K   0K   0K
+      0K   0K   0K   0K   0K   0K
+)
+
+set(STM32_H7_NO_FLASH_SPLIT
+      H750xx H7B0xx
+)
+
+set(STM32_H7_DUAL_CORE
+      H745xx H755xx H747xx H757xx
+)
+
+stm32_util_create_family_targets(H7 M7)
+
+target_compile_options(STM32::H7::M7 INTERFACE 
+    -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::H7::M7 INTERFACE 
+    -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+)
+target_compile_definitions(STM32::H7::M7 INTERFACE 
+    -DCORE_CM7
+)
+
+stm32_util_create_family_targets(H7 M4)
+
+target_compile_options(STM32::H7::M4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::H7::M4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+target_compile_definitions(STM32::H7::M4 INTERFACE 
+    -DCORE_CM4
+)
+
+function(stm32h7_get_memory_info DEVICE TYPE CORE RAM FLASH_ORIGIN RAM_ORIGIN TWO_FLASH_BANKS)
+    if(${TYPE} IN_LIST STM32_H7_NO_FLASH_SPLIT)
+        set(${TWO_FLASH_BANKS} FALSE PARENT_SCOPE)  
+    else()
+        set(${TWO_FLASH_BANKS} TRUE PARENT_SCOPE)
+    endif()
+    if(NOT CORE)
+        set(CORE "M7")
+    endif()
+    list(FIND STM32_H7_TYPES ${TYPE} TYPE_INDEX)
+    if(CORE STREQUAL "M7")
+        list(GET STM32_H7_RAM_SIZES ${TYPE_INDEX} RAM_VALUE)
+        set(${RAM} ${RAM_VALUE} PARENT_SCOPE)
+        set(${FLASH_ORIGIN} 0x8000000 PARENT_SCOPE)
+        set(${RAM_ORIGIN} 0x20000000 PARENT_SCOPE)
+    elseif((${TYPE} IN_LIST STM32_H7_DUAL_CORE) AND (CORE STREQUAL "M4"))
+        list(GET STM32_H7_M4_RAM_SIZES ${TYPE_INDEX} RAM_VALUE)
+        set(${RAM} ${RAM_VALUE} PARENT_SCOPE)
+        set(${FLASH_ORIGIN} 0x8100000 PARENT_SCOPE)
+        set(${RAM_ORIGIN} 0x10000000 PARENT_SCOPE)
+    else()
+        message(FATAL_ERROR "Unknown core ${CORE}")
+    endif()
+endfunction()
+
+function(stm32h7_get_device_cores DEVICE TYPE CORES)
+    if(${TYPE} IN_LIST STM32_H7_DUAL_CORE)
+        set(${CORES} M7 M4 PARENT_SCOPE)
+    else()
+        set(${CORES} M7 PARENT_SCOPE)
+    endif()
+endfunction()

cmake/stm32/l0.cmake

@@ -0,0 +1,29 @@
+set(STM32_L0_TYPES 
+    L010x4 L010x6 L010x8 L010xB L011xx L021xx L031xx L041xx
+    L051xx L052xx L053xx L061xx L062xx L063xx L071xx L072xx
+    L073xx L081xx L082xx L083xx
+)
+set(STM32_L0_TYPE_MATCH 
+    "L010.4" "L010.6" "L010.8" "L010.B" "L011.." "L021.." "L031.." "L041.."
+    "L051.." "L052.." "L053.." "L061.." "L062.." "L063.." "L071.." "L072.."
+    "L073.." "L081.." "L082.." "L083.."
+)
+set(STM32_L0_RAM_SIZES 
+     2K  8K  8K 20K  2K  2K  8K  8K
+     8K  8K  8K  8K  8K  8K 20K 20K
+    20K 20K 20K 20K
+)
+set(STM32_L0_CCRAM_SIZES 
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  
+)
+
+stm32_util_create_family_targets(L0)
+
+target_compile_options(STM32::L0 INTERFACE 
+    -mcpu=cortex-m0plus
+)
+target_link_options(STM32::L0 INTERFACE 
+    -mcpu=cortex-m0plus
+)

cmake/stm32/l1.cmake

@@ -0,0 +1,89 @@
+set(STM32_L1_TYPES 
+    L100xB  L100xBA L100xC  L151xB  L151xBA L151xC  L151xCA L151xD 
+    L151xDX L151xE  L152xB  L152xBA L152xC  L152xCA L152xD  L152xDX
+    L152xE  L162xC  L162xCA L162xD  L162xDX L162xE
+)
+set(STM32_L1_TYPE_MATCH 
+    "L100.[68B]" "L100.[68B]A" "L100.C" "L151.[68B]" "L151.[68B]A" "L151.C" "L151.CA" "L151.D"
+    "L151.DX" "L151.E" "L152.[68B]" "L152.[68B]A" "L152.C" "L152.CA" "L152.D" "L152.DX"
+    "L152.E" "L162.C" "L162.CA" "L162.D" "L162.DX" "L162.E"
+)
+set(STM32_L1_RAM_SIZES 
+     0K  0K 16K  0K  0K 32K 32K 48K
+    80K 80K  0K  0K 32K 32K 48K 80K
+    80K 32K 32K 48K 80K 80K
+)
+set(STM32_L1_CCRAM_SIZES 
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  0K  0K  0K  0K
+     0K  0K  0K  0K  0K  0K
+)
+
+stm32_util_create_family_targets(L1)
+
+target_compile_options(STM32::L1 INTERFACE 
+    -mcpu=cortex-m3
+)
+target_link_options(STM32::L1 INTERFACE 
+    -mcpu=cortex-m3
+)
+
+function(stm32l1_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
+    string(REGEX REPLACE "L1[0-9][0-9].([68BCDE])" "\\1" SIZE_CODE ${DEVICE})
+    
+    unset(RAM)
+    
+    if((TYPE STREQUAL "L100xB"))
+        if(SIZE_CODE STREQUAL "6")
+            set(RAM "4K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "8K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "10K")
+        endif()
+    elseif((TYPE STREQUAL "L100xBA"))
+        if(SIZE_CODE STREQUAL "6")
+            set(RAM "4K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "8K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "16K")
+        endif()
+    elseif((TYPE STREQUAL "L151xB"))
+        if(SIZE_CODE STREQUAL "6")
+            set(RAM "10K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "10K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "16K")
+        endif()
+    elseif((TYPE STREQUAL "L151xBA"))
+        if(SIZE_CODE STREQUAL "6")
+            set(RAM "16K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "32K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "32K")
+        endif()
+    elseif((TYPE STREQUAL "L152xB"))
+        if(SIZE_CODE STREQUAL "6")
+            set(RAM "10K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "10K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "16K")
+        endif()
+    elseif((TYPE STREQUAL "L152xBA"))
+        if(SIZE_CODE STREQUAL "6")
+            set(RAM "16K")
+        elseif(SIZE_CODE STREQUAL "8")
+            set(RAM "32K")
+        elseif(SIZE_CODE STREQUAL "B")
+            set(RAM "32K")
+        endif()
+    endif()
+    
+    if(RAM)
+        set(${RAM_SIZE} ${RAM} PARENT_SCOPE)
+    endif()
+endfunction()

cmake/stm32/l4.cmake

@@ -0,0 +1,38 @@
+set(STM32_L4_TYPES 
+    L412xx L422xx L431xx L432xx L433xx L442xx 
+    L443xx L451xx L452xx L462xx L471xx L475xx 
+    L476xx L485xx L486xx L496xx L4A6xx L4P5xx 
+    L4Q5xx L4R5xx L4R7xx L4R9xx L4S5xx L4S7xx 
+    L4S9xx
+)
+set(STM32_L4_TYPE_MATCH 
+   "L412.." "L422.." "L431.." "L432.." "L433.." "L442.." 
+   "L443.." "L451.." "L452.." "L462.." "L471.." "L475.." 
+   "L476.." "L485.." "L486.." "L496.." "L4A6.." "L4P5.." 
+   "L4Q5.." "L4R5.." "L4R7.." "L4R9.." "L4S5.." "L4S7.." 
+   "L4S9.."
+)
+
+set(STM32_L4_RAM_SIZES 
+     40K  40K  64K  64K  64K  64K
+     64K 160K 160K 160K 128K 128K
+    128K 128K 128K 320K 320K 320K 
+    320K 640K 640K 640K 640K 640K
+    640K
+)
+set(STM32_L4_CCRAM_SIZES 
+      8K   8K  16K  16K  16K  16K
+     16K  32K  32K  32K  32K  32K
+     32K  32K  32K  64K  64K  64K
+     64K  64K  64K  64K  64K  64K
+     64K
+)
+
+stm32_util_create_family_targets(L4)
+
+target_compile_options(STM32::L4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)
+target_link_options(STM32::L4 INTERFACE 
+    -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+)

cmake/stm32/linker_ld.cmake

@@ -0,0 +1,144 @@
+if((NOT CCRAM_SIZE) OR (CCRAM_SIZE STREQUAL "0K"))
+    set(CCRAM_DEFINITION "")
+    set(CCRAM_SECTION "")
+else()
+    set(CCRAM_DEFINITION "    CCMRAM (rw) : ORIGIN = ${CCRAM_ORIGIN}, LENGTH = ${CCRAM_SIZE}\n")
+    set(CCRAM_SECTION "
+_siccmram = LOADADDR(.ccmram);\n\
+.ccmram :\n\
+{\n\
+. = ALIGN(4);\n\
+_sccmram = .;\n\
+*(.ccmram)\n\
+*(.ccmram*)\n\
+. = ALIGN(4);\n\
+_eccmram = .;\n\
+} >CCMRAM AT> FLASH\n\
+        ")
+endif()
+    
+set(SCRIPT_TEXT 
+"ENTRY(Reset_Handler)\n\
+\n\
+_estack = ${RAM_ORIGIN} + ${RAM_SIZE};\n\
+_Min_Heap_Size = ${HEAP_SIZE};\n\
+_Min_Stack_Size = ${STACK_SIZE};\n\
+\n\
+MEMORY\n\
+{\n\
+    FLASH (rx)      : ORIGIN = ${FLASH_ORIGIN}, LENGTH = ${FLASH_SIZE}\n\
+    RAM (xrw)      : ORIGIN = ${RAM_ORIGIN}, LENGTH = ${RAM_SIZE}\n\
+${CCRAM_DEFINITION}\n\
+}\n\
+\n\
+SECTIONS\n\
+{\n\
+  .isr_vector :\n\
+  {\n\
+    . = ALIGN(4);\n\
+    KEEP(*(.isr_vector))\n\
+    . = ALIGN(4);\n\
+  } >FLASH\n\
+\n\
+  .text :\n\
+  {\n\
+    . = ALIGN(4);\n\
+    *(.text)\n\
+    *(.text*)\n\
+    *(.glue_7)\n\
+    *(.glue_7t)\n\
+    *(.eh_frame)\n\
+\n\
+    KEEP (*(.init))\n\
+    KEEP (*(.fini))\n\
+\n\
+    . = ALIGN(4);\n\
+    _etext = .;\n\
+  } >FLASH\n\
+\n\
+  .rodata :\n\
+  {\n\
+    . = ALIGN(4);\n\
+    *(.rodata)\n\
+    *(.rodata*)\n\
+    . = ALIGN(4);\n\
+  } >FLASH\n\
+\n\
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH\n\
+  .ARM : {\n\
+    __exidx_start = .;\n\
+    *(.ARM.exidx*)\n\
+    __exidx_end = .;\n\
+  } >FLASH\n\
+\n\
+  .preinit_array     :\n\
+  {\n\
+    PROVIDE_HIDDEN (__preinit_array_start = .);\n\
+    KEEP (*(.preinit_array*))\n\
+    PROVIDE_HIDDEN (__preinit_array_end = .);\n\
+  } >FLASH\n\
+  .init_array :\n\
+  {\n\
+    PROVIDE_HIDDEN (__init_array_start = .);\n\
+    KEEP (*(SORT(.init_array.*)))\n\
+    KEEP (*(.init_array*))\n\
+    PROVIDE_HIDDEN (__init_array_end = .);\n\
+  } >FLASH\n\
+  .fini_array :\n\
+  {\n\
+    PROVIDE_HIDDEN (__fini_array_start = .);\n\
+    KEEP (*(SORT(.fini_array.*)))\n\
+    KEEP (*(.fini_array*))\n\
+    PROVIDE_HIDDEN (__fini_array_end = .);\n\
+  } >FLASH\n\
+\n\
+  _sidata = LOADADDR(.data);\n\
+\n\
+  .data : \n\
+  {\n\
+    . = ALIGN(4);\n\
+    _sdata = .; \n\
+    *(.data)\n\
+    *(.data*)\n\
+\n\
+    . = ALIGN(4);\n\
+    _edata = .;\n\
+  } >RAM AT> FLASH\n\
+${CCRAM_SECTION}\n\
+  . = ALIGN(4);\n\
+  .bss :\n\
+  {\n\
+    _sbss = .;\n\
+    __bss_start__ = _sbss;\n\
+    *(.bss)\n\
+    *(.bss*)\n\
+    *(COMMON)\n\
+\n\
+    . = ALIGN(4);\n\
+    _ebss = .;\n\
+    __bss_end__ = _ebss;\n\
+  } >RAM\n\
+\n\
+  ._user_heap_stack :\n\
+  {\n\
+    . = ALIGN(8);\n\
+    PROVIDE ( end = . );\n\
+    PROVIDE ( _end = . );\n\
+    . = . + _Min_Heap_Size;\n\
+    . = . + _Min_Stack_Size;\n\
+    . = ALIGN(8);\n\
+  } >RAM\n\
+\n\
+  /DISCARD/ :\n\
+  {\n\
+    libc.a ( * )\n\
+    libm.a ( * )\n\
+    libgcc.a ( * )\n\
+  }\n\
+\n\
+  .ARM.attributes 0 : { *(.ARM.attributes) }\n\
+}"
+)
+file(WRITE "${LINKER_SCRIPT}" "${SCRIPT_TEXT}")
+
+

cmake/stm32/utilities.cmake

@@ -0,0 +1,154 @@
+function(stm32_util_create_family_targets FAMILY)
+    set(CORES ${ARGN})
+    list(LENGTH CORES NUM_CORES)
+    if(${NUM_CORES} EQUAL 0)
+        set(CORE "")
+        set(CORE_C "")
+    elseif(${NUM_CORES} EQUAL 1)
+        set(CORE "_${CORES}")
+        set(CORE_C "::${CORES}")
+    else()
+        message(FATAL_ERROR "Expected at most one core for family ${FAMILY}: ${CORES}")
+    endif()
+
+    if(NOT (TARGET STM32::${FAMILY}${CORE_C}))
+        add_library(STM32::${FAMILY}${CORE_C} INTERFACE IMPORTED)
+        target_compile_options(STM32::${FAMILY}${CORE_C} INTERFACE 
+            --sysroot="${TOOLCHAIN_SYSROOT}"
+            -mthumb -mabi=aapcs -Wall -ffunction-sections -fdata-sections -fno-strict-aliasing -fno-builtin -ffast-math
+            $<$<CONFIG:Debug>:-Og>
+            $<$<CONFIG:Release>:-Os>
+        )
+        target_link_options(STM32::${FAMILY}${CORE_C} INTERFACE 
+            --sysroot="${TOOLCHAIN_SYSROOT}"
+            -mthumb -mabi=aapcs -Wl,--gc-sections
+            $<$<CONFIG:Debug>:-Og>
+            $<$<CONFIG:Release>:-Os -s>
+        )
+        target_compile_definitions(STM32::${FAMILY}${CORE_C} INTERFACE 
+            STM32${FAMILY}
+        )
+    endif()
+    foreach(TYPE ${STM32_${FAMILY}_TYPES})
+        if(NOT (TARGET STM32::${TYPE}${CORE_C}))
+            add_library(STM32::${TYPE}${CORE_C} INTERFACE IMPORTED)
+            target_link_libraries(STM32::${TYPE}${CORE_C} INTERFACE STM32::${FAMILY}${CORE_C})
+            target_compile_definitions(STM32::${TYPE}${CORE_C} INTERFACE 
+                STM32${TYPE}
+            )
+        endif()
+    endforeach()
+endfunction()
+
+include(FetchContent)
+
+set(STM32_FETCH_FAMILIES       F0      F1      F2      F3      F4      F7      G0      G4      H7      L0      L1      L4     )
+set(STM32_FETCH_CUBE_VERSIONS  v1.11.1 v1.8.1  v1.9.0  v1.11.1 v1.25.1 v1.16.0 v1.3.0  v1.3.0  v1.8.0  v1.11.3 v1.10.0 v1.16.0)
+set(STM32_FETCH_CMSIS_VERSIONS v2.3.4  v4.3.1  v2.2.4  v2.3.4  v2.6.4  v1.2.5  v1.3.0  v1.2.0  v1.9.0  v1.9.0  v2.3.1  v1.7.0 )
+set(STM32_FETCH_HAL_VERSIONS   v1.7.4  v1.1.6  v1.2.5  v1.5.4  v1.7.9  v1.2.8  v1.3.0  v1.2.0  v1.9.0  v1.10.3 v1.4.2  v1.12.0)
+
+FetchContent_Declare(
+    STM32-CMSIS
+    GIT_REPOSITORY https://github.com/STMicroelectronics/cmsis_core/
+    GIT_TAG        v5.6.0
+    GIT_PROGRESS   TRUE
+)
+
+set(IDX 0)
+foreach(FAMILY ${STM32_FETCH_FAMILIES})
+    string(TOLOWER ${FAMILY} FAMILY_L)
+	list(GET STM32_FETCH_CUBE_VERSIONS ${IDX} CUBE_VERSION)
+	list(GET STM32_FETCH_CMSIS_VERSIONS ${IDX} CMSIS_VERSION)
+	list(GET STM32_FETCH_HAL_VERSIONS ${IDX} HAL_VERSION)
+	
+	FetchContent_Declare(
+		STM32Cube${FAMILY}
+		GIT_REPOSITORY https://github.com/STMicroelectronics/STM32Cube${FAMILY}/
+		GIT_TAG        ${CUBE_VERSION}
+		GIT_PROGRESS   TRUE
+	)
+	FetchContent_Declare(
+		STM32-CMSIS-${FAMILY}
+		GIT_REPOSITORY https://github.com/STMicroelectronics/cmsis_device_${FAMILY_L}/
+		GIT_TAG        ${CMSIS_VERSION}
+		GIT_PROGRESS   TRUE
+	)
+	FetchContent_Declare(
+		STM32-HAL-${FAMILY}
+		GIT_REPOSITORY https://github.com/STMicroelectronics/stm32${FAMILY_L}xx_hal_driver/
+		GIT_TAG        ${HAL_VERSION}
+		GIT_PROGRESS   TRUE
+	)
+	math(EXPR IDX "${IDX} + 1")
+endforeach()
+
+function(stm32_fetch_cube)
+    foreach(FAMILY ${ARGV})
+        set(CUBE_NAME STM32Cube${FAMILY})
+        string(TOLOWER ${CUBE_NAME} CUBE_NAME_L)
+        
+        if(STM32_CUBE_${FAMILY}_PATH)
+            message(INFO "STM32_CUBE_${FAMILY}_PATH specified, skipping fetch for ${CUBE_NAME}")
+            continue()
+        endif()
+        
+		FetchContent_GetProperties(${CUBE_NAME} POPULATED CUBE_POPULATED)
+        if(NOT CUBE_POPULATED)
+            set(FETCHCONTENT_QUIET FALSE) # To see progress
+            FetchContent_Populate(${CUBE_NAME})
+        endif()
+        
+        set(STM32_CUBE_${FAMILY}_PATH ${${CUBE_NAME_L}_SOURCE_DIR} PARENT_SCOPE)
+    endforeach()
+endfunction()
+
+function(stm32_fetch_cmsis)
+	if(NOT STM32_CMSIS_PATH)
+        if(NOT STM32-CMSIS_POPULATED)
+            set(FETCHCONTENT_QUIET FALSE) # To see progress
+            FetchContent_Populate(STM32-CMSIS)
+        endif()
+        
+        set(STM32_CMSIS_PATH ${stm32-cmsis_SOURCE_DIR} PARENT_SCOPE)
+	else()
+		message(INFO "STM32_CMSIS_PATH specified, skipping fetch for STM32-CMSIS")
+	endif()
+    foreach(FAMILY ${ARGV})
+        set(CMSIS_NAME STM32-CMSIS-${FAMILY})
+        string(TOLOWER ${CMSIS_NAME} CMSIS_NAME_L)
+        
+        if(STM32_CMSIS_${FAMILY}_PATH)
+            message(INFO "STM32_CMSIS_${FAMILY}_PATH specified, skipping fetch for ${CMSIS_NAME}")
+            continue()
+        endif()
+        
+		FetchContent_GetProperties(${CMSIS_NAME_L} POPULATED CMSIS_POPULATED)
+        if(NOT CMSIS_POPULATED)
+            set(FETCHCONTENT_QUIET FALSE) # To see progress
+            FetchContent_Populate(${CMSIS_NAME})
+        endif()
+        
+        set(STM32_CMSIS_${FAMILY}_PATH ${${CMSIS_NAME_L}_SOURCE_DIR} PARENT_SCOPE)
+    endforeach()
+endfunction()
+
+function(stm32_fetch_hal)
+    foreach(FAMILY ${ARGV})
+        set(HAL_NAME STM32-HAL-${FAMILY})
+        string(TOLOWER ${HAL_NAME} HAL_NAME_L)
+        
+        if(STM32_HAL_${FAMILY}_PATH)
+            message(INFO "STM32_HAL_${FAMILY}_PATH specified, skipping fetch for ${HAL_NAME}")
+            continue()
+        endif()
+        
+		FetchContent_GetProperties(${HAL_NAME} POPULATED HAL_POPULATED)
+        if(NOT HAL_POPULATED)
+            set(FETCHCONTENT_QUIET FALSE) # To see progress
+            FetchContent_Populate(${HAL_NAME})
+        endif()
+        
+        set(STM32_HAL_${FAMILY}_PATH ${${HAL_NAME_L}_SOURCE_DIR} PARENT_SCOPE)
+    endforeach()
+endfunction()
+

cmake/stm32_gcc.cmake

@@ -0,0 +1,9 @@
+get_filename_component(STM32_CMAKE_DIR ${CMAKE_CURRENT_LIST_FILE} DIRECTORY)
+list(APPEND CMAKE_MODULE_PATH ${STM32_CMAKE_DIR})
+
+include(stm32/common)
+
+set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+find_program(CMAKE_C_COMPILER NAMES ${STM32_TARGET_TRIPLET}-gcc PATHS ${TOOLCHAIN_BIN_PATH})
+find_program(CMAKE_CXX_COMPILER NAMES ${STM32_TARGET_TRIPLET}-g++ PATHS ${TOOLCHAIN_BIN_PATH})
+find_program(CMAKE_ASM_COMPILER NAMES ${STM32_TARGET_TRIPLET}-gcc PATHS ${TOOLCHAIN_BIN_PATH})

cmake/stm32_linker.cmake

@@ -1,127 +0,0 @@
-# TODO: Add support for external RAM
-
-IF((NOT STM32_CCRAM_SIZE) OR (STM32_CCRAM_SIZE STREQUAL "0K"))
-  SET(STM32_CCRAM_DEF "")
-  SET(STM32_CCRAM_SECTION "")
-ELSE()
-  SET(STM32_CCRAM_DEF "  CCMRAM (rw) : ORIGIN = ${STM32_CCRAM_ORIGIN}, LENGTH = ${STM32_CCRAM_SIZE}\n")
-  SET(STM32_CCRAM_SECTION 
-  "  _siccmram = LOADADDR(.ccmram)\;\n"
-  "  .ccmram :\n"
-  "  {"
-  "    . = ALIGN(4)\;\n"
-  "    _sccmram = .\;\n"
-  "    *(.ccmram)\n"
-  "    *(.ccmram*)\n"
-  "    . = ALIGN(4)\;\n"
-  "    _eccmram = .\;\n"
-  "  } >CCMRAM AT> FLASH\n"
-  )
-ENDIF()
-
-SET(STM32_LINKER_SCRIPT_TEXT
-  "ENTRY(Reset_Handler)\n"
-  "_estack = ${STM32_RAM_ORIGIN} + ${STM32_RAM_SIZE} - 1\;\n"
-  "_Min_Heap_Size = ${STM32_MIN_HEAP_SIZE}\;\n"
-  "_Min_Stack_Size = ${STM32_MIN_STACK_SIZE}\;\n"
-  "MEMORY\n"
-  "{\n"
-  "  FLASH (rx)      : ORIGIN = ${STM32_FLASH_ORIGIN}, LENGTH = ${STM32_FLASH_SIZE}\n"
-  "  RAM (xrw)      : ORIGIN = ${STM32_RAM_ORIGIN}, LENGTH = ${STM32_RAM_SIZE}\n"
-  "${STM32_CCRAM_DEF}"
-  "}\n"
-  "SECTIONS\n"
-  "{\n"
-  "  .isr_vector :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    KEEP(*(.isr_vector))\n"
-  "    . = ALIGN(4)\;\n"
-  "  } >FLASH\n"
-  "  .text :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    *(.text)\n"
-  "    *(.text*)\n"
-  "    *(.glue_7)\n"
-  "    *(.glue_7t)\n"
-  "    *(.eh_frame)\n"
-  "    KEEP (*(.init))\n"
-  "    KEEP (*(.fini))\n"
-  "    . = ALIGN(4)\;\n"
-  "    _etext = .\;\n"
-  "  } >FLASH\n"
-  "  .rodata :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    *(.rodata)\n"
-  "    *(.rodata*)\n"
-  "    . = ALIGN(4)\;\n"
-  "  } >FLASH\n"
-  "  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH\n"
-  "  .ARM : {\n"
-  "    __exidx_start = .\;\n"
-  "    *(.ARM.exidx*)\n"
-  "    __exidx_end = .\;\n"
-  "  } >FLASH\n"
-  "  .preinit_array     :\n"
-  "  {\n"
-  "    PROVIDE_HIDDEN (__preinit_array_start = .)\;\n"
-  "    KEEP (*(.preinit_array*))\n"
-  "    PROVIDE_HIDDEN (__preinit_array_end = .)\;\n"
-  "  } >FLASH\n"
-  "  .init_array :\n"
-  "  {\n"
-  "    PROVIDE_HIDDEN (__init_array_start = .)\;\n"
-  "    KEEP (*(SORT(.init_array.*)))\n"
-  "    KEEP (*(.init_array*))\n"
-  "    PROVIDE_HIDDEN (__init_array_end = .)\;\n"
-  "  } >FLASH\n"
-  "  .fini_array :\n"
-  "  {\n"
-  "    PROVIDE_HIDDEN (__fini_array_start = .)\;\n"
-  "    KEEP (*(SORT(.fini_array.*)))\n"
-  "    KEEP (*(.fini_array*))\n"
-  "    PROVIDE_HIDDEN (__fini_array_end = .)\;\n"
-  "  } >FLASH\n"
-  "  _sidata = LOADADDR(.data)\;\n"
-  "  .data : \n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    _sdata = .\;\n"
-  "    *(.data)\n"
-  "    *(.data*)\n"
-  "    . = ALIGN(4)\;\n"
-  "    _edata = .\;\n"
-  "  } >RAM AT> FLASH\n"
-  "${STM32_CCRAM_SECTION}"
-  "  . = ALIGN(4)\;\n"
-  "  .bss :\n"
-  "  {\n"
-  "    _sbss = .\;\n"
-  "    __bss_start__ = _sbss\;\n"
-  "    *(.bss)\n"
-  "    *(.bss*)\n"
-  "    *(COMMON)\n"
-  "    . = ALIGN(4)\;\n"
-  "    _ebss = .\;\n"
-  "    __bss_end__ = _ebss\;\n"
-  "  } >RAM\n"
-  "  ._user_heap_stack :\n"
-  "  {\n"
-  "    . = ALIGN(4)\;\n"
-  "    PROVIDE ( end = . )\;\n"
-  "    PROVIDE ( _end = . )\;\n"
-  "    . = . + _Min_Heap_Size\;\n"
-  "    . = . + _Min_Stack_Size\;\n"
-  "    . = ALIGN(4)\;\n"
-  "  } >RAM\n"
-  "  /DISCARD/ :\n"
-  "  {\n"
-  "    libc.a ( * )\n"
-  "    libm.a ( * )\n"
-  "    libgcc.a ( * )\n"
-  "  }\n"
-  "  .ARM.attributes 0 : { *(.ARM.attributes) }\n"
-  "}\n"
-)

cmake/uGFX_GDISP.cmake

@@ -1,13 +0,0 @@
-SET(uGFX_gdisp_SEARCH_PATH ${uGFX_DIR}/src/gdisp)
-SET(uGFX_gdisp_HEADERS gdisp_colors.h gdisp_options.h gdisp_rules.h)
-SET(uGFX_gdisp_SOURCES gdisp.c)
-
-FOREACH(driver ${uGFX_GDISP_DRIVERS})
-    LIST(FIND uGFX_FIND_COMPONENTS ${driver} DRIVER_INDEX)
-    IF(NOT ${DRIVER_INDEX} LESS 0)
-        SET(uGFX_${driver}_SEARCH_PATH ${uGFX_DIR}/drivers/gdisp/${driver})
-        SET(uGFX_${driver}_SOURCES gdisp_lld_${driver}.c)
-        SET(uGFX_${driver}_HEADERS gdisp_lld_config.h)
-        LIST(APPEND uGFX_GDISP_MODULES ${driver})
-    ENDIF()
-ENDFOREACH()

cmake/uGFX_GOS.cmake

@@ -1,11 +0,0 @@
-SET(uGFX_GOS_MODULES gos_arduino gos_chibios gos_ecos gos_freertos gos_linux gos_osx gos_raw32 gos_rawrtos gos_win32 gos_x_heap gos_x_threads)
-
-SET(uGFX_gos_SEARCH_PATH ${uGFX_DIR}/src/gos)
-SET(uGFX_gos_HEADERS gos.h)
-
-FOREACH(module ${uGFX_GOS_MODULES})
-  SET(uGFX_${module}_SEARCH_PATH ${uGFX_DIR}/src/gos)
-  SET(uGFX_${module}_SOURCES ${module}.c)
-  SET(uGFX_${module}_HEADERS ${module}.h)
-ENDFOREACH()
-

examples/blinky/CMakeLists.txt

@@ -0,0 +1,46 @@
+cmake_minimum_required(VERSION 3.13)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/stm32_gcc.cmake)
+
+project(stm32-blinky C ASM)
+set(CMAKE_INCLUDE_CURRENT_DIR TRUE)
+
+find_package(CMSIS COMPONENTS STM32L0 STM32F1 STM32F4 REQUIRED)
+find_package(HAL COMPONENTS STM32L0 STM32F1 STM32F4 RCC GPIO CORTEX REQUIRED)
+# Find all drivers:
+#find_package(HAL COMPONENTS STM32L0 STM32F1 STM32F4 REQUIRED)
+# Find drivers for all families:
+#find_package(HAL COMPONENTS RCC GPIO CORTEX REQUIRED)
+# Find LL driver:
+#find_package(HAL COMPONENTS LL_GPIO REQUIRED)
+# Find everything:
+#find_package(HAL REQUIRED)
+
+# STM32F4-Discovery
+add_executable(stm32-blinky-f4 blinky.c stm32f4xx_hal_conf.h)
+target_link_libraries(stm32-blinky-f4 
+    HAL::STM32::F4::RCC
+    HAL::STM32::F4::GPIO
+    HAL::STM32::F4::CORTEX
+    CMSIS::STM32::F407VG
+    STM32::NoSys 
+)
+
+# STM32VL-Discovery
+add_executable(stm32-blinky-f1 blinky.c stm32f1xx_hal_conf.h)
+target_link_libraries(stm32-blinky-f1
+    HAL::STM32::F1::RCC
+    HAL::STM32::F1::GPIO
+    HAL::STM32::F1::CORTEX
+    CMSIS::STM32::F100RB
+    STM32::NoSys
+)
+
+# STM32L0538-Discovery
+add_executable(stm32-blinky-l0 blinky.c stm32l0xx_hal_conf.h)
+target_link_libraries(stm32-blinky-l0
+    HAL::STM32::L0::RCC
+    HAL::STM32::L0::GPIO
+    HAL::STM32::L0::CORTEX
+    CMSIS::STM32::L053C8
+    STM32::NoSys
+)

examples/blinky/blinky.c

@@ -0,0 +1,58 @@
+#if defined STM32L0
+    #include <stm32l0xx_hal.h>
+
+    // STM32L0538-Discovery green led - PB4
+    #define LED_PORT                GPIOB
+    #define LED_PIN                 GPIO_PIN_4
+    #define LED_PORT_CLK_ENABLE     __HAL_RCC_GPIOB_CLK_ENABLE
+#elif defined STM32F1
+    #include <stm32f1xx_hal.h>
+
+    // STM32VL-Discovery green led - PC9
+    #define LED_PORT                GPIOC
+    #define LED_PIN                 GPIO_PIN_9
+    #define LED_PORT_CLK_ENABLE     __HAL_RCC_GPIOC_CLK_ENABLE
+#elif defined STM32F4
+    #include <stm32f4xx_hal.h>
+
+    // STM32F4-Discovery green led - PD12
+    #define LED_PORT                GPIOD
+    #define LED_PIN                 GPIO_PIN_12
+    #define LED_PORT_CLK_ENABLE     __HAL_RCC_GPIOD_CLK_ENABLE
+#endif
+
+void SysTick_Handler(void)
+{
+    HAL_IncTick();
+
+    // 1 Hz blinking
+    if ((HAL_GetTick() % 500) == 0)
+        HAL_GPIO_TogglePin(LED_PORT, LED_PIN);
+}
+
+void initGPIO()
+{
+    GPIO_InitTypeDef GPIO_Config;
+
+    GPIO_Config.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_Config.Pull = GPIO_NOPULL;
+    GPIO_Config.Speed = GPIO_SPEED_FREQ_HIGH;
+
+    GPIO_Config.Pin = LED_PIN;
+
+    LED_PORT_CLK_ENABLE();
+    HAL_GPIO_Init(LED_PORT, &GPIO_Config);
+}
+
+int main(void)
+{
+    HAL_Init();
+    initGPIO();
+    // 1kHz ticks
+    HAL_SYSTICK_Config(SystemCoreClock / 1000);
+
+    for (;;)
+        __WFI();
+
+    return 0;
+}

stm32-blinky/stm32f1xx_hal_conf.h → examples/blinky/stm32f1xx_hal_conf.h

@@ -2,47 +2,29 @@
   ******************************************************************************
   * @file    stm32f1xx_hal_conf.h
   * @author  MCD Application Team
-  * @version V1.0.0
-  * @date    15-December-2014
   * @brief   HAL configuration template file.
   *          This file should be copied to the application folder and renamed
   *          to stm32f1xx_hal_conf.h.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F1xx_HAL_CONF_H
 #define __STM32F1xx_HAL_CONF_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Exported types ------------------------------------------------------------*/
@@ -50,17 +32,19 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
 #define HAL_MODULE_ENABLED
 // #define HAL_ADC_MODULE_ENABLED
 // #define HAL_CAN_MODULE_ENABLED
+// #define HAL_CAN_LEGACY_MODULE_ENABLED
 // #define HAL_CEC_MODULE_ENABLED
 #define HAL_CORTEX_MODULE_ENABLED
 // #define HAL_CRC_MODULE_ENABLED
 // #define HAL_DAC_MODULE_ENABLED
 #define HAL_DMA_MODULE_ENABLED
 // #define HAL_ETH_MODULE_ENABLED
+// #define HAL_EXTI_MODULE_ENABLED
 #define HAL_FLASH_MODULE_ENABLED
 #define HAL_GPIO_MODULE_ENABLED
 // #define HAL_HCD_MODULE_ENABLED
@@ -72,114 +56,144 @@
 // #define HAL_NOR_MODULE_ENABLED
 // #define HAL_PCCARD_MODULE_ENABLED
 // #define HAL_PCD_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
+// #define HAL_PWR_MODULE_ENABLED
 #define HAL_RCC_MODULE_ENABLED
 // #define HAL_RTC_MODULE_ENABLED
 // #define HAL_SD_MODULE_ENABLED
 // #define HAL_SMARTCARD_MODULE_ENABLED
 // #define HAL_SPI_MODULE_ENABLED
 // #define HAL_SRAM_MODULE_ENABLED
-#define HAL_TIM_MODULE_ENABLED
+// #define HAL_TIM_MODULE_ENABLED
 // #define HAL_UART_MODULE_ENABLED
 // #define HAL_USART_MODULE_ENABLED
 // #define HAL_WWDG_MODULE_ENABLED
+// #define HAL_MMC_MODULE_ENABLED
 
 /* ########################## Oscillator Values adaptation ####################*/
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
 #if defined(USE_STM3210C_EVAL)
-  #define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
+#define HSE_VALUE    25000000U /*!< Value of the External oscillator in Hz */
 #else
-  #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+#define HSE_VALUE    8000000U /*!< Value of the External oscillator in Hz */
 #endif
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for HSE start up, in ms */
+#define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
+#define HSI_VALUE              8000000U  /*!< Value of the Internal oscillator in Hz */
 #endif /* HSI_VALUE */
 
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE               40000U     /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
+                                                The real value may vary depending on the variations
+                                                in voltage and temperature. */
 /**
   * @brief External Low Speed oscillator (LSE) value.
   *        This value is used by the UART, RTC HAL module to compute the system frequency
   */
 #if !defined  (LSE_VALUE)
-  #define LSE_VALUE    ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
+#define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
 #endif /* LSE_VALUE */
 
-   
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
+#define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
 
-   
 /* Tip: To avoid modifying this file each time you need to use different HSE,
    ===  you can define the HSE value in your toolchain compiler preprocessor. */
 
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */           
-#define  TICK_INT_PRIORITY            ((uint32_t)0x000F)    /*!< tick interrupt priority */            
-#define  USE_RTOS                     0     
-#define  PREFETCH_ENABLE              1
+  */
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0x0FU /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
-/*#define USE_FULL_ASSERT    1*/ 
-
+/* #define USE_FULL_ASSERT    1U */
 
 /* ################## Ethernet peripheral configuration ##################### */
 
 /* Section 1 : Ethernet peripheral configuration */
 
 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2
-#define MAC_ADDR1   0
-#define MAC_ADDR2   0
-#define MAC_ADDR3   0
-#define MAC_ADDR4   0
-#define MAC_ADDR5   0
-
-/* Definition of the Ethernet driver buffers size and count */   
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)8)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+#define ETH_RXBUFNB                    8U                  /* 8 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
-#define DP83848_PHY_ADDRESS             0x01
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FF)
+/* DP83848 PHY Address*/
+#define DP83848_PHY_ADDRESS             0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
+#define PHY_CONFIG_DELAY                0x00000FFFU
 
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
 
 /* Section 3: Common PHY Registers */
 
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
- 
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -194,13 +208,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
-#define PHY_SR                          ((uint16_t)0x10)    /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x11)    /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x12)    /*!< MII Interrupt Status and Misc. Control Register */
- 
+#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
+#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
+#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -211,152 +225,170 @@
 #define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
 #define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
 
+/* ################## SPI peripheral configuration ########################## */
 
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
- #include "stm32f1xx_hal_rcc.h"
+#include "stm32f1xx_hal_rcc.h"
 #endif /* HAL_RCC_MODULE_ENABLED */
 
 #ifdef HAL_GPIO_MODULE_ENABLED
- #include "stm32f1xx_hal_gpio.h"
+#include "stm32f1xx_hal_gpio.h"
 #endif /* HAL_GPIO_MODULE_ENABLED */
-   
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32f1xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
 #ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f1xx_hal_dma.h"
+#include "stm32f1xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f1xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */  
-   
+#include "stm32f1xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
 #ifdef HAL_CAN_MODULE_ENABLED
- #include "stm32f1xx_hal_can.h"
+#include "stm32f1xx_hal_can.h"
 #endif /* HAL_CAN_MODULE_ENABLED */
 
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "Legacy/stm32f1xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
 #ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f1xx_hal_cec.h"
+#include "stm32f1xx_hal_cec.h"
 #endif /* HAL_CEC_MODULE_ENABLED */
 
 #ifdef HAL_CORTEX_MODULE_ENABLED
- #include "stm32f1xx_hal_cortex.h"
+#include "stm32f1xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
 
 #ifdef HAL_ADC_MODULE_ENABLED
- #include "stm32f1xx_hal_adc.h"
+#include "stm32f1xx_hal_adc.h"
 #endif /* HAL_ADC_MODULE_ENABLED */
 
 #ifdef HAL_CRC_MODULE_ENABLED
- #include "stm32f1xx_hal_crc.h"
+#include "stm32f1xx_hal_crc.h"
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_DAC_MODULE_ENABLED
- #include "stm32f1xx_hal_dac.h"
+#include "stm32f1xx_hal_dac.h"
 #endif /* HAL_DAC_MODULE_ENABLED */
 
 #ifdef HAL_FLASH_MODULE_ENABLED
- #include "stm32f1xx_hal_flash.h"
+#include "stm32f1xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
 
 #ifdef HAL_SRAM_MODULE_ENABLED
- #include "stm32f1xx_hal_sram.h"
+#include "stm32f1xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
 
 #ifdef HAL_NOR_MODULE_ENABLED
- #include "stm32f1xx_hal_nor.h"
+#include "stm32f1xx_hal_nor.h"
 #endif /* HAL_NOR_MODULE_ENABLED */
 
 #ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f1xx_hal_i2c.h"
+#include "stm32f1xx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
 
 #ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f1xx_hal_i2s.h"
+#include "stm32f1xx_hal_i2s.h"
 #endif /* HAL_I2S_MODULE_ENABLED */
 
 #ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f1xx_hal_iwdg.h"
+#include "stm32f1xx_hal_iwdg.h"
 #endif /* HAL_IWDG_MODULE_ENABLED */
 
 #ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f1xx_hal_pwr.h"
+#include "stm32f1xx_hal_pwr.h"
 #endif /* HAL_PWR_MODULE_ENABLED */
 
 #ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f1xx_hal_rtc.h"
+#include "stm32f1xx_hal_rtc.h"
 #endif /* HAL_RTC_MODULE_ENABLED */
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
- #include "stm32f1xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+#include "stm32f1xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
 
 #ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f1xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */  
+#include "stm32f1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
 
 #ifdef HAL_NAND_MODULE_ENABLED
- #include "stm32f1xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */     
+#include "stm32f1xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
 
 #ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f1xx_hal_spi.h"
+#include "stm32f1xx_hal_spi.h"
 #endif /* HAL_SPI_MODULE_ENABLED */
 
 #ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f1xx_hal_tim.h"
+#include "stm32f1xx_hal_tim.h"
 #endif /* HAL_TIM_MODULE_ENABLED */
 
 #ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f1xx_hal_uart.h"
+#include "stm32f1xx_hal_uart.h"
 #endif /* HAL_UART_MODULE_ENABLED */
 
 #ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f1xx_hal_usart.h"
+#include "stm32f1xx_hal_usart.h"
 #endif /* HAL_USART_MODULE_ENABLED */
 
 #ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f1xx_hal_irda.h"
+#include "stm32f1xx_hal_irda.h"
 #endif /* HAL_IRDA_MODULE_ENABLED */
 
 #ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f1xx_hal_smartcard.h"
+#include "stm32f1xx_hal_smartcard.h"
 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
 
 #ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f1xx_hal_wwdg.h"
+#include "stm32f1xx_hal_wwdg.h"
 #endif /* HAL_WWDG_MODULE_ENABLED */
 
 #ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f1xx_hal_pcd.h"
+#include "stm32f1xx_hal_pcd.h"
 #endif /* HAL_PCD_MODULE_ENABLED */
 
-
 #ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f1xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */   
-   
+#include "stm32f1xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32f1xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
 
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
   * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
+  * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+void assert_failed(uint8_t* file, uint32_t line);
 #else
-  #define assert_param(expr) ((void)0)
+#define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */
 
+
 #ifdef __cplusplus
 }
 #endif

stm32-newlib/stm32f4xx_hal_conf.h → examples/blinky/stm32f4xx_hal_conf.h

@@ -2,37 +2,19 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_conf_template.h
   * @author  MCD Application Team
-  * @version V1.3.1
-  * @date    25-March-2015
   * @brief   HAL configuration template file. 
   *          This file should be copied to the application folder and renamed
   *          to stm32f4xx_hal_conf.h.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */ 
@@ -53,48 +35,54 @@
   * @brief This is the list of modules to be used in the HAL driver 
   */
 #define HAL_MODULE_ENABLED  
-// #define HAL_ADC_MODULE_ENABLED  
-// #define HAL_CAN_MODULE_ENABLED  
-// #define HAL_CRC_MODULE_ENABLED  
+// #define HAL_ADC_MODULE_ENABLED
+// #define HAL_CAN_MODULE_ENABLED
+// #define HAL_CAN_LEGACY_MODULE_ENABLED
+// #define HAL_CRC_MODULE_ENABLED
 // #define HAL_CEC_MODULE_ENABLED
-// #define HAL_CRYP_MODULE_ENABLED  
-// #define HAL_DAC_MODULE_ENABLED  
-// #define HAL_DCMI_MODULE_ENABLED 
+// #define HAL_CRYP_MODULE_ENABLED
+// #define HAL_DAC_MODULE_ENABLED
+// #define HAL_DCMI_MODULE_ENABLED
 #define HAL_DMA_MODULE_ENABLED
-// #define HAL_DMA2D_MODULE_ENABLED 
-// #define HAL_ETH_MODULE_ENABLED 
-#define HAL_FLASH_MODULE_ENABLED 
+// #define HAL_DMA2D_MODULE_ENABLED
+// #define HAL_ETH_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
 // #define HAL_NAND_MODULE_ENABLED
 // #define HAL_NOR_MODULE_ENABLED
 // #define HAL_PCCARD_MODULE_ENABLED
 // #define HAL_SRAM_MODULE_ENABLED
 // #define HAL_SDRAM_MODULE_ENABLED
-// #define HAL_HASH_MODULE_ENABLED  
+// #define HAL_HASH_MODULE_ENABLED
 #define HAL_GPIO_MODULE_ENABLED
+// #define HAL_EXTI_MODULE_ENABLED
 // #define HAL_I2C_MODULE_ENABLED
-// #define HAL_I2S_MODULE_ENABLED   
-// #define HAL_IWDG_MODULE_ENABLED 
-// #define HAL_LTDC_MODULE_ENABLED 
-#define HAL_PWR_MODULE_ENABLED   
-// #define HAL_QSPI_MODULE_ENABLED   
-#define HAL_RCC_MODULE_ENABLED 
-// #define HAL_RNG_MODULE_ENABLED   
-#define HAL_RTC_MODULE_ENABLED
-// #define HAL_SAI_MODULE_ENABLED   
-// #define HAL_SD_MODULE_ENABLED  
-// #define HAL_SPI_MODULE_ENABLED   
-// #define HAL_TIM_MODULE_ENABLED   
-#define HAL_UART_MODULE_ENABLED
+// #define HAL_SMBUS_MODULE_ENABLED
+// #define HAL_I2S_MODULE_ENABLED
+// #define HAL_IWDG_MODULE_ENABLED
+// #define HAL_LTDC_MODULE_ENABLED
+// #define HAL_DSI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+// #define HAL_QSPI_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+// #define HAL_RNG_MODULE_ENABLED
+// #define HAL_RTC_MODULE_ENABLED
+// #define HAL_SAI_MODULE_ENABLED
+// #define HAL_SD_MODULE_ENABLED
+// #define HAL_SPI_MODULE_ENABLED
+// #define HAL_TIM_MODULE_ENABLED
+// #define HAL_UART_MODULE_ENABLED
 // #define HAL_USART_MODULE_ENABLED
-// #define HAL_IRDA_MODULE_ENABLED 
-// #define HAL_SMARTCARD_MODULE_ENABLED 
-// #define HAL_WWDG_MODULE_ENABLED  
+// #define HAL_IRDA_MODULE_ENABLED
+// #define HAL_SMARTCARD_MODULE_ENABLED
+// #define HAL_WWDG_MODULE_ENABLED
 #define HAL_CORTEX_MODULE_ENABLED
 // #define HAL_PCD_MODULE_ENABLED
 // #define HAL_HCD_MODULE_ENABLED
 // #define HAL_FMPI2C_MODULE_ENABLED
 // #define HAL_SPDIFRX_MODULE_ENABLED
-
+// #define HAL_DFSDM_MODULE_ENABLED
+// #define HAL_LPTIM_MODULE_ENABLED
+// #define HAL_MMC_MODULE_ENABLED
 
 /* ########################## HSE/HSI Values adaptation ##################### */
 /**
@@ -103,11 +91,11 @@
   *        (when HSE is used as system clock source, directly or through the PLL).  
   */
 #if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+  #define HSE_VALUE              25000000U /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for HSE start up, in ms */
+  #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**
@@ -116,31 +104,35 @@
   *        (when HSI is used as system clock source, directly or through the PLL). 
   */
 #if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+  #define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
 #endif /* HSI_VALUE */
 
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
 #if !defined  (LSI_VALUE) 
- #define LSI_VALUE  ((uint32_t)32000)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
+ #define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
+                                                The real value may vary depending on the variations
+                                                in voltage and temperature. */
 /**
   * @brief External Low Speed oscillator (LSE) value.
   */
 #if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768)    /*!< Value of the External Low Speed oscillator in Hz */
+ #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
 #endif /* LSE_VALUE */
 
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
 /**
   * @brief External clock source for I2S peripheral
   *        This value is used by the I2S HAL module to compute the I2S clock source 
   *        frequency, this source is inserted directly through I2S_CKIN pad. 
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/
+  #define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
 #endif /* EXTERNAL_CLOCK_VALUE */
 
 /* Tip: To avoid modifying this file each time you need to use different HSE,
@@ -150,54 +142,93 @@
 /**
   * @brief This is the HAL system configuration section
   */     
-#define  VDD_VALUE                    ((uint32_t)3300) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0F) /*!< tick interrupt priority */
-#define  USE_RTOS                     0
-#define  PREFETCH_ENABLE              1
-#define  INSTRUCTION_CACHE_ENABLE     1
-#define  DATA_CACHE_ENABLE            1
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0x0FU /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
 
 /* ########################## Assert Selection ############################## */
 /**
   * @brief Uncomment the line below to expanse the "assert_param" macro in the 
   *        HAL drivers code
   */
-/* #define USE_FULL_ASSERT    1 */
+/* #define USE_FULL_ASSERT    1U */
 
 /* ################## Ethernet peripheral configuration ##################### */
 
 /* Section 1 : Ethernet peripheral configuration */
 
 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2
-#define MAC_ADDR1   0
-#define MAC_ADDR2   0
-#define MAC_ADDR3   0
-#define MAC_ADDR4   0
-#define MAC_ADDR5   0
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
 
 /* Definition of the Ethernet driver buffers size and count */   
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)4)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
 
 /* Section 2: PHY configuration section */
 
 /* DP83848 PHY Address*/ 
-#define DP83848_PHY_ADDRESS             0x01
+#define DP83848_PHY_ADDRESS             0x01U
 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FF)
+#define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
+#define PHY_CONFIG_DELAY                0x00000FFFU
 
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
 
 /* Section 3: Common PHY Registers */
 
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
  
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
@@ -216,9 +247,9 @@
   
 /* Section 4: Extended PHY Registers */
 
-#define PHY_SR                          ((uint16_t)0x10)    /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x11)    /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x12)    /*!< MII Interrupt Status and Misc. Control Register */
+#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
+#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
+#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
  
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
@@ -230,6 +261,15 @@
 #define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
 #define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
 
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
 /* Includes ------------------------------------------------------------------*/
 /**
   * @brief Include module's header file 
@@ -243,6 +283,10 @@
   #include "stm32f4xx_hal_gpio.h"
 #endif /* HAL_GPIO_MODULE_ENABLED */
 
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
@@ -259,6 +303,10 @@
   #include "stm32f4xx_hal_can.h"
 #endif /* HAL_CAN_MODULE_ENABLED */
 
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
 #ifdef HAL_CRC_MODULE_ENABLED
   #include "stm32f4xx_hal_crc.h"
 #endif /* HAL_CRC_MODULE_ENABLED */
@@ -305,7 +353,7 @@
   
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -315,6 +363,10 @@
  #include "stm32f4xx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
 
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
 #ifdef HAL_I2S_MODULE_ENABLED
  #include "stm32f4xx_hal_i2s.h"
 #endif /* HAL_I2S_MODULE_ENABLED */
@@ -383,6 +435,10 @@
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
    
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
 #ifdef HAL_QSPI_MODULE_ENABLED
  #include "stm32f4xx_hal_qspi.h"
 #endif /* HAL_QSPI_MODULE_ENABLED */
@@ -398,22 +454,34 @@
 #ifdef HAL_SPDIFRX_MODULE_ENABLED
  #include "stm32f4xx_hal_spdifrx.h"
 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
-   
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
   * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
+  * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
   *         line number of the call that failed. 
   *         If expr is true, it returns no value.
   * @retval None
   */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
   void assert_failed(uint8_t* file, uint32_t line);
 #else
-  #define assert_param(expr) ((void)0)
+  #define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */
 
 

examples/blinky/stm32l0xx_hal_conf.h

@@ -0,0 +1,338 @@
+/**
+  ******************************************************************************
+  * @file    stm32l0xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file. 
+  *          This file should be copied to the application folder and renamed
+  *          to stm32l0xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics. 
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the 
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L0xx_HAL_CONF_H
+#define __STM32L0xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+#define HAL_MODULE_ENABLED
+// #define HAL_ADC_MODULE_ENABLED   
+// #define HAL_COMP_MODULE_ENABLED 
+// #define HAL_CRC_MODULE_ENABLED  
+// #define HAL_CRYP_MODULE_ENABLED  
+// #define HAL_DAC_MODULE_ENABLED   
+#define HAL_DMA_MODULE_ENABLED
+// #define HAL_FIREWALL_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+// #define HAL_I2C_MODULE_ENABLED
+// #define HAL_I2S_MODULE_ENABLED   
+// #define HAL_IWDG_MODULE_ENABLED
+// #define HAL_LCD_MODULE_ENABLED 
+// #define HAL_LPTIM_MODULE_ENABLED
+// #define HAL_PWR_MODULE_ENABLED  
+#define HAL_RCC_MODULE_ENABLED
+// #define HAL_RNG_MODULE_ENABLED   
+// #define HAL_RTC_MODULE_ENABLED
+// #define HAL_SPI_MODULE_ENABLED   
+// #define HAL_TIM_MODULE_ENABLED
+// #define HAL_TSC_MODULE_ENABLED   
+// #define HAL_UART_MODULE_ENABLED 
+// #define HAL_USART_MODULE_ENABLED 
+// #define HAL_IRDA_MODULE_ENABLED 
+// #define HAL_SMARTCARD_MODULE_ENABLED 
+// #define HAL_SMBUS_MODULE_ENABLED 
+// #define HAL_WWDG_MODULE_ENABLED  
+#define HAL_CORTEX_MODULE_ENABLED
+// #define HAL_PCD_MODULE_ENABLED 
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal Multiple Speed oscillator (MSI) default value.
+  *        This value is the default MSI range value after Reset.
+  */
+#if !defined  (MSI_VALUE)
+  #define MSI_VALUE    ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator for USB (HSI48) value.
+  */
+#if !defined  (HSI48_VALUE) 
+#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+#endif /* HSI48_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE  ((uint32_t)37000U)       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.*/
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+  #define LSE_VALUE    ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+/**
+  * @brief Time out for LSE start up value in ms.
+  */
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+   
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */     
+#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U)    /*!< tick interrupt priority */            
+#define  USE_RTOS                     0U     
+#define  PREFETCH_ENABLE              1U              
+#define  PREREAD_ENABLE               0U
+#define  BUFFER_CACHE_DISABLE         0U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+
+/* ################## Register callback feature configuration ############### */
+/**
+  * @brief Set below the peripheral configuration  to "1U" to add the support
+  *        of HAL callback registration/deregistration feature for the HAL
+  *        driver(s). This allows user application to provide specific callback
+  *        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+  *        the default weak callback functions (see each stm32l0xx_hal_ppp.h file
+  *        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+  *        for each PPP peripheral).
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_TSC_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC                   1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32l0xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+  
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32l0xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32l0xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32l0xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32l0xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+  #include "stm32l0xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32l0xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32l0xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32l0xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FIREWALL_MODULE_ENABLED
+  #include "stm32l0xx_hal_firewall.h"
+#endif /* HAL_FIREWALL_MODULE_ENABLED */
+ 
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32l0xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+ 
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32l0xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32l0xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32l0xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32l0xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32l0xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+   
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32l0xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32l0xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32l0xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32l0xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32l0xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+ #include "stm32l0xx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32l0xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32l0xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32l0xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32l0xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32l0xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32l0xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32l0xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L0xx_HAL_CONF_H */
+ 
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

examples/custom-linker-script/CMakeLists.txt

@@ -0,0 +1,14 @@
+cmake_minimum_required(VERSION 3.13)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/stm32_gcc.cmake)
+
+project(stm32-custom-linker-script C ASM)
+
+find_package(CMSIS COMPONENTS STM32F407VG REQUIRED)
+
+set(PROJECT_SOURCES
+    main.c
+)
+
+add_executable(stm32-custom-linker-script.elf ${PROJECT_SOURCES})
+target_link_libraries(stm32-custom-linker-script.elf CMSIS::STM32::F407xx STM32::NoSys)
+stm32_add_linker_script(stm32-custom-linker-script.elf PRIVATE F407VG.ld)

examples/custom-linker-script/F407VG.ld

@@ -0,0 +1,132 @@
+ENTRY(Reset_Handler)
+
+_estack = 0x20000000 + 128K;
+_Min_Heap_Size = 0x200;
+_Min_Stack_Size = 0x400;
+
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 1024K
+    RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+    CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
+
+}
+
+SECTIONS
+{
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))
+    . = ALIGN(4);
+  } >FLASH
+
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)
+    *(.text*)
+    *(.glue_7)
+    *(.glue_7t)
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;
+  } >FLASH
+
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)
+    *(.rodata*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  _sidata = LOADADDR(.data);
+
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .; 
+    *(.data)
+    *(.data*)
+
+    . = ALIGN(4);
+    _edata = .;
+  } >RAM AT> FLASH
+
+_siccmram = LOADADDR(.ccmram);
+.ccmram :
+{
+. = ALIGN(4);
+_sccmram = .;
+*(.ccmram)
+*(.ccmram*)
+. = ALIGN(4);
+_eccmram = .;
+} >CCMRAM AT> FLASH
+        
+  . = ALIGN(4);
+  .bss :
+  {
+    _sbss = .;
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;
+    __bss_end__ = _ebss;
+  } >RAM
+
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

examples/custom-linker-script/main.c

@@ -0,0 +1,5 @@
+int main(void)
+{
+    for (;;);
+    return 0;
+}

examples/fetch-cmsis-hal/CMakeLists.txt

@@ -0,0 +1,20 @@
+cmake_minimum_required(VERSION 3.13)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/stm32_gcc.cmake)
+
+project(stm32-fetch-cmsis-hal C ASM)
+
+stm32_fetch_cmsis(F4 L0)
+stm32_fetch_hal(F4 L0)
+
+find_package(CMSIS COMPONENTS STM32F407VG STM32L053C8 REQUIRED)
+find_package(HAL COMPONENTS STM32F4 STM32L0 REQUIRED)
+
+set(PROJECT_SOURCES
+    main.c
+)
+
+add_executable(stm32-fetch-f4.elf ${PROJECT_SOURCES})
+target_link_libraries(stm32-fetch-f4.elf CMSIS::STM32::F407VG STM32::NoSys)
+
+add_executable(stm32-fetch-l0.elf ${PROJECT_SOURCES})
+target_link_libraries(stm32-fetch-l0.elf CMSIS::STM32::L053C8 STM32::NoSys)

examples/fetch-cmsis-hal/main.c

@@ -0,0 +1,5 @@
+int main(void)
+{
+    for (;;);
+    return 0;
+}

examples/fetch-cube/CMakeLists.txt

@@ -0,0 +1,18 @@
+cmake_minimum_required(VERSION 3.13)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/stm32_gcc.cmake)
+
+project(stm32-fetch-cube C ASM)
+
+stm32_fetch_cube(F4 L0)
+
+find_package(CMSIS COMPONENTS STM32F407VG STM32L053C8 REQUIRED)
+
+set(PROJECT_SOURCES
+    main.c
+)
+
+add_executable(stm32-fetch-f4.elf ${PROJECT_SOURCES})
+target_link_libraries(stm32-fetch-f4.elf CMSIS::STM32::F407VG STM32::NoSys)
+
+add_executable(stm32-fetch-l0.elf ${PROJECT_SOURCES})
+target_link_libraries(stm32-fetch-l0.elf CMSIS::STM32::L053C8 STM32::NoSys)

examples/fetch-cube/main.c

@@ -0,0 +1,5 @@
+int main(void)
+{
+    for (;;);
+    return 0;
+}

examples/freertos/CMakeLists.txt

@@ -0,0 +1,26 @@
+cmake_minimum_required(VERSION 3.13)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/stm32_gcc.cmake)
+
+project(stm32-freertos C ASM)
+set(CMAKE_INCLUDE_CURRENT_DIR TRUE)
+
+find_package(CMSIS COMPONENTS STM32F407VG REQUIRED)
+find_package(HAL COMPONENTS STM32F407VG REQUIRED)
+find_package(FreeRTOS COMPONENTS ARM_CM4F REQUIRED)
+
+set(PROJECT_SOURCES
+    main.c
+    FreeRTOSConfig.h
+)
+
+add_executable(stm32-freertos.elf ${PROJECT_SOURCES} stm32f4xx_hal_conf.h)
+target_link_libraries(stm32-freertos.elf PRIVATE
+    FreeRTOS::Timers
+    FreeRTOS::Heap::1
+    FreeRTOS::ARM_CM4F 
+    HAL::STM32::F4::RCC
+    HAL::STM32::F4::GPIO
+    HAL::STM32::F4::CORTEX
+    CMSIS::STM32::F407VG 
+    STM32::NoSys
+)

examples/freertos/FreeRTOSConfig.h

@@ -0,0 +1,124 @@
+/*
+ * FreeRTOS Kernel V10.4.1
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+#include <stdint.h>
+extern uint32_t SystemCoreClock;
+
+#define configUSE_PREEMPTION			1
+#define configUSE_IDLE_HOOK				1
+#define configUSE_TICK_HOOK				1
+#define configCPU_CLOCK_HZ				( SystemCoreClock )
+#define configTICK_RATE_HZ				( ( TickType_t ) 1000 )
+#define configMAX_PRIORITIES			( 5 )
+#define configMINIMAL_STACK_SIZE		( ( unsigned short ) 130 )
+#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 8 * 1024 ) )
+#define configMAX_TASK_NAME_LEN			( 10 )
+#define configUSE_TRACE_FACILITY		1
+#define configUSE_16_BIT_TICKS			0
+#define configIDLE_SHOULD_YIELD			1
+#define configUSE_MUTEXES				1
+#define configQUEUE_REGISTRY_SIZE		8
+#define configCHECK_FOR_STACK_OVERFLOW	2
+#define configUSE_RECURSIVE_MUTEXES		1
+#define configUSE_MALLOC_FAILED_HOOK	1
+#define configUSE_APPLICATION_TASK_TAG	0
+#define configUSE_COUNTING_SEMAPHORES	1
+#define configGENERATE_RUN_TIME_STATS	0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 		0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS				1
+#define configTIMER_TASK_PRIORITY		( 2 )
+#define configTIMER_QUEUE_LENGTH		10
+#define configTIMER_TASK_STACK_DEPTH	( configMINIMAL_STACK_SIZE * 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet		1
+#define INCLUDE_uxTaskPriorityGet		1
+#define INCLUDE_vTaskDelete				1
+#define INCLUDE_vTaskCleanUpResources	1
+#define INCLUDE_vTaskSuspend			1
+#define INCLUDE_vTaskDelayUntil			1
+#define INCLUDE_vTaskDelay				1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+	/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+	#define configPRIO_BITS       		__NVIC_PRIO_BITS
+#else
+	#define configPRIO_BITS       		4        /* 15 priority levels */
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			0xf
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+	
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }	
+	
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+#define xPortSysTickHandler SysTick_Handler
+
+#endif /* FREERTOS_CONFIG_H */
+

examples/freertos/main.c

@@ -0,0 +1,69 @@
+#include <FreeRTOS.h>
+#include <task.h>
+#include <timers.h>
+
+#include <stm32f4xx_hal.h>
+
+// STM32F4-Discovery green led - PD12
+#define LED_PORT                GPIOD
+#define LED_PIN                 GPIO_PIN_12
+#define LED_PORT_CLK_ENABLE     __HAL_RCC_GPIOD_CLK_ENABLE
+
+static void blinky(void *arg)
+{
+    for(;;)
+    {
+        vTaskDelay(500);
+        HAL_GPIO_TogglePin(LED_PORT, LED_PIN);
+    }
+}
+
+void initGPIO()
+{
+    GPIO_InitTypeDef GPIO_Config;
+
+    GPIO_Config.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_Config.Pull = GPIO_NOPULL;
+    GPIO_Config.Speed = GPIO_SPEED_FREQ_HIGH;
+
+    GPIO_Config.Pin = LED_PIN;
+
+    LED_PORT_CLK_ENABLE();
+    HAL_GPIO_Init(LED_PORT, &GPIO_Config);
+}
+
+int main(void)
+{
+    SystemInit();
+    initGPIO();
+    
+    xTaskCreate(blinky, "blinky", configMINIMAL_STACK_SIZE * 4, NULL, tskIDLE_PRIORITY + 1, NULL);
+    
+    vTaskStartScheduler();
+    for (;;);
+    
+    return 0;
+}
+
+void vApplicationTickHook(void)
+{
+}
+
+void vApplicationIdleHook(void)
+{
+}
+
+void vApplicationMallocFailedHook(void)
+{
+    taskDISABLE_INTERRUPTS();
+    for(;;);
+}
+
+void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName)
+{
+    (void) pcTaskName;
+    (void) pxTask;
+
+    taskDISABLE_INTERRUPTS();
+    for(;;);
+}

examples/freertos/stm32f4xx_hal_conf.h

@@ -0,0 +1,495 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file. 
+  *          This file should be copied to the application folder and renamed
+  *          to stm32f4xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+#define HAL_MODULE_ENABLED  
+// #define HAL_ADC_MODULE_ENABLED
+// #define HAL_CAN_MODULE_ENABLED
+// #define HAL_CAN_LEGACY_MODULE_ENABLED
+// #define HAL_CRC_MODULE_ENABLED
+// #define HAL_CEC_MODULE_ENABLED
+// #define HAL_CRYP_MODULE_ENABLED
+// #define HAL_DAC_MODULE_ENABLED
+// #define HAL_DCMI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+// #define HAL_DMA2D_MODULE_ENABLED
+// #define HAL_ETH_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+// #define HAL_NAND_MODULE_ENABLED
+// #define HAL_NOR_MODULE_ENABLED
+// #define HAL_PCCARD_MODULE_ENABLED
+// #define HAL_SRAM_MODULE_ENABLED
+// #define HAL_SDRAM_MODULE_ENABLED
+// #define HAL_HASH_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+// #define HAL_EXTI_MODULE_ENABLED
+// #define HAL_I2C_MODULE_ENABLED
+// #define HAL_SMBUS_MODULE_ENABLED
+// #define HAL_I2S_MODULE_ENABLED
+// #define HAL_IWDG_MODULE_ENABLED
+// #define HAL_LTDC_MODULE_ENABLED
+// #define HAL_DSI_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+// #define HAL_QSPI_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+// #define HAL_RNG_MODULE_ENABLED
+// #define HAL_RTC_MODULE_ENABLED
+// #define HAL_SAI_MODULE_ENABLED
+// #define HAL_SD_MODULE_ENABLED
+// #define HAL_SPI_MODULE_ENABLED
+// #define HAL_TIM_MODULE_ENABLED
+// #define HAL_UART_MODULE_ENABLED
+// #define HAL_USART_MODULE_ENABLED
+// #define HAL_IRDA_MODULE_ENABLED
+// #define HAL_SMARTCARD_MODULE_ENABLED
+// #define HAL_WWDG_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+// #define HAL_PCD_MODULE_ENABLED
+// #define HAL_HCD_MODULE_ENABLED
+// #define HAL_FMPI2C_MODULE_ENABLED
+// #define HAL_SPDIFRX_MODULE_ENABLED
+// #define HAL_DFSDM_MODULE_ENABLED
+// #define HAL_LPTIM_MODULE_ENABLED
+// #define HAL_MMC_MODULE_ENABLED
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE              25000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
+                                                The real value may vary depending on the variations
+                                                in voltage and temperature. */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */     
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0x0FU /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */   
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848 PHY Address*/ 
+#define DP83848_PHY_ADDRESS             0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
+ 
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+  
+/* Section 4: Extended PHY Registers */
+
+#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
+#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
+#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
+ 
+#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
+
+#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
+#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
+
+#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
+#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+   
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f4xx_hal_cryp.h" 
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+ 
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+  
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+   
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */
+ 
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

examples/template/CMakeLists.txt

@@ -0,0 +1,17 @@
+cmake_minimum_required(VERSION 3.13)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/stm32_gcc.cmake)
+
+project(stm32-template C ASM)
+
+find_package(CMSIS COMPONENTS STM32F407VG REQUIRED)
+# Find CMSIS for all F4 devices: 
+#find_package(CMSIS COMPONENTS STM32F4 REQUIRED)
+# Find CMSIS for all devices: 
+#find_package(CMSIS REQUIRED)
+
+set(PROJECT_SOURCES
+    main.c
+)
+
+add_executable(stm32-template.elf ${PROJECT_SOURCES})
+target_link_libraries(stm32-template.elf CMSIS::STM32::F407VG STM32::NoSys)

examples/template/main.c

@@ -0,0 +1,5 @@
+int main(void)
+{
+    for (;;);
+    return 0;
+}

packages/CMakeLists.txt

@@ -1,92 +0,0 @@
-cmake_minimum_required(VERSION 2.8.3)
-set(CMAKE_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/../gcc_stm32.cmake")
-project(stm32_packages)
-
-if (NOT DEFINED TARGET_TRIPLET)
-  set(TARGET_TRIPLET "arm-none-eabi")
-endif()
-set(CMAKE_BUILD_TYPE "Release")
-set(CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../cmake/Modules")
-
-set(STM_ARCHIVE_BASEURL "http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/firmware")
-set(STM_ARCHIVE_F1 "stsw-stm32054.zip")
-set(STM_ARCHIVE_F4 "stm32f4_dsp_stdperiph_lib.zip")
-set(STM_ARCHIVE_VERSION_F1 "3.5.0")
-set(STM_ARCHIVE_VERSION_F4 "1.3.0")
-set(STM_ARCHIVE_DIR_F1 "STM32F10x_StdPeriph_Lib_V${STM_ARCHIVE_VERSION_F1}")
-set(STM_ARCHIVE_DIR_F4 "STM32F4xx_DSP_StdPeriph_Lib_V${STM_ARCHIVE_VERSION_F4}")
-
-set(PACKAGE_TYPE "deb")
-
-if(NOT DEFINED STM32_FAMILY)
-  message(FATAL_ERROR "Please specify STM32_FAMILY, eg cmake -DSTM32_FAMILY=F4")
-endif()
-
-set(STM_ARCHIVE "${STM_ARCHIVE_${STM32_FAMILY}}")
-if(EXISTS "${CMAKE_CURRENT_BINARY_DIR}/${STM_ARCHIVE}") 
-  message(STATUS "Using already-downloaded archive: ${STM_ARCHIVE}")
-else()
-  message(STATUS "From st.com, downloading ${STM_ARCHIVE}")
-  file(DOWNLOAD "${STM_ARCHIVE_BASEURL}/${STM_ARCHIVE}"
-                "${CMAKE_CURRENT_BINARY_DIR}/${STM_ARCHIVE}" SHOW_PROGRESS)
-endif()
-
-set(STM_ARCHIVE_DIR "${STM_ARCHIVE_DIR_${STM32_FAMILY}}")
-set(STM_ARCHIVE_FULLDIR "${CMAKE_CURRENT_BINARY_DIR}/${STM_ARCHIVE_DIR}")
-if(EXISTS "${STM_ARCHIVE_FULLDIR}")
-  message(STATUS "Using already-extracted path: ${STM_ARCHIVE_DIR}")
-else()
-  execute_process(COMMAND unzip -o ${STM_ARCHIVE})
-endif()
-
-add_custom_target(debs ALL)
-
-# Install everything into a subdirectory so that we can package it from there.
-set(STM32F1_CHIP_TYPES HD HD_VL MD MD_VL LD LD_VL XL)
-set(STM32F4_CHIP_TYPES 401xx 40_41xxx 427_437xx 429_439xx)
-set(STM32_CHIP_TYPES "${STM32${STM32_FAMILY}_CHIP_TYPES}")
-set(STM32${STM32_FAMILY}_StdPeriphLib_DIR "${STM_ARCHIVE_FULLDIR}")
-
-# Add targets for building cmsis libraries
-set(CMAKE_INSTALL_PREFIX "${CMAKE_CURRENT_BINARY_DIR}/install/usr/${TARGET_TRIPLET}/")
-add_subdirectory(../cmsis ${CMAKE_CURRENT_BINARY_DIR}/cmsis)
-
-# Add targets for building stdperiph libraries, which need the cmsis headers
-get_property(CMSIS_INCLUDE_DIR DIRECTORY ../cmsis PROPERTY INCLUDE_DIRECTORIES)
-add_subdirectory(../stdperiph ${CMAKE_CURRENT_BINARY_DIR}/stdperiph)
-
-# Ensure all those get built.
-add_custom_target(install_stm32${STM32_FAMILY_LOWER})
-add_dependencies(install_stm32${STM32_FAMILY_LOWER}
-                 cmsis_${STM32_FAMILY_LOWER}
-                 stdperiph_${STM32_FAMILY_LOWER})
-
-set(MODULES_DIR ${CMAKE_CURRENT_BINARY_DIR}/install/usr/share/cmake-2.8/Modules)
-add_custom_command(TARGET install_stm32${STM32_FAMILY_LOWER} POST_BUILD
-  COMMAND ${CMAKE_COMMAND} -P cmake_install.cmake
-  COMMAND ${CMAKE_COMMAND} -E copy ${CMAKE_CURRENT_SOURCE_DIR}/../cmake/Modules/FindCMSIS.cmake
-          ${MODULES_DIR}/FindCMSIS.cmake
-  COMMAND ${CMAKE_COMMAND} -E copy ${CMAKE_CURRENT_SOURCE_DIR}/../cmake/Modules/FindStdPeriphLib.cmake
-          ${MODULES_DIR}/FindStdPeriphLib.cmake
-  COMMAND ${CMAKE_COMMAND} -E copy ${CMAKE_CURRENT_SOURCE_DIR}/../gcc_stm32.cmake
-          ${MODULES_DIR}/gcc_stm32.cmake
-  COMMAND ${CMAKE_COMMAND} -E copy ${CMAKE_CURRENT_SOURCE_DIR}/../gcc_stm32${STM32_FAMILY_LOWER}.cmake
-          ${MODULES_DIR}/gcc_stm32${STM32_FAMILY_LOWER}.cmake
-)
-
-# Create package.
-set(PACKAGE_NAME "stm32${STM32_FAMILY_LOWER}-stdperiph")
-set(PACKAGE_VERSION "${STM_ARCHIVE_VERSION_${STM32_FAMILY}}")
-set(PACKAGE_FILENAME "${PACKAGE_NAME}_${PACKAGE_VERSION}_all.${PACKAGE_TYPE}")
-
-add_custom_command(
-  OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${PACKAGE_FILENAME}
-  COMMAND fpm -a all -s dir -t ${PACKAGE_TYPE} -n ${PACKAGE_NAME}
-              -d gcc-arm-none-eabi
-              -v ${PACKAGE_VERSION} -C install usr
-)
-add_custom_target(${PACKAGE_FILENAME}_
-  DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${PACKAGE_FILENAME}
-)
-add_dependencies(${PACKAGE_FILENAME}_ install_stm32${STM32_FAMILY_LOWER})
-add_dependencies(debs ${PACKAGE_FILENAME}_)

packages/README.md

@@ -1,46 +0,0 @@
-Package Generation
-==================
-
-This directory creates a debian package of the stm32f1 or f4 CMSIS and StdPeriph libraries
-and headers. This is useful for a few reasons:
-
- - You can use `sudo dpkg -i` to install a deb and avoid manually compiling
-   and installing the library.
- - You can place the deb on an apt repository, and make it trivially easy to
-   set up a development environment on any Ubuntu or Debian machine---this is
-   great for getting a whole team up and running quickly, or for throwaway
-   environments such as CI builders and virtual machines.
-
-Toolchain
----------
-
-You need the right GCC compiler, which is `gcc-arm-none-eabi`. Fortunately, if you're on
-Ubuntu, this is really easy to get from Launchpad, thanks to Terry Guo's PPA:
-
-~~~
-sudo add-apt-repository ppa:team-gcc-arm-embedded/ppa
-sudo apt-get update
-sudo apt-get install gcc-arm-embedded
-~~~
-
-Building the deb
-----------------
-
-You'll need a [fpm](https://github.com/jordansissel/fpm), which is what actually produces
-the deb package from a folder of files. This comes from rubygems:
-
-~~~
-sudo apt-get install rubygems
-gem install fpm
-~~~
-
-Apart from that, it's a regular build:
-
-~~~
-mkdir packages/build
-cd packages/build
-cmake .. -DSTM32_FAMILY=F4
-make
-~~~
-
-Enjoy your deb!

stm32-blinky/CMakeLists.txt

@@ -1,22 +0,0 @@
-PROJECT(stm32-blinky)
-
-CMAKE_MINIMUM_REQUIRED(VERSION 2.8)
-ENABLE_LANGUAGE(ASM)
-
-FIND_PACKAGE(CMSIS REQUIRED)
-FIND_PACKAGE(STM32HAL COMPONENTS gpio tim REQUIRED)
-
-INCLUDE_DIRECTORIES(
-    ${CMAKE_CURRENT_SOURCE_DIR}
-    ${CMSIS_INCLUDE_DIRS}
-    ${STM32HAL_INCLUDE_DIR}
-)
-
-SET(PROJECT_SOURCES
-    main.c
-)
-
-ADD_EXECUTABLE(${CMAKE_PROJECT_NAME} ${PROJECT_SOURCES} ${CMSIS_SOURCES} ${STM32HAL_SOURCES})
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME})
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME})

stm32-blinky/main.c

@@ -1,250 +0,0 @@
-#if defined STM32F1
-# include <stm32f1xx_hal.h>
-#elif defined STM32F2
-# include <stm32f2xx_hal.h>
-#elif defined STM32F4
-# include <stm32f4xx_hal.h>
-#elif defined STM32G0
-# include <stm32g0xx_hal.h>
-#endif
-
-void initGPIO()
-{
-    GPIO_InitTypeDef GPIO_Config;
-
-    GPIO_Config.Mode = GPIO_MODE_AF_PP;
-    GPIO_Config.Pull = GPIO_NOPULL;
-
-#if defined STM32F1
-    __GPIOC_CLK_ENABLE();
-    __AFIO_CLK_ENABLE();
-
-    GPIO_Config.Pin = GPIO_PIN_8;
-    GPIO_Config.Speed = GPIO_SPEED_HIGH;
-    HAL_GPIO_Init(GPIOC, &GPIO_Config);
-#elif defined STM32F2
-    __GPIOD_CLK_ENABLE();
-
-    GPIO_Config.Alternate = GPIO_AF2_TIM4;
-    GPIO_Config.Pin = GPIO_PIN_12;
-    GPIO_Config.Speed = GPIO_SPEED_HIGH;
-    HAL_GPIO_Init(GPIOD, &GPIO_Config);
-#elif defined STM32F4
-    __GPIOA_CLK_ENABLE();
-
-    GPIO_Config.Alternate = GPIO_AF2_TIM3;
-    GPIO_Config.Pin = GPIO_PIN_6;
-    GPIO_Config.Speed = GPIO_SPEED_HIGH;
-    HAL_GPIO_Init(GPIOA, &GPIO_Config);
-#elif defined STM32G0
-    __GPIOA_CLK_ENABLE();
-#if defined STM32G070xx
-    GPIO_Config.Alternate = GPIO_AF2_TIM1;
-#else
-    GPIO_Config.Alternate = GPIO_AF2_TIM2;
-#endif
-
-    GPIO_Config.Pin = GPIO_PIN_5;
-    GPIO_Config.Speed = GPIO_SPEED_FREQ_HIGH;
-    HAL_GPIO_Init(GPIOA, &GPIO_Config);
-
-#endif
-}
-
-void initTimers()
-{
-    TIM_HandleTypeDef TIM_Handle;
-
-    // 10 kHz timer.
-#if defined STM32F1
-    __TIM8_CLK_ENABLE();
-    TIM_Handle.Instance = TIM8;
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetPCLK2Freq() / 10000) - 1;
-#elif defined STM32F2
-    __TIM4_CLK_ENABLE();
-    TIM_Handle.Instance = TIM4;
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetPCLK2Freq() / 100000) - 1;
-#elif defined STM32F4
-    __TIM3_CLK_ENABLE();
-    TIM_Handle.Instance = TIM3;
-    // TIM3 Clocked from SYSCLK = 168 MHz
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetSysClockFreq() / 10000) - 1;
-#elif defined STM32G0
-
-#if defined STM32G070xx
-    TIM_Handle.Instance = TIM1;
-    __TIM1_CLK_ENABLE();
-#else
-    TIM_Handle.Instance = TIM2;
-    __TIM2_CLK_ENABLE();
-#endif
-
-    TIM_Handle.Init.Prescaler = (uint16_t)(HAL_RCC_GetSysClockFreq() / 10000) - 1;
-
-#endif
-
-    // 1 Hz blinking
-    TIM_Handle.Init.Period = 10000;
-    TIM_Handle.Init.ClockDivision = 0;
-    TIM_Handle.Init.CounterMode = TIM_COUNTERMODE_UP;
-
-    HAL_TIM_Base_Init(&TIM_Handle);
-    HAL_TIM_PWM_Init(&TIM_Handle);
-
-    TIM_OC_InitTypeDef TIM_OCConfig;
-
-    TIM_OCConfig.OCMode = TIM_OCMODE_PWM1;
-    // 5000 / 10000 = 50% duty cycle.
-    TIM_OCConfig.Pulse = 4999;
-    TIM_OCConfig.OCPolarity = TIM_OCPOLARITY_HIGH;
-    TIM_OCConfig.OCFastMode = TIM_OCFAST_DISABLE;
-
-#if defined STM32F1
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_3);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_3);
-#elif defined STM32F2
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_1);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_1);
-#elif defined STM32F4
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_1);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_1);
-#elif defined STM32G0
-    HAL_TIM_PWM_ConfigChannel(&TIM_Handle, &TIM_OCConfig, TIM_CHANNEL_1);
-    HAL_TIM_PWM_Start(&TIM_Handle, TIM_CHANNEL_1);
-#endif
-}
-
-static void initClock(void)
-{
-    RCC_ClkInitTypeDef RCC_ClkInitStruct;
-    RCC_OscInitTypeDef RCC_OscInitStruct;
-
-#if defined STM32F1
-    __HAL_RCC_PWR_CLK_ENABLE();
-
-    uint8_t fLatency;
-
-    RCC_OscInitStruct.OscillatorType  = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
-    RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
-    RCC_OscInitStruct.HSICalibrationValue = 0;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-
-# if (defined STM32F100xB) || (defined STM32F100xE)
-    // 8 MHz * 3 = 24 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL3;
-    fLatency = FLASH_LATENCY_0;
-# elif (defined STM32F101x6) || (defined STM32F101xB) || (defined STM32F101xE) || (defined STM32F101xG)
-    // 8 MHz / 2 * 9 = 36 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    fLatency = FLASH_LATENCY_1;
-# elif (defined STM32F102x6) || (defined STM32F102xB)
-    // 8 MHz * 6 = 48 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
-    fLatency = FLASH_LATENCY_1;
-# elif (defined STM32F103x6) || (defined STM32F103xB) || (defined STM32F103xE) || (defined STM32F103xG)
-    // 8 MHz * 9 = 72 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    fLatency = FLASH_LATENCY_2;
-# elif (defined STM32F105xC) || (defined STM32F107xC)
-    // 8 MHz * 9 = 72 MHz SYSCLK
-    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
-    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
-    fLatency = FLASH_LATENCY_2;
-# endif
-
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
-
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, fLatency);
-#elif defined STM32F2
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    RCC_OscInitStruct.PLL.PLLM = 25;
-    RCC_OscInitStruct.PLL.PLLN = 240;
-    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-    RCC_OscInitStruct.PLL.PLLQ = 5;
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-     clocks dividers */
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
-#elif defined STM32F4
-    __HAL_RCC_PWR_CLK_ENABLE();
-    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
-    // 8 MHz * 336 / 8 / 2 = 168 MHz SYSCLK
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    RCC_OscInitStruct.PLL.PLLM = 8;
-    RCC_OscInitStruct.PLL.PLLN = 336;
-    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-    RCC_OscInitStruct.PLL.PLLQ = 7;
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
-    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
-
-    if (HAL_GetREVID() == 0x1001)
-    {
-        __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-    }
-#elif defined STM32G0
-
-    HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
-    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
-    RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
-    RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-    HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                                  |RCC_CLOCKTYPE_PCLK1;
-    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
-    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
-#endif
-}
-
-void initAll(void)
-{
-    HAL_Init();
-
-    initClock();
-    initGPIO();
-    initTimers();
-}
-
-int main(void)
-{
-    initAll();
-    for (;;);
-    return 0;
-}

stm32-chibios-template/chibios-nil-f0-template/CMakeLists.txt

@@ -1,41 +0,0 @@
-# define chip used in this project, this set must define before project definition
-# for this project dont use cmake commandline option -DSTM32_CHIP=<chip>
-set(STM32_CHIP STM32F051x8)
-
-cmake_minimum_required(VERSION 3.4)
-project(chibios-nil-f0-template)
-
-ENABLE_LANGUAGE(ASM)
-
-# test build all available ChibiOS COMPONENTS for F4 chip
-#FIND_PACKAGE(ChibiOS COMPONENTS nil hal adc can ext gpt i2c i2s icu mac mmc_spi pal pwm rtc sdc serial serial_usb spi st uart usb  memstreams nullstreams REQUIRED)
-
-FIND_PACKAGE(ChibiOS COMPONENTS nil hal pal  REQUIRED)
-
-INCLUDE_DIRECTORIES(
-        ${CMAKE_CURRENT_SOURCE_DIR}
-        ${ChibiOS_INCLUDE_DIRS}
-        config
-        board
-        work
-)
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-
-
-
-ADD_DEFINITIONS(-DCORTEX_USE_FPU=FALSE)
-
-SET(STM32_LINKER_SCRIPT ${ChibiOS_LINKER_SCRIPT})
-
-
-set(SOURCE_FILES main.c board/board.c board/board.h config/mcuconf.h config/halconf.h config/nilconf.h work/test.c work/test.h )
-
-add_executable(${CMAKE_PROJECT_NAME}.elf ${SOURCE_FILES}  ${ChibiOS_SOURCES})
-
-TARGET_LINK_LIBRARIES(${CMAKE_PROJECT_NAME}.elf)
-
-STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME}.elf)
-STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME}.elf)
-

stm32-chibios-template/chibios-nil-f0-template/board/board.c

@@ -1,102 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief   MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-}

stm32-chibios-template/chibios-nil-f0-template/board/board.h

@@ -1,753 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for ST STM32F0-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F0_DISCOVERY
-#define BOARD_NAME                  "ST STM32F0-Discovery"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- * NOTE: HSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#define STM32_LSEDRV                (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                0U
-#endif
-
-#define STM32_HSE_BYPASS
-
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON                0U
-#define GPIOA_PIN1                  1U
-#define GPIOA_PIN2                  2U
-#define GPIOA_PIN3                  3U
-#define GPIOA_PIN4                  4U
-#define GPIOA_PIN5                  5U
-#define GPIOA_PIN6                  6U
-#define GPIOA_PIN7                  7U
-#define GPIOA_PIN8                  8U
-#define GPIOA_PIN9                  9U
-#define GPIOA_PIN10                 10U
-#define GPIOA_PIN11                 11U
-#define GPIOA_PIN12                 12U
-#define GPIOA_SWDAT                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_PIN15                 15U
-
-#define GPIOB_PIN0                  0U
-#define GPIOB_PIN1                  1U
-#define GPIOB_PIN2                  2U
-#define GPIOB_PIN3                  3U
-#define GPIOB_PIN4                  4U
-#define GPIOB_PIN5                  5U
-#define GPIOB_PIN6                  6U
-#define GPIOB_PIN7                  7U
-#define GPIOB_PIN8                  8U
-#define GPIOB_PIN9                  9U
-#define GPIOB_PIN10                 10U
-#define GPIOB_PIN11                 11U
-#define GPIOB_PIN12                 12U
-#define GPIOB_PIN13                 13U
-#define GPIOB_PIN14                 14U
-#define GPIOB_PIN15                 15U
-
-#define GPIOC_PIN0                  0U
-#define GPIOC_PIN1                  1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PIN3                  3U
-#define GPIOC_PIN4                  4U
-#define GPIOC_PIN5                  5U
-#define GPIOC_PIN6                  6U
-#define GPIOC_PIN7                  7U
-#define GPIOC_LED4                  8U
-#define GPIOC_LED3                  9U
-#define GPIOC_PIN10                 10U
-#define GPIOC_PIN11                 11U
-#define GPIOC_PIN12                 12U
-#define GPIOC_PIN13                 13U
-#define GPIOC_OSC32_IN              14U
-#define GPIOC_OSC32_OUT             15U
-
-#define GPIOD_PIN0                  0U
-#define GPIOD_PIN1                  1U
-#define GPIOD_PIN2                  2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_PIN4                  4U
-#define GPIOD_PIN5                  5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_PIN12                 12U
-#define GPIOD_PIN13                 13U
-#define GPIOD_PIN14                 14U
-#define GPIOD_PIN15                 15U
-
-#define GPIOF_OSC_IN                0U
-#define GPIOF_OSC_OUT               1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
-#define PIN_OSPEED_2M(n)            (0U << ((n) * 2U))
-#define PIN_OSPEED_10M(n)           (1U << ((n) * 2U))
-#define PIN_OSPEED_40M(n)           (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0  - BUTTON                    (input floating).
- * PA1  - PIN1                      (input pullup).
- * PA2  - PIN2                      (input pullup).
- * PA3  - PIN3                      (input pullup).
- * PA4  - PIN4                      (input pullup).
- * PA5  - PIN5                      (input pullup).
- * PA6  - PIN6                      (input pullup).
- * PA7  - PIN7                      (input pullup).
- * PA8  - PIN8                      (input pullup).
- * PA9  - PIN9                      (input pullup).
- * PA10 - PIN10                     (input pullup).
- * PA11 - PIN11                     (input pullup).
- * PA12 - PIN12                     (input pullup).
- * PA13 - SWDAT                     (alternate 0).
- * PA14 - SWCLK                     (alternate 0).
- * PA15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_BUTTON) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOA_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOA_PIN12) |          \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDAT) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
-                                     PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_2M(GPIOA_BUTTON) |          \
-                                     PIN_OSPEED_2M(GPIOA_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOA_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOA_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOA_PIN12) |           \
-                                     PIN_OSPEED_40M(GPIOA_SWDAT) |          \
-                                     PIN_OSPEED_40M(GPIOA_SWCLK) |          \
-                                     PIN_OSPEED_40M(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_BUTTON) |     \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOA_SWDAT) |        \
-                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_BUTTON) |           \
-                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWDAT) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_BUTTON, 0) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN7, 0))
-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWDAT, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWCLK, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN15, 0))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input pullup).
- * PB1  - PIN1                      (input pullup).
- * PB2  - PIN2                      (input pullup).
- * PB3  - PIN3                      (input pullup).
- * PB4  - PIN4                      (input pullup).
- * PB5  - PIN5                      (input pullup).
- * PB6  - PIN6                      (input pullup).
- * PB7  - PIN7                      (input pullup).
- * PB8  - PIN8                      (input pullup).
- * PB9  - PIN9                      (input pullup).
- * PB10 - PIN10                     (input pullup).
- * PB11 - PIN11                     (input pullup).
- * PB12 - PIN12                     (input pullup).
- * PB13 - PIN13                     (input pullup).
- * PB14 - PIN14                     (input pullup).
- * PB15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_2M(GPIOB_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN1) |            \
-                                     PIN_OSPEED_40M(GPIOB_PIN2) |           \
-                                     PIN_OSPEED_40M(GPIOB_PIN3) |           \
-                                     PIN_OSPEED_40M(GPIOB_PIN4) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOB_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN7, 0))
-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN15, 0))
-
-/*
- * GPIOC setup:
- *
- * PC0  - PIN0                      (input pullup).
- * PC1  - PIN1                      (input pullup).
- * PC2  - PIN2                      (input pullup).
- * PC3  - PIN3                      (input pullup).
- * PC4  - PIN4                      (input pullup).
- * PC5  - PIN5                      (input pullup).
- * PC6  - PIN6                      (input pullup).
- * PC7  - PIN7                      (input pullup).
- * PC8  - LED4                      (output pushpull maximum).
- * PC9  - LED3                      (output pushpull maximum).
- * PC10 - PIN10                     (input pullup).
- * PC11 - PIN11                     (input pullup).
- * PC12 - PIN12                     (input pullup).
- * PC13 - PIN13                     (input pullup).
- * PC14 - OSC32_IN                  (input floating).
- * PC15 - OSC32_OUT                 (input floating).
- */
-#define VAL_GPIOC_MODER             (PIN_MODE_INPUT(GPIOC_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN7) |           \
-                                     PIN_MODE_OUTPUT(GPIOC_LED4) |          \
-                                     PIN_MODE_OUTPUT(GPIOC_LED3) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_IN) |       \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_LED4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_LED3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_2M(GPIOC_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOC_PIN7) |            \
-                                     PIN_OSPEED_40M(GPIOC_LED4) |           \
-                                     PIN_OSPEED_40M(GPIOC_LED3) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOC_PIN13) |           \
-                                     PIN_OSPEED_40M(GPIOC_OSC32_IN) |       \
-                                     PIN_OSPEED_40M(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR             (PIN_PUPDR_PULLUP(GPIOC_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN7) |         \
-                                     PIN_PUPDR_FLOATING(GPIOC_LED4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_LED3) |       \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN13) |        \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) |   \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN7) |             \
-                                     PIN_ODR_LOW(GPIOC_LED4) |              \
-                                     PIN_ODR_LOW(GPIOC_LED3) |              \
-                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_IN) |         \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN7, 0))
-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_LED4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_LED3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_OSC32_IN, 0) |       \
-                                     PIN_AFIO_AF(GPIOC_OSC32_OUT, 0))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                      (input pullup).
- * PD1  - PIN1                      (input pullup).
- * PD2  - PIN2                      (input pullup).
- * PD3  - PIN3                      (input pullup).
- * PD4  - PIN4                      (input pullup).
- * PD5  - PIN5                      (input pullup).
- * PD6  - PIN6                      (input pullup).
- * PD7  - PIN7                      (input pullup).
- * PD8  - PIN8                      (input pullup).
- * PD9  - PIN9                      (input pullup).
- * PD10 - PIN10                     (input pullup).
- * PD11 - PIN11                     (input pullup).
- * PD12 - PIN12                     (input pullup).
- * PD13 - PIN13                     (input pullup).
- * PD14 - PIN14                     (input pullup).
- * PD15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_2M(GPIOD_PIN0) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN1) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOD_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN7, 0))
-#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN15, 0))
-
-/*
- * GPIOF setup:
- *
- * PF0  - OSC_IN                    (input floating).
- * PF1  - OSC_OUT                   (input floating).
- * PF2  - PIN2                      (input pullup).
- * PF3  - PIN3                      (input pullup).
- * PF4  - PIN4                      (input pullup).
- * PF5  - PIN5                      (input pullup).
- * PF6  - PIN6                      (input pullup).
- * PF7  - PIN7                      (input pullup).
- * PF8  - PIN8                      (input pullup).
- * PF9  - PIN9                      (input pullup).
- * PF10 - PIN10                     (input pullup).
- * PF11 - PIN11                     (input pullup).
- * PF12 - PIN12                     (input pullup).
- * PF13 - PIN13                     (input pullup).
- * PF14 - PIN14                     (input pullup).
- * PF15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOF_MODER             (PIN_MODE_INPUT(GPIOF_OSC_IN) |         \
-                                     PIN_MODE_INPUT(GPIOF_OSC_OUT) |        \
-                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_2M(GPIOF_OSC_IN) |          \
-                                     PIN_OSPEED_2M(GPIOF_OSC_OUT) |         \
-                                     PIN_OSPEED_2M(GPIOF_PIN2) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN3) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN4) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN5) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN6) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN7) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN8) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN9) |            \
-                                     PIN_OSPEED_2M(GPIOF_PIN10) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN11) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN12) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN13) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN14) |           \
-                                     PIN_OSPEED_2M(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR             (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) |     \
-                                     PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) |    \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_OSC_IN) |           \
-                                     PIN_ODR_HIGH(GPIOF_OSC_OUT) |          \
-                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_OSC_IN, 0) |         \
-                                     PIN_AFIO_AF(GPIOF_OSC_OUT, 0) |        \
-                                     PIN_AFIO_AF(GPIOF_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN7, 0))
-#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN15, 0))
-
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

stm32-chibios-template/chibios-nil-f0-template/config/halconf.h

@@ -1,334 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f0-template/config/mcuconf.h

@@ -1,162 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-/*
- * STM32F0xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 3...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F0xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_HSI14_ENABLED                 TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   FALSE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2
-#define STM32_PREDIV_VALUE                  1
-#define STM32_PLLMUL_VALUE                  12
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE                          STM32_PPRE_DIV1
-#define STM32_ADCSW                         STM32_ADCSW_HSI14
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_ADCSW                         STM32_ADCSW_HSI14
-#define STM32_CECSW                         STM32_CECSW_HSI
-#define STM32_I2C1SW                        STM32_I2C1SW_HSI
-#define STM32_USART1SW                      STM32_USART1SW_PCLK
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              2
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3
-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3
-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         2
-#define STM32_GPT_TIM2_IRQ_PRIORITY         2
-#define STM32_GPT_TIM3_IRQ_PRIORITY         2
-#define STM32_GPT_TIM14_IRQ_PRIORITY        2
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         3
-#define STM32_I2C_I2C2_IRQ_PRIORITY         3
-#define STM32_I2C_USE_DMA                   TRUE
-#define STM32_I2C_I2C1_DMA_PRIORITY         1
-#define STM32_I2C_I2C2_DMA_PRIORITY         1
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         3
-#define STM32_ICU_TIM2_IRQ_PRIORITY         3
-#define STM32_ICU_TIM3_IRQ_PRIORITY         3
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         3
-#define STM32_PWM_TIM2_IRQ_PRIORITY         3
-#define STM32_PWM_TIM3_IRQ_PRIORITY         3
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        3
-#define STM32_SERIAL_USART2_PRIORITY        3
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  FALSE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         2
-#define STM32_SPI_SPI2_IRQ_PRIORITY         2
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               2
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      3
-#define STM32_UART_USART2_IRQ_PRIORITY      3
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-#endif /* _MCUCONF_H_ */

stm32-chibios-template/chibios-nil-f0-template/config/nilconf.h

@@ -1,179 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    nilconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _NILCONF_H_
-#define _NILCONF_H_
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Number of user threads in the application.
- * @note    This number is not inclusive of the idle thread which is
- *          Implicitly handled.
- */
-#define NIL_CFG_NUM_THREADS                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System timer settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define NIL_CFG_ST_RESOLUTION               32
-
-/**
- * @brief   System tick frequency.
- * @note    This value together with the @p NIL_CFG_ST_RESOLUTION
- *          option defines the maximum amount of time allowed for
- *          timeouts.
- */
-#define NIL_CFG_ST_FREQUENCY                50000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define NIL_CFG_ST_TIMEDELTA                2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define NIL_CFG_USE_EVENTS                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System assertions.
- */
-#define NIL_CFG_ENABLE_ASSERTS              FALSE
-
-/**
- * @brief   Stack check.
- */
-#define NIL_CFG_ENABLE_STACK_CHECK          FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System initialization hook.
- */
-#if !defined(NIL_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_INIT_HOOK() {                                        \
-}
-#endif
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define NIL_CFG_THREAD_EXT_FIELDS                                           \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- */
-#define NIL_CFG_THREAD_EXT_INIT_HOOK(tr) {                                  \
-  /* Add custom threads initialization code here.*/                         \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define NIL_CFG_IDLE_ENTER_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define NIL_CFG_IDLE_LEAVE_HOOK() {                                         \
-}
-
-/**
- * @brief   System halt hook.
- */
-#if !defined(NIL_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
-#define NIL_CFG_SYSTEM_HALT_HOOK(reason) {                                  \
-}
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in nilcore.h).   */
-/*===========================================================================*/
-
-#endif  /* _NILCONF_H_ */
-
-/** @} */

stm32-chibios-template/chibios-nil-f0-template/main.c

@@ -1,34 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "nil.h"
-#include "hal.h"
-#include "test.h"
-
-THD_TABLE_BEGIN
-  THD_TABLE_ENTRY(waThread1, "Thread1", Thread1, NULL)
-THD_TABLE_END
-int main(void) {
-
-  halInit();
-  chSysInit();
-
-
-  while (true) {
-    if (palReadPad(GPIOA, GPIOA_BUTTON))
-    chThdSleepMilliseconds(500);
-  }
-}