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@@ -25,6 +25,7 @@ typedef struct {
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uint32_t efuse_base;
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uint32_t efuse_base;
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uint32_t chip_magic_value[MAX_MAGIC_VALUES];
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uint32_t chip_magic_value[MAX_MAGIC_VALUES];
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read_spi_config_t read_spi_config;
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read_spi_config_t read_spi_config;
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+ bool encryption_in_begin_flash_cmd;
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} esp_target_t;
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} esp_target_t;
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// This ROM address has a different value on each chip model
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// This ROM address has a different value on each chip model
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@@ -32,8 +33,7 @@ typedef struct {
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#define ESP8266_SPI_REG_BASE 0x60000200
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#define ESP8266_SPI_REG_BASE 0x60000200
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#define ESP32S2_SPI_REG_BASE 0x3f402000
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#define ESP32S2_SPI_REG_BASE 0x3f402000
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-#define ESP32C3_SPI_REG_BASE 0x60002000
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-#define ESP32S3_SPI_REG_BASE 0x60002000
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+#define ESP32xx_SPI_REG_BASE 0x60002000
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#define ESP32_SPI_REG_BASE 0x3ff42000
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#define ESP32_SPI_REG_BASE 0x3ff42000
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static esp_loader_error_t spi_config_esp32(uint32_t efuse_base, uint32_t *spi_config);
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static esp_loader_error_t spi_config_esp32(uint32_t efuse_base, uint32_t *spi_config);
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@@ -92,13 +92,13 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
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// ESP32C3
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// ESP32C3
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{
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{
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.regs = {
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.regs = {
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- .cmd = ESP32C3_SPI_REG_BASE + 0x00,
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- .usr = ESP32C3_SPI_REG_BASE + 0x18,
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- .usr1 = ESP32C3_SPI_REG_BASE + 0x1c,
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- .usr2 = ESP32C3_SPI_REG_BASE + 0x20,
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- .w0 = ESP32C3_SPI_REG_BASE + 0x58,
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- .mosi_dlen = ESP32C3_SPI_REG_BASE + 0x24,
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- .miso_dlen = ESP32C3_SPI_REG_BASE + 0x28,
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+ .cmd = ESP32xx_SPI_REG_BASE + 0x00,
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+ .usr = ESP32xx_SPI_REG_BASE + 0x18,
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+ .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
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+ .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
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+ .w0 = ESP32xx_SPI_REG_BASE + 0x58,
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+ .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
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+ .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
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},
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},
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.efuse_base = 0x60008800,
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.efuse_base = 0x60008800,
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.chip_magic_value = { 0x6921506f, 0x1b31506f },
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.chip_magic_value = { 0x6921506f, 0x1b31506f },
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@@ -108,17 +108,33 @@ static const esp_target_t esp_target[ESP_MAX_CHIP] = {
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// ESP32S3
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// ESP32S3
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{
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{
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.regs = {
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.regs = {
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- .cmd = ESP32C3_SPI_REG_BASE + 0x00,
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- .usr = ESP32C3_SPI_REG_BASE + 0x18,
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- .usr1 = ESP32C3_SPI_REG_BASE + 0x1c,
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- .usr2 = ESP32C3_SPI_REG_BASE + 0x20,
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- .w0 = ESP32C3_SPI_REG_BASE + 0x58,
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- .mosi_dlen = ESP32C3_SPI_REG_BASE + 0x24,
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- .miso_dlen = ESP32C3_SPI_REG_BASE + 0x28,
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+ .cmd = ESP32xx_SPI_REG_BASE + 0x00,
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+ .usr = ESP32xx_SPI_REG_BASE + 0x18,
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+ .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
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+ .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
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+ .w0 = ESP32xx_SPI_REG_BASE + 0x58,
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+ .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
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+ .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
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},
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},
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.efuse_base = 0x60007000,
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.efuse_base = 0x60007000,
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.chip_magic_value = { 0x00000009, 0 },
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.chip_magic_value = { 0x00000009, 0 },
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- .read_spi_config = spi_config_esp32xx, // !
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+ .read_spi_config = spi_config_esp32xx,
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+ },
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+
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+ // ESP32C2
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+ {
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+ .regs = {
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+ .cmd = ESP32xx_SPI_REG_BASE + 0x00,
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+ .usr = ESP32xx_SPI_REG_BASE + 0x18,
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+ .usr1 = ESP32xx_SPI_REG_BASE + 0x1c,
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+ .usr2 = ESP32xx_SPI_REG_BASE + 0x20,
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+ .w0 = ESP32xx_SPI_REG_BASE + 0x58,
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+ .mosi_dlen = ESP32xx_SPI_REG_BASE + 0x24,
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+ .miso_dlen = ESP32xx_SPI_REG_BASE + 0x28,
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+ },
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+ .efuse_base = 0x60008800,
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+ .chip_magic_value = { 0x6f51306f, 0 },
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+ .read_spi_config = spi_config_esp32xx,
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},
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},
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};
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};
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@@ -209,4 +225,9 @@ static esp_loader_error_t spi_config_esp32xx(uint32_t efuse_base, uint32_t *spi_
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*spi_config = pins;
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*spi_config = pins;
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return ESP_LOADER_SUCCESS;
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return ESP_LOADER_SUCCESS;
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+}
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+
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+bool encryption_in_begin_flash_cmd(target_chip_t target)
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+{
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+ return target == ESP32_CHIP || target == ESP8266_CHIP;
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}
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}
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