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feature: Add example RAM binaries for all chips

This commit adds the example RAM download binaries and sources to build them for all chips and the corresponding example_common entries.
Djordje Nedic 2 rokov pred
rodič
commit
89ee521310

+ 2 - 1
.gitignore

@@ -1,5 +1,6 @@
 build
-sdkconfig*
+sdkconfig
+sdkconfig.old
 empty_file.bin
 binaries.c
 *.lock

BIN
examples/binaries/RAM_APP/ESP32/app.bin


BIN
examples/binaries/RAM_APP/ESP32_C2/app.bin


BIN
examples/binaries/RAM_APP/ESP32_C3/app.bin


BIN
examples/binaries/RAM_APP/ESP32_H2/app.bin


BIN
examples/binaries/RAM_APP/ESP32_S3/app.bin


+ 15 - 0
examples/binaries/RAM_APP/source/CMakeLists.txt

@@ -0,0 +1,15 @@
+# The following lines of boilerplate have to be in your project's
+# CMakeLists in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.16)
+
+# Here we remove all unecessary components from the build to make the binary smaller
+set(COMPONENTS main)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(hello_world)
+
+# This generates a binary file from the elf, as the RAM build doesn't do that automatically
+add_custom_command(TARGET ${PROJECT_NAME}.elf
+    POST_BUILD
+    COMMAND esptool.py elf2image --output app.bin ${PROJECT_NAME}.elf
+)

+ 2 - 0
examples/binaries/RAM_APP/source/main/CMakeLists.txt

@@ -0,0 +1,2 @@
+idf_component_register(SRCS "main.c"
+                    INCLUDE_DIRS "")

+ 16 - 0
examples/binaries/RAM_APP/source/main/main.c

@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: CC0-1.0
+ */
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+void app_main(void)
+{
+    while (true) {
+        esp_rom_printf("Hello world!\n");
+        vTaskDelay(1000 / portTICK_PERIOD_MS);
+    }
+}

+ 10 - 0
examples/binaries/RAM_APP/source/sdkconfig.defaults

@@ -0,0 +1,10 @@
+# This file was generated using idf.py save-defconfig. It can be edited manually.
+# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration
+#
+CONFIG_APP_BUILD_TYPE_ELF_RAM=y
+CONFIG_APP_NO_BLOBS=y
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
+CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
+# CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set
+CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=y
+CONFIG_LOG_DEFAULT_LEVEL_NONE=y

+ 44 - 12
examples/common/example_common.c

@@ -125,22 +125,54 @@ void get_example_binaries(target_chip_t target, example_binaries_t *bins)
 }
 
 
-extern const uint8_t  ESP32_H4_app_bin[];
-extern const uint32_t ESP32_H4_app_bin_size;
+extern const uint8_t  ESP32_app_bin[];
+extern const uint32_t ESP32_app_bin_size;
+extern const uint8_t  ESP32_C2_app_bin[];
+extern const uint32_t ESP32_C2_app_bin_size;
+extern const uint8_t  ESP32_C3_app_bin[];
+extern const uint32_t ESP32_C3_app_bin_size;
 extern const uint8_t  ESP32_H2_app_bin[];
 extern const uint32_t ESP32_H2_app_bin_size;
+extern const uint8_t  ESP32_H4_app_bin[];
+extern const uint32_t ESP32_H4_app_bin_size;
+extern const uint8_t  ESP32_S3_app_bin[];
+extern const uint32_t ESP32_S3_app_bin_size;
 void get_example_ram_app_binary(target_chip_t target, example_ram_app_binary_t *bin)
 {
-    if (target == ESP32H4_CHIP){
-        bin->ram_app.data = ESP32_H4_app_bin;
-        bin->ram_app.size = ESP32_H4_app_bin_size;
-    } 
-    else if(target == ESP32H2_CHIP){
-        bin->ram_app.data = ESP32_H2_app_bin;
-        bin->ram_app.size = ESP32_H2_app_bin_size;
-    }
-    else {
-        abort();
+    switch (target) {
+        case ESP32_CHIP: {
+            bin->ram_app.data = ESP32_app_bin;
+            bin->ram_app.size = ESP32_app_bin_size;
+            break;
+        }
+        case ESP32C2_CHIP: {
+            bin->ram_app.data = ESP32_C2_app_bin;
+            bin->ram_app.size = ESP32_C2_app_bin_size;
+            break;
+        }
+        case ESP32C3_CHIP: {
+            bin->ram_app.data = ESP32_C3_app_bin;
+            bin->ram_app.size = ESP32_C3_app_bin_size;
+            break;
+        }
+        case ESP32H2_CHIP: {
+            bin->ram_app.data = ESP32_H2_app_bin;
+            bin->ram_app.size = ESP32_H2_app_bin_size;
+            break;
+        }
+        case ESP32H4_CHIP: {
+            bin->ram_app.data = ESP32_H4_app_bin;
+            bin->ram_app.size = ESP32_H4_app_bin_size;
+            break;
+        }
+        case ESP32S3_CHIP: {
+            bin->ram_app.data = ESP32_S3_app_bin;
+            bin->ram_app.size = ESP32_S3_app_bin_size;
+            break;
+        }
+        default: {
+            abort();
+        }
     }
 }
 

+ 1 - 1
idf_component.yml

@@ -1,3 +1,3 @@
-version: "0.0.8"
+version: "0.0.9"
 description: Serial flasher component provides portable library for flashing or loading ram loadble app to Espressif SoCs from other host microcontroller
 url: https://github.com/espressif/esp-serial-flasher