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@@ -1,5 +1,13 @@
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#include <api-hal-power.h>
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+#include <api-hal-clock.h>
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+
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+#include <stm32wbxx_ll_rcc.h>
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+#include <stm32wbxx_ll_pwr.h>
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+#include <stm32wbxx_ll_hsem.h>
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+#include <stm32wbxx_ll_cortex.h>
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+
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#include <main.h>
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+#include <hw_conf.h>
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#include <bq27220.h>
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#include <bq25896.h>
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@@ -14,6 +22,50 @@ void api_hal_power_init() {
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bq25896_init();
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}
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+void api_hal_power_deep_sleep() {
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+ while( LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID));
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+
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+ if (!LL_HSEM_1StepLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID)) {
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+ if(LL_PWR_IsActiveFlag_C2DS()) {
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+ // Release ENTRY_STOP_MODE semaphore
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+ LL_HSEM_ReleaseLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0);
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+
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+ // The switch on HSI before entering Stop Mode is required
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+ api_hal_clock_switch_to_hsi();
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+ }
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+ } else {
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+ /**
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+ * The switch on HSI before entering Stop Mode is required
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+ */
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+ api_hal_clock_switch_to_hsi();
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+ }
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+
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+ /* Release RCC semaphore */
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+ LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, 0);
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+
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+ // Prepare deep sleep
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+ LL_PWR_SetPowerMode(LL_PWR_MODE_STOP2);
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+ LL_LPM_EnableDeepSleep();
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+
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+#if defined ( __CC_ARM)
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+ // Force store operations
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+ __force_stores();
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+#endif
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+
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+ __WFI();
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+
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+ /* Release ENTRY_STOP_MODE semaphore */
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+ LL_HSEM_ReleaseLock(HSEM, CFG_HW_ENTRY_STOP_MODE_SEMID, 0);
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+
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+ while(LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID));
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+
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+ if(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
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+ api_hal_clock_switch_to_pll();
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+ }
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+
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+ LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, 0);
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+}
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+
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uint8_t api_hal_power_get_pct() {
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return bq27220_get_state_of_charge();
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}
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