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SubGhz: faster mess_with_iv (#845)

* subghz_keystore_mess_with_iv shortened
- less instructions
- less registers used (no need for r3 anymore)
* subghz_keystore_mess_with_iv shortened (again)
* 7b46c12e408cdc541e9e91c0392365bb4960fabd reduced instructions count from 4+16x8=132 to 3+16x7=115
* here loop is removed and reduces all to only 15 instructions
* branch label is kept to preserve original intent and for historical record
ImprovingRigmarole 4 лет назад
Родитель
Сommit
6857b98ecd
1 измененных файлов с 16 добавлено и 13 удалено
  1. 16 13
      lib/subghz/subghz_keystore.c

+ 16 - 13
lib/subghz/subghz_keystore.c

@@ -81,19 +81,22 @@ static void subghz_keystore_mess_with_iv(uint8_t* iv) {
     // Sharing them will bring some discomfort to legal owners
     // Sharing them will bring some discomfort to legal owners
     // And potential legal action against you
     // And potential legal action against you
     // While you reading this code think about your own personal responsibility
     // While you reading this code think about your own personal responsibility
-    asm volatile("movs   r0, #0x0    \n"
-                 "movs   r1, #0x0    \n"
-                 "movs   r2, #0x0    \n"
-                 "movs   r3, #0x0    \n"
-                 "nani:              \n"
-                 "ldrb   r1, [r0, %0]\n"
-                 "mov    r2, r1      \n"
-                 "add    r1, r3      \n"
-                 "mov    r3, r2      \n"
-                 "strb   r1, [r0, %0]\n"
-                 "adds   r0, #0x1    \n"
-                 "cmp    r0, #0xF    \n"
-                 "bls    nani        \n"
+    asm volatile("nani:                    \n"
+                 "ldrd  r0, r2, [%0, #0x0] \n"
+                 "lsl   r1, r0, #8         \n"
+                 "lsl   r3, r2, #8         \n"
+                 "orr   r3, r3, r0, lsr #24\n"
+                 "uadd8 r1, r1, r0         \n"
+                 "uadd8 r3, r3, r2         \n"
+                 "strd  r1, r3, [%0, #0x0] \n"
+                 "ldrd  r1, r3, [%0, #0x8] \n"
+                 "lsl   r0, r1, #8         \n"
+                 "orr   r0, r0, r2, lsr #24\n"
+                 "lsl   r2, r3, #8         \n"
+                 "orr   r2, r2, r1, lsr #24\n"
+                 "uadd8 r1, r1, r0         \n"
+                 "uadd8 r3, r3, r2         \n"
+                 "strd  r1, r3, [%0, #0x8] \n"
                  :
                  :
                  : "r"(iv)
                  : "r"(iv)
                  : "r0", "r1", "r2", "r3", "memory");
                  : "r0", "r1", "r2", "r3", "memory");