Merge pull request #19 from JocusSoft/master

Add support F0 chips

README.md

@@ -1,12 +1,12 @@
 # About
 
-This project is used to develop applications for the STM32 - ST's ARM Cortex-M3(4) MCUs. It uses cmake and GCC, along with newlib (libc), STM32CubeMX or ChibiOS.
+This project is used to develop applications for the STM32 - ST's ARM Cortex-M0(3,4) MCUs. It uses cmake and GCC, along with newlib (libc), STM32CubeMX or ChibiOS.
 
 ## Requirements
 
 * cmake >= 2.8
 * GCC toolchain with newlib (optional).
-* STM32CubeMX package for STM32F1, STM32F2 or STM32F4 families.
+* STM32CubeMX package for STM32F0, STM32F1, STM32F2 or STM32F4 families.
 
 ## Project contains
 
@@ -32,8 +32,8 @@ First of all you need to configure toolchain and libraries, you can do this by e
 * `TOOLCHAIN_PREFIX` - where toolchain is located, **default**: `/usr`
 * `TARGET_TRIPLET` - toolchain target triplet, **default**: `arm-none-eabi`
 * `STM32_CHIP` - STM32 device code, e.g. `STM32F407VG` or `STM32F103VG`
-* `STM32_FAMILY` - STM32 family (F0, F1, F4, etc.) currently, F1, F2 and F4 family are supported. **Note:** If `STM32_CHIP` variable is set, `STM32_FAMILY` is optional.
-* `STM32Cube_DIR` - path to STM32CubeMX directory **default**: `/opt/STM32Cube_FW_F1_V1.1.0 /opt/STM32Cube_FW_F2_V1.1.0 /opt/STM32Cube_FW_F4_V1.6.0`
+* `STM32_FAMILY` - STM32 family (F0, F1, F4, etc.) currently,F0, F1, F2 and F4 family are supported. **Note:** If `STM32_CHIP` variable is set, `STM32_FAMILY` is optional.
+* `STM32Cube_DIR` - path to STM32CubeMX directory **default**: `/opt/STM32Cube_FW_F0_V1.4.0 /opt/STM32Cube_FW_F1_V1.1.0 /opt/STM32Cube_FW_F2_V1.1.0 /opt/STM32Cube_FW_F4_V1.6.0`
 
 To use the toolchain, you'll need to copy contents of the `cmake` folder into cmake's modules path, or use the `CMAKE_MODULE_PATH` variable.
 

cmake/FindCMSIS.cmake

@@ -48,6 +48,15 @@ ELSEIF(STM32_FAMILY STREQUAL "F4")
     LIST(APPEND CMSIS_COMMON_HEADERS core_cm4.h)
     SET(CMSIS_DEVICE_HEADERS stm32f4xx.h system_stm32f4xx.h)
     SET(CMSIS_DEVICE_SOURCES system_stm32f4xx.c)
+ELSEIF(STM32_FAMILY STREQUAL "F0")
+    IF(NOT STM32Cube_DIR)
+        SET(STM32Cube_DIR "/opt/STM32Cube_FW_F0_V1.4.0")
+        MESSAGE(STATUS "No STM32Cube_DIR specified, using default: " ${STM32Cube_DIR})
+    ENDIF()
+
+    LIST(APPEND CMSIS_COMMON_HEADERS core_cm3.h)
+    SET(CMSIS_DEVICE_HEADERS stm32f0xx.h system_stm32f0xx.h)
+    SET(CMSIS_DEVICE_SOURCES system_stm32f0xx.c)
 ENDIF()
 
 IF(NOT CMSIS_STARTUP_SOURCE)

cmake/FindSTM32HAL.cmake

@@ -1,4 +1,26 @@
-IF(STM32_FAMILY STREQUAL "F1")
+IF(STM32_FAMILY STREQUAL "F0")
+    SET(HAL_COMPONENTS adc can cec comp cortex crc dac dma flash gpio i2c
+                       i2s irda iwdg pcd pwr rcc rtc smartcard smbus
+                       spi tim tsc uart usart wwdg)
+
+    SET(HAL_REQUIRED_COMPONENTS cortex pwr rcc)
+
+    # Components that have _ex sources
+    SET(HAL_EX_COMPONENTS adc crc dac flash i2c pcd pwr rcc rtc smartcard spi tim uart)
+
+    # Components that have ll_ in names instead of hal_
+    SET(HAL_LL_COMPONENTS "")
+
+    SET(HAL_PREFIX stm32f0xx_)
+
+    SET(HAL_HEADERS
+        stm32f0xx_hal.h
+        stm32f0xx_hal_def.h
+    )
+    SET(HAL_SRCS
+        stm32f0xx_hal.c
+    )
+ELSEIF(STM32_FAMILY STREQUAL "F1")
     SET(HAL_COMPONENTS adc can cec cortex crc dac dma eth flash gpio hcd i2c
                        i2s irda iwdg nand nor pccard pcd pwr rcc rtc sd smartcard
                        spi sram tim uart usart wwdg fsmc sdmmc usb)

cmake/gcc_stm32.cmake

@@ -1,6 +1,6 @@
 INCLUDE(CMakeForceCompiler)
 
-SET(STM32_SUPPORTED_FAMILIES F1 F2 F4 CACHE INTERNAL "stm32 supported families")
+SET(STM32_SUPPORTED_FAMILIES F0 F1 F2 F4 CACHE INTERNAL "stm32 supported families")
 
 IF(NOT TOOLCHAIN_PREFIX)
      SET(TOOLCHAIN_PREFIX "/usr")
@@ -43,6 +43,7 @@ SET(CMAKE_ASM_COMPILER ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-gcc)
 
 SET(CMAKE_OBJCOPY ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objcopy CACHE INTERNAL "objcopy tool")
 SET(CMAKE_OBJDUMP ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-objdump CACHE INTERNAL "objdump tool")
+SET(CMAKE_SIZE ${TOOLCHAIN_BIN_DIR}/${TARGET_TRIPLET}-size CACHE INTERNAL "size tool")
 
 SET(CMAKE_C_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "c compiler flags debug")
 SET(CMAKE_CXX_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "cxx compiler flags debug")
@@ -69,6 +70,15 @@ FUNCTION(STM32_ADD_HEX_BIN_TARGETS TARGET)
     ADD_CUSTOM_TARGET(${TARGET}.bin DEPENDS ${TARGET} COMMAND ${CMAKE_OBJCOPY} -Obinary ${FILENAME} ${FILENAME}.bin)
 ENDFUNCTION()
 
+FUNCTION(STM32_PRINT_SIZE_OF_TARGETS TARGET)
+    IF(EXECUTABLE_OUTPUT_PATH)
+      SET(FILENAME "${EXECUTABLE_OUTPUT_PATH}/${TARGET}")
+    ELSE()
+      SET(FILENAME "${TARGET}")
+    ENDIF()
+    add_custom_command(TARGET ${TARGET} POST_BUILD COMMAND ${CMAKE_SIZE} ${FILENAME})
+ENDFUNCTION()
+
 STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
 INCLUDE(gcc_stm32${STM32_FAMILY_LOWER})
 

cmake/gcc_stm32f0.cmake

@@ -0,0 +1,97 @@
+SET(CMAKE_C_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=gnu99 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "c compiler flags")
+SET(CMAKE_CXX_FLAGS "-mthumb -fno-builtin -mcpu=cortex-m0 -Wall -std=c++11 -ffunction-sections -fdata-sections -fomit-frame-pointer -mabi=aapcs -fno-unroll-loops -ffast-math -ftree-vectorize" CACHE INTERNAL "cxx compiler flags")
+SET(CMAKE_ASM_FLAGS "-mthumb -mcpu=cortex-m0 -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
+
+SET(CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "executable linker flags")
+SET(CMAKE_MODULE_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "module linker flags")
+SET(CMAKE_SHARED_LINKER_FLAGS "-mthumb -mcpu=cortex-m0 -mabi=aapcs" CACHE INTERNAL "shared linker flags")
+
+SET(STM32_CHIP_TYPES 030xC 031x6 038x6 042x6 048x6 051x8 058x8 070xB 071xB 072xB 078xB 091xC 098xC CACHE INTERNAL "stm32f0 chip types")
+SET(STM32_CODES "030.[468C]" "031.[46]" "038.6" "042.[46]" "048.6" "051.[468]" "058.8" "070.[6B]" "071.[8B]" "072.[8B]" "078.B" "091.[BC]" "098.C")
+
+MACRO(STM32_GET_CHIP_TYPE CHIP CHIP_TYPE)
+    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]((03[018].[468C])|(04[28].[46])|(05[18].[468])|(07[0128].[68B])|(09[18].[BC])).+$" "\\1" STM32_CODE ${CHIP})
+    SET(INDEX 0)
+    FOREACH(C_TYPE ${STM32_CHIP_TYPES})
+        LIST(GET STM32_CODES ${INDEX} CHIP_TYPE_REGEXP)
+        IF(STM32_CODE MATCHES ${CHIP_TYPE_REGEXP})
+            SET(RESULT_TYPE ${C_TYPE})
+        ENDIF()
+        MATH(EXPR INDEX "${INDEX}+1")
+    ENDFOREACH()
+    SET(${CHIP_TYPE} ${RESULT_TYPE})
+ENDMACRO()
+
+MACRO(STM32_GET_CHIP_PARAMETERS CHIP FLASH_SIZE RAM_SIZE)
+    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF](0[34579][0128]).[468BC]" "\\1" STM32_CODE ${CHIP})
+    STRING(REGEX REPLACE "^[sS][tT][mM]32[fF]0[34579][0128].([468BC])" "\\1" STM32_SIZE_CODE ${CHIP})
+
+    IF(STM32_SIZE_CODE STREQUAL "4")
+        SET(FLASH "16K")
+    ELSEIF(STM32_SIZE_CODE STREQUAL "6")
+        SET(FLASH "32K")
+    ELSEIF(STM32_SIZE_CODE STREQUAL "8")
+        SET(FLASH "64K")
+    ELSEIF(STM32_SIZE_CODE STREQUAL "B")
+        SET(FLASH "128K")
+    ELSEIF(STM32_SIZE_CODE STREQUAL "C")
+        SET(FLASH "256K")
+    ENDIF()
+
+    STM32_GET_CHIP_TYPE(${CHIP} TYPE)
+
+    IF(${TYPE} STREQUAL 030xC)
+        IF((STM32_SIZE_CODE STREQUAL "4") OR (STM32_SIZE_CODE STREQUAL "6"))
+            SET(RAM "4K")
+	ELSEIF(STM32_SIZE_CODE STREQUAL "8")
+	    SET(RAM "8K")
+        ELSE()
+            SET(RAM "32K")
+        ENDIF()
+    ELSEIF(${TYPE} STREQUAL 031x6)
+            SET(RAM "4K")
+    ELSEIF(${TYPE} STREQUAL 038x6)
+            SET(RAM "4K")
+    ELSEIF(${TYPE} STREQUAL 042x6)
+            SET(RAM "6K")
+    ELSEIF(${TYPE} STREQUAL 048x6)
+            SET(RAM "6K")
+    ELSEIF(${TYPE} STREQUAL 051x8)
+            SET(RAM "8K")
+    ELSEIF(${TYPE} STREQUAL 058x8)
+            SET(RAM "8K")
+    ELSEIF(${TYPE} STREQUAL 070xB)
+        IF(STM32_SIZE_CODE STREQUAL "6")
+            SET(RAM "6K")
+        ELSE()
+            SET(RAM "16K")
+        ENDIF()
+    ELSEIF(${TYPE} STREQUAL 071xB)
+            SET(RAM "16K")
+    ELSEIF(${TYPE} STREQUAL 072xB)
+            SET(RAM "16K")
+    ELSEIF(${TYPE} STREQUAL 078xB)
+            SET(RAM "16K")
+    ELSEIF(${TYPE} STREQUAL 091xC)
+            SET(RAM "32K")
+    ELSEIF(${TYPE} STREQUAL 098xC)
+            SET(RAM "32K")
+    ENDIF()
+
+    SET(${FLASH_SIZE} ${FLASH})
+    SET(${RAM_SIZE} ${RAM})
+ENDMACRO()
+
+FUNCTION(STM32_SET_CHIP_DEFINITIONS TARGET CHIP_TYPE)
+    LIST(FIND STM32_CHIP_TYPES ${CHIP_TYPE} TYPE_INDEX)
+    IF(TYPE_INDEX EQUAL -1)
+        MESSAGE(FATAL_ERROR "Invalid/unsupported STM32F0 chip type: ${CHIP_TYPE}")
+    ENDIF()
+    GET_TARGET_PROPERTY(TARGET_DEFS ${TARGET} COMPILE_DEFINITIONS)
+    IF(TARGET_DEFS)
+        SET(TARGET_DEFS "STM32F0;STM32F${CHIP_TYPE};${TARGET_DEFS}")
+    ELSE()
+        SET(TARGET_DEFS "STM32F0;STM32F${CHIP_TYPE}")
+    ENDIF()
+    SET_TARGET_PROPERTIES(${TARGET} PROPERTIES COMPILE_DEFINITIONS "${TARGET_DEFS}")
+ENDFUNCTION()

stm32-template/CMakeLists.txt

@@ -22,3 +22,4 @@ ADD_EXECUTABLE(${CMAKE_PROJECT_NAME} ${PROJECT_SOURCES} ${CMSIS_SOURCES}) # ${ST
 
 STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME})
 STM32_ADD_HEX_BIN_TARGETS(${CMAKE_PROJECT_NAME})
+STM32_PRINT_SIZE_OF_TARGETS(${CMAKE_PROJECT_NAME})