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@@ -22,7 +22,7 @@ void nrf24_deinit() {
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}
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}
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void nrf24_spi_trx(
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void nrf24_spi_trx(
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- FuriHalSpiBusHandle* handle,
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+ const FuriHalSpiBusHandle* handle,
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uint8_t* tx,
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uint8_t* tx,
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uint8_t* rx,
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uint8_t* rx,
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uint8_t size,
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uint8_t size,
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@@ -33,7 +33,7 @@ void nrf24_spi_trx(
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furi_hal_gpio_write(handle->cs, true);
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furi_hal_gpio_write(handle->cs, true);
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}
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}
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-uint8_t nrf24_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
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+uint8_t nrf24_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
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uint8_t tx[2] = {W_REGISTER | (REGISTER_MASK & reg), data};
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uint8_t tx[2] = {W_REGISTER | (REGISTER_MASK & reg), data};
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uint8_t rx[2] = {0};
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uint8_t rx[2] = {0};
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nrf24_spi_trx(handle, tx, rx, 2, nrf24_TIMEOUT);
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nrf24_spi_trx(handle, tx, rx, 2, nrf24_TIMEOUT);
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@@ -41,7 +41,7 @@ uint8_t nrf24_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data)
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return rx[0];
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return rx[0];
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}
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}
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-uint8_t nrf24_write_buf_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data, uint8_t size) {
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+uint8_t nrf24_write_buf_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data, uint8_t size) {
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uint8_t tx[size + 1];
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uint8_t tx[size + 1];
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uint8_t rx[size + 1];
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uint8_t rx[size + 1];
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memset(rx, 0, size + 1);
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memset(rx, 0, size + 1);
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@@ -52,7 +52,7 @@ uint8_t nrf24_write_buf_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* d
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return rx[0];
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return rx[0];
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}
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}
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-uint8_t nrf24_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data, uint8_t size) {
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+uint8_t nrf24_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data, uint8_t size) {
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uint8_t tx[size + 1];
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uint8_t tx[size + 1];
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uint8_t rx[size + 1];
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uint8_t rx[size + 1];
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memset(rx, 0, size + 1);
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memset(rx, 0, size + 1);
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@@ -63,42 +63,42 @@ uint8_t nrf24_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data,
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return rx[0];
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return rx[0];
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}
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}
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-uint8_t nrf24_flush_rx(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_flush_rx(const FuriHalSpiBusHandle* handle) {
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uint8_t tx[] = {FLUSH_RX};
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uint8_t tx[] = {FLUSH_RX};
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uint8_t rx[] = {0};
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uint8_t rx[] = {0};
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nrf24_spi_trx(handle, tx, rx, 1, nrf24_TIMEOUT);
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nrf24_spi_trx(handle, tx, rx, 1, nrf24_TIMEOUT);
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return rx[0];
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return rx[0];
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}
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}
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-uint8_t nrf24_flush_tx(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_flush_tx(const FuriHalSpiBusHandle* handle) {
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uint8_t tx[] = {FLUSH_TX};
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uint8_t tx[] = {FLUSH_TX};
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uint8_t rx[] = {0};
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uint8_t rx[] = {0};
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nrf24_spi_trx(handle, tx, rx, 1, nrf24_TIMEOUT);
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nrf24_spi_trx(handle, tx, rx, 1, nrf24_TIMEOUT);
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return rx[0];
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return rx[0];
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}
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}
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-uint8_t nrf24_get_maclen(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_get_maclen(const FuriHalSpiBusHandle* handle) {
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uint8_t maclen;
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uint8_t maclen;
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nrf24_read_reg(handle, REG_SETUP_AW, &maclen, 1);
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nrf24_read_reg(handle, REG_SETUP_AW, &maclen, 1);
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maclen &= 3;
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maclen &= 3;
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return maclen + 2;
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return maclen + 2;
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}
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}
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-uint8_t nrf24_set_maclen(FuriHalSpiBusHandle* handle, uint8_t maclen) {
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+uint8_t nrf24_set_maclen(const FuriHalSpiBusHandle* handle, uint8_t maclen) {
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assert(maclen > 1 && maclen < 6);
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assert(maclen > 1 && maclen < 6);
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uint8_t status = 0;
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uint8_t status = 0;
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status = nrf24_write_reg(handle, REG_SETUP_AW, maclen - 2);
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status = nrf24_write_reg(handle, REG_SETUP_AW, maclen - 2);
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return status;
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return status;
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}
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}
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-uint8_t nrf24_status(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_status(const FuriHalSpiBusHandle* handle) {
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uint8_t status;
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uint8_t status;
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uint8_t tx[] = {R_REGISTER | (REGISTER_MASK & REG_STATUS)};
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uint8_t tx[] = {R_REGISTER | (REGISTER_MASK & REG_STATUS)};
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nrf24_spi_trx(handle, tx, &status, 1, nrf24_TIMEOUT);
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nrf24_spi_trx(handle, tx, &status, 1, nrf24_TIMEOUT);
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return status;
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return status;
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}
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}
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-uint32_t nrf24_get_rate(FuriHalSpiBusHandle* handle) {
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+uint32_t nrf24_get_rate(const FuriHalSpiBusHandle* handle) {
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uint8_t setup = 0;
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uint8_t setup = 0;
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uint32_t rate = 0;
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uint32_t rate = 0;
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nrf24_read_reg(handle, REG_RF_SETUP, &setup, 1);
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nrf24_read_reg(handle, REG_RF_SETUP, &setup, 1);
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@@ -113,7 +113,7 @@ uint32_t nrf24_get_rate(FuriHalSpiBusHandle* handle) {
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return rate;
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return rate;
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}
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}
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-uint8_t nrf24_set_rate(FuriHalSpiBusHandle* handle, uint32_t rate) {
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+uint8_t nrf24_set_rate(const FuriHalSpiBusHandle* handle, uint32_t rate) {
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uint8_t r6 = 0;
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uint8_t r6 = 0;
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uint8_t status = 0;
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uint8_t status = 0;
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if(!rate) rate = 2000000;
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if(!rate) rate = 2000000;
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@@ -131,19 +131,19 @@ uint8_t nrf24_set_rate(FuriHalSpiBusHandle* handle, uint32_t rate) {
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return status;
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return status;
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}
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}
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-uint8_t nrf24_get_chan(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_get_chan(const FuriHalSpiBusHandle* handle) {
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uint8_t channel = 0;
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uint8_t channel = 0;
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nrf24_read_reg(handle, REG_RF_CH, &channel, 1);
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nrf24_read_reg(handle, REG_RF_CH, &channel, 1);
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return channel;
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return channel;
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}
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}
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-uint8_t nrf24_set_chan(FuriHalSpiBusHandle* handle, uint8_t chan) {
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+uint8_t nrf24_set_chan(const FuriHalSpiBusHandle* handle, uint8_t chan) {
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uint8_t status;
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uint8_t status;
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status = nrf24_write_reg(handle, REG_RF_CH, chan);
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status = nrf24_write_reg(handle, REG_RF_CH, chan);
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return status;
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return status;
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}
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}
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-uint8_t nrf24_get_src_mac(FuriHalSpiBusHandle* handle, uint8_t* mac) {
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+uint8_t nrf24_get_src_mac(const FuriHalSpiBusHandle* handle, uint8_t* mac) {
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uint8_t size = 0;
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uint8_t size = 0;
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uint8_t status = 0;
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uint8_t status = 0;
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size = nrf24_get_maclen(handle);
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size = nrf24_get_maclen(handle);
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@@ -151,7 +151,7 @@ uint8_t nrf24_get_src_mac(FuriHalSpiBusHandle* handle, uint8_t* mac) {
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return status;
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return status;
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}
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}
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-uint8_t nrf24_set_src_mac(FuriHalSpiBusHandle* handle, uint8_t* mac, uint8_t size) {
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+uint8_t nrf24_set_src_mac(const FuriHalSpiBusHandle* handle, uint8_t* mac, uint8_t size) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t clearmac[] = {0, 0, 0, 0, 0};
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uint8_t clearmac[] = {0, 0, 0, 0, 0};
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nrf24_set_maclen(handle, size);
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nrf24_set_maclen(handle, size);
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@@ -160,7 +160,7 @@ uint8_t nrf24_set_src_mac(FuriHalSpiBusHandle* handle, uint8_t* mac, uint8_t siz
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return status;
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return status;
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}
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}
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-uint8_t nrf24_get_dst_mac(FuriHalSpiBusHandle* handle, uint8_t* mac) {
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+uint8_t nrf24_get_dst_mac(const FuriHalSpiBusHandle* handle, uint8_t* mac) {
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uint8_t size = 0;
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uint8_t size = 0;
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uint8_t status = 0;
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uint8_t status = 0;
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size = nrf24_get_maclen(handle);
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size = nrf24_get_maclen(handle);
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@@ -168,7 +168,7 @@ uint8_t nrf24_get_dst_mac(FuriHalSpiBusHandle* handle, uint8_t* mac) {
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return status;
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return status;
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}
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}
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-uint8_t nrf24_set_dst_mac(FuriHalSpiBusHandle* handle, uint8_t* mac, uint8_t size) {
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+uint8_t nrf24_set_dst_mac(const FuriHalSpiBusHandle* handle, uint8_t* mac, uint8_t size) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t clearmac[] = {0, 0, 0, 0, 0};
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uint8_t clearmac[] = {0, 0, 0, 0, 0};
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nrf24_set_maclen(handle, size);
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nrf24_set_maclen(handle, size);
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@@ -177,20 +177,20 @@ uint8_t nrf24_set_dst_mac(FuriHalSpiBusHandle* handle, uint8_t* mac, uint8_t siz
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return status;
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return status;
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}
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}
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-uint8_t nrf24_get_packetlen(FuriHalSpiBusHandle* handle, uint8_t pipe) {
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+uint8_t nrf24_get_packetlen(const FuriHalSpiBusHandle* handle, uint8_t pipe) {
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uint8_t len = 0;
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uint8_t len = 0;
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if(pipe > 5) pipe = 0;
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if(pipe > 5) pipe = 0;
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nrf24_read_reg(handle, RX_PW_P0 + pipe, &len, 1);
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nrf24_read_reg(handle, RX_PW_P0 + pipe, &len, 1);
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return len;
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return len;
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}
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}
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-uint8_t nrf24_set_packetlen(FuriHalSpiBusHandle* handle, uint8_t len) {
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+uint8_t nrf24_set_packetlen(const FuriHalSpiBusHandle* handle, uint8_t len) {
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uint8_t status = 0;
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uint8_t status = 0;
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status = nrf24_write_reg(handle, RX_PW_P0, len);
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status = nrf24_write_reg(handle, RX_PW_P0, len);
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return status;
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return status;
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}
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}
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-uint8_t nrf24_rxpacket(FuriHalSpiBusHandle* handle, uint8_t* packet, uint8_t* ret_packetsize, uint8_t packet_size) {
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+uint8_t nrf24_rxpacket(const FuriHalSpiBusHandle* handle, uint8_t* packet, uint8_t* ret_packetsize, uint8_t packet_size) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t tx_cmd[33] = {0}; // 32 max payload size + 1 for command
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uint8_t tx_cmd[33] = {0}; // 32 max payload size + 1 for command
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uint8_t tmp_packet[33] = {0};
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uint8_t tmp_packet[33] = {0};
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@@ -223,7 +223,7 @@ uint8_t nrf24_rxpacket(FuriHalSpiBusHandle* handle, uint8_t* packet, uint8_t* re
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}
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}
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// Return 0 when error
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// Return 0 when error
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-uint8_t nrf24_txpacket(FuriHalSpiBusHandle* handle, uint8_t* payload, uint8_t size, bool ack) {
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+uint8_t nrf24_txpacket(const FuriHalSpiBusHandle* handle, uint8_t* payload, uint8_t size, bool ack) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t tx[size + 1];
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uint8_t tx[size + 1];
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uint8_t rx[size + 1];
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uint8_t rx[size + 1];
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@@ -249,7 +249,7 @@ uint8_t nrf24_txpacket(FuriHalSpiBusHandle* handle, uint8_t* payload, uint8_t si
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return status & TX_DS;
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return status & TX_DS;
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}
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}
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-uint8_t nrf24_power_up(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_power_up(const FuriHalSpiBusHandle* handle) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t cfg = 0;
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uint8_t cfg = 0;
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nrf24_read_reg(handle, REG_CONFIG, &cfg, 1);
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nrf24_read_reg(handle, REG_CONFIG, &cfg, 1);
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@@ -259,7 +259,7 @@ uint8_t nrf24_power_up(FuriHalSpiBusHandle* handle) {
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return status;
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return status;
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}
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}
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-uint8_t nrf24_set_idle(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_set_idle(const FuriHalSpiBusHandle* handle) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t cfg = 0;
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uint8_t cfg = 0;
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nrf24_read_reg(handle, REG_CONFIG, &cfg, 1);
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nrf24_read_reg(handle, REG_CONFIG, &cfg, 1);
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@@ -270,7 +270,7 @@ uint8_t nrf24_set_idle(FuriHalSpiBusHandle* handle) {
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return status;
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return status;
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}
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}
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-uint8_t nrf24_set_rx_mode(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_set_rx_mode(const FuriHalSpiBusHandle* handle) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t cfg = 0;
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uint8_t cfg = 0;
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//status = nrf24_write_reg(handle, REG_CONFIG, 0x0F); // enable 2-byte CRC, PWR_UP, and PRIM_RX
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//status = nrf24_write_reg(handle, REG_CONFIG, 0x0F); // enable 2-byte CRC, PWR_UP, and PRIM_RX
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@@ -283,7 +283,7 @@ uint8_t nrf24_set_rx_mode(FuriHalSpiBusHandle* handle) {
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return status;
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return status;
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}
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}
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-uint8_t nrf24_set_tx_mode(FuriHalSpiBusHandle* handle) {
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+uint8_t nrf24_set_tx_mode(const FuriHalSpiBusHandle* handle) {
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uint8_t status = 0;
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uint8_t status = 0;
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uint8_t cfg = 0;
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uint8_t cfg = 0;
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furi_hal_gpio_write(nrf24_CE_PIN, false);
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furi_hal_gpio_write(nrf24_CE_PIN, false);
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@@ -299,7 +299,7 @@ uint8_t nrf24_set_tx_mode(FuriHalSpiBusHandle* handle) {
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}
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}
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void nrf24_configure(
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void nrf24_configure(
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- FuriHalSpiBusHandle* handle,
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+ const FuriHalSpiBusHandle* handle,
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uint8_t rate,
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uint8_t rate,
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uint8_t* srcmac,
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uint8_t* srcmac,
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uint8_t* dstmac,
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uint8_t* dstmac,
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@@ -345,7 +345,7 @@ void nrf24_configure(
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furi_delay_ms(200);
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furi_delay_ms(200);
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}
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}
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-void nrf24_init_promisc_mode(FuriHalSpiBusHandle* handle, uint8_t channel, uint8_t rate) {
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+void nrf24_init_promisc_mode(const FuriHalSpiBusHandle* handle, uint8_t channel, uint8_t rate) {
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//uint8_t preamble[] = {0x55, 0x00}; // little endian
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//uint8_t preamble[] = {0x55, 0x00}; // little endian
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uint8_t preamble[] = {0xAA, 0x00}; // little endian
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uint8_t preamble[] = {0xAA, 0x00}; // little endian
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//uint8_t preamble[] = {0x00, 0x55}; // little endian
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//uint8_t preamble[] = {0x00, 0x55}; // little endian
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@@ -472,7 +472,7 @@ bool validate_address(uint8_t* addr) {
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return true;
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return true;
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}
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}
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-bool nrf24_sniff_address(FuriHalSpiBusHandle* handle, uint8_t maclen, uint8_t* address) {
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+bool nrf24_sniff_address(const FuriHalSpiBusHandle* handle, uint8_t maclen, uint8_t* address) {
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bool found = false;
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bool found = false;
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uint8_t packet[32] = {0};
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uint8_t packet[32] = {0};
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uint8_t packetsize;
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uint8_t packetsize;
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@@ -500,7 +500,7 @@ bool nrf24_sniff_address(FuriHalSpiBusHandle* handle, uint8_t maclen, uint8_t* a
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}
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}
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uint8_t nrf24_find_channel(
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uint8_t nrf24_find_channel(
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- FuriHalSpiBusHandle* handle,
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+ const FuriHalSpiBusHandle* handle,
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uint8_t* srcmac,
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uint8_t* srcmac,
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uint8_t* dstmac,
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uint8_t* dstmac,
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uint8_t maclen,
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uint8_t maclen,
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