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@@ -102,7 +102,7 @@ bool bq27220_init(FuriHalI2cBusHandle* handle, const ParamCEDV* cedv) {
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bq27220_set_parameter_u16(handle, AddressEDV1, cedv->EDV1);
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bq27220_set_parameter_u16(handle, AddressEDV1, cedv->EDV1);
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bq27220_set_parameter_u16(handle, AddressEDV2, cedv->EDV2);
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bq27220_set_parameter_u16(handle, AddressEDV2, cedv->EDV2);
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- bq27220_control(handle, Control_EXIT_CFG_UPDATE);
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+ bq27220_control(handle, Control_EXIT_CFG_UPDATE_REINIT);
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delay_us(10000);
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delay_us(10000);
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design_cap = bq27220_get_design_capacity(handle);
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design_cap = bq27220_get_design_capacity(handle);
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if(cedv->design_cap == design_cap) {
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if(cedv->design_cap == design_cap) {
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