Linker script generator.

All cmake scripts moved to module folder.
cmake/Modules -> cmake

README.mediawiki

@@ -30,17 +30,17 @@ Variables for CMSIS and STM32CubeMX:
 
 === Build CMSIS and Standard Peripherals Library ===
 In cmsis folder:
- cmake -DCMAKE_TOOLCHAIN_FILE=../gcc_stm32.cmake -DSTM32_FAMILY=F1 -DCMAKE_INSTALL_PREFIX=<path_to_toolchain>/arm-none-eabi/ -DCMAKE_BUILD_TYPE=Release
+ cmake -DCMAKE_TOOLCHAIN_FILE=../gcc_stm32.cmake -DCMAKE_MODULE_PATH=<path_to_stm32-cmake>/cmake -DSTM32_FAMILY=F1 -DCMAKE_INSTALL_PREFIX=<path_to_toolchain>/arm-none-eabi/ -DCMAKE_BUILD_TYPE=Release
  make && make install
 In stdperiph folder
- cmake -DCMAKE_TOOLCHAIN_FILE=../gcc_stm32.cmake -DCMAKE_MODULE_PATH=<path_to_cmake_folder_of_this_project>/Modules -DSTM32_FAMILY=F1 -DCMAKE_INSTALL_PREFIX=<path_to_toolchain>/arm-none-eabi/ -DCMAKE_BUILD_TYPE=Release
+ cmake -DCMAKE_TOOLCHAIN_FILE=../gcc_stm32.cmake -DCMAKE_MODULE_PATH=<path_to_stm32-cmake>/cmake -DSTM32_FAMILY=F1 -DCMAKE_INSTALL_PREFIX=<path_to_toolchain>/arm-none-eabi/ -DCMAKE_BUILD_TYPE=Release
  make && make install
 '''Note:''' For building for STM32F4 family, change -DSTM32_FAMILY=F1 to -DSTM32_FAMILY=F4
 
 '''Note:''' You can use different CMAKE_INSTALL_PREFIX, but than you'll have to configure cmake search paths when using cmake modules. You may specify an additional search path with -DEXTRA_FIND_PATH=<path-to-search>
 
 == Usage ==
-After building you need to copy cmake modules in cmake's modules path, or just set CMAKE_MODULE_PATH in project. 
+After building you'll need to copy contents of cmake folder into cmake's modules path, or just set CMAKE_MODULE_PATH variable. 
 Template project can be found in stm32-template folder.
 
 === Configure === 
@@ -68,22 +68,23 @@ or .bin:
 
 === Linker script variables ===
 Next cmake variables are useful for linker tuning:
+* STM32_LINKER_SCRIPT - Path to custom linker script. You can use cmake variables (listed below) in itd.
 * STM32_FLASH_ORIGIN - Start address of flash (default: 0x08000000)
 * STM32_RAM_ORIGIN - Start address of RAM (default: 0x20000000)
-* STM32_STACK_ADDRESS - Address of stack bottom (default: RAM_ORIGIN + RAM_SIZE)
+* STM32_CCRAM_ORIGIN - Start address of Core-Couped RAM (only for F4 family) (default: 0x10000000)
 * STM32_FLASH_SIZE - Flash size (default: from chip name)
 * STM32_RAM_SIZE - RAM size (default: from chip name)
+* STM32_CCRAM_SIZE - Core-Couped RAM size (only for F4 family) (default: 64 KiB)
 * STM32_MIN_STACK_SIZE - Minimum stack size for error detection at link-time (default: 512 bytes)
 * STM32_MIN_HEAP_SIZE - Minimum heap size for error detection at link-time (default: 0 bytes)
 
 === Useful cmake macros ===
-* STM32_GET_CHIP_TYPE(CHIP CHIP_TYPE) - gets chip type (HD, MD, etc.) from chip name.
+* STM32_GET_CHIP_TYPE(CHIP CHIP_TYPE) - gets chip type from chip name.
 * STM32_GET_CHIP_PARAMETERS(CHIP FLASH_SIZE RAM_SIZE) - gets chip ram/flash size from chip name.
 * STM32_SET_CHIP_DEFINITIONS(TARGET CHIP_TYPE) - sets chip family and type-specific compiler flags for target.
 * STM32_SET_FLASH_PARAMS(TARGET ...) - sets chip flash/ram parameters for targer.
 * STM32_SET_TARGET_PROPERTIES(TARGET) - sets all needed parameters and compiler flags for target. 
 * STM32_GENERATE_LIBRARIES(NAME SOURCES LIBRARIES) - generates libraries for all chip types in family. Resulting libraries stored in LIBRARIES and have names in ${NAME}_${FAMILY}_${CHIP_TYPE} format.
-* STM32_SET_HSE_VALUE - change HSE frequency definitions (in Hz).
 
 === ChibiOS Support ===
 This projects also supports ChibiOS v3.x.x (both nil and rt kernels). 

cmake/Modules/ChibiOS3_LD.cmake → cmake/ChibiOS3_LD.cmake

@@ -22,7 +22,7 @@ IF(NOT ChibiOS_LINKER_SCRIPT)
       "  ram1 : org = 0x00000000, len = 0\n"
       "  ram2 : org = 0x00000000, len = 0\n"
       "  ram3 : org = 0x00000000, len = 0\n"
-      "  ram4 : org = 0x00000000, len = 0\n"
+      "  ram4 : org = \${STM32_CCRAM_ORIGIN}, len = \${STM32_CCRAM_SIZE}\n"
       "  ram5 : org = 0x00000000, len = 0\n"
       "  ram6 : org = 0x00000000, len = 0\n"
       "  ram7 : org = 0x00000000, len = 0\n"

cmake/ChibiOS3_RT.cmake

@@ -0,0 +1,65 @@
+SET(CHIBIOS_rt_SEARCH_PATH 
+  ${CHIBIOS_ROOT}/os/rt/src
+  ${CHIBIOS_ROOT}/os/rt/include
+  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx
+  ${CHIBIOS_ROOT}/os/rt/ports/ARMCMx/compilers/GCC
+  ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/compilers/GCC
+  ${CHIBIOS_ROOT}/os/rt/src
+)
+  
+SET(CHIBIOS_rt_SEARCH_HEADERS
+  ch.h
+  chcore.h
+  chtypes.h
+)
+SET(CHIBIOS_rt_SOURCES  
+  crt0_v7m.s
+  crt1.c
+  vectors.c
+  chcore.c
+  chcore_v7m.c
+  chcoreasm_v7m.s
+  chsys.c
+  chdebug.c
+  chvt.c
+  chschd.c
+  chthreads.c
+  chtm.c
+  chstats.c
+  chdynamic.c
+  chregistry.c
+  chsem.c
+  chmtx.c
+  chcond.c
+  chevents.c
+  chmsg.c
+  chmboxes.c
+  chqueues.c
+  chmemcore.c
+  chheap.c
+  chmempools.c
+)
+
+IF(STM32_FAMILY STREQUAL "F1")
+  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
+    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F1xx
+    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
+    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
+  )
+  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
+    core_cm3.h
+    stm32f10x.h
+    cmparams.h
+  )
+ELSEIF(STM32_FAMILY STREQUAL "F4")
+  SET(CHIBIOS_rt_PLATFORM_SEARCH_PATH
+    ${CHIBIOS_ROOT}/os/common/ports/ARMCMx/devices/STM32F4xx
+    ${CHIBIOS_ROOT}/os/ext/CMSIS/include
+    ${CHIBIOS_ROOT}/os/ext/CMSIS/ST
+  )
+  SET(CHIBIOS_rt_PLATFORM_SEARCH_HEADERS
+    core_cm4.h
+    stm32f4xx.h
+    cmparams.h
+  )
+ENDIF()

gcc_stm32.cmake → cmake/gcc_stm32.cmake

@@ -70,22 +70,16 @@ FUNCTION(STM32_ADD_HEX_BIN_TARGETS TARGET)
 ENDFUNCTION()
 
 STRING(TOLOWER ${STM32_FAMILY} STM32_FAMILY_LOWER)
-INCLUDE(${CMAKE_CURRENT_LIST_DIR}/gcc_stm32${STM32_FAMILY_LOWER}.cmake)
+INCLUDE(gcc_stm32${STM32_FAMILY_LOWER})
 
-MACRO(STM32_KB_TO_BYTES KB BYTES)
-    STRING(REGEX REPLACE "^(.+)[kK]$" "\\1" KILOBYTES ${KB})
-    IF(KILOBYTES)
-        MATH(EXPR ${BYTES} "${KILOBYTES} * 1024")
-    ELSE()
-        SET(${BYTES} ${KB})
-    ENDIF()
-ENDMACRO()
-
-FUNCTION(STM32_SET_FLASH_PARAMS TARGET STM32_FLASH_SIZE STM32_RAM_SIZE STM32_STACK_ADDRESS STM32_MIN_STACK_SIZE STM32_MIN_HEAP_SIZE STM32_FLASH_ORIGIN STM32_RAM_ORIGIN)
+FUNCTION(STM32_SET_FLASH_PARAMS TARGET STM32_FLASH_SIZE STM32_RAM_SIZE STM32_CCRAM_SIZE STM32_MIN_STACK_SIZE STM32_MIN_HEAP_SIZE STM32_FLASH_ORIGIN STM32_RAM_ORIGIN STM32_CCRAM_ORIGIN)
     IF(NOT STM32_LINKER_SCRIPT)
-        MESSAGE(FATAL_ERROR "No linker script specified. Please specify linker script using STM32_LINKER_SCRIPT variable.")
+        MESSAGE(STATUS "No linker script specified, generating default")
+        INCLUDE(stm32_linker)
+        FILE(WRITE ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld ${STM32_LINKER_SCRIPT_TEXT})
+    ELSE()
+        CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
     ENDIF()
-    CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
     
     GET_TARGET_PROPERTY(TARGET_LD_FLAGS ${TARGET} LINK_FLAGS)
     IF(TARGET_LD_FLAGS)
@@ -96,29 +90,15 @@ FUNCTION(STM32_SET_FLASH_PARAMS TARGET STM32_FLASH_SIZE STM32_RAM_SIZE STM32_STA
     SET_TARGET_PROPERTIES(${TARGET} PROPERTIES LINK_FLAGS ${TARGET_LD_FLAGS})
 ENDFUNCTION()
 
-FUNCTION(STM32_SET_FLASH_PARAMS TARGET FLASH_SIZE RAM_SIZE)
-    IF(NOT STM32_LINKER_SCRIPT)
-        MESSAGE(FATAL_ERROR "No linker script specified. Please specify linker script using STM32_LINKER_SCRIPT variable.")
-    ENDIF()
-    
-    STM32_KB_TO_BYTES(${FLASH_SIZE} FLASH_SIZE)
-    STM32_KB_TO_BYTES(${RAM_SIZE} RAM_SIZE)
-    
+FUNCTION(STM32_SET_FLASH_PARAMS TARGET FLASH_SIZE RAM_SIZE)    
     IF(NOT STM32_FLASH_ORIGIN)
         SET(STM32_FLASH_ORIGIN "0x08000000")
     ENDIF() 
     
     IF(NOT STM32_RAM_ORIGIN)
-        SET(STM32_RAM_ORIGIN "536870912")
+        SET(STM32_RAM_ORIGIN "0x20000000")
     ENDIF()
     
-    IF(NOT STM32_STACK_ADDRESS)
-        MATH(EXPR STM32_STACK_ADDRESS "${STM32_RAM_ORIGIN} + ${RAM_SIZE}")
-    ENDIF()
-        
-    SET(STM32_FLASH_SIZE ${FLASH_SIZE})
-    SET(STM32_RAM_SIZE ${RAM_SIZE})
-    
     IF(NOT STM32_MIN_STACK_SIZE)
         SET(STM32_MIN_STACK_SIZE "0x200")
     ENDIF()
@@ -126,8 +106,22 @@ FUNCTION(STM32_SET_FLASH_PARAMS TARGET FLASH_SIZE RAM_SIZE)
     IF(NOT STM32_MIN_HEAP_SIZE)
         SET(STM32_MIN_HEAP_SIZE "0")
     ENDIF()
-        
-    CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
+    
+    IF(NOT STM32_CCRAM_ORIGIN)
+        SET(STM32_CCRAM_ORIGIN "0x10000000")
+    ENDIF() 
+    
+    IF(NOT STM32_CCRAM_SIZE)
+        SET(STM32_CCRAM_SIZE "64K")
+    ENDIF() 
+    
+    IF(NOT STM32_LINKER_SCRIPT)
+        MESSAGE(STATUS "No linker script specified, generating default")
+        INCLUDE(stm32_linker)
+        FILE(WRITE ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld ${STM32_LINKER_SCRIPT_TEXT})
+    ELSE()
+        CONFIGURE_FILE(${STM32_LINKER_SCRIPT} ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_flash.ld)
+    ENDIF()
     
     GET_TARGET_PROPERTY(TARGET_LD_FLAGS ${TARGET} LINK_FLAGS)
     IF(TARGET_LD_FLAGS)

cmake/stm32_linker.cmake

@@ -0,0 +1,127 @@
+# TODO: Add support for external RAM
+
+IF(STM32_FAMILY STREQUAL "F4")
+  SET(STM32_CCRAM_DEF "  CCMRAM (rw) : ORIGIN = ${STM32_CCRAM_ORIGIN}, LENGTH = ${STM32_CCRAM_SIZE}\n")
+  SET(STM32_CCRAM_SECTION 
+  "  _siccmram = LOADADDR(.ccmram)\;\n"
+  "  .ccmram :\n"
+  "  {"
+  "    . = ALIGN(4)\;\n"
+  "    _sccmram = .\;\n"
+  "    *(.ccmram)\n"
+  "    *(.ccmram*)\n"
+  "    . = ALIGN(4)\;\n"
+  "    _eccmram = .\;\n"
+  "  } >CCMRAM AT> FLASH\n"
+  )
+ELSE()
+  SET(STM32_CCRAM_DEF "")
+  SET(STM32_CCRAM_SECTION "")
+ENDIF()
+
+SET(STM32_LINKER_SCRIPT_TEXT
+  "ENTRY(Reset_Handler)\n"
+  "_estack = ${STM32_RAM_ORIGIN} + ${STM32_RAM_SIZE} - 1\;\n"
+  "_Min_Heap_Size = ${STM32_MIN_HEAP_SIZE}\;\n"
+  "_Min_Stack_Size = ${STM32_MIN_STACK_SIZE}\;\n"
+  "MEMORY\n"
+  "{\n"
+  "  FLASH (rx)      : ORIGIN = ${STM32_FLASH_ORIGIN}, LENGTH = ${STM32_FLASH_SIZE}\n"
+  "  RAM (xrw)      : ORIGIN = ${STM32_RAM_ORIGIN}, LENGTH = ${STM32_RAM_SIZE}\n"
+  "${STM32_CCRAM_DEF}"
+  "}\n"
+  "SECTIONS\n"
+  "{\n"
+  "  .isr_vector :\n"
+  "  {\n"
+  "    . = ALIGN(4)\;\n"
+  "    KEEP(*(.isr_vector))\n"
+  "    . = ALIGN(4)\;\n"
+  "  } >FLASH\n"
+  "  .text :\n"
+  "  {\n"
+  "    . = ALIGN(4)\;\n"
+  "    *(.text)\n"
+  "    *(.text*)\n"
+  "    *(.glue_7)\n"
+  "    *(.glue_7t)\n"
+  "    *(.eh_frame)\n"
+  "    KEEP (*(.init))\n"
+  "    KEEP (*(.fini))\n"
+  "    . = ALIGN(4)\;\n"
+  "    _etext = .\;\n"
+  "  } >FLASH\n"
+  "  .rodata :\n"
+  "  {\n"
+  "    . = ALIGN(4)\;\n"
+  "    *(.rodata)\n"
+  "    *(.rodata*)\n"
+  "    . = ALIGN(4)\;\n"
+  "  } >FLASH\n"
+  "  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH\n"
+  "  .ARM : {\n"
+  "    __exidx_start = .\;\n"
+  "    *(.ARM.exidx*)\n"
+  "    __exidx_end = .\;\n"
+  "  } >FLASH\n"
+  "  .preinit_array     :\n"
+  "  {\n"
+  "    PROVIDE_HIDDEN (__preinit_array_start = .)\;\n"
+  "    KEEP (*(.preinit_array*))\n"
+  "    PROVIDE_HIDDEN (__preinit_array_end = .)\;\n"
+  "  } >FLASH\n"
+  "  .init_array :\n"
+  "  {\n"
+  "    PROVIDE_HIDDEN (__init_array_start = .)\;\n"
+  "    KEEP (*(SORT(.init_array.*)))\n"
+  "    KEEP (*(.init_array*))\n"
+  "    PROVIDE_HIDDEN (__init_array_end = .)\;\n"
+  "  } >FLASH\n"
+  "  .fini_array :\n"
+  "  {\n"
+  "    PROVIDE_HIDDEN (__fini_array_start = .)\;\n"
+  "    KEEP (*(SORT(.fini_array.*)))\n"
+  "    KEEP (*(.fini_array*))\n"
+  "    PROVIDE_HIDDEN (__fini_array_end = .)\;\n"
+  "  } >FLASH\n"
+  "  _sidata = LOADADDR(.data)\;\n"
+  "  .data : \n"
+  "  {\n"
+  "    . = ALIGN(4)\;\n"
+  "    _sdata = .\;\n"
+  "    *(.data)\n"
+  "    *(.data*)\n"
+  "    . = ALIGN(4)\;\n"
+  "    _edata = .\;\n"
+  "  } >RAM AT> FLASH\n"
+  "${STM32_CCRAM_SECTION}"
+  "  . = ALIGN(4)\;\n"
+  "  .bss :\n"
+  "  {\n"
+  "    _sbss = .\;\n"
+  "    __bss_start__ = _sbss\;\n"
+  "    *(.bss)\n"
+  "    *(.bss*)\n"
+  "    *(COMMON)\n"
+  "    . = ALIGN(4)\;\n"
+  "    _ebss = .\;\n"
+  "    __bss_end__ = _ebss\;\n"
+  "  } >RAM\n"
+  "  ._user_heap_stack :\n"
+  "  {\n"
+  "    . = ALIGN(4)\;\n"
+  "    PROVIDE ( end = . )\;\n"
+  "    PROVIDE ( _end = . )\;\n"
+  "    . = . + _Min_Heap_Size\;\n"
+  "    . = . + _Min_Stack_Size\;\n"
+  "    . = ALIGN(4)\;\n"
+  "  } >RAM\n"
+  "  /DISCARD/ :\n"
+  "  {\n"
+  "    libc.a ( * )\n"
+  "    libm.a ( * )\n"
+  "    libgcc.a ( * )\n"
+  "  }\n"
+  "  .ARM.attributes 0 : { *(.ARM.attributes) }\n"
+  "}\n"
+)

stm32-blinky/CMakeLists.txt

@@ -16,8 +16,6 @@ SET(PROJECT_SOURCES
     main.c
 )
 
-SET(STM32_LINKER_SCRIPT ${CMSIS_LINKER_SCRIPT})
-
 ADD_EXECUTABLE(${CMAKE_PROJECT_NAME} ${PROJECT_SOURCES} ${CMSIS_SOURCES} ${STM32HAL_SOURCES})
 
 STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME})

stm32-newlib/CMakeLists.txt

@@ -17,8 +17,6 @@ SET(PROJECT_SOURCES
     newlib.c
 )
 
-SET(STM32_LINKER_SCRIPT ${CMSIS_LINKER_SCRIPT})
-
 ADD_EXECUTABLE(${CMAKE_PROJECT_NAME} ${PROJECT_SOURCES} ${CMSIS_SOURCES} ${STM32HAL_SOURCES}) 
 
 STM32_SET_TARGET_PROPERTIES(${CMAKE_PROJECT_NAME})