Merge pull request #165 from atsju/fix164

manage CCRAM section

cmake/stm32/devices.cmake

@@ -560,6 +560,22 @@ set(STM32_ALL_DEVICES
     G081GB
     G081KB
     G081RB
+    G0B1CC
+    G0B1CE
+    G0B1KC
+    G0B1KE
+    G0B1RC
+    G0B1RE
+    G0B1VC
+    G0B1VE
+    G0C1CC
+    G0C1CE
+    G0C1KC
+    G0C1KE
+    G0C1RC
+    G0C1RE
+    G0C1VC
+    G0C1VE
     G431C6
     G431C8
     G431CB
@@ -596,6 +612,9 @@ set(STM32_ALL_DEVICES
     G473MB
     G473MC
     G473ME
+    G473PB
+    G473PC
+    G473PE
     G473QB
     G473QC
     G473QE
@@ -611,6 +630,9 @@ set(STM32_ALL_DEVICES
     G474MB
     G474MC
     G474ME
+    G474PB
+    G474PC
+    G474PE
     G474QB
     G474QC
     G474QE
@@ -622,15 +644,57 @@ set(STM32_ALL_DEVICES
     G474VE
     G483CE
     G483ME
+    G483PE
     G483QE
     G483RE
     G483VE
     G484CE
     G484ME
+    G484PE
     G484QE
     G484RE
     G484VE
+    G491CC
+    G491KC
+    G491MC
+    G491RC
+    G491VC
+    G491CE
+    G491KE
+    G491ME
+    G491RE
+    G491VE
+    G4A1CE
+    G4A1KE
+    G4A1ME
+    G4A1RE
+    G4A1VE
     GBK1CB
+    H723VE
+    H723VG
+    H723ZE
+    H723ZG
+    H725AE
+    H725AG
+    H725IE
+    H725IG
+    H725RE
+    H725RG
+    H725VE
+    H725VG
+    H725ZE
+    H725ZG
+    H730AB
+    H730IB
+    H730VB
+    H730ZB
+    H733VG
+    H733ZG
+    H735AG
+    H735IG
+    H735RG
+    H735VG
+    H735ZG
     H742AG
     H742AI
     H742BG

cmake/stm32/f3.cmake

@@ -4,19 +4,19 @@ set(STM32_F3_TYPES
     F378xx F398xx 
 )
 set(STM32_F3_TYPE_MATCH 
-    "301.[68]" "302.[68]" "302.[BC]" "302.[ED]" "303.[68]" "303.[BC]" 
-    "303.[ED]" "318.." "328.." "334.[468]" "358.." "373.[8BC]"
+    "301.[68]" "302.[68]" "302.[BC]"  "302.[DE]" "303.[68]"  "303.[BC]" 
+    "303.[DE]"    "318.."    "328.." "334.[468]"    "358.." "373.[8BC]"
     "378.." "398.."    
 )
 set(STM32_F3_RAM_SIZES 
-     16K  16K   0K  64K  16K   0K  
-     80K  16K  16K  16K  48K   0K
-     32K  80K
+     16K  16K   0K  64K  12K   0K  
+     64K  16K  12K  12K  40K   0K
+     32K  64K
 )
 set(STM32_F3_CCRAM_SIZES 
-      0K   0K   0K   0K   0K   0K  
-      0K   0K   0K   0K   0K   0K
-      0K   0K
+      0K   0K   0K   0K   4K   8K  
+     16K   0K   4K   4K   8K   0K
+      0K  16K
 )
 
 stm32_util_create_family_targets(F3)
@@ -39,9 +39,9 @@ function(stm32f3_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
         endif()
     elseif(TYPE STREQUAL "F303xC")
         if(SIZE_CODE STREQUAL "C")
-            set(RAM "48K")
-        else()
             set(RAM "40K")
+        else()
+            set(RAM "32K")
         endif()
     elseif(TYPE STREQUAL "F373xC")
         if(SIZE_CODE STREQUAL "B")

cmake/stm32/f4.cmake

@@ -10,12 +10,12 @@ set(STM32_F4_TYPE_MATCH
 )
 set(STM32_F4_RAM_SIZES 
      64K  96K 128K 128K  32K  32K  32K 128K
-    256K 256K 256K 256K 256K 128K 128K 320K
+    256K 256K 256K 256K 320K 128K 128K 320K
     192K 192K 192K 192K 128K 320K 320K
 )
 set(STM32_F4_CCRAM_SIZES 
      0K  0K 64K 64K  0K  0K  0K  0K
-     0K  0K  0K  0K 64K 64K 64K  0K
+     0K  0K  0K  0K  0K 64K 64K  0K
     64K 64K 64K 64K  0K 64K 64K
 )
 

cmake/stm32/g0.cmake

@@ -1,14 +1,18 @@
 set(STM32_G0_TYPES 
-    G030xx G031xx G041xx G070xx G071xx G081xx   
+    G030xx G031xx G041xx G070xx G071xx G081xx
+    G0B1xx G0C1xx
 )
 set(STM32_G0_TYPE_MATCH 
-    "G030.." "G031.." "G041.." "G070.." "G071.." "G081.." 
+    "G030.." "G031.." "G041.." "G070.." "G071.." "G081.."
+    "G0B1.." "G0C1.."
 )
 set(STM32_G0_RAM_SIZES 
-     8K  8K  8K 36K 36K 36K
+      8K   8K   8K  36K  36K  36K
+    144k 144K
 )
 set(STM32_G0_CCRAM_SIZES 
-     0K  0K  0K  0K  0K  0K
+      0K   0K   0K   0K   0K   0K
+      0K   0K
 )
 
 stm32_util_create_family_targets(G0)

cmake/stm32/g4.cmake

@@ -1,14 +1,18 @@
 set(STM32_G4_TYPES 
     G431xx G441xx G471xx G473xx G483xx G474xx G484xx
+    G491xx G4A1xx
 )
 set(STM32_G4_TYPE_MATCH 
     "G431.." "G441.." "G471.." "G473.." "G483.." "G474.." "G484.."
+    "G491.." "G4A1.."
 )
 set(STM32_G4_RAM_SIZES 
      32K  32K 128K 128K 128K 128K 128K
+    112K 112K
 )
 set(STM32_G4_CCRAM_SIZES 
-     10K  10K  32K  32K  32K  32K  32K
+      0K   0K   0K   0K   0K   0K   0K
+      0K   0K
 )
 
 stm32_util_create_family_targets(G4)

cmake/stm32/h7.cmake

@@ -1,27 +1,33 @@
-set(STM32_H7_TYPES 
-    H743xx H753xx H750xx H742xx H745xx H755xx H747xx H757xx
+set(STM32_H7_TYPES
+    H723xx H725xx  H730xx H730xxQ H733xx H735xx
+    H743xx H753xx  H750xx H742xx  H745xx H755xx H747xx H757xx
     H7A3xx H7A3xxQ H7B3xx H7B3xxQ H7B0xx H7B0xxQ
 )
-set(STM32_H7_TYPE_MATCH 
-   "H743.." "H753.." "H750.." "H742.." "H745.." "H755.." "H747.." "H757.."
+set(STM32_H7_TYPE_MATCH
+   "H723.." "H725.."  "H730.." "H730..Q" "H733.." "H735.."
+   "H743.." "H753.."  "H750.." "H742.."  "H745.." "H755.." "H747.." "H757.."
    "H7A3.." "H7A3..Q" "H7B3.." "H7B3..Q" "H7B0.." "H7B0..Q"
 )
 set(STM32_H7_RAM_SIZES
+    128K 128K 128K 128K 128K 128K
     128K 128K 128K 128K 128K 128K 128K 128K
-    128K 128K 128K 128K 128K 128K 
+    128K 128K 128K 128K 128K 128K
 )
 set(STM32_H7_M4_RAM_SIZES
-    288K 288K 288K 288K 288K 288K 288K 288K
-    288K 288K 288K 288K 288K 288K 
+      0K   0K   0K   0K   0K   0K
+      0K   0K   0K   0K 288K 288K 288K 288K
+      0K   0K   0K   0K   0K   0K
 )
 
 set(STM32_H7_CCRAM_SIZES 
+      0K   0K   0K   0K   0K   0K
       0K   0K   0K   0K   0K   0K   0K   0K
       0K   0K   0K   0K   0K   0K
 )
 
 set(STM32_H7_NO_FLASH_SPLIT
-      H750xx H7B0xx
+      H723xx H725xx H730xx H730xxQ H733xx H735xx
+      H750xx H7B0xx H7B0xxQ
 )
 
 set(STM32_H7_DUAL_CORE

cmake/stm32/l1.cmake

@@ -49,7 +49,7 @@ function(stm32l1_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
         elseif(SIZE_CODE STREQUAL "B")
             set(RAM "16K")
         endif()
-    elseif((TYPE STREQUAL "L151xB"))
+    elseif((TYPE STREQUAL "L151xB") OR (TYPE STREQUAL "L152xB"))
         if(SIZE_CODE STREQUAL "6")
             set(RAM "10K")
         elseif(SIZE_CODE STREQUAL "8")
@@ -57,23 +57,7 @@ function(stm32l1_get_memory_info DEVICE TYPE FLASH_SIZE RAM_SIZE)
         elseif(SIZE_CODE STREQUAL "B")
             set(RAM "16K")
         endif()
-    elseif((TYPE STREQUAL "L151xBA"))
-        if(SIZE_CODE STREQUAL "6")
-            set(RAM "16K")
-        elseif(SIZE_CODE STREQUAL "8")
-            set(RAM "32K")
-        elseif(SIZE_CODE STREQUAL "B")
-            set(RAM "32K")
-        endif()
-    elseif((TYPE STREQUAL "L152xB"))
-        if(SIZE_CODE STREQUAL "6")
-            set(RAM "10K")
-        elseif(SIZE_CODE STREQUAL "8")
-            set(RAM "10K")
-        elseif(SIZE_CODE STREQUAL "B")
-            set(RAM "16K")
-        endif()
-    elseif((TYPE STREQUAL "L152xBA"))
+    elseif((TYPE STREQUAL "L151xBA") OR (TYPE STREQUAL "L152xBA"))
         if(SIZE_CODE STREQUAL "6")
             set(RAM "16K")
         elseif(SIZE_CODE STREQUAL "8")

cmake/stm32/l4.cmake

@@ -15,17 +15,19 @@ set(STM32_L4_TYPE_MATCH
 
 set(STM32_L4_RAM_SIZES 
      40K  40K  64K  64K  64K  64K
-     64K 160K 160K 160K 128K 128K
-    128K 128K 128K 320K 320K 320K 
+     64K 160K 160K 160K  96K  96K
+     96K  96K  96K 320K 320K 320K 
     320K 640K 640K 640K 640K 640K
     640K
 )
+# on devices where CCRAM is remapped to be contiguous with RAM it is included into RAM section
+# If you want to have dedicated section then you will need to use custom linker script
 set(STM32_L4_CCRAM_SIZES 
-      8K   8K  16K  16K  16K  16K
-     16K  32K  32K  32K  32K  32K
-     32K  32K  32K  64K  64K  64K
-     64K  64K  64K  64K  64K  64K
-     64K
+      0K   0K   0K   0K   0K   0K
+      0K   0K   0K   0K  32K  32K
+     32K  32K  32K   0K   0K   0K
+      0K   0K   0K   0K   0K   0K
+      0K
 )
 
 stm32_util_create_family_targets(L4)